|
From: <sv...@va...> - 2008-04-03 12:17:51
|
Author: sewardj
Date: 2008-04-03 13:17:53 +0100 (Thu, 03 Apr 2008)
New Revision: 1819
Log:
vex-side changes to do instrumentation-based origin tracking on amd64.
Also another folding rule for Max32U.
Modified:
branches/OTRACK_BY_INSTRUMENTATION/priv/host-amd64/isel.c
branches/OTRACK_BY_INSTRUMENTATION/priv/host-x86/isel.c
branches/OTRACK_BY_INSTRUMENTATION/priv/ir/iropt.c
branches/OTRACK_BY_INSTRUMENTATION/pub/libvex_guest_amd64.h
Modified: branches/OTRACK_BY_INSTRUMENTATION/priv/host-amd64/isel.c
===================================================================
--- branches/OTRACK_BY_INSTRUMENTATION/priv/host-amd64/isel.c 2008-04-01 11:05:00 UTC (rev 1818)
+++ branches/OTRACK_BY_INSTRUMENTATION/priv/host-amd64/isel.c 2008-04-03 12:17:53 UTC (rev 1819)
@@ -1150,6 +1150,24 @@
/* Handle misc other ops. */
+ if (e->Iex.Binop.op == Iop_Max32U) {
+ /* This generates a truly rotten piece of code. Just as well
+ it doesn't happen very often. */
+ HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
+ HReg src1L = newVRegI(env);
+ HReg src2 = iselIntExpr_R(env, e->Iex.Binop.arg2);
+ HReg src2L = newVRegI(env);
+ HReg dst = newVRegI(env);
+ addInstr(env, mk_iMOVsd_RR(src1,dst));
+ addInstr(env, mk_iMOVsd_RR(src1,src1L));
+ addInstr(env, AMD64Instr_Sh64(Ash_SHL, 32, src1L));
+ addInstr(env, mk_iMOVsd_RR(src2,src2L));
+ addInstr(env, AMD64Instr_Sh64(Ash_SHL, 32, src2L));
+ addInstr(env, AMD64Instr_Alu64R(Aalu_CMP, AMD64RMI_Reg(src2L), src1L));
+ addInstr(env, AMD64Instr_CMov64(Acc_B, AMD64RM_Reg(src2), dst));
+ return dst;
+ }
+
if (e->Iex.Binop.op == Iop_DivModS64to32
|| e->Iex.Binop.op == Iop_DivModU64to32) {
/* 64 x 32 -> (32(rem),32(div)) division */
Modified: branches/OTRACK_BY_INSTRUMENTATION/priv/host-x86/isel.c
===================================================================
--- branches/OTRACK_BY_INSTRUMENTATION/priv/host-x86/isel.c 2008-04-01 11:05:00 UTC (rev 1818)
+++ branches/OTRACK_BY_INSTRUMENTATION/priv/host-x86/isel.c 2008-04-03 12:17:53 UTC (rev 1819)
@@ -925,6 +925,8 @@
return dst;
}
+ /* Handle misc other ops. */
+
if (e->Iex.Binop.op == Iop_Max32U) {
HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
HReg dst = newVRegI(env);
@@ -935,7 +937,6 @@
return dst;
}
- /* Handle misc other ops. */
if (e->Iex.Binop.op == Iop_8HLto16) {
HReg hi8 = newVRegI(env);
HReg lo8 = newVRegI(env);
Modified: branches/OTRACK_BY_INSTRUMENTATION/priv/ir/iropt.c
===================================================================
--- branches/OTRACK_BY_INSTRUMENTATION/priv/ir/iropt.c 2008-04-01 11:05:00 UTC (rev 1818)
+++ branches/OTRACK_BY_INSTRUMENTATION/priv/ir/iropt.c 2008-04-03 12:17:53 UTC (rev 1819)
@@ -1200,6 +1200,15 @@
- e->Iex.Binop.arg2->Iex.Const.con->Ico.U64)));
break;
+ /* -- Max32U -- */
+ case Iop_Max32U: {
+ UInt u32a = e->Iex.Binop.arg1->Iex.Const.con->Ico.U32;
+ UInt u32b = e->Iex.Binop.arg2->Iex.Const.con->Ico.U32;
+ UInt res = u32a > u32b ? u32a : u32b;
+ e2 = IRExpr_Const(IRConst_U32(res));
+ break;
+ }
+
/* -- Mul -- */
case Iop_Mul32:
e2 = IRExpr_Const(IRConst_U32(
Modified: branches/OTRACK_BY_INSTRUMENTATION/pub/libvex_guest_amd64.h
===================================================================
--- branches/OTRACK_BY_INSTRUMENTATION/pub/libvex_guest_amd64.h 2008-04-01 11:05:00 UTC (rev 1818)
+++ branches/OTRACK_BY_INSTRUMENTATION/pub/libvex_guest_amd64.h 2008-04-03 12:17:53 UTC (rev 1819)
@@ -85,8 +85,7 @@
/* 144 */ ULong guest_CC_DEP2;
/* 152 */ ULong guest_CC_NDEP;
/* The D flag is stored here, encoded as either -1 or +1 */
- /* 160 */ ULong guest_DFLAG; /* 48 */
- /* RIP */
+ /* 160 */ ULong guest_DFLAG;
/* 168 */ ULong guest_RIP;
/* Probably a lot more stuff too.
D,ID flags
@@ -96,16 +95,16 @@
*/
/* Bit 21 (ID) of eflags stored here, as either 0 or 1. */
- ULong guest_IDFLAG;
+ /* 176 */ ULong guest_IDFLAG;
/* HACK to make tls on amd64-linux work. %fs only ever seems to
hold zero, and so guest_FS_ZERO holds the 64-bit offset
associated with a %fs value of zero. */
- ULong guest_FS_ZERO;
+ /* 184 */ ULong guest_FS_ZERO;
/* XMM registers */
- ULong guest_SSEROUND;
- U128 guest_XMM0;
+ /* 192 */ULong guest_SSEROUND;
+ /* 200 */U128 guest_XMM0;
U128 guest_XMM1;
U128 guest_XMM2;
U128 guest_XMM3;
@@ -126,14 +125,14 @@
/* Note. Setting guest_FTOP to be ULong messes up the
delicately-balanced PutI/GetI optimisation machinery.
Therefore best to leave it as a UInt. */
- UInt guest_FTOP;
+ /* 456 */UInt guest_FTOP;
ULong guest_FPREG[8];
- UChar guest_FPTAG[8];
- ULong guest_FPROUND;
- ULong guest_FC3210;
+ /* 528 */ UChar guest_FPTAG[8];
+ /* 536 */ ULong guest_FPROUND;
+ /* 544 */ ULong guest_FC3210;
/* Emulation warnings */
- UInt guest_EMWARN;
+ /* 552 */ UInt guest_EMWARN;
/* Translation-invalidation area description. Not used on amd64
(there is no invalidate-icache insn), but needed so as to
|