|
From: <sv...@va...> - 2006-12-29 05:06:56
|
Author: sewardj
Date: 2006-12-29 05:06:51 +0000 (Fri, 29 Dec 2006)
New Revision: 1715
Log:
Sync x86/amd64 flag helpers with the trunk.
Modified:
branches/VEX_3_2_BRANCH/priv/guest-amd64/ghelpers.c
branches/VEX_3_2_BRANCH/priv/guest-x86/ghelpers.c
Modified: branches/VEX_3_2_BRANCH/priv/guest-amd64/ghelpers.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_2_BRANCH/priv/guest-amd64/ghelpers.c 2006-12-29 01:54:=
36 UTC (rev 1714)
+++ branches/VEX_3_2_BRANCH/priv/guest-amd64/ghelpers.c 2006-12-29 05:06:=
51 UTC (rev 1715)
@@ -904,7 +904,6 @@
return unop(Iop_1Uto64,
binop(Iop_CmpEQ64,cc_dep1,cc_dep2));
}
-
if (isU64(cc_op, AMD64G_CC_OP_SUBQ) && isU64(cond, AMD64CondNZ)) {
/* long long sub/cmp, then NZ --> test dst!=3Dsrc */
return unop(Iop_1Uto64,
@@ -924,7 +923,6 @@
return unop(Iop_1Uto64,
binop(Iop_CmpLT64U, cc_dep1, cc_dep2));
}
-
if (isU64(cc_op, AMD64G_CC_OP_SUBQ) && isU64(cond, AMD64CondNB)) {
/* long long sub/cmp, then NB (unsigned greater than or equal)
--> test src <=3Du dst */
@@ -949,7 +947,6 @@
binop(Iop_Shl64,cc_dep1,mkU8(32)),
binop(Iop_Shl64,cc_dep2,mkU8(32))));
}
-
if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondNZ)) {
/* long sub/cmp, then NZ --> test dst!=3Dsrc */
return unop(Iop_1Uto64,
@@ -985,7 +982,6 @@
binop(Iop_Shl64,cc_dep1,mkU8(32)),
binop(Iop_Shl64,cc_dep2,mkU8(32))));
}
-
if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondNBE)) =
{
/* long sub/cmp, then NBE (unsigned greater than)
--> test src <u dst */
@@ -1025,7 +1021,6 @@
unop(Iop_64to8,cc_dep1),
unop(Iop_64to8,cc_dep2)));
}
-
if (isU64(cc_op, AMD64G_CC_OP_SUBB) && isU64(cond, AMD64CondNZ)) {
/* byte sub/cmp, then NZ --> test dst!=3Dsrc */
return unop(Iop_1Uto64,
@@ -1049,25 +1044,6 @@
mkU64(1));
}
=20
-// if (isU64(cc_op, AMD64G_CC_OP_SUBB) && isU64(cond, AMD64CondNZ))=
{
-// /* byte sub/cmp, then NZ --> test dst!=3Dsrc */
-// return unop(Iop_32Uto64,
-// unop(Iop_1Uto32,
-// binop(Iop_CmpNE8,=20
-// unop(Iop_32to8,unop(Iop_64to32,cc_dep1)),
-// unop(Iop_32to8,unop(Iop_64to32,cc_dep2)))))=
;
-// }
-
-//.. if (isU32(cc_op, AMD64G_CC_OP_SUBB) && isU32(cond, X86CondNBE=
)) {
-//.. /* long sub/cmp, then NBE (unsigned greater than)
-//.. --> test src <u dst */
-//.. /* Note, args are opposite way round from the usual */
-//.. return unop(Iop_1Uto32,
-//.. binop(Iop_CmpLT32U,=20
-//.. binop(Iop_And32,cc_dep2,mkU32(0xFF)),
-//.. binop(Iop_And32,cc_dep1,mkU32(0xFF))));
-//.. }
-
/*---------------- LOGICQ ----------------*/
=20
if (isU64(cc_op, AMD64G_CC_OP_LOGICQ) && isU64(cond, AMD64CondZ)) =
{
@@ -1107,11 +1083,6 @@
mkU64(0)));
}
=20
-//.. if (isU32(cc_op, AMD64G_CC_OP_LOGICL) && isU32(cond, X86CondS=
)) {
-//.. /* long and/or/xor, then S --> test dst <s 0 */
-//.. return unop(Iop_1Uto32,binop(Iop_CmpLT32S, cc_dep1, mkU32(=
0)));
-//.. }
-
if (isU64(cc_op, AMD64G_CC_OP_LOGICL) && isU64(cond, AMD64CondLE))=
{
/* long and/or/xor, then LE
This is pretty subtle. LOGIC sets SF and ZF according to th=
e
@@ -1125,24 +1096,6 @@
mkU64(0)));
}
=20
-//.. if (isU32(cc_op, AMD64G_CC_OP_LOGICL) && isU32(cond, X86CondB=
E)) {
-//.. /* long and/or/xor, then BE
-//.. LOGIC sets ZF according to the result and makes CF be z=
ero.
-//.. BE computes (CF | ZF), but CF is zero, so this reduces =
ZF=20
-//.. -- which will be 1 iff the result is zero. Hence ...
-//.. */
-//.. return unop(Iop_1Uto32,binop(Iop_CmpEQ32, cc_dep1, mkU32(0=
)));
-//.. }
-//..=20
-//.. /*---------------- LOGICW ----------------*/
-//..=20
-//.. if (isU32(cc_op, AMD64G_CC_OP_LOGICW) && isU32(cond, X86CondZ=
)) {
-//.. /* byte and/or/xor, then Z --> test dst=3D=3D0 */
-//.. return unop(Iop_1Uto32,
-//.. binop(Iop_CmpEQ32, binop(Iop_And32,cc_dep1,mkU=
32(0xFFFF)),=20
-//.. mkU32(0)));
-//.. }
-
/*---------------- LOGICB ----------------*/
=20
if (isU64(cc_op, AMD64G_CC_OP_LOGICB) && isU64(cond, AMD64CondZ)) =
{
@@ -1175,6 +1128,16 @@
mkU64(0)));
}
=20
+ /*---------------- INCW ----------------*/
+
+ if (isU64(cc_op, AMD64G_CC_OP_INCW) && isU64(cond, AMD64CondZ)) {
+ /* 16-bit inc, then Z --> test dst =3D=3D 0 */
+ return unop(Iop_1Uto64,
+ binop(Iop_CmpEQ64,=20
+ binop(Iop_Shl64,cc_dep1,mkU8(48)),=20
+ mkU64(0)));
+ }
+
/*---------------- DECL ----------------*/
=20
if (isU64(cc_op, AMD64G_CC_OP_DECL) && isU64(cond, AMD64CondZ)) {
@@ -1195,25 +1158,6 @@
mkU64(0)));
}
=20
-//.. /*---------------- DECL ----------------*/
-//..=20
-//.. if (isU32(cc_op, AMD64G_CC_OP_DECL) && isU32(cond, X86CondZ))=
{
-//.. /* dec L, then Z --> test dst =3D=3D 0 */
-//.. return unop(Iop_1Uto32,binop(Iop_CmpEQ32, cc_dep1, mkU32(0=
)));
-//.. }
-//..=20
-//.. if (isU32(cc_op, AMD64G_CC_OP_DECL) && isU32(cond, X86CondS))=
{
-//.. /* dec L, then S --> compare DST <s 0 */
-//.. return unop(Iop_1Uto32,binop(Iop_CmpLT32S, cc_dep1, mkU32(=
0)));
-//.. }
-//..=20
-//.. /*---------------- SHRL ----------------*/
-//..=20
-//.. if (isU32(cc_op, AMD64G_CC_OP_SHRL) && isU32(cond, X86CondZ))=
{
-//.. /* SHRL, then Z --> test dep1 =3D=3D 0 */
-//.. return unop(Iop_1Uto32,binop(Iop_CmpEQ32, cc_dep1, mkU32(0=
)));
-//.. }
-
/*---------------- COPY ----------------*/
/* This can happen, as a result of amd64 FP compares: "comisd ... =
;
jbe" for example. */
@@ -1261,6 +1205,43 @@
);
}
=20
+ if (isU64(cc_op, AMD64G_CC_OP_COPY)=20
+ && (isU64(cond, AMD64CondZ) || isU64(cond, AMD64CondNZ))) {
+ /* COPY, then Z --> extract Z from dep1, and test (Z =3D=3D 1).=
*/
+ /* COPY, then NZ --> extract Z from dep1, and test (Z =3D=3D 0)=
. */
+ UInt nnn =3D isU64(cond, AMD64CondZ) ? 1 : 0;
+ return
+ unop(
+ Iop_1Uto64,
+ binop(
+ Iop_CmpEQ64,
+ binop(
+ Iop_And64,
+ binop(Iop_Shr64, cc_dep1, mkU8(AMD64G_CC_SHIFT_Z)),
+ mkU64(1)
+ ),
+ mkU64(nnn)
+ )
+ );
+ }
+
+ if (isU64(cc_op, AMD64G_CC_OP_COPY) && isU64(cond, AMD64CondP)) {
+ /* COPY, then P --> extract P from dep1, and test (P =3D=3D 1).=
*/
+ return
+ unop(
+ Iop_1Uto64,
+ binop(
+ Iop_CmpNE64,
+ binop(
+ Iop_And64,
+ binop(Iop_Shr64, cc_dep1, mkU8(AMD64G_CC_SHIFT_P)),
+ mkU64(1)
+ ),
+ mkU64(0)
+ )
+ );
+ }
+
return NULL;
}
=20
@@ -1308,48 +1289,16 @@
/* If the thunk is dec or inc, the cflag is supplied as CC_NDEP=
. */
return cc_ndep;
}
-//.. if (isU64(cc_op, AMD64G_CC_OP_COPY)) {
-//.. /* cflag after COPY is stored in DEP1. */
-//.. return
-//.. binop(
-//.. Iop_And64,
-//.. binop(Iop_Shr64, cc_dep1, mkU8(AMD64G_CC_SHIFT_C)),
-//.. mkU64(1)
-//.. );
-//.. }
-//.. # if 0
-//.. if (cc_op->tag =3D=3D Iex_Const) {
-//.. vex_printf("CFLAG "); ppIRExpr(cc_op); vex_printf("\n");
-//.. }
-//.. # endif
=20
+# if 0
+ if (cc_op->tag =3D=3D Iex_Const) {
+ vex_printf("CFLAG "); ppIRExpr(cc_op); vex_printf("\n");
+ }
+# endif
+
return NULL;
}
=20
-//.. /* --------- specialising "x86g_calculate_rflags_all" --------- =
*/
-//..=20
-//.. if (vex_streq(function_name, "x86g_calculate_rflags_all")) {
-//.. /* specialise calls to above "calculate_rflags_all" function =
*/
-//.. IRExpr *cc_op, *cc_dep1, *cc_dep2, *cc_ndep;
-//.. vassert(arity =3D=3D 4);
-//.. cc_op =3D args[0];
-//.. cc_dep1 =3D args[1];
-//.. cc_dep2 =3D args[2];
-//.. cc_ndep =3D args[3];
-//..=20
-//.. if (isU32(cc_op, AMD64G_CC_OP_COPY)) {
-//.. /* eflags after COPY are stored in DEP1. */
-//.. return
-//.. binop(
-//.. Iop_And32,
-//.. cc_dep1,
-//.. mkU32(AMD64G_CC_MASK_O | AMD64G_CC_MASK_S | AMD64G_C=
C_MASK_Z=20
-//.. | AMD64G_CC_MASK_A | AMD64G_CC_MASK_C | AMD64G=
_CC_MASK_P)
-//.. );
-//.. }
-//.. return NULL;
-//.. }
-
# undef unop
# undef binop
# undef mkU64
Modified: branches/VEX_3_2_BRANCH/priv/guest-x86/ghelpers.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_2_BRANCH/priv/guest-x86/ghelpers.c 2006-12-29 01:54:36=
UTC (rev 1714)
+++ branches/VEX_3_2_BRANCH/priv/guest-x86/ghelpers.c 2006-12-29 05:06:51=
UTC (rev 1715)
@@ -832,7 +832,6 @@
return unop(Iop_1Uto32,
binop(Iop_CmpEQ32, cc_dep1, cc_dep2));
}
-
if (isU32(cc_op, X86G_CC_OP_SUBL) && isU32(cond, X86CondNZ)) {
/* long sub/cmp, then NZ --> test dst!=3Dsrc */
return unop(Iop_1Uto32,
@@ -845,6 +844,14 @@
return unop(Iop_1Uto32,
binop(Iop_CmpLT32S, cc_dep1, cc_dep2));
}
+ if (isU32(cc_op, X86G_CC_OP_SUBL) && isU32(cond, X86CondNL)) {
+ /* long sub/cmp, then NL (signed greater than or equal)=20
+ --> test !(dst <s src) */
+ return binop(Iop_Xor32,
+ unop(Iop_1Uto32,
+ binop(Iop_CmpLT32S, cc_dep1, cc_dep2)),
+ mkU32(1));
+ }
=20
if (isU32(cc_op, X86G_CC_OP_SUBL) && isU32(cond, X86CondLE)) {
/* long sub/cmp, then LE (signed less than or equal)
@@ -852,9 +859,8 @@
return unop(Iop_1Uto32,
binop(Iop_CmpLE32S, cc_dep1, cc_dep2));
}
-
if (isU32(cc_op, X86G_CC_OP_SUBL) && isU32(cond, X86CondNLE)) {
- /* long sub/cmp, then LE (signed not less than or equal)
+ /* long sub/cmp, then NLE (signed not less than or equal)
--> test dst >s src=20
--> test !(dst <=3Ds src) */
return binop(Iop_Xor32,
@@ -869,6 +875,14 @@
return unop(Iop_1Uto32,
binop(Iop_CmpLE32U, cc_dep1, cc_dep2));
}
+ if (isU32(cc_op, X86G_CC_OP_SUBL) && isU32(cond, X86CondNBE)) {
+ /* long sub/cmp, then BE (unsigned greater than)
+ --> test !(dst <=3Du src) */
+ return binop(Iop_Xor32,
+ unop(Iop_1Uto32,
+ binop(Iop_CmpLE32U, cc_dep1, cc_dep2)),
+ mkU32(1));
+ }
=20
if (isU32(cc_op, X86G_CC_OP_SUBL) && isU32(cond, X86CondB)) {
/* long sub/cmp, then B (unsigned less than)
@@ -876,14 +890,31 @@
return unop(Iop_1Uto32,
binop(Iop_CmpLT32U, cc_dep1, cc_dep2));
}
+ if (isU32(cc_op, X86G_CC_OP_SUBL) && isU32(cond, X86CondNB)) {
+ /* long sub/cmp, then NB (unsigned greater than or equal)
+ --> test !(dst <u src) */
+ return binop(Iop_Xor32,
+ unop(Iop_1Uto32,
+ binop(Iop_CmpLT32U, cc_dep1, cc_dep2)),
+ mkU32(1));
+ }
=20
if (isU32(cc_op, X86G_CC_OP_SUBL) && isU32(cond, X86CondS)) {
- /* long sub/cmp, then S --> test (dst-src <s 0) */
+ /* long sub/cmp, then S (negative) --> test (dst-src <s 0) */
return unop(Iop_1Uto32,
binop(Iop_CmpLT32S,=20
binop(Iop_Sub32, cc_dep1, cc_dep2),
mkU32(0)));
}
+ if (isU32(cc_op, X86G_CC_OP_SUBL) && isU32(cond, X86CondNS)) {
+ /* long sub/cmp, then NS (not negative) --> test !(dst-src <s 0=
) */
+ return binop(Iop_Xor32,
+ unop(Iop_1Uto32,
+ binop(Iop_CmpLT32S,=20
+ binop(Iop_Sub32, cc_dep1, cc_dep2),
+ mkU32(0))),
+ mkU32(1));
+ }
=20
/*---------------- SUBW ----------------*/
=20
@@ -904,7 +935,6 @@
unop(Iop_32to8,cc_dep1),=20
unop(Iop_32to8,cc_dep2)));
}
-
if (isU32(cc_op, X86G_CC_OP_SUBB) && isU32(cond, X86CondNZ)) {
/* byte sub/cmp, then NZ --> test dst!=3Dsrc */
return unop(Iop_1Uto32,
@@ -944,7 +974,6 @@
/* long and/or/xor, then Z --> test dst=3D=3D0 */
return unop(Iop_1Uto32,binop(Iop_CmpEQ32, cc_dep1, mkU32(0)));
}
-
if (isU32(cc_op, X86G_CC_OP_LOGICL) && isU32(cond, X86CondNZ)) {
/* long and/or/xor, then NZ --> test dst!=3D0 */
return unop(Iop_1Uto32,binop(Iop_CmpNE32, cc_dep1, mkU32(0)));
@@ -1002,17 +1031,6 @@
binop(Iop_Shr32,cc_dep1,mkU8(15)),
mkU32(1));
}
- //Probably correct, but no test case for it yet found
- //if (isU32(cc_op, X86G_CC_OP_LOGICW) && isU32(cond, X86CondNS)) {
- // /* see comment below for (LOGICB, CondNS) */
- // /* word and/or/xor, then S --> (UInt) ~ result[15] */
- // vassert(0+0);
- // return binop(Iop_Xor32,
- // binop(Iop_And32,
- // binop(Iop_Shr32,cc_dep1,mkU8(15)),
- // mkU32(1)),
- // mkU32(1));
- //}
=20
/*---------------- LOGICB ----------------*/
=20
@@ -1022,7 +1040,6 @@
binop(Iop_CmpEQ32, binop(Iop_And32,cc_dep1,mkU32(25=
5)),=20
mkU32(0)));
}
-
if (isU32(cc_op, X86G_CC_OP_LOGICB) && isU32(cond, X86CondNZ)) {
/* byte and/or/xor, then Z --> test dst!=3D0 */
/* b9ac9: 84 c0 test %al,%al
@@ -1100,10 +1117,10 @@
=20
if (isU32(cc_op, X86G_CC_OP_COPY) &&=20
(isU32(cond, X86CondBE) || isU32(cond, X86CondNBE))) {
- /* COPY, then BE --> extract C and Z from dep1, and test (C
- or Z =3D=3D 1). */
- /* COPY, then NBE --> extract C and Z from dep1, and test (C
- or Z =3D=3D 0). */
+ /* COPY, then BE --> extract C and Z from dep1, and test=20
+ (C or Z) =3D=3D 1. */
+ /* COPY, then NBE --> extract C and Z from dep1, and test
+ (C or Z) =3D=3D 0. */
UInt nnn =3D isU32(cond, X86CondBE) ? 1 : 0;
return
unop(
@@ -1124,8 +1141,8 @@
);
}
=20
- if (isU32(cc_op, X86G_CC_OP_COPY) &&=20
- (isU32(cond, X86CondB) || isU32(cond, X86CondNB))) {
+ if (isU32(cc_op, X86G_CC_OP_COPY)=20
+ && (isU32(cond, X86CondB) || isU32(cond, X86CondNB))) {
/* COPY, then B --> extract C from dep1, and test (C =3D=3D 1).=
*/
/* COPY, then NB --> extract C from dep1, and test (C =3D=3D 0)=
. */
UInt nnn =3D isU32(cond, X86CondB) ? 1 : 0;
@@ -1144,36 +1161,42 @@
);
}
=20
- if (isU32(cc_op, X86G_CC_OP_COPY) && isU32(cond, X86CondZ)) {
+ if (isU32(cc_op, X86G_CC_OP_COPY)=20
+ && (isU32(cond, X86CondZ) || isU32(cond, X86CondNZ))) {
/* COPY, then Z --> extract Z from dep1, and test (Z =3D=3D 1).=
*/
+ /* COPY, then NZ --> extract Z from dep1, and test (Z =3D=3D 0)=
. */
+ UInt nnn =3D isU32(cond, X86CondZ) ? 1 : 0;
return
unop(
Iop_1Uto32,
binop(
- Iop_CmpNE32,
+ Iop_CmpEQ32,
binop(
Iop_And32,
binop(Iop_Shr32, cc_dep1, mkU8(X86G_CC_SHIFT_Z)),
mkU32(1)
),
- mkU32(0)
+ mkU32(nnn)
)
);
}
=20
- if (isU32(cc_op, X86G_CC_OP_COPY) && isU32(cond, X86CondP)) {
+ if (isU32(cc_op, X86G_CC_OP_COPY)=20
+ && (isU32(cond, X86CondP) || isU32(cond, X86CondNP))) {
/* COPY, then P --> extract P from dep1, and test (P =3D=3D 1).=
*/
+ /* COPY, then NP --> extract P from dep1, and test (P =3D=3D 0)=
. */
+ UInt nnn =3D isU32(cond, X86CondP) ? 1 : 0;
return
unop(
Iop_1Uto32,
binop(
- Iop_CmpNE32,
+ Iop_CmpEQ32,
binop(
Iop_And32,
binop(Iop_Shr32, cc_dep1, mkU8(X86G_CC_SHIFT_P)),
mkU32(1)
),
- mkU32(0)
+ mkU32(nnn)
)
);
}
@@ -1223,6 +1246,13 @@
mkU32(1)
);
}
+ if (isU32(cc_op, X86G_CC_OP_ADDL)) {
+ /* C after add denotes sum <u either arg */
+ return unop(Iop_1Uto32,
+ binop(Iop_CmpLT32U,=20
+ binop(Iop_Add32, cc_dep1, cc_dep2),=20
+ cc_dep1));
+ }
# if 0
if (cc_op->tag =3D=3D Iex_Const) {
vex_printf("CFLAG "); ppIRExpr(cc_op); vex_printf("\n");
|