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From: <sv...@va...> - 2006-12-26 02:56:26
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Author: sewardj
Date: 2006-12-26 02:56:23 +0000 (Tue, 26 Dec 2006)
New Revision: 6422
Log:
Merge r6211 (Cachegrind: Update cache parameter detection)
Modified:
branches/VALGRIND_3_2_BRANCH/cachegrind/cg-amd64.c
branches/VALGRIND_3_2_BRANCH/cachegrind/cg-x86.c
Modified: branches/VALGRIND_3_2_BRANCH/cachegrind/cg-amd64.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/cachegrind/cg-amd64.c 2006-12-26 02:54:4=
6 UTC (rev 6421)
+++ branches/VALGRIND_3_2_BRANCH/cachegrind/cg-amd64.c 2006-12-26 02:56:2=
3 UTC (rev 6422)
@@ -88,9 +88,10 @@
break;
=20
/* TLB info, ignore */
- case 0x01: case 0x02: case 0x03: case 0x04:
- case 0x50: case 0x51: case 0x52: case 0x5b: case 0x5c: case 0x5d:
- case 0xb0: case 0xb3:
+ case 0x01: case 0x02: case 0x03: case 0x04: case 0x05:
+ case 0x50: case 0x51: case 0x52: case 0x56: case 0x57:
+ case 0x5b: case 0x5c: case 0x5d:
+ case 0xb0: case 0xb1: case 0xb3: case 0xb4:
break; =20
=20
case 0x06: *I1c =3D (cache_t) { 8, 4, 32 }; break;
@@ -107,7 +108,7 @@
case 0x90: case 0x96: case 0x9b:
VG_(tool_panic)("IA-64 cache detected?!");
=20
- case 0x22: case 0x23: case 0x25: case 0x29:=20
+ case 0x22: case 0x23: case 0x25: case 0x29: case 0x46: case 0x47:
VG_(message)(Vg_DebugMsg,=20
"warning: L3 cache detected but ignored\n");
break;
@@ -128,6 +129,7 @@
case 0x43: *L2c =3D (cache_t) { 512, 4, 32 }; L2_found =3D True; =
break;
case 0x44: *L2c =3D (cache_t) { 1024, 4, 32 }; L2_found =3D True; =
break;
case 0x45: *L2c =3D (cache_t) { 2048, 4, 32 }; L2_found =3D True; =
break;
+ case 0x49: *L2c =3D (cache_t) { 4096,16, 64 }; L2_found =3D True; =
break;
=20
/* These are sectored, whatever that means */
case 0x60: *D1c =3D (cache_t) { 16, 8, 64 }; break; /* secto=
red */
@@ -169,6 +171,10 @@
case 0x86: *L2c =3D (cache_t) { 512, 4, 64 }; L2_found =3D True;=
break;
case 0x87: *L2c =3D (cache_t) { 1024, 8, 64 }; L2_found =3D True;=
break;
=20
+ /* Ignore prefetch information */
+ case 0xf0: case 0xf1:
+ break;
+
default:
VG_(message)(Vg_DebugMsg,=20
"warning: Unknown Intel cache config value "
Modified: branches/VALGRIND_3_2_BRANCH/cachegrind/cg-x86.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/cachegrind/cg-x86.c 2006-12-26 02:54:46 =
UTC (rev 6421)
+++ branches/VALGRIND_3_2_BRANCH/cachegrind/cg-x86.c 2006-12-26 02:56:23 =
UTC (rev 6422)
@@ -88,9 +88,10 @@
break;
=20
/* TLB info, ignore */
- case 0x01: case 0x02: case 0x03: case 0x04:
- case 0x50: case 0x51: case 0x52: case 0x5b: case 0x5c: case 0x5d:
- case 0xb0: case 0xb3:
+ case 0x01: case 0x02: case 0x03: case 0x04: case 0x05:
+ case 0x50: case 0x51: case 0x52: case 0x56: case 0x57:
+ case 0x5b: case 0x5c: case 0x5d:
+ case 0xb0: case 0xb1: case 0xb3: case 0xb4:
break; =20
=20
case 0x06: *I1c =3D (cache_t) { 8, 4, 32 }; break;
@@ -107,7 +108,7 @@
case 0x90: case 0x96: case 0x9b:
VG_(tool_panic)("IA-64 cache detected?!");
=20
- case 0x22: case 0x23: case 0x25: case 0x29:=20
+ case 0x22: case 0x23: case 0x25: case 0x29: case 0x46: case 0x47:
VG_(message)(Vg_DebugMsg, "warning: L3 cache detected but igno=
red");
break;
=20
@@ -127,6 +128,7 @@
case 0x43: *L2c =3D (cache_t) { 512, 4, 32 }; L2_found =3D True; =
break;
case 0x44: *L2c =3D (cache_t) { 1024, 4, 32 }; L2_found =3D True; =
break;
case 0x45: *L2c =3D (cache_t) { 2048, 4, 32 }; L2_found =3D True; =
break;
+ case 0x49: *L2c =3D (cache_t) { 4096,16, 64 }; L2_found =3D True; =
break;
=20
/* These are sectored, whatever that means */
case 0x60: *D1c =3D (cache_t) { 16, 8, 64 }; break; /* secto=
red */
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