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From: <sv...@va...> - 2006-05-15 12:23:23
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Author: sewardj
Date: 2006-05-15 13:23:17 +0100 (Mon, 15 May 2006)
New Revision: 1618
Log:
A few more x86 eflags-helper rewrite cases, which further reduce the
false error rate of memcheck on optimised code.
Modified:
trunk/priv/guest-x86/ghelpers.c
Modified: trunk/priv/guest-x86/ghelpers.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-x86/ghelpers.c 2006-05-14 18:46:55 UTC (rev 1617)
+++ trunk/priv/guest-x86/ghelpers.c 2006-05-15 12:23:17 UTC (rev 1618)
@@ -946,6 +946,15 @@
binop(Iop_Shr32,cc_dep1,mkU8(31)),
mkU32(1));
}
+ if (isU32(cc_op, X86G_CC_OP_LOGICL) && isU32(cond, X86CondNS)) {
+ /* see comment below for (LOGICB, CondNS) */
+ /* long and/or/xor, then S --> (UInt) ~ result[31] */
+ return binop(Iop_Xor32,
+ binop(Iop_And32,
+ binop(Iop_Shr32,cc_dep1,mkU8(31)),
+ mkU32(1)),
+ mkU32(1));
+ }
=20
/*---------------- LOGICW ----------------*/
=20
@@ -963,6 +972,17 @@
binop(Iop_Shr32,cc_dep1,mkU8(15)),
mkU32(1));
}
+ //Probably correct, but no test case for it yet found
+ //if (isU32(cc_op, X86G_CC_OP_LOGICW) && isU32(cond, X86CondNS)) {
+ // /* see comment below for (LOGICB, CondNS) */
+ // /* word and/or/xor, then S --> (UInt) ~ result[15] */
+ // vassert(0+0);
+ // return binop(Iop_Xor32,
+ // binop(Iop_And32,
+ // binop(Iop_Shr32,cc_dep1,mkU8(15)),
+ // mkU32(1)),
+ // mkU32(1));
+ //}
=20
/*---------------- LOGICB ----------------*/
=20
@@ -973,6 +993,15 @@
mkU32(0)));
}
=20
+ if (isU32(cc_op, X86G_CC_OP_LOGICB) && isU32(cond, X86CondNZ)) {
+ /* byte and/or/xor, then Z --> test dst!=3D0 */
+ /* b9ac9: 84 c0 test %al,%al
+ b9acb: 75 0d jne b9ada */
+ return unop(Iop_1Uto32,
+ binop(Iop_CmpNE32, binop(Iop_And32,cc_dep1,mkU32(25=
5)),=20
+ mkU32(0)));
+ }
+
if (isU32(cc_op, X86G_CC_OP_LOGICB) && isU32(cond, X86CondS)) {
/* this is an idiom gcc sometimes uses to find out if the top
bit of a byte register is set: eg testb %al,%al; js ..
@@ -985,6 +1014,15 @@
binop(Iop_Shr32,cc_dep1,mkU8(7)),
mkU32(1));
}
+ if (isU32(cc_op, X86G_CC_OP_LOGICB) && isU32(cond, X86CondNS)) {
+ /* ditto, for negation-of-S. */
+ /* byte and/or/xor, then S --> (UInt) ~ result[7] */
+ return binop(Iop_Xor32,
+ binop(Iop_And32,
+ binop(Iop_Shr32,cc_dep1,mkU8(7)),
+ mkU32(1)),
+ mkU32(1));
+ }
=20
/*---------------- DECL ----------------*/
=20
@@ -998,6 +1036,17 @@
return unop(Iop_1Uto32,binop(Iop_CmpLT32S, cc_dep1, mkU32(0)));
}
=20
+ /*---------------- INCW ----------------*/
+
+ if (isU32(cc_op, X86G_CC_OP_INCW) && isU32(cond, X86CondZ)) {
+ /* This rewrite helps memcheck on 'incw %ax ; je ...'. */
+ /* inc W, then Z --> test dst =3D=3D 0 */
+ return unop(Iop_1Uto32,
+ binop(Iop_CmpEQ32,=20
+ binop(Iop_Shl32,cc_dep1,mkU8(16)),
+ mkU32(0)));
+ }
+
/*---------------- SHRL ----------------*/
=20
if (isU32(cc_op, X86G_CC_OP_SHRL) && isU32(cond, X86CondZ)) {
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