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From: <sv...@va...> - 2006-01-20 15:17:23
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Author: sewardj
Date: 2006-01-20 15:17:20 +0000 (Fri, 20 Jan 2006)
New Revision: 5570
Log:
Make amd64 function wrapping work again following recent changes.
Includes expected outputs for wrap8 for the non ppc64-linux case.
Added:
trunk/memcheck/tests/wrap8.stderr.exp2
trunk/memcheck/tests/wrap8.stdout.exp2
Modified:
trunk/include/valgrind.h
trunk/memcheck/tests/Makefile.am
Modified: trunk/include/valgrind.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/include/valgrind.h 2006-01-20 14:31:57 UTC (rev 5569)
+++ trunk/include/valgrind.h 2006-01-20 15:17:20 UTC (rev 5570)
@@ -166,6 +166,13 @@
/* ---------------------------- x86 ---------------------------- */
=20
#if defined(ARCH_x86)
+
+typedef
+ struct {=20
+ unsigned int nraddr; /* where's the code? */
+ }
+ OrigFn;
+
#define __SPECIAL_INSTRUCTION_PREAMBLE \
"roll $3, %%edi ; roll $13, %%edi\n\t" \
"roll $29, %%edi ; roll $19, %%edi\n\t"
@@ -190,8 +197,9 @@
_zzq_rlval =3D _zzq_result; \
}
=20
-#define VALGRIND_GET_NRADDR(_zzq_rlval) \
- { volatile unsigned int __addr; \
+#define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \
+ { volatile OrigFn* _zzq_orig =3D &(_zzq_rlval); \
+ volatile unsigned int __addr; \
__asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
/* %EAX =3D guest_NRADDR */ \
"xchgl %%ecx,%%ecx" \
@@ -199,7 +207,7 @@
: \
: "cc", "memory" \
); \
- _zzq_rlval =3D (void*)__addr; \
+ _zzq_orig->nraddr =3D __addr; \
}
=20
#define VALGRIND_CALL_NOREDIR_EAX \
@@ -211,6 +219,13 @@
/* --------------------------- amd64 --------------------------- */
=20
#if defined(ARCH_amd64)
+
+typedef
+ struct {=20
+ unsigned long long int nraddr; /* where's the code? */
+ }
+ OrigFn;
+
#define __SPECIAL_INSTRUCTION_PREAMBLE \
"rolq $3, %%rdi ; rolq $13, %%rdi\n\t" \
"rolq $61, %%rdi ; rolq $51, %%rdi\n\t"
@@ -235,8 +250,9 @@
_zzq_rlval =3D _zzq_result; \
}
=20
-#define VALGRIND_GET_NRADDR(_zzq_rlval) \
- { volatile unsigned long long int __addr; \
+#define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \
+ { volatile OrigFn* _zzq_orig =3D &(_zzq_rlval); \
+ volatile unsigned long long int __addr; \
__asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
/* %RAX =3D guest_NRADDR */ \
"xchgq %%rcx,%%rcx" \
@@ -244,7 +260,7 @@
: \
: "cc", "memory" \
); \
- _zzq_rlval =3D (void*)__addr; \
+ _zzq_orig->nraddr =3D __addr; \
}
=20
#define VALGRIND_CALL_NOREDIR_RAX \
@@ -259,7 +275,7 @@
=20
typedef
struct {=20
- unsigned long int nraddr; /* where's the code? */
+ unsigned int nraddr; /* where's the code? */
}
OrigFn;
=20
@@ -703,12 +719,12 @@
/* These CALL_FN_ macros assume that on amd64-linux, sizeof(unsigned
long) =3D=3D 8. */
=20
-#define CALL_FN_W_v(lval, fnptr) \
+#define CALL_FN_W_v(lval, orig) \
do { \
- volatile void* _fnptr =3D (fnptr); \
+ volatile OrigFn _orig =3D (orig); \
volatile unsigned long _argvec[1]; \
volatile unsigned long _res; \
- _argvec[0] =3D (unsigned long)_fnptr; \
+ _argvec[0] =3D (unsigned long)_orig.nraddr; \
__asm__ volatile( \
"movq (%%rax), %%rax\n\t" /* target->%rax */ \
VALGRIND_CALL_NOREDIR_RAX \
@@ -719,12 +735,12 @@
lval =3D (__typeof__(lval)) _res; \
} while (0)
=20
-#define CALL_FN_W_W(lval, fnptr, arg1) \
+#define CALL_FN_W_W(lval, orig, arg1) \
do { \
- volatile void* _fnptr =3D (fnptr); \
+ volatile OrigFn _orig =3D (orig); \
volatile unsigned long _argvec[2]; \
volatile unsigned long _res; \
- _argvec[0] =3D (unsigned long)_fnptr; \
+ _argvec[0] =3D (unsigned long)_orig.nraddr; \
_argvec[1] =3D (unsigned long)(arg1); \
__asm__ volatile( \
"movq 8(%%rax), %%rdi\n\t" \
@@ -737,12 +753,12 @@
lval =3D (__typeof__(lval)) _res; \
} while (0)
=20
-#define CALL_FN_W_WW(lval, fnptr, arg1,arg2) \
+#define CALL_FN_W_WW(lval, orig, arg1,arg2) \
do { \
- volatile void* _fnptr =3D (fnptr); \
+ volatile OrigFn _orig =3D (orig); \
volatile unsigned long _argvec[3]; \
volatile unsigned long _res; \
- _argvec[0] =3D (unsigned long)_fnptr; \
+ _argvec[0] =3D (unsigned long)_orig.nraddr; \
_argvec[1] =3D (unsigned long)(arg1); \
_argvec[2] =3D (unsigned long)(arg2); \
__asm__ volatile( \
Modified: trunk/memcheck/tests/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/tests/Makefile.am 2006-01-20 14:31:57 UTC (rev 5569)
+++ trunk/memcheck/tests/Makefile.am 2006-01-20 15:17:20 UTC (rev 5570)
@@ -116,6 +116,7 @@
wrap6.vgtest wrap6.stdout.exp wrap6.stderr.exp \
wrap7.vgtest wrap7.stdout.exp wrap7.stderr.exp \
wrap8.vgtest wrap8.stdout.exp wrap8.stderr.exp \
+ wrap8.stdout.exp2 wrap8.stderr.exp2 \
writev.stderr.exp writev.stderr.exp2 writev.stderr.exp3 writev.vgtest \
xml1.stderr.exp xml1.stderr.exp2 xml1.stderr.exp3 \
xml1.stderr.exp64 xml1.stderr.exp64_2 xml1.stdout.exp \
Added: trunk/memcheck/tests/wrap8.stderr.exp2
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
Added: trunk/memcheck/tests/wrap8.stdout.exp2
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/tests/wrap8.stdout.exp2 (rev 0=
)
+++ trunk/memcheck/tests/wrap8.stdout.exp2 2006-01-20 15:17:20 UTC (rev 5=
570)
@@ -0,0 +1,77 @@
+computing fact1(15)
+in wrapper1-pre: fact(15)
+in wrapper2-pre: fact(14)
+in wrapper1-pre: fact(13)
+in wrapper2-pre: fact(12)
+in wrapper1-pre: fact(11)
+in wrapper2-pre: fact(10)
+in wrapper1-pre: fact(9)
+in wrapper2-pre: fact(8)
+in wrapper1-pre: fact(7)
+in wrapper2-pre: fact(6)
+in wrapper1-pre: fact(5)
+in wrapper2-pre: fact(4)
+in wrapper1-pre: fact(3)
+in wrapper2-pre: fact(2)
+in wrapper1-pre: fact(1)
+in wrapper2-pre: fact(0)
+in wrapper2-post: fact(0) =3D 1
+in wrapper1-post: fact(1) =3D 1
+in wrapper2-post: fact(2) =3D 2
+in wrapper1-post: fact(3) =3D 6
+in wrapper2-pre: fact(2)
+in wrapper1-pre: fact(1)
+in wrapper2-pre: fact(0)
+in wrapper2-post: fact(0) =3D 1
+in wrapper1-post: fact(1) =3D 1
+in wrapper2-post: fact(2) =3D 2
+in wrapper2-post: fact(4) =3D 32
+in wrapper1-post: fact(5) =3D 160
+in wrapper2-pre: fact(2)
+in wrapper1-pre: fact(1)
+in wrapper2-pre: fact(0)
+in wrapper2-post: fact(0) =3D 1
+in wrapper1-post: fact(1) =3D 1
+in wrapper2-post: fact(2) =3D 2
+in wrapper2-post: fact(6) =3D 972
+in wrapper1-post: fact(7) =3D 6804
+in wrapper2-pre: fact(2)
+in wrapper1-pre: fact(1)
+in wrapper2-pre: fact(0)
+in wrapper2-post: fact(0) =3D 1
+in wrapper1-post: fact(1) =3D 1
+in wrapper2-post: fact(2) =3D 2
+in wrapper2-post: fact(8) =3D 54448
+in wrapper1-post: fact(9) =3D 490032
+in wrapper2-pre: fact(2)
+in wrapper1-pre: fact(1)
+in wrapper2-pre: fact(0)
+in wrapper2-post: fact(0) =3D 1
+in wrapper1-post: fact(1) =3D 1
+in wrapper2-post: fact(2) =3D 2
+in wrapper2-post: fact(10) =3D 4900340
+in wrapper1-post: fact(11) =3D 53903740
+in wrapper2-pre: fact(2)
+in wrapper1-pre: fact(1)
+in wrapper2-pre: fact(0)
+in wrapper2-post: fact(0) =3D 1
+in wrapper1-post: fact(1) =3D 1
+in wrapper2-post: fact(2) =3D 2
+in wrapper2-post: fact(12) =3D 646844904
+in wrapper1-post: fact(13) =3D -180950840
+in wrapper2-pre: fact(2)
+in wrapper1-pre: fact(1)
+in wrapper2-pre: fact(0)
+in wrapper2-post: fact(0) =3D 1
+in wrapper1-post: fact(1) =3D 1
+in wrapper2-post: fact(2) =3D 2
+in wrapper2-post: fact(14) =3D 1761655564
+in wrapper1-post: fact(15) =3D 655029684
+in wrapper2-pre: fact(2)
+in wrapper1-pre: fact(1)
+in wrapper2-pre: fact(0)
+in wrapper2-post: fact(0) =3D 1
+in wrapper1-post: fact(1) =3D 1
+in wrapper2-post: fact(2) =3D 2
+fact1(15) =3D 655029686
+allocated 111 Lards
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