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From: <sv...@va...> - 2005-12-30 03:39:24
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Author: sewardj
Date: 2005-12-30 03:39:14 +0000 (Fri, 30 Dec 2005)
New Revision: 1519
Log:
Handle dcbz in 64-bit mode.
Modified:
trunk/priv/guest-ppc/toIR.c
trunk/priv/host-ppc/hdefs.c
Modified: trunk/priv/guest-ppc/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc/toIR.c 2005-12-28 00:54:57 UTC (rev 1518)
+++ trunk/priv/guest-ppc/toIR.c 2005-12-30 03:39:14 UTC (rev 1519)
@@ -5157,10 +5157,7 @@
IRExpr* irx_addr;
UInt i;
DIP("dcbz r%u,r%u\n", rA_addr, rB_addr);
- if (mode64) {
- DIP(" =3D> mode64 not implemented\n");
- return False;
- }
+
assign( EA, ea_rAor0_idxd(rA_addr, rB_addr) );
=20
if (mode64) {
Modified: trunk/priv/host-ppc/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc/hdefs.c 2005-12-28 00:54:57 UTC (rev 1518)
+++ trunk/priv/host-ppc/hdefs.c 2005-12-30 03:39:14 UTC (rev 1519)
@@ -254,25 +254,29 @@
/* Don't waste the reg-allocs's time trawling through zillions of
FP registers - they mostly will never be used. We'll tolerate
the occasional extra spill instead. */
- (*arr)[i++] =3D hregPPC_FPR0();
- (*arr)[i++] =3D hregPPC_FPR1();
- (*arr)[i++] =3D hregPPC_FPR2();
- (*arr)[i++] =3D hregPPC_FPR3();
- (*arr)[i++] =3D hregPPC_FPR4();
- (*arr)[i++] =3D hregPPC_FPR5();
- (*arr)[i++] =3D hregPPC_FPR6();
- (*arr)[i++] =3D hregPPC_FPR7();
+ /* For both ppc32-linux and ppc64-linux, f14-f31 are callee save.
+ So use them. */
+ (*arr)[i++] =3D hregPPC_FPR14();
+ (*arr)[i++] =3D hregPPC_FPR15();
+ (*arr)[i++] =3D hregPPC_FPR16();
+ (*arr)[i++] =3D hregPPC_FPR17();
+ (*arr)[i++] =3D hregPPC_FPR18();
+ (*arr)[i++] =3D hregPPC_FPR19();
+ (*arr)[i++] =3D hregPPC_FPR20();
+ (*arr)[i++] =3D hregPPC_FPR21();
=20
/* Same deal re Altivec */
+ /* For both ppc32-linux and ppc64-linux, v20-v31 are callee save.
+ So use them. */
/* NB, vr29 is used as a scratch temporary -- do not allocate */
- (*arr)[i++] =3D hregPPC_VR0();
- (*arr)[i++] =3D hregPPC_VR1();
- (*arr)[i++] =3D hregPPC_VR2();
- (*arr)[i++] =3D hregPPC_VR3();
- (*arr)[i++] =3D hregPPC_VR4();
- (*arr)[i++] =3D hregPPC_VR5();
- (*arr)[i++] =3D hregPPC_VR6();
- (*arr)[i++] =3D hregPPC_VR7();
+ (*arr)[i++] =3D hregPPC_VR20();
+ (*arr)[i++] =3D hregPPC_VR21();
+ (*arr)[i++] =3D hregPPC_VR22();
+ (*arr)[i++] =3D hregPPC_VR23();
+ (*arr)[i++] =3D hregPPC_VR24();
+ (*arr)[i++] =3D hregPPC_VR25();
+ (*arr)[i++] =3D hregPPC_VR26();
+ (*arr)[i++] =3D hregPPC_VR27();
=20
vassert(i =3D=3D *nregs);
}
@@ -1686,6 +1690,10 @@
mode32: r3 to r12
mode64: r3 to r10
*/
+ /* XXXXXXXXXXXXXXXXX BUG! This doesn't say anything about the FP
+ or Altivec registers. We get away with this ONLY because
+ getAllocatableRegs_PPC gives the allocator callee-saved fp
+ and Altivec regs, and no caller-save ones. */
addHRegUse(u, HRmWrite, hregPPC_GPR3(mode64));
addHRegUse(u, HRmWrite, hregPPC_GPR4(mode64));
addHRegUse(u, HRmWrite, hregPPC_GPR5(mode64));
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