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From: <sv...@va...> - 2005-12-26 19:34:01
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Author: sewardj
Date: 2005-12-26 19:33:55 +0000 (Mon, 26 Dec 2005)
New Revision: 1513
Log:
Performance improvements for flag handling.
Modified:
trunk/priv/guest-amd64/ghelpers.c
trunk/priv/host-amd64/isel.c
Modified: trunk/priv/guest-amd64/ghelpers.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-amd64/ghelpers.c 2005-12-26 19:33:24 UTC (rev 1512)
+++ trunk/priv/guest-amd64/ghelpers.c 2005-12-26 19:33:55 UTC (rev 1513)
@@ -899,6 +899,18 @@
=20
/*---------------- SUBQ ----------------*/
=20
+ if (isU64(cc_op, AMD64G_CC_OP_SUBQ) && isU64(cond, AMD64CondZ)) {
+ /* long long sub/cmp, then Z --> test dst=3D=3Dsrc */
+ return unop(Iop_1Uto64,
+ binop(Iop_CmpEQ64,cc_dep1,cc_dep2));
+ }
+
+ if (isU64(cc_op, AMD64G_CC_OP_SUBQ) && isU64(cond, AMD64CondNZ)) {
+ /* long long sub/cmp, then NZ --> test dst!=3Dsrc */
+ return unop(Iop_1Uto64,
+ binop(Iop_CmpNE64,cc_dep1,cc_dep2));
+ }
+
if (isU64(cc_op, AMD64G_CC_OP_SUBQ) && isU64(cond, AMD64CondL)) {
/* long long sub/cmp, then L (signed less than)=20
--> test dst <s src */
@@ -913,16 +925,39 @@
binop(Iop_CmpLT64U, cc_dep1, cc_dep2));
}
=20
+ if (isU64(cc_op, AMD64G_CC_OP_SUBQ) && isU64(cond, AMD64CondNB)) {
+ /* long long sub/cmp, then NB (unsigned greater than or equal)
+ --> test src <=3Du dst */
+ /* Note, args are opposite way round from the usual */
+ return unop(Iop_1Uto64,
+ binop(Iop_CmpLE64U, cc_dep2, cc_dep1));
+ }
+
+ if (isU64(cc_op, AMD64G_CC_OP_SUBQ) && isU64(cond, AMD64CondBE)) {
+ /* long long sub/cmp, then BE (unsigned less than or equal)
+ --> test dst <=3Du src */
+ return unop(Iop_1Uto64,
+ binop(Iop_CmpLE64U, cc_dep1, cc_dep2));
+ }
+
/*---------------- SUBL ----------------*/
=20
if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondZ)) {
/* long sub/cmp, then Z --> test dst=3D=3Dsrc */
return unop(Iop_1Uto64,
- binop(Iop_CmpEQ32,=20
- unop(Iop_64to32,cc_dep1),=20
- unop(Iop_64to32,cc_dep2)));
+ binop(Iop_CmpEQ64,=20
+ binop(Iop_Shl64,cc_dep1,mkU8(32)),
+ binop(Iop_Shl64,cc_dep2,mkU8(32))));
}
=20
+ if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondNZ)) {
+ /* long sub/cmp, then NZ --> test dst!=3Dsrc */
+ return unop(Iop_1Uto64,
+ binop(Iop_CmpNE64,=20
+ binop(Iop_Shl64,cc_dep1,mkU8(32)),
+ binop(Iop_Shl64,cc_dep2,mkU8(32))));
+ }
+
//.. if (isU32(cc_op, AMD64G_CC_OP_SUBL) && isU32(cond, X86CondNZ)=
) {
//.. /* long sub/cmp, then NZ --> test dst!=3Dsrc */
//.. return unop(Iop_1Uto32,
@@ -936,7 +971,6 @@
binop(Iop_CmpLT64S,=20
binop(Iop_Shl64,cc_dep1,mkU8(32)),
binop(Iop_Shl64,cc_dep2,mkU8(32))));
-
}
=20
if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondLE)) {
@@ -949,14 +983,15 @@
=20
}
=20
+ if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondBE)) {
+ /* long sub/cmp, then BE (unsigned less than or equal)
+ --> test dst <=3Du src */
+ return unop(Iop_1Uto64,
+ binop(Iop_CmpLE64U,=20
+ binop(Iop_Shl64,cc_dep1,mkU8(32)),
+ binop(Iop_Shl64,cc_dep2,mkU8(32))));
+ }
=20
-//.. if (isU32(cc_op, AMD64G_CC_OP_SUBL) && isU32(cond, X86CondBE)=
) {
-//.. /* long sub/cmp, then BE (unsigned less than or equal)
-//.. --> test dst <=3Du src */
-//.. return unop(Iop_1Uto32,
-//.. binop(Iop_CmpLE32U, cc_dep1, cc_dep2));
-//.. }
-//..=20
//.. if (isU32(cc_op, AMD64G_CC_OP_SUBL) && isU32(cond, X86CondB))=
{
//.. /* long sub/cmp, then B (unsigned less than)
//.. --> test dst <u src */
@@ -1005,7 +1040,7 @@
=20
//.. if (isU32(cc_op, AMD64G_CC_OP_SUBB) && isU32(cond, X86CondNBE=
)) {
//.. /* long sub/cmp, then NBE (unsigned greater than)
-//.. --> test src <=3Du dst */
+//.. --> test src <u dst */
//.. /* Note, args are opposite way round from the usual */
//.. return unop(Iop_1Uto32,
//.. binop(Iop_CmpLT32U,=20
Modified: trunk/priv/host-amd64/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/isel.c 2005-12-26 19:33:24 UTC (rev 1512)
+++ trunk/priv/host-amd64/isel.c 2005-12-26 19:33:55 UTC (rev 1513)
@@ -2115,7 +2115,7 @@
|| e->Iex.Binop.op =3D=3D Iop_CmpLT64S
|| e->Iex.Binop.op =3D=3D Iop_CmpLT64U
|| e->Iex.Binop.op =3D=3D Iop_CmpLE64S
- //|| e->Iex.Binop.op =3D=3D Iop_CmpLE64U
+ || e->Iex.Binop.op =3D=3D Iop_CmpLE64U
)) {
HReg r1 =3D iselIntExpr_R(env, e->Iex.Binop.arg1);
AMD64RMI* rmi2 =3D iselIntExpr_RMI(env, e->Iex.Binop.arg2);
@@ -2126,7 +2126,7 @@
case Iop_CmpLT64S: return Acc_L;
case Iop_CmpLT64U: return Acc_B;
case Iop_CmpLE64S: return Acc_LE;
- //case Iop_CmpLE64U: return Acc_BE;
+ case Iop_CmpLE64U: return Acc_BE;
default: vpanic("iselCondCode(amd64): CmpXX64");
}
}
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