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From: <sv...@va...> - 2005-12-16 01:08:26
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Author: sewardj
Date: 2005-12-16 01:08:22 +0000 (Fri, 16 Dec 2005)
New Revision: 5358
Log:
Hold the event count in r29 rather than the count register, since the
former doesn't need to be spilled and reloaded for every bb run.
Modified:
trunk/coregrind/m_dispatch/dispatch-ppc32-linux.S
Modified: trunk/coregrind/m_dispatch/dispatch-ppc32-linux.S
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_dispatch/dispatch-ppc32-linux.S 2005-12-16 01:07:11=
UTC (rev 5357)
+++ trunk/coregrind/m_dispatch/dispatch-ppc32-linux.S 2005-12-16 01:08:22=
UTC (rev 5358)
@@ -183,10 +183,9 @@
/* CAB TODO: Use a caller-saved reg for orig guest_state ptr
- rem to set non-allocateable in isel.c */
=20
- /* hold dispatch_ctr in ctr reg */
+ /* hold dispatch_ctr in r29 */
lis 5,VG_(dispatch_ctr)@ha
- lwz 5,VG_(dispatch_ctr)@l(5)
- mtctr 5
+ lwz 29,VG_(dispatch_ctr)@l(5)
=20
/* set host FPU control word to the default mode expected=20
by VEX-generated code. See comments in libvex.h for
@@ -240,8 +239,8 @@
/* At entry: Live regs:
r1 (=3Dsp)
r3 (=3DCIA =3D next guest address)
+ r29 (=3Ddispatch_ctr)
r31 (=3Dguest_state)
- ctr (=3Ddispatch_ctr)
Stack state:
44(r1) (=3Dorig guest_state)
*/
@@ -255,7 +254,10 @@
stw 3,OFFSET_ppc32_CIA(31)
=20
/* Are we out of timeslice? If yes, defer to scheduler. */
- bdz counter_is_zero /* decrements ctr reg */
+// addic. 29,29,-1
+ addi 29,29,-1
+ cmplwi 29,0
+ beq counter_is_zero
=20
/* try a fast lookup in the translation cache */
/* r4=3D((r30<<2) & (VG_TT_FAST_MASK<<2)) */
@@ -271,17 +273,9 @@
addi 8,5,8
mtlr 8
=20
- /* stop ctr being clobbered */
- mfctr 5
- stw 5,40(1) /* =3D> 40-16 =3D 24(1) on our parent stack */
-
/* run the translation */
blrl
=20
- /* reinstate clobbered ctr */
- lwz 5,40(1)
- mtctr 5
-
/* start over */
b VG_(run_innerloop__dispatch_unprofiled)
/*NOTREACHED*/
@@ -295,8 +289,8 @@
/* At entry: Live regs:
r1 (=3Dsp)
r3 (=3DCIA =3D next guest address)
+ r29 (=3Ddispatch_ctr)
r31 (=3Dguest_state)
- ctr (=3Ddispatch_ctr)
Stack state:
44(r1) (=3Dorig guest_state)
*/
@@ -310,7 +304,8 @@
stw 3,OFFSET_ppc32_CIA(31)
=20
/* Are we out of timeslice? If yes, defer to scheduler. */
- bdz counter_is_zero /* decrements ctr reg */
+ addic. 29,29,-1
+ beq counter_is_zero
=20
/* try a fast lookup in the translation cache */
/* r4=3D((r30<<2) & (VG_TT_FAST_MASK<<2)) */
@@ -333,17 +328,9 @@
addi 8,5,8
mtlr 8
=20
- /* stop ctr being clobbered */
- mfctr 5
- stw 5,40(1) /* =3D> 40-16 =3D 24(1) on our parent stack */
-
/* run the translation */
blrl
=20
- /* reinstate clobbered ctr */
- lwz 5,40(1)
- mtctr 5
-
/* start over */
b VG_(run_innerloop__dispatch_profiled)
/*NOTREACHED*/
@@ -369,18 +356,14 @@
counter_is_zero:
/* %CIA is up to date */
/* back out decrement of the dispatch counter */
- mfctr 5
- addi 5,5,1
- mtctr 5
+ addi 29,29,1
li 3,VG_TRC_INNER_COUNTERZERO
b run_innerloop_exit
=20
fast_lookup_failed:
/* %CIA is up to date */
/* back out decrement of the dispatch counter */
- mfctr 5
- addi 5,5,1
- mtctr 5
+ addi 29,29,1
li 3,VG_TRC_INNER_FASTMISS
b run_innerloop_exit
=20
@@ -447,9 +430,8 @@
addi 1,1,16
=20
/* Write ctr to VG(dispatch_ctr) */
- mfctr 17
- lis 18,VG_(dispatch_ctr)@ha
- stw 17,VG_(dispatch_ctr)@l(18)
+ lis 5,VG_(dispatch_ctr)@ha
+ stw 29,VG_(dispatch_ctr)@l(5)
=20
/* Restore cr */
lwz 0,44(1)
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