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From: <sv...@va...> - 2005-12-15 15:45:27
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Author: sewardj
Date: 2005-12-15 15:45:20 +0000 (Thu, 15 Dec 2005)
New Revision: 1495
Log:
Modify amd64 backend to use jump-jump scheme rather than call-return
scheme.
Modified:
trunk/priv/host-amd64/hdefs.c
trunk/priv/host-amd64/hdefs.h
trunk/priv/host-x86/hdefs.c
trunk/priv/main/vex_main.c
Modified: trunk/priv/host-amd64/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/hdefs.c 2005-12-15 14:02:34 UTC (rev 1494)
+++ trunk/priv/host-amd64/hdefs.c 2005-12-15 15:45:20 UTC (rev 1495)
@@ -1091,14 +1091,16 @@
vex_printf("if (%%rflags.%s) { ",=20
showAMD64CondCode(i->Ain.Goto.cond));
}
- if (i->Ain.Goto.jk !=3D Ijk_Boring) {
+ if (i->Ain.Goto.jk !=3D Ijk_Boring
+ && i->Ain.Goto.jk !=3D Ijk_Call
+ && i->Ain.Goto.jk !=3D Ijk_Ret) {
vex_printf("movl $");
ppIRJumpKind(i->Ain.Goto.jk);
vex_printf(",%%ebp ; ");
}
vex_printf("movq ");
ppAMD64RI(i->Ain.Goto.dst);
- vex_printf(",%%rax ; ret");
+ vex_printf(",%%rax ; movabsq $dispatcher_addr,%%rdx ; jmp *%%rd=
x");
if (i->Ain.Goto.cond !=3D Acc_ALWAYS) {
vex_printf(" }");
}
@@ -1447,8 +1449,13 @@
return;
case Ain_Goto:
addRegUsage_AMD64RI(u, i->Ain.Goto.dst);
- addHRegUse(u, HRmWrite, hregAMD64_RAX());
- if (i->Ain.Goto.jk !=3D Ijk_Boring)
+ addHRegUse(u, HRmWrite, hregAMD64_RAX()); /* used for next gues=
t addr */
+ addHRegUse(u, HRmWrite, hregAMD64_RDX()); /* used for dispatche=
r addr */
+ if (i->Ain.Goto.jk !=3D Ijk_Boring
+ && i->Ain.Goto.jk !=3D Ijk_Call
+ && i->Ain.Goto.jk !=3D Ijk_Ret)
+ /* note, this is irrelevant since rbp is not actually
+ available to the allocator. But still .. */
addHRegUse(u, HRmWrite, hregAMD64_RBP());
return;
case Ain_CMov64:
@@ -2200,7 +2207,8 @@
Note that buf is not the insn's final place, and therefore it is
imperative to emit position-independent code. */
=20
-Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64Instr* i, Bool mode64 )
+Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64Instr* i,=20
+ Bool mode64, void* dispatch )
{
UInt /*irno,*/ opc, opc_rr, subopc_imm, opc_imma, opc_cl, opc_imm, su=
bopc;
UInt xtra;
@@ -2638,13 +2646,24 @@
}
}
=20
- /* ret */
- *p++ =3D 0xC3;
+ /* Get the dispatcher address into %rdx. This has to happen
+ after the load of %rax since %rdx might be carrying the value
+ destined for %rax immediately prior to this Ain_Goto. */
+ vassert(sizeof(ULong) =3D=3D sizeof(void*));
+ vassert(dispatch !=3D NULL);
+ /* movabsq $imm64, %rdx */
+ *p++ =3D 0x48;
+ *p++ =3D 0xBA;
+ p =3D emit64(p, Ptr_to_ULong(dispatch));
=20
+ /* jmp *%rdx */
+ *p++ =3D 0xFF;
+ *p++ =3D 0xE2;
+
/* Fix up the conditional jump, if there was one. */
if (i->Ain.Goto.cond !=3D Acc_ALWAYS) {
Int delta =3D p - ptmp;
- vassert(delta > 0 && delta < 20);
+ vassert(delta > 0 && delta < 30);
*ptmp =3D toUChar(delta-1);
}
goto done;
Modified: trunk/priv/host-amd64/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/hdefs.h 2005-12-15 14:02:34 UTC (rev 1494)
+++ trunk/priv/host-amd64/hdefs.h 2005-12-15 15:45:20 UTC (rev 1495)
@@ -715,7 +715,8 @@
extern void getRegUsage_AMD64Instr ( HRegUsage*, AMD64Instr*, Bo=
ol );
extern void mapRegs_AMD64Instr ( HRegRemap*, AMD64Instr*, Bo=
ol );
extern Bool isMove_AMD64Instr ( AMD64Instr*, HReg*, HReg* )=
;
-extern Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64=
Instr*, Bool );
+extern Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64=
Instr*,=20
+ Bool, void* dispatch );
extern AMD64Instr* genSpill_AMD64 ( HReg rreg, Int offset, Bool=
);
extern AMD64Instr* genReload_AMD64 ( HReg rreg, Int offset, Bool=
);
extern void getAllocableRegs_AMD64 ( Int*, HReg** );
Modified: trunk/priv/host-x86/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-x86/hdefs.c 2005-12-15 14:02:34 UTC (rev 1494)
+++ trunk/priv/host-x86/hdefs.c 2005-12-15 15:45:20 UTC (rev 1495)
@@ -2212,7 +2212,7 @@
vassert(dispatch !=3D NULL);
/* movl $imm32, %edx */
*p++ =3D 0xBA;
- p =3D emit32(p, (UInt)dispatch);
+ p =3D emit32(p, (UInt)Ptr_to_ULong(dispatch));
=20
/* jmp *%edx */
*p++ =3D 0xFF;
Modified: trunk/priv/main/vex_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/main/vex_main.c 2005-12-15 14:02:34 UTC (rev 1494)
+++ trunk/priv/main/vex_main.c 2005-12-15 15:45:20 UTC (rev 1495)
@@ -250,7 +250,7 @@
ppInstr =3D (void(*)(HInstr*, Bool)) ppX86Instr;
ppReg =3D (void(*)(HReg)) ppHRegX86;
iselBB =3D iselBB_X86;
- emit =3D emit_X86Instr;
+ emit =3D (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_X8=
6Instr;
host_is_bigendian =3D False;
host_word_type =3D Ity_I32;
vassert(vta->archinfo_host.subarch =3D=3D VexSubArchX86_sse0
@@ -271,7 +271,7 @@
ppInstr =3D (void(*)(HInstr*, Bool)) ppAMD64Instr;
ppReg =3D (void(*)(HReg)) ppHRegAMD64;
iselBB =3D iselBB_AMD64;
- emit =3D (Int(*)(UChar*,Int,HInstr*, Bool)) emit_AMD64In=
str;
+ emit =3D (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_AM=
D64Instr;
host_is_bigendian =3D False;
host_word_type =3D Ity_I64;
vassert(vta->archinfo_host.subarch =3D=3D VexSubArch_NONE);
@@ -290,7 +290,7 @@
ppInstr =3D (void(*)(HInstr*,Bool)) ppPPC32Instr;
ppReg =3D (void(*)(HReg)) ppHRegPPC32;
iselBB =3D iselBB_PPC32;
- emit =3D (Int(*)(UChar*,Int,HInstr*,Bool)) emit_PPC32Ins=
tr;
+ emit =3D (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_PP=
C32Instr;
host_is_bigendian =3D True;
host_word_type =3D Ity_I32;
vassert(vta->archinfo_guest.subarch =3D=3D VexSubArchPPC32_I
@@ -311,7 +311,7 @@
ppInstr =3D (void(*)(HInstr*, Bool)) ppPPC32Instr;
ppReg =3D (void(*)(HReg)) ppHRegPPC32;
iselBB =3D iselBB_PPC32;
- emit =3D (Int(*)(UChar*,Int,HInstr*, Bool)) emit_PPC32In=
str;
+ emit =3D (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_PP=
C32Instr;
host_is_bigendian =3D True;
host_word_type =3D Ity_I64;
vassert(vta->archinfo_guest.subarch =3D=3D VexSubArchPPC64_FI
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