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From: <sv...@va...> - 2005-09-13 16:47:03
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Author: cerion
Date: 2005-09-13 17:47:00 +0100 (Tue, 13 Sep 2005)
New Revision: 4641
Log:
Rename VG_(have_altivec) =3D> VG_(have_altivec_ppc) for consistency.
Modified:
trunk/coregrind/m_dispatch/dispatch-ppc32.S
trunk/coregrind/m_machine.c
trunk/coregrind/m_main.c
trunk/coregrind/m_translate.c
trunk/coregrind/pub_core_machine.h
Modified: trunk/coregrind/m_dispatch/dispatch-ppc32.S
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_dispatch/dispatch-ppc32.S 2005-09-13 13:30:38 UTC (=
rev 4640)
+++ trunk/coregrind/m_dispatch/dispatch-ppc32.S 2005-09-13 16:47:00 UTC (=
rev 4641)
@@ -92,8 +92,8 @@
=20
/* set host AltiVec control word to the default mode expected=20
by VEX-generated code. */
- lis 3,VG_(have_altivec)@ha
- lwz 3,VG_(have_altivec)@l(3)
+ lis 3,VG_(have_altivec_ppc)@ha
+ lwz 3,VG_(have_altivec_ppc)@l(3)
cmplwi 3,0
beq L1
/* generate vector {0x0,0x0,0x0,0x00010000} */
Modified: trunk/coregrind/m_machine.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_machine.c 2005-09-13 13:30:38 UTC (rev 4640)
+++ trunk/coregrind/m_machine.c 2005-09-13 16:47:00 UTC (rev 4641)
@@ -220,7 +220,7 @@
// not-yet-set.
Int VG_(cache_line_size_ppc32) =3D 0;
// Altivec enabled? Harvested on startup from the AT_HWCAP entry
-Int VG_(have_altivec) =3D 0;
+Int VG_(have_altivec_ppc) =3D 0;
#endif
=20
// X86: set to 1 if the host is able to do {ld,st}mxcsr (load/store
Modified: trunk/coregrind/m_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_main.c 2005-09-13 13:30:38 UTC (rev 4640)
+++ trunk/coregrind/m_main.c 2005-09-13 16:47:00 UTC (rev 4641)
@@ -183,8 +183,8 @@
case AT_HWCAP:
VG_(debugLog)(1, "main", "PPC32 hwcaps: 0x%x\n", (UInt)auxv->u.=
a_val);
if ((auxv->u.a_val & 0x10000000) > 0)
- VG_(have_altivec) =3D 1;
- VG_(debugLog)(1, "main", "PPC32 AltiVec support: %u\n", VG_(hav=
e_altivec));
+ VG_(have_altivec_ppc) =3D 1;
+ VG_(debugLog)(1, "main", "PPC32 AltiVec support: %u\n", VG_(hav=
e_altivec_ppc));
break;
# endif
=20
Modified: trunk/coregrind/m_translate.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_translate.c 2005-09-13 13:30:38 UTC (rev 4640)
+++ trunk/coregrind/m_translate.c 2005-09-13 16:47:00 UTC (rev 4641)
@@ -34,7 +34,7 @@
#include "pub_core_aspacemgr.h"
#include "pub_core_cpuid.h"
#include "pub_core_machine.h" // For VG_(cache_line_size_ppc32)
- // and VG_(have_altivec)
+ // and VG_(have_altivec_ppc)
// and VG_(get_SP)
// and VG_(have_mxcsr_x86)
#include "pub_core_libcbase.h"
@@ -113,8 +113,8 @@
=20
#elif defined(VGA_ppc32)
*vex_arch =3D VexArchPPC32;
- vai->subarch =3D VG_(have_altivec) ? VexSubArchPPC32_AV
- : VexSubArchPPC32_noAV;
+ vai->subarch =3D VG_(have_altivec_ppc) ? VexSubArchPPC32_AV
+ : VexSubArchPPC32_noAV;
vai->ppc32_cache_line_szB =3D VG_(cache_line_size_ppc32);
return True;
=20
Modified: trunk/coregrind/pub_core_machine.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/pub_core_machine.h 2005-09-13 13:30:38 UTC (rev 4640)
+++ trunk/coregrind/pub_core_machine.h 2005-09-13 16:47:00 UTC (rev 4641)
@@ -84,7 +84,7 @@
// entries.
extern Int VG_(cache_line_size_ppc32);
// Altivec enabled? Harvested on startup from the AT_HWCAP entry
-extern Int VG_(have_altivec);
+extern Int VG_(have_altivec_ppc);
#endif
=20
// X86: set to 1 if the host is able to do {ld,st}mxcsr (load/store
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