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From: <sv...@va...> - 2005-08-24 17:31:26
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Author: sewardj
Date: 2005-08-24 18:31:24 +0100 (Wed, 24 Aug 2005)
New Revision: 1356
Log:
Merge r1349 (amd64 LOOPE/LOOPNE implementation)
Modified:
branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c
Modified: branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c 2005-08-24 17:28:27 U=
TC (rev 1355)
+++ branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c 2005-08-24 17:31:24 U=
TC (rev 1356)
@@ -1302,9 +1302,19 @@
return IRExpr_Const(IRConst_V128(mask));
}
=20
+static IRExpr* mkAnd1 ( IRExpr* x, IRExpr* y )
+{
+ vassert(typeOfIRExpr(irbb->tyenv,x) =3D=3D Ity_I1);
+ vassert(typeOfIRExpr(irbb->tyenv,y) =3D=3D Ity_I1);
+ return unop(Iop_64to1,=20
+ binop(Iop_And64,=20
+ unop(Iop_1Uto64,x),=20
+ unop(Iop_1Uto64,y)));
+}
=20
+
/*------------------------------------------------------------*/
-/*--- Helpers for %eflags. ---*/
+/*--- Helpers for %rflags. ---*/
/*------------------------------------------------------------*/
=20
/* -------------- Evaluating the flags-thunk. -------------- */
@@ -11575,45 +11585,47 @@
//..=20
//.. DIP("j%sz 0x%x\n", nameIReg(sz, R_ECX), d32);
//.. break;
-//..=20
-//.. //-- case 0xE0: /* LOOPNE disp8 */
-//.. //-- case 0xE1: /* LOOPE disp8 */
- case 0xE2: /* LOOP disp8 */
- /* The docs say this uses RCX/ECX as a count depending on
- the address size override, not the operand one. Since we
- don't handle address size overrides, I guess that means
- RCX. */
- if (!haveF3(pfx) && !haveF2(pfx) && !have66(pfx) && !haveASO(pfx))=
{
- /* RCX--; if (RCX !=3D 0) goto d64; */
- d64 =3D guest_RIP_curr_instr + getSDisp8(delta) + 2; delta++;
- DIP("loop 0x%llx\n", (ULong)d64);
- putIReg64(R_RCX, binop(Iop_Sub64, getIReg64(R_RCX), mkU64(1)) )=
;
- stmt( IRStmt_Exit(=20
- binop(Iop_CmpNE64,getIReg64(R_RCX),mkU64(0)),=20
- Ijk_Boring,=20
- IRConst_U64(d64)=20
- ));
- dres.whatNext =3D Dis_StopHere;
- irbb->next =3D mkU64(guest_RIP_curr_instr + 2);
- irbb->jumpkind =3D Ijk_Boring;
- break;
+
+ case 0xE0: /* LOOPNE disp8: decrement count, jump if count !=3D 0 && =
ZF=3D=3D0 */
+ case 0xE1: /* LOOPE disp8: decrement count, jump if count !=3D 0 && =
ZF=3D=3D1 */
+ case 0xE2: /* LOOP disp8: decrement count, jump if count !=3D 0 */
+ { /* The docs say this uses rCX as a count depending on the
+ address size override, not the operand one. Since we don't
+ handle address size overrides, I guess that means RCX. */
+ IRExpr* zbit =3D NULL;
+ IRExpr* count =3D NULL;
+ IRExpr* cond =3D NULL;
+ HChar* xtra =3D NULL;
+
+ if (have66orF2orF3(pfx) || haveASO(pfx)) goto decode_failure;
+ d64 =3D guest_RIP_bbstart+delta+1 + getSDisp8(delta);
+ delta++;
+ putIReg64(R_RCX, binop(Iop_Sub64, getIReg64(R_RCX), mkU64(1)));
+
+ count =3D getIReg64(R_RCX);
+ cond =3D binop(Iop_CmpNE64, count, mkU64(0));
+ switch (opc) {
+ case 0xE2:=20
+ xtra =3D "";=20
+ break;
+ case 0xE1:=20
+ xtra =3D "e";=20
+ zbit =3D mk_amd64g_calculate_condition( AMD64CondZ );
+ cond =3D mkAnd1(cond, zbit);
+ break;
+ case 0xE0:=20
+ xtra =3D "ne";
+ zbit =3D mk_amd64g_calculate_condition( AMD64CondNZ );
+ cond =3D mkAnd1(cond, zbit);
+ break;
+ default:
+ vassert(0);
}
- goto decode_failure;
+ stmt( IRStmt_Exit(cond, Ijk_Boring, IRConst_U64(d64)) );
=20
-//.. //-- d32 =3D (eip+1) + getSDisp8(eip); eip++;
-//.. //-- t1 =3D newTemp(cb);
-//.. //-- uInstr2(cb, GET, 4, ArchReg, R_ECX, TempReg, t1);
-//.. //-- uInstr1(cb, DEC, 4, TempReg, t1);
-//.. //-- uInstr2(cb, PUT, 4, TempReg, t1, ArchReg, R_ECX);
-//.. //-- uInstr2(cb, JIFZ, 4, TempReg, t1, Literal, 0);
-//.. //-- uLiteral(cb, eip);
-//.. //-- if (opc =3D=3D 0xE0 || opc =3D=3D 0xE1) { /* LOOPE/LOO=
PNE */
-//.. //-- jcc_lit(cb, eip, (opc =3D=3D 0xE1 ? CondNZ : CondZ));
-//.. //-- }
-//.. //-- jmp_lit(cb, d32);
-//.. //-- whatNext =3D Dis_StopHere;
-//.. //-- DIP("loop 0x%x\n", d32);
-//.. //-- break;
+ DIP("loop%s 0x%llx\n", xtra, d64);
+ break;
+ }
=20
/* ------------------------ IMUL ----------------------- */
=20
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