|
From: <sv...@va...> - 2005-07-21 21:34:31
|
Author: sewardj
Date: 2005-07-21 22:33:57 +0100 (Thu, 21 Jul 2005)
New Revision: 1288
Log:
Reinstate rlwnm and change ROTL32 back to what it looked like before I
messed it up :-)
Modified:
trunk/priv/guest-ppc32/toIR.c
Modified: trunk/priv/guest-ppc32/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/toIR.c 2005-07-21 17:07:18 UTC (rev 1287)
+++ trunk/priv/guest-ppc32/toIR.c 2005-07-21 21:33:57 UTC (rev 1288)
@@ -649,24 +649,34 @@
}
=20
// ROTL(src32, rot_amt5)
-static IRExpr* ROTL32 ( IRExpr* src, Int rot_amt )
+static IRExpr* ROTL32 ( IRExpr* src, IRExpr* rot_amt )
{
+ IRExpr* masked;
vassert(typeOfIRExpr(irbb->tyenv,src) =3D=3D Ity_I32);
- vassert(rot_amt >=3D 0 && rot_amt < 32); =20
+ vassert(typeOfIRExpr(irbb->tyenv,rot_amt) =3D=3D Ity_I32);
=20
- if (rot_amt =3D=3D 0)
- return src;
+ masked=20
+ =3D unop(Iop_32to8, binop(Iop_And32, rot_amt, mkU32(31)));
=20
- vassert(rot_amt > 0 && rot_amt < 32); =20
-
// (src << rot_amt) | (src >> (32-rot_amt))
- return binop(Iop_Or32,
- binop(Iop_Shl32, src, mkU8(rot_amt)),
- binop(Iop_Shr32, src, mkU8(32-rot_amt)));
+ /* Note: the MuxOX is not merely an optimisation; it's needed
+ because otherwise the Shr32 is a shift by the word size when
+ masked denotes zero. For rotates by immediates, a lot of
+ this junk gets folded out. */
+ return=20
+ IRExpr_Mux0X(=20
+ masked,
+ /* zero rotate. */
+ src,
+ /* non-zero rotate */
+ binop( Iop_Or32,
+ binop(Iop_Shl32, src, masked),
+ binop(Iop_Shr32, src, binop(Iop_Sub8, mkU8(32), masked))
+ )
+ );
}
=20
=20
-
/*------------------------------------------------------------*/
/*--- Helpers for condition codes. ---*/
/*------------------------------------------------------------*/
@@ -2181,7 +2191,6 @@
UChar flag_Rc =3D toUChar((theInstr >> 0) & 1); /* theInstr[0] =
*/
=20
UInt mask =3D MASK(31-MaskEnd, 31-MaskBegin);
- IRTemp rot_amt =3D newTemp(Ity_I8);
IRTemp Rs =3D newTemp(Ity_I32);
IRTemp Ra =3D newTemp(Ity_I32);
IRTemp Rb =3D newTemp(Ity_I32);
@@ -2190,33 +2199,35 @@
assign( Rb, getIReg(Rb_addr) );
=20
switch (opc1) {
- case 0x14: // rlwimi (Rotate Left Word Immediate then Mask Insert, PP=
C32 p500)
+ case 0x14:=20
+ // rlwimi (Rotate Left Word Immediate then Mask Insert, PPC32 p500=
)
DIP("rlwimi%s r%d,r%d,%d,%d,%d\n", flag_Rc ? "." : "",
Ra_addr, Rs_addr, sh_imm, MaskBegin, MaskEnd);
// Ra =3D (ROTL(Rs, Imm) & mask) | (Ra & ~mask);
assign( Ra, binop(Iop_Or32,
binop(Iop_And32, mkU32(mask),
- ROTL32(mkexpr(Rs), sh_imm)),
+ ROTL32(mkexpr(Rs), mkU32(sh_imm))),
binop(Iop_And32, getIReg(Ra_addr), mkU32(~mask))=
) );
break;
=20
- case 0x15: // rlwinm (Rotate Left Word Immediate then AND with Mask, =
PPC32 p501)
+ case 0x15:=20
+ // rlwinm (Rotate Left Word Immediate then AND with Mask, PPC32 p5=
01)
DIP("rlwinm%s r%d,r%d,%d,%d,%d\n", flag_Rc ? "." : "",
Ra_addr, Rs_addr, sh_imm, MaskBegin, MaskEnd);
// Ra =3D ROTL(Rs, Imm) & mask
- assign( Ra, binop(Iop_And32, ROTL32(mkexpr(Rs), sh_imm),=20
+ assign( Ra, binop(Iop_And32, ROTL32(mkexpr(Rs), mkU32(sh_imm)),=20
mkU32(mask)) );
break;
=20
-//zz case 0x17: // rlwnm (Rotate Left Word then AND with Mask, PPC32 =
p503
-//zz DIP("rlwnm%s r%d,r%d,r%d,%d,%d\n", flag_Rc ? "." : "",
-//zz Ra_addr, Rs_addr, Rb_addr, MaskBegin, MaskEnd);
-//zz // Ra =3D ROTL(Rs, Rb[0-4]) & mask
-//zz assign( rot_amt,
-//zz unop(Iop_32to8, binop(Iop_And32, mkexpr(Rb), mkU32(0x=
1F))) );
-//zz assign( Ra, binop(Iop_And32,
-//zz ROTL32(mkexpr(Rs), mkexpr(rot_amt)), mkU32(=
mask)) );
-//zz break;
+ case 0x17:=20
+ // rlwnm (Rotate Left Word then AND with Mask, PPC32 p503
+ DIP("rlwnm%s r%d,r%d,r%d,%d,%d\n", flag_Rc ? "." : "",
+ Ra_addr, Rs_addr, Rb_addr, MaskBegin, MaskEnd);
+ // Ra =3D ROTL(Rs, Rb[0-4]) & mask
+ // note, ROTL32 does the masking, so we don't do it here
+ assign( Ra, binop(Iop_And32, ROTL32(mkexpr(Rs), mkexpr(Rb)),=20
+ mkU32(mask)) );
+ break;
=20
default:
vex_printf("dis_int_rot(PPC32)(opc1)\n");
|