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From: <sv...@va...> - 2005-06-30 12:10:48
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Author: sewardj
Date: 2005-06-30 13:10:45 +0100 (Thu, 30 Jun 2005)
New Revision: 4067
Log:
ppc32-linux: Vex implements dcbz correctly now. No need to mess with
the auxv to fool glibc into not using it.
Modified:
trunk/coregrind/m_main.c
Modified: trunk/coregrind/m_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_main.c 2005-06-30 11:50:11 UTC (rev 4066)
+++ trunk/coregrind/m_main.c 2005-06-30 12:10:45 UTC (rev 4067)
@@ -177,9 +177,6 @@
"PPC32 cache line size %u (type %u)\n",=20
(UInt)auxv->u.a_val, (UInt)auxv->a_type );
}
- /* HACK: Tell glibc we don't know what the line size is.
- This stops it using dcbz. */
- auxv->u.a_val =3D 0;
break;
# endif
=20
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