|
From: <sv...@va...> - 2005-06-30 11:49:38
|
Author: sewardj
Date: 2005-06-30 12:49:14 +0100 (Thu, 30 Jun 2005)
New Revision: 1233
Log:
(API-visible change): generalise the VexSubArch idea. Everywhere
where a VexSubArch was previously passed around, a VexArchInfo is now
passed around. This is a struct which carries more details about any
given architecture and in particular gives a clean way to pass around
info about PPC cache line sizes, which is needed for guest-side PPC.
Modified:
trunk/priv/guest-amd64/gdefs.h
trunk/priv/guest-amd64/toIR.c
trunk/priv/guest-ppc32/gdefs.h
trunk/priv/guest-ppc32/toIR.c
trunk/priv/guest-x86/gdefs.h
trunk/priv/guest-x86/toIR.c
trunk/priv/host-amd64/hdefs.h
trunk/priv/host-amd64/isel.c
trunk/priv/host-ppc32/hdefs.h
trunk/priv/host-ppc32/isel.c
trunk/priv/host-x86/hdefs.h
trunk/priv/host-x86/isel.c
trunk/priv/main/vex_main.c
trunk/pub/libvex.h
Modified: trunk/priv/guest-amd64/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-amd64/gdefs.h 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/guest-amd64/gdefs.h 2005-06-30 11:49:14 UTC (rev 1233)
@@ -50,7 +50,7 @@
Bool (*byte_accessible)(Addr64),
Bool (*resteerOkFn)(Addr64),
Bool host_bigendian,
- VexSubArch subarch_guest );
+ VexArchInfo* archinfo_guest );
=20
/* Used by the optimiser to specialise calls to helpers. */
extern
Modified: trunk/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-amd64/toIR.c 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/guest-amd64/toIR.c 2005-06-30 11:49:14 UTC (rev 1233)
@@ -398,12 +398,12 @@
resteer into, returns False. */
=20
static=20
-DisResult disInstr ( /*IN*/ Bool resteerOK,
- /*IN*/ Bool (*resteerOkFn) ( Addr64 ),
- /*IN*/ ULong delta,=20
- /*IN*/ VexSubArch subarch,
- /*OUT*/ Long* size,
- /*OUT*/ Addr64* whereNext );
+DisResult disInstr ( /*IN*/ Bool resteerOK,
+ /*IN*/ Bool (*resteerOkFn) ( Addr64 ),
+ /*IN*/ ULong delta,=20
+ /*IN*/ VexArchInfo* archinfo,
+ /*OUT*/ Long* size,
+ /*OUT*/ Addr64* whereNext );
=20
=20
/* This is the main (only, in fact) entry point for this module. */
@@ -417,7 +417,7 @@
Bool (*byte_accessible)(Addr64),
Bool (*chase_into_ok)(Addr64),
Bool host_bigendian,
- VexSubArch subarch_guest )
+ VexArchInfo* archinfo_guest )
{
Long delta, size;
Int i, n_instrs, first_stmt_idx;
@@ -434,7 +434,7 @@
vassert(vex_control.guest_chase_thresh >=3D 0);
vassert(vex_control.guest_chase_thresh < vex_control.guest_max_insns)=
;
=20
- vassert(subarch_guest =3D=3D VexSubArch_NONE);
+ vassert(archinfo_guest->subarch =3D=3D VexSubArch_NONE);
=20
/* Start a new, empty extent. */
vge->n_used =3D 1;
@@ -491,7 +491,7 @@
guest_rip_next_assumed =3D 0;
guest_rip_next_mustcheck =3D False;
dres =3D disInstr( resteerOK, chase_into_ok,=20
- delta, subarch_guest, &size, &guest_next );
+ delta, archinfo_guest, &size, &guest_next );
insn_verbose =3D False;
=20
/* stay sane ... */
@@ -7927,12 +7927,12 @@
is False, disInstr may not return Dis_Resteer. */
=20
static=20
-DisResult disInstr ( /*IN*/ Bool resteerOK,
- /*IN*/ Bool (*resteerOkFn) ( Addr64 ),
- /*IN*/ ULong delta,=20
- /*IN*/ VexSubArch subarch,
- /*OUT*/ Long* size,
- /*OUT*/ Addr64* whereNext )
+DisResult disInstr ( /*IN*/ Bool resteerOK,
+ /*IN*/ Bool (*resteerOkFn) ( Addr64 ),
+ /*IN*/ ULong delta,=20
+ /*IN*/ VexArchInfo* archinfo,
+ /*OUT*/ Long* size,
+ /*OUT*/ Addr64* whereNext )
{
IRType ty;
IRTemp addr, t0, t1, t2, t3, t4, t5, t6;
@@ -13115,7 +13115,7 @@
HChar* fName =3D NULL;
void* fAddr =3D NULL;
if (haveF2orF3(pfx)) goto decode_failure;
- switch (subarch) {
+ switch (archinfo->subarch) {
case VexSubArch_NONE:
fName =3D "amd64g_dirtyhelper_CPUID";
fAddr =3D &amd64g_dirtyhelper_CPUID;=20
Modified: trunk/priv/guest-ppc32/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/gdefs.h 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/guest-ppc32/gdefs.h 2005-06-30 11:49:14 UTC (rev 1233)
@@ -69,7 +69,7 @@
Bool (*byte_accessible)(Addr64),
Bool (*resteerOkFn)(Addr64),
Bool host_bigendian,
- VexSubArch subarch_guest );
+ VexArchInfo* archinfo_guest );
=20
/* Used by the optimiser to specialise calls to helpers. */
extern
Modified: trunk/priv/guest-ppc32/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/toIR.c 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/guest-ppc32/toIR.c 2005-06-30 11:49:14 UTC (rev 1233)
@@ -298,7 +298,7 @@
Bool (*byte_accessible)(Addr64),
Bool (*chase_into_ok)(Addr64),
Bool host_bigendian,
- VexSubArch subarch_guest )
+ VexArchInfo* archinfo_guest )
{
UInt delta;
Int i, n_instrs, size, first_stmt_idx;
@@ -314,8 +314,8 @@
vassert(vex_control.guest_chase_thresh >=3D 0);
vassert(vex_control.guest_chase_thresh < vex_control.guest_max_insns)=
;
=20
- vassert(subarch_guest =3D=3D VexSubArchPPC32_noAV
- || subarch_guest =3D=3D VexSubArchPPC32_AV);
+ vassert(archinfo_guest->subarch =3D=3D VexSubArchPPC32_noAV
+ || archinfo_guest->subarch =3D=3D VexSubArchPPC32_AV);
=20
/* Start a new, empty extent. */
vge->n_used =3D 1;
Modified: trunk/priv/guest-x86/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-x86/gdefs.h 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/guest-x86/gdefs.h 2005-06-30 11:49:14 UTC (rev 1233)
@@ -50,7 +50,7 @@
Bool (*byte_accessible)(Addr64),
Bool (*resteerOkFn)(Addr64),
Bool host_bigendian,
- VexSubArch subarch_guest );
+ VexArchInfo* archinfo_guest );
=20
/* Used by the optimiser to specialise calls to helpers. */
extern
Modified: trunk/priv/guest-x86/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-x86/toIR.c 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/guest-x86/toIR.c 2005-06-30 11:49:14 UTC (rev 1233)
@@ -233,12 +233,12 @@
resteer into, returns False. */
=20
static=20
-DisResult disInstr ( /*IN*/ Bool resteerOK,
- /*IN*/ Bool (*resteerOkFn) ( Addr64 ),
- /*IN*/ UInt delta,=20
- /*IN*/ VexSubArch subarch,
- /*OUT*/ Int* size,
- /*OUT*/ Addr64* whereNext );
+DisResult disInstr ( /*IN*/ Bool resteerOK,
+ /*IN*/ Bool (*resteerOkFn) ( Addr64 ),
+ /*IN*/ UInt delta,=20
+ /*IN*/ VexArchInfo* archinfo,
+ /*OUT*/ Int* size,
+ /*OUT*/ Addr64* whereNext );
=20
=20
/* This is the main (only, in fact) entry point for this module. */
@@ -252,7 +252,7 @@
Bool (*byte_accessible)(Addr64),
Bool (*chase_into_ok)(Addr64),
Bool host_bigendian,
- VexSubArch subarch_guest )
+ VexArchInfo* archinfo_guest )
{
UInt delta;
Int i, n_instrs, size, first_stmt_idx;
@@ -269,9 +269,9 @@
vassert(vex_control.guest_chase_thresh >=3D 0);
vassert(vex_control.guest_chase_thresh < vex_control.guest_max_insns)=
;
=20
- vassert(subarch_guest =3D=3D VexSubArchX86_sse0
- || subarch_guest =3D=3D VexSubArchX86_sse1
- || subarch_guest =3D=3D VexSubArchX86_sse2);
+ vassert(archinfo_guest->subarch =3D=3D VexSubArchX86_sse0
+ || archinfo_guest->subarch =3D=3D VexSubArchX86_sse1
+ || archinfo_guest->subarch =3D=3D VexSubArchX86_sse2);
=20
vassert((guest_eip_start >> 32) =3D=3D 0);
=20
@@ -328,7 +328,7 @@
needs to be annulled. */
size =3D 0; /* just in case disInstr doesn't set it */
dres =3D disInstr( resteerOK, chase_into_ok,=20
- delta, subarch_guest, &size, &guest_next );
+ delta, archinfo_guest, &size, &guest_next );
insn_verbose =3D False;
=20
/* stay sane ... */
@@ -6997,12 +6997,12 @@
is False, disInstr may not return Dis_Resteer. */
=20
static=20
-DisResult disInstr ( /*IN*/ Bool resteerOK,
- /*IN*/ Bool (*resteerOkFn) ( Addr64 ),
- /*IN*/ UInt delta,=20
- /*IN*/ VexSubArch subarch,
- /*OUT*/ Int* size,
- /*OUT*/ Addr64* whereNext )
+DisResult disInstr ( /*IN*/ Bool resteerOK,
+ /*IN*/ Bool (*resteerOkFn) ( Addr64 ),
+ /*IN*/ UInt delta,=20
+ /*IN*/ VexArchInfo* archinfo,
+ /*OUT*/ Int* size,
+ /*OUT*/ Addr64* whereNext )
{
IRType ty;
IRTemp addr, t0, t1, t2, t3, t4, t5, t6;
@@ -7222,7 +7222,7 @@
=20
/* Skip parts of the decoder which don't apply given the stated
guest subarchitecture. */
- if (subarch =3D=3D VexSubArchX86_sse0)
+ if (archinfo->subarch =3D=3D VexSubArchX86_sse0)
goto after_sse_decoders;
=20
/* Otherwise we must be doing sse1 or sse2, so we can at least try
@@ -8242,7 +8242,8 @@
=20
/* Skip parts of the decoder which don't apply given the stated
guest subarchitecture. */
- if (subarch =3D=3D VexSubArchX86_sse0 || subarch =3D=3D VexSubArchX86=
_sse1)
+ if (archinfo->subarch =3D=3D VexSubArchX86_sse0=20
+ || archinfo->subarch =3D=3D VexSubArchX86_sse1)
goto after_sse_decoders;
=20
insn =3D (UChar*)&guest_code[delta];
@@ -11766,7 +11767,7 @@
IRDirty* d =3D NULL;
HChar* fName =3D NULL;
void* fAddr =3D NULL;
- switch (subarch) {
+ switch (archinfo->subarch) {
case VexSubArchX86_sse0:
fName =3D "x86g_dirtyhelper_CPUID_sse0";
fAddr =3D &x86g_dirtyhelper_CPUID_sse0;=20
Modified: trunk/priv/host-amd64/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/hdefs.h 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/host-amd64/hdefs.h 2005-06-30 11:49:14 UTC (rev 1233)
@@ -708,7 +708,7 @@
extern AMD64Instr* genSpill_AMD64 ( HReg rreg, Int offset );
extern AMD64Instr* genReload_AMD64 ( HReg rreg, Int offset );
extern void getAllocableRegs_AMD64 ( Int*, HReg** );
-extern HInstrArray* iselBB_AMD64 ( IRBB*, VexSubArch );
+extern HInstrArray* iselBB_AMD64 ( IRBB*, VexArchInfo* );
=20
#endif /* ndef __LIBVEX_HOST_AMD64_HDEFS_H */
=20
Modified: trunk/priv/host-amd64/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/isel.c 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/host-amd64/isel.c 2005-06-30 11:49:14 UTC (rev 1233)
@@ -3750,11 +3750,12 @@
=20
/* Translate an entire BB to amd64 code. */
=20
-HInstrArray* iselBB_AMD64 ( IRBB* bb, VexSubArch subarch_host )
+HInstrArray* iselBB_AMD64 ( IRBB* bb, VexArchInfo* archinfo_host )
{
- Int i, j;
- HReg hreg, hregHI;
- ISelEnv* env;
+ Int i, j;
+ HReg hreg, hregHI;
+ ISelEnv* env;
+ VexSubArch subarch_host =3D archinfo_host->subarch;
=20
/* sanity ... */
vassert(subarch_host =3D=3D VexSubArch_NONE);
Modified: trunk/priv/host-ppc32/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/hdefs.h 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/host-ppc32/hdefs.h 2005-06-30 11:49:14 UTC (rev 1233)
@@ -710,7 +710,7 @@
extern PPC32Instr* genSpill_PPC32 ( HReg rreg, UShort offsetB )=
;
extern PPC32Instr* genReload_PPC32 ( HReg rreg, UShort offsetB )=
;
extern void getAllocableRegs_PPC32 ( Int*, HReg** );
-extern HInstrArray* iselBB_PPC32 ( IRBB*, VexSubArch );
+extern HInstrArray* iselBB_PPC32 ( IRBB*, VexArchInfo* );
=20
#endif /* ndef __LIBVEX_HOST_PPC32_HDEFS_H */
=20
Modified: trunk/priv/host-ppc32/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/isel.c 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/host-ppc32/isel.c 2005-06-30 11:49:14 UTC (rev 1233)
@@ -3529,11 +3529,12 @@
=20
/* Translate an entire BB to ppc32 code. */
=20
-HInstrArray* iselBB_PPC32 ( IRBB* bb, VexSubArch subarch_host )
+HInstrArray* iselBB_PPC32 ( IRBB* bb, VexArchInfo* archinfo_host )
{
- Int i, j;
- HReg hreg, hregHI;
- ISelEnv* env;
+ Int i, j;
+ HReg hreg, hregHI;
+ ISelEnv* env;
+ VexSubArch subarch_host =3D archinfo_host->subarch;
=20
/* sanity ... */
vassert(subarch_host =3D=3D VexSubArchPPC32_noAV
Modified: trunk/priv/host-x86/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-x86/hdefs.h 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/host-x86/hdefs.h 2005-06-30 11:49:14 UTC (rev 1233)
@@ -653,7 +653,7 @@
extern X86Instr* genSpill_X86 ( HReg rreg, Int offset );
extern X86Instr* genReload_X86 ( HReg rreg, Int offset );
extern void getAllocableRegs_X86 ( Int*, HReg** );
-extern HInstrArray* iselBB_X86 ( IRBB*, VexSubArch );
+extern HInstrArray* iselBB_X86 ( IRBB*, VexArchInfo* );
=20
#endif /* ndef __LIBVEX_HOST_X86_HDEFS_H */
=20
Modified: trunk/priv/host-x86/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-x86/isel.c 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/host-x86/isel.c 2005-06-30 11:49:14 UTC (rev 1233)
@@ -3550,11 +3550,12 @@
=20
/* Translate an entire BB to x86 code. */
=20
-HInstrArray* iselBB_X86 ( IRBB* bb, VexSubArch subarch_host )
+HInstrArray* iselBB_X86 ( IRBB* bb, VexArchInfo* archinfo_host )
{
- Int i, j;
- HReg hreg, hregHI;
- ISelEnv* env;
+ Int i, j;
+ HReg hreg, hregHI;
+ ISelEnv* env;
+ VexSubArch subarch_host =3D archinfo_host->subarch;
=20
/* sanity ... */
vassert(subarch_host =3D=3D VexSubArchX86_sse0
Modified: trunk/priv/main/vex_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/main/vex_main.c 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/priv/main/vex_main.c 2005-06-30 11:49:14 UTC (rev 1233)
@@ -168,10 +168,10 @@
=20
VexTranslateResult LibVEX_Translate (
/* The instruction sets we are translating from and to. */
- VexArch arch_guest,
- VexSubArch subarch_guest,
- VexArch arch_host,
- VexSubArch subarch_host,
+ VexArch arch_guest,
+ VexArchInfo* archinfo_guest,
+ VexArch arch_host,
+ VexArchInfo* archinfo_host,
/* IN: the block to translate, and its guest address. */
UChar* guest_bytes,
Addr64 guest_bytes_addr,
@@ -207,12 +207,12 @@
HInstr* (*genReload) ( HReg, Int );
void (*ppInstr) ( HInstr* );
void (*ppReg) ( HReg );
- HInstrArray* (*iselBB) ( IRBB*, VexSubArch );
+ HInstrArray* (*iselBB) ( IRBB*, VexArchInfo* );
IRBB* (*bbToIR) ( UChar*, Addr64,=20
VexGuestExtents*,=20
Bool(*)(Addr64),=20
Bool(*)(Addr64),=20
- Bool, VexSubArch );
+ Bool, VexArchInfo* );
Int (*emit) ( UChar*, Int, HInstr* );
IRExpr* (*specHelper) ( HChar*, IRExpr** );
Bool (*preciseMemExnsFn) ( Int, Int );
@@ -270,9 +270,9 @@
emit =3D (Int(*)(UChar*,Int,HInstr*)) emit_X86Instr;
host_is_bigendian =3D False;
host_word_type =3D Ity_I32;
- vassert(subarch_host =3D=3D VexSubArchX86_sse0
- || subarch_host =3D=3D VexSubArchX86_sse1
- || subarch_host =3D=3D VexSubArchX86_sse2);
+ vassert(archinfo_host->subarch =3D=3D VexSubArchX86_sse0
+ || archinfo_host->subarch =3D=3D VexSubArchX86_sse1
+ || archinfo_host->subarch =3D=3D VexSubArchX86_sse2);
break;
=20
case VexArchAMD64:
@@ -289,7 +289,7 @@
emit =3D (Int(*)(UChar*,Int,HInstr*)) emit_AMD64Instr;
host_is_bigendian =3D False;
host_word_type =3D Ity_I64;
- vassert(subarch_host =3D=3D VexSubArch_NONE);
+ vassert(archinfo_host->subarch =3D=3D VexSubArch_NONE);
break;
=20
case VexArchPPC32:
@@ -306,8 +306,8 @@
emit =3D (Int(*)(UChar*,Int,HInstr*)) emit_PPC32Instr;
host_is_bigendian =3D True;
host_word_type =3D Ity_I32;
- vassert(subarch_guest =3D=3D VexSubArchPPC32_noAV
- || subarch_guest =3D=3D VexSubArchPPC32_AV);
+ vassert(archinfo_guest->subarch =3D=3D VexSubArchPPC32_noAV
+ || archinfo_guest->subarch =3D=3D VexSubArchPPC32_AV);
break;
=20
default:
@@ -324,9 +324,9 @@
guest_sizeB =3D sizeof(VexGuestX86State);
guest_word_type =3D Ity_I32;
guest_layout =3D &x86guest_layout;
- vassert(subarch_guest =3D=3D VexSubArchX86_sse0
- || subarch_guest =3D=3D VexSubArchX86_sse1
- || subarch_guest =3D=3D VexSubArchX86_sse2);
+ vassert(archinfo_guest->subarch =3D=3D VexSubArchX86_sse0
+ || archinfo_guest->subarch =3D=3D VexSubArchX86_sse1
+ || archinfo_guest->subarch =3D=3D VexSubArchX86_sse2);
break;
=20
case VexArchAMD64:
@@ -336,7 +336,7 @@
guest_sizeB =3D sizeof(VexGuestAMD64State);
guest_word_type =3D Ity_I64;
guest_layout =3D &amd64guest_layout;
- vassert(subarch_guest =3D=3D VexSubArch_NONE);
+ vassert(archinfo_guest->subarch =3D=3D VexSubArch_NONE);
break;
=20
case VexArchARM:
@@ -346,7 +346,7 @@
guest_sizeB =3D sizeof(VexGuestARMState);
guest_word_type =3D Ity_I32;
guest_layout =3D &armGuest_layout;
- vassert(subarch_guest =3D=3D VexSubArchARM_v4);
+ vassert(archinfo_guest->subarch =3D=3D VexSubArchARM_v4);
break;
=20
case VexArchPPC32:
@@ -356,8 +356,8 @@
guest_sizeB =3D sizeof(VexGuestPPC32State);
guest_word_type =3D Ity_I32;
guest_layout =3D &ppc32Guest_layout;
- vassert(subarch_guest =3D=3D VexSubArchPPC32_noAV
- || subarch_guest =3D=3D VexSubArchPPC32_AV);
+ vassert(archinfo_guest->subarch =3D=3D VexSubArchPPC32_noAV
+ || archinfo_guest->subarch =3D=3D VexSubArchPPC32_AV);
break;
=20
default:
@@ -369,7 +369,7 @@
/* doesn't necessarily have to be true, but if it isn't it means
we are simulating one flavour of an architecture a different
flavour of the same architecture, which is pretty strange. */
- vassert(subarch_guest =3D=3D subarch_host);
+ vassert(archinfo_guest->subarch =3D=3D archinfo_host->subarch);
}
=20
if (vex_traceflags & VEX_TRACE_FE)
@@ -383,7 +383,7 @@
byte_accessible,
chase_into_ok,
host_is_bigendian,
- subarch_guest );
+ archinfo_guest );
=20
if (irbb =3D=3D NULL) {
/* Access failure. */
@@ -489,7 +489,7 @@
" Instruction selection "
"------------------------\n");
=20
- vcode =3D iselBB ( irbb, subarch_host );
+ vcode =3D iselBB ( irbb, archinfo_host );
=20
if (vex_traceflags & VEX_TRACE_VCODE)
vex_printf("\n");
@@ -592,7 +592,7 @@
}
}
=20
-/* --------- Arch/Subarch names. --------- */
+/* --------- Arch/Subarch stuff. --------- */
=20
const HChar* LibVEX_ppVexArch ( VexArch arch )
{
@@ -621,6 +621,14 @@
}
}
=20
+/* Write default settings info *vai. */
+void LibVEX_default_VexArchInfo ( /*OUT*/VexArchInfo* vai )
+{
+ vai->subarch =3D VexSubArch_INVALID;
+ vai->ppc32_cache_line_szB =3D 0;
+}
+
+
/*---------------------------------------------------------------*/
/*--- end main/vex_main.c ---*/
/*---------------------------------------------------------------*/
Modified: trunk/pub/libvex.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/pub/libvex.h 2005-06-29 19:05:08 UTC (rev 1232)
+++ trunk/pub/libvex.h 2005-06-30 11:49:14 UTC (rev 1233)
@@ -46,7 +46,7 @@
/*---------------------------------------------------------------*/
=20
/*-------------------------------------------------------*/
-/*--- Architectures and architecture variants ---*/
+/*--- Architectures, variants, and other arch info ---*/
/*-------------------------------------------------------*/
=20
typedef=20
@@ -78,6 +78,24 @@
extern const HChar* LibVEX_ppVexSubArch ( VexSubArch );
=20
=20
+/* This struct is a bit of a hack, but is needed to carry misc
+ important bits of info about an arch. Fields which are optional or
+ ignored on some arch should be set to zero. */
+
+typedef
+ struct {
+ /* This is the only mandatory field. */
+ VexSubArch subarch;
+ /* PPC32 only: size of cache line */
+ Int ppc32_cache_line_szB;
+ }
+ VexArchInfo;
+
+/* Write default settings info *vai. */
+extern=20
+void LibVEX_default_VexArchInfo ( /*OUT*/VexArchInfo* vai );
+
+
/*-------------------------------------------------------*/
/*--- Control of Vex's optimiser (iropt). ---*/
/*-------------------------------------------------------*/
@@ -247,10 +265,10 @@
extern=20
VexTranslateResult LibVEX_Translate (
/* The instruction sets we are translating from and to. */
- VexArch arch_guest,
- VexSubArch subarch_guest,
- VexArch arch_host,
- VexSubArch subarch_host,
+ VexArch arch_guest,
+ VexArchInfo* archinfo_guest,
+ VexArch arch_host,
+ VexArchInfo* archinfo_host,
/* IN: the block to translate, and its guest address. */
UChar* guest_bytes,
Addr64 guest_bytes_addr,
|