|
From: <sv...@va...> - 2005-05-11 22:55:09
|
Author: sewardj
Date: 2005-05-11 23:55:08 +0100 (Wed, 11 May 2005)
New Revision: 1189
Modified:
trunk/priv/host-amd64/hdefs.c
Log:
Ah, the joys of register allocation. You might think that giving
reg-alloc as many registers as possible maximises performance. You
would be wrong. Giving it more registers generates more spilling of
caller-saved regs around the innumerable helper calls created by
Memcheck. What we really need are zillions of callee-save registers,
but those are in short supply. Hmm, perhaps I should let it use %rbx
too -- that's listed as callee-save.
Anyway, the current arrangement allows reg-alloc to use 8
general-purpose regs and 10 xmm registers. The x87 registers are not
used at all. This seems to work fairly well.
Modified: trunk/priv/host-amd64/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/hdefs.c 2005-05-11 22:47:32 UTC (rev 1188)
+++ trunk/priv/host-amd64/hdefs.c 2005-05-11 22:55:08 UTC (rev 1189)
@@ -157,7 +157,7 @@
(*arr)[ 5] =3D hregAMD64_XMM9();
#endif
#if 1
- *nregs =3D 11;
+ *nregs =3D 18;
*arr =3D LibVEX_Alloc(*nregs * sizeof(HReg));
(*arr)[ 0] =3D hregAMD64_RSI();
(*arr)[ 1] =3D hregAMD64_RDI();
@@ -168,50 +168,18 @@
(*arr)[ 6] =3D hregAMD64_R14();
(*arr)[ 7] =3D hregAMD64_R15();
=20
- (*arr)[ 8] =3D hregAMD64_XMM7();
- (*arr)[ 9] =3D hregAMD64_XMM8();
- (*arr)[10] =3D hregAMD64_XMM9();
+ (*arr)[ 8] =3D hregAMD64_XMM3();
+ (*arr)[ 9] =3D hregAMD64_XMM4();
+ (*arr)[10] =3D hregAMD64_XMM5();
+ (*arr)[11] =3D hregAMD64_XMM6();
+ (*arr)[12] =3D hregAMD64_XMM7();
+
+ (*arr)[13] =3D hregAMD64_XMM8();
+ (*arr)[14] =3D hregAMD64_XMM9();
+ (*arr)[15] =3D hregAMD64_XMM10();
+ (*arr)[16] =3D hregAMD64_XMM11();
+ (*arr)[17] =3D hregAMD64_XMM12();
#endif
-#if 0
- *nregs =3D 30;
- *arr =3D LibVEX_Alloc(*nregs * sizeof(HReg));
- (*arr)[ 0] =3D hregAMD64_RAX();
- (*arr)[ 1] =3D hregAMD64_RBX();
- (*arr)[ 2] =3D hregAMD64_RCX();
- (*arr)[ 3] =3D hregAMD64_RDX();
- (*arr)[ 4] =3D hregAMD64_RSI();
- (*arr)[ 5] =3D hregAMD64_RDI();
- (*arr)[ 6] =3D hregAMD64_R8();
- (*arr)[ 7] =3D hregAMD64_R9();
- (*arr)[ 8] =3D hregAMD64_R10();
- (*arr)[ 9] =3D hregAMD64_R11();
- (*arr)[10] =3D hregAMD64_R12();
- (*arr)[11] =3D hregAMD64_R13();
- (*arr)[12] =3D hregAMD64_R14();
- (*arr)[13] =3D hregAMD64_R15();
- // (*arr)[6] =3D hregAMD64_FAKE0();
- //(*arr)[7] =3D hregAMD64_FAKE1();
- //(*arr)[8] =3D hregAMD64_FAKE2();
- //(*arr)[9] =3D hregAMD64_FAKE3();
- //(*arr)[10] =3D hregAMD64_FAKE4();
- //(*arr)[11] =3D hregAMD64_FAKE5();
- (*arr)[14] =3D hregAMD64_XMM0();
- (*arr)[15] =3D hregAMD64_XMM1();
- (*arr)[16] =3D hregAMD64_XMM2();
- (*arr)[17] =3D hregAMD64_XMM3();
- (*arr)[18] =3D hregAMD64_XMM4();
- (*arr)[19] =3D hregAMD64_XMM5();
- (*arr)[20] =3D hregAMD64_XMM6();
- (*arr)[21] =3D hregAMD64_XMM7();
- (*arr)[22] =3D hregAMD64_XMM8();
- (*arr)[23] =3D hregAMD64_XMM9();
- (*arr)[24] =3D hregAMD64_XMM10();
- (*arr)[25] =3D hregAMD64_XMM11();
- (*arr)[26] =3D hregAMD64_XMM12();
- (*arr)[27] =3D hregAMD64_XMM13();
- (*arr)[28] =3D hregAMD64_XMM14();
- (*arr)[29] =3D hregAMD64_XMM15();
-#endif
}
=20
=20
|