|
From: <sv...@va...> - 2005-04-06 00:47:10
|
Author: sewardj
Date: 2005-04-06 01:47:01 +0100 (Wed, 06 Apr 2005)
New Revision: 1120
Modified:
trunk/priv/host-x86/isel.c
Log:
Add a pattern for 64UtoV128(LDle:I64(addr)), so as to generate a
single movsd. This fixes a common, poorly handed case in generating
sse2 code.
Modified: trunk/priv/host-x86/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-x86/isel.c 2005-04-05 01:54:19 UTC (rev 1119)
+++ trunk/priv/host-x86/isel.c 2005-04-06 00:47:01 UTC (rev 1120)
@@ -2669,9 +2669,14 @@
goto vec_fail; \
} while (0)
=20
- Bool arg1isEReg =3D False;
- X86SseOp op =3D Xsse_INVALID;
- IRType ty =3D typeOfIRExpr(env->type_env,e);
+# define SSE2_OR_ABOVE \
+ (env->subarch !=3D VexSubArchX86_sse0 \
+ && env->subarch !=3D VexSubArchX86_sse1)
+
+ MatchInfo mi;
+ Bool arg1isEReg =3D False;
+ X86SseOp op =3D Xsse_INVALID;
+ IRType ty =3D typeOfIRExpr(env->type_env,e);
vassert(e);
vassert(ty =3D=3D Ity_V128);
=20
@@ -2707,6 +2712,20 @@
}
=20
if (e->tag =3D=3D Iex_Unop) {
+
+ if (SSE2_OR_ABOVE) {=20
+ /* 64UtoV128(LDle:I64(addr)) */
+ DECLARE_PATTERN(p_zwiden_load64);
+ DEFINE_PATTERN(p_zwiden_load64,
+ unop(Iop_64UtoV128, IRExpr_LDle(Ity_I64,bind(0))));
+ if (matchIRExpr(&mi, p_zwiden_load64, e)) {
+ X86AMode* am =3D iselIntExpr_AMode(env, mi.bindee[0]);
+ HReg dst =3D newVRegV(env);
+ addInstr(env, X86Instr_SseLdzLO(8, dst, am));
+ return dst;
+ }
+ }
+
switch (e->Iex.Unop.op) {
=20
case Iop_NotV128: {
@@ -3139,6 +3158,7 @@
=20
# undef REQUIRE_SSE1
# undef REQUIRE_SSE2
+# undef SSE2_OR_ABOVE
}
=20
=20
|