|
From: Julian S. <js...@ac...> - 2005-06-29 10:51:50
|
Paul What are the main instruction-set variants in use on ppc32 ? For example, on x86, Vex distinguishes between x86-with-no-SSE capabilities, x86-that-can-do-SSE1 and x86-that-can-do-SSE2. Something similar needs to be instituted for ppc32. So far we know of ppc32 with no Altivec and ppc32 with Altivec. Are there further variants that need considering? Thanks, J |
|
From: Paul M. <pa...@sa...> - 2005-06-29 12:28:48
|
Julian Seward writes: > Something similar needs to be instituted for ppc32. So far we > know of ppc32 with no Altivec and ppc32 with Altivec. Are there > further variants that need considering? There are embedded ppc processors (405, 440) that don't have altivec but do have some extra integer multiply-add instructions. The 440 also has a "determine left-most zero byte" instruction IIRC. I'll try to dig up some documentation on these instructions. Regards, Paul. |