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From: Nicholas N. <nj...@so...> - 2023-04-18 23:26:27
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=b0e9fef2019e8ccc04bfa012077e41fc5e41f5b4 commit b0e9fef2019e8ccc04bfa012077e41fc5e41f5b4 Author: Nicholas Nethercote <n.n...@gm...> Date: Mon Apr 17 09:34:11 2023 +1000 cg_annotate: Remove the `-I`/`--include` option. For much the same reasons that I removed user annotations recently: it's rarely/never used, and complicates things. Diff: --- cachegrind/cg_annotate.in | 60 +++++++-------------------------- cachegrind/tests/Makefile.am | 1 - cachegrind/tests/ann-diff1.post.exp | 1 - cachegrind/tests/ann-diff2.post.exp | 1 - cachegrind/tests/ann-merge1.post.exp | 1 - cachegrind/tests/ann1a.post.exp | 1 - cachegrind/tests/ann1b.post.exp | 1 - cachegrind/tests/ann2-aux/ann2-via-I.rs | 1 - cachegrind/tests/ann2-past-the-end.rs | 2 ++ cachegrind/tests/ann2.cgout | 11 +++--- cachegrind/tests/ann2.post.exp | 35 +++++++------------ cachegrind/tests/ann2.vgtest | 2 +- 12 files changed, 33 insertions(+), 84 deletions(-) diff --git a/cachegrind/cg_annotate.in b/cachegrind/cg_annotate.in index 0b68e094c3..5e64a94485 100755 --- a/cachegrind/cg_annotate.in +++ b/cachegrind/cg_annotate.in @@ -51,7 +51,6 @@ class Args(Namespace): show_percs: bool annotate: bool context: int - include: list[str] cgout_filename: list[str] @staticmethod @@ -142,14 +141,6 @@ class Args(Namespace): help="print N lines of context before and after annotated lines " "(default: %(default)s)", ) - p.add_argument( - "-I", - "--include", - action="append", - default=[], - metavar="D", - help="add D to the list of searched source file directories", - ) p.add_argument( "cgout_filename", nargs=1, @@ -663,14 +654,6 @@ def print_metadata(desc: str, cmd: str, events: Events) -> None: print("Events shown: ", *events.show_events) print("Event sort order:", *events.sort_events) print("Threshold: ", args.threshold) - - if len(args.include) == 0: - print("Include dirs: ") - else: - print(f"Include dirs: {args.include[0]}") - for include_dirname in args.include[1:]: - print(f" {include_dirname}") - print("Annotation: ", "on" if args.annotate else "off") print() @@ -920,40 +903,23 @@ def print_annotated_src_files( dict_line_cc = dict_fl_dict_line_cc.pop("???", None) add_dict_line_cc_to_cc(dict_line_cc, annotated_ccs.files_unknown_cc) - # Prepend "" to the include dirnames so things work in the case where the - # filename has the full path. - include_dirnames = args.include.copy() - include_dirnames.insert(0, "") - def print_ann_fancy(src_filename: str) -> None: print_fancy(f"Annotated source file: {src_filename}") for src_filename in sorted(ann_src_filenames): - readable = False - for include_dirname in include_dirnames: - if include_dirname == "": - full_src_filename = src_filename - else: - full_src_filename = os.path.join(include_dirname, src_filename) - - try: - with open(full_src_filename, "r", encoding="utf-8") as src_file: - dict_line_cc = dict_fl_dict_line_cc.pop(src_filename, None) - assert dict_line_cc is not None - print_ann_fancy(src_file.name) # includes full path - print_annotated_src_file( - events, - dict_line_cc, - src_file, - annotated_ccs, - summary_cc, - ) - readable = True - break - except OSError: - pass - - if not readable: + try: + with open(src_filename, "r", encoding="utf-8") as src_file: + dict_line_cc = dict_fl_dict_line_cc.pop(src_filename, None) + assert dict_line_cc is not None + print_ann_fancy(src_filename) + print_annotated_src_file( + events, + dict_line_cc, + src_file, + annotated_ccs, + summary_cc, + ) + except OSError: dict_line_cc = dict_fl_dict_line_cc.pop(src_filename, None) add_dict_line_cc_to_cc(dict_line_cc, annotated_ccs.unreadable_cc) diff --git a/cachegrind/tests/Makefile.am b/cachegrind/tests/Makefile.am index 0c7219a9bc..d38d300b90 100644 --- a/cachegrind/tests/Makefile.am +++ b/cachegrind/tests/Makefile.am @@ -24,7 +24,6 @@ EXTRA_DIST = \ ann2.post.exp ann2.stderr.exp ann2.vgtest ann2.cgout \ ann2-basic.rs ann2-more-recent-than-cgout.rs \ ann2-negatives.rs ann2-past-the-end.rs \ - ann2-aux/ann2-via-I.rs \ chdir.vgtest chdir.stderr.exp \ clreq.vgtest clreq.stderr.exp \ dlclose.vgtest dlclose.stderr.exp dlclose.stdout.exp \ diff --git a/cachegrind/tests/ann-diff1.post.exp b/cachegrind/tests/ann-diff1.post.exp index 4e13f0c089..54962b513d 100644 --- a/cachegrind/tests/ann-diff1.post.exp +++ b/cachegrind/tests/ann-diff1.post.exp @@ -8,7 +8,6 @@ Events recorded: Ir I1mr ILmr Dr D1mr DLmr Dw D1mw DLmw Events shown: Ir I1mr ILmr Dr D1mr DLmr Dw D1mw DLmw Event sort order: Ir I1mr ILmr Dr D1mr DLmr Dw D1mw DLmw Threshold: 0.1 -Include dirs: Annotation: on -------------------------------------------------------------------------------- diff --git a/cachegrind/tests/ann-diff2.post.exp b/cachegrind/tests/ann-diff2.post.exp index bcf09ea9ca..e1060dbd23 100644 --- a/cachegrind/tests/ann-diff2.post.exp +++ b/cachegrind/tests/ann-diff2.post.exp @@ -8,7 +8,6 @@ Events recorded: One Two Events shown: One Two Event sort order: One Two Threshold: 0.1 -Include dirs: Annotation: on -------------------------------------------------------------------------------- diff --git a/cachegrind/tests/ann-merge1.post.exp b/cachegrind/tests/ann-merge1.post.exp index f12f1c235d..1f47332b8a 100644 --- a/cachegrind/tests/ann-merge1.post.exp +++ b/cachegrind/tests/ann-merge1.post.exp @@ -9,7 +9,6 @@ Events recorded: A Events shown: A Event sort order: A Threshold: 0.1 -Include dirs: Annotation: on -------------------------------------------------------------------------------- diff --git a/cachegrind/tests/ann1a.post.exp b/cachegrind/tests/ann1a.post.exp index a83767cb0a..bde53e6501 100644 --- a/cachegrind/tests/ann1a.post.exp +++ b/cachegrind/tests/ann1a.post.exp @@ -10,7 +10,6 @@ Events recorded: Ir I1mr ILmr Dr D1mr DLmr Dw D1mw DLmw Events shown: Ir I1mr ILmr Event sort order: Ir I1mr ILmr Dr D1mr DLmr Dw D1mw DLmw Threshold: 0.1 -Include dirs: Annotation: on -------------------------------------------------------------------------------- diff --git a/cachegrind/tests/ann1b.post.exp b/cachegrind/tests/ann1b.post.exp index b76b4236f2..3ec4288cb4 100644 --- a/cachegrind/tests/ann1b.post.exp +++ b/cachegrind/tests/ann1b.post.exp @@ -10,7 +10,6 @@ Events recorded: Ir I1mr ILmr Dr D1mr DLmr Dw D1mw DLmw Events shown: Dw Dr Ir Event sort order: Dr Threshold: 0.1 -Include dirs: Annotation: off -------------------------------------------------------------------------------- diff --git a/cachegrind/tests/ann2-aux/ann2-via-I.rs b/cachegrind/tests/ann2-aux/ann2-via-I.rs deleted file mode 100644 index 5626abf0f7..0000000000 --- a/cachegrind/tests/ann2-aux/ann2-via-I.rs +++ /dev/null @@ -1 +0,0 @@ -one diff --git a/cachegrind/tests/ann2-past-the-end.rs b/cachegrind/tests/ann2-past-the-end.rs index 4cb29ea38f..b2f931a673 100644 --- a/cachegrind/tests/ann2-past-the-end.rs +++ b/cachegrind/tests/ann2-past-the-end.rs @@ -1,3 +1,5 @@ one two three +four +five diff --git a/cachegrind/tests/ann2.cgout b/cachegrind/tests/ann2.cgout index b5d62b1806..2be80fe1ea 100644 --- a/cachegrind/tests/ann2.cgout +++ b/cachegrind/tests/ann2.cgout @@ -71,9 +71,11 @@ fn=neg4 # File with source newer than the cgout file. fl=ann2-past-the-end.rs -# This filename is repeated in ann2-could-not-be-found.rs above. +# No `fn=` line yet, so the function name falls back to `<unspecified>`. +1 1000 500 0 +# This funcname is repeated in ann2-could-not-be-found.rs above. fn=f1 -1 200 100 0 +2 200 100 0 20 300 100 0 21 300 100 0 22 200 0 -1000 @@ -85,11 +87,6 @@ fn=f1 101 3000 2000 0 102 3000 2000 0 -# File found in ann2-aux/, via -I. -fl=ann2-via-I.rs -# No `fn=` line, so the function name falls back to `<unspecified>`. -1 1000 500 0 - # File below the threshold. (It also doesn't exist, but that doesn't matter. We # don't try to open it because it's below the threshold.) fl=ann2-below-threshold.rs diff --git a/cachegrind/tests/ann2.post.exp b/cachegrind/tests/ann2.post.exp index 5cfdbfd1df..8db35f136f 100644 --- a/cachegrind/tests/ann2.post.exp +++ b/cachegrind/tests/ann2.post.exp @@ -7,9 +7,6 @@ Events recorded: A SomeCount VeryLongEventName Events shown: A SomeCount VeryLongEventName Event sort order: A SomeCount VeryLongEventName Threshold: 0.5 -Include dirs: ann2-no-such-dir - ann2-no-such-dir-2 - ann2-aux Annotation: on -------------------------------------------------------------------------------- @@ -33,9 +30,9 @@ A_______________ SomeCount_______ VeryLongEventName > 9,000 (9.0%, 95.6%) 6,000 (6.0%, 99.0%) 0 (n/a, n/a) ann2-could-not-be-found.rs:f1 -> 1,000 (1.0%, 96.6%) 500 (0.5%, 99.5%) 0 (n/a, n/a) ann2-via-I.rs:<unspecified> - -> 1,000 (1.0%, 97.6%) 300 (0.3%, 99.8%) -1,000 (n/a, n/a) ann2-past-the-end.rs:f1 +> 2,000 (2.0%, 97.6%) 800 (0.8%, 99.8%) -1,000 (n/a, n/a) ann2-past-the-end.rs: + 1,000 (1.0%) 500 (0.5%) 0 <unspecified> + 1,000 (1.0%) 300 (0.3%) -1,000 (n/a) f1 > 1,000 (1.0%, 98.6%) 0 (0.0%, 99.8%) 0 (n/a, n/a) ann2-more-recent-than-cgout.rs:new @@ -66,7 +63,7 @@ A_______________ SomeCount_______ VeryLongEventName > 2,000 (2.0%, 95.1%) 100 (0.1%, 97.3%) 0 (n/a, n/a) f2:ann2-basic.rs -> 1,000 (1.0%, 96.1%) 500 (0.5%, 97.8%) 0 (n/a, n/a) <unspecified>:ann2-via-I.rs +> 1,000 (1.0%, 96.1%) 500 (0.5%, 97.8%) 0 (n/a, n/a) <unspecified>:ann2-past-the-end.rs > 1,000 (1.0%, 97.1%) 0 (0.0%, 97.8%) 0 (n/a, n/a) unknown:??? @@ -154,16 +151,17 @@ A____________________ SomeCount_____ VeryLongEventName -------------------------------------------------------------------------------- -- Annotated source file: ann2-past-the-end.rs -------------------------------------------------------------------------------- -A_________ SomeCount_ VeryLongEventName +A___________ SomeCount_ VeryLongEventName -200 (0.2%) 100 (0.1%) 0 one - . . . two - . . . three --- line 3 ---------------------------------------- +1,000 (1.0%) 500 (0.5%) 0 one + 200 (0.2%) 100 (0.1%) 0 two + . . . three + . . . four +-- line 4 ---------------------------------------- -300 (0.3%) 100 (0.1%) 0 <bogus line 20> -300 (0.3%) 100 (0.1%) 0 <bogus line 21> -200 (0.2%) 0 -1,000 (n/a) <bogus line 22> + 300 (0.3%) 100 (0.1%) 0 <bogus line 20> + 300 (0.3%) 100 (0.1%) 0 <bogus line 21> + 200 (0.2%) 0 -1,000 (n/a) <bogus line 22> @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ @@ WARNING @@ WARNING @@ WARNING @@ WARNING @@ WARNING @@ WARNING @@ WARNING @@ @@ -171,13 +169,6 @@ A_________ SomeCount_ VeryLongEventName @@ Information recorded about lines past the end of 'ann2-past-the-end.rs'. @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ --------------------------------------------------------------------------------- --- Annotated source file: ann2-aux/ann2-via-I.rs --------------------------------------------------------------------------------- -A___________ SomeCount_ VeryLongEventName - -1,000 (1.0%) 500 (0.5%) 0 one - -------------------------------------------------------------------------------- -- Annotation summary -------------------------------------------------------------------------------- diff --git a/cachegrind/tests/ann2.vgtest b/cachegrind/tests/ann2.vgtest index 9fb0d1b86f..4add2fe4cc 100644 --- a/cachegrind/tests/ann2.vgtest +++ b/cachegrind/tests/ann2.vgtest @@ -8,6 +8,6 @@ vgopts: --cachegrind-out-file=cachegrind.out # The `sleep` is to ensure the mtime of the second touched file is greater than # the mtime of the first touched file. -post: touch ann2.cgout && sleep 0.1 && touch ann2-more-recent-than-cgout.rs && python3 ../cg_annotate --context 2 --annotate --show-percs=yes --threshold=0.5 -Iann2-no-such-dir --include ann2-no-such-dir-2 -I=ann2-aux ann2.cgout +post: touch ann2.cgout && sleep 0.1 && touch ann2-more-recent-than-cgout.rs && python3 ../cg_annotate --context 2 --annotate --show-percs=yes --threshold=0.5 ann2.cgout cleanup: rm cachegrind.out |
|
From: Paul F. <pa...@so...> - 2023-04-18 20:28:44
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=1e784548a17aec105ed79d53c91c3fd023b2c364 commit 1e784548a17aec105ed79d53c91c3fd023b2c364 Author: Paul Floyd <pj...@wa...> Date: Tue Apr 18 22:27:55 2023 +0200 Bug 468606 - build: remove "Valgrind relies on GCC" check/output Diff: --- NEWS | 1 + configure.ac | 6 ------ 2 files changed, 1 insertion(+), 6 deletions(-) diff --git a/NEWS b/NEWS index 696720e97e..4b18ad9d0a 100644 --- a/NEWS +++ b/NEWS @@ -154,6 +154,7 @@ are not entered into bugzilla tend to get forgotten about or ignored. 467839 Gdbserver: Improve compatibility of library directory name 468401 [PATCH] Add a style file for clang-format 468556 Build failure for vgdb +468606 build: remove "Valgrind relies on GCC" check/output n-i-bz FreeBSD rfork syscall fail with EINVAL or ENOSYS rather than VG_(unimplemented) To see details of a given bug, visit diff --git a/configure.ac b/configure.ac index a439ec85d9..8217136d9e 100755 --- a/configure.ac +++ b/configure.ac @@ -103,12 +103,6 @@ if test "x$LTO_AR" = "x"; then fi AC_ARG_VAR([LTO_AR],[Archiver command for link time optimisation]) - -# Check for the compiler support -if test "${GCC}" != "yes" ; then - AC_MSG_ERROR([Valgrind relies on GCC to be compiled]) -fi - # figure out where perl lives AC_PATH_PROG(PERL, perl) |
|
From: Carl L. <ce...@us...> - 2023-04-18 19:54:14
|
Mark:
On Mon, 2023-04-17 at 09:22 -0700, Carl Love via Valgrind-developers
wrote:
> The test_isa_3_1_R1_RT and test_isa_3_1_R1_XT tests seem to run
> differently then expected. The tests generate multiple lines of
> output
> when only one line was expected. For example:
I have pushed a fix for the two tests. The issue is the tests are
testing load instructions that load relative to the current PC address.
The tests of these instructions adds blocks of OR immediate
instructions before the assembly for the instruction under test.
Unfortunately, the test didn't save and restore the registers touched
by the OR immediate instructions. This is fine as long as you are
calling a function, the touched registers are volitile across a
function call. It seems the more recent GCC is a bit more aggressive
in inlining the test functions. However, the compiler doesn't realize
that the inline OR immediate instructions are touching registers. The
OR immediate instructions were inadvertently changing the value of the
register that held the for loop variable. Thus the loops would execute
more times then expected.
The commit is:
commit 20cc0680c3491e062c76605b24e76dc02e16ef47 (HEAD -> master)
Author: Carl Love <ce...@us...>
Date: Mon Apr 17 17:12:25 2023 -0400
PowerPC:, Fix test test_isa_3_1_R1_RT.c, test_isa_3_1_R1_XT.c
If the commit gets into the current release, great. If not, it is not
an issue. The problem is completely isolated to the test case.
Carl
|
|
From: Carl L. <ca...@so...> - 2023-04-18 19:45:22
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=20cc0680c3491e062c76605b24e76dc02e16ef47 commit 20cc0680c3491e062c76605b24e76dc02e16ef47 Author: Carl Love <ce...@us...> Date: Mon Apr 17 17:12:25 2023 -0400 PowerPC:, Fix test test_isa_3_1_R1_RT.c, test_isa_3_1_R1_XT.c Test adds a block of xori instructions for use with the PC relative tests. The registers used by the xori instructions need to be saved and restored, otherwise the register changes can impact the execution of the for loops in the test as registers are randomly changed. The issue occcurs when GCC is optimizing and inlining the test functions. Diff: --- none/tests/ppc64/isa_3_1_register_defines.h | 1 - none/tests/ppc64/test_isa_3_1_R1_RT.c | 264 ++++++++++++++++++++++++- none/tests/ppc64/test_isa_3_1_R1_RT.stdout.exp | 16 +- none/tests/ppc64/test_isa_3_1_R1_XT.c | 178 +++++++++++++++++ none/tests/ppc64/test_isa_3_1_R1_XT.stdout.exp | 16 +- 5 files changed, 451 insertions(+), 24 deletions(-) diff --git a/none/tests/ppc64/isa_3_1_register_defines.h b/none/tests/ppc64/isa_3_1_register_defines.h index a8c08f5910..ed74992e1f 100644 --- a/none/tests/ppc64/isa_3_1_register_defines.h +++ b/none/tests/ppc64/isa_3_1_register_defines.h @@ -46,4 +46,3 @@ extern unsigned long get_vsrhd_vs26(); extern unsigned long get_vsrhd_vs27(); extern unsigned long get_vsrhd_vs28(); extern unsigned long get_vsrhd_vs29(); - diff --git a/none/tests/ppc64/test_isa_3_1_R1_RT.c b/none/tests/ppc64/test_isa_3_1_R1_RT.c index d73b84b107..33dcddc3e5 100644 --- a/none/tests/ppc64/test_isa_3_1_R1_RT.c +++ b/none/tests/ppc64/test_isa_3_1_R1_RT.c @@ -49,108 +49,304 @@ struct test_list_t current_test; #include "isa_3_1_helpers.h" +#ifdef __powerpc64__ +typedef uint64_t HWord_t; +/* Save and restore all of the registers but rt which is the result of the instruction + under test. Need to ensure the PAD_ORI does not change the other registers. This + really shouldn't be needed but the optimization gets messed up when it inlines the + test function. */ +#define SAVE_REGS(addr) \ + asm volatile( \ + " std 21, 0(%0) \n" \ + " std 22, 8(%0) \n" \ + " std 23, 16(%0) \n" \ + " std 24, 24(%0) \n" \ + " std 25, 32(%0) \n" \ + " std 28, 56(%0) \n" \ + " std 29, 64(%0) \n" \ + " std 30, 72(%0) \n" \ + " std 31, 80(%0) \n" \ + ::"b"(addr)) + +#define SAVE_REG_RT(addr) \ + asm volatile( \ + " std 26, 40(%0) \n" \ + ::"b"(addr)) +#define SAVE_REG_27(addr) \ + asm volatile( \ + " std 27, 40(%0) \n" \ + ::"b"(addr)) + +#define RESTORE_REGS(addr) \ + asm volatile( \ + " ld 21, 0(%0) \n" \ + " ld 22, 8(%0) \n" \ + " ld 23, 16(%0) \n" \ + " ld 24, 24(%0) \n" \ + " ld 25, 32(%0) \n" \ + " ld 28, 56(%0) \n" \ + " ld 29, 64(%0) \n" \ + " ld 30, 72(%0) \n" \ + " ld 31, 80(%0) \n" \ + ::"b"(addr)) + +#define RESTORE_REG_RT(addr) \ + asm volatile( \ + " ld 26, 40(%0) \n" \ + ::"b"(addr)) + +#define RESTORE_REG_27(addr) \ + asm volatile( \ + " ld 27, 40(%0) \n" \ + ::"b"(addr)) + +#else /* !__powerpc64__ */ + +typedef uint32_t HWord_t; +#define SAVE_REGS(addr) \ + asm volatile( \ + " stw 21, 0(%0) \n" \ + " stw 22, 4(%0) \n" \ + " stw 23, 8(%0) \n" \ + " stw 24, 12(%0) \n" \ + " stw 25, 16(%0) \n" \ + " stw 28, 28(%0) \n" \ + " stw 29, 32(%0) \n" \ + " stw 30, 36(%0) \n" \ + " stw 31, 40(%0) \n" \ + ::"b"(addr)) + +#define SAVE_REG_RT(addr) \ + asm volatile( \ + " stw 26, 20(%0) \n" \ + ::"b"(addr)) + +#define SAVE_REG_27(addr) \ + asm volatile( \ + " stw 27, 20(%0) \n" \ + ::"b"(addr)) + +#define RESTORE_REGS(addr) \ + asm volatile( \ + " lwz 21, 0(%0) \n" \ + " lwz 22, 4(%0) \n" \ + " lwz 23, 8(%0) \n" \ + " lwz 24, 12(%0) \n" \ + " lwz 25, 16(%0) \n" \ + " lwz 28, 28(%0) \n" \ + " lwz 29, 32(%0) \n" \ + " lwz 30, 36(%0) \n" \ + " lwz 31, 400(%0) \n" \ + ::"b"(addr)) + +#define RESTORE_REG_RT(addr) \ + asm volatile( \ + " lwz 26, 40(%0) \n" \ + ::"b"(addr)) + +#define RESTORE_REG_27(addr) \ + asm volatile( \ + " lwz 27, 40(%0) \n" \ + ::"b"(addr)) + +#endif /* __powerpc64__ */ + +#define NUM_ENTRIES_SAVE_RESTORE 11 + +HWord_t temp[NUM_ENTRIES_SAVE_RESTORE]; + static void test_plxvp_off0_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_RT(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plxvp 20, +0(0),1" ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_RT(temp); + RESTORE_REG_27(temp); } static void test_plxvp_off8_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_RT(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plxvp 20, +8(0),1" ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_RT(temp); + RESTORE_REG_27(temp); } static void test_plxvp_off16_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_RT(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plxvp 20, +16(0),1" ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_RT(temp); + RESTORE_REG_27(temp); } static void test_plxvp_off24_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_RT(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plxvp 20, +24(0),1" ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_RT(temp); + RESTORE_REG_27(temp); } static void test_plxvp_off32_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_RT(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plxvp 20, +32(0),1" ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_RT(temp); + RESTORE_REG_27(temp); } static void test_plbz_off0_R1 (void) { - PAD_ORI + SAVE_REGS(temp); + SAVE_REG_27(temp); + PAD_ORI __asm__ __volatile__ ("plbz %0, +0(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plbz_off8_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plbz %0, +8(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plbz_off16_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plbz %0, +16(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plbz_off32_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plbz %0, +32(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plbz_off64_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plbz %0, +64(0), 1" : "=r" (rt) ); PAD_ORI PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plhz_off0_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plhz %0, +0(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plhz_off8_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plhz %0, +8(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plhz_off16_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plhz %0, +16(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plhz_off32_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plhz %0, +32(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plhz_off64_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plhz %0, +64(0), 1" : "=r" (rt) ); PAD_ORI PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plha_off0_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plha %0, +0(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plha_off8_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plha %0, +8(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plha_off16_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plha %0, +16(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plha_off32_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plha %0, +32(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plha_off64_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plha %0, +64(0), 1" : "=r" (rt) ); PAD_ORI PAD_ORI + RESTORE_REG_27(temp); + RESTORE_REGS(temp); } static void test_plwz_off0_R1 (void) { __asm__ __volatile__ ("plwz %0, +0(0), 1" : "=r" (rt) ); @@ -162,15 +358,23 @@ static void test_plwz_off16_R1 (void) { __asm__ __volatile__ ("plwz %0, +16(0), 1" : "=r" (rt) ); } static void test_plwz_off32_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plwz %0, +32(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plwz_off64_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plwz %0, +64(0), 1" : "=r" (rt) ); PAD_ORI PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plwa_off0_R1 (void) { __asm__ __volatile__ ("plwa %0, +0(0), 1" : "=r" (rt) ); @@ -182,37 +386,69 @@ static void test_plwa_off16_R1 (void) { __asm__ __volatile__ ("plwa %0, +16(0), 1" : "=r" (rt) ); } static void test_plwa_off32_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plwa %0, +32(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_plwa_off64_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("plwa %0, +64(0), 1" : "=r" (rt) ); PAD_ORI PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_pld_off0_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); + PAD_ORI __asm__ __volatile__ ("pld %0, +0(0), 1" : "=r" (rt) ); + PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_pld_off8_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); + PAD_ORI __asm__ __volatile__ ("pld %0, +8(0), 1" : "=r" (rt) ); + PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_pld_off16_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("pld %0, +16(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_pld_off32_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("pld %0, +32(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_pld_off64_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_27(temp); PAD_ORI __asm__ __volatile__ ("pld %0, +64(0), 1" : "=r" (rt) ); PAD_ORI PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_27(temp); } static void test_pstb_off0_R1 (void) { __asm__ __volatile__ ("pstb %0, -0x1f400+0(0), 1" :: "r" (rs) ); @@ -298,35 +534,49 @@ static void test_paddi_98_R1 (void) { rt = 0xffff0098; } static void test_plq_off0_R1 (void) { + SAVE_REGS(temp); PAD_ORI - __asm__ __volatile__ ("plq 26, +0(0), 1" ); + __asm__ __volatile__ ("plq %0, +0(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); } static void test_plq_off8_R1 (void) { + SAVE_REGS(temp); PAD_ORI - __asm__ __volatile__ ("plq 26, +8(0), 1" ); + __asm__ __volatile__ ("plq %0, +8(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); } static void test_plq_off16_R1 (void) { + SAVE_REGS(temp); PAD_ORI - __asm__ __volatile__ ("plq 26, +16(0), 1" ); + __asm__ __volatile__ ("plq %0, +16(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); } static void test_plq_off32_R1 (void) { + SAVE_REGS(temp); PAD_ORI - __asm__ __volatile__ ("plq 26, +32(0), 1" ); + __asm__ __volatile__ ("plq %0, +32(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); } static void test_plq_off48_R1 (void) { + SAVE_REGS(temp); PAD_ORI - __asm__ __volatile__ ("plq 26, +48(0), 1" ); + __asm__ __volatile__ ("plq %0, +48(0), 1" : "=r" (rt) ); PAD_ORI + RESTORE_REGS(temp); } static void test_plq_off64_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_RT(temp); PAD_ORI - __asm__ __volatile__ ("plq 26, +64(0), 1" ); + __asm__ __volatile__ ("plq %0, +64(0), 1" : "=r" (rt) ); PAD_ORI PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_RT(temp); } static void test_pstq_off0_R1 (void) { __asm__ __volatile__ ("pstq 24, -0x1f400+0(0), 1" ); diff --git a/none/tests/ppc64/test_isa_3_1_R1_RT.stdout.exp b/none/tests/ppc64/test_isa_3_1_R1_RT.stdout.exp index 87594748fd..19011bc08d 100644 --- a/none/tests/ppc64/test_isa_3_1_R1_RT.stdout.exp +++ b/none/tests/ppc64/test_isa_3_1_R1_RT.stdout.exp @@ -16,9 +16,9 @@ plbz off32_R1 => 1b plbz off64_R1 => 1b -pld off0_R1 => e740000004100000 +pld off0_R1 => e74000000410001a -pld off8_R1 => 4e800020 +pld off8_R1 => 62d6001662b5001f pld off16_R1 => 6318001862f7001f @@ -52,11 +52,11 @@ plq off8_R1 => 62d6001662b5001f 6318001862f7001f plq off16_R1 => 6318001862f7001f 635a001a6339001b -plq off32_R1 => 639c001c637b001b 4e80003b +plq off32_R1 => 639c001c637b001b eac90008eaa9001b -plq off48_R1 => 1a 62d6001662b5001f +plq off48_R1 => eb090018eae9001a eb890038eb29003b -plq off64_R1 => 639c001c637b001b 4e80003b +plq off64_R1 => 1111111111111111 eac90008eaa9001b plwa off0_R1 => 4100000 @@ -82,11 +82,11 @@ plxvp off0_R1 => 6318001862f70017 635a001a63390019 ea80000004100000 62d6001662b5 plxvp off8_R1 => 635a001a63390019 639c001c637b001b 62d6001662b50015 6318001862f70017 -plxvp off16_R1 => 639c001c637b001b 000000004e800020 6318001862f70017 635a001a63390019 +plxvp off16_R1 => 639c001c637b001b eac90008eaa90000 6318001862f70017 635a001a63390019 -plxvp off24_R1 => 000000004e800020 0000000000000000 635a001a63390019 639c001c637b001b +plxvp off24_R1 => eac90008eaa90000 eb090018eae90010 635a001a63390019 639c001c637b001b -plxvp off32_R1 => 0000000000000000 62d6001662b50015 639c001c637b001b 000000004e800020 +plxvp off32_R1 => eb090018eae90010 eb890038eb290020 639c001c637b001b eac90008eaa90000 pstb off0_R1 102030405060708 => 08 diff --git a/none/tests/ppc64/test_isa_3_1_R1_XT.c b/none/tests/ppc64/test_isa_3_1_R1_XT.c index 58885b8d30..6c06ee64e4 100644 --- a/none/tests/ppc64/test_isa_3_1_R1_XT.c +++ b/none/tests/ppc64/test_isa_3_1_R1_XT.c @@ -48,6 +48,96 @@ unsigned long current_fpscr; struct test_list_t current_test; #include "isa_3_1_helpers.h" +#ifdef __powerpc64__ +typedef uint64_t HWord_t; + +/* Save and restore all of the registers. Need to ensure the PAD_ORI does not change + the other registers. This really shouldn't be needed but the optimization gets + messed up when it inlines the test function. */ +#define SAVE_REGS(addr) \ + asm volatile( \ + " std 21, 0(%0) \n" \ + " std 22, 8(%0) \n" \ + " std 23, 16(%0) \n" \ + " std 24, 24(%0) \n" \ + " std 25, 32(%0) \n" \ + " std 26, 40(%0) \n" \ + " std 27, 48(%0) \n" \ + " std 29, 64(%0) \n" \ + " std 30, 72(%0) \n" \ + " std 31, 80(%0) \n" \ + ::"b"(addr)) + +#define SAVE_REG_28(addr) \ + asm volatile( \ + " std 28, 56(%0) \n" \ + ::"b"(addr)) + +#define RESTORE_REGS(addr) \ + asm volatile( \ + " ld 21, 0(%0) \n" \ + " ld 22, 8(%0) \n" \ + " ld 23, 16(%0) \n" \ + " ld 24, 24(%0) \n" \ + " ld 25, 32(%0) \n" \ + " ld 26, 40(%0) \n" \ + " ld 27, 48(%0) \n" \ + " ld 29, 64(%0) \n" \ + " ld 30, 72(%0) \n" \ + " ld 31, 80(%0) \n" \ + ::"b"(addr)) + +#define RESTORE_REG_28(addr) \ + asm volatile( \ + " ld 28, 56(%0) \n" \ + ::"b"(addr)) + +#else /* !__powerpc64__ */ + +typedef uint32_t HWord_t; +#define SAVE_REGS(addr) \ + asm volatile( \ + " stw 21, 0(%0) \n" \ + " stw 22, 4(%0) \n" \ + " stw 23, 8(%0) \n" \ + " stw 24, 12(%0) \n" \ + " stw 25, 16(%0) \n" \ + " stw 26, 20(%0) \n" \ + " stw 27, 24(%0) \n" \ + " stw 29, 32(%0) \n" \ + " stw 30, 36(%0) \n" \ + " stw 31, 40(%0) \n" \ + ::"b"(addr)) + +#define SAVE_REG_28(addr) \ + asm volatile( \ + " stw 28, 28(%0) \n" \ + ::"b"(addr)) + +#define RESTORE_REGS(addr) \ + asm volatile( \ + " lwz 21, 0(%0) \n" \ + " lwz 22, 4(%0) \n" \ + " lwz 23, 8(%0) \n" \ + " lwz 24, 12(%0) \n" \ + " lwz 25, 16(%0) \n" \ + " lwz 26, 20(%0) \n" \ + " lwz 27, 24(%0) \n" \ + " lwz 29, 32(%0) \n" \ + " lwz 30, 36(%0) \n" \ + " lwz 31, 400(%0) \n" \ + ::"b"(addr)) + +#define RESTORE_REG_28(addr) \ + asm volatile( \ + " lwz 28, 28(%0) \n" \ + ::"b"(addr)) +#endif /* __powerpc64__ */ + +#define NUM_ENTRIES_SAVE_RESTORE 11 + +HWord_t temp[NUM_ENTRIES_SAVE_RESTORE]; + static void test_pstxvp_off0_R1 (void) { __asm__ __volatile__ ("pstxvp 20, -0x1f400+0(0),1"); } @@ -61,54 +151,78 @@ static void test_pstxvp_off48_R1 (void) { __asm__ __volatile__ ("pstxvp 20, -0x1f400+48(0),1"); } static void test_plfd_64_R1 (void) { + SAVE_REGS(temp); __asm__ __volatile__ ("plfd 28, +64(0), 1"); PAD_ORI PAD_ORI + RESTORE_REGS(temp); } static void test_plfd_32_R1 (void) { + SAVE_REGS(temp); __asm__ __volatile__ ("plfd 28, +32(0), 1"); PAD_ORI + RESTORE_REGS(temp); } static void test_plfd_16_R1 (void) { + SAVE_REGS(temp); __asm__ __volatile__ ("plfd 28, +16(0), 1"); PAD_ORI + RESTORE_REGS(temp); } static void test_plfd_8_R1 (void) { + SAVE_REGS(temp); __asm__ __volatile__ ("plfd 28, +8(0), 1"); PAD_ORI + RESTORE_REGS(temp); } static void test_plfd_4_R1 (void) { + SAVE_REGS(temp); __asm__ __volatile__ ("plfd 28, +4(0), 1"); PAD_ORI + RESTORE_REGS(temp); } static void test_plfd_0_R1 (void) { + SAVE_REGS(temp); __asm__ __volatile__ ("plfd 28, +0(0), 1"); PAD_ORI + RESTORE_REGS(temp); } static void test_plfs_64_R1 (void) { + SAVE_REGS(temp); __asm__ __volatile__ ("plfs 28, +64(0), 1"); PAD_ORI PAD_ORI + RESTORE_REGS(temp); } static void test_plfs_32_R1 (void) { + SAVE_REGS(temp); __asm__ __volatile__ ("plfs 28, +32(0), 1"); PAD_ORI + RESTORE_REGS(temp); } static void test_plfs_16_R1 (void) { + SAVE_REGS(temp); __asm__ __volatile__ ("plfs 28, +16(0), 1"); PAD_ORI + RESTORE_REGS(temp); } static void test_plfs_8_R1 (void) { + SAVE_REGS(temp); __asm__ __volatile__ ("plfs 28, +8(0), 1"); PAD_ORI + RESTORE_REGS(temp); } static void test_plfs_4_R1 (void) { + SAVE_REGS(temp); __asm__ __volatile__ ("plfs 28, +4(0), 1"); PAD_ORI + RESTORE_REGS(temp); } static void test_plfs_0_R1 (void) { + SAVE_REGS(temp); __asm__ __volatile__ ("plfs 28, +0(0), 1"); PAD_ORI + RESTORE_REGS(temp); } static void test_pstfd_32_R1 (void) { __asm__ __volatile__ ("pstfd 26, -0x1f400+32(0), 1"); @@ -141,54 +255,102 @@ static void test_pstfs_0_R1 (void) { __asm__ __volatile__ ("pstfs 26, -0x1f400+0(0), 1"); } static void test_plxsd_64_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxsd %0, +64(0), 1" : "=v" (vrt) ); PAD_ORI PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxsd_32_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ (".align 2 ; plxsd %0, +32(0), 1" : "=v" (vrt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxsd_16_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxsd %0, +16(0), 1; pnop;pnop;pnop; " : "=v" (vrt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxsd_8_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxsd %0, +8(0), 1; pnop;pnop;pnop; " : "=v" (vrt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxsd_4_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxsd %0, +4(0), 1; pnop;pnop;pnop; " : "=v" (vrt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxsd_0_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxsd %0, +0(0), 1; pnop;pnop;pnop; " : "=v" (vrt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxssp_64_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxssp %0, +64(0), 1; pnop;pnop;pnop; " : "=v" (vrt) ); PAD_ORI PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxssp_32_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxssp %0, +32(0), 1; pnop; " : "=v" (vrt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxssp_16_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxssp %0, +16(0), 1; pnop;pnop;pnop; " : "=v" (vrt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxssp_8_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxssp %0, +8(0), 1; pnop;pnop;pnop; " : "=v" (vrt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxssp_4_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxssp %0, +4(0), 1; pnop;pnop;pnop; " : "=v" (vrt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxssp_0_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxssp %0, +0(0), 1; pnop;pnop;pnop; " : "=v" (vrt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } /* Follow the short-range plxv instructions with nop in order to pad out subsequent instructions. When written there are found @@ -196,20 +358,36 @@ static void test_plxssp_0_R1 (void) { into the target variable. (pla,pstxv...). */ static void test_plxv_16_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxv %x0, +16(0), 1; pnop;pnop;pnop;" : "=wa" (vec_xt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxv_8_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxv %x0, +8(0), 1; pnop;pnop;pnop;" : "=wa" (vec_xt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxv_4_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxv %x0, +4(0), 1; pnop;pnop;pnop;" : "=wa" (vec_xt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_plxv_0_R1 (void) { + SAVE_REGS(temp); + SAVE_REG_28(temp); __asm__ __volatile__ ("plxv %x0, +0(0), 1; pnop;pnop;pnop; " : "=wa" (vec_xt) ); PAD_ORI + RESTORE_REGS(temp); + RESTORE_REG_28(temp); } static void test_pstxsd_64_R1 (void) { __asm__ __volatile__ (".align 2 ; pstxsd 22, -0x1f400+64(0), 1" ); diff --git a/none/tests/ppc64/test_isa_3_1_R1_XT.stdout.exp b/none/tests/ppc64/test_isa_3_1_R1_XT.stdout.exp index 48d591f4df..cef5c773fb 100644 --- a/none/tests/ppc64/test_isa_3_1_R1_XT.stdout.exp +++ b/none/tests/ppc64/test_isa_3_1_R1_XT.stdout.exp @@ -26,9 +26,9 @@ plxsd 0_R1 => a800000004100000,0000000000000000 -5.07588375e-116 +Zer plxsd 4_R1 => 7000000a8000004,0000000000000000 5.77662562e-275 +Zero -plxsd 8_R1 => 700000060000000,0000000000000000 5.77662407e-275 +Zero +plxsd 8_R1 => 7000000,0000000000000000 +Den +Zero -plxsd 16_R1 => 7000000,0000000000000000 +Den +Zero +plxsd 16_R1 => 700000060000000,0000000000000000 5.77662407e-275 +Zero plxsd 32_R1 => 6339001963180018,0000000000000000 9.43505226e+169 +Zero @@ -38,21 +38,21 @@ plxssp 0_R1 => 3882000000000000,0000000000000000 6.19888e-05 +Zero plxssp 4_R1 => bd80000080000000,0000000000000000 -6.25000e-02 -Zero +Zero +Zero -plxssp 8_R1 => 38e0000000000000,0000000000000000 1.06812e-04 +Zero +Zero +Zero +plxssp 8_R1 => 4400000000000000,0000000000000000 5.12000e+02 +Zero +Zero +Zero plxssp 16_R1 => 38e0000000000000,0000000000000000 1.06812e-04 +Zero +Zero +Zero plxssp 32_R1 => 445ac002c0000000,0000000000000000 8.75000e+02 -2.00000e+00 +Zero +Zero -plxssp 64_R1 => 446b400340000000,0000000000000000 9.41000e+02 2.00000e+00 +Zero +Zero +plxssp 64_R1 => 4467200320000000,0000000000000000 9.24500e+02 1.08420e-19 +Zero +Zero -plxv 0_R1 => c800000004100000 7000000 +plxv 0_R1 => c800000004100000 700000060000000 -plxv 4_R1 => 7000000c8000004 700000000000000 +plxv 4_R1 => 60000000c8000004 7000000 -plxv 8_R1 => 7000000 7000000 +plxv 8_R1 => 700000060000000 700000000000000 -plxv 16_R1 => 7000000 7000000 +plxv 16_R1 => 700000000000000 700000000000000 pstfd 0_R1 43dfe000003fe000 43eff000000ff000 => e000003fe00043df pstfd 0_R1 43eff000000ff000 43efefffffcff000 => f000000ff00043ef |
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From: Paul F. <pa...@so...> - 2023-04-18 19:19:11
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=04054f36be59eeb337f23932424a7e70bbfeba70 commit 04054f36be59eeb337f23932424a7e70bbfeba70 Author: Paul Floyd <pj...@wa...> Date: Tue Apr 18 21:18:12 2023 +0200 regtest: try to make the nightly script independent of test times Diff: --- nightly/bin/nightly | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/nightly/bin/nightly b/nightly/bin/nightly index d4783f95d4..e41510e51e 100755 --- a/nightly/bin/nightly +++ b/nightly/bin/nightly @@ -146,6 +146,9 @@ for logfile in old new ; do # Grab some indicative text for the short log file -- if the regtests # succeeded, show their results. If we didn't make it that far, show the # last 20 lines. + # Change 68cf3b5dbfecb96c618c371359000daaaf4293b5 added time information to the + # logs, which is fairly variable. The sed filter deletes this so that we don't + # generate spurious diffs. egrep -q '^== [0-9]+ tests' $logfile.verbose && ( echo >> $logfile.short echo "Regression test results follow" >> $logfile.short @@ -157,7 +160,7 @@ for logfile in old new ; do echo >> $logfile.short echo "Last 20 lines of verbose log follow" >> $logfile.short \ echo >> $logfile.short - tail -20 $logfile.verbose >> $logfile.short + tail -20 $logfile.verbose | sed 's/(in [0-9]* sec) -*//' >> $logfile.short fi ) || ( echo >> $logfile.short |
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From: Philippe W. <phi...@sk...> - 2023-04-18 11:02:58
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The nightly build script produces a mail that indicates if there is a difference between the results of one day ago and the new results. When no difference, the mail subject contains 'unchanged'. It looks like the 'unchanged' logic is broken due to the addition of the time taken to run tests. It would be good to keep the 'unchanged' marker only depending on the functional results. Thanks Philippe |
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From: Julian S. <jse...@gm...> - 2023-04-18 07:32:11
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On 18/04/2023 09:14, Paul Floyd wrote: > On 18-04-23 05:30, Nicholas Nethercote wrote: >> Is there any appetite for clang-formatting Valgrind's code? > All that to say is that I'm in favour of using clang-format, Me too; +1 for that. I've lived with the Firefox C++ auto-format stuff for some years now and that has worked out well. In hindsight I'd change the 3 char indents to 2; 2 works well for Fx, and maintain a max width of 80. J |
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From: Nicholas N. <n.n...@gm...> - 2023-04-18 07:28:14
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If I had a single vote for a single element of a new style, it would be to change the 3 space indents to either 4 or 2 :) Nick On Tue, 18 Apr 2023 at 16:49, Paul Floyd <pj...@wa...> wrote: > > > On 18-04-23 05:41, Eyal Soha wrote: > > The problem with doing this is that it really messes with the git blame, > > introducing a lot of changes! > > > > If you do this, you should probably add some sort of formatting check to > > a CI process somewhere, otherwise your work will get stale and you'll > > just be doing the clang-format again in a year from now. > > My goal would be to have some sort of git trigger that maintains > formatting. > > > Good luck to you trying to get everyone to agree on a format! Ha! > > I think that there the battle is mostly won. There are informal "house > rules" and most of the code is 3 space indented with cuddle braces. > There is still a bit of variation (e.g., whether braces indent after > switch or not). > > It is also possible to 'protect' blocks of code from clang-format e.g., > > > int formatted_code; > // clang-format off > void unformatted_code ; > // clang-format on > > (copied from https://clang.llvm.org/docs/ClangFormatStyleOptions.html) > > A+ > Paul > > > > _______________________________________________ > Valgrind-developers mailing list > Val...@li... > https://lists.sourceforge.net/lists/listinfo/valgrind-developers > |
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From: Paul F. <pj...@wa...> - 2023-04-18 07:14:34
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On 18-04-23 05:30, Nicholas Nethercote wrote: > Is there any appetite for clang-formatting Valgrind's code? At work, we have numerous projects that have been worked on by large numbers of people with probably just about every imaginable free code editor. And over 30 years or more. Some teams and sub-projects have fairly consistent formatting. Others have random mixes of tabs and spaces. It drives me mad (it also drives clang-tidy and gcc mad with lots of warnings about inconsistent indentation). All that to say is that I'm in favour of using clang-format, A+ Paul |
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From: Paul F. <pj...@wa...> - 2023-04-18 06:48:38
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On 18-04-23 05:41, Eyal Soha wrote:
> The problem with doing this is that it really messes with the git blame,
> introducing a lot of changes!
>
> If you do this, you should probably add some sort of formatting check to
> a CI process somewhere, otherwise your work will get stale and you'll
> just be doing the clang-format again in a year from now.
My goal would be to have some sort of git trigger that maintains formatting.
> Good luck to you trying to get everyone to agree on a format! Ha!
I think that there the battle is mostly won. There are informal "house
rules" and most of the code is 3 space indented with cuddle braces.
There is still a bit of variation (e.g., whether braces indent after
switch or not).
It is also possible to 'protect' blocks of code from clang-format e.g.,
int formatted_code;
// clang-format off
void unformatted_code ;
// clang-format on
(copied from https://clang.llvm.org/docs/ClangFormatStyleOptions.html)
A+
Paul
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From: Nicholas N. <n.n...@gm...> - 2023-04-18 05:05:48
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On Tue, 18 Apr 2023 at 13:41, Eyal Soha <eya...@gm...> wrote: > The problem with doing this is that it really messes with the git blame, > introducing a lot of changes! > That's always the first objection that is raised. Turns out there's a good solution <https://medium.com/codex/how-to-introduce-a-code-formatter-without-messing-up-git-history-4a16bd074c10> . > If you do this, you should probably add some sort of formatting check to a > CI process somewhere, otherwise your work will get stale and you'll just be > doing the clang-format again in a year from now. > Yes. > Good luck to you trying to get everyone to agree on a format! Ha! > It requires negotiation, but it's doable. Remember, all of this was done successfully for Firefox, which is a much bigger and gnarlier codebase than Valgrind. Nick |
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From: Eyal S. <eya...@gm...> - 2023-04-18 03:41:47
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The problem with doing this is that it really messes with the git blame, introducing a lot of changes! If you do this, you should probably add some sort of formatting check to a CI process somewhere, otherwise your work will get stale and you'll just be doing the clang-format again in a year from now. Good luck to you trying to get everyone to agree on a format! Ha! Eyal On Mon, Apr 17, 2023 at 9:31 PM Nicholas Nethercote <n.n...@gm...> wrote: > Is there any appetite for clang-formatting Valgrind's code? I've now used > auto-formatters in C++, Rust, and Python, and found it an excellent > experience, and I get annoyed when working on code without auto-formatting. > The C++ case was Firefox, where a large and old codebase was formatted. So > it is possible (and better, IMO) to not just limit it to new code. > > It could certainly be done in pieces, e.g. one directory at a time, > something like that. > > Nick > > On Tue, 18 Apr 2023 at 06:07, Paul Floyd <pa...@so...> wrote: > >> >> https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=1b3430761f6bda43b8187dbd342b34cb5c99df3f >> >> commit 1b3430761f6bda43b8187dbd342b34cb5c99df3f >> Author: Paul Floyd <pj...@wa...> >> Date: Mon Apr 17 22:05:30 2023 +0200 >> >> Bug 468401 - [PATCH] Add a style file for clang-format >> >> Patch submitted by: >> Petr Pavlu <pet...@da...> >> >> Diff: >> --- >> .clang-format | 17 +++++++++++++++++ >> .gitignore | 1 + >> NEWS | 1 + >> README_DEVELOPERS | 18 ++++++++++++++++++ >> 4 files changed, 37 insertions(+) >> >> diff --git a/.clang-format b/.clang-format >> new file mode 100644 >> index 0000000000..4450e737ac >> --- /dev/null >> +++ b/.clang-format >> @@ -0,0 +1,17 @@ >> +--- >> +Language: Cpp >> +BasedOnStyle: LLVM >> + >> +AlignConsecutiveAssignments: true >> +AlignConsecutiveDeclarations: true >> +AlignConsecutiveMacros: true >> +AllowAllParametersOfDeclarationOnNextLine: true >> +BinPackParameters: false >> +BreakBeforeBraces: Linux >> +ContinuationIndentWidth: 3 >> +IndentWidth: 3 >> +PointerAlignment: Left >> +# Mark the VG_(), ML_() and tool macros as type declarations which they >> are >> +# sufficiently close to, otherwise clang-format gets confused by them. >> +TypenameMacros: [VG_, ML_, CLG_, DRD_, HG_, MC_] >> +... >> diff --git a/.gitignore b/.gitignore >> index a88ab4dd43..6622e7c59e 100644 >> --- a/.gitignore >> +++ b/.gitignore >> @@ -3,6 +3,7 @@ >> # / >> /.in_place >> /.vs >> +/.clang-format >> /acinclude.m4 >> /aclocal.m4 >> /autom4te-*.cache >> diff --git a/NEWS b/NEWS >> index 43ff9766bd..696720e97e 100644 >> --- a/NEWS >> +++ b/NEWS >> @@ -152,6 +152,7 @@ are not entered into bugzilla tend to get forgotten >> about or ignored. >> 467714 fdleak_* and rlimit tests fail when parent process has more than >> 64 descriptors opened >> 467839 Gdbserver: Improve compatibility of library directory name >> +468401 [PATCH] Add a style file for clang-format >> 468556 Build failure for vgdb >> n-i-bz FreeBSD rfork syscall fail with EINVAL or ENOSYS rather than >> VG_(unimplemented) >> >> diff --git a/README_DEVELOPERS b/README_DEVELOPERS >> index 9c04763d47..979ee13b4a 100644 >> --- a/README_DEVELOPERS >> +++ b/README_DEVELOPERS >> @@ -372,3 +372,21 @@ translated, and that includes the address. >> Then re-run with 999999 changed to the highest bb number shown. >> This will print the one line per block, and also will print a >> disassembly of the block in which the fault occurred. >> + >> + >> +Formatting the code with clang-format >> +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> +clang-format is a tool to format C/C++/... code. The root directory of >> the >> +Valgrind tree contains file .clang-format which is a configuration for >> this tool >> +and specifies a style for Valgrind. This gives you an option to use >> +clang-format to easily format Valgrind code which you are modifying. >> + >> +The Valgrind codebase is not globally formatted with clang-format. It >> means >> +that you should not use the tool to format a complete file after making >> changes >> +in it because that would lead to creating unrelated modifications. >> + >> +The right approach is to format only updated or new code. By using an >> +integration with a text editor, it is possible to reformat arbitrary >> blocks >> +of code with a single keystroke. Refer to the upstream documentation >> which >> +describes integration with various editors and IDEs: >> +https://clang.llvm.org/docs/ClangFormat.html. >> >> >> _______________________________________________ >> Valgrind-developers mailing list >> Val...@li... >> https://lists.sourceforge.net/lists/listinfo/valgrind-developers >> > _______________________________________________ > Valgrind-developers mailing list > Val...@li... > https://lists.sourceforge.net/lists/listinfo/valgrind-developers > |
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From: Nicholas N. <n.n...@gm...> - 2023-04-18 03:30:26
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Is there any appetite for clang-formatting Valgrind's code? I've now used auto-formatters in C++, Rust, and Python, and found it an excellent experience, and I get annoyed when working on code without auto-formatting. The C++ case was Firefox, where a large and old codebase was formatted. So it is possible (and better, IMO) to not just limit it to new code. It could certainly be done in pieces, e.g. one directory at a time, something like that. Nick On Tue, 18 Apr 2023 at 06:07, Paul Floyd <pa...@so...> wrote: > > https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=1b3430761f6bda43b8187dbd342b34cb5c99df3f > > commit 1b3430761f6bda43b8187dbd342b34cb5c99df3f > Author: Paul Floyd <pj...@wa...> > Date: Mon Apr 17 22:05:30 2023 +0200 > > Bug 468401 - [PATCH] Add a style file for clang-format > > Patch submitted by: > Petr Pavlu <pet...@da...> > > Diff: > --- > .clang-format | 17 +++++++++++++++++ > .gitignore | 1 + > NEWS | 1 + > README_DEVELOPERS | 18 ++++++++++++++++++ > 4 files changed, 37 insertions(+) > > diff --git a/.clang-format b/.clang-format > new file mode 100644 > index 0000000000..4450e737ac > --- /dev/null > +++ b/.clang-format > @@ -0,0 +1,17 @@ > +--- > +Language: Cpp > +BasedOnStyle: LLVM > + > +AlignConsecutiveAssignments: true > +AlignConsecutiveDeclarations: true > +AlignConsecutiveMacros: true > +AllowAllParametersOfDeclarationOnNextLine: true > +BinPackParameters: false > +BreakBeforeBraces: Linux > +ContinuationIndentWidth: 3 > +IndentWidth: 3 > +PointerAlignment: Left > +# Mark the VG_(), ML_() and tool macros as type declarations which they > are > +# sufficiently close to, otherwise clang-format gets confused by them. > +TypenameMacros: [VG_, ML_, CLG_, DRD_, HG_, MC_] > +... > diff --git a/.gitignore b/.gitignore > index a88ab4dd43..6622e7c59e 100644 > --- a/.gitignore > +++ b/.gitignore > @@ -3,6 +3,7 @@ > # / > /.in_place > /.vs > +/.clang-format > /acinclude.m4 > /aclocal.m4 > /autom4te-*.cache > diff --git a/NEWS b/NEWS > index 43ff9766bd..696720e97e 100644 > --- a/NEWS > +++ b/NEWS > @@ -152,6 +152,7 @@ are not entered into bugzilla tend to get forgotten > about or ignored. > 467714 fdleak_* and rlimit tests fail when parent process has more than > 64 descriptors opened > 467839 Gdbserver: Improve compatibility of library directory name > +468401 [PATCH] Add a style file for clang-format > 468556 Build failure for vgdb > n-i-bz FreeBSD rfork syscall fail with EINVAL or ENOSYS rather than > VG_(unimplemented) > > diff --git a/README_DEVELOPERS b/README_DEVELOPERS > index 9c04763d47..979ee13b4a 100644 > --- a/README_DEVELOPERS > +++ b/README_DEVELOPERS > @@ -372,3 +372,21 @@ translated, and that includes the address. > Then re-run with 999999 changed to the highest bb number shown. > This will print the one line per block, and also will print a > disassembly of the block in which the fault occurred. > + > + > +Formatting the code with clang-format > +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > +clang-format is a tool to format C/C++/... code. The root directory of > the > +Valgrind tree contains file .clang-format which is a configuration for > this tool > +and specifies a style for Valgrind. This gives you an option to use > +clang-format to easily format Valgrind code which you are modifying. > + > +The Valgrind codebase is not globally formatted with clang-format. It > means > +that you should not use the tool to format a complete file after making > changes > +in it because that would lead to creating unrelated modifications. > + > +The right approach is to format only updated or new code. By using an > +integration with a text editor, it is possible to reformat arbitrary > blocks > +of code with a single keystroke. Refer to the upstream documentation > which > +describes integration with various editors and IDEs: > +https://clang.llvm.org/docs/ClangFormat.html. > > > _______________________________________________ > Valgrind-developers mailing list > Val...@li... > https://lists.sourceforge.net/lists/listinfo/valgrind-developers > |