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From: Julian S. <se...@so...> - 2020-03-09 08:27:07
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=6ef04b381879746585592ccb84ca19622f68e093 commit 6ef04b381879746585592ccb84ca19622f68e093 Author: Julian Seward <js...@ac...> Date: Mon Mar 9 09:08:28 2020 +0100 Update bug status. Diff: --- NEWS | 13 ++++++----- docs/internals/3_15_BUGSTATUS.txt | 49 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 55 insertions(+), 7 deletions(-) diff --git a/NEWS b/NEWS index d8095be..a60062b 100644 --- a/NEWS +++ b/NEWS @@ -117,11 +117,6 @@ where XXXXXX is the bug number as listed below. 416301 s390x: "compare and signal" not supported 416387 finit_module and bpf syscalls are unhandled on arm64 416464 Fix false reports for uninitialized memory for PR_CAPBSET_READ/DROP -n-i-bz Fix minor one time leaks in dhat. -n-i-bz Add --run-cxx-freeres=no in outer args to avoid inner crashes. -n-i-bz Add support for the Linux io_uring system calls -n-i-bz sys_statx: don't complain if both |filename| and |buf| are NULL. -n-i-bz Fix non-glibc build of test suite with s390x_features 416667 gcc10 ppc64le impossible constraint in 'asm' in test_isa. 416753 new 32bit time syscalls for 2038+ 417427 commit to fix vki_siginfo_t definition created numerous regression @@ -129,7 +124,13 @@ n-i-bz Fix non-glibc build of test suite with s390x_features 417452 s390_insn_store_emit: dst->tag for HRcVec128 417578 Add suppressions for glibc DTV leaks 417906 clone with CLONE_VFORK and no CLONE_VM fails -418435 s390x: memcmp test yields extra "Conditional jump or move depends on uninitialised value(s)" +418435 s390x: memcmp test yields extra "Conditional jump or move depends on + uninitialised value(s)" +n-i-bz Fix minor one time leaks in dhat. +n-i-bz Add --run-cxx-freeres=no in outer args to avoid inner crashes. +n-i-bz Add support for the Linux io_uring system calls +n-i-bz sys_statx: don't complain if both |filename| and |buf| are NULL. +n-i-bz Fix non-glibc build of test suite with s390x_features Release 3.15.0 (12 April 2019) diff --git a/docs/internals/3_15_BUGSTATUS.txt b/docs/internals/3_15_BUGSTATUS.txt index adb625b..0ac7ded 100644 --- a/docs/internals/3_15_BUGSTATUS.txt +++ b/docs/internals/3_15_BUGSTATUS.txt @@ -172,9 +172,56 @@ of 3.15.0. It doesn't carry over bugs from earlier versions. === zz_other/x86 ======================================================= +-- Wed 4 Mar 10:48:31 CET 2020 --- Wed 22 Jan 08:57:09 CET 2020 +.416682 [MIPS-Linux] mmap failed under valgrind +.416753 new 32bit time syscalls for 2038+ +In progress + +. 416760 ppc64le Assertion 'VG_IS_16_ALIGNED(sizeof(struct rt_sigframe))' +Seems important. Status unclear. + +.416779 valgrind: m_debuginfo/debuginfo.c:454 +(discard_or_archive_DebugInfo): Assertion '!di->have_dinfo || +is_DebugInfo_active(di)' failed. +WINE wierdness + +.417075 pwritev(vector[...]) suppression ignored + +.394227 [x86] False negative "uninitialised value" report due to not +recognizing simd registers clear by pcmp* (still alive) + +.417175 Valgrind is not working on Android pie. + +.417187 [MIPS] Conditional branch problem since 'grail' changes +It sounds like the MIPS folks have basically solved the problem + +.417238 Test memcheck/tests/vbit-test fails on mips64 BE +Has discussion + +.417264 Musl issues: Fix none/tests/pth_atfork1.c +Uhmm, MUSL + +.417266 Make memcheck/tests/linux/sigqueue usable with musl +Uhmm, MUSL + +.417281 s390x: /bin/true segfaults with "grail" enabled +Ongoing + +.417377 False-positive "uninitialised value(s)" reports from memcheck + +.417572 unhandled instruction bytes: 0xC5 0x79 0xD6 0xED 0xC5 0xF9 0x51 +Ech, some avx thing + +.417578 Add suppressions for glibc DTV leaks +Has patch, should land + +.417993 vbit-test fail on s390x with Iop_Add32: spurious dependency + on uninitialised value +Needs investigation + +.418004 Grail code additions break ppc64 ================== |
|
From: Julian S. <se...@so...> - 2020-03-09 08:23:51
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=3b067535056d7da12d6ca44685e696a99269585e commit 3b067535056d7da12d6ca44685e696a99269585e Author: Julian Seward <js...@ac...> Date: Mon Mar 9 09:22:31 2020 +0100 Bug 415136 - ARMv8.1 Compare-and-Swap instructions are not supported. (TEST CASES). This commit provides test cases for ARMv8.1 CAS instructions, support for which was added in the previous commit. Patch by Assad Hashmi <ass...@li...>. Diff: --- none/tests/arm64/atomics_v81.c | 5117 +++++++++++++- none/tests/arm64/atomics_v81.stdout.exp | 10911 ++++++++++++++++++++++++++++++ 2 files changed, 16013 insertions(+), 15 deletions(-) diff --git a/none/tests/arm64/atomics_v81.c b/none/tests/arm64/atomics_v81.c index aa8f2a5..f0c5b8f 100644 --- a/none/tests/arm64/atomics_v81.c +++ b/none/tests/arm64/atomics_v81.c @@ -7,6 +7,7 @@ #include <stdio.h> #include <malloc.h> #include <stdint.h> +#include <string.h> typedef unsigned char UChar; typedef unsigned int UInt; @@ -59,22 +60,68 @@ CHECK(eor, ^, 64); printf("\n\n"); \ } +#define ATOMIC_TEST_CAS(instruction, rsz, base_addr, mem_val_, rs_, rt_, dsz) \ +{ \ + ULong rs = (ULong)rs_; \ + ULong rt = (ULong)rt_; \ + ULong mem_val = (ULong)mem_val_; \ + \ + ULong mem_val_after; \ + mem_val_after = 0ULL; \ + \ + int pad = (strcmp(#rsz, "w") == 0) ? 8 : 16; \ + printf("%s :: rs %0*llx rt %0*llx rn mem %0*llx\n", \ + instruction, pad, rs, pad, rt, pad, mem_val); \ + \ + Int swap = (rs == mem_val) ? 1 : 0; \ + __asm__ __volatile__( \ + "mov " #rsz "5, %" #rsz "1;" \ + "mov " #rsz "13, %" #rsz "2;" \ + "str " #rsz "13, [x5, #0];" \ + "mov " #rsz "11, %" #rsz "3;" \ + "mov " #rsz "12, %" #rsz "4;" \ + instruction ";" \ + "ldr %" #rsz "0, [x5, #0];" \ + : "=&r" (mem_val_after) \ + : "r" (base_addr), "r" (mem_val), "r" (rs), "r" (rt) \ + : #rsz "5", #rsz "11", #rsz "12", #rsz "13", "memory" \ + ); \ + printf("%s :: rs %0*llx rt %0*llx rn mem %0*llx ", \ + instruction, pad, rs, pad, rt, pad, mem_val_after); \ + if (swap == 1) { \ + if ((mem_val_after & dsz) != (rt & dsz)) \ + printf("FAIL: swapped but mem after != rt"); \ + } \ + else { \ + if ((mem_val_after & dsz) != (mem_val & dsz)) \ + printf("FAIL: no swap but mem after != mem before"); \ + } \ + printf("\n\n"); \ +} + + // Test patterns -#define ALL5s_64 0x5555555555555555ULL -#define ALLas_64 0xAAAAAAAAAAAAAAAAULL -#define ALLfs_64 0xFFFFFFFFFFFFFFFFULL -#define UP_64 0x0123456789ABCDEFULL -#define DOWN_64 0xFEDCBA9876543210ULL -#define PI_64 0x3141592653589793ULL -#define E_64 0x2718281828459045ULL - -#define ALL5s_32 0x55555555ULL -#define ALLas_32 0xAAAAAAAAULL -#define ALLfs_32 0xFFFFFFFFULL -#define UP_32 0x01234567ULL -#define DOWN_32 0xFEDCBA98ULL -#define PI_32 0x31415926ULL -#define E_32 0x27182818ULL +#define ALL5s_64 0x5555555555555555ULL +#define MOST5s_64 0x5555555555555554ULL +#define ALLas_64 0xAAAAAAAAAAAAAAAAULL +#define MOSTas_64 0xAAAAAAAAAAAAAAA8ULL +#define ALLfs_64 0xFFFFFFFFFFFFFFFFULL +#define MOSTfs_64 0xFFFFFFFFFFFFFFFEULL +#define UP_64 0x0123456789ABCDEFULL +#define DOWN_64 0xFEDCBA9876543210ULL +#define PI_64 0x3141592653589793ULL +#define E_64 0x2718281828459045ULL + +#define ALL5s_32 0x55555555ULL +#define MOST5s_32 0x55555554ULL +#define ALLas_32 0xAAAAAAAAULL +#define MOSTas_32 0xAAAAAAA8ULL +#define ALLfs_32 0xFFFFFFFFULL +#define MOSTfs_32 0xFFFFFFFEULL +#define UP_32 0x01234567ULL +#define DOWN_32 0xFEDCBA98ULL +#define PI_32 0x31415926ULL +#define E_32 0x27182818ULL #define ALL5s_16 0x5555ULL #define ALLas_16 0xAAAAULL @@ -452,6 +499,5046 @@ static __attribute((noinline)) void test_atomics ( void ) // LDEORB, LDEORAB, LDEORALB, LDEORLB // LDEORH, LDEORAH, LDEORALH, LDEORLH + printf("CAS <Ws>, <Wt>, [<Xn|SP>]\n"); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, 0, 1, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, 1, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, 1, 1, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 1, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 1, 0, 1, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 1, 1, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 1, 1, 1, 0xFFFFFFFF); + + printf("Combinations of ALL5s_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALL5s_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALL5s_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALL5s_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALL5s_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALL5s_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALL5s_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALL5s_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALL5s_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALL5s_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, 0, 0xFFFFFFFF); + + printf("Combinations of MOST5s_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOST5s_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOST5s_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOST5s_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOST5s_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOST5s_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOST5s_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOST5s_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOST5s_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOST5s_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, 0, 0xFFFFFFFF); + + printf("Combinations of ALLas_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLas_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLas_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLas_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLas_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLas_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLas_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLas_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLas_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLas_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, 0, 0xFFFFFFFF); + + printf("Combinations of MOSTas_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTas_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTas_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTas_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTas_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTas_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTas_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTas_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTas_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTas_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, 0, 0xFFFFFFFF); + + printf("Combinations of ALLfs_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLfs_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLfs_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLfs_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLfs_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLfs_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLfs_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLfs_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLfs_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, ALLfs_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, 0, 0xFFFFFFFF); + + printf("Combinations of MOSTfs_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTfs_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTfs_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTfs_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTfs_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTfs_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTfs_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTfs_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTfs_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, MOSTfs_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, 0, 0xFFFFFFFF); + + printf("Combinations of UP_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, UP_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, UP_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, UP_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, UP_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, UP_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, UP_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, UP_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, UP_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, UP_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, UP_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, UP_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, UP_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, UP_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, UP_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, UP_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, UP_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, UP_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, UP_32, UP_32, 0, 0xFFFFFFFF); + + printf("Combinations of DOWN_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, DOWN_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, DOWN_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, DOWN_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, DOWN_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, DOWN_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, DOWN_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, DOWN_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, DOWN_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, 0, DOWN_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("cas w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, 0, 0xFFFFFFFF); + + printf("CASA <Ws>, <Wt>, [<Xn|SP>]\n\n"); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, 0, 1, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, 1, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, 1, 1, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 1, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 1, 0, 1, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 1, 1, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 1, 1, 1, 0xFFFFFFFF); + + printf("Combinations of ALL5s_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALL5s_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALL5s_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALL5s_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALL5s_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALL5s_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALL5s_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALL5s_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALL5s_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALL5s_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, 0, 0xFFFFFFFF); + + printf("Combinations of MOST5s_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOST5s_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOST5s_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOST5s_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOST5s_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOST5s_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOST5s_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOST5s_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOST5s_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOST5s_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, 0, 0xFFFFFFFF); + + printf("Combinations of ALLas_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLas_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLas_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLas_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLas_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLas_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLas_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLas_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLas_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLas_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, 0, 0xFFFFFFFF); + + printf("Combinations of MOSTas_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTas_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTas_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTas_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTas_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTas_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTas_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTas_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTas_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTas_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, 0, 0xFFFFFFFF); + + printf("Combinations of ALLfs_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLfs_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLfs_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLfs_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLfs_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLfs_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLfs_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLfs_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLfs_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, ALLfs_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, 0, 0xFFFFFFFF); + + printf("Combinations of MOSTfs_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTfs_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTfs_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTfs_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTfs_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTfs_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTfs_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTfs_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTfs_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, MOSTfs_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, 0, 0xFFFFFFFF); + + printf("Combinations of UP_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, UP_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, UP_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, UP_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, UP_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, UP_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, UP_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, UP_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, UP_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, UP_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, UP_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, UP_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, UP_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, UP_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, UP_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, UP_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, UP_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, UP_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, UP_32, UP_32, 0, 0xFFFFFFFF); + + printf("Combinations of DOWN_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, DOWN_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, DOWN_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, DOWN_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, DOWN_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, DOWN_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, DOWN_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, DOWN_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, DOWN_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, 0, DOWN_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casa w11, w12, [x5]", w, mem, DOWN_32, DOWN_32, 0, 0xFFFFFFFF); + + printf("CASAL <Ws>, <Wt>, [<Xn|SP>]\n\n"); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, 0, 1, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, 1, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, 1, 1, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 1, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 1, 0, 1, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 1, 1, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 1, 1, 1, 0xFFFFFFFF); + + printf("Combinations of ALL5s_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALL5s_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALL5s_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALL5s_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALL5s_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALL5s_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALL5s_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALL5s_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALL5s_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALL5s_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALL5s_32, ALL5s_32, 0, 0xFFFFFFFF); + + printf("Combinations of MOST5s_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOST5s_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOST5s_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOST5s_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOST5s_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOST5s_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOST5s_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOST5s_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOST5s_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOST5s_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOST5s_32, MOST5s_32, 0, 0xFFFFFFFF); + + printf("Combinations of ALLas_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLas_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLas_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLas_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLas_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLas_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLas_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLas_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLas_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLas_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLas_32, ALLas_32, 0, 0xFFFFFFFF); + + printf("Combinations of MOSTas_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTas_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTas_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTas_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTas_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTas_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTas_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTas_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTas_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTas_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTas_32, MOSTas_32, 0, 0xFFFFFFFF); + + printf("Combinations of ALLfs_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLfs_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLfs_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLfs_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLfs_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLfs_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLfs_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLfs_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLfs_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, ALLfs_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, ALLfs_32, ALLfs_32, 0, 0xFFFFFFFF); + + printf("Combinations of MOSTfs_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTfs_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTfs_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, 0, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, MOST5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTfs_32, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, 0, ALLas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, ALLas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTfs_32, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, 0, MOSTas_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, MOSTas_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTfs_32, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, 0, ALLfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, ALLfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTfs_32, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, 0, MOSTfs_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, MOSTfs_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTfs_32, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, 0, UP_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, UP_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTfs_32, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, 0, DOWN_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, DOWN_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, MOSTfs_32, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, 0, 0, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, MOSTfs_32, MOSTfs_32, 0, 0xFFFFFFFF); + + printf("Combinations of UP_32 and all other patterns\n"); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, UP_32, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, UP_32, 0, ALL5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, UP_32, UP_32, ALL5s_32, 0xFFFFFFFF); + + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem, 0, UP_32, MOST5s_32, 0xFFFFFFFF); + ATOMIC_TEST_CAS("casal w11, w12, [x5]", w, mem... [truncated message content] |
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From: Julian S. <se...@so...> - 2020-03-09 08:20:55
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=2281c8c8675969537dc734237b60157e8a0fe0d6 commit 2281c8c8675969537dc734237b60157e8a0fe0d6 Author: Julian Seward <js...@ac...> Date: Mon Mar 9 09:18:09 2020 +0100 Bug 415136 - ARMv8.1 Compare-and-Swap instructions are not supported. This commit implements ARMv8.1 CAS instructions. It does not contain test cases; those will be in a subsequent commit. Patch by Assad Hashmi <ass...@li...>. Diff: --- VEX/priv/guest_arm64_toIR.c | 43 +++++++++++++++++++++++++++++++++++++++++++ VEX/priv/host_arm64_defs.c | 29 +++++++++++++++++------------ VEX/priv/host_arm64_defs.h | 7 ++++--- VEX/priv/host_arm64_isel.c | 9 +-------- 4 files changed, 65 insertions(+), 23 deletions(-) diff --git a/VEX/priv/guest_arm64_toIR.c b/VEX/priv/guest_arm64_toIR.c index aae3c6f..c8bfd18 100644 --- a/VEX/priv/guest_arm64_toIR.c +++ b/VEX/priv/guest_arm64_toIR.c @@ -6864,6 +6864,49 @@ Bool dis_ARM64_load_store(/*MB_OUT*/DisResult* dres, UInt insn, return True; } + /* ------------------ ARMv8.1-LSE: Compare-and-Swap ------------------ */ + /* 31 29 22 21 20 15 14 9 4 + sz 0010001 A 1 s R 11111 n t CAS{,A}{,L}<sz> <Rs>, <Rt>, [<Xn|SP>] + */ + if (INSN(29,23) == BITS7(0,0,1,0,0,0,1) + && INSN(21,21) == 1 + && INSN(14,10) == BITS5(1,1,1,1,1)) { + UInt szBlg2 = INSN(31,30); + Bool isAcq = INSN(22,22) == 1; + Bool isRel = INSN(15,15) == 1; + UInt ss = INSN(20,16); + UInt nn = INSN(9,5); + UInt tt = INSN(4,0); + + const HChar* suffix[4] = { "b", "h", "", "" }; + + UInt szB = 1 << szBlg2; /* 1, 2, 4 or 8 */ + IRType ty = integerIRTypeOfSize(szB); + Bool is64 = szB == 8; + + IRExpr *exp = narrowFrom64(ty, getIReg64orZR(ss)); + IRExpr *new = narrowFrom64(ty, getIReg64orZR(tt)); + + if (isAcq) + stmt(IRStmt_MBE(Imbe_Fence)); + + // Store the result back if LHS remains unchanged in memory. + IRTemp old = newTemp(ty); + stmt( IRStmt_CAS(mkIRCAS(/*oldHi*/IRTemp_INVALID, old, + Iend_LE, getIReg64orSP(nn), + /*expdHi*/NULL, exp, + /*dataHi*/NULL, new)) ); + + if (isRel) + stmt(IRStmt_MBE(Imbe_Fence)); + + putIReg64orZR(ss, widenUto64(ty, mkexpr(old))); + DIP("cas%s%s%s %s, %s, [%s]\n", + isAcq ? "a" : "", isRel ? "l" : "", suffix[szBlg2], + nameIRegOrZR(is64, ss), nameIRegOrZR(is64, tt), nameIReg64orSP(nn)); + return True; + } + if (sigill_diag) { vex_printf("ARM64 front end: load_store\n"); } diff --git a/VEX/priv/host_arm64_defs.c b/VEX/priv/host_arm64_defs.c index 33acae9..13a61b0 100644 --- a/VEX/priv/host_arm64_defs.c +++ b/VEX/priv/host_arm64_defs.c @@ -3852,9 +3852,14 @@ Int emit_ARM64Instr ( /*MB_MOD*/Bool* is_profInc, } case ARM64in_CAS: { /* This isn't simple. For an explanation see the comment in - host_arm64_defs.h on the the definition of ARM64Instr case - CAS. */ + host_arm64_defs.h on the definition of ARM64Instr case CAS. + + NOTE: We could place "loop:" after mov/and but then we need + an additional scratch register. + */ /* Generate: + + loop: -- one of: mov x8, x5 // AA0503E8 and x8, x5, #0xFFFFFFFF // 92407CA8 @@ -3872,13 +3877,13 @@ Int emit_ARM64Instr ( /*MB_MOD*/Bool* is_profInc, bne out // 54000061 -- one of: - stxr w1, x7, [x3] // C8017C67 - stxr w1, w7, [x3] // 88017C67 - stxrh w1, w7, [x3] // 48017C67 - stxrb w1, w7, [x3] // 08017C67 + stxr w8, x7, [x3] // C8087C67 + stxr w8, w7, [x3] // 88087C67 + stxrh w8, w7, [x3] // 48087C67 + stxrb w8, w7, [x3] // 08087C67 -- always: - eor x1, x5, x1 // CA0100A1 + cbne w8, loop // 35FFFF68 out: */ switch (i->ARM64in.CAS.szB) { @@ -3897,12 +3902,12 @@ Int emit_ARM64Instr ( /*MB_MOD*/Bool* is_profInc, *p++ = 0xEB08003F; *p++ = 0x54000061; switch (i->ARM64in.CAS.szB) { - case 8: *p++ = 0xC8017C67; break; - case 4: *p++ = 0x88017C67; break; - case 2: *p++ = 0x48017C67; break; - case 1: *p++ = 0x08017C67; break; + case 8: *p++ = 0xC8087C67; break; + case 4: *p++ = 0x88087C67; break; + case 2: *p++ = 0x48087C67; break; + case 1: *p++ = 0x08087C67; break; } - *p++ = 0xCA0100A1; + *p++ = 0x35FFFF68; goto done; } case ARM64in_MFence: { diff --git a/VEX/priv/host_arm64_defs.h b/VEX/priv/host_arm64_defs.h index db50056..63cf2bb 100644 --- a/VEX/priv/host_arm64_defs.h +++ b/VEX/priv/host_arm64_defs.h @@ -679,6 +679,7 @@ typedef Uses x8 as scratch (but that's not allocatable). Hence: RD x3, x5, x7; WR x1 + loop: (szB=8) mov x8, x5 (szB=4) and x8, x5, #0xFFFFFFFF (szB=2) and x8, x5, #0xFFFF @@ -690,10 +691,10 @@ typedef bne after -- if branch taken, failure; x1[[8*szB-1 : 0] holds old value -- attempt to store - stxr w1, x7, [x3] + stxr w8, x7, [x3] -- if store successful, x1==0, so the eor is "x1 := x5" - -- if store failed, x1==1, so the eor makes x1 != x5 - eor x1, x5, x1 + -- if store failed, branch back and try again. + cbne w8, loop after: */ struct { diff --git a/VEX/priv/host_arm64_isel.c b/VEX/priv/host_arm64_isel.c index 4fa50b9..d19b19f 100644 --- a/VEX/priv/host_arm64_isel.c +++ b/VEX/priv/host_arm64_isel.c @@ -3988,14 +3988,7 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt ) addInstr(env, ARM64Instr_CAS(sz)); /* Now we have the lowest szB bytes of x1 are either equal to the lowest szB bytes of x5, indicating success, or they - aren't, indicating failure. The IR semantics actually - require us to return the old value at the location, - regardless of success or failure, but in the case of - failure it's not clear how to do this, since - ARM64Instr_CAS can't provide that. Instead we'll just - return the relevant bit of x1, since that's at least - guaranteed to be different from the lowest bits of x5 on - failure. */ + aren't, indicating failure. */ HReg rResult = hregARM64_X1(); switch (sz) { case 8: break; |
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From: Pavel R. <plr...@gm...> - 2020-03-06 02:46:52
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Hello,
I've been debugging an issue with software behaving differently under
Valgrind and natively. It turns out there is a subtle difference in
signal handling. Without Valgrind, setting a signal handler to SIG_IGN
clears pending signal even if the previous handler was SIG_IGN. Under
Valdrind, the signal remains pending.
I wrote a short program that demonstrated the issue.
Native output:
Signal: not pending, unblocked, handled
Blocking signal
Signal: not pending, blocked, handled
Ignoring signal
Signal: not pending, blocked, ignored
Raising signal
Signal: pending, blocked, ignored
Ignoring signal
Signal: not pending, blocked, ignored
Finished
Output in Valgrind:
Signal: not pending, unblocked, handled
Blocking signal
Signal: not pending, blocked, handled
Ignoring signal
Signal: not pending, blocked, ignored
Raising signal
Signal: pending, blocked, ignored
Ignoring signal
Signal: pending, blocked, ignored
Finished
Please note "pending" at the end.
I don't know which behavior is correct, but I would appreciate if
Valgrind followed the host system more closely.
I'm running Ubuntu 18.04, x86_64, Linux kernel 5.3.0-40-generic. Both
Valgrind 3.15.0 and today's git exhibit the same behavior.
#include <signal.h>
#include <stdio.h>
int signal_number = SIGINT;
void report_status(const char *message)
{
sigset_t pending_mask, blocked_mask;
struct sigaction sa_current;
sigpending(&pending_mask);
sigprocmask(SIG_SETMASK, NULL, &blocked_mask);
sigaction(signal_number, NULL, &sa_current);
printf("Signal: %s, %s, %s\n",
sigismember(&pending_mask, signal_number) ? "pending" : "not pending",
sigismember(&blocked_mask, signal_number) ? "blocked" : "unblocked",
sa_current.sa_handler == SIG_IGN ? "ignored" : "handled");
printf("%s\n", message);
}
int main()
{
struct sigaction sa_ignoring;
sigset_t blocking_mask;
sa_ignoring.sa_handler = SIG_IGN;
sigemptyset(&sa_ignoring.sa_mask);
sa_ignoring.sa_flags = SA_RESTART;
report_status("Blocking signal");
sigemptyset(&blocking_mask);
sigaddset(&blocking_mask, signal_number);
sigprocmask(SIG_BLOCK, &blocking_mask, NULL);
report_status("Ignoring signal");
sigaction(signal_number, &sa_ignoring, NULL);
report_status("Raising signal");
raise(signal_number);
report_status("Ignoring signal");
sigaction(signal_number, &sa_ignoring, NULL);
report_status("Finished");
return 0;
}
--
Regards,
Pavel Roskin
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From: Andreas A. <ar...@so...> - 2020-03-04 17:23:59
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=91bf2d2d8cbf5942d73dc748150945a5c24ecae2 commit 91bf2d2d8cbf5942d73dc748150945a5c24ecae2 Author: Andreas Arnez <ar...@li...> Date: Mon Mar 2 16:22:59 2020 +0100 Bug 418435 - s390x: Avoid extra value dependency in CLC implementation The test memcheck/tests/memcmp currently fails on s390x because it yields the expected "conditional jump or move depends on uninitialised value(s)" message twice instead of just once. This is caused by the handling of the s390x instruction CLC, see s390_irgen_CLC_EX(). When comparing two bytes from the two input strings, the implementation uses the comparison result for a conditional branch to the next instruction. But if no further bytes need to be compared, the comparison result is also used for generating the resulting condition code. There are two cases: Either the inputs are equal; then the resulting condition code is zero. This is what happens in the memcmp test case. Or the inputs are different; then the resulting condition code is 1 or 2 if the first or second operand is greater, respectively. At least in the first case it is easy to avoid the additional dependency, by clearing the condition code explicitly. Just do this. Diff: --- NEWS | 1 + VEX/priv/guest_s390_toIR.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/NEWS b/NEWS index d305c83..d8095be 100644 --- a/NEWS +++ b/NEWS @@ -129,6 +129,7 @@ n-i-bz Fix non-glibc build of test suite with s390x_features 417452 s390_insn_store_emit: dst->tag for HRcVec128 417578 Add suppressions for glibc DTV leaks 417906 clone with CLONE_VFORK and no CLONE_VM fails +418435 s390x: memcmp test yields extra "Conditional jump or move depends on uninitialised value(s)" Release 3.15.0 (12 April 2019) diff --git a/VEX/priv/guest_s390_toIR.c b/VEX/priv/guest_s390_toIR.c index eb3a25b..c27a8d3 100644 --- a/VEX/priv/guest_s390_toIR.c +++ b/VEX/priv/guest_s390_toIR.c @@ -12840,6 +12840,9 @@ s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2) put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); iterate_if(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length))); put_counter_dw0(mkU64(0)); + + /* Equal. Clear CC, to avoid duplicate dependency on the comparison. */ + s390_cc_set_val(0); } static void |
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From: Mark W. <ma...@so...> - 2020-03-04 14:10:25
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=3d6a8157d52f18261f2c1a0888c2cfd3289b371e commit 3d6a8157d52f18261f2c1a0888c2cfd3289b371e Author: Mark Wielaard <ma...@kl...> Date: Fri Feb 28 13:36:31 2020 +0100 Add 32bit time64 syscalls for arm, mips32, ppc32 and x86. This patch adds sycall wrappers for the following syscalls which use a 64bit time_t on 32bit arches: gettime64, settime64, clock_getres_time64, clock_nanosleep_time64, timer_gettime64, timer_settime64, timerfd_gettime64, timerfd_settime64, utimensat_time64, pselect6_time64, ppoll_time64, recvmmsg_time64, mq_timedsend_time64, mq_timedreceive_time64, semtimedop_time64, rt_sigtimedwait_time64, futex_time64 and sched_rr_get_interval_time64. Still missing are clock_adjtime64 and io_pgetevents_time64. For the more complicated syscalls futex[_time64], pselect6[_time64] and ppoll[_time64] there are shared pre and/or post helper functions. Other functions just have their own PRE and POST handler. Note that the vki_timespec64 struct really is the struct as used by by glibc (it internally translates a 32bit timespec struct to a 64bit timespec64 struct before passing it to any of the time64 syscalls). The kernel uses a 64-bit signed int, but is ignoring the upper 32 bits of the tv_nsec field. It does always write the full struct though. So avoid checking the padding is only needed for PRE_MEM_READ. There are two helper pre_read_timespec64 and pre_read_itimerspec64 to check the new structs. https://bugs.kde.org/show_bug.cgi?id=416753 Diff: --- NEWS | 1 + coregrind/m_syswrap/priv_syswrap-linux.h | 22 ++ coregrind/m_syswrap/syswrap-arm-linux.c | 24 +- coregrind/m_syswrap/syswrap-linux.c | 531 ++++++++++++++++++++++++++--- coregrind/m_syswrap/syswrap-mips32-linux.c | 24 +- coregrind/m_syswrap/syswrap-ppc32-linux.c | 22 ++ coregrind/m_syswrap/syswrap-x86-linux.c | 22 ++ include/vki/vki-linux.h | 26 ++ 8 files changed, 631 insertions(+), 41 deletions(-) diff --git a/NEWS b/NEWS index afe8872..d305c83 100644 --- a/NEWS +++ b/NEWS @@ -123,6 +123,7 @@ n-i-bz Add support for the Linux io_uring system calls n-i-bz sys_statx: don't complain if both |filename| and |buf| are NULL. n-i-bz Fix non-glibc build of test suite with s390x_features 416667 gcc10 ppc64le impossible constraint in 'asm' in test_isa. +416753 new 32bit time syscalls for 2038+ 417427 commit to fix vki_siginfo_t definition created numerous regression errors on ppc64 417452 s390_insn_store_emit: dst->tag for HRcVec128 diff --git a/coregrind/m_syswrap/priv_syswrap-linux.h b/coregrind/m_syswrap/priv_syswrap-linux.h index 0cfe782..708e5fd 100644 --- a/coregrind/m_syswrap/priv_syswrap-linux.h +++ b/coregrind/m_syswrap/priv_syswrap-linux.h @@ -393,6 +393,28 @@ DECL_TEMPLATE(linux, sys_socketpair); DECL_TEMPLATE(linux, sys_kcmp); DECL_TEMPLATE(linux, sys_copy_file_range); +/* 64bit time_t syscalls for 32bit arches. */ +DECL_TEMPLATE(linux, sys_clock_gettime64) +DECL_TEMPLATE(linux, sys_clock_settime64) +// clock_adjtime64 +DECL_TEMPLATE(linux, sys_clock_getres_time64) +DECL_TEMPLATE(linux, sys_clock_nanosleep_time64); +DECL_TEMPLATE(linux, sys_timer_gettime64); +DECL_TEMPLATE(linux, sys_timer_settime64); +DECL_TEMPLATE(linux, sys_timerfd_gettime64); +DECL_TEMPLATE(linux, sys_timerfd_settime64); +DECL_TEMPLATE(linux, sys_utimensat_time64); +DECL_TEMPLATE(linux, sys_pselect6_time64); +DECL_TEMPLATE(linux, sys_ppoll_time64); +// io_pgetevents_time64 +DECL_TEMPLATE(linux, sys_recvmmsg_time64); +DECL_TEMPLATE(linux, sys_mq_timedsend_time64); +DECL_TEMPLATE(linux, sys_mq_timedreceive_time64); +DECL_TEMPLATE(linux, sys_semtimedop_time64); +DECL_TEMPLATE(linux, sys_rt_sigtimedwait_time64); +DECL_TEMPLATE(linux, sys_futex_time64); +DECL_TEMPLATE(linux, sys_sched_rr_get_interval_time64); + // Some arch specific functions called from syswrap-linux.c extern Int do_syscall_clone_x86_linux ( Word (*fn)(void *), void* stack, diff --git a/coregrind/m_syswrap/syswrap-arm-linux.c b/coregrind/m_syswrap/syswrap-arm-linux.c index 18468f0..3722cdd 100644 --- a/coregrind/m_syswrap/syswrap-arm-linux.c +++ b/coregrind/m_syswrap/syswrap-arm-linux.c @@ -742,7 +742,7 @@ static SyscallTableEntry syscall_main_table[] = { LINX_(__NR_sched_get_priority_max, sys_sched_get_priority_max),// 159 LINX_(__NR_sched_get_priority_min, sys_sched_get_priority_min),// 160 -//zz //LINX?(__NR_sched_rr_get_interval, sys_sched_rr_get_interval), // 161 */* + LINXY(__NR_sched_rr_get_interval, sys_sched_rr_get_interval), // 161 GENXY(__NR_nanosleep, sys_nanosleep), // 162 GENX_(__NR_mremap, sys_mremap), // 163 LINX_(__NR_setresuid, sys_setresuid16), // 164 @@ -1020,6 +1020,28 @@ static SyscallTableEntry syscall_main_table[] = { LINX_(__NR_pwritev2, sys_pwritev2), // 393 LINXY(__NR_statx, sys_statx), // 397 + + LINXY(__NR_clock_gettime64, sys_clock_gettime64), // 403 + LINX_(__NR_clock_settime64, sys_clock_settime64), // 404 + + LINXY(__NR_clock_getres_time64, sys_clock_getres_time64), // 406 + LINXY(__NR_clock_nanosleep_time64, sys_clock_nanosleep_time64), // 407 + LINXY(__NR_timer_gettime64, sys_timer_gettime64), // 408 + LINXY(__NR_timer_settime64, sys_timer_settime64), // 409 + LINXY(__NR_timerfd_gettime64, sys_timerfd_gettime64),// 410 + LINXY(__NR_timerfd_settime64, sys_timerfd_settime64),// 411 + LINX_(__NR_utimensat_time64, sys_utimensat_time64), // 412 + LINXY(__NR_pselect6_time64, sys_pselect6_time64), // 413 + LINXY(__NR_ppoll_time64, sys_ppoll_time64), // 414 + + LINXY(__NR_recvmmsg_time64, sys_recvmmsg_time64), // 417 + LINX_(__NR_mq_timedsend_time64, sys_mq_timedsend_time64), // 418 + LINXY(__NR_mq_timedreceive_time64, sys_mq_timedreceive_time64), // 419 + LINX_(__NR_semtimedop_time64, sys_semtimedop_time64),// 420 + LINXY(__NR_rt_sigtimedwait_time64, sys_rt_sigtimedwait_time64), // 421 + LINXY(__NR_futex_time64, sys_futex_time64), // 422 + LINXY(__NR_sched_rr_get_interval_time64, + sys_sched_rr_get_interval_time64), // 423 }; diff --git a/coregrind/m_syswrap/syswrap-linux.c b/coregrind/m_syswrap/syswrap-linux.c index 87334c9..1190a57 100644 --- a/coregrind/m_syswrap/syswrap-linux.c +++ b/coregrind/m_syswrap/syswrap-linux.c @@ -1622,7 +1622,23 @@ POST(sys_sendfile64) } } -PRE(sys_futex) +static void pre_read_timespec64 (ThreadId tid, const char *msg, UWord arg) +{ + struct vki_timespec64 *ts64 = (void *)(Addr)arg; + PRE_MEM_READ (msg, (Addr) &ts64->tv_sec, sizeof(vki_time64_t)); + PRE_MEM_READ (msg, (Addr) &ts64->tv_nsec, sizeof(vki_int32_t)); +} + +static void pre_read_itimerspec64 (ThreadId tid, const char *msg, UWord arg) +{ + struct vki_itimerspec64 *its64 = (void *)(Addr)arg; + pre_read_timespec64 (tid, msg, (UWord) &its64->it_interval); + pre_read_timespec64 (tid, msg, (UWord) &its64->it_value); +} + +static void futex_pre_helper ( ThreadId tid, SyscallArgLayout* layout, + SyscallArgs* arrghs, SyscallStatus* status, + UWord* flags, Bool is_time64 ) { /* arg param used by ops @@ -1634,21 +1650,32 @@ PRE(sys_futex) ARG5 - u32 *uaddr2 REQUEUE,CMP_REQUEUE ARG6 - int val3 CMP_REQUEUE */ - PRINT("sys_futex ( %#" FMT_REGWORD "x, %ld, %ld, %#" FMT_REGWORD - "x, %#" FMT_REGWORD "x )", ARG1, SARG2, SARG3, ARG4, ARG5); + switch(ARG2 & ~(VKI_FUTEX_PRIVATE_FLAG|VKI_FUTEX_CLOCK_REALTIME)) { case VKI_FUTEX_CMP_REQUEUE: case VKI_FUTEX_WAKE_OP: case VKI_FUTEX_CMP_REQUEUE_PI: - PRE_REG_READ6(long, "futex", - vki_u32 *, futex, int, op, int, val, - struct timespec *, utime, vki_u32 *, uaddr2, int, val3); + if (is_time64) { + PRE_REG_READ6(long, "futex_time64", + vki_u32 *, futex, int, op, int, val, + struct timespec64 *, utime, vki_u32 *, uaddr2, int, val3); + } else { + PRE_REG_READ6(long, "futex", + vki_u32 *, futex, int, op, int, val, + struct timespec *, utime, vki_u32 *, uaddr2, int, val3); + } break; case VKI_FUTEX_REQUEUE: case VKI_FUTEX_WAIT_REQUEUE_PI: - PRE_REG_READ5(long, "futex", - vki_u32 *, futex, int, op, int, val, - struct timespec *, utime, vki_u32 *, uaddr2); + if (is_time64) { + PRE_REG_READ5(long, "futex_time64", + vki_u32 *, futex, int, op, int, val, + struct timespec64 *, utime, vki_u32 *, uaddr2); + } else { + PRE_REG_READ5(long, "futex", + vki_u32 *, futex, int, op, int, val, + struct timespec *, utime, vki_u32 *, uaddr2); + } break; case VKI_FUTEX_WAIT_BITSET: /* Check that the address at least begins in client-accessible area. */ @@ -1657,15 +1684,27 @@ PRE(sys_futex) return; } if (*(vki_u32 *)(Addr)ARG1 != ARG3) { - PRE_REG_READ4(long, "futex", - vki_u32 *, futex, int, op, int, val, - struct timespec *, utime); + if (is_time64) { + PRE_REG_READ4(long, "futex_time64", + vki_u32 *, futex, int, op, int, val, + struct timespec64 *, utime); + } else { + PRE_REG_READ4(long, "futex", + vki_u32 *, futex, int, op, int, val, + struct timespec64 *, utime); + } } else { /* Note argument 5 is unused, but argument 6 is used. So we cannot just PRE_REG_READ6. Read argument 6 separately. */ - PRE_REG_READ4(long, "futex", - vki_u32 *, futex, int, op, int, val, - struct timespec *, utime); + if (is_time64) { + PRE_REG_READ4(long, "futex_time64", + vki_u32 *, futex, int, op, int, val, + struct timespec64 *, utime); + } else { + PRE_REG_READ4(long, "futex", + vki_u32 *, futex, int, op, int, val, + struct timespec *, utime); + } if (VG_(tdict).track_pre_reg_read) PRA6("futex",int,val3); } @@ -1679,9 +1718,15 @@ PRE(sys_futex) break; case VKI_FUTEX_WAIT: case VKI_FUTEX_LOCK_PI: - PRE_REG_READ4(long, "futex", - vki_u32 *, futex, int, op, int, val, - struct timespec *, utime); + if (is_time64) { + PRE_REG_READ4(long, "futex_time64", + vki_u32 *, futex, int, op, int, val, + struct timespec64 *, utime); + } else { + PRE_REG_READ4(long, "futex", + vki_u32 *, futex, int, op, int, val, + struct timespec *, utime); + } break; case VKI_FUTEX_WAKE: case VKI_FUTEX_FD: @@ -1703,8 +1748,14 @@ PRE(sys_futex) case VKI_FUTEX_WAIT_BITSET: case VKI_FUTEX_WAIT_REQUEUE_PI: PRE_MEM_READ( "futex(futex)", ARG1, sizeof(Int) ); - if (ARG4 != 0) - PRE_MEM_READ( "futex(timeout)", ARG4, sizeof(struct vki_timespec) ); + if (ARG4 != 0) { + if (is_time64) { + pre_read_timespec64 (tid, "futex_time64(timeout)", ARG4); + } else { + PRE_MEM_READ( "futex(timeout)", ARG4, + sizeof(struct vki_timespec) ); + } + } break; case VKI_FUTEX_REQUEUE: @@ -1728,7 +1779,9 @@ PRE(sys_futex) break; } } -POST(sys_futex) + +static void futex_post_helper ( ThreadId tid, SyscallArgs* arrghs, + SyscallStatus* status ) { vg_assert(SUCCESS); POST_MEM_WRITE( ARG1, sizeof(int) ); @@ -1743,6 +1796,30 @@ POST(sys_futex) } } +PRE(sys_futex) +{ + PRINT("sys_futex ( %#" FMT_REGWORD "x, %ld, %ld, %#" FMT_REGWORD + "x, %#" FMT_REGWORD "x )", ARG1, SARG2, SARG3, ARG4, ARG5); + futex_pre_helper (tid, layout, arrghs, status, flags, False); +} + +POST(sys_futex) +{ + futex_post_helper (tid, arrghs, status); +} + +PRE(sys_futex_time64) +{ + PRINT("sys_futex_time64 ( %#" FMT_REGWORD "x, %ld, %ld, %#" FMT_REGWORD + "x, %#" FMT_REGWORD "x )", ARG1, SARG2, SARG3, ARG4, ARG5); + futex_pre_helper (tid, layout, arrghs, status, flags, True); +} + +POST(sys_futex_time64) +{ + futex_post_helper (tid, arrghs, status); +} + PRE(sys_set_robust_list) { PRINT("sys_set_robust_list ( %#" FMT_REGWORD "x, %" @@ -1785,16 +1862,22 @@ struct pselect_adjusted_sigset { vki_sigset_t adjusted_ss; }; -PRE(sys_pselect6) +static void pselect6_pre_helper ( ThreadId tid, SyscallArgLayout* layout, + SyscallArgs* arrghs, SyscallStatus* status, + UWord* flags, Bool is_time64 ) { *flags |= SfMayBlock | SfPostOnFail; - PRINT("sys_pselect6 ( %ld, %#" FMT_REGWORD "x, %#" FMT_REGWORD "x, %#" - FMT_REGWORD "x, %#" FMT_REGWORD "x, %#" FMT_REGWORD "x )", - SARG1, ARG2, ARG3, ARG4, ARG5, ARG6); - PRE_REG_READ6(long, "pselect6", - int, n, vki_fd_set *, readfds, vki_fd_set *, writefds, - vki_fd_set *, exceptfds, struct vki_timeval *, timeout, - void *, sig); + if (is_time64) { + PRE_REG_READ6(long, "pselect6_time64", + int, n, vki_fd_set *, readfds, vki_fd_set *, writefds, + vki_fd_set *, exceptfds, struct vki_timespec64 *, timeout, + void *, sig); + } else { + PRE_REG_READ6(long, "pselect6", + int, n, vki_fd_set *, readfds, vki_fd_set *, writefds, + vki_fd_set *, exceptfds, struct vki_timespec *, timeout, + void *, sig); + } // XXX: this possibly understates how much memory is read. if (ARG2 != 0) PRE_MEM_READ( "pselect6(readfds)", @@ -1805,8 +1888,14 @@ PRE(sys_pselect6) if (ARG4 != 0) PRE_MEM_READ( "pselect6(exceptfds)", ARG4, ARG1/8 /* __FD_SETSIZE/8 */ ); - if (ARG5 != 0) - PRE_MEM_READ( "pselect6(timeout)", ARG5, sizeof(struct vki_timeval) ); + if (ARG5 != 0) { + if (is_time64) { + pre_read_timespec64(tid, "pselect6_time64(timeout)", ARG5); + } else { + PRE_MEM_READ( "pselect6(timeout)", ARG5, + sizeof(struct vki_timespec) ); + } + } if (ARG6 != 0) { const struct pselect_sized_sigset *pss = (struct pselect_sized_sigset *)(Addr)ARG6; @@ -1834,6 +1923,15 @@ PRE(sys_pselect6) } } } + +PRE(sys_pselect6) +{ + PRINT("sys_pselect6 ( %ld, %#" FMT_REGWORD "x, %#" FMT_REGWORD "x, %#" + FMT_REGWORD "x, %#" FMT_REGWORD "x, %#" FMT_REGWORD "x )", + SARG1, ARG2, ARG3, ARG4, ARG5, ARG6); + pselect6_pre_helper (tid, layout, arrghs, status, flags, False); +} + POST(sys_pselect6) { if (ARG6 != 0 && ARG6 != 1) { @@ -1841,7 +1939,24 @@ POST(sys_pselect6) } } -PRE(sys_ppoll) +PRE(sys_pselect6_time64) +{ + PRINT("sys_pselect6_time64 ( %ld, %#" FMT_REGWORD "x, %#" FMT_REGWORD "x, %#" + FMT_REGWORD "x, %#" FMT_REGWORD "x, %#" FMT_REGWORD "x )", + SARG1, ARG2, ARG3, ARG4, ARG5, ARG6); + pselect6_pre_helper (tid, layout, arrghs, status, flags, True); +} + +POST(sys_pselect6_time64) +{ + if (ARG6 != 0 && ARG6 != 1) { + VG_(free)((struct pselect_adjusted_sigset *)(Addr)ARG6); + } +} + +static void ppoll_pre_helper ( ThreadId tid, SyscallArgLayout* layout, + SyscallArgs* arrghs, SyscallStatus* status, + UWord* flags, Bool is_time64 ) { UInt i; struct vki_pollfd* ufds = (struct vki_pollfd *)(Addr)ARG1; @@ -1849,10 +1964,17 @@ PRE(sys_ppoll) PRINT("sys_ppoll ( %#" FMT_REGWORD "x, %" FMT_REGWORD "u, %#" FMT_REGWORD "x, %#" FMT_REGWORD "x, %" FMT_REGWORD "u )\n", ARG1, ARG2, ARG3, ARG4, ARG5); - PRE_REG_READ5(long, "ppoll", - struct vki_pollfd *, ufds, unsigned int, nfds, - struct vki_timespec *, tsp, vki_sigset_t *, sigmask, - vki_size_t, sigsetsize); + if (is_time64) { + PRE_REG_READ5(long, "ppoll_time64", + struct vki_pollfd *, ufds, unsigned int, nfds, + struct vki_timespec64 *, tsp, vki_sigset_t *, sigmask, + vki_size_t, sigsetsize); + } else { + PRE_REG_READ5(long, "ppoll", + struct vki_pollfd *, ufds, unsigned int, nfds, + struct vki_timespec *, tsp, vki_sigset_t *, sigmask, + vki_size_t, sigsetsize); + } for (i = 0; i < ARG2; i++) { PRE_MEM_READ( "ppoll(ufds.fd)", @@ -1863,8 +1985,14 @@ PRE(sys_ppoll) (Addr)(&ufds[i].revents), sizeof(ufds[i].revents) ); } - if (ARG3) - PRE_MEM_READ( "ppoll(tsp)", ARG3, sizeof(struct vki_timespec) ); + if (ARG3) { + if (is_time64) { + pre_read_timespec64(tid, "ppoll_time64(tsp)", ARG3); + } else { + PRE_MEM_READ( "ppoll(tsp)", ARG3, + sizeof(struct vki_timespec) ); + } + } if (ARG4 != 0 && sizeof(vki_sigset_t) == ARG5) { const vki_sigset_t *guest_sigmask = (vki_sigset_t *)(Addr)ARG4; PRE_MEM_READ( "ppoll(sigmask)", ARG4, ARG5); @@ -1880,7 +2008,8 @@ PRE(sys_ppoll) } } -POST(sys_ppoll) +static void ppoll_post_helper ( ThreadId tid, SyscallArgs* arrghs, + SyscallStatus* status ) { vg_assert(SUCCESS || FAILURE); if (SUCCESS && (RES >= 0)) { @@ -1894,6 +2023,32 @@ POST(sys_ppoll) } } +PRE(sys_ppoll) +{ + PRINT("sys_ppoll ( %#" FMT_REGWORD "x, %" FMT_REGWORD "u, %#" FMT_REGWORD + "x, %#" FMT_REGWORD "x, %" FMT_REGWORD "u )\n", + ARG1, ARG2, ARG3, ARG4, ARG5); + ppoll_pre_helper (tid, layout, arrghs, status, flags, False); +} + +POST(sys_ppoll) +{ + ppoll_post_helper (tid, arrghs, status); +} + +PRE(sys_ppoll_time64) +{ + PRINT("sys_ppoll_time64 ( %#" FMT_REGWORD "x, %" FMT_REGWORD + "u, %#" FMT_REGWORD "x, %#" FMT_REGWORD "x, %" FMT_REGWORD "u )\n", + ARG1, ARG2, ARG3, ARG4, ARG5); + ppoll_pre_helper (tid, layout, arrghs, status, flags, False); +} + +POST(sys_ppoll_time64) +{ + ppoll_post_helper (tid, arrghs, status); +} + /* --------------------------------------------------------------------- epoll_* wrappers @@ -2682,6 +2837,25 @@ PRE(sys_mq_timedsend) } } +PRE(sys_mq_timedsend_time64) +{ + *flags |= SfMayBlock; + PRINT("sys_mq_timedsend_time64 ( %ld, %#" FMT_REGWORD "x, %" FMT_REGWORD + "u, %" FMT_REGWORD "u, %#" FMT_REGWORD "x )", + SARG1,ARG2,ARG3,ARG4,ARG5); + PRE_REG_READ5(long, "mq_timedsend_time64", + vki_mqd_t, mqdes, const char *, msg_ptr, vki_size_t, msg_len, + unsigned int, msg_prio, + const struct vki_timespec64 *, abs_timeout); + if (!ML_(fd_allowed)(ARG1, "mq_timedsend_time64", tid, False)) { + SET_STATUS_Failure( VKI_EBADF ); + } else { + PRE_MEM_READ( "mq_timedsend_time64(msg_ptr)", ARG2, ARG3 ); + if (ARG5 != 0) + pre_read_timespec64(tid, "mq_timedsend_time64(abs_timeout)", ARG5); + } +} + PRE(sys_mq_timedreceive) { *flags |= SfMayBlock; @@ -2711,6 +2885,35 @@ POST(sys_mq_timedreceive) POST_MEM_WRITE( ARG4, sizeof(unsigned int) ); } +PRE(sys_mq_timedreceive_time64) +{ + *flags |= SfMayBlock; + PRINT("sys_mq_timedreceive_time64( %ld, %#" FMT_REGWORD "x, %" + FMT_REGWORD "u, %#" FMT_REGWORD "x, %#" FMT_REGWORD "x )", + SARG1,ARG2,ARG3,ARG4,ARG5); + PRE_REG_READ5(ssize_t, "mq_timedreceive_time64", + vki_mqd_t, mqdes, char *, msg_ptr, vki_size_t, msg_len, + unsigned int *, msg_prio, + const struct vki_timespec64 *, abs_timeout); + if (!ML_(fd_allowed)(ARG1, "mq_timedreceive_time64", tid, False)) { + SET_STATUS_Failure( VKI_EBADF ); + } else { + PRE_MEM_WRITE( "mq_timedreceive_time64(msg_ptr)", ARG2, ARG3 ); + if (ARG4 != 0) + PRE_MEM_WRITE( "mq_timedreceive_time64(msg_prio)", + ARG4, sizeof(unsigned int) ); + if (ARG5 != 0) + pre_read_timespec64(tid, "mq_timedreceive_time64(abs_timeout)", ARG5); + } +} + +POST(sys_mq_timedreceive_time64) +{ + POST_MEM_WRITE( ARG2, RES ); + if (ARG4 != 0) + POST_MEM_WRITE( ARG4, sizeof(unsigned int) ); +} + PRE(sys_mq_notify) { PRINT("sys_mq_notify( %ld, %#" FMT_REGWORD "x )", SARG1, ARG2 ); @@ -2761,6 +2964,14 @@ PRE(sys_clock_settime) PRE_MEM_READ( "clock_settime(tp)", ARG2, sizeof(struct vki_timespec) ); } +PRE(sys_clock_settime64) +{ + PRINT("sys_clock_settime64( %ld, %#" FMT_REGWORD "x )", SARG1, ARG2); + PRE_REG_READ2(long, "clock_settime64", + vki_clockid_t, clk_id, const struct timespec64 *, tp); + pre_read_timespec64(tid, "clock_settime64(tp)", ARG2); +} + PRE(sys_clock_gettime) { PRINT("sys_clock_gettime( %ld, %#" FMT_REGWORD "x )" , SARG1, ARG2); @@ -2773,6 +2984,19 @@ POST(sys_clock_gettime) POST_MEM_WRITE( ARG2, sizeof(struct vki_timespec) ); } +PRE(sys_clock_gettime64) +{ + PRINT("sys_clock_gettime64( %ld, %#" FMT_REGWORD "x )" , SARG1, ARG2); + PRE_REG_READ2(long, "clock_gettime64", + vki_clockid_t, clk_id, struct vki_timespec64 *, tp); + PRE_MEM_WRITE ( "clock_gettime64(tp)", ARG2, + sizeof(struct vki_timespec64) ); +} +POST(sys_clock_gettime64) +{ + POST_MEM_WRITE( ARG2, sizeof(struct vki_timespec64) ); +} + PRE(sys_clock_getres) { PRINT("sys_clock_getres( %ld, %#" FMT_REGWORD "x )" , SARG1, ARG2); @@ -2789,6 +3013,23 @@ POST(sys_clock_getres) POST_MEM_WRITE( ARG2, sizeof(struct vki_timespec) ); } +PRE(sys_clock_getres_time64) +{ + PRINT("sys_clock_getres_time64( %ld, %#" FMT_REGWORD "x )" , SARG1, ARG2); + // Nb: we can't use "RES" as the param name because that's a macro + // defined above! + PRE_REG_READ2(long, "clock_getres_time64", + vki_clockid_t, clk_id, struct vki_timespec64 *, res); + if (ARG2 != 0) + PRE_MEM_WRITE( "clock_getres_time64(res)", ARG2, + sizeof(struct vki_timespec64) ); +} +POST(sys_clock_getres_time64) +{ + if (ARG2 != 0) + POST_MEM_WRITE( ARG2, sizeof(struct vki_timespec64) ); +} + PRE(sys_clock_nanosleep) { *flags |= SfMayBlock|SfPostOnFail; @@ -2808,6 +3049,27 @@ POST(sys_clock_nanosleep) POST_MEM_WRITE( ARG4, sizeof(struct vki_timespec) ); } +PRE(sys_clock_nanosleep_time64) +{ + *flags |= SfMayBlock|SfPostOnFail; + PRINT("sys_clock_nanosleep_time64( %ld, %ld, %#" FMT_REGWORD "x, %#" + FMT_REGWORD "x )", + SARG1, SARG2, ARG3, ARG4); + PRE_REG_READ4(int32_t, "clock_nanosleep_time64", + vki_clockid_t, clkid, int, flags, + const struct vki_timespec64 *, rqtp, + struct vki_timespec64 *, rmtp); + pre_read_timespec64(tid, "clock_nanosleep_time64(rqtp)", ARG3); + if (ARG4 != 0) + PRE_MEM_WRITE( "clock_nanosleep_time64(rmtp)", ARG4, + sizeof(struct vki_timespec64) ); +} +POST(sys_clock_nanosleep_time64) +{ + if (ARG4 != 0 && FAILURE && ERR == VKI_EINTR) + POST_MEM_WRITE( ARG4, sizeof(struct vki_timespec64) ); +} + /* --------------------------------------------------------------------- timer_* wrappers ------------------------------------------------------------------ */ @@ -2859,6 +3121,26 @@ POST(sys_timer_settime) POST_MEM_WRITE( ARG4, sizeof(struct vki_itimerspec) ); } +PRE(sys_timer_settime64) +{ + PRINT("sys_timer_settime64( %ld, %ld, %#" FMT_REGWORD "x, %#" + FMT_REGWORD "x )", SARG1,SARG2,ARG3,ARG4); + PRE_REG_READ4(long, "timer_settime64", + vki_timer_t, timerid, int, flags, + const struct vki_itimerspec64 *, value, + struct vki_itimerspec64 *, ovalue); + PRE_MEM_READ( "timer_settime64(value)", ARG3, + sizeof(struct vki_itimerspec64) ); + if (ARG4 != 0) + PRE_MEM_WRITE( "timer_settime64(ovalue)", ARG4, + sizeof(struct vki_itimerspec64) ); +} +POST(sys_timer_settime64) +{ + if (ARG4 != 0) + POST_MEM_WRITE( ARG4, sizeof(struct vki_itimerspec64) ); +} + PRE(sys_timer_gettime) { PRINT("sys_timer_gettime( %ld, %#" FMT_REGWORD "x )", SARG1, ARG2); @@ -2872,6 +3154,19 @@ POST(sys_timer_gettime) POST_MEM_WRITE( ARG2, sizeof(struct vki_itimerspec) ); } +PRE(sys_timer_gettime64) +{ + PRINT("sys_timer_gettime64( %ld, %#" FMT_REGWORD "x )", SARG1, ARG2); + PRE_REG_READ2(long, "timer_gettime64", + vki_timer_t, timerid, struct vki_itimerspec64 *, value); + PRE_MEM_WRITE( "timer_gettime64(value)", ARG2, + sizeof(struct vki_itimerspec64)); +} +POST(sys_timer_gettime64) +{ + POST_MEM_WRITE( ARG2, sizeof(struct vki_itimerspec64) ); +} + PRE(sys_timer_getoverrun) { PRINT("sys_timer_getoverrun( %#" FMT_REGWORD "x )", ARG1); @@ -2978,6 +3273,24 @@ POST(sys_timerfd_gettime) POST_MEM_WRITE(ARG2, sizeof(struct vki_itimerspec)); } +PRE(sys_timerfd_gettime64) +{ + PRINT("sys_timerfd_gettime64 ( %ld, %#" FMT_REGWORD "x )", SARG1, ARG2); + PRE_REG_READ2(long, "timerfd_gettime64", + int, ufd, + struct vki_itimerspec64*, otmr); + if (!ML_(fd_allowed)(ARG1, "timerfd_gettime64", tid, False)) + SET_STATUS_Failure(VKI_EBADF); + else + PRE_MEM_WRITE("timerfd_gettime64(result)", + ARG2, sizeof(struct vki_itimerspec64)); +} +POST(sys_timerfd_gettime64) +{ + if (RES == 0) + POST_MEM_WRITE(ARG2, sizeof(struct vki_itimerspec64)); +} + PRE(sys_timerfd_settime) { PRINT("sys_timerfd_settime ( %ld, %ld, %#" FMT_REGWORD "x, %#" @@ -3006,6 +3319,33 @@ POST(sys_timerfd_settime) POST_MEM_WRITE(ARG4, sizeof(struct vki_itimerspec)); } +PRE(sys_timerfd_settime64) +{ + PRINT("sys_timerfd_settime64 ( %ld, %ld, %#" FMT_REGWORD "x, %#" + FMT_REGWORD "x )", SARG1, SARG2, ARG3, ARG4); + PRE_REG_READ4(long, "timerfd_settime64", + int, ufd, + int, flags, + const struct vki_itimerspec64*, utmr, + struct vki_itimerspec64*, otmr); + if (!ML_(fd_allowed)(ARG1, "timerfd_settime64", tid, False)) + SET_STATUS_Failure(VKI_EBADF); + else + { + pre_read_itimerspec64 (tid, "timerfd_settime64(result)", ARG3); + if (ARG4) + { + PRE_MEM_WRITE("timerfd_settime64(result)", + ARG4, sizeof(struct vki_itimerspec64)); + } + } +} +POST(sys_timerfd_settime64) +{ + if (RES == 0 && ARG4 != 0) + POST_MEM_WRITE(ARG4, sizeof(struct vki_itimerspec64)); +} + /* --------------------------------------------------------------------- capabilities wrappers ------------------------------------------------------------------ */ @@ -3388,6 +3728,22 @@ POST(sys_sched_rr_get_interval) POST_MEM_WRITE(ARG2, sizeof(struct vki_timespec)); } +PRE(sys_sched_rr_get_interval_time64) +{ + PRINT("sys_sched_rr_get_interval_time64 ( %ld, %#" FMT_REGWORD "x )", + SARG1, ARG2); + PRE_REG_READ2(int, "sched_rr_get_interval_time64", + vki_pid_t, pid, + struct vki_timespec *, tp); + PRE_MEM_WRITE("sched_rr_get_interval_time64(timespec)", + ARG2, sizeof(struct vki_timespec64)); +} + +POST(sys_sched_rr_get_interval_time64) +{ + POST_MEM_WRITE(ARG2, sizeof(struct vki_timespec64)); +} + PRE(sys_sched_setaffinity) { PRINT("sched_setaffinity ( %ld, %" FMT_REGWORD "u, %#" FMT_REGWORD "x )", @@ -4115,6 +4471,30 @@ POST(sys_rt_sigtimedwait) POST_MEM_WRITE( ARG2, sizeof(vki_siginfo_t) ); } +PRE(sys_rt_sigtimedwait_time64) +{ + *flags |= SfMayBlock; + PRINT("sys_rt_sigtimedwait_time64 ( %#" FMT_REGWORD "x, %#" + FMT_REGWORD "x, %#" FMT_REGWORD "x, %" FMT_REGWORD "u )", + ARG1, ARG2, ARG3, ARG4); + PRE_REG_READ4(long, "rt_sigtimedwait_time64", + const vki_sigset_t *, set, vki_siginfo_t *, info, + const struct vki_timespec64 *, timeout, + vki_size_t, sigsetsize); + if (ARG1 != 0) + PRE_MEM_READ( "rt_sigtimedwait_time64(set)", ARG1, sizeof(vki_sigset_t) ); + if (ARG2 != 0) + PRE_MEM_WRITE( "rt_sigtimedwait_time64(info)", ARG2, + sizeof(vki_siginfo_t) ); + if (ARG3 != 0) + pre_read_timespec64(tid, "rt_sigtimedwait_time64(timeout)", ARG3); +} +POST(sys_rt_sigtimedwait_time64) +{ + if (ARG2 != 0) + POST_MEM_WRITE( ARG2, sizeof(vki_siginfo_t) ); +} + PRE(sys_rt_sigqueueinfo) { PRINT("sys_rt_sigqueueinfo(%ld, %ld, %#" FMT_REGWORD "x)", @@ -4563,6 +4943,20 @@ PRE(sys_semtimedop) ML_(generic_PRE_sys_semtimedop)(tid, ARG1,ARG2,ARG3,ARG4); } +PRE(sys_semtimedop_time64) +{ + *flags |= SfMayBlock; + PRINT("sys_semtimedop_time64 ( %ld, %#" FMT_REGWORD "x, %" + FMT_REGWORD "u, %#" FMT_REGWORD "x )", SARG1, ARG2, ARG3, ARG4); + PRE_REG_READ4(long, "semtimedop_time64", + int, semid, struct sembuf *, sops, unsigned, nsoops, + struct vki_timespec64 *, timeout); + PRE_MEM_READ( "semtimedop_time64(sops)", ARG1, + ARG2 * sizeof(struct vki_sembuf) ); + if (ARG3 != 0) + pre_read_timespec64(tid, "semtimedop_time64(timeout)", ARG3); +} + PRE(sys_msgget) { PRINT("sys_msgget ( %ld, %ld )", SARG1, SARG2); @@ -5372,6 +5766,36 @@ PRE(sys_utimensat) } } +PRE(sys_utimensat_time64) +{ + PRINT("sys_utimensat_time64 ( %ld, %#" FMT_REGWORD "x(%s), %#" + FMT_REGWORD "x, 0x%" FMT_REGWORD "x )", + SARG1, ARG2, (HChar*)(Addr)ARG2, ARG3, ARG4); + PRE_REG_READ4(long, "utimensat_time64", + int, dfd, char *, filename, struct timespec *, utimes, int, flags); + if (ARG2 != 0) + PRE_MEM_RASCIIZ( "utimensat_time64(filename)", ARG2 ); + if (ARG3 != 0) { + /* If timespec.tv_nsec has the special value UTIME_NOW or UTIME_OMIT + then the tv_sec field is ignored. */ + struct vki_timespec64 *times = (struct vki_timespec64 *)(Addr)ARG3; + PRE_MEM_READ( "utimensat_time64(times[0].tv_nsec)", + (Addr)×[0].tv_nsec, sizeof(times[0].tv_nsec)); + PRE_MEM_READ( "utimensat_time64(times[1].tv_nsec)", + (Addr)×[1].tv_nsec, sizeof(times[1].tv_nsec)); + if (ML_(safe_to_deref)(times, 2 * sizeof(struct vki_timespec64))) { + if (times[0].tv_nsec != VKI_UTIME_NOW + && times[0].tv_nsec != VKI_UTIME_OMIT) + PRE_MEM_READ( "utimensat_time64(times[0].tv_sec)", + (Addr)×[0].tv_sec, sizeof(times[0].tv_sec)); + if (times[1].tv_nsec != VKI_UTIME_NOW + && times[1].tv_nsec != VKI_UTIME_OMIT) + PRE_MEM_READ( "utimensat_time64(times[1].tv_sec)", + (Addr)×[1].tv_sec, sizeof(times[1].tv_sec)); + } + } +} + #if !defined(VGP_nanomips_linux) PRE(sys_newfstatat) { @@ -5866,6 +6290,34 @@ POST(sys_recvmmsg) ML_(linux_POST_sys_recvmmsg) (tid, RES, ARG1,ARG2,ARG3,ARG4,ARG5); } +PRE(sys_recvmmsg_time64) +{ + *flags |= SfMayBlock; + PRINT("sys_recvmmsg_time64 ( %ld, %#" FMT_REGWORD "x, %ld, %ld, %#" + FMT_REGWORD "x )", + SARG1, ARG2, SARG3, SARG4, ARG5); + PRE_REG_READ5(long, "recvmmsg_time64", + int, s, struct mmsghdr *, mmsg, int, vlen, + int, flags, struct vki_timespec64 *, timeout); + struct vki_mmsghdr *mmsg = (struct vki_mmsghdr *)ARG2; + HChar name[40]; // large enough + UInt i; + for (i = 0; i < ARG3; i++) { + VG_(sprintf)(name, "mmsg[%u].msg_hdr", i); + ML_(generic_PRE_sys_recvmsg)(tid, name, &mmsg[i].msg_hdr); + VG_(sprintf)(name, "recvmmsg(mmsg[%u].msg_len)", i); + PRE_MEM_WRITE( name, (Addr)&mmsg[i].msg_len, sizeof(mmsg[i].msg_len) ); + } + if (ARG5) + pre_read_timespec64(tid, "recvmmsg(timeout)", ARG5); +} + +POST(sys_recvmmsg_time64) +{ + /* ARG5 isn't actually used, so just use the generic POST. */ + ML_(linux_POST_sys_recvmmsg) (tid, RES, ARG1,ARG2,ARG3,ARG4,ARG5); +} + /* --------------------------------------------------------------------- key retention service wrappers ------------------------------------------------------------------ */ @@ -12679,3 +13131,4 @@ POST(sys_io_uring_register) /*--------------------------------------------------------------------*/ /*--- end ---*/ /*--------------------------------------------------------------------*/ + diff --git a/coregrind/m_syswrap/syswrap-mips32-linux.c b/coregrind/m_syswrap/syswrap-mips32-linux.c index bac555a..477f599 100644 --- a/coregrind/m_syswrap/syswrap-mips32-linux.c +++ b/coregrind/m_syswrap/syswrap-mips32-linux.c @@ -1103,7 +1103,29 @@ static SyscallTableEntry syscall_main_table[] = { LINXY (__NR_preadv2, sys_preadv2), // 361 LINX_ (__NR_pwritev2, sys_pwritev2), // 362 //.. - LINXY(__NR_statx, sys_statx) // 366 + LINXY(__NR_statx, sys_statx), // 366 + + LINXY(__NR_clock_gettime64, sys_clock_gettime64), // 403 + LINX_(__NR_clock_settime64, sys_clock_settime64), // 404 + + LINXY(__NR_clock_getres_time64, sys_clock_getres_time64), // 406 + LINXY(__NR_clock_nanosleep_time64, sys_clock_nanosleep_time64), // 407 + LINXY(__NR_timer_gettime64, sys_timer_gettime64), // 408 + LINXY(__NR_timer_settime64, sys_timer_settime64), // 409 + LINXY(__NR_timerfd_gettime64, sys_timerfd_gettime64), // 410 + LINXY(__NR_timerfd_settime64, sys_timerfd_settime64), // 411 + LINX_(__NR_utimensat_time64, sys_utimensat_time64), // 412 + LINXY(__NR_pselect6_time64, sys_pselect6_time64), // 413 + LINXY(__NR_ppoll_time64, sys_ppoll_time64), // 414 + + LINXY(__NR_recvmmsg_time64, sys_recvmmsg_time64), // 417 + LINX_(__NR_mq_timedsend_time64, sys_mq_timedsend_time64), // 418 + LINXY(__NR_mq_timedreceive_time64, sys_mq_timedreceive_time64), // 419 + LINX_(__NR_semtimedop_time64, sys_semtimedop_time64), // 420 + LINXY(__NR_rt_sigtimedwait_time64, sys_rt_sigtimedwait_time64), // 421 + LINXY(__NR_futex_time64, sys_futex_time64), // 422 + LINXY(__NR_sched_rr_get_interval_time64, + sys_sched_rr_get_interval_time64), // 423 }; SyscallTableEntry* ML_(get_linux_syscall_entry) (UInt sysno) diff --git a/coregrind/m_syswrap/syswrap-ppc32-linux.c b/coregrind/m_syswrap/syswrap-ppc32-linux.c index 484aac2..8f8eec3 100644 --- a/coregrind/m_syswrap/syswrap-ppc32-linux.c +++ b/coregrind/m_syswrap/syswrap-ppc32-linux.c @@ -1022,6 +1022,28 @@ static SyscallTableEntry syscall_table[] = { LINX_(__NR_copy_file_range, sys_copy_file_range), // 379 LINXY(__NR_statx, sys_statx), // 383 + + LINXY(__NR_clock_gettime64, sys_clock_gettime64), // 403 + LINX_(__NR_clock_settime64, sys_clock_settime64), // 404 + + LINXY(__NR_clock_getres_time64, sys_clock_getres_time64), // 406 + LINXY(__NR_clock_nanosleep_time64, sys_clock_nanosleep_time64), // 407 + LINXY(__NR_timer_gettime64, sys_timer_gettime64), // 408 + LINXY(__NR_timer_settime64, sys_timer_settime64), // 409 + LINXY(__NR_timerfd_gettime64, sys_timerfd_gettime64),// 410 + LINXY(__NR_timerfd_settime64, sys_timerfd_settime64),// 411 + LINX_(__NR_utimensat_time64, sys_utimensat_time64), // 412 + LINXY(__NR_pselect6_time64, sys_pselect6_time64), // 413 + LINXY(__NR_ppoll_time64, sys_ppoll_time64), // 414 + + LINXY(__NR_recvmmsg_time64, sys_recvmmsg_time64), // 417 + LINX_(__NR_mq_timedsend_time64, sys_mq_timedsend_time64), // 418 + LINXY(__NR_mq_timedreceive_time64, sys_mq_timedreceive_time64), // 419 + LINX_(__NR_semtimedop_time64, sys_semtimedop_time64),// 420 + LINXY(__NR_rt_sigtimedwait_time64, sys_rt_sigtimedwait_time64), // 421 + LINXY(__NR_futex_time64, sys_futex_time64), // 422 + LINXY(__NR_sched_rr_get_interval_time64, + sys_sched_rr_get_interval_time64), // 423 }; SyscallTableEntry* ML_(get_linux_syscall_entry) ( UInt sysno ) diff --git a/coregrind/m_syswrap/syswrap-x86-linux.c b/coregrind/m_syswrap/syswrap-x86-linux.c index 33d1213..68d24e1 100644 --- a/coregrind/m_syswrap/syswrap-x86-linux.c +++ b/coregrind/m_syswrap/syswrap-x86-linux.c @@ -1618,6 +1618,28 @@ static SyscallTableEntry syscall_table[] = { /* Explicitly not supported on i386 yet. */ GENX_(__NR_arch_prctl, sys_ni_syscall), // 384 + LINXY(__NR_clock_gettime64, sys_clock_gettime64), // 403 + LINX_(__NR_clock_settime64, sys_clock_settime64), // 404 + + LINXY(__NR_clock_getres_time64, sys_clock_getres_time64), // 406 + LINXY(__NR_clock_nanosleep_time64, sys_clock_nanosleep_time64), // 407 + LINXY(__NR_timer_gettime64, sys_timer_gettime64), // 408 + LINXY(__NR_timer_settime64, sys_timer_settime64), // 409 + LINXY(__NR_timerfd_gettime64, sys_timerfd_gettime64),// 410 + LINXY(__NR_timerfd_settime64, sys_timerfd_settime64),// 411 + LINX_(__NR_utimensat_time64, sys_utimensat_time64), // 412 + LINXY(__NR_pselect6_time64, sys_pselect6_time64), // 413 + LINXY(__NR_ppoll_time64, sys_ppoll_time64), // 414 + + LINXY(__NR_recvmmsg_time64, sys_recvmmsg_time64), // 417 + LINX_(__NR_mq_timedsend_time64, sys_mq_timedsend_time64), // 418 + LINXY(__NR_mq_timedreceive_time64, sys_mq_timedreceive_time64), // 419 + LINX_(__NR_semtimedop_time64, sys_semtimedop_time64),// 420 + LINXY(__NR_rt_sigtimedwait_time64, sys_rt_sigtimedwait_time64), // 421 + LINXY(__NR_futex_time64, sys_futex_time64), // 422 + LINXY(__NR_sched_rr_get_interval_time64, + sys_sched_rr_get_interval_time64), // 423 + LINXY(__NR_io_uring_setup, sys_io_uring_setup), // 425 LINXY(__NR_io_uring_enter, sys_io_uring_enter), // 426 LINXY(__NR_io_uring_register, sys_io_uring_register),// 427 diff --git a/include/vki/vki-linux.h b/include/vki/vki-linux.h index f27161e..6f1100f 100644 --- a/include/vki/vki-linux.h +++ b/include/vki/vki-linux.h @@ -5313,6 +5313,32 @@ struct vki_ptp_pin_desc { #define VKI_PTP_SYS_OFFSET_EXTENDED \ _VKI_IOWR('=', 9, struct vki_ptp_sys_offset_extended) +/* Needed for 64bit time_t on 32bit arches. */ + +typedef vki_int64_t vki_time64_t; + +/* Note that this is the padding used by glibc, the kernel uses + a 64-bit signed int, but is ignoring the upper 32 bits of the + tv_nsec field. It does always write the full struct though. + So this is only needed for PRE_MEM_READ. See pre_read_timespec64. */ +struct vki_timespec64 { + vki_time64_t tv_sec; +#if defined(VKI_BIG_ENDIAN) + vki_int32_t tv_pad; + vki_int32_t tv_nsec; +#elif defined(VKI_LITTLE_ENDIAN) + vki_int32_t tv_nsec; + vki_int32_t tv_pad; +#else +#error edit for your odd byteorder. +#endif +}; + +struct vki_itimerspec64 { + struct vki_timespec it_interval; + struct vki_timespec it_value; +}; + /*--------------------------------------------------------------------*/ /*--- end ---*/ /*--------------------------------------------------------------------*/ |
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From: Mark W. <ma...@so...> - 2020-03-04 13:25:47
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=28371e73dbb9eb6c003455cfb5d5663ca1d465fc commit 28371e73dbb9eb6c003455cfb5d5663ca1d465fc Author: Mark Wielaard <ma...@kl...> Date: Wed Mar 4 14:23:37 2020 +0100 Add suppressions for glibc DTV leaks The glibc DTV (Dynamic Thread Vector) for the main thread is never released, not even through __libc_freeres. This causes it to always show up as a reachable block when used, and sometimes, when it is extended and then reduced, as a possible leak when memcheck cannot find a pointer to the start of the block. https://bugzilla.redhat.com/show_bug.cgi?id=1796433 https://bugzilla.redhat.com/show_bug.cgi?id=1796559 https://bugs.kde.org/show_bug.cgi?id=417578 Diff: --- NEWS | 1 + glibc-2.X.supp.in | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/NEWS b/NEWS index 84e0840..afe8872 100644 --- a/NEWS +++ b/NEWS @@ -126,6 +126,7 @@ n-i-bz Fix non-glibc build of test suite with s390x_features 417427 commit to fix vki_siginfo_t definition created numerous regression errors on ppc64 417452 s390_insn_store_emit: dst->tag for HRcVec128 +417578 Add suppressions for glibc DTV leaks 417906 clone with CLONE_VFORK and no CLONE_VM fails diff --git a/glibc-2.X.supp.in b/glibc-2.X.supp.in index 126e8b3..eeefa39 100644 --- a/glibc-2.X.supp.in +++ b/glibc-2.X.supp.in @@ -248,3 +248,37 @@ Memcheck:Cond fun:_dl_runtime_resolve_avx_slow } + +# The main thread dynamic thread vector, DTV, which contains pointers +# to thread local variables, isn't freed. There are a couple of call +# patterns that can cause it to be extended. +{ + dtv-addr-tail + Memcheck:Leak + match-leak-kinds: possible,reachable + fun:malloc + fun:tls_get_addr_tail* + fun:__tls_get_addr +} + +{ + dtv-addr-resize + Memcheck:Leak + match-leak-kinds: possible,reachable + fun:malloc + fun:_dl_resize_dtv + fun:_dl_update_slotinfo + fun:update_get_addr + fun:__tls_get_addr +} + +{ + dtv-addr-init + Memcheck:Leak + match-leak-kinds: possible,reachable + fun:malloc + fun:allocate_dtv_entry + fun:allocate_and_init + fun:tls_get_addr_tail* + fun:__tls_get_addr +} |
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From: Philippe W. <phi...@so...> - 2020-03-03 19:03:48
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=5920eb0c4302015f3648354e4f9c059f899194b7 commit 5920eb0c4302015f3648354e4f9c059f899194b7 Author: Philippe Waroquiers <phi...@sk...> Date: Tue Feb 18 21:35:44 2020 +0100 Improve line info tracing, in particular when using lto. With gcc 9 and --enable-lto, we now have spurious warnings telling that the line information in the debug info has huge line numbers, greater than the (valgrind) maximum of 2^20. These spurious warnings make that all tests are failing. This change modifies the tracing/debugging of the line info to: * disable by default the warning for line info greater than 2^20. When using -d, such warnings are however still shown (once). * allow to see all such warnings, when using at least -d -d -d -d Diff: --- coregrind/m_debuginfo/storage.c | 55 +++++++++++++++++++++++++++-------------- 1 file changed, 37 insertions(+), 18 deletions(-) diff --git a/coregrind/m_debuginfo/storage.c b/coregrind/m_debuginfo/storage.c index 011d012..2a975dc 100644 --- a/coregrind/m_debuginfo/storage.c +++ b/coregrind/m_debuginfo/storage.c @@ -527,18 +527,22 @@ static void shrinkLocTab ( struct _DebugInfo* di ) di->loctab_size = new_sz; } -#define COMPLAIN_ONCE(what, limit, limit_op) \ +// Complain once, unless VG_(debugLog_getLevel)() > 3 +// showinfo is called if VG_(debugLog_getLevel)() >= 1 +#define COMPLAIN_ONCE(what, limit, limit_op, showinfo) \ { \ static Bool complained = False; \ if (!complained) { \ - complained = True; \ + complained = VG_(debugLog_getLevel)() <= 3; \ VG_(message)(Vg_UserMsg, \ "warning: Can't handle " what " with " \ "line number %d " limit_op " than %d\n", \ lineno, limit); \ - VG_(message)(Vg_UserMsg, \ - "(Nb: this message is only shown once)\n"); \ - } \ + if (VG_(debugLog_getLevel)() >= 1) showinfo; \ + if (complained) \ + VG_(message)(Vg_UserMsg, \ + "(Nb: this message is only shown once)\n"); \ + } \ } @@ -556,6 +560,11 @@ void ML_(addLineInfo) ( struct _DebugInfo* di, DiLoc loc; UWord size = next - this; +# define SHOWLINEINFO \ + VG_(message)(Vg_DebugMsg, \ + "addLoc: addr %#lx, size %lu, line %d, fndn_ix %u\n", \ + this,size,lineno,fndn_ix) + /* Ignore zero-sized locs */ if (this == next) return; @@ -615,11 +624,14 @@ void ML_(addLineInfo) ( struct _DebugInfo* di, } if (lineno < 0) { - COMPLAIN_ONCE("line info entry", 0, "smaller"); + COMPLAIN_ONCE("line info entry", 0, "smaller", SHOWLINEINFO); return; } if (lineno > MAX_LINENO) { - COMPLAIN_ONCE("line info entry", MAX_LINENO, "greater"); + /* With --enable-lto, gcc 9 creates huge line numbers e.g. in the tool + => only complain with some debug level. */ + if (VG_(debugLog_getLevel)() >= 1) + COMPLAIN_ONCE("line info entry", MAX_LINENO, "greater", SHOWLINEINFO); return; } @@ -627,11 +639,10 @@ void ML_(addLineInfo) ( struct _DebugInfo* di, loc.size = (UShort)size; loc.lineno = lineno; - if (0) VG_(message)(Vg_DebugMsg, - "addLoc: addr %#lx, size %lu, line %d, fndn_ix %u\n", - this,size,lineno,fndn_ix); + if (0) SHOWLINEINFO; addLoc ( di, &loc, fndn_ix ); +# undef SHOWLINEINFO } /* Add an inlined call info to the inlined call table. @@ -687,22 +698,34 @@ void ML_(addInlInfo) ( struct _DebugInfo* di, { DiInlLoc inl; +# define SHOWLINEINFO \ + VG_(message) (Vg_DebugMsg, \ + "addInlInfo: fn %s inlined as addr_lo %#lx,addr_hi %#lx," \ + "caller fndn_ix %u %s:%d\n", \ + inlinedfn, addr_lo, addr_hi, fndn_ix, \ + ML_(fndn_ix2filename) (di, fndn_ix), lineno) + /* Similar paranoia as in ML_(addLineInfo). Unclear if needed. */ if (addr_lo >= addr_hi) { if (VG_(clo_verbosity) > 2) { VG_(message)(Vg_DebugMsg, "warning: inlined info addresses out of order " "at: 0x%lx 0x%lx\n", addr_lo, addr_hi); + SHOWLINEINFO; } addr_hi = addr_lo + 1; } if (lineno < 0) { - COMPLAIN_ONCE ("inlined call info entry", 0, "smaller"); + COMPLAIN_ONCE ("inlined call info entry", 0, "smaller", SHOWLINEINFO); return; } if (lineno > MAX_LINENO) { - COMPLAIN_ONCE ("inlined call info entry", MAX_LINENO, "greater"); + /* With --enable-lto, gcc 9 creates huge line numbers e.g. in the tool + => only complain with some debug level. */ + if (VG_(debugLog_getLevel)() >= 1) + COMPLAIN_ONCE ("inlined call info entry", MAX_LINENO, "greater", + SHOWLINEINFO); return; } @@ -715,14 +738,10 @@ void ML_(addInlInfo) ( struct _DebugInfo* di, inl.lineno = lineno; inl.level = level; - if (0) VG_(message) - (Vg_DebugMsg, - "addInlInfo: fn %s inlined as addr_lo %#lx,addr_hi %#lx," - "caller fndn_ix %u %s:%d\n", - inlinedfn, addr_lo, addr_hi, fndn_ix, - ML_(fndn_ix2filename) (di, fndn_ix), lineno); + if (0) SHOWLINEINFO; addInl ( di, &inl ); +# undef SHOWLINEINFO } DiCfSI_m* ML_(get_cfsi_m) (const DebugInfo* di, UInt pos) |
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From: <vel...@gm...> - 2020-03-03 08:06:49
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Hi, I have a simple question. I want to write a simple plugin and what I need is to get the address, where the application was loaded by Valgrind. Is there a simple way for that? More advanced. I want to write plugin that will track all executed instructions and dump those addresses. Next, I want to use those address and highlight all executed instruction in IDA Pro for example. Regards M. |
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From: Tom H. <to...@co...> - 2020-03-01 23:31:18
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On 01/03/2020 21:57, Philippe Waroquiers wrote: > Allow valgrind to find debug info in a 'usr merge' setup. > > On ubuntu 19.10, valgrind fails telling that it cannot find > the mandatory redirection for strlen in ld-linux-x86-64.so.2. Why is this a problem on Ubuntu and not on Fedora which has had usr merge for years? I guess it's to do with the Ubuntu multilib setup being different but are we sure this isn't going to break Fedora/RH systems? > Without this patch, valgrind searches the debug info (a.o.) > in /usr/lib/debug/usr/lib/x86_64-linux-gnu/ld-2.30.so > so using the concatenation of /usr/lib/debug > and /usr/lib/x86_64-linux-gnu/ld-2.30.so, > but the debug info is located at the concatenation of > /usr/lib/debug and /lib/x86_64-linux-gnu/ld-2.30.so > (so without the leading /usr). > Modify the debug info search so as to try with and without the /usr. I guess so long as it searches both that is fine... Tom -- Tom Hughes (to...@co...) http://compton.nu/ |
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From: Philippe W. <phi...@sk...> - 2020-03-01 22:32:51
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On Sun, 2020-03-01 at 22:24 +0000, Tom Hughes wrote: > On 01/03/2020 21:57, Philippe Waroquiers wrote: > > > Allow valgrind to find debug info in a 'usr merge' setup. > > > > On ubuntu 19.10, valgrind fails telling that it cannot find > > the mandatory redirection for strlen in ld-linux-x86-64.so.2. > > Why is this a problem on Ubuntu and not on Fedora which has > had usr merge for years? Not clear to me. Maybe Ubuntu and Fedora do not put debug info at the same location, and this fix is thus only needed on Ubuntu ? Or maybe on a freshly installed ubuntu ? (I had no problem on a ubuntu that was upgraded). > > I guess it's to do with the Ubuntu multilib setup being different > but are we sure this isn't going to break Fedora/RH systems? Before pushing, I tested on a centos 7.7 to be sure. > > > Without this patch, valgrind searches the debug info (a.o.) > > in /usr/lib/debug/usr/lib/x86_64-linux-gnu/ld-2.30.so > > so using the concatenation of /usr/lib/debug > > and /usr/lib/x86_64-linux-gnu/ld-2.30.so, > > but the debug info is located at the concatenation of > > /usr/lib/debug and /lib/x86_64-linux-gnu/ld-2.30.so > > (so without the leading /usr). > > Modify the debug info search so as to try with and without the /usr. > > I guess so long as it searches both that is fine... Yes, that is what I thought (and double checked on centos). Philippe |
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From: Philippe W. <phi...@so...> - 2020-03-01 21:57:57
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=db07db4c8706d17124a621a254bee1b6f08d2e1d commit db07db4c8706d17124a621a254bee1b6f08d2e1d Author: Philippe Waroquiers <phi...@sk...> Date: Sun Mar 1 22:43:31 2020 +0100 Allow valgrind to find debug info in a 'usr merge' setup. On ubuntu 19.10, valgrind fails telling that it cannot find the mandatory redirection for strlen in ld-linux-x86-64.so.2. This is due to /bin being a symlink to usr/bin: ld is found in /usr/lib/x86_64-linux-gnu/ld-2.30.so but its debug info is in /usr/lib/debug/lib/x86_64-linux-gnu/ld-2.30.so Without this patch, valgrind searches the debug info (a.o.) in /usr/lib/debug/usr/lib/x86_64-linux-gnu/ld-2.30.so so using the concatenation of /usr/lib/debug and /usr/lib/x86_64-linux-gnu/ld-2.30.so, but the debug info is located at the concatenation of /usr/lib/debug and /lib/x86_64-linux-gnu/ld-2.30.so (so without the leading /usr). Modify the debug info search so as to try with and without the /usr. Patch derived from the patch done by Mathieu Trudel-Lapierre to solve https://bugs.launchpad.net/ubuntu/+source/valgrind/+bug/1808508 Diff: --- coregrind/m_debuginfo/readelf.c | 48 +++++++++++++++++++++++++---------------- 1 file changed, 30 insertions(+), 18 deletions(-) diff --git a/coregrind/m_debuginfo/readelf.c b/coregrind/m_debuginfo/readelf.c index 40e546a..bc5a732 100644 --- a/coregrind/m_debuginfo/readelf.c +++ b/coregrind/m_debuginfo/readelf.c @@ -1316,41 +1316,53 @@ DiImage* find_debug_file( struct _DebugInfo* di, if (dimg == NULL && debugname != NULL) { HChar *objdir = ML_(dinfo_strdup)("di.fdf.2", objpath); + HChar *usrmerge_objdir; HChar *objdirptr; if ((objdirptr = VG_(strrchr)(objdir, '/')) != NULL) *objdirptr = '\0'; + if ((objdirptr = VG_(strstr)(objdir, "usr")) != NULL) + usrmerge_objdir = objdirptr + VG_(strlen)("usr"); + else + usrmerge_objdir = NULL; + debugpath = ML_(dinfo_zalloc)( "di.fdf.3", VG_(strlen)(objdir) + VG_(strlen)(debugname) + 64 + (extrapath ? VG_(strlen)(extrapath) : 0) + (serverpath ? VG_(strlen)(serverpath) : 0)); +# define TRY_OBJDIR(format, ...) \ + do { \ + VG_(sprintf)(debugpath, format, __VA_ARGS__); \ + dimg = open_debug_file(debugpath, buildid, crc, rel_ok, NULL); \ + if (dimg != NULL) goto dimg_ok; \ + } while (0); + +# define TRY_OBJDIR_USRMERGE_OBJDIR(format) \ + do { \ + TRY_OBJDIR(format, objdir, debugname); \ + if (usrmerge_objdir != NULL) { \ + TRY_OBJDIR(format, usrmerge_objdir, debugname); \ + } \ + } while (0) + if (debugname[0] == '/') { - VG_(sprintf)(debugpath, "%s", debugname); - dimg = open_debug_file(debugpath, buildid, crc, rel_ok, NULL); - if (dimg != NULL) goto dimg_ok; + TRY_OBJDIR("%s", debugname); } - VG_(sprintf)(debugpath, "%s/%s", objdir, debugname); - dimg = open_debug_file(debugpath, buildid, crc, rel_ok, NULL); - if (dimg != NULL) goto dimg_ok; - - VG_(sprintf)(debugpath, "%s/.debug/%s", objdir, debugname); - dimg = open_debug_file(debugpath, buildid, crc, rel_ok, NULL); - if (dimg != NULL) goto dimg_ok; - - VG_(sprintf)(debugpath, "/usr/lib/debug%s/%s", objdir, debugname); - dimg = open_debug_file(debugpath, buildid, crc, rel_ok, NULL); - if (dimg != NULL) goto dimg_ok; + TRY_OBJDIR_USRMERGE_OBJDIR("%s/%s"); + TRY_OBJDIR_USRMERGE_OBJDIR("%s/.debug/%s"); + TRY_OBJDIR_USRMERGE_OBJDIR("/usr/lib/debug%s/%s"); if (extrapath) { - VG_(sprintf)(debugpath, "%s%s/%s", extrapath, - objdir, debugname); - dimg = open_debug_file(debugpath, buildid, crc, rel_ok, NULL); - if (dimg != NULL) goto dimg_ok; + TRY_OBJDIR("%s%s/%s", extrapath, objdir, debugname); + if (usrmerge_objdir != NULL) + TRY_OBJDIR("%s%s/%s", extrapath, usrmerge_objdir, debugname); } +# undef TRY_OBJDIR +# undef TRY_OBJDIRS if (serverpath) { /* When looking on the debuginfo server, always just pass the |