You can subscribe to this list here.
| 2002 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
(1) |
Oct
(122) |
Nov
(152) |
Dec
(69) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2003 |
Jan
(6) |
Feb
(25) |
Mar
(73) |
Apr
(82) |
May
(24) |
Jun
(25) |
Jul
(10) |
Aug
(11) |
Sep
(10) |
Oct
(54) |
Nov
(203) |
Dec
(182) |
| 2004 |
Jan
(307) |
Feb
(305) |
Mar
(430) |
Apr
(312) |
May
(187) |
Jun
(342) |
Jul
(487) |
Aug
(637) |
Sep
(336) |
Oct
(373) |
Nov
(441) |
Dec
(210) |
| 2005 |
Jan
(385) |
Feb
(480) |
Mar
(636) |
Apr
(544) |
May
(679) |
Jun
(625) |
Jul
(810) |
Aug
(838) |
Sep
(634) |
Oct
(521) |
Nov
(965) |
Dec
(543) |
| 2006 |
Jan
(494) |
Feb
(431) |
Mar
(546) |
Apr
(411) |
May
(406) |
Jun
(322) |
Jul
(256) |
Aug
(401) |
Sep
(345) |
Oct
(542) |
Nov
(308) |
Dec
(481) |
| 2007 |
Jan
(427) |
Feb
(326) |
Mar
(367) |
Apr
(255) |
May
(244) |
Jun
(204) |
Jul
(223) |
Aug
(231) |
Sep
(354) |
Oct
(374) |
Nov
(497) |
Dec
(362) |
| 2008 |
Jan
(322) |
Feb
(482) |
Mar
(658) |
Apr
(422) |
May
(476) |
Jun
(396) |
Jul
(455) |
Aug
(267) |
Sep
(280) |
Oct
(253) |
Nov
(232) |
Dec
(304) |
| 2009 |
Jan
(486) |
Feb
(470) |
Mar
(458) |
Apr
(423) |
May
(696) |
Jun
(461) |
Jul
(551) |
Aug
(575) |
Sep
(134) |
Oct
(110) |
Nov
(157) |
Dec
(102) |
| 2010 |
Jan
(226) |
Feb
(86) |
Mar
(147) |
Apr
(117) |
May
(107) |
Jun
(203) |
Jul
(193) |
Aug
(238) |
Sep
(300) |
Oct
(246) |
Nov
(23) |
Dec
(75) |
| 2011 |
Jan
(133) |
Feb
(195) |
Mar
(315) |
Apr
(200) |
May
(267) |
Jun
(293) |
Jul
(353) |
Aug
(237) |
Sep
(278) |
Oct
(611) |
Nov
(274) |
Dec
(260) |
| 2012 |
Jan
(303) |
Feb
(391) |
Mar
(417) |
Apr
(441) |
May
(488) |
Jun
(655) |
Jul
(590) |
Aug
(610) |
Sep
(526) |
Oct
(478) |
Nov
(359) |
Dec
(372) |
| 2013 |
Jan
(467) |
Feb
(226) |
Mar
(391) |
Apr
(281) |
May
(299) |
Jun
(252) |
Jul
(311) |
Aug
(352) |
Sep
(481) |
Oct
(571) |
Nov
(222) |
Dec
(231) |
| 2014 |
Jan
(185) |
Feb
(329) |
Mar
(245) |
Apr
(238) |
May
(281) |
Jun
(399) |
Jul
(382) |
Aug
(500) |
Sep
(579) |
Oct
(435) |
Nov
(487) |
Dec
(256) |
| 2015 |
Jan
(338) |
Feb
(357) |
Mar
(330) |
Apr
(294) |
May
(191) |
Jun
(108) |
Jul
(142) |
Aug
(261) |
Sep
(190) |
Oct
(54) |
Nov
(83) |
Dec
(22) |
| 2016 |
Jan
(49) |
Feb
(89) |
Mar
(33) |
Apr
(50) |
May
(27) |
Jun
(34) |
Jul
(53) |
Aug
(53) |
Sep
(98) |
Oct
(206) |
Nov
(93) |
Dec
(53) |
| 2017 |
Jan
(65) |
Feb
(82) |
Mar
(102) |
Apr
(86) |
May
(187) |
Jun
(67) |
Jul
(23) |
Aug
(93) |
Sep
(65) |
Oct
(45) |
Nov
(35) |
Dec
(17) |
| 2018 |
Jan
(26) |
Feb
(35) |
Mar
(38) |
Apr
(32) |
May
(8) |
Jun
(43) |
Jul
(27) |
Aug
(30) |
Sep
(43) |
Oct
(42) |
Nov
(38) |
Dec
(67) |
| 2019 |
Jan
(32) |
Feb
(37) |
Mar
(53) |
Apr
(64) |
May
(49) |
Jun
(18) |
Jul
(14) |
Aug
(53) |
Sep
(25) |
Oct
(30) |
Nov
(49) |
Dec
(31) |
| 2020 |
Jan
(87) |
Feb
(45) |
Mar
(37) |
Apr
(51) |
May
(99) |
Jun
(36) |
Jul
(11) |
Aug
(14) |
Sep
(20) |
Oct
(24) |
Nov
(40) |
Dec
(23) |
| 2021 |
Jan
(14) |
Feb
(53) |
Mar
(85) |
Apr
(15) |
May
(19) |
Jun
(3) |
Jul
(14) |
Aug
(1) |
Sep
(57) |
Oct
(73) |
Nov
(56) |
Dec
(22) |
| 2022 |
Jan
(3) |
Feb
(22) |
Mar
(6) |
Apr
(55) |
May
(46) |
Jun
(39) |
Jul
(15) |
Aug
(9) |
Sep
(11) |
Oct
(34) |
Nov
(20) |
Dec
(36) |
| 2023 |
Jan
(79) |
Feb
(41) |
Mar
(99) |
Apr
(169) |
May
(48) |
Jun
(16) |
Jul
(16) |
Aug
(57) |
Sep
(19) |
Oct
|
Nov
|
Dec
|
| S | M | T | W | T | F | S |
|---|---|---|---|---|---|---|
|
|
|
|
|
|
1
|
2
|
|
3
(3) |
4
|
5
|
6
(1) |
7
(1) |
8
|
9
(1) |
|
10
|
11
(2) |
12
(3) |
13
(1) |
14
(1) |
15
|
16
(1) |
|
17
(1) |
18
(14) |
19
(1) |
20
(1) |
21
(3) |
22
(2) |
23
|
|
24
(1) |
25
|
26
(4) |
27
(6) |
28
(2) |
29
|
30
|
|
From: Tom H. <to...@co...> - 2019-11-18 10:01:20
|
Firstly, please don't just send patches with absolutely no explanation of what they are for. I realise some of them at least are trivial but please try and make some minimal effort to include some explanation. Even more importantly, patches should be filed in the bug tracker rather then being mailed here where they will likely just get forgotten when we are next making a release. Tom -- Tom Hughes (to...@co...) http://compton.nu/ |
|
From: Jefferson C. <jef...@gm...> - 2019-11-18 09:52:31
|
Yes sir, sorry sir. Jefferson On 11/18/2019 9:40 AM, Tom Hughes wrote: > Firstly, please don't just send patches with absolutely > no explanation of what they are for. I realise some of them > at least are trivial but please try and make some minimal > effort to include some explanation. > > Even more importantly, patches should be filed in the bug > tracker rather then being mailed here where they will likely > just get forgotten when we are next making a release. > > Tom > |
|
From: Julian S. <se...@so...> - 2019-11-16 07:31:02
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=96de5118f5332ae145912ebe91b8fa143df74b8d commit 96de5118f5332ae145912ebe91b8fa143df74b8d Author: Julian Seward <js...@ac...> Date: Sat Nov 16 08:30:10 2019 +0100 Fold Iop_CmpEQ32x8(x,x) to all-1s .. .. hence treating it as a dependency-breaking idiom. Also handle the resulting IRConst_V256(0xFFFFFFFF) in the amd64 insn selector. Diff: --- VEX/priv/host_amd64_isel.c | 8 ++++++++ VEX/priv/ir_opt.c | 5 ++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/VEX/priv/host_amd64_isel.c b/VEX/priv/host_amd64_isel.c index 8dc3068..dfaabb4 100644 --- a/VEX/priv/host_amd64_isel.c +++ b/VEX/priv/host_amd64_isel.c @@ -4003,6 +4003,14 @@ static void iselDVecExpr_wrk ( /*OUT*/HReg* rHi, /*OUT*/HReg* rLo, *rLo = vLo; return; } + case 0xFFFFFFFF: { + HReg vHi = generate_ones_V128(env); + HReg vLo = newVRegV(env); + addInstr(env, mk_vMOVsd_RR(vHi, vLo)); + *rHi = vHi; + *rLo = vLo; + return; + } default: break; /* give up. Until such time as is necessary. */ } diff --git a/VEX/priv/ir_opt.c b/VEX/priv/ir_opt.c index 9e9c026..ca67712 100644 --- a/VEX/priv/ir_opt.c +++ b/VEX/priv/ir_opt.c @@ -1298,6 +1298,8 @@ static IRExpr* mkOnesOfPrimopResultType ( IROp op ) case Iop_CmpEQ16x8: case Iop_CmpEQ32x4: return IRExpr_Const(IRConst_V128(0xFFFF)); + case Iop_CmpEQ32x8: + return IRExpr_Const(IRConst_V256(0xFFFFFFFF)); default: ppIROp(op); vpanic("mkOnesOfPrimopResultType: bad primop"); @@ -2352,7 +2354,7 @@ static IRExpr* fold_Expr ( IRExpr** env, IRExpr* e ) case Iop_Xor64: case Iop_XorV128: case Iop_XorV256: - /* Xor8/16/32/64/V128(t,t) ==> 0, for some IRTemp t */ + /* Xor8/16/32/64/V128/V256(t,t) ==> 0, for some IRTemp t */ if (sameIRExprs(env, e->Iex.Binop.arg1, e->Iex.Binop.arg2)) { e2 = mkZeroOfPrimopResultType(e->Iex.Binop.op); break; @@ -2405,6 +2407,7 @@ static IRExpr* fold_Expr ( IRExpr** env, IRExpr* e ) case Iop_CmpEQ8x16: case Iop_CmpEQ16x8: case Iop_CmpEQ32x4: + case Iop_CmpEQ32x8: if (sameIRExprs(env, e->Iex.Binop.arg1, e->Iex.Binop.arg2)) { e2 = mkOnesOfPrimopResultType(e->Iex.Binop.op); break; |
|
From: Petar J. <pe...@so...> - 2019-11-14 12:34:21
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=4456279023e6de9aa6ae7442dca195564edfc3bd commit 4456279023e6de9aa6ae7442dca195564edfc3bd Author: Petar Jovanovic <mip...@gm...> Date: Thu Nov 14 12:32:50 2019 +0000 mips64: upgrade parts of valgrind's fast cache for the n32 abi Update the list of architectures to differentiate between the n32 and n64 abi for mips64 when defining the fast cache macros in coregrind/pub_core_transtab_asm.h. Also amend the VG_(disp_cp_xindir) function in coregrind/m_dispatch/dispatch-mips64-linux.S to use word-sized loads in case of the n32 abi since the FastCacheSet structure members are now 4 bytes in size for mips64 n32. Patch by Stefan Maksimovic. Diff: --- coregrind/m_dispatch/dispatch-mips64-linux.S | 36 ++++++++++++++++++++++++++++ coregrind/pub_core_transtab_asm.h | 6 +++-- 2 files changed, 40 insertions(+), 2 deletions(-) diff --git a/coregrind/m_dispatch/dispatch-mips64-linux.S b/coregrind/m_dispatch/dispatch-mips64-linux.S index 0b1582e..e8b8bf1 100644 --- a/coregrind/m_dispatch/dispatch-mips64-linux.S +++ b/coregrind/m_dispatch/dispatch-mips64-linux.S @@ -220,6 +220,7 @@ VG_(disp_cp_xindir): .long 0x0 1: // try way 1 + #if defined(VGABI_64) ld $14, FCS_g1($16) bne $14, $10, 2f // cmp against .guest1 // hit at way 1; swap upwards @@ -230,6 +231,17 @@ VG_(disp_cp_xindir): sd $13, FCS_h0($16) // new .host0 = old .host1 sd $11, FCS_g1($16) // new .guest1 = old .guest0 sd $12, FCS_h1($16) // new .host1 = old .host0 + #elif defined(VGABI_N32) + lw $14, FCS_g1($16) + bne $14, $10, 2f + lw $11, FCS_g0($16) + lw $12, FCS_h0($16) + lw $13, FCS_h1($16) + sw $10, FCS_g0($16) + sw $13, FCS_h0($16) + sw $11, FCS_g1($16) + sw $12, FCS_h1($16) + #endif // stats only lw $15, VG_(stats__n_xIndir_hits1_32) addiu $15, $15, 1 @@ -240,6 +252,7 @@ VG_(disp_cp_xindir): .long 0x0 2: // try way 2 + #if defined(VGABI_64) ld $14, FCS_g2($16) bne $14, $10, 3f // cmp against .guest2 // hit at way 2; swap upwards @@ -250,6 +263,17 @@ VG_(disp_cp_xindir): sd $13, FCS_h1($16) sd $11, FCS_g2($16) sd $12, FCS_h2($16) + #elif defined(VGABI_N32) + lw $14, FCS_g2($16) + bne $14, $10, 3f + lw $11, FCS_g1($16) + lw $12, FCS_h1($16) + lw $13, FCS_h2($16) + sw $10, FCS_g1($16) + sw $13, FCS_h1($16) + sw $11, FCS_g2($16) + sw $12, FCS_h2($16) + #endif // stats only lw $15, VG_(stats__n_xIndir_hits2_32) addiu $15, $15, 1 @@ -260,6 +284,7 @@ VG_(disp_cp_xindir): .long 0x0 3: // try way 3 + #if defined(VGABI_64) ld $14, FCS_g3($16) bne $14, $10, 4f // cmp against .guest3 // hit at way 3; swap upwards @@ -270,6 +295,17 @@ VG_(disp_cp_xindir): sd $13, FCS_h2($16) sd $11, FCS_g3($16) sd $12, FCS_h3($16) + #elif defined(VGABI_N32) + lw $14, FCS_g3($16) + bne $14, $10, 4f + lw $11, FCS_g2($16) + lw $12, FCS_h2($16) + lw $13, FCS_h3($16) + sw $10, FCS_g2($16) + sw $13, FCS_h2($16) + sw $11, FCS_g3($16) + sw $12, FCS_h3($16) + #endif // stats only lw $15, VG_(stats__n_xIndir_hits3_32) addiu $15, $15, 1 diff --git a/coregrind/pub_core_transtab_asm.h b/coregrind/pub_core_transtab_asm.h index 8cbf51c..8b585f1 100644 --- a/coregrind/pub_core_transtab_asm.h +++ b/coregrind/pub_core_transtab_asm.h @@ -81,7 +81,8 @@ // Log2(sizeof(FastCacheSet)). This is needed in the handwritten assembly. #if defined(VGA_amd64) || defined(VGA_arm64) \ - || defined(VGA_ppc64be) || defined(VGA_ppc64le) || defined(VGA_mips64) \ + || defined(VGA_ppc64be) || defined(VGA_ppc64le) \ + || (defined(VGA_mips64) && defined(VGABI_64)) \ || defined(VGA_s390x) // And all other 64-bit hosts # define VG_FAST_CACHE_SET_BITS 6 @@ -97,7 +98,8 @@ # define FCS_h3 56 #elif defined(VGA_x86) || defined(VGA_arm) || defined(VGA_ppc32) \ - || defined(VGA_mips32) || defined(VGP_nanomips_linux) + || defined(VGA_mips32) || defined(VGP_nanomips_linux) \ + || (defined(VGA_mips64) && defined(VGABI_N32)) // And all other 32-bit hosts # define VG_FAST_CACHE_SET_BITS 5 # define FCS_g0 0 |
|
From: Julian S. <se...@so...> - 2019-11-13 14:46:00
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=4f85d9a67ab437ef5624c0302b1850f9c6620772 commit 4f85d9a67ab437ef5624c0302b1850f9c6620772 Author: Julian Seward <js...@ac...> Date: Wed Nov 13 15:45:11 2019 +0100 insn_has_no_other_exits_or_PUTs_to_PC: also check Ist_PutI and Ist_Dirty for writes to the PC. Diff: --- VEX/priv/guest_generic_bb_to_IR.c | 38 +++++++++++++++++++++++++++++++++++--- 1 file changed, 35 insertions(+), 3 deletions(-) diff --git a/VEX/priv/guest_generic_bb_to_IR.c b/VEX/priv/guest_generic_bb_to_IR.c index 67e506f..3da99bc 100644 --- a/VEX/priv/guest_generic_bb_to_IR.c +++ b/VEX/priv/guest_generic_bb_to_IR.c @@ -622,9 +622,8 @@ static Bool any_overlap ( Int start1, Int len1, Int start2, Int len2 ) words, it scans backwards through some prefix of an instruction's IR to see if there is an exit there. - It also checks for explicit PUTs to the PC. - - FIXME: also check PutI and dirty helper calls for such PUTs. */ + It also checks for explicit PUTs to the PC, via Ist_Put, Ist_PutI or + Ist_Dirty. I suspect this is ridiculous overkill, but is here for safety. */ static Bool insn_has_no_other_exits_or_PUTs_to_PC ( IRStmt** const stmts, Int scan_start, Int offB_GUEST_IP, Int szB_GUEST_IP, @@ -654,6 +653,39 @@ static Bool insn_has_no_other_exits_or_PUTs_to_PC ( break; } } + if (st->tag == Ist_PutI) { + const IRPutI* details = st->Ist.PutI.details; + const IRRegArray* descr = details->descr; + Int offB = descr->base; + Int szB = descr->nElems * sizeofIRType(descr->elemTy); + if (any_overlap(offB, szB, offB_GUEST_IP, szB_GUEST_IP)) { + found_PUT_to_PC = True; + break; + } + } + if (st->tag == Ist_Dirty) { + vassert(!found_PUT_to_PC); + const IRDirty* details = st->Ist.Dirty.details; + for (Int j = 0; j < details->nFxState; j++) { + const IREffect fx = details->fxState[j].fx; + const Int offset = details->fxState[j].offset; + const Int size = details->fxState[j].size; + const Int nRepeats = details->fxState[j].nRepeats; + const Int repeatLen = details->fxState[j].repeatLen; + if (fx == Ifx_Write || fx == Ifx_Modify) { + for (Int k = 0; k < nRepeats; k++) { + Int offB = offset + k * repeatLen; + Int szB = size; + if (any_overlap(offB, szB, offB_GUEST_IP, szB_GUEST_IP)) { + found_PUT_to_PC = True; + } + } + } + } + if (found_PUT_to_PC) { + break; + } + } i--; } // We expect IR for all instructions to start with an IMark. |
|
From: Julian S. <se...@so...> - 2019-11-12 19:17:40
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=d418c5d7142f166088bd05e8e9857de6e7617bec commit d418c5d7142f166088bd05e8e9857de6e7617bec Author: Julian Seward <js...@ac...> Date: Tue Nov 12 20:16:54 2019 +0100 analyse_block_end: tidy this up .. .. and check more carefully for unexpected control flow in the blocks being analysed. Diff: --- VEX/priv/guest_generic_bb_to_IR.c | 133 +++++++++++++++++++++++++------------- 1 file changed, 87 insertions(+), 46 deletions(-) diff --git a/VEX/priv/guest_generic_bb_to_IR.c b/VEX/priv/guest_generic_bb_to_IR.c index 7782bcf..67e506f 100644 --- a/VEX/priv/guest_generic_bb_to_IR.c +++ b/VEX/priv/guest_generic_bb_to_IR.c @@ -509,9 +509,9 @@ static void add_guarded_stmt_to_end_of ( /*MOD*/IRSB* bb, typedef enum { - Be_Unknown=1, // Unknown end - Be_UnCond, // Unconditional branch to known destination, unassisted - Be_Cond // Conditional branch to known destinations, unassisted + Be_Other=1, // Block end isn't of interest to us + Be_Uncond, // Unconditional branch to known destination, unassisted + Be_Cond // Conditional branch to known destinations, unassisted } BlockEndTag; @@ -520,10 +520,10 @@ typedef BlockEndTag tag; union { struct { - } Unknown; + } Other; struct { Long delta; - } UnCond; + } Uncond; struct { IRTemp condSX; Long deltaSX; @@ -536,11 +536,11 @@ typedef static void ppBlockEnd ( const BlockEnd* be ) { switch (be->tag) { - case Be_Unknown: - vex_printf("!!Unknown!!"); + case Be_Other: + vex_printf("Other"); break; - case Be_UnCond: - vex_printf("UnCond{delta=%lld}", be->Be.UnCond.delta); + case Be_Uncond: + vex_printf("Uncond{delta=%lld}", be->Be.Uncond.delta); break; case Be_Cond: vex_printf("Cond{condSX="); @@ -558,11 +558,28 @@ static void ppBlockEnd ( const BlockEnd* be ) static Bool definitely_does_not_jump_to_delta ( const BlockEnd* be, Long delta ) { switch (be->tag) { - case Be_Unknown: return False; - case Be_UnCond: return be->Be.UnCond.delta != delta; - case Be_Cond: return be->Be.Cond.deltaSX != delta - && be->Be.Cond.deltaFT != delta; - default: vassert(0); + case Be_Other: + return False; + case Be_Uncond: + return be->Be.Uncond.delta != delta; + case Be_Cond: + return be->Be.Cond.deltaSX != delta && be->Be.Cond.deltaFT != delta; + default: + vassert(0); + } +} + +static Addr irconst_to_Addr ( const IRConst* con, const IRType guest_word_type ) +{ + switch (con->tag) { + case Ico_U32: + vassert(guest_word_type == Ity_I32); + return con->Ico.U32; + case Ico_U64: + vassert(guest_word_type == Ity_I64); + return con->Ico.U64; + default: + vassert(0); } } @@ -578,19 +595,7 @@ static Bool irconst_to_maybe_delta ( /*OUT*/Long* delta, *delta = 0; // Extract the destination guest address. - Addr dst_ga = 0; - switch (known_dst->tag) { - case Ico_U32: - vassert(guest_word_type == Ity_I32); - dst_ga = known_dst->Ico.U32; - break; - case Ico_U64: - vassert(guest_word_type == Ity_I64); - dst_ga = known_dst->Ico.U64; - break; - default: - vassert(0); - } + Addr dst_ga = irconst_to_Addr(known_dst, guest_word_type); // Check we're allowed to chase into it. if (!chase_into_ok(callback_opaque, dst_ga)) @@ -603,38 +608,67 @@ static Bool irconst_to_maybe_delta ( /*OUT*/Long* delta, return True; } +static Bool any_overlap ( Int start1, Int len1, Int start2, Int len2 ) +{ + vassert(len1 > 0 && len2 > 0); + vassert(start1 >= 0 && start2 >= 0); + if (start1 + len1 <= start2) return False; + if (start2 + len2 <= start1) return False; + return True; +} + /* Scan |stmts|, starting at |scan_start| and working backwards, to detect the case where there are no IRStmt_Exits before we find the IMark. In other words, it scans backwards through some prefix of an instruction's IR to see - if there is an exit there. */ -static Bool insn_has_no_other_exits ( IRStmt** const stmts, Int scan_start ) + if there is an exit there. + + It also checks for explicit PUTs to the PC. + + FIXME: also check PutI and dirty helper calls for such PUTs. */ +static Bool insn_has_no_other_exits_or_PUTs_to_PC ( + IRStmt** const stmts, Int scan_start, + Int offB_GUEST_IP, Int szB_GUEST_IP, + const IRTypeEnv* tyenv + ) { Bool found_exit = False; + Bool found_PUT_to_PC = False; Int i = scan_start; while (True) { if (i < 0) break; const IRStmt* st = stmts[i]; - if (st->tag == Ist_IMark) + if (st->tag == Ist_IMark) { + // We're back at the start of the insn. Stop searching. break; + } if (st->tag == Ist_Exit) { found_exit = True; break; } + if (st->tag == Ist_Put) { + Int offB = st->Ist.Put.offset; + Int szB = sizeofIRType(typeOfIRExpr(tyenv, st->Ist.Put.data)); + if (any_overlap(offB, szB, offB_GUEST_IP, szB_GUEST_IP)) { + found_PUT_to_PC = True; + break; + } + } i--; } // We expect IR for all instructions to start with an IMark. vassert(i >= 0); - return !found_exit; + return !found_exit && !found_PUT_to_PC; } -// FIXME make this able to recognise all block ends static void analyse_block_end ( /*OUT*/BlockEnd* be, const IRSB* irsb, const Addr guest_IP_sbstart, const IRType guest_word_type, Bool (*chase_into_ok)(void*,Addr), void* callback_opaque, - Bool debug_print ) + Int offB_GUEST_IP, + Int szB_GUEST_IP, + Bool debug_print ) { vex_bzero(be, sizeof(*be)); @@ -657,7 +691,9 @@ static void analyse_block_end ( /*OUT*/BlockEnd* be, const IRSB* irsb, && maybe_exit->Ist.Exit.guard->tag == Iex_RdTmp && maybe_exit->Ist.Exit.jk == Ijk_Boring && irsb->next->tag == Iex_Const - && insn_has_no_other_exits(irsb->stmts, irsb->stmts_used - 2)) { + && insn_has_no_other_exits_or_PUTs_to_PC( + irsb->stmts, irsb->stmts_used - 2, + offB_GUEST_IP, szB_GUEST_IP, irsb->tyenv)) { vassert(maybe_exit->Ist.Exit.offsIP == irsb->offsIP); IRConst* dst_SX = maybe_exit->Ist.Exit.dst; IRConst* dst_FT = irsb->next->Iex.Const.con; @@ -692,7 +728,9 @@ static void analyse_block_end ( /*OUT*/BlockEnd* be, const IRSB* irsb, */ if ((irsb->jumpkind == Ijk_Boring || irsb->jumpkind == Ijk_Call) && irsb->next->tag == Iex_Const) { - if (insn_has_no_other_exits(irsb->stmts, irsb->stmts_used - 1)) { + if (insn_has_no_other_exits_or_PUTs_to_PC( + irsb->stmts, irsb->stmts_used - 1, + offB_GUEST_IP, szB_GUEST_IP, irsb->tyenv)) { // We've got the right pattern. Check whether we can chase into the // destination, and if so convert that to a delta value. const IRConst* known_dst = irsb->next->Iex.Const.con; @@ -703,15 +741,15 @@ static void analyse_block_end ( /*OUT*/BlockEnd* be, const IRSB* irsb, guest_IP_sbstart, guest_word_type, chase_into_ok, callback_opaque); if (ok) { - be->tag = Be_UnCond; - be->Be.UnCond.delta = delta; + be->tag = Be_Uncond; + be->Be.Uncond.delta = delta; goto out; } } } - be->tag = Be_Unknown; - // Not identified as anything in particular. + // Not identified as anything of interest to us. + be->tag = Be_Other; out: if (debug_print) { @@ -1271,16 +1309,17 @@ IRSB* bb_to_IR ( // ends. BlockEnd irsb_be; analyse_block_end(&irsb_be, irsb, guest_IP_sbstart, guest_word_type, - chase_into_ok, callback_opaque, debug_print); + chase_into_ok, callback_opaque, + offB_GUEST_IP, szB_GUEST_IP, debug_print); // Try for an extend based on an unconditional branch or call to a known // destination. - if (irsb_be.tag == Be_UnCond) { + if (irsb_be.tag == Be_Uncond) { if (debug_print) { vex_printf("\n-+-+ Unconditional follow (ext# %d) to 0x%llx " "-+-+\n\n", (Int)vge->n_used, - (ULong)((Long)guest_IP_sbstart+ irsb_be.Be.UnCond.delta)); + (ULong)((Long)guest_IP_sbstart+ irsb_be.Be.Uncond.delta)); } Int bb_instrs_used = 0; Bool bb_verbose_seen = False; @@ -1290,7 +1329,7 @@ IRSB* bb_to_IR ( = disassemble_basic_block_till_stop( /*OUT*/ &bb_instrs_used, &bb_verbose_seen, &bb_base, &bb_len, /*MOD*/ emptyIRSB(), - /*IN*/ irsb_be.Be.UnCond.delta, + /*IN*/ irsb_be.Be.Uncond.delta, instrs_avail, guest_IP_sbstart, host_endness, sigill_diag, arch_guest, archinfo_guest, abiinfo_both, guest_word_type, debug_print, dis_instr_fn, guest_code, offB_GUEST_IP @@ -1305,7 +1344,7 @@ IRSB* bb_to_IR ( add_extent(vge, bb_base, bb_len); update_instr_budget(&instrs_avail, &verbose_mode, bb_instrs_used, bb_verbose_seen); - } // if (be.tag == Be_UnCond) + } // if (be.tag == Be_Uncond) // Try for an extend based on a conditional branch, specifically in the // hope of identifying and recovering, an "A && B" condition spread across @@ -1339,7 +1378,8 @@ IRSB* bb_to_IR ( vassert(sx_instrs_used <= instrs_avail_spec); BlockEnd sx_be; analyse_block_end(&sx_be, sx_bb, guest_IP_sbstart, guest_word_type, - chase_into_ok, callback_opaque, debug_print); + chase_into_ok, callback_opaque, + offB_GUEST_IP, szB_GUEST_IP, debug_print); if (debug_print) { vex_printf("\n-+-+ SPEC fall through -+-+\n\n"); @@ -1360,7 +1400,8 @@ IRSB* bb_to_IR ( vassert(ft_instrs_used <= instrs_avail_spec); BlockEnd ft_be; analyse_block_end(&ft_be, ft_bb, guest_IP_sbstart, guest_word_type, - chase_into_ok, callback_opaque, debug_print); + chase_into_ok, callback_opaque, + offB_GUEST_IP, szB_GUEST_IP, debug_print); /* In order for the transformation to be remotely valid, we need: - At least one of the sx_bb or ft_bb to be have a Be_Cond end. |
|
From: Mark W. <ma...@so...> - 2019-11-12 14:46:32
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=ef9ac3aa0fd3ed41d74707ffe49abe9ad2797ddd commit ef9ac3aa0fd3ed41d74707ffe49abe9ad2797ddd Author: Alexandra Hájková <aha...@re...> Date: Mon Nov 11 14:30:26 2019 +0100 fix avx-1 amd64 test The estimate instructions (rcpss, rcpps, rsqrtps, rsqrtss) are, as the name suggests, not expected to give a fully accurate result. They may produce slighly different results on different CPU families because their results are not defined by the IEEE standard. This is the reason avx-1 test fails on amd now. This patch assumes there are only two implementations, the intel and amd one. It moves these estimate instructions out of avx-1 and into their own testcase - avx_estimate_insn and creates two different .exp files for intel and amd. https://bugs.kde.org/show_bug.cgi?id=413330 Diff: --- NEWS | 1 + none/tests/amd64/Makefile.am | 4 +- none/tests/amd64/avx-1.c | 191 +- none/tests/amd64/avx-1.stdout.exp | 10207 +++++++++++------------- none/tests/amd64/avx_estimate_insn.c | 63 + none/tests/amd64/avx_estimate_insn.stderr.exp | 0 none/tests/amd64/avx_estimate_insn.stdout.exp | 891 +++ none/tests/amd64/avx_estimate_insn.vgtest | 3 + none/tests/amd64/avx_tests.h | 133 + 9 files changed, 5753 insertions(+), 5740 deletions(-) diff --git a/NEWS b/NEWS index 0de69ee..e0689d5 100644 --- a/NEWS +++ b/NEWS @@ -83,6 +83,7 @@ where XXXXXX is the bug number as listed below. 410599 Non-deterministic behaviour of pth_self_kill_15_other test 411134 Allow the user to change a set of command line options during execution 412344 Problem setting mips flags with specific paths +413330 avx-1 test fails on AMD EPYC 7401P 24-Core Processor 413603 callgrind_annotate/cg_annotate truncate function names at '#' n-i-bz Fix minor one time leaks in dhat. diff --git a/none/tests/amd64/Makefile.am b/none/tests/amd64/Makefile.am index 2ec7682..3196d00 100644 --- a/none/tests/amd64/Makefile.am +++ b/none/tests/amd64/Makefile.am @@ -24,6 +24,7 @@ EXTRA_DIST = \ aes.vgtest aes.stdout.exp aes.stderr.exp \ amd64locked.vgtest amd64locked.stdout.exp amd64locked.stderr.exp \ avx-1.vgtest avx-1.stdout.exp avx-1.stderr.exp \ + avx_estimate_insn.vgtest avx_estimate_insn.stdout.exp avx_estimate_insn.stderr.exp \ avx2-1.vgtest avx2-1.stdout.exp avx2-1.stderr.exp \ asorep.stderr.exp asorep.stdout.exp asorep.vgtest \ bmi.stderr.exp bmi.stdout.exp bmi.vgtest \ @@ -120,7 +121,8 @@ if BUILD_ADX_TESTS endif if BUILD_AVX_TESTS if BUILD_VPCLMULQDQ_TESTS - check_PROGRAMS += avx-1 + check_PROGRAMS += avx-1 \ + avx_estimate_insn endif if BUILD_FMA4_TESTS check_PROGRAMS += fma4 diff --git a/none/tests/amd64/avx-1.c b/none/tests/amd64/avx-1.c index 134725c..8042cf4 100644 --- a/none/tests/amd64/avx-1.c +++ b/none/tests/amd64/avx-1.c @@ -1,119 +1,4 @@ - -#include <stdio.h> -#include <stdlib.h> -#include <assert.h> -#include "tests/malloc.h" - -typedef unsigned char UChar; -typedef unsigned int UInt; -typedef unsigned long int UWord; -typedef unsigned long long int ULong; - -#define IS_32_ALIGNED(_ptr) (0 == (0x1F & (UWord)(_ptr))) - -typedef union { UChar u8[32]; UInt u32[8]; } YMM; - -typedef struct { YMM a1; YMM a2; YMM a3; YMM a4; ULong u64; } Block; - -void showYMM ( YMM* vec ) -{ - int i; - assert(IS_32_ALIGNED(vec)); - for (i = 31; i >= 0; i--) { - printf("%02x", (UInt)vec->u8[i]); - if (i > 0 && 0 == ((i+0) & 7)) printf("."); - } -} - -void showBlock ( char* msg, Block* block ) -{ - printf(" %s\n", msg); - printf(" "); showYMM(&block->a1); printf("\n"); - printf(" "); showYMM(&block->a2); printf("\n"); - printf(" "); showYMM(&block->a3); printf("\n"); - printf(" "); showYMM(&block->a4); printf("\n"); - printf(" %016llx\n", block->u64); -} - -UChar randUChar ( void ) -{ - static UInt seed = 80021; - seed = 1103515245 * seed + 12345; - return (seed >> 17) & 0xFF; -} - -void randBlock ( Block* b ) -{ - int i; - UChar* p = (UChar*)b; - for (i = 0; i < sizeof(Block); i++) - p[i] = randUChar(); -} - - -/* Generate a function test_NAME, that tests the given insn, in both - its mem and reg forms. The reg form of the insn may mention, as - operands only %ymm6, %ymm7, %ymm8, %ymm9 and %r14. The mem form of - the insn may mention as operands only (%rsi), %ymm7, %ymm8, %ymm9 - and %r14. It's OK for the insn to clobber ymm0, rax and rdx, as these - are needed for testing PCMPxSTRx, and ymm6, as this is needed for testing - MOVMASK variants. */ - -#define GEN_test_RandM(_name, _reg_form, _mem_form) \ - \ - __attribute__ ((noinline)) static void test_##_name ( void ) \ - { \ - Block* b = memalign32(sizeof(Block)); \ - randBlock(b); \ - printf("%s(reg)\n", #_name); \ - showBlock("before", b); \ - __asm__ __volatile__( \ - "vmovdqa 0(%0),%%ymm7" "\n\t" \ - "vmovdqa 32(%0),%%ymm8" "\n\t" \ - "vmovdqa 64(%0),%%ymm6" "\n\t" \ - "vmovdqa 96(%0),%%ymm9" "\n\t" \ - "movq 128(%0),%%r14" "\n\t" \ - _reg_form "\n\t" \ - "vmovdqa %%ymm7, 0(%0)" "\n\t" \ - "vmovdqa %%ymm8, 32(%0)" "\n\t" \ - "vmovdqa %%ymm6, 64(%0)" "\n\t" \ - "vmovdqa %%ymm9, 96(%0)" "\n\t" \ - "movq %%r14, 128(%0)" "\n\t" \ - : /*OUT*/ \ - : /*IN*/"r"(b) \ - : /*TRASH*/"xmm0","xmm7","xmm8","xmm6","xmm9","r14","memory","cc", \ - "rax","rdx" \ - ); \ - showBlock("after", b); \ - randBlock(b); \ - printf("%s(mem)\n", #_name); \ - showBlock("before", b); \ - __asm__ __volatile__( \ - "leaq 0(%0),%%rsi" "\n\t" \ - "vmovdqa 32(%0),%%ymm8" "\n\t" \ - "vmovdqa 64(%0),%%ymm7" "\n\t" \ - "vmovdqa 96(%0),%%ymm9" "\n\t" \ - "movq 128(%0),%%r14" "\n\t" \ - _mem_form "\n\t" \ - "vmovdqa %%ymm8, 32(%0)" "\n\t" \ - "vmovdqa %%ymm7, 64(%0)" "\n\t" \ - "vmovdqa %%ymm9, 96(%0)" "\n\t" \ - "movq %%r14, 128(%0)" "\n\t" \ - : /*OUT*/ \ - : /*IN*/"r"(b) \ - : /*TRASH*/"xmm6", \ - "xmm0","xmm8","xmm7","xmm9","r14","rsi","memory","cc", \ - "rax","rdx" \ - ); \ - showBlock("after", b); \ - printf("\n"); \ - free(b); \ - } - -#define GEN_test_Ronly(_name, _reg_form) \ - GEN_test_RandM(_name, _reg_form, "") -#define GEN_test_Monly(_name, _mem_form) \ - GEN_test_RandM(_name, "", _mem_form) +#include"avx_tests.h" GEN_test_RandM(VPOR_128, @@ -1867,38 +1752,6 @@ GEN_test_RandM(VMOVUPS_EtoG_256, "vmovups %%ymm6, %%ymm9", "vmovups (%%rsi), %%ymm7") -GEN_test_RandM(VSQRTSS_128, - "vsqrtss %%xmm6, %%xmm8, %%xmm7", - "vsqrtss (%%rsi), %%xmm8, %%xmm7") - -GEN_test_RandM(VSQRTPS_128, - "vsqrtps %%xmm6, %%xmm8", - "vsqrtps (%%rsi), %%xmm8") - -GEN_test_RandM(VSQRTPS_256, - "vsqrtps %%ymm6, %%ymm8", - "vsqrtps (%%rsi), %%ymm8") - -GEN_test_RandM(VSQRTPD_128, - "vsqrtpd %%xmm6, %%xmm8", - "vsqrtpd (%%rsi), %%xmm8") - -GEN_test_RandM(VSQRTPD_256, - "vsqrtpd %%ymm6, %%ymm8", - "vsqrtpd (%%rsi), %%ymm8") - -GEN_test_RandM(VRSQRTSS_128, - "vrsqrtss %%xmm6, %%xmm8, %%xmm7", - "vrsqrtss (%%rsi), %%xmm8, %%xmm7") - -GEN_test_RandM(VRSQRTPS_128, - "vrsqrtps %%xmm6, %%xmm8", - "vrsqrtps (%%rsi), %%xmm8") - -GEN_test_RandM(VRSQRTPS_256, - "vrsqrtps %%ymm6, %%ymm8", - "vrsqrtps (%%rsi), %%ymm8") - GEN_test_RandM(VMOVDQU_GtoE_256, "vmovdqu %%ymm9, %%ymm6", "vmovdqu %%ymm7, (%%rsi)") @@ -2530,18 +2383,6 @@ GEN_test_Monly(VMOVLPS_128_M64_XMM_XMM, "vmovlps (%%rsi), %%xmm8, %%xmm7") GEN_test_Monly(VMOVLPS_128_XMM_M64, "vmovlps %%xmm7, (%%rsi)") -GEN_test_RandM(VRCPSS_128, - "vrcpss %%xmm6, %%xmm8, %%xmm7", - "vrcpss (%%rsi), %%xmm8, %%xmm7") - -GEN_test_RandM(VRCPPS_128, - "vrcpps %%xmm6, %%xmm8", - "vrcpps (%%rsi), %%xmm8") - -GEN_test_RandM(VRCPPS_256, - "vrcpps %%ymm6, %%ymm8", - "vrcpps (%%rsi), %%ymm8") - GEN_test_RandM(VPSADBW_128, "vpsadbw %%xmm6, %%xmm8, %%xmm7", "vpsadbw (%%rsi), %%xmm8, %%xmm7") @@ -2679,25 +2520,6 @@ GEN_test_Monly(VMASKMOVPD_256_StoreForm, "vxorpd %%ymm6, %%ymm6, %%ymm6;" "vmaskmovpd %%ymm9, %%ymm6, (%%rsi,%%rsi,4)") -/* Comment duplicated above, for convenient reference: - Allowed operands in test insns: - Reg form: %ymm6, %ymm7, %ymm8, %ymm9 and %r14. - Mem form: (%rsi), %ymm7, %ymm8, %ymm9 and %r14. - Imm8 etc fields are also allowed, where they make sense. - Both forms may use ymm0, rax and rdx as scratch. - Mem form may also use ymm6 as scratch. -*/ - -#define N_DEFAULT_ITERS 3 - -// Do the specified test some number of times -#define DO_N(_iters, _testfn) \ - do { int i; for (i = 0; i < (_iters); i++) { test_##_testfn(); } } while (0) - -// Do the specified test the default number of times -#define DO_D(_testfn) DO_N(N_DEFAULT_ITERS, _testfn) - - int main ( void ) { DO_D( VMOVUPD_EtoG_256 ); @@ -3041,14 +2863,6 @@ int main ( void ) DO_D( VPBLENDW_128_0x85 ); DO_D( VPBLENDW_128_0x29 ); DO_D( VMOVUPS_EtoG_256 ); - DO_D( VSQRTSS_128 ); - DO_D( VSQRTPS_128 ); - DO_D( VSQRTPS_256 ); - DO_D( VSQRTPD_128 ); - DO_D( VSQRTPD_256 ); - DO_D( VRSQRTSS_128 ); - DO_D( VRSQRTPS_128 ); - DO_D( VRSQRTPS_256 ); DO_D( VMOVDQU_GtoE_256 ); DO_D( VCVTPS2PD_256 ); DO_D( VCVTTPS2DQ_128 ); @@ -3214,9 +3028,6 @@ int main ( void ) DO_D( VMOVDDUP_YMMorMEM256_to_YMM ); DO_D( VMOVLPS_128_M64_XMM_XMM ); DO_D( VMOVLPS_128_XMM_M64 ); - DO_D( VRCPSS_128 ); - DO_D( VRCPPS_128 ); - DO_D( VRCPPS_256 ); DO_D( VPSADBW_128 ); DO_D( VPSIGNB_128 ); DO_D( VPSIGNW_128 ); diff --git a/none/tests/amd64/avx-1.stdout.exp b/none/tests/amd64/avx-1.stdout.exp index 33280d5..a6e3a15 100644 --- a/none/tests/amd64/avx-1.stdout.exp +++ b/none/tests/amd64/avx-1.stdout.exp @@ -27457,7 +27457,7 @@ VMOVUPS_EtoG_256(mem) b7ca346ecc3614c4.6763a2c958e164eb.bf9c4236ea0219f3.1b8e30a427b58458 2f4d0558a11b2bc6 -VSQRTSS_128(reg) +VMOVDQU_GtoE_256(reg) before 00a63906699e2f4d.4ce1fcbf7e092808.6e05070d458492d0.edbe12a2ed9eb7c3 ebe6c8191bcaca96.943cd14b23127395.a0a809c00f4a7ae2.a0fdf11394aa6f06 @@ -27465,12 +27465,12 @@ VSQRTSS_128(reg) 7f4ae71eaf4fb825.acee8fc0b7f7a538.f921d523a7716740.0406cab144441f94 6e67bcb684e98f37 after - 0000000000000000.0000000000000000.a0a809c00f4a7ae2.a0fdf113ffc00000 + 00a63906699e2f4d.4ce1fcbf7e092808.6e05070d458492d0.edbe12a2ed9eb7c3 ebe6c8191bcaca96.943cd14b23127395.a0a809c00f4a7ae2.a0fdf11394aa6f06 - 4c58aefd542c3a50.6ba72efcd75db496.5b98a44e51c058ce.b4275b74fe33fde8 + 7f4ae71eaf4fb825.acee8fc0b7f7a538.f921d523a7716740.0406cab144441f94 7f4ae71eaf4fb825.acee8fc0b7f7a538.f921d523a7716740.0406cab144441f94 6e67bcb684e98f37 -VSQRTSS_128(mem) +VMOVDQU_GtoE_256(mem) before cd16ab70da2f0afc.e00770e8c8c083c1.35dc7082dfeb03a6.d88e96abaee9e4e3 fddf16c961214b10.cbda44c73d09d5d2.e13f4d2e6a458a0e.522de55201b50b64 @@ -27478,13 +27478,13 @@ VSQRTSS_128(mem) 3fef480c743a12d4.aef5be75a45901fd.128fedf41a5d0176.8b2c1aaefe7646af 0125f93ade84d2d0 after - cd16ab70da2f0afc.e00770e8c8c083c1.35dc7082dfeb03a6.d88e96abaee9e4e3 + da8e76af36cb0f9f.9b105f27a7b9eb01.8ce1a3b07412f599.c448bd843d60186f fddf16c961214b10.cbda44c73d09d5d2.e13f4d2e6a458a0e.522de55201b50b64 - 0000000000000000.0000000000000000.e13f4d2e6a458a0e.522de552ffc00000 + da8e76af36cb0f9f.9b105f27a7b9eb01.8ce1a3b07412f599.c448bd843d60186f 3fef480c743a12d4.aef5be75a45901fd.128fedf41a5d0176.8b2c1aaefe7646af 0125f93ade84d2d0 -VSQRTSS_128(reg) +VMOVDQU_GtoE_256(reg) before 847f54967c15f880.0acd09ce377910db.5fd55b1bd0775270.4e15a7e677326acf 6e85292c71b5f369.16f534df9c94c4e2.0afb3487c69e1b06.1e3f4e72a89eecd0 @@ -27492,12 +27492,12 @@ VSQRTSS_128(reg) eac92fbbd6545b97.6053b9a3bb90419a.bd4d875d8138044e.e6ae4f08f468297d 978ca2eb47df5d80 after - 0000000000000000.0000000000000000.0afb3487c69e1b06.1e3f4e72ffc00000 + 847f54967c15f880.0acd09ce377910db.5fd55b1bd0775270.4e15a7e677326acf 6e85292c71b5f369.16f534df9c94c4e2.0afb3487c69e1b06.1e3f4e72a89eecd0 - 1c85736a5cf10137.3e33452dbf98ec13.0bb54424225b986c.5dd95c84c8ac42a6 + eac92fbbd6545b97.6053b9a3bb90419a.bd4d875d8138044e.e6ae4f08f468297d eac92fbbd6545b97.6053b9a3bb90419a.bd4d875d8138044e.e6ae4f08f468297d 978ca2eb47df5d80 -VSQRTSS_128(mem) +VMOVDQU_GtoE_256(mem) before 4a3dd118de1c99dc.349e578b7e6a4035.56210a2dac8882a4.7e11faa07fc49d57 dd8e597ad42c9abd.5750e946edc0eabc.fe69b6b7af8d695d.a94b9758b7889d34 @@ -27505,13 +27505,13 @@ VSQRTSS_128(mem) 0f4060924ff2dbbb.937a382d96598037.d0960c7c59eb1c8a.ac5344d746edc419 3dba4b77d5a66379 after - 4a3dd118de1c99dc.349e578b7e6a4035.56210a2dac8882a4.7e11faa07fc49d57 + 2a4bb4ff46191c4e.ad2be058c1e196d9.33f6382ee0aab3f0.99485cf1c5124091 dd8e597ad42c9abd.5750e946edc0eabc.fe69b6b7af8d695d.a94b9758b7889d34 - 0000000000000000.0000000000000000.fe69b6b7af8d695d.a94b97587fc49d57 + 2a4bb4ff46191c4e.ad2be058c1e196d9.33f6382ee0aab3f0.99485cf1c5124091 0f4060924ff2dbbb.937a382d96598037.d0960c7c59eb1c8a.ac5344d746edc419 3dba4b77d5a66379 -VSQRTSS_128(reg) +VMOVDQU_GtoE_256(reg) before a7c76e3b0fc85a5c.6638d81f0bc09232.658bee3107b5e483.b213af8e395d5f57 48c8a8908fdfe46f.0d0199929791fedc.7fa8fcd1b080fd69.b63a9c51990b3a82 @@ -27519,12 +27519,12 @@ VSQRTSS_128(reg) 9bd1519fd31ea5d3.b631e2da8d69e480.fb3a15911d9440b1.90b544964f4da2a4 1ea2f7f1dcf8a8f3 after - 0000000000000000.0000000000000000.7fa8fcd1b080fd69.b63a9c51ffc00000 + a7c76e3b0fc85a5c.6638d81f0bc09232.658bee3107b5e483.b213af8e395d5f57 48c8a8908fdfe46f.0d0199929791fedc.7fa8fcd1b080fd69.b63a9c51990b3a82 - 7a07f5e3f2783f5d.de651dd70f70dbe8.3d1f60772e460894.b6d74faf98026637 + 9bd1519fd31ea5d3.b631e2da8d69e480.fb3a15911d9440b1.90b544964f4da2a4 9bd1519fd31ea5d3.b631e2da8d69e480.fb3a15911d9440b1.90b544964f4da2a4 1ea2f7f1dcf8a8f3 -VSQRTSS_128(mem) +VMOVDQU_GtoE_256(mem) before 3d68e5ac5b0f3550.0571b82fcf5d527d.723163873089d6d1.1545188918f5e36b c9d589b3e79f05e8.1535270181c28406.ec311ccb12db6d06.e78e63cdbbf62b6f @@ -27532,13 +27532,13 @@ VSQRTSS_128(mem) 99cfe35598585d78.98550a18782b6268.8d6027c4044779ce.2206c6e66b059c04 44cdd593b02b3dec after - 3d68e5ac5b0f3550.0571b82fcf5d527d.723163873089d6d1.1545188918f5e36b + 9fb35ff29db3d4e7.2868998085d8751b.01fd8a904f6c654c.cd60f4c8a3225569 c9d589b3e79f05e8.1535270181c28406.ec311ccb12db6d06.e78e63cdbbf62b6f - 0000000000000000.0000000000000000.ec311ccb12db6d06.e78e63cd2c316887 + 9fb35ff29db3d4e7.2868998085d8751b.01fd8a904f6c654c.cd60f4c8a3225569 99cfe35598585d78.98550a18782b6268.8d6027c4044779ce.2206c6e66b059c04 44cdd593b02b3dec -VSQRTPS_128(reg) +VCVTPS2PD_256(reg) before 8e021d3b0d2174cf.94f491c8f4995dc8.c2497635f6488798.6d2871524c7866b9 5cee9b4a1f727d57.6cf0e637ce828f02.0390da439aba1f57.7b1fe325440ce839 @@ -27547,11 +27547,11 @@ VSQRTPS_128(reg) 571b037d608c41eb after 8e021d3b0d2174cf.94f491c8f4995dc8.c2497635f6488798.6d2871524c7866b9 - 0000000000000000.0000000000000000.ffc000001f25aea5.ffc00000233f2680 - 09e04a2d81ab9430.fd8d5d8f4220b153.b57630ae000d6753.9412f92b070eba79 + 5cee9b4a1f727d57.6cf0e637ce828f02.0390da439aba1f57.7b1fe325440ce839 + 3ea8eedc60000000.c0b9d366a0000000.ba99a609e0000000.be515354c0000000 f323264ed057f407.239972ba6b7e7de7.354776e3c5ce9b35.94cd304fb28a9aa6 571b037d608c41eb -VSQRTPS_128(mem) +VCVTPS2PD_256(mem) before b9caeea12e216e75.75022b1ba702d988.badea1a665a8afe9.df4ea84c8588f6ac 96a46da83755db70.eacb56fea238815e.9e29673e4daa0586.0fd9c057dac7b562 @@ -27560,12 +27560,12 @@ VSQRTPS_128(mem) 5c814c757b1da1b9 after b9caeea12e216e75.75022b1ba702d988.badea1a665a8afe9.df4ea84c8588f6ac - 0000000000000000.0000000000000000.ffc000005292f128.ffc00000ffc00000 - ca77fc7c97324607.b0c8a1655f862636.ab463f6d3e9139e9.2132bb6f63181403 + 96a46da83755db70.eacb56fea238815e.9e29673e4daa0586.0fd9c057dac7b562 + bf5bd434c0000000.44b515fd20000000.c3e9d50980000000.b8b11ed580000000 310d180b6bc66867.21460abb777805bc.bd00a5215569083f.71a696ffb9064f3d 5c814c757b1da1b9 -VSQRTPS_128(reg) +VCVTPS2PD_256(reg) before 3c0fda3c42ea4726.a7333c3fcf1c00bb.9b918c6c88985a9b.b0251545ad3c2eb4 6d9b3ac0adf87d2e.08b4e406de41c830.79f424e42e746080.607f0bc563186673 @@ -27574,11 +27574,11 @@ VSQRTPS_128(reg) 75c9eca6cd56d828 after 3c0fda3c42ea4726.a7333c3fcf1c00bb.9b918c6c88985a9b.b0251545ad3c2eb4 - 0000000000000000.0000000000000000.2b1bddc1218b2d98.ffc00000ffc00000 - 4d736a6d55d47f7d.2f5e8c4ab4407df2.16bdcc8f03975516.a9db048e92096da9 + 6d9b3ac0adf87d2e.08b4e406de41c830.79f424e42e746080.607f0bc563186673 + c1e6d05b20000000.bcd1ce4140000000.44e0cf7140000000.42e33ff020000000 37e165afd90888c1.fafbb0f96e25db2c.cf3682d9a68e720a.67067b8a5719ff81 75c9eca6cd56d828 -VSQRTPS_128(mem) +VCVTPS2PD_256(mem) before b1f3d3cf11ccb3c9.873227f3d222d5a3.4459cdfe27fd9d0a.01ad412eb1e4f607 f64fadef3e854d91.99b2aca3deaea1d2.e9425e45fcd380ba.066c05fbc0251bba @@ -27587,12 +27587,12 @@ VSQRTPS_128(mem) a656496221e5aecd after b1f3d3cf11ccb3c9.873227f3d222d5a3.4459cdfe27fd9d0a.01ad412eb1e4f607 - 0000000000000000.0000000000000000.41ec219d33b42c70.2094eb06ffc00000 - 20a8f5f4708f61ac.c9adf12d99372af8.c483dfba08b34066.3cc0cbaa70de1ecf + f64fadef3e854d91.99b2aca3deaea1d2.e9425e45fcd380ba.066c05fbc0251bba + 408b39bfc0000000.3cffb3a140000000.3835a825c0000000.be3c9ec0e0000000 0acb26c9c4f6ad46.736ff0fb9e49aac1.b3e8cc4968aa993a.fdf48da95c9a3bf1 a656496221e5aecd -VSQRTPS_128(reg) +VCVTPS2PD_256(reg) before 9330fa435a4cb20e.9285bf5956c4eb89.f243a77b89705eda.913ca2df37c34663 21d09db7a45a8461.929f39924107d8a4.a4771218f73981ef.394ddc66920b040d @@ -27601,11 +27601,11 @@ VSQRTPS_128(reg) 8ddebbe1ff6ffac6 after 9330fa435a4cb20e.9285bf5956c4eb89.f243a77b89705eda.913ca2df37c34663 - 0000000000000000.0000000000000000.ffc00000ffc00000.ffc00000ffc00000 - aa802c2a9a9b5f72.e8e8125fa1cb2fc1.e4552b3e843050ab.89e5f6cc948c8f63 + 21d09db7a45a8461.929f39924107d8a4.a4771218f73981ef.394ddc66920b040d + 39c55e0b00000000.c15be0f760000000.437a4d9f60000000.434a945240000000 8b8da508d99c81ec.6f2bc5ac931bae0d.0e2af058cadf07bb.5bd26cfb5a54a292 8ddebbe1ff6ffac6 -VSQRTPS_128(mem) +VCVTPS2PD_256(mem) before f9d65d69a0e8532a.204303bdfce8247c.0233ce6632030fb3.7d425cd568d4e2cb 7d85d07e58cb69eb.c5ed42b59f0c84ce.7fcea9779b8f0ee0.8fe96b1ef89a1d86 @@ -27614,12 +27614,12 @@ VSQRTPS_128(mem) 272e43006e4d6275 after f9d65d69a0e8532a.204303bdfce8247c.0233ce6632030fb3.7d425cd568d4e2cb - 0000000000000000.0000000000000000.20d68c0638b72bd6.5e5f0ff9542512ec - f3b98f0e4324f734.d6d95f5c5f92df8d.c0c6d2cce9cc69bf.9e6a19a016bef399 + 7d85d07e58cb69eb.c5ed42b59f0c84ce.7fcea9779b8f0ee0.8fe96b1ef89a1d86 + 384679ccc0000000.3e4061f660000000.47a84b9aa0000000.451a9c5960000000 393c17047e00ba32.af51541fd8086f65.a2e8c65239c5da7d.081363c75fcba1af 272e43006e4d6275 -VSQRTPS_256(reg) +VCVTTPS2DQ_128(reg) before 5908b7b5e0d17396.29dce24c256a6e10.aca21f68a5fa7103.020000f3a6871e46 f8edbb5450e210bf.a0636ed3536fcefb.2918bba562f32113.bad9fc9d4d1cf045 @@ -27628,11 +27628,11 @@ VSQRTPS_256(reg) 91ea5603b2501943 after 5908b7b5e0d17396.29dce24c256a6e10.aca21f68a5fa7103.020000f3a6871e46 - 50d02d144cbd9ffb.5d8e4e9131c64a5e.ffc00000ffc00000.ffc000004488bb19 - 622949485a0c759c.7b9e36832419971f.82ff2540ac7fba40.a741373b49920ea7 + f8edbb5450e210bf.a0636ed3536fcefb.2918bba562f32113.bad9fc9d4d1cf045 + 0000000000000000.0000000000000000.0000000000000000.0000000000000000 f1075ffc9cdbded8.9459b649b57785a7.13a357a71e2a7937.a6022bb9b7f53298 91ea5603b2501943 -VSQRTPS_256(mem) +VCVTTPS2DQ_128(mem) before 45c3330556af7ed4.02d5f7deafdc8620.c85f6a12219254c0.38504f4555819aa4 9e5a3eabc01f1e79.f2dd1059319baa20.f37ecfc98578bf95.4d510886ed0f5832 @@ -27641,12 +27641,12 @@ VSQRTPS_256(mem) c34a92530d7e9e5e after 45c3330556af7ed4.02d5f7deafdc8620.c85f6a12219254c0.38504f4555819aa4 - 429e116c4b15e0c4.21257e35ffc00000.ffc000003088dbe5.3be6ed4e4a80ccae - 797af4e10caab55b.1b6ca3d9bea28583.f2806059fc348353.adf37ed68061f18e + 9e5a3eabc01f1e79.f2dd1059319baa20.f37ecfc98578bf95.4d510886ed0f5832 + 0000000000000000.0000000000000000.fffc825800000000.0000000080000000 b0f1cf93555fffa9.daceadcbf17f55f5.9f3299b0a3d35c26.b682ada1ad029f63 c34a92530d7e9e5e -VSQRTPS_256(reg) +VCVTTPS2DQ_128(reg) before 309728593f612c2b.20894daeb747b78d.8c4f2b9966be5424.d760f6b995600539 58b56b1ddc388375.a510e91c4f709a33.8b3b18b0bae9beb9.76d6f460efe73cb9 @@ -27655,11 +27655,11 @@ VSQRTPS_256(reg) 55df864181d3827c after 309728593f612c2b.20894daeb747b78d.8c4f2b9966be5424.d760f6b995600539 - ffc00000ffc00000.2d66d38a3cab5ac6.3a28bcb9ffc00000.4bef7f1affc00000 - 99ef570d828ee0e9.1b5020cb39e564c9.34de707d888fd163.58600e91cc74bad1 + 58b56b1ddc388375.a510e91c4f709a33.8b3b18b0bae9beb9.76d6f460efe73cb9 + 0000000000000000.0000000000000000.8000000080000000.80000000000943ea 4e92e993cdf07e32.5e166ca690b3d078.e383306a6d39c7cc.59c9bf3849143eae 55df864181d3827c -VSQRTPS_256(mem) +VCVTTPS2DQ_128(mem) before 286cdc9990bb4466.d2eb1b1d58e99bfd.4a2e4b9870e59c6f.f47752e50575dda0 ae3d3f2a93da3d99.8344eb16c00571f5.bb63388ff68782d8.c306d459eace4f8d @@ -27668,12 +27668,12 @@ VSQRTPS_256(mem) 3c4d6dc28b012297 after 286cdc9990bb4466.d2eb1b1d58e99bfd.4a2e4b9870e59c6f.f47752e50575dda0 - 33f63eb8ffc00000.ffc000004c2cec04.44d33bc7582b6f8d.ffc00000227ae1b7 - c31e29e2a63c2c40.bbe954ea9fd13cc7.8d83af763da63edf.ac7cb131bbd0583c + ae3d3f2a93da3d99.8344eb16c00571f5.bb63388ff68782d8.c306d459eace4f8d + 0000000000000000.0000000000000000.002b92e680000000.8000000000000000 43db18abe4ebcb88.d828530594d83a1f.9c582d39624d8eb1.0b25e5db1108355c 3c4d6dc28b012297 -VSQRTPS_256(reg) +VCVTTPS2DQ_128(reg) before 9b3f4353c2475a99.0940887369f5d79d.344ce2d339a6a5a8.c3af2cc580882c7a 844865f854671b10.f318f32552660caa.2da0ffc02ac7ba0f.e0552a04b464d566 @@ -27682,11 +27682,11 @@ VSQRTPS_256(reg) 8c0ff132e73167af after 9b3f4353c2475a99.0940887369f5d79d.344ce2d339a6a5a8.c3af2cc580882c7a - 49988c6dffc00000.ffc00000ffc00000.2e78b81b222047f0.ffc000002cade736 - 53b5ce1eddec9ea5.dc30d7adbb4825dc.1d71a53804c8b400.ce13a2e319ec44a0 + 844865f854671b10.f318f32552660caa.2da0ffc02ac7ba0f.e0552a04b464d566 + 0000000000000000.0000000000000000.8000000080000000.80000000ff53c9ac 64d07b31f8632207.a054aff7bea9df5e.610bd0a76335d126.69b8114fcb2c3654 8c0ff132e73167af -VSQRTPS_256(mem) +VCVTTPS2DQ_128(mem) before 15e3c07a890693dd.13e5669e4257e2e0.1a50f7ef7a95f65d.56ba7d7ae1984b2d df01f912ccb77509.bc428dd0565419dc.28f02b8108162604.56caa71b1d7f5ec3 @@ -27695,12 +27695,12 @@ VSQRTPS_256(mem) 3736eb1351c08c8c after 15e3c07a890693dd.13e5669e4257e2e0.1a50f7ef7a95f65d.56ba7d7ae1984b2d - 2aaabd82ffc00000.29ab5b7540eb16ce.2ce74ab95d0a8bf3.4b1a8068ffc00000 - c53618e5cc51cb60.ba32eb32d0e603a8.a500c899873a2a81.be8749f8b0764891 + df01f912ccb77509.bc428dd0565419dc.28f02b8108162604.56caa71b1d7f5ec3 + 0000000000000000.0000000000000000.0000000080000000.8000000080000000 a54b99e1a6df4e0e.6b007c324d9adef0.6c4c4924100dbffd.eb3c627c39074346 3736eb1351c08c8c -VSQRTPD_128(reg) +VCVTTPS2DQ_256(reg) before ffc2e128962d5f10.5a0ff9f1766dbd3e.2af93d3b69fbe45f.5b9f2a0cc299a1a7 9f2a4129a4d9f77d.bf4db3025708d21c.526928b9be9652a2.4cc6e73fb6ed8ba9 @@ -27709,11 +27709,11 @@ VSQRTPD_128(reg) cb2b20cb4104d77a after ffc2e128962d5f10.5a0ff9f1766dbd3e.2af93d3b69fbe45f.5b9f2a0cc299a1a7 - 0000000000000000.0000000000000000.40c540ca1eddc713.2ebefa241c9f1346 - 73ba068216509180.b2d043fe65bb4ad6.419c3b18ebf66465.1d8dfca70a123a2f + 9f2a4129a4d9f77d.bf4db3025708d21c.526928b9be9652a2.4cc6e73fb6ed8ba9 + 8000000000000000.0000000000000000.8000000000000000.0000000080000000 d7c02c9d891e69c4.0d6625d2bd93e196.52de71c48aa75553.a8c0e632da166a66 cb2b20cb4104d77a -VSQRTPD_128(mem) +VCVTTPS2DQ_256(mem) before 6099265e5be83c96.2787b0e798d0baf6.aed9d66a7a9b5288.e07ac72937366219 45d874d745cf56e7.bf5a8cccdff1c1c2.6ff6d0b3b9df5bd9.49be37b48f2ec762 @@ -27722,12 +27722,12 @@ VSQRTPD_128(mem) 36690469ad055c0b after 6099265e5be83c96.2787b0e798d0baf6.aed9d66a7a9b5288.e07ac72937366219 - 0000000000000000.0000000000000000.fff8000000000000.fff8000000000000 - 54b287221bc4e198.fb86beb9fb0dbad3.2d899197956bb5b5.e7f4bfcf2d1bc0db + 45d874d745cf56e7.bf5a8cccdff1c1c2.6ff6d0b3b9df5bd9.49be37b48f2ec762 + 8000000080000000.0000000000000000.0000000080000000.8000000000000000 6af4da2bf8d498d6.3757411888b1e1d6.c55e95042b4c1f47.18695ae8ae89882f 36690469ad055c0b -VSQRTPD_128(reg) +VCVTTPS2DQ_256(reg) before 9f40bac0c61b781b.646ae9dff80a38cd.cf19125721687176.114056e5968d53bc ad3a76589755170a.1ce0302838727da8.1f182be162bfa760.eefc5126f23b0e3f @@ -27736,11 +27736,11 @@ VSQRTPD_128(reg) 84457a61c945c0d9 after 9f40bac0c61b781b.646ae9dff80a38cd.cf19125721687176.114056e5968d53bc - 0000000000000000.0000000000000000.fff8000000000000.3ca646b848f12e6e - bda2369db9417785.6f222bf4d3182394.839f8a22e840bf3f.395f03b35d600cfd + ad3a76589755170a.1ce0302838727da8.1f182be162bfa760.eefc5126f23b0e3f + 00000000ffc50bb2.0000000080000000.800000003ebd7040.fd30622080000000 2cc5f5fbca6bd138.39fb572de609e5bd.57fc2a864e7af5c1.cc33e778f00b0922 84457a61c945c0d9 -VSQRTPD_128(mem) +VCVTTPS2DQ_256(mem) before 3d60365a041cee4f.54f0afde665d64ce.57392fc18c50804e.f779077931f6848f d352994fbc9b4eaf.926d61b228a56af3.a3a62f9be2fab073.bf631e672c42a958 @@ -27749,12 +27749,12 @@ VSQRTPD_128(mem) 9ea6904cc979f242 after 3d60365a041cee4f.54f0afde665d64ce.57392fc18c50804e.f779077931f6848f - 0000000000000000.0000000000000000.4b941311216c4fe8.fff8000000000000 - 22e61e2d0dcf9e27.428906e3accf2054.fa0fd3a603123059.0a0669bcdce9a0c6 + d352994fbc9b4eaf.926d61b228a56af3.a3a62f9be2fab073.bf631e672c42a958 + 0000000000000000.8000000080000000.8000000000000000.8000000000000000 06e741de14c398e0.c18f9ade8f65c29d.384098d00ca4be2c.36aee6e4dc78a485 9ea6904cc979f242 -VSQRTPD_128(reg) +VCVTTPS2DQ_256(reg) before 9d3c635e3e7bc6a9.5b227e50ec83f808.69cd190d6cf58c7a.3904f80418bd1318 91ba5c88d7075c65.fd63526eb21c7ccb.978d7fdee00bb996.d929712f4468ee48 @@ -27763,11 +27763,11 @@ VSQRTPD_128(reg) 0bce45aa9c4ef22b after 9d3c635e3e7bc6a9.5b227e50ec83f808.69cd190d6cf58c7a.3904f80418bd1318 - 0000000000000000.0000000000000000.fff8000000000000.fff8000000000000 - d56d753531abef23.c87637248299de54.a71cc9bb8732869d.f4797e3babb109e8 + 91ba5c88d7075c65.fd63526eb21c7ccb.978d7fdee00bb996.d929712f4468ee48 + fffffaf380000000.0000000080000000.8000000080000000.8000000080000000 c4a1acd0e8f2bc8f.9826ab5d7606dbd0.f5c7f212fbf62e3d.66c29c156aa42225 0bce45aa9c4ef22b -VSQRTPD_128(mem) +VCVTTPS2DQ_256(mem) before bf6af7e45dbb3826.bca2fdc79769fe54.49412a07ad702f6b.ddd7f64edbe3ef1f 5e612db1caf5ae40.17bc6285da9bf31f.b7912e0e40e19550.bb9bd1dbc08603f2 @@ -27776,12 +27776,12 @@ VSQRTPD_128(mem) b11046a0b0268dbe after bf6af7e45dbb3826.bca2fdc79769fe54.49412a07ad702f6b.ddd7f64edbe3ef1f - 0000000000000000.0000000000000000.44976fa865608029.fff8000000000000 - c38164fcfe0a11a8.333bd8764e14d59b.bee4355c4e68caac.eb5e7f25496aa760 + 5e612db1caf5ae40.17bc6285da9bf31f.b7912e0e40e19550.bb9bd1dbc08603f2 + 0000000080000000.0000000000000000.000c12a000000000.8000000080000000 cc9516b016061d88.6a6a5c078f61e175.3a04badef00e8aaa.c96bfd980f1b1615 b11046a0b0268dbe -VSQRTPD_256(reg) +VCVTDQ2PS_128(reg) before ff9756a9c8164807.5468c1bb2ef38d0d.1996e9a2380d5358.07bd398044e19177 0f4d2920f278839c.37c7e00861df1e62.9d0b7cb4e5a466f1.00dd2e2f66ed9a3f @@ -27790,11 +27790,11 @@ VSQRTPD_256(reg) 9397abbbb4d91e2d after ff9756a9c8164807.5468c1bb2ef38d0d.1996e9a2380d5358.07bd398044e19177 - 3eb62d11c2db8575.48363f774a86a3d0.48025b63a53f95ca.218f8a1168cc6678 - 3d7ebc6fcbd77928.507eef83cbd68cb4.50150faa33b357ec.032f15d5713d622d + 0f4d2920f278839c.37c7e00861df1e62.9d0b7cb4e5a466f1.00dd2e2f66ed9a3f + 0000000000000000.0000000000000000.cee1febece84753a.cda40ca5cefa44b7 e4750a04eebf6757.7d596a1989e2932f.8f00a0eebdc562f4.eb7e6b6082dda46e 9397abbbb4d91e2d -VSQRTPD_256(mem) +VCVTDQ2PS_128(mem) before d94751d2233e8a97.62800f4af7bc89d6.9924ceb4b611eefe.b7172aee2066c2b6 9858da90ec17a5d7.12e9c7ac835b1b51.7faa96416f6f5a4e.22a8a915f723b4dd @@ -27803,12 +27803,12 @@ VSQRTPD_256(mem) 9326bdab4f754d6d after d94751d2233e8a97.62800f4af7bc89d6.9924ceb4b611eefe.b7172aee2066c2b6 - fff8000000000000.5136ab6c1f1957f5.fff8000000000000.fff8000000000000 - ab96c0e32a702a1a.4ffd2e982d275873.0db83eadcf07934a.2dfd19cedf877416 + 9858da90ec17a5d7.12e9c7ac835b1b51.7faa96416f6f5a4e.22a8a915f723b4dd + 0000000000000000.0000000000000000.cecdb663ce93dc22.ce91d1aa4e019b0b f0cf81b7fa56d78c.7708417992ad7de9.1e1b42e2f2e5541f.34637787731e3e0d 9326bdab4f754d6d -VSQRTPD_256(reg) +VCVTDQ2PS_128(reg) before a792e9a61117dee3.41cd98f678d46658.e556fbbb4e78c65f.8d9d1ecef5155af8 caf3f7e552902d1a.7c5e828dbef693ab.f43358cafc146e80.380b4f5cf4a46102 @@ -27817,11 +27817,11 @@ VSQRTPD_256(reg) 31d3b20aedfed2fc after a792e9a61117dee3.41cd98f678d46658.e556fbbb4e78c65f.8d9d1ecef5155af8 - 4cc2475e604ba05e.5d9e516328d917d8.216d9275765c6806.fff8000000000000 - 5994e1d2b06d75bf.7b4cb968ebc91cb1.02eb5413380eb2f9.f93050780a9d2569 + caf3f7e552902d1a.7c5e828dbef693ab.f43358cafc146e80.380b4f5cf4a46102 + 0000000000000000.0000000000000000.4ed593d8cec01e63.cea44ac64ea818c3 b0c3a5dac739f47e.1b64bb741858bb95.6ac9ec009ff0ce75.adda9d0d540c6158 31d3b20aedfed2fc -VSQRTPD_256(mem) +VCVTDQ2PS_128(mem) before 5fe90c58f17e3481.2bca3d6a3281e402.3972039c64b02d84.871a1bfecc49fea1 14e626e47d994212.26f6a8ec8dcf81f8.af420dcbe8dc2da9.b72bdd7a5ca27d28 @@ -27830,12 +27830,12 @@ VSQRTPD_256(mem) 49cc6e13712f319c after 5fe90c58f17e3481.2bca3d6a3281e402.3972039c64b02d84.871a1bfecc49fea1 - 4fec4fc13d0a3c20.35dcfa285911e2cc.3cb0fa2a7a6727d1.fff8000000000000 - 2d977c9aac5ab9db.fd93dfce75b2090b.5b9f55efc3e87931.54452edfea8988b7 + 14e626e47d994212.26f6a8ec8dcf81f8.af420dcbe8dc2da9.b72bdd7a5ca27d28 + 0000000000000000.0000000000000000.4e65c80e4ec9605b.cef1cbc8ce4ed805 84c88a679bcd550a.0ceddf7b85b3b6e8.175658f30ee0cb47.bbb70a98128a5bfa 49cc6e13712f319c -VSQRTPD_256(reg) +VCVTDQ2PS_128(reg) before 58cf55bba306474a.f644cc3566fed2c8.ae4fa55f5a60c43b.c03491c3e7d1e018 450ebbfc439bd9b0.60d9bff227faeb44.41062ce68f4471af.32037c4b6ac673d0 @@ -27844,11 +27844,11 @@ VSQRTPD_256(reg) d713426c02387e16 after 58cf55bba306474a.f644cc3566fed2c8.ae4fa55f5a60c43b.c03491c3e7d1e018 - 56e1b6a4b6de3804.fff8000000000000.30266da7b962dc97.44c04a106d63c486 - 6dd39c42ee782379.9c51de88fdcd5da8.205f707cc1ebf7f1.49909577b2cc419a + 450ebbfc439bd9b0.60d9bff227faeb44.41062ce68f4471af.32037c4b6ac673d0 + 0000000000000000.0000000000000000.ceb0b723cee63ad9.cdeacd3ece1047e5 2a6bf5f93f2b6051.8779a5e50181e420.a7a46e8d8ce293ac.e2a65833dbee06a3 d713426c02387e16 -VSQRTPD_256(mem) +VCVTDQ2PS_128(mem) before 05a2ce0c43b76420.d922c08dd240cde5.fd1d90f452243bda.322220858ab4818d 481e7801b97575ed.d644fb6b4441a6e1.da091ca109c120ff.1c2584d059eefc40 @@ -27857,12 +27857,12 @@ VSQRTPD_256(mem) b442afddc27f19f9 after 05a2ce0c43b76420.d922c08dd240cde5.fd1d90f452243bda.322220858ab4818d - 22c887dcf3a6a5ba.fff8000000000000.fff8000000000000.390815a49a3cebd5 - 7c54bc3580816da8.7e1ca1fd30bc26f1.fa09c3d844654cbe.c3f895db951b4170 + 481e7801b97575ed.d644fb6b4441a6e1.da091ca109c120ff.1c2584d059eefc40 + 0000000000000000.0000000000000000.cc389bc34ea44878.4e488882ceea96fd 7d101796b5e4077e.2bf8afb1333d8bc0.39e803851f1b7e41.82e94f10d9c78cc9 b442afddc27f19f9 -VRSQRTSS_128(reg) +VCVTDQ2PS_256(reg) before b750b0adebce23aa.271e040f73ac019a.3a221ff2e84e0efa.73745794b5ef70b4 e55f4eebf040e788.5649ff8cd7e51529.07e7ef2bec7eee4d.84773cf223eee045 @@ -27870,12 +27870,12 @@ VRSQRTSS_128(reg) 36b0516601be8c7e.b32a0f42ffd67d4f.4b729c3a4f64b0e8.9b15a547f49a246b 5948221690607159 after - 0000000000000000.0000000000000000.07e7ef2bec7eee4d.84773cf2ffc00000 + b750b0adebce23aa.271e040f73ac019a.3a221ff2e84e0efa.73745794b5ef70b4 e55f4eebf040e788.5649ff8cd7e51529.07e7ef2bec7eee4d.84773cf223eee045 - 9cbb85056e61a140.e65f84f9fc99ff57.ee931acadb566562.48be2c898423871d + 4e5ac1464bdf463f.ce99abe1ca260ac4.4e96e5384e9ec962.cec9d4b5cd365db9 36b0516601be8c7e.b32a0f42ffd67d4f.4b729c3a4f64b0e8.9b15a547f49a246b 5948221690607159 -VRSQRTSS_128(mem) +VCVTDQ2PS_256(mem) before 5e231fe4747f2b13.1189af7a44e3e5ed.98781d53fba7493e.7acf72e7e6330b89 8571199cba060ec6.879499add35ae83a.731329180d19204f.d7f8973d3c4fb2f1 @@ -27885,11 +27885,11 @@ VRSQRTSS_128(mem) after 5e231fe4747f2b13.1189af7a44e3e5ed.98781d53fba7493e.7acf72e7e6330b89 8571199cba060ec6.879499add35ae83a.731329180d19204f.d7f8973d3c4fb2f1 - 0000000000000000.0000000000000000.731329180d19204f.d7f8973dffc00000 + 4ebc46404ee8fe56.4d8c4d7c4e89c7cc.cecf0fc5cc8b16d8.4ef59ee6cdce67a4 ae9af17ae3763dc6.b86b07214774db1d.78622b6fe10ddd89.8bd9be9593a0d2c9 9a2ab86eccedc491 -VRSQRTSS_128(reg) +VCVTDQ2PS_256(reg) before 4676f2a134b6f1cf.670cc778fc77026b.2ad08139642d430a.5aaf1ad8dba83c0b ed096698668a9632.b2218910e90fe0b9.a99679213d6a4586.a079f7a65a13965e @@ -27897,12 +27897,12 @@ VRSQRTSS_128(reg) 9932f287997c3712.7269c2bfad31d5fe.3974d00d959e05d5.cdb86b1e5a8a292e 6ac4faa012aedb01 after - 0000000000000000.0000000000000000.a99679213d6a4586.a079f7a6218a3000 + 4676f2a134b6f1cf.670cc778fc77026b.2ad08139642d430a.5aaf1ad8dba83c0b ed096698668a9632.b2218910e90fe0b9.a99679213d6a4586.a079f7a65a13965e - ea2e12c1fef2ef64.6da7b42ec54992db.8f08ea446fb71c3a.288d3ec47b5ba6b1 + cecd9a1bcecd0792.4ee4d385cea59c54.4e65d340ced4c3f4.ce491e544eb51452 9932f287997c3712.7269c2bfad31d5fe.3974d00d959e05d5.cdb86b1e5a8a292e 6ac4faa012aedb01 -VRSQRTSS_128(mem) +VCVTDQ2PS_256(mem) before dd7d6836bfd37857.55620056d2b3ace7.9f3231adbcd4654d.032427ea4cad3c01 00b130cc7e04bb5c.7c083a9946248890.cfcf7de60f3dfdf5.4a65ec462f70fd6b @@ -27912,11 +27912,11 @@ VRSQRTSS_128(mem) after dd7d6836bfd37857.55620056d2b3ace7.9f3231adbcd4654d.032427ea4cad3c01 00b130cc7e04bb5c.7c083a9946248890.cfcf7de60f3dfdf5.4a65ec462f70fd6b - 0000000000000000.0000000000000000.cfcf7de60f3dfdf5.4a65ec4638dc1800 + ce0a0a5fce80590f.4eaac401ce35314c.cec19b9dce865735.4c4909fa4e995a78 cab6bea8a0ba2621.77e81f314de1670d.a7b598e5ee9238ff.bacaac2beb3e0ba7 9c86a18cfc63d1d1 -VRSQRTSS_128(reg) +VCVTDQ2PS_256(reg) before 6a02f21da96b11e9.291f7cc73b58c53a.04bbc25c1945e238.07966084b39653b8 808b9d488ee2069b.a83285955832fbb1.6a3481ac8f13b5e8.da7af41d2c91667a @@ -27924,12 +27924,12 @@ VRSQRTSS_128(reg) f4f5ee20724e017a.7a8665f286cb1c6a.354c3f6ce91b5281.4a7f71eda79967c9 9f3751fce2beccad after - 0000000000000000.0000000000000000.6a3481ac8f13b5e8.da7af41d24f3c000 + 6a02f21da96b11e9.291f7cc73b58c53a.04bbc25c1945e238.07966084b39653b8 808b9d488ee2069b.a83285955832fbb1.6a3481ac8f13b5e8.da7af41d2c91667a - 3a6e9d7b4854ed92.24bb5400125484b2.07a1568e4bd71bc7.fd2fd09c748d2e71 + cd30a11e4ee49c03.4ef50ccccef269c7.4e5530fecdb7256c.4e94fee4ceb0cd30 f4f5ee20724e017a.7a8665f286cb1c6a.354c3f6ce91b5281.4a7f71eda79967c9 9f3751fce2beccad -VRSQRTSS_128(mem) +VCVTDQ2PS_256(mem) before d623eeb6410a1a49.0a6d8ca5a95b8001.845e3559cfa27e05.528237b4076d94c3 cc0fc405de880dcb.d82173758907a4d1.1f103e200ae667af.b88f3bd13e591d39 @@ -27939,11 +27939,11 @@ VRSQRTSS_128(mem) after d623eeb6410a1a49.0a6d8ca5a95b8001.845e3559cfa27e05.528237b4076d94c3 cc0fc405de880dcb.d82173758907a4d1.1f103e200ae667af.b88f3bd13e591d39 - 0000000000000000.0000000000000000.1f103e200ae667af.b88f3bd15b84e000 + ce2770454e821435.4d26d8cacead4900.cef74395ce417608.4ea5046f4cedb298 66160716494bd12b.0c710ea5b16ecdfe.7933f07ec4e2bedd.d35d53396d2bf86f 3fb6605d9c2ac187 -VRSQRTPS_128(reg) +VCVTTPD2DQ_128(reg) before 6616690655f3c184.c1ca6db04da91a62.29a5b9de32414ab2.ef3b90ed7bb3a3bb a2c968a13511360f.4badfb900168f82e.6f459e13cbe35d61.664c5b6c931fff57 @@ -27952,11 +27952,11 @@ VRSQRTPS_128(reg) 69b58f833d88335a after 6616690655f3c184.c1ca6db04da91a62.29a5b9de32414ab2.ef3b90ed7bb3a3bb - 0000000000000000.0000000000000000.4265e80052416000.ffc000004a980000 - 501b5b98d8105ad6.e08c2da2809626ba.399eb7ae19e042b5.ba34cbe829358ddd + a2c968a13511360f.4badfb900168f82e.6f459e13cbe35d61.664c5b6c931fff57 + 0000000000000000.0000000000000000.0000000000000000.8000000080000000 cc583d58d97d6a85.5c337fd2e63e6233.e3fb021cb7c4345a.c7be5e4b58fe0b7a 69b58f833d88335a -VRSQRTPS_128(mem) +VCVTTPD2DQ_128(mem) before 7de6db7af4dec1a8.72cb0a4ed4e3a1c8.9b6d6e0c516d65c4.c8aa7aca411c71fd dd1dbc1e980d7391.9fc2bee466cf3c4a.7908753cda2eee9a.46f51c225574324a @@ -27965,12 +27965,12 @@ VRSQRTPS_128(mem) e77dcf66d9edf2e2 after 7de6db7af4dec1a8.72cb0a4ed4e3a1c8.9b6d6e0c516d65c4.c8aa7aca411c71fd - 0000000000000000.0000000000000000.ffc000003684e800.ffc000003ea3c000 - 6526b05a45200340.ad8756882acb77b7.d2ce104e9f8db7e1.b82ae2928c56b6ec + dd1dbc1e980d7391.9fc2bee466cf3c4a.7908753cda2eee9a.46f51c225574324a + 0000000000000000.0000000000000000.0000000000000000.0000000080000000 f3cc321a18232ee2.f967cda5bd658ebc.828dbc2ebc977ec4.7993ca8484503790 e77dcf66d9edf2e2 -VRSQRTPS_128(reg) +VCVTTPD2DQ_128(reg) before 5c34eda326ba238d.62ddbe4a2c23b0a2.dfae1fa6ba29bc05.650ff3c94c57fc70 360420a70742053d.8e23d1d69e2b44ae.bba848f9bea23e3e.572133096bd9f010 @@ -27979,11 +27979,11 @@ VRSQRTPS_128(reg) 1eaefce83f66df65 after 5c34eda326ba238d.62ddbe4a2c23b0a2.dfae1fa6ba29bc05.650ff3c94c57fc70 - 0000000000000000.0000000000000000.ffc000002d09f800.44f24000441d0800 - cf3865de1911d6a0.536ce5aa8947a72f.e9a04509645c5012.348ef7dc362a14d1 + 360420a70742053d.8e23d1d69e2b44ae.bba848f9bea23e3e.572133096bd9f010 + 0000000000000000.0000000000000000.0000000000000000.8000000080000000 851db7b4f8b4cf60.8d8278b20a849554.c5e4104349e32e2d.d824bb2dc95525de 1eaefce83f66df65 -VRSQRTPS_128(mem) +VCVTTPD2DQ_128(mem) before e4f735f8b46afd8f.b20012963eb62f29.183105da3cedca47.abbea71108c4133c 05cce14b456c3c8b.b32b72ee8aa330a8.cf47090f3b8e0134.f67b05e03e8a3ceb @@ -27992,12 +27992,12 @@ VRSQRTPS_128(mem) d6fca38dbdb5a56d after e4f735f8b46afd8f.b20012963eb62f29.183105da3cedca47.abbea71108c4133c - 0000000000000000.0000000000000000.5319e80040bbd000.ffc000005aced800 - 5df97fcd0d785883.e5ebd32976080f89.908ffe3c2474f748.0467271c86c2e4e6 + 05cce14b456c3c8b.b32b72ee8aa330a8.cf47090f3b8e0134.f67b05e03e8a3ceb + 0000000000000000.0000000000000000.0000000000000000.0000000000000000 c74a8868299b0da3.a28b32b49e700877.36d4624c13aa67af.30ce07327cf649d7 d6fca38dbdb5a56d -VRSQRTPS_128(reg) +VCVTTPD2DQ_128(reg) before 523cf698e5883552.218b7a09b4e01618.47598af99f67571f.9ce4b02d233c0f94 ffdcfcc18ffd3433.4687cf9ccb53300e.319fd766147a372c.a08964ca7037a924 @@ -28006,11 +28006,11 @@ VRSQRTPS_128(reg) f1f3be41e211808c after 523cf698e5883552.218b7a09b4e01618.47598af99f67571f.9ce4b02d233c0f94 - 0000000000000000.0000000000000000.ffc00000ffc00000.5070900053602800 - 3b26b273579fdfbb.110b050e890117b0.baab15669a34e54b.1d90fb0f17a6f28b + ffdcfcc18ffd3433.4687cf9ccb53300e.319fd766147a372c.a08964ca7037a924 + 0000000000000000.0000000000000000.0000000000000000.0000000080000000 6167121adafb7297.60e498490bf5862b.3fc74165cc219c28.eec4efe83495a5f4 f1f3be41e211808c -VRSQRTPS_128(mem) +VCVTTPD2DQ_128(mem) before 00e7e3063d253d7e.cceb1a22b49c2973.0ddc023b6c3b3aab.1c4056cf46ce9a6e f96eda2362de98f7.dafec5f77f0e40fa.f6c0c1cfc8e0ef5b.ad625010a5c619ca @@ -28019,12 +28019,12 @@ VRSQRTPS_128(mem) 30b4751636eaf817 after 00e7e3063d253d7e.cceb1a22b49c2973.0ddc023b6c3b3aab.1c4056cf46ce9a6e - 0000000000000000.0000000000000000.584340002915b000.5113b0003bc98800 - b65220856c474f22.e6eb1005daddf2d8.f55b50f13cef6167.4e782b94859555e7 + f96eda2362de98f7.dafec5f77f0e40fa.f6c0c1cfc8e0ef5b.ad625010a5c619ca + 0000000000000000.0000000000000000.0000000000000000.0000000000000000 15603016786c1c2c.4b00f5b95e967cbb.e87b2b8de4754bfd.5bd0e3c881c88c72 30b4751636eaf817 -VRSQRTPS_256(reg) +VCVTTPD2DQ_256(reg) before 2971dceb3e87d681.f06485c4a159bc41.6787727daac5194d.a9eace8fdb7d6a47 a25314b4382c625d.242a9e79041bea8c.94cd82bf57f4063a.1576b6e33d137a71 @@ -28033,11 +28033,11 @@ VRSQRTPS_256(reg) f4b7dd0402a3a5ec after 2971dceb3e87d681.f06485c4a159bc41.6787727daac5194d.a9eace8fdb7d6a47 - ffc00000ffc00000.ffc00000ffc00000.4722d8005cd97000.5a3da0004b929800 - f7a619dcbe64d756.8e7df423bcbd643a.301e21e904b17f2f.09e95d75274336a8 + a25314b4382c625d.242a9e79041bea8c.94cd82bf57f4063a.1576b6e33d137a71 + 0000000000000000.0000000000000000.0000000000000000.0000000080000000 84b6e8ce6cbc7219.082b05ade64ce477.95c64b694a87c0d8.5f104131b51a5b18 f4b7dd0402a3a5ec -VRSQRTPS_256(mem) +VCVTTPD2DQ_256(mem) before a4a9aed82aebd051.a5cf7bf8dfbf6f52.6ffe4b039dd2276e.2010fdaac70305e0 4cb42f9b4afd9772.b63cd0c5b2f909ac.9fc34411fd5ee84b.2e4a321817b089f4 @@ -28046,12 +28046,12 @@ VRSQRTPS_256(mem) fa88bca80c57ec2d after a4a9aed82aebd051.a5cf7bf8dfbf6f52.6ffe4b039dd2276e.2010fdaac70305e0 - ffc0000049bc9800.ffc00000ffc00000.2735a000ffc00000.4f2a2000ffc00000 - c6a2db387de5b77c.134ae2a182f67ed4.75466cc323f9e43b.19bee61fd51a89bf + 4cb42f9b4afd9772.b63cd0c5b2f909ac.9fc34411fd5ee84b.2e4a321817b089f4 + 0000000000000000.0000000000000000.0000000000000000.8000000000000000 ef40309ae0afec9b.1745aef8ea430875.cb533d052bb1d76a.3eb9152b9dce40ee fa88bca80c57ec2d -VRSQRTPS_256(reg) +VCVTTPD2DQ_256(reg) before a774d502be41c727.a35aaaaf8e68f1fa.20792e37876be33c.7eb535c430917d04 a2cc5ea64e190d89.bebcc362a41b84c6.893260c8f4fb4dd5.6a3acfea4ea69134 @@ -28060,11 +28060,11 @@ VRSQRTPS_256(reg) 1c8a42065a96be03 after a774d502be41c727.a35aaaaf8e68f1fa.20792e37876be33c.7eb535c430917d04 - 3b4390003305a000.5119180040465000.ffc00000ffc00000.295c7800ffc00000 - 47db53fe586afcff.1c32f99f3dd55e2a.aebc3f18ce7e80eb.6bac8765a2fbd026 + a2cc5ea64e190d89.bebcc362a41b84c6.893260c8f4fb4dd5.6a3acfea4ea69134 + 0000000000000000.0000000000000000.8000000000000000.8000000080000000 f2ecae7879c1ce34.9988c75275a13e53.ea62c894b080b92a.5dd8d91f479cf607 1c8a42065a96be03 -VRSQRTPS_256(mem) +VCVTTPD2DQ_256(mem) before 848e3d05f7f4e646.ff4c6d7e4ca8c0d4.1189a9686a8bde6d.9b72f5a6378d3340 71b0460838c228fb.ca478a7e6ead0e8c.60021bcb35a0fca3.1b36c4bcfe322cd7 @@ -28073,12 +28073,12 @@ VRSQRTPS_256(mem) 15b7cf48ee255f5d after 848e3d05f7f4e646.ff4c6d7e4ca8c0d4.1189a9686a8bde6d.9b72f5a6378d3340 - ffc00000ffc00000.ffc0000038dee800.5676d80029f4f000.ffc000004373c000 - bfbbd9fb3c0c404e.b02903e37a5cf308.62bf9a68f4eb5122.c8fb3041a1fbde9b + 71b0460838c228fb.ca478a7e6ead0e8c.60021bcb35a0fca3.1b36c4bcfe322cd7 + 0000000000000000.0000000000000000.0000000080000000.0000000000000000 4a7c72ca1cdfec6c.0b3ed4190d3facf4.f38ca12cc3789c15.fd0d35a1bd728539 15b7cf48ee255f5d -VRSQRTPS_256(reg) +VCVTTPD2DQ_256(reg) before 6d47fba2cf9fa6b2.eec08e61f747e681.38d2f78cc2e575fb.ef35ac02bd5497a9 6207b41bfc6d97e5.8651a8ace64eebb8.92306aa836d789c9.328637d5fe8aff0a @@ -28087,11 +28087,11 @@ VRSQRTPS_256(reg) 3c5fb27d87c21baf after 6d47fba2cf9fa6b2.eec08e61f747e681.38d2f78cc2e575fb.ef35ac02bd5497a9 - 3811f0005624d000.ffc000005bb32800.236158005ce2b800.ffc00000ffc00000 - 4e44f61f121a6da2.f0fc3c980702b63e.77a528d904a3250b.974abf93a3269063 + 6207b41bfc6d97e5.8651a8ace64eebb8.92306aa836d789c9.328637d5fe8aff0a + 0000000000000000.0000000000000000.0000000000000000.8000000080000000 8f4bbd1bac326694.078cc60f766f043f.427e2d8bc9d4856d.fc4ebe27c73505e1 3c5fb27d87c21baf -VRSQRTPS_256(mem) +VCVTTPD2DQ_256(mem) before 33471681fed98efa.7f6505796742bc67.a7cfc3ff4e9f91e6.4f05752b20f6e59a bcd2671f49871aed.7be1cba7ded5abc8.ab8fad52aca01960.fa86fd23a596803f @@ -28100,12 +28100,12 @@ VRSQRTPS_256(mem) 46e5e75b65de11b4 after 33471681fed98efa.7f6505796742bc67.a7cfc3ff4e9f91e6.4f05752b20f6e59a - 45912800ffc00000.1f8750002b92c800.ffc0000037e54800.37b148004eb85000 - b5ce1f4483d77ab5.e00a0a0fae777163.f19a02f6ab7e57d8.9f4fc0e1f53f9408 + bcd2671f49871aed.7be1cba7ded5abc8.ab8fad52aca01960.fa86fd23a596803f + 0000000000000000.0000000000000000.0000000080000000.0000000080000000 f906bcdac9d56b7e.082bbe1f72b548e4.54ba3dd66744087b.99abbad0ac7e5aa0 46e5e75b65de11b4 -VMOVDQU_GtoE_256(reg) +VCVTPD2DQ_128(reg) before 014a43f0bcebf3ef.6345b9ce368ea973.5092e342c71a6df6.afbcdbdefdfee874 2626cbfa4e323dfe.d158920de70defc1.148976e448321b45.e06b57fa88b8b3f1 @@ -28115,10 +28115,10 @@ VMOVDQU_GtoE_256(reg) after 014a43f0bcebf3ef.6345b9ce368ea973.5092e342c71a6df6.afbcdbdefdfee874 2626cbfa4e323dfe.d158920de70defc1.148976e448321b45.e06b57fa88b8b3f1 - 1d734c1d919bf847.252aca18838e8617.8159d35540ad064d.3005d81ef05ef821 + 0000000000000000.0000000000000000.0000000000000000.0000000000000000 1d734c1d919bf847.252aca18838e8617.8159d35540ad064d.3005d81ef05ef821 0786d7fe0361eb2c -VMOVDQU_GtoE_256(mem) +VCVTPD2DQ_128(mem) before 24e5a3a37d95b86b.a77c3d0f7bd5e1d8.c3811fbda6a84f77.e1cb95fcee28ba5e 61eebaf777051c08.0c2b4a250e7922ee.d5dc425c7cb910df.2dfeb4d23985e75c @@ -28126,13 +28126,13 @@ VMOVDQU_GtoE_256(mem) af2eb66061cb990e.d3aea471a52d9b53.c0ccda38b4ed6d79.f9d5fbbc151b9fd1 31121aa8dd6ba29f after - 9c6d97e810bed330.a6cd6dcce912f733.3506ace122cc867c.c13d2d44bd52caf3 + 24e5a3a37d95b86b.a77c3d0f7bd5e1d8.c3811fbda6a84f77.e1cb95fcee28ba5e 61eebaf777051c08.0c2b4a250e7922ee.d5dc425c7cb910df.2dfeb4d23985e75c - 9c6d97e810bed330.a6cd6dcce912f733.3506ace122cc867c.c13d2d44bd52caf3 + 0000000000000000.0000000000000000.0000000000000000.8000000080000000 af2eb66061cb990e.d3aea471a52d9b53.c0ccda38b4ed6d79.f9d5fbbc151b9fd1 31121aa8dd6ba29f -VMOVDQU_GtoE_256(reg) +VCVTPD2DQ_128(reg) before c5408673b2ce0e0c.77fc934d893829cf.ed1aeb7fe0554bfb.53fa494e4d288003 10ab3c8830d020c2.d0a5ab9aa111409e.525d3c61361643d7.c85c740d098a7c46 @@ -28142,10 +28142,10 @@ VMOVDQU_GtoE_256(reg) after c5408673b2ce0e0c.77fc934d893829cf.ed1aeb7fe0554bfb.53fa494e4d288003 10ab3c8830d020c2.d0a5ab9aa111409e.525d3c61361643d7.c85c740d098a7c46 - 4067724594e326ba.a6b379041739f319.6997f156a195f9d9.cbecef3a5cf11fa5 + 0000000000000000.0000000000000000.0000000000000000.8000000080000000 4067724594e326ba.a6b379041739f319.6997f156a195f9d9.cbecef3a5cf11fa5 12b1367f2b0e3d19 -VMOVDQU_GtoE_256(mem) +VCVTPD2DQ_128(mem) before abdb2a1f8d8134f6.dc50ecc4b30c9155.dab127f9aca0061c.d3274c40ee6a3057 733446059f57c068.a0a69e3eea0392ea.0fb9ffffa2a390de.f7bda2afc5099fb9 @@ -28153,13 +28153,13 @@ VMOVDQU_GtoE_256(mem) 00a6e753415986b9.0fc99ed4129145af.ed161fe924adf84d.de2e30cc84d213d8 58a06053a31591ed after - 4689071d7c9a9c9a.e8b5861fd6576524.21967e00164e4c8a.31a6ef0fc3fd81ab + abdb2a1f8d8134f6.dc50ecc4b30c9155.dab127f9aca0061c.d3274c40ee6a3057 733446059f57c068.a0a69e3eea0392ea.0fb9ffffa2a390de.f7bda2afc5099fb9 - 4689071d7c9a9c9a.e8b5861fd6576524.21967e00164e4c8a.31a6ef0fc3fd81ab + 0000000000000000.0000000000000000.0000000000000000.8000000080000000 00a6e753415986b9.0fc99ed4129145af.ed161fe924adf84d.de2e30cc84d213d8 58a06053a31591ed -VMOVDQU_GtoE_256(reg) +VCVTPD2DQ_128(reg) before fc4a7b0ebc513796.7d566493099d37f0.732ee4c73a3f6f38.4d035ea7e7cd4e53 26767e6b6c12407e.9967f9c9f1746e6c.6f2f5466ebec1f6b.1e2ab8247bba0ac7 @@ -28169,10 +28169,10 @@ VMOVDQU_GtoE_256(reg) after fc4a7b0ebc513796.7d566493099d37f0.732ee4c73a3f6f38.4d035ea7e7cd4e53 26767e6b6c12407e.9967f9c9f1746e6c.6f2f5466ebec1f6b.1e2ab8247bba0ac7 - 7c8828b7ff556dbc.1ed85bc88e095ae2.9e399e545775007d.8356a9108827a8ab + 0000000000000000.0000000000000000.0000000000000000.0000000000000000 7c8828b7ff556dbc.1ed85bc88e095ae2.9e399e545775007d.8356a9108827a8ab cff3395639c00173 -VMOVDQU_GtoE_256(mem) +VCVTPD2DQ_128(mem) before fbf9d30c2b56b15a.6005c87f1aef0a6b.3fd021687cdf8634.89d9717c4a68a9b5 e535f41e7bf4738b.3a343f983c3dfa0a.6f58efaffa77287a.7d455dff358bc746 @@ -28180,13 +28180,13 @@ VMOVDQU_GtoE_256(mem) 6080b706a379207d.40dca36d032bc5c5.6c4793de131fb995.ecb671c6648e5625 1f5191e2e0863ecb after - 6874167844a60433.66638a6e00ce7a44.8a3c418723defae1.d4cb5e49b46998dc + fbf9d30c2b56b15a.6005c87f1aef0a6b.3fd021687cdf8634.89d9717c4a68a9b5 e535f41e7bf4738b.3a343f983c3dfa0a.6f58efaffa77287a.7d455dff358bc746 - 6874167844a60433.66638a6e00ce7a44.8a3c418723defae1.d4cb5e49b46998dc + 0000000000000000.0000000000000000.0000000000000000.0000000000000000 6080b706a379207d.40dca36d032bc5c5.6c4793de131fb995.ecb671c6648e5625 1f5191e2e0863ecb -VCVTPS2PD_256(reg) +VCVTPD2DQ_256(reg) before cbe9ba09c5de8b7a.a92652b5b3788396.24ed8801e0e2183a.f047629fe74621c1 4acae8a8af227bdf.1f31636f91afe8aa.6ee03597347eaf4f.f40628b6ba60ed92 @@ -28196,10 +28196,10 @@ VCVTPS2PD_256(reg) after cbe9ba09c5de8b7a.a92652b5b3788396.24ed8801e0e2183a.f047629fe74621c1 4acae8a8af227bdf.1f31636f91afe8aa.6ee03597347eaf4f.f40628b6ba60ed92 - bc93fa4ea0000000.bdd2d300e0000000.c53e91d2c0000000.c213549a20000000 + 0000000000000000.0000000000000000.0000000000000000.0000000080000000 359744faff9a2f7a.01aad9b824f7aa70.a49fd275ae969807.e9f48e96d09aa4d1 91bb263749d30798 -VCVTPS2PD_256(mem) +VCVTPD2DQ_256(mem) before 2972a5de332ebeb3.581b6a859ee86b08.26b0351f1220807c.4802bc950d2a6203 8ce48978a7b7864e.bf178538b15039fb.e74bf7423eb04832.c1795d6753d4604e @@ -28209,11 +28209,11 @@ VCVTPS2PD_256(mem) after 2972a5de332ebeb3.581b6a859ee86b08.26b0351f1220807c.4802bc950d2a6203 8ce48978a7b7864e.bf178538b15039fb.e74bf7423eb04832.c1795d6753d4604e - 3cd606a3e0000000.3a44100f80000000.41005792a0000000.39a54c4060000000 + 0000000000000000.0000000000000000.0000000080000000.0000000080000000 222d6d31a38538b8.caaa8bc3a5a47bc3.b1729e6cbd3ba04d.a7cfb5ce0197e783 ca46643aa2c8e8c5 -VCVTPS2PD_256(reg) +VCVTPD2DQ_256(reg) before 34ffb909993f0d07.0d9b662862e29add.25d96e73bda666ef.72977b4b494ca90b 4048b3a4838891f4.34f5b2c21d9dfd33.34b136fabaf5d331.3f82ae9682f79423 @@ -28223,10 +28223,10 @@ VCVTPS2PD_256(reg) after 34ffb909993f0d07.0d9b662862e29add.25d96e73bda666ef.72977b4b494ca90b 4048b3a4838891f4.34f5b2c21d9dfd33.34b136fabaf5d331.3f82ae9682f79423 - c3d16ca7a0000000.c2546454a0000000.463b00e420000000.45a8804280000000 + 0000000000000000.0000000000000000.0000000000000000.8000000080000000 adb67ef19ebca981.a29c388cf45db521.de8b653dd2a322a5.71d807216d440214 8edc243857fffd44 -VCVTPS2PD_256(mem) +VCVTPD2DQ_256(mem) before 27d6886c5e82cb7e.c673497c08c0b579.a1826a94497b8211.3126c5d2241b7d30 1992aea89fda27f0.f2f0a783d3c610cc.4b83dfee0a2740e1.a899faedcb0e4980 @@ -28236,11 +28236,11 @@ VCVTPS2PD_256(mem) after 27d6886c5e82cb7e.c673497c08c0b579.a1826a94497b8211.3126c5d2241b7d30 1992aea89fda27f0.f2f0a783d3c610cc.4b83dfee0a2740e1.a899faedcb0e4980 - bc304d5280000000.412f704220000000.3e24d8ba40000000.3c836fa600000000 + 0000000000000000.0000000000000000.0000000080000000.0000000000000000 797f31e73d377d26.ef540dba0205a636.110987493d5a7dd4.723ad36987972621 7d0070a2d345afca -VCVTPS2PD_256(reg) +VCVTPD2DQ_256(reg) before 1cced212e49d99e9.9e4886c3d254ee43.78d50cc09d5758a4.e426b121e8fa754e aaf2f525552e2229.8d038d571175dd47.83458ff40bda4a1e.d38e10fb6e574e59 @@ -28250,10 +28250,10 @@ VCVTPS2PD_256(reg) after 1cced212e49d99e9.9e4886c3d254ee43.78d50cc09d5758a4.e426b121e8fa754e aaf2f525552e2229.8d038d571175dd47.83458ff40bda4a1e.d38e10fb6e574e59 - ba0401f260000000.c1b49bdc80000000.460e6b2ce0000000.47afb23a20000000 + 0000000000000000.0000000000000000.0000000000000000.0000000080000000 08676ee4c924fcbe.347fa258faf428b2.90200f93cda4dee4.707359677d7d91d1 d7873cd03e5e7495 -VCVTPS2PD_256(mem) +VCVTPD2DQ_256(mem) before c91743ea4a2d279a.8f51bd6804a2c66b.a5d7a89cdd6bfc71.492403d75a03f789 22efeba3bef6670c.76c0bd400f881de9.4f524f48da153ec7.f4476bf72ac340e9 @@ -28263,11 +28263,11 @@ VCVTPS2PD_256(mem) after c91743ea4a2d279a.8f51bd6804a2c66b.a5d7a89cdd6bfc71.492403d75a03f789 22efeba3bef6670c.76c0bd400f881de9.4f524f48da153ec7.f4476bf72ac340e9 - bcbaf51380000000.c3ad7f8e20000000.4124807ae0000000.43407ef120000000 + 0000000000000000.0000000000000000.8000000000000000.0000000080000000 79a70ba04ca77ee6.d35cc09807b9650b.bedc76898f37ffe7.9119847f0098518d 3a612dbe3fc49128 -VCVTTPS2DQ_128(reg) +VMOVSLDUP_128(reg) before 45f73a8b3082f12e.2f1e7bbb9ea8cca5.0121bbf02b1cce07.3b84ecf680c7f509 0e28a651705dad4c.bc0d7b24c7d29781.009b584c9117b484.617ef57bfabb4b71 @@ -28277,10 +28277,10 @@ VCVTTPS2DQ_128(reg) after 45f73a8b3082f12e.2f1e7bbb9ea8cca5.0121bbf02b1cce07.3b84ecf680c7f509 0e28a651705dad4c.bc0d7b24c7d29781.009b584c9117b484.617ef57bfabb4b71 - 0000000000000000.0000000000000000.8000000000000000.0000000080000000 + 0000000000000000.0000000000000000.8c03eab28c03eab2.fb0001c6fb0001c6 4a8b8b774b9b2780.cb831d9111d69440.ddde65bd8c03eab2.1897ad7dfb0001c6 614e55d2ba69db0a -VCVTTPS2DQ_128(mem) +VMOVSLDUP_128(mem) before c3887fef72660344.7554fcb01e165eed.05a2b66d69c83d7a.743fcdaa5b0cb1bc 1a0fa6c0400435a2.cee9bd93b0dfe121.8669cf4608145380.4a84c74ad9dce6f7 @@ -28290,11 +28290,11 @@ VCVTTPS2DQ_128(mem) after c3887fef72660344.7554fcb01e165eed.05a2b66d69c83d7a.743fcdaa5b0cb1bc 1a0fa6c0400435a2.cee9bd93b0dfe121.8669cf4608145380.4a84c74ad9dce6f7 - 0000000000000000.0000000000000000.0000000080000000.8000000080000000 + 0000000000000000.0000000000000000.69c83d7a69c83d7a.5b0cb1bc5b0cb1bc 1636e12f8b50ab74.7aa21c027f88b991.cc1d72a48eebb5a3.27ee5e5359038ab2 e5aaf3949171708b -VCVTTPS2DQ_128(reg) +VMOVSLDUP_128(reg) before 547b0a39ead7b444.746feba541176641.855fb267f4808724.4aa4f400ab8e7917 cead9dacffc0928b.3625e47e7dae1ce1.2e17882697f6902f.7f02e60a81bb9a08 @@ -28304,10 +28304,10 @@ VCVTTPS2DQ_128(reg) after 547b0a39ead7b444.746feba541176641.855fb267f4808724.4aa4f400ab8e7917 cead9dacffc0928b.3625e47e7dae1ce1.2e17882697f6902f.7f02e60a81bb9a08 - 0000000000000000.0000000000000000.ffeb03d580000000.80000000ffffff8e + 0000000000000000.0000000000000000.da8a465cda8a465c.c2e5e210c2e5e210 56632cb1cf4c0a73.5b3c900ef47d6748.c9a7e15eda8a465c.7d750bd9c2e5e210 ff23367565fa817f -VCVTTPS2DQ_128(mem) +VMOVSLDUP_128(mem) before a7d8c17031c86c1a.1d7f201ac2071d6b.74343c9c68cd7568.74185cb0b1c06ad6 536128b43f5d610e.5f2c8001e175baa0.63d9c53ed21d6e0a.2db3060b26a3bb77 @@ -28317,11 +28317,11 @@ VCVTTPS2DQ_128(mem) after a7d8c17031c86c1a.1d7f201ac2071d6b.74343c9c68cd7568.74185cb0b1c06ad6 536128b43f5d610e.5f2c8001e175baa0.63d9c53ed21d6e0a.2db3060b26a3bb77 - 0000000000000000.0000000000000000.8000000080000000.8000000000000000 + 0000000000000000.0000000000000000.68cd756868cd7568.b1c06ad6b1c06ad6 231f7bcc970b54af.c76979ff159c8074.2f5f636ef5ef0f86.389ad98c5ca1cee1 427df98a55d40a01 -VCVTTPS2DQ_128(reg) +VMOVSLDUP_128(reg) before cbbc38415ce561f8.ffec5f76183bcab5.a59109ec616c226b.c4d66fd5e78930b8 2ea1931e0e5f1074.4fbd0f1b4d613ac3.6f79f7084a203e4f.9f2b4aff3e522b1c @@ -28331,10 +28331,10 @@ VCVTTPS2DQ_128(reg) after cbbc38415ce561f8.ffec5f76183bcab5.a59109ec616c226b.c4d66fd5e78930b8 2ea1931e0e5f1074.4fbd0f1b4d613ac3.6f79f7084a203e4f.9f2b4aff3e522b1c - 0000000000000000.0000000000000000.0000000080000000.0000000000000000 + 0000000000000000.0000000000000000.6262d2906262d290.8da7a22d8da7a22d f1918af6e1bf65a5.b699c40440c1f3aa.37bdd97e6262d290.939f5a508da7a22d 6456874fbd4a9631 -VCVTTPS2DQ_128(mem) +VMOVSLDUP_128(mem) before ea1a72c1c24d5418.09331ec93abd83b3.873dc11f3713b4da.edb0c6b0c807c244 02b99894b9bd990e.6bacbd72ae54e8f5.3a157ae4518a5ec2.ff9400c03bc11d97 @@ -28344,11 +28344,11 @@ VCVTTPS2DQ_128(mem) after ea1a72c1c24d5418.09331ec93abd83b3.873dc11f3713b4da.edb0c6b0c807c244 02b99894b9bd990e.6bacbd72ae54e8f5.3a157ae4518a5ec2.ff9400c03bc11d97 - 0000000000000000.0000000000000000.0000000000000000.80000000fffde0f7 + 0000000000000000.0000000000000000.3713b4da3713b4da.c807c244c807c244 53b3820aea11a7d4.7e520ef3557f7bc3.ba91101d611d5d6d.a75e4d2fb69dffc4 f5dc5765f7d8fef7 -VCVTTPS2DQ_256(reg) +VMOVSLDUP_256(reg) before 0f7c9e2ab3565778.45a73e855d0de9fe.e617b7a3c02a20a7.3ecce6698d502988 50881eea89a446f2.38a5241132a6a1e5.09e35bd8b59ffc6f.156c680e4ed9ce0b @@ -28358,10 +28358,10 @@ VCVTTPS2DQ_256(reg) after 0f7c9e2ab3565778.45a73e855d0de9fe.e617b7a3c02a20a7.3ecce6698d502988 50881eea89a446f2.38a5241132a6a1e5.09e35bd8b59ffc6f.156c680e4ed9ce0b - 0000000080000000.0000000080000000.8000000000000000.0000000080000000 + edded584edded584.6fdd65a16fdd65a1.b0144d5ab0144d5a.f91f92fbf91f92fb bc16bb0bedded584.92ee60076fdd65a1.ebc08581b0144d5a.2c066018f91f92fb 2499cf541bf329bf -VCVTTPS2DQ_256(mem) +VMOVSLDUP_256(mem) before dfc0da9a414e899d.9e31cf45b3e2eef3.b0d1ad4b1093e9cc.636903ceed2d39d5 3946fdd6873a6ebf.17e90c2902e58b0c.3fee144f8215d367.06486c4f243f4ce3 @@ -28371,11 +28371,11 @@ VCVTTPS2DQ_256(mem) after dfc0da9a414e899d.9e31cf45b3e2eef3.b0d1ad4b1093e9cc.636903ceed2d39d5 3946fdd6873a6ebf.17e90c2902e58b0c.3fee144f8215d367.06486c4f243f4ce3 - 800000000000000c.0000000000000000.0000000000000000.8000000080000000 + 414e899d414e899d.b3e2eef3b3e2eef3.1093e9cc1093e9cc.ed2d39d5ed2d39d5 3aa37be1e1fbb581.425ef2a4aa1a48ea.200622464caecd97.38dcf0a1f27fda6b 8028034ac1c5cd3c -VCVTTPS2DQ_256(reg) +VMOVSLDUP_256(reg) before 62dbf1d8fa34d751.9911cf872de79078.acb493113b63df08.2a99c012dade5485 3a41b7b73a593555.070f2bd40896e065.1dd74ddac4dbec7f.1595684eab093291 @@ -28385,10 +28385,10 @@ VCVTTPS2DQ_256(reg) after 62dbf1d8fa34d751.9911cf872de79078.acb493113b63df08.2a99c012dade5485 3a41b7b73a593555.070f2bd40896e065.1dd74ddac4dbec7f.1595684eab093291 - 0000000000000000.0000000080000000.0000000000000000.8000000000000000 + 3df3dcdd3df3dcdd.dd69cdcbdd69cdcb.2f8b572a2f8b572a.8086e1b68086e1b6 3c55b7183df3dcdd.80eaeb0fdd69cdcb.88b3fd2d2f8b572a.fdfcc7c68086e1b6 b3fe76dabcee2b27 -VCVTTPS2DQ_256(mem) +VMOVSLDUP_256(mem) before ba9a1f0faa83bc65.1e9bea7238809eb8.436047d60fa7e39d.3a05eb9049d92cb5 ee9b3e4f66514f9f.66c4e4cdaaf2a333.84959cf341d65d14.6353e2fdcc87684b @@ -28398,11 +28398,11 @@ VCVTTPS2DQ_256(mem) after ba9a1f0faa83bc65.1e9bea7238809eb8.436047d60fa7e39d.3a05eb9049d92cb5 ee9b3e4f66514f9f.66c4e4cdaaf2a333.84959cf341d65d14.6353e2fdcc87684b - 0000000000000000.0000000000000000.000000e000000000.00000000001b2596 + aa83bc65aa83bc65.38809eb838809eb8.0fa7e39d0fa7e39d.49d92cb549d92cb5 4c00cfa4b6c46db2.97e... [truncated message content] |
|
From: Philippe W. <phi...@so...> - 2019-11-12 05:14:38
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=914d91769a6524f9af07bba998efa3c3c4a51f69 commit 914d91769a6524f9af07bba998efa3c3c4a51f69 Author: Philippe Waroquiers <phi...@sk...> Date: Mon Nov 11 22:22:46 2019 +0100 Repair --px-file-backed broken due to dynamic option change. The commit 3a803036f7 (Allow the user to change a set of command line options during execution) removed by mistake the code handling the option --px-file-backed. Add it back, and modify a trivialleak.vgtest to use the 'VEX registers' options setting (and their synonym) to do a minimal verification that the options and synonyms are accepted. The options are specifying the default values, they should not influence the result of the test. Bug (and its origin) reported by Julian. Diff: --- coregrind/m_main.c | 9 +++++++++ memcheck/tests/trivialleak.vgtest | 4 +++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/coregrind/m_main.c b/coregrind/m_main.c index 6ad1b93..6987236 100644 --- a/coregrind/m_main.c +++ b/coregrind/m_main.c @@ -710,6 +710,15 @@ static void process_option (Clo_Mode mode, VG_(clo_vex_control).iropt_register_updates_default = pxVals[ix]; } + else if VG_STRINDEX_CLO(arg, "--px-file-backed", pxStrings, ix) { + // Whereas --px-file-backed isn't + // the same flag as --vex-iropt-register-updates. + vg_assert(ix < 4); + vg_assert(pxVals[ix] >= VexRegUpdSpAtMemAccess); + vg_assert(pxVals[ix] <= VexRegUpdAllregsAtEachInsn); + VG_(clo_px_file_backed) = pxVals[ix]; + } + else if VG_BINT_CLO(arg, "--vex-iropt-unroll-thresh", VG_(clo_vex_control).iropt_unroll_thresh, 0, 400) {} else if VG_BINT_CLO(arg, "--vex-guest-max-insns", diff --git a/memcheck/tests/trivialleak.vgtest b/memcheck/tests/trivialleak.vgtest index 58641ea..44d611c 100644 --- a/memcheck/tests/trivialleak.vgtest +++ b/memcheck/tests/trivialleak.vgtest @@ -1,2 +1,4 @@ -vgopts: --leak-check=yes -q +vgopts: --leak-check=yes -q --vex-iropt-register-updates=unwindregs-at-mem-access --px-default=unwindregs-at-mem-access --px-file-backed=unwindregs-at-mem-access +# The options after -q are just validating these options and synonyms are +# accepted: the values above are the default values. prog: trivialleak |
|
From: Julian S. <se...@so...> - 2019-11-11 16:07:34
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=76e6c9df8733bacbff75aeb0f74ffa90d7867023 commit 76e6c9df8733bacbff75aeb0f74ffa90d7867023 Author: Julian Seward <js...@ac...> Date: Mon Nov 11 17:06:54 2019 +0100 iselFltExpr_wrk: handle Iex_ITE, presumably caused by newly-created guarding machinery. Diff: --- VEX/priv/host_amd64_isel.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/VEX/priv/host_amd64_isel.c b/VEX/priv/host_amd64_isel.c index a389e81..8dc3068 100644 --- a/VEX/priv/host_amd64_isel.c +++ b/VEX/priv/host_amd64_isel.c @@ -2815,6 +2815,19 @@ static HReg iselFltExpr_wrk ( ISelEnv* env, const IRExpr* e ) return dst; } + if (e->tag == Iex_ITE) { // VFD + HReg r1, r0, dst; + vassert(ty == Ity_F32); + vassert(typeOfIRExpr(env->type_env,e->Iex.ITE.cond) == Ity_I1); + r1 = iselFltExpr(env, e->Iex.ITE.iftrue); + r0 = iselFltExpr(env, e->Iex.ITE.iffalse); + dst = newVRegV(env); + addInstr(env, mk_vMOVsd_RR(r1,dst)); + AMD64CondCode cc = iselCondCode(env, e->Iex.ITE.cond); + addInstr(env, AMD64Instr_SseCMov(cc ^ 1, r0, dst)); + return dst; + } + ppIRExpr(e); vpanic("iselFltExpr_wrk"); } |
|
From: Julian S. <se...@so...> - 2019-11-11 15:21:04
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=15c69a57ed826c65867dbd1974f4d4a3b040e6cb commit 15c69a57ed826c65867dbd1974f4d4a3b040e6cb Author: Julian Seward <js...@ac...> Date: Mon Nov 11 16:11:20 2019 +0100 Clean up machinery to do with conditionalising IRStmts: * document some functions * change naming and terminology from 'speculation' (which it isn't) to 'guarding' (which it is) * add a new function |primopMightTrap| so as to avoid conditionalising IRExprs involving potentially trappy IROps Diff: --- VEX/priv/guest_generic_bb_to_IR.c | 75 ++++--- VEX/priv/ir_defs.c | 426 ++++++++++++++++++++++++++++++++++++++ VEX/pub/libvex_ir.h | 5 + 3 files changed, 476 insertions(+), 30 deletions(-) diff --git a/VEX/priv/guest_generic_bb_to_IR.c b/VEX/priv/guest_generic_bb_to_IR.c index 4cb813f..7782bcf 100644 --- a/VEX/priv/guest_generic_bb_to_IR.c +++ b/VEX/priv/guest_generic_bb_to_IR.c @@ -388,29 +388,42 @@ static void create_self_checks_as_needed( /*--------------------------------------------------------------*/ -/*--- To do with speculation of IRStmts ---*/ +/*--- To do with guarding (conditionalisation) of IRStmts ---*/ /*--------------------------------------------------------------*/ -static Bool expr_is_speculatable ( const IRExpr* e ) +// Is it possible to guard |e|? Meaning, is it safe (exception-free) to compute +// |e| and ignore the result? Since |e| is by definition otherwise +// side-effect-free, we don't have to ask about any other effects caused by +// first computing |e| and then ignoring the result. +static Bool expr_is_guardable ( const IRExpr* e ) { switch (e->tag) { case Iex_Load: return False; - case Iex_Unop: // FIXME BOGUS, since it might trap - case Iex_Binop: // FIXME ditto - case Iex_ITE: // this is OK - return True; + case Iex_Unop: + return !primopMightTrap(e->Iex.Unop.op); + case Iex_Binop: + return !primopMightTrap(e->Iex.Binop.op); + case Iex_ITE: case Iex_CCall: - return True; // This is probably correct case Iex_Get: return True; default: - vex_printf("\n"); ppIRExpr(e); - vpanic("expr_is_speculatable: unhandled expr"); + vex_printf("\n"); ppIRExpr(e); vex_printf("\n"); + vpanic("expr_is_guardable: unhandled expr"); } } -static Bool stmt_is_speculatable ( const IRStmt* st ) +// Is it possible to guard |st|? Meaning, is it possible to replace |st| by +// some other sequence of IRStmts which have the same effect on the architected +// state when the guard is true, but when it is false, have no effect on the +// architected state and are guaranteed not to cause any exceptions? +// +// Note that this isn't as aggressive as it could be: it sometimes returns False +// in cases where |st| is actually guardable. This routine must coordinate +// closely with add_guarded_stmt_to_end_of below, in the sense that that routine +// must be able to handle any |st| for which this routine returns True. +static Bool stmt_is_guardable ( const IRStmt* st ) { switch (st->tag) { case Ist_IMark: @@ -421,35 +434,37 @@ static Bool stmt_is_speculatable ( const IRStmt* st ) case Ist_Exit: // We could in fact spec this, if required return False; case Ist_WrTmp: - return expr_is_speculatable(st->Ist.WrTmp.data); + return expr_is_guardable(st->Ist.WrTmp.data); default: - vex_printf("\n"); ppIRStmt(st); - vpanic("stmt_is_speculatable: unhandled stmt"); + vex_printf("\n"); ppIRStmt(st); vex_printf("\n"); + vpanic("stmt_is_guardable: unhandled stmt"); } } -static Bool block_is_speculatable ( const IRSB* bb ) +// Are all stmts (but not the end dst value) in |bb| guardable, per +// stmt_is_guardable? +static Bool block_is_guardable ( const IRSB* bb ) { Int i = bb->stmts_used; - vassert(i >= 2); // Must have at least: IMark, final Exit + vassert(i >= 2); // Must have at least: IMark, side Exit (at the end) i--; vassert(bb->stmts[i]->tag == Ist_Exit); i--; for (; i >= 0; i--) { - if (!stmt_is_speculatable(bb->stmts[i])) + if (!stmt_is_guardable(bb->stmts[i])) return False; } return True; } -static void speculate_stmt_to_end_of ( /*MOD*/IRSB* bb, - /*IN*/ IRStmt* st, IRTemp guard ) +// Guard |st| with |guard| and add it to |bb|. This must be able to handle any +// |st| for which stmt_is_guardable returns True. +static void add_guarded_stmt_to_end_of ( /*MOD*/IRSB* bb, + /*IN*/ IRStmt* st, IRTemp guard ) { - // We assume all stmts we're presented with here have previously been OK'd by - // stmt_is_speculatable above. switch (st->tag) { case Ist_IMark: - case Ist_WrTmp: // FIXME is this ok? + case Ist_WrTmp: addStmtToIRSB(bb, st); break; case Ist_Put: { @@ -472,7 +487,7 @@ static void speculate_stmt_to_end_of ( /*MOD*/IRSB* bb, case Ist_Exit: { // Exit(xguard, dst, jk, offsIP) // ==> t1 = And1(xguard, guard) - // Exit(And1(xguard, guard), dst, jk, offsIP) + // Exit(t1, dst, jk, offsIP) IRExpr* xguard = st->Ist.Exit.guard; IRTemp t1 = newIRTemp(bb->tyenv, Ity_I1); addStmtToIRSB(bb, IRStmt_WrTmp(t1, IRExpr_Binop(Iop_And1, xguard, @@ -482,8 +497,8 @@ static void speculate_stmt_to_end_of ( /*MOD*/IRSB* bb, break; } default: - vex_printf("\n"); ppIRStmt(st); - vpanic("speculate_stmt_to_end_of: unhandled stmt"); + vex_printf("\n"); ppIRStmt(st); vex_printf("\n"); + vpanic("add_guarded_stmt_to_end_of: unhandled stmt"); } } @@ -1435,10 +1450,10 @@ IRSB* bb_to_IR ( ppBlockEnd(&sx_be); vex_printf("\n"); } - // Finally, check the sx block actually is speculatable. - ok = block_is_speculatable(sx_bb); + // Finally, check the sx block actually is guardable. + ok = block_is_guardable(sx_bb); if (!ok && debug_print) { - vex_printf("\n-+-+ SX not speculatable, giving up. -+-+\n\n"); + vex_printf("\n-+-+ SX not guardable, giving up. -+-+\n\n"); } } @@ -1450,10 +1465,10 @@ IRSB* bb_to_IR ( // 0. remove the last Exit on irsb. // 1. Add irsb->tyenv->types_used to all the tmps in sx_bb, // by calling deltaIRStmt on all stmts. - // 2. Speculate all stmts in sx_bb on irsb_be.Be.Cond.condSX, + // 2. Guard all stmts in sx_bb on irsb_be.Be.Cond.condSX, // **including** the last stmt (which must be an Exit). It's // here that the And1 is generated. - // 3. Copy all speculated stmts to the end of irsb. + // 3. Copy all guarded stmts to the end of irsb. vassert(irsb->stmts_used >= 2); irsb->stmts_used--; Int delta = irsb->tyenv->types_used; @@ -1466,7 +1481,7 @@ IRSB* bb_to_IR ( for (Int i = 0; i < sx_bb->stmts_used; i++) { IRStmt* st = deepCopyIRStmt(sx_bb->stmts[i]); deltaIRStmt(st, delta); - speculate_stmt_to_end_of(irsb, st, irsb_be.Be.Cond.condSX); + add_guarded_stmt_to_end_of(irsb, st, irsb_be.Be.Cond.condSX); } if (debug_print) { diff --git a/VEX/priv/ir_defs.c b/VEX/priv/ir_defs.c index 6035574..d687d8f 100644 --- a/VEX/priv/ir_defs.c +++ b/VEX/priv/ir_defs.c @@ -1345,6 +1345,432 @@ void ppIROp ( IROp op ) } } +// A very few primops might trap (eg, divide by zero). We need to be able to +// identify them. +Bool primopMightTrap ( IROp op ) +{ + switch (op) { + + // The few potentially trapping ones + case Iop_DivU32: case Iop_DivS32: case Iop_DivU64: case Iop_DivS64: + case Iop_DivU64E: case Iop_DivS64E: case Iop_DivU32E: case Iop_DivS32E: + case Iop_DivModU64to32: case Iop_DivModS64to32: case Iop_DivModU128to64: + case Iop_DivModS128to64: case Iop_DivModS64to64: case Iop_DivModU64to64: + case Iop_DivModS32to32: case Iop_DivModU32to32: + return True; + + // All the rest are non-trapping + case Iop_Add8: case Iop_Add16: case Iop_Add32: case Iop_Add64: + case Iop_Sub8: case Iop_Sub16: case Iop_Sub32: case Iop_Sub64: + case Iop_Mul8: case Iop_Mul16: case Iop_Mul32: case Iop_Mul64: + case Iop_Or8: case Iop_Or16: case Iop_Or32: case Iop_Or64: + case Iop_And8: case Iop_And16: case Iop_And32: case Iop_And64: + case Iop_Xor8: case Iop_Xor16: case Iop_Xor32: case Iop_Xor64: + case Iop_Shl8: case Iop_Shl16: case Iop_Shl32: case Iop_Shl64: + case Iop_Shr8: case Iop_Shr16: case Iop_Shr32: case Iop_Shr64: + case Iop_Sar8: case Iop_Sar16: case Iop_Sar32: case Iop_Sar64: + case Iop_CmpEQ8: case Iop_CmpEQ16: case Iop_CmpEQ32: case Iop_CmpEQ64: + case Iop_CmpNE8: case Iop_CmpNE16: case Iop_CmpNE32: case Iop_CmpNE64: + case Iop_Not8: case Iop_Not16: case Iop_Not32: case Iop_Not64: + case Iop_CasCmpEQ8: case Iop_CasCmpEQ16: case Iop_CasCmpEQ32: + case Iop_CasCmpEQ64: case Iop_CasCmpNE8: case Iop_CasCmpNE16: + case Iop_CasCmpNE32: case Iop_CasCmpNE64: case Iop_ExpCmpNE8: + case Iop_ExpCmpNE16: case Iop_ExpCmpNE32: case Iop_ExpCmpNE64: + case Iop_MullS8: case Iop_MullS16: case Iop_MullS32: case Iop_MullS64: + case Iop_MullU8: case Iop_MullU16: case Iop_MullU32: case Iop_MullU64: + case Iop_Clz64: case Iop_Clz32: case Iop_Ctz64: case Iop_Ctz32: + case Iop_ClzNat64: case Iop_ClzNat32: case Iop_CtzNat64: case Iop_CtzNat32: + case Iop_PopCount64: case Iop_PopCount32: + case Iop_CmpLT32S: case Iop_CmpLT64S: case Iop_CmpLE32S: case Iop_CmpLE64S: + case Iop_CmpLT32U: case Iop_CmpLT64U: case Iop_CmpLE32U: case Iop_CmpLE64U: + case Iop_CmpNEZ8: case Iop_CmpNEZ16: case Iop_CmpNEZ32: case Iop_CmpNEZ64: + case Iop_CmpwNEZ32: case Iop_CmpwNEZ64: + case Iop_Left8: case Iop_Left16: case Iop_Left32: case Iop_Left64: + case Iop_Max32U: case Iop_CmpORD32U: case Iop_CmpORD64U: + case Iop_CmpORD32S: case Iop_CmpORD64S: + case Iop_8Uto16: case Iop_8Uto32: case Iop_8Uto64: + case Iop_16Uto32: case Iop_16Uto64: case Iop_32Uto64: + case Iop_8Sto16: case Iop_8Sto32: case Iop_8Sto64: + case Iop_16Sto32: case Iop_16Sto64: case Iop_32Sto64: + case Iop_64to8: case Iop_32to8: case Iop_64to16: + case Iop_16to8: case Iop_16HIto8: case Iop_8HLto16: case Iop_32to16: + case Iop_32HIto16: case Iop_16HLto32: case Iop_64to32: case Iop_64HIto32: + case Iop_32HLto64: case Iop_128to64: case Iop_128HIto64: case Iop_64HLto128: + case Iop_Not1: case Iop_And1: case Iop_Or1: case Iop_32to1: case Iop_64to1: + case Iop_1Uto8: case Iop_1Uto32: case Iop_1Uto64: case Iop_1Sto8: + case Iop_1Sto16: case Iop_1Sto32: case Iop_1Sto64: + case Iop_AddF64: case Iop_SubF64: case Iop_MulF64: case Iop_DivF64: + case Iop_AddF32: case Iop_SubF32: case Iop_MulF32: case Iop_DivF32: + case Iop_AddF64r32: case Iop_SubF64r32: case Iop_MulF64r32: + case Iop_DivF64r32: case Iop_NegF64: case Iop_AbsF64: + case Iop_NegF32: case Iop_AbsF32: case Iop_SqrtF64: case Iop_SqrtF32: + case Iop_CmpF64: case Iop_CmpF32: case Iop_CmpF128: case Iop_F64toI16S: + case Iop_F64toI32S: case Iop_F64toI64S: case Iop_F64toI64U: + case Iop_F64toI32U: case Iop_I32StoF64: case Iop_I64StoF64: + case Iop_I64UtoF64: case Iop_I64UtoF32: case Iop_I32UtoF32: + case Iop_I32UtoF64: case Iop_F32toI32S: case Iop_F32toI64S: + case Iop_F32toI32U: case Iop_F32toI64U: case Iop_I32StoF32: + case Iop_I64StoF32: case Iop_F32toF64: case Iop_F64toF32: + case Iop_ReinterpF64asI64: case Iop_ReinterpI64asF64: + case Iop_ReinterpF32asI32: case Iop_ReinterpI32asF32: + case Iop_F64HLtoF128: case Iop_F128HItoF64: case Iop_F128LOtoF64: + case Iop_AddF128: case Iop_SubF128: case Iop_MulF128: case Iop_DivF128: + case Iop_MAddF128: case Iop_MSubF128: case Iop_NegMAddF128: + case Iop_NegMSubF128: case Iop_NegF128: case Iop_AbsF128: + case Iop_SqrtF128: case Iop_I32StoF128: case Iop_I64StoF128: + case Iop_I32UtoF128: case Iop_I64UtoF128: case Iop_F32toF128: + case Iop_F64toF128: case Iop_F128toI32S: case Iop_F128toI64S: + case Iop_F128toI32U: case Iop_F128toI64U: case Iop_F128toI128S: + case Iop_F128toF64: case Iop_F128toF32: case Iop_RndF128: + case Iop_TruncF128toI32S: case Iop_TruncF128toI32U: case Iop_TruncF128toI64U: + case Iop_TruncF128toI64S: case Iop_AtanF64: case Iop_Yl2xF64: + case Iop_Yl2xp1F64: case Iop_PRemF64: case Iop_PRemC3210F64: + case Iop_PRem1F64: case Iop_PRem1C3210F64: case Iop_ScaleF64: + case Iop_SinF64: case Iop_CosF64: case Iop_TanF64: + case Iop_2xm1F64: case Iop_RoundF128toInt: case Iop_RoundF64toInt: + case Iop_RoundF32toInt: case Iop_MAddF32: case Iop_MSubF32: + case Iop_MAddF64: case Iop_MSubF64: + case Iop_MAddF64r32: case Iop_MSubF64r32: + case Iop_RSqrtEst5GoodF64: case Iop_RoundF64toF64_NEAREST: + case Iop_RoundF64toF64_NegINF: case Iop_RoundF64toF64_PosINF: + case Iop_RoundF64toF64_ZERO: case Iop_TruncF64asF32: case Iop_RoundF64toF32: + case Iop_RecpExpF64: case Iop_RecpExpF32: case Iop_MaxNumF64: + case Iop_MinNumF64: case Iop_MaxNumF32: case Iop_MinNumF32: + case Iop_F16toF64: case Iop_F64toF16: case Iop_F16toF32: + case Iop_F32toF16: case Iop_QAdd32S: case Iop_QSub32S: + case Iop_Add16x2: case Iop_Sub16x2: + case Iop_QAdd16Sx2: case Iop_QAdd16Ux2: + case Iop_QSub16Sx2: case Iop_QSub16Ux2: + case Iop_HAdd16Ux2: case Iop_HAdd16Sx2: + case Iop_HSub16Ux2: case Iop_HSub16Sx2: + case Iop_Add8x4: case Iop_Sub8x4: + case Iop_QAdd8Sx4: case Iop_QAdd8Ux4: + case Iop_QSub8Sx4: case Iop_QSub8Ux4: + case Iop_HAdd8Ux4: case Iop_HAdd8Sx4: + case Iop_HSub8Ux4: case Iop_HSub8Sx4: case Iop_Sad8Ux4: + case Iop_CmpNEZ16x2: case Iop_CmpNEZ8x4: case Iop_Reverse8sIn32_x1: + case Iop_I32UtoF32x2_DEP: case Iop_I32StoF32x2_DEP: + case Iop_F32toI32Ux2_RZ: case Iop_F32toI32Sx2_RZ: + case Iop_F32ToFixed32Ux2_RZ: case Iop_F32ToFixed32Sx2_RZ: + case Iop_Fixed32UToF32x2_RN: case Iop_Fixed32SToF32x2_RN: + case Iop_Max32Fx2: case Iop_Min32Fx2: + case Iop_PwMax32Fx2: case Iop_PwMin32Fx2: + case Iop_CmpEQ32Fx2: case Iop_CmpGT32Fx2: case Iop_CmpGE32Fx2: + case Iop_RecipEst32Fx2: case Iop_RecipStep32Fx2: case Iop_RSqrtEst32Fx2: + case Iop_RSqrtStep32Fx2: case Iop_Neg32Fx2: case Iop_Abs32Fx2: + case Iop_CmpNEZ8x8: case Iop_CmpNEZ16x4: case Iop_CmpNEZ32x2: + case Iop_Add8x8: case Iop_Add16x4: case Iop_Add32x2: + case Iop_QAdd8Ux8: case Iop_QAdd16Ux4: case Iop_QAdd32Ux2: case Iop_QAdd64Ux1: + case Iop_QAdd8Sx8: case Iop_QAdd16Sx4: case Iop_QAdd32Sx2: case Iop_QAdd64Sx1: + case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2: + case Iop_PwMax8Sx8: case Iop_PwMax16Sx4: case Iop_PwMax32Sx2: + case Iop_PwMax8Ux8: case Iop_PwMax16Ux4: case Iop_PwMax32Ux2: + case Iop_PwMin8Sx8: case Iop_PwMin16Sx4: case Iop_PwMin32Sx2: + case Iop_PwMin8Ux8: case Iop_PwMin16Ux4: case Iop_PwMin32Ux2: + case Iop_PwAddL8Ux8: case Iop_PwAddL16Ux4: case Iop_PwAddL32Ux2: + case Iop_PwAddL8Sx8: case Iop_PwAddL16Sx4: case Iop_PwAddL32Sx2: + case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2: + case Iop_QSub8Ux8: case Iop_QSub16Ux4: case Iop_QSub32Ux2: case Iop_QSub64Ux1: + case Iop_QSub8Sx8: case Iop_QSub16Sx4: case Iop_QSub32Sx2: case Iop_QSub64Sx1: + case Iop_Abs8x8: case Iop_Abs16x4: case Iop_Abs32x2: + case Iop_Mul8x8: case Iop_Mul16x4: case Iop_Mul32x2: + case Iop_Mul32Fx2: case Iop_MulHi16Ux4: case Iop_MulHi16Sx4: + case Iop_PolynomialMul8x8: case Iop_QDMulHi16Sx4: case Iop_QDMulHi32Sx2: + case Iop_QRDMulHi16Sx4: case Iop_QRDMulHi32Sx2: case Iop_Avg8Ux8: + case Iop_Avg16Ux4: case Iop_Max8Sx8: case Iop_Max16Sx4: case Iop_Max32Sx2: + case Iop_Max8Ux8: case Iop_Max16Ux4: case Iop_Max32Ux2: + case Iop_Min8Sx8: case Iop_Min16Sx4: case Iop_Min32Sx2: + case Iop_Min8Ux8: case Iop_Min16Ux4: case Iop_Min32Ux2: + case Iop_CmpEQ8x8: case Iop_CmpEQ16x4: case Iop_CmpEQ32x2: + case Iop_CmpGT8Ux8: case Iop_CmpGT16Ux4: case Iop_CmpGT32Ux2: + case Iop_CmpGT8Sx8: case Iop_CmpGT16Sx4: case Iop_CmpGT32Sx2: + case Iop_Cnt8x8: case Iop_Clz8x8: case Iop_Clz16x4: case Iop_Clz32x2: + case Iop_Cls8x8: case Iop_Cls16x4: case Iop_Cls32x2: case Iop_Clz64x2: + case Iop_Ctz8x16: case Iop_Ctz16x8: case Iop_Ctz32x4: case Iop_Ctz64x2: + case Iop_Shl8x8: case Iop_Shl16x4: case Iop_Shl32x2: + case Iop_Shr8x8: case Iop_Shr16x4: case Iop_Shr32x2: + case Iop_Sar8x8: case Iop_Sar16x4: case Iop_Sar32x2: + case Iop_Sal8x8: case Iop_Sal16x4: case Iop_Sal32x2: case Iop_Sal64x1: + case Iop_ShlN8x8: case Iop_ShlN16x4: case Iop_ShlN32x2: + case Iop_ShrN8x8: case Iop_ShrN16x4: case Iop_ShrN32x2: + case Iop_SarN8x8: case Iop_SarN16x4: case Iop_SarN32x2: + case Iop_QShl8x8: case Iop_QShl16x4: case Iop_QShl32x2: case Iop_QShl64x1: + case Iop_QSal8x8: case Iop_QSal16x4: case Iop_QSal32x2: case Iop_QSal64x1: + case Iop_QShlNsatSU8x8: case Iop_QShlNsatSU16x4: + case Iop_QShlNsatSU32x2: case Iop_QShlNsatSU64x1: + case Iop_QShlNsatUU8x8: case Iop_QShlNsatUU16x4: + case Iop_QShlNsatUU32x2: case Iop_QShlNsatUU64x1: + case Iop_QShlNsatSS8x8: case Iop_QShlNsatSS16x4: + case Iop_QShlNsatSS32x2: case Iop_QShlNsatSS64x1: + case Iop_QNarrowBin16Sto8Ux8: + case Iop_QNarrowBin16Sto8Sx8: case Iop_QNarrowBin32Sto16Sx4: + case Iop_NarrowBin16to8x8: case Iop_NarrowBin32to16x4: + case Iop_InterleaveHI8x8: case Iop_InterleaveHI16x4: + case Iop_InterleaveHI32x2: + case Iop_InterleaveLO8x8: case Iop_InterleaveLO16x4: + case Iop_InterleaveLO32x2: + case Iop_InterleaveOddLanes8x8: case Iop_InterleaveEvenLanes8x8: + case Iop_InterleaveOddLanes16x4: case Iop_InterleaveEvenLanes16x4: + case Iop_CatOddLanes8x8: case Iop_CatOddLanes16x4: + case Iop_CatEvenLanes8x8: case Iop_CatEvenLanes16x4: + case Iop_GetElem8x8: case Iop_GetElem16x4: case Iop_GetElem32x2: + case Iop_SetElem8x8: case Iop_SetElem16x4: case Iop_SetElem32x2: + case Iop_Dup8x8: case Iop_Dup16x4: case Iop_Dup32x2: + case Iop_Slice64: case Iop_Reverse8sIn16_x4: + case Iop_Reverse8sIn32_x2: case Iop_Reverse16sIn32_x2: + case Iop_Reverse8sIn64_x1: case Iop_Reverse16sIn64_x1: + case Iop_Reverse32sIn64_x1: case Iop_Perm8x8: case Iop_PermOrZero8x8: + case Iop_GetMSBs8x8: case Iop_RecipEst32Ux2: case Iop_RSqrtEst32Ux2: + case Iop_AddD64: case Iop_SubD64: case Iop_MulD64: case Iop_DivD64: + case Iop_AddD128: case Iop_SubD128: case Iop_MulD128: case Iop_DivD128: + case Iop_ShlD64: case Iop_ShrD64: + case Iop_ShlD128: case Iop_ShrD128: + case Iop_D32toD64: case Iop_D64toD128: case Iop_I32StoD128: + case Iop_I32UtoD128: case Iop_I64StoD128: case Iop_I64UtoD128: + case Iop_D64toD32: case Iop_D128toD64: case Iop_I32StoD64: + case Iop_I32UtoD64: case Iop_I64StoD64: case Iop_I64UtoD64: + case Iop_D64toI32S: case Iop_D64toI32U: case Iop_D64toI64S: + case Iop_D64toI64U: case Iop_D128toI32S: case Iop_D128toI32U: + case Iop_D128toI64S: case Iop_D128toI64U: case Iop_F32toD32: + case Iop_F32toD64: case Iop_F32toD128: case Iop_F64toD32: + case Iop_F64toD64: case Iop_F64toD128: case Iop_F128toD32: + case Iop_F128toD64: case Iop_F128toD128: case Iop_D32toF32: + case Iop_D32toF64: case Iop_D32toF128: case Iop_D64toF32: case Iop_D64toF64: + case Iop_D64toF128: case Iop_D128toF32: case Iop_D128toF64: + case Iop_D128toF128: case Iop_RoundD64toInt: case Iop_RoundD128toInt: + case Iop_CmpD64: case Iop_CmpD128: case Iop_CmpExpD64: + case Iop_CmpExpD128: case Iop_QuantizeD64: case Iop_QuantizeD128: + case Iop_SignificanceRoundD64: case Iop_SignificanceRoundD128: + case Iop_ExtractExpD64: case Iop_ExtractExpD128: case Iop_ExtractSigD64: + case Iop_ExtractSigD128: case Iop_InsertExpD64: case Iop_InsertExpD128: + case Iop_D64HLtoD128: case Iop_D128HItoD64: case Iop_D128LOtoD64: + case Iop_DPBtoBCD: case Iop_BCDtoDPB: case Iop_BCDAdd: case Iop_BCDSub: + case Iop_I128StoBCD128: case Iop_BCD128toI128S: case Iop_ReinterpI64asD64: + case Iop_ReinterpD64asI64: + case Iop_Add32Fx4: case Iop_Sub32Fx4: case Iop_Mul32Fx4: case Iop_Div32Fx4: + case Iop_Max32Fx4: case Iop_Min32Fx4: + case Iop_Add32Fx2: case Iop_Sub32Fx2: + case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4: + case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4: + case Iop_CmpGT32Fx4: case Iop_CmpGE32Fx4: + case Iop_PwMax32Fx4: case Iop_PwMin32Fx4: + case Iop_Abs32Fx4: case Iop_Neg32Fx4: case Iop_Sqrt32Fx4: + case Iop_RecipEst32Fx4: case Iop_RecipStep32Fx4: case Iop_RSqrtEst32Fx4: + case Iop_Scale2_32Fx4: case Iop_Log2_32Fx4: case Iop_Exp2_32Fx4: + case Iop_RSqrtStep32Fx4: + case Iop_I32UtoF32x4_DEP: case Iop_I32StoF32x4_DEP: case Iop_I32StoF32x4: + case Iop_F32toI32Sx4: case Iop_F32toI32Ux4_RZ: case Iop_F32toI32Sx4_RZ: + case Iop_QF32toI32Ux4_RZ: case Iop_QF32toI32Sx4_RZ: + case Iop_RoundF32x4_RM: case Iop_RoundF32x4_RP: + case Iop_RoundF32x4_RN: case Iop_RoundF32x4_RZ: + case Iop_F32ToFixed32Ux4_RZ: case Iop_F32ToFixed32Sx4_RZ: + case Iop_Fixed32UToF32x4_RN: case Iop_Fixed32SToF32x4_RN: + case Iop_F32toF16x4_DEP: case Iop_F32toF16x4: case Iop_F16toF32x4: + case Iop_F64toF16x2_DEP: case Iop_F16toF64x2: case Iop_F32x4_2toQ16x8: + case Iop_Add32F0x4: case Iop_Sub32F0x4: case Iop_Mul32F0x4: + case Iop_Div32F0x4: case Iop_Max32F0x4: case Iop_Min32F0x4: + case Iop_CmpEQ32F0x4: case Iop_CmpLT32F0x4: case Iop_CmpLE32F0x4: + case Iop_CmpUN32F0x4: + case Iop_RecipEst32F0x4: case Iop_Sqrt32F0x4: case Iop_RSqrtEst32F0x4: + case Iop_Add64Fx2: case Iop_Sub64Fx2: case Iop_Mul64Fx2: case Iop_Div64Fx2: + case Iop_Max64Fx2: case Iop_Min64Fx2: + case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2: case Iop_CmpLE64Fx2: + case Iop_CmpUN64Fx2: case Iop_Abs64Fx2: case Iop_Neg64Fx2: + case Iop_Sqrt64Fx2: case Iop_Scale2_64Fx2: case Iop_Log2_64Fx2: + case Iop_RecipEst64Fx2: case Iop_RecipStep64Fx2: case Iop_RSqrtEst64Fx2: + case Iop_RSqrtStep64Fx2: case Iop_F64x2_2toQ32x4: + case Iop_Add64F0x2: case Iop_Sub64F0x2: case Iop_Mul64F0x2: + case Iop_Div64F0x2: case Iop_Max64F0x2: case Iop_Min64F0x2: + case Iop_CmpEQ64F0x2: case Iop_CmpLT64F0x2: case Iop_CmpLE64F0x2: + case Iop_CmpUN64F0x2: case Iop_Sqrt64F0x2: case Iop_V128to64: + case Iop_V128HIto64: case Iop_64HLtoV128: case Iop_64UtoV128: + case Iop_SetV128lo64: case Iop_ZeroHI64ofV128: case Iop_ZeroHI96ofV128: + case Iop_ZeroHI112ofV128: case Iop_ZeroHI120ofV128: case Iop_32UtoV128: + case Iop_V128to32: case Iop_SetV128lo32: case Iop_NotV128: + case Iop_AndV128: case Iop_OrV128: case Iop_XorV128: + case Iop_ShlV128: case Iop_ShrV128: case Iop_SarV128: + case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8: case Iop_CmpNEZ32x4: + case Iop_CmpNEZ64x2: case Iop_CmpNEZ128x1: + case Iop_Add8x16: case Iop_Add16x8: case Iop_Add32x4: + case Iop_Add64x2: case Iop_Add128x1: + case Iop_QAdd8Ux16: case Iop_QAdd16Ux8: case Iop_QAdd32Ux4: + case Iop_QAdd64Ux2: + case Iop_QAdd8Sx16: case Iop_QAdd16Sx8: case Iop_QAdd32Sx4: + case Iop_QAdd64Sx2: + case Iop_QAddExtUSsatSS8x16: case Iop_QAddExtUSsatSS16x8: + case Iop_QAddExtUSsatSS32x4: case Iop_QAddExtUSsatSS64x2: + case Iop_QAddExtSUsatUU8x16: case Iop_QAddExtSUsatUU16x8: + case Iop_QAddExtSUsatUU32x4: case Iop_QAddExtSUsatUU64x2: + case Iop_Sub8x16: case Iop_Sub16x8: case Iop_Sub32x4: + case Iop_Sub64x2: case Iop_Sub128x1: + case Iop_QSub8Ux16: case Iop_QSub16Ux8: case Iop_QSub32Ux4: + case Iop_QSub64Ux2: + case Iop_QSub8Sx16: case Iop_QSub16Sx8: case Iop_QSub32Sx4: + case Iop_QSub64Sx2: + case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4: + case Iop_MulHi8Ux16: case Iop_MulHi16Ux8: case Iop_MulHi32Ux4: + case Iop_MulHi8Sx16: case Iop_MulHi16Sx8: case Iop_MulHi32Sx4: + case Iop_MullEven8Ux16: case Iop_MullEven16Ux8: case Iop_MullEven32Ux4: + case Iop_MullEven8Sx16: case Iop_MullEven16Sx8: case Iop_MullEven32Sx4: + case Iop_Mull8Ux8: case Iop_Mull8Sx8: + case Iop_Mull16Ux4: case Iop_Mull16Sx4: + case Iop_Mull32Ux2: case Iop_Mull32Sx2: + case Iop_QDMull16Sx4: case Iop_QDMull32Sx2: + case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4: + case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4: + case Iop_PolynomialMul8x16: case Iop_PolynomialMull8x8: + case Iop_PolynomialMulAdd8x16: case Iop_PolynomialMulAdd16x8: + case Iop_PolynomialMulAdd32x4: case Iop_PolynomialMulAdd64x2: + case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4: + case Iop_PwAdd32Fx2: case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8: + case Iop_PwAddL32Ux4: case Iop_PwAddL64Ux2: + case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4: + case Iop_PwExtUSMulQAdd8x16: + case Iop_PwBitMtxXpose64x2: + case Iop_Abs8x16: case Iop_Abs16x8: case Iop_Abs32x4: case Iop_Abs64x2: + case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4: case Iop_Avg64Ux2: + case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4: case Iop_Avg64Sx2: + case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4: case Iop_Max64Sx2: + case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4: case Iop_Max64Ux2: + case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4: case Iop_Min64Sx2: + case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4: case Iop_Min64Ux2: + case Iop_CmpEQ8x16: case Iop_CmpEQ16x8: case Iop_CmpEQ32x4: + case Iop_CmpEQ64x2: + case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4: + case Iop_CmpGT64Sx2: + case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4: + case Iop_CmpGT64Ux2: + case Iop_Cnt8x16: + case Iop_Clz8x16: case Iop_Clz16x8: case Iop_Clz32x4: + case Iop_Cls8x16: case Iop_Cls16x8: case Iop_Cls32x4: + case Iop_ShlN8x16: case Iop_ShlN16x8: case Iop_ShlN32x4: case Iop_ShlN64x2: + case Iop_ShrN8x16: case Iop_ShrN16x8: case Iop_ShrN32x4: case Iop_ShrN64x2: + case Iop_SarN8x16: case Iop_SarN16x8: case Iop_SarN32x4: case Iop_SarN64x2: + case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2: + case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2: + case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2: + case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2: + case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4: case Iop_Rol64x2: + case Iop_QShl8x16: case Iop_QShl16x8: case Iop_QShl32x4: case Iop_QShl64x2: + case Iop_QSal8x16: case Iop_QSal16x8: case Iop_QSal32x4: case Iop_QSal64x2: + case Iop_QShlNsatSU8x16: case Iop_QShlNsatSU16x8: + case Iop_QShlNsatSU32x4: case Iop_QShlNsatSU64x2: + case Iop_QShlNsatUU8x16: case Iop_QShlNsatUU16x8: + case Iop_QShlNsatUU32x4: case Iop_QShlNsatUU64x2: + case Iop_QShlNsatSS8x16: case Iop_QShlNsatSS16x8: + case Iop_QShlNsatSS32x4: case Iop_QShlNsatSS64x2: + case Iop_QandUQsh8x16: case Iop_QandUQsh16x8: + case Iop_QandUQsh32x4: case Iop_QandUQsh64x2: + case Iop_QandSQsh8x16: case Iop_QandSQsh16x8: + case Iop_QandSQsh32x4: case Iop_QandSQsh64x2: + case Iop_QandUQRsh8x16: case Iop_QandUQRsh16x8: + case Iop_QandUQRsh32x4: case Iop_QandUQRsh64x2: + case Iop_QandSQRsh8x16: case Iop_QandSQRsh16x8: + case Iop_QandSQRsh32x4: case Iop_QandSQRsh64x2: + case Iop_Sh8Sx16: case Iop_Sh16Sx8: case Iop_Sh32Sx4: case Iop_Sh64Sx2: + case Iop_Sh8Ux16: case Iop_Sh16Ux8: case Iop_Sh32Ux4: case Iop_Sh64Ux2: + case Iop_Rsh8Sx16: case Iop_Rsh16Sx8: case Iop_Rsh32Sx4: case Iop_Rsh64Sx2: + case Iop_Rsh8Ux16: case Iop_Rsh16Ux8: case Iop_Rsh32Ux4: case Iop_Rsh64Ux2: + case Iop_QandQShrNnarrow16Uto8Ux8: + case Iop_QandQShrNnarrow32Uto16Ux4: case Iop_QandQShrNnarrow64Uto32Ux2: + case Iop_QandQSarNnarrow16Sto8Sx8: + case Iop_QandQSarNnarrow32Sto16Sx4: case Iop_QandQSarNnarrow64Sto32Sx2: + case Iop_QandQSarNnarrow16Sto8Ux8: + case Iop_QandQSarNnarrow32Sto16Ux4: case Iop_QandQSarNnarrow64Sto32Ux2: + case Iop_QandQRShrNnarrow16Uto8Ux8: + case Iop_QandQRShrNnarrow32Uto16Ux4: case Iop_QandQRShrNnarrow64Uto32Ux2: + case Iop_QandQRSarNnarrow16Sto8Sx8: + case Iop_QandQRSarNnarrow32Sto16Sx4: case Iop_QandQRSarNnarrow64Sto32Sx2: + case Iop_QandQRSarNnarrow16Sto8Ux8: + case Iop_QandQRSarNnarrow32Sto16Ux4: case Iop_QandQRSarNnarrow64Sto32Ux2: + case Iop_QNarrowBin16Sto8Ux16: case Iop_QNarrowBin32Sto16Ux8: + case Iop_QNarrowBin16Sto8Sx16: case Iop_QNarrowBin32Sto16Sx8: + case Iop_QNarrowBin16Uto8Ux16: case Iop_QNarrowBin32Uto16Ux8: + case Iop_NarrowBin16to8x16: case Iop_NarrowBin32to16x8: + case Iop_QNarrowBin64Sto32Sx4: case Iop_QNarrowBin64Uto32Ux4: + case Iop_NarrowBin64to32x4: + case Iop_NarrowUn16to8x8: case Iop_NarrowUn32to16x4: + case Iop_NarrowUn64to32x2: + case Iop_QNarrowUn16Sto8Sx8: case Iop_QNarrowUn32Sto16Sx4: + case Iop_QNarrowUn64Sto32Sx2: + case Iop_QNarrowUn16Sto8Ux8: case Iop_QNarrowUn32Sto16Ux4: + case Iop_QNarrowUn64Sto32Ux2: + case Iop_QNarrowUn16Uto8Ux8: case Iop_QNarrowUn32Uto16Ux4: + case Iop_QNarrowUn64Uto32Ux2: + case Iop_Widen8Uto16x8: case Iop_Widen16Uto32x4: case Iop_Widen32Uto64x2: + case Iop_Widen8Sto16x8: case Iop_Widen16Sto32x4: case Iop_Widen32Sto64x2: + case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8: + case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2: + case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8: + case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2: + case Iop_InterleaveOddLanes8x16: case Iop_InterleaveEvenLanes8x16: + case Iop_InterleaveOddLanes16x8: case Iop_InterleaveEvenLanes16x8: + case Iop_InterleaveOddLanes32x4: case Iop_InterleaveEvenLanes32x4: + case Iop_PackOddLanes8x16: case Iop_PackEvenLanes8x16: + case Iop_PackOddLanes16x8: case Iop_PackEvenLanes16x8: + case Iop_PackOddLanes32x4: case Iop_PackEvenLanes32x4: + case Iop_CatOddLanes8x16: case Iop_CatOddLanes16x8: case Iop_CatOddLanes32x4: + case Iop_CatEvenLanes8x16: case Iop_CatEvenLanes16x8: + case Iop_CatEvenLanes32x4: + case Iop_GetElem8x16: case Iop_GetElem16x8: case Iop_GetElem32x4: + case Iop_GetElem64x2: + case Iop_SetElem8x16: case Iop_SetElem16x8: case Iop_SetElem32x4: + case Iop_SetElem64x2: + case Iop_Dup8x16: case Iop_Dup16x8: case Iop_Dup32x4: + case Iop_SliceV128: case Iop_Reverse8sIn16_x8: + case Iop_Reverse8sIn32_x4: case Iop_Reverse16sIn32_x4: + case Iop_Reverse8sIn64_x2: case Iop_Reverse16sIn64_x2: + case Iop_Reverse32sIn64_x2: case Iop_Reverse1sIn8_x16: case Iop_Perm8x16: + case Iop_Perm32x4: case Iop_PermOrZero8x16: case Iop_Perm8x16x2: + case Iop_GetMSBs8x16: case Iop_RecipEst32Ux4: case Iop_RSqrtEst32Ux4: + case Iop_MulI128by10: case Iop_MulI128by10Carry: case Iop_MulI128by10E: + case Iop_MulI128by10ECarry: case Iop_V256to64_0: case Iop_V256to64_1: + case Iop_V256to64_2: case Iop_V256to64_3: case Iop_64x4toV256: + case Iop_V256toV128_0: case Iop_V256toV128_1: case Iop_V128HLtoV256: + case Iop_AndV256: case Iop_OrV256: case Iop_XorV256: + case Iop_NotV256: + case Iop_CmpNEZ8x32: case Iop_CmpNEZ16x16: case Iop_CmpNEZ32x8: + case Iop_CmpNEZ64x4: + case Iop_Add8x32: case Iop_Add16x16: case Iop_Add32x8: case Iop_Add64x4: + case Iop_Sub8x32: case Iop_Sub16x16: case Iop_Sub32x8: case Iop_Sub64x4: + case Iop_CmpEQ8x32: case Iop_CmpEQ16x16: case Iop_CmpEQ32x8: + case Iop_CmpEQ64x4: + case Iop_CmpGT8Sx32: case Iop_CmpGT16Sx16: case Iop_CmpGT32Sx8: + case Iop_CmpGT64Sx4: + case Iop_ShlN16x16: case Iop_ShlN32x8: case Iop_ShlN64x4: + case Iop_ShrN16x16: case Iop_ShrN32x8: case Iop_ShrN64x4: + case Iop_SarN16x16: case Iop_SarN32x8: + case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8: + case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8: + case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8: + case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8: + case Iop_Mul16x16: case Iop_Mul32x8: + case Iop_MulHi16Ux16: case Iop_MulHi16Sx16: + case Iop_QAdd8Ux32: case Iop_QAdd16Ux16: + case Iop_QAdd8Sx32: case Iop_QAdd16Sx16: + case Iop_QSub8Ux32: case Iop_QSub16Ux16: + case Iop_QSub8Sx32: case Iop_QSub16Sx16: + case Iop_Avg8Ux32: case Iop_Avg16Ux16: + case Iop_Perm32x8: + case Iop_CipherV128: case Iop_CipherLV128: case Iop_CipherSV128: + case Iop_NCipherV128: case Iop_NCipherLV128: + case Iop_SHA512: case Iop_SHA256: + case Iop_Add64Fx4: case Iop_Sub64Fx4: case Iop_Mul64Fx4: case Iop_Div64Fx4: + case Iop_Add32Fx8: case Iop_Sub32Fx8: case Iop_Mul32Fx8: case Iop_Div32Fx8: + case Iop_I32StoF32x8: case Iop_F32toI32Sx8: case Iop_F32toF16x8: + case Iop_F16toF32x8: case Iop_Sqrt32Fx8: case Iop_Sqrt64Fx4: + case Iop_RSqrtEst32Fx8: case Iop_RecipEst32Fx8: + case Iop_Max32Fx8: case Iop_Min32Fx8: + case Iop_Max64Fx4: case Iop_Min64Fx4: + case Iop_Rotx32: case Iop_Rotx64: + return False; + + default: + vpanic("primopMightTrap"); + + } +} + void ppIRExpr ( const IRExpr* e ) { Int i; diff --git a/VEX/pub/libvex_ir.h b/VEX/pub/libvex_ir.h index 087a414..9120a49 100644 --- a/VEX/pub/libvex_ir.h +++ b/VEX/pub/libvex_ir.h @@ -2013,6 +2013,11 @@ extern void typeOfPrimop ( IROp op, /*OUTs*/ IRType* t_dst, IRType* t_arg1, IRType* t_arg2, IRType* t_arg3, IRType* t_arg4 ); +/* Might the given primop trap (eg, attempt integer division by zero)? If in + doubt returns True. However, the vast majority of primops will never + trap. */ +extern Bool primopMightTrap ( IROp op ); + /* Encoding of IEEE754-specified rounding modes. Note, various front and back ends rely on the actual numerical values of these, so do not change them. */ |
|
From: Mark W. <ma...@kl...> - 2019-11-09 23:12:42
|
Debugging Tools developer room at FOSDEM 2020 (Brussels, Belgium, February 2). Talk/Discussion Submission deadline: Sunday 1 Dec 2019 Devroom Schedule announcement: Sunday 15 Dec 2019 Devroom day: Sunday 2 Feb 2020 FOSDEM is a free software event that offers open source communities a place to meet, share ideas and collaborate. It is renown for being highly developer-oriented and brings together 8000+ hackers from all over the world. It is held in the city of Brussels (Belgium). https://fosdem.org/ FOSDEM 2020 will take place during the weekend of Saturday, February 1 and Sunday February 2 2020. On Sunday we will have a devroom for Debugging Tools, jointly organized by the Valgrind, GDB and strace projects. Devrooms are a place for development teams to meet, discuss, hack and publicly present the project's latest improvements and future directions. We will have a whole day to hang out together as community embracing debugging tools (valgrind, gdb, strace, etc.), executable and debugging formats (ELF and DWARF) and debugging interfaces (ptrace, proc, bpf, seccomp, etc.) Please join us, regardless of whether you are a core hacker, a plugin hacker, a user, a packager or a hacker on a project that integrates, extends or complements debugging tools. ** Call for Participation We would like to organize a series of talks/discussions on various topics relevant to both core hackers, new developers, users, packagers and cross project functionality. Please do submit a talk proposal by Sunday December 1st 2020, so we can make a list of activities during the day. Some possible topics for talks/discussions are: - Recently added functional changes. - Prototypes of new functionality in existing tools. - Discuss release/bugfixing strategy/policy. - Connecting debugging tools together. - Latest DWARF extensions, going from binary back to source. - Alternative symbol tables and unwinding data structures (ctf, btf, orc) - Multi, multi, multi... threads, processes and targets. - Debugging anything, everywhere. Dealing with complex systems. - Dealing with the dynamic loader and the kernel. - Intercepting and interposing functions and events. - Adding GDB features, such as designing GDB python scripts for your data structures. - Advances in gdbserver and the GDB remote serial protocol. - Adding Valgrind features (adding syscalls for a platform or VEX instructions for an architecture port). - Infrastructure changes to the Valgrind JIT framework. - Use of new linux kernel interfaces (ptrace, proc, BPF). - Your interesting use case with a debugging tool. ** How to Submit Please use the FOSDEM 'pentabarf' tool to submit your proposal: https://penta.fosdem.org/submission/FOSDEM20 - If necessary, create a Pentabarf account and activate it. Please reuse your account from previous years if you have already created it. - In the "Person" section, provide First name, Last name (in the "General" tab), Email (in the "Contact" tab) and Bio ("Abstract" field in the "Description" tab). - Submit a proposal by clicking on "Create event". - Important! Select the "Debugging Tools devroom" track (on the "General" tab). - Provide the title of your talk ("Event title" in the "General" tab). - Provide a description of the subject of the talk and the intended audience (in the "Abstract" field of the "Description" tab) - Provide a rough outline of the talk or goals of the session (a short list of bullet points covering topics that will be discussed) in the "Full description" field in the "Description" tab ** Recording of Talks As usually the FOSDEM organisers plan to have live streaming and recording fully working, both for remote/later viewing of talks, and so that people can watch streams in the hallways when rooms are full. This obviously requires speakers to consent to being recorded and streamed. If you plan to be a speaker, please understand that by doing so you implicitly give consent for your talk to be recorded and streamed. The recordings will be published under the same licence as all FOSDEM content (CC-BY). ** Code of Conduct In order to keep FOSDEM a fun, interesting and positive experience for everybody, we expect participants to follow our guidelines: https://fosdem.org/2020/practical/conduct/ ** Important dates Talk/Discussion Submission deadline: Sunday 1 Dec 2019 Devroom Schedule announcement: Sunday 15 Dec 2019 Devroom day: Sunday 2 Feb 2020 Hope to see you all at FOSDEM 2020 in the joint Debugging Tools devroom. Brussels (Belgium), Sunday February 2 2020. |
|
From: Tiaan W. <tia...@gm...> - 2019-11-07 08:29:21
|
I was wondering whether it would not be better to report the 'total heap usage' as 'total heap grind' or the like as novices may very well be sent down a wild goose chase interpreting it as the max heap usage at some point during the execution of the program. |
|
From: Petar J. <pe...@so...> - 2019-11-06 17:04:21
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=8f6e97cf6544c5c83945caf01397ac265f6f055a commit 8f6e97cf6544c5c83945caf01397ac265f6f055a Author: Petar Jovanovic <mip...@gm...> Date: Wed Nov 6 16:55:11 2019 +0000 mips: fix configure issue with specific paths If configure is invoked with e.g. CFLAGS='--sysroot=/workspace/linux-mips64/sysroot -mabi=64' flags FLAG_M32 and FLAG_M64 are not set, because the grep search in configure.ac mismatches the mips keyword in the path. Update the grep patterns to anchor on non-word boundaries. This fixes KDE #412344. Patch by Chris Packham. Diff: --- NEWS | 1 + configure.ac | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/NEWS b/NEWS index e53bc62..0de69ee 100644 --- a/NEWS +++ b/NEWS @@ -82,6 +82,7 @@ where XXXXXX is the bug number as listed below. 409367 exit_group() after signal to thread waiting in futex() causes hangs 410599 Non-deterministic behaviour of pth_self_kill_15_other test 411134 Allow the user to change a set of command line options during execution +412344 Problem setting mips flags with specific paths 413603 callgrind_annotate/cg_annotate truncate function names at '#' n-i-bz Fix minor one time leaks in dhat. diff --git a/configure.ac b/configure.ac index 29b88f7..ca9961a 100755 --- a/configure.ac +++ b/configure.ac @@ -1772,7 +1772,7 @@ AM_CONDITIONAL(HAVE_NR_MEMBARRIER, [test x$ac_have_nr_membarrier = xyes]) case "${host_cpu}" in mips*) - ARCH=$(echo "$CFLAGS" | grep -E -e '-march=@<:@^ @:>@+' -e '-mips@<:@^ +@:>@') + ARCH=$(echo "$CFLAGS" | grep -E -e '-march=@<:@^ @:>@+' -e '\B-mips@<:@^ +@:>@') if test -z "$ARCH"; then # does this compiler support -march=mips32 (mips32 default) ? AC_MSG_CHECKING([if gcc accepts -march=mips32 -mabi=32]) @@ -1857,7 +1857,7 @@ case "${host_cpu}" in esac -ARCH=$(echo "$CFLAGS" | grep -E -e '-march=@<:@^ @:>@+' -e '-mips@<:@^ +@:>@') +ARCH=$(echo "$CFLAGS" | grep -E -e '-march=@<:@^ @:>@+' -e '\B-mips@<:@^ +@:>@') if test -z "$ARCH"; then # does this compiler support -march=octeon (Cavium OCTEON I Specific) ? AC_MSG_CHECKING([if gcc accepts -march=octeon]) |
|
From: Philippe W. <phi...@so...> - 2019-11-03 17:02:43
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=aaf64922a727cf9cd06adeedaede112b35e7ab09 commit aaf64922a727cf9cd06adeedaede112b35e7ab09 Author: Philippe Waroquiers <phi...@sk...> Date: Sun Nov 3 17:45:27 2019 +0100 Announce in NEWS the fix for 413603 - callgrind_annotate/cg_annotate truncate function names at '#' Diff: --- NEWS | 1 + 1 file changed, 1 insertion(+) diff --git a/NEWS b/NEWS index a2422e8..e53bc62 100644 --- a/NEWS +++ b/NEWS @@ -82,6 +82,7 @@ where XXXXXX is the bug number as listed below. 409367 exit_group() after signal to thread waiting in futex() causes hangs 410599 Non-deterministic behaviour of pth_self_kill_15_other test 411134 Allow the user to change a set of command line options during execution +413603 callgrind_annotate/cg_annotate truncate function names at '#' n-i-bz Fix minor one time leaks in dhat. n-i-bz Add --run-cxx-freeres=no in outer args to avoid inner crashes. |
|
From: Philippe W. <phi...@so...> - 2019-11-03 17:02:42
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=7f63a884264f48baea87f8be480475eced857fd5 commit 7f63a884264f48baea87f8be480475eced857fd5 Author: Andreas Arnez <ar...@li...> Date: Wed Oct 23 20:35:50 2019 +0200 callgrind_annotate, cg_annotate: don't truncate function names at '#' C++ function names can contain substrings like "{lambda()#1}". But callgrind_annotate and cg_annotate interpret the '#'-character as a comment marker anywhere on each input line, and thus truncate such names there. On the other hand, the documentation in docs/cl-format.xml, states: Everywhere, comments on own lines starting with '#' are allowed. This seems to imply that a comment line must start with '#' in the first column. Thus skip exactly such lines in the input file and don't handle '#' as a comment marker anywhere else. Signed-off-by: Philippe Waroquiers <phi...@sk...> Diff: --- cachegrind/cg_annotate.in | 7 +++---- callgrind/callgrind_annotate.in | 13 +++++-------- 2 files changed, 8 insertions(+), 12 deletions(-) diff --git a/cachegrind/cg_annotate.in b/cachegrind/cg_annotate.in index bcb9893..1daa15d 100644 --- a/cachegrind/cg_annotate.in +++ b/cachegrind/cg_annotate.in @@ -398,7 +398,9 @@ sub read_input_file() # Read body of input file. while (<INPUTFILE>) { - s/#.*$//; # remove comments + # Skip comments and empty lines. + next if /^\s*$/ || /^\#/; + if (s/^(-?\d+)\s+//) { my $lineNum = $1; my $CC = line_to_CC($_); @@ -436,9 +438,6 @@ sub read_input_file() # Assume that a "fn=" line is followed by a "fl=" line. $currFileFuncName = undef; - } elsif (s/^\s*$//) { - # blank, do nothing - } elsif (s/^summary:\s+//) { $summary_CC = line_to_CC($_); (scalar(@$summary_CC) == @events) diff --git a/callgrind/callgrind_annotate.in b/callgrind/callgrind_annotate.in index e18ed4e..8854aee 100644 --- a/callgrind/callgrind_annotate.in +++ b/callgrind/callgrind_annotate.in @@ -420,10 +420,8 @@ sub read_input_file() # Read header while(<INPUTFILE>) { - # remove comments - s/#.*$//; - - if (/^$/) { ; } + # Skip comments and empty lines. + if (/^\s*$/ || /^\#/) { ; } elsif (/^version:\s*(\d+)/) { # Can't read format with major version > 1 @@ -540,9 +538,11 @@ sub read_input_file() # Read body of input file. while (<INPUTFILE>) { + # Skip comments and empty lines. + next if /^\s*$/ || /^\#/; + $prev_line_num = $curr_line_num; - s/#.*$//; # remove comments s/^\+(\d+)/$prev_line_num+$1/e; s/^\-(\d+)/$prev_line_num-$1/e; s/^\*/$prev_line_num/e; @@ -646,9 +646,6 @@ sub read_input_file() $curr_fn_CC = $fn_totals{$curr_name}; $curr_fn_CC = [] unless (defined $curr_fn_CC); - } elsif (s/^\s*$//) { - # blank, do nothing - } elsif (s/^cob=(.*)$//) { $curr_cobj = uncompressed_name("ob",$1); |
|
From: Philippe W. <phi...@so...> - 2019-11-03 16:13:03
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=46cdf576a050c7d40994f2b266c06678f1ac4bee commit 46cdf576a050c7d40994f2b266c06678f1ac4bee Author: Philippe Waroquiers <phi...@sk...> Date: Sun Nov 3 17:09:54 2019 +0100 Have callgrind producing event: lines before events: line. callgrind_annotate expects the 'events:' line to be the last line of the header of a Part. When event: lines are after the events: line, these event: lines are handled by the calllgrind_annotate body line logic, that does not recognises them and generates warnings such as: WARNING: line 18 malformed, ignoring line: 'event: sysTime : sysTime (elapsed ns)' WARNING: line 19 malformed, ignoring line: 'event: sysCpuTime : sysCpuTime (system cpu ns)' So, output event: lines before events: line. Diff: --- callgrind/dump.c | 37 +++++++++++++++++++++---------------- 1 file changed, 21 insertions(+), 16 deletions(-) diff --git a/callgrind/dump.c b/callgrind/dump.c index f95bdb5..368a740 100644 --- a/callgrind/dump.c +++ b/callgrind/dump.c @@ -1301,25 +1301,30 @@ static VgFile *new_dumpfile(int tid, const HChar* trigger) CLG_(clo).dump_bb ? " bb" : "", CLG_(clo).dump_line ? " line" : ""); - /* "events:" line */ + /* Some (optional) "event:" lines, giving long names to events. */ + switch (CLG_(clo).collect_systime) { + case systime_no: break; + case systime_msec: + VG_(fprintf)(fp, "event: sysTime : sysTime (elapsed ms)\n"); + break; + case systime_usec: + VG_(fprintf)(fp, "event: sysTime : sysTime (elapsed us)\n"); + break; + case systime_nsec: + VG_(fprintf)(fp, "event: sysTime : sysTime (elapsed ns)\n"); + VG_(fprintf)(fp, "event: sysCpuTime : sysCpuTime (system cpu ns)\n"); + break; + default: + tl_assert(0); + } + + /* "events:" line + Note: callgrind_annotate expects the "events:" line to be the last line + of the PartData. In other words, this line is before the first line + of the PartData body. */ HChar *evmap = CLG_(eventmapping_as_string)(CLG_(dumpmap)); VG_(fprintf)(fp, "events: %s\n", evmap); VG_(free)(evmap); - switch (CLG_(clo).collect_systime) { - case systime_no: break; - case systime_msec: - VG_(fprintf)(fp, "event: sysTime : sysTime (elapsed ms)\n"); - break; - case systime_usec: - VG_(fprintf)(fp, "event: sysTime : sysTime (elapsed us)\n"); - break; - case systime_nsec: - VG_(fprintf)(fp, "event: sysTime : sysTime (elapsed ns)\n"); - VG_(fprintf)(fp, "event: sysCpuTime : sysCpuTime (system cpu ns)\n"); - break; - default: - tl_assert(0); - } /* summary lines */ sum = CLG_(get_eventset_cost)( CLG_(sets).full ); |