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Author: iraisr
Date: Mon May 8 18:21:59 2017
New Revision: 16340
Log:
Remove TileGX/Linux port.
Fixes BZ#379504.
Removed:
trunk/coregrind/m_dispatch/dispatch-tilegx-linux.S
trunk/coregrind/m_gdbserver/valgrind-low-tilegx.c
trunk/coregrind/m_sigframe/sigframe-tilegx-linux.c
trunk/coregrind/m_syswrap/syscall-tilegx-linux.S
trunk/coregrind/m_syswrap/syswrap-tilegx-linux.c
trunk/include/vki/vki-posixtypes-tilegx-linux.h
trunk/include/vki/vki-scnums-tilegx-linux.h
trunk/include/vki/vki-tilegx-linux.h
trunk/memcheck/tests/origin5-bz2.stderr.exp-glibc212-tilegx
trunk/memcheck/tests/origin6-fp.stderr.exp-glibc212-tilegx
trunk/none/tests/tilegx/
Modified:
trunk/Makefile.all.am
trunk/Makefile.tool.am
trunk/Makefile.vex.am
trunk/NEWS
trunk/cachegrind/cg_arch.c
trunk/cachegrind/cg_branchpred.c
trunk/configure.ac
trunk/coregrind/Makefile.am
trunk/coregrind/launcher-linux.c
trunk/coregrind/m_aspacemgr/aspacemgr-common.c
trunk/coregrind/m_cache.c
trunk/coregrind/m_coredump/coredump-elf.c
trunk/coregrind/m_debuginfo/d3basics.c
trunk/coregrind/m_debuginfo/debuginfo.c
trunk/coregrind/m_debuginfo/priv_storage.h
trunk/coregrind/m_debuginfo/readdwarf.c
trunk/coregrind/m_debuginfo/readelf.c
trunk/coregrind/m_debuginfo/storage.c
trunk/coregrind/m_debuglog.c
trunk/coregrind/m_gdbserver/target.c
trunk/coregrind/m_gdbserver/valgrind_low.h
trunk/coregrind/m_initimg/initimg-linux.c
trunk/coregrind/m_libcassert.c
trunk/coregrind/m_libcfile.c
trunk/coregrind/m_libcproc.c
trunk/coregrind/m_machine.c
trunk/coregrind/m_main.c
trunk/coregrind/m_options.c
trunk/coregrind/m_redir.c
trunk/coregrind/m_scheduler/scheduler.c
trunk/coregrind/m_signals.c
trunk/coregrind/m_stacktrace.c
trunk/coregrind/m_syscall.c
trunk/coregrind/m_syswrap/priv_syswrap-linux.h
trunk/coregrind/m_syswrap/priv_types_n_macros.h
trunk/coregrind/m_syswrap/syswrap-linux.c
trunk/coregrind/m_syswrap/syswrap-main.c
trunk/coregrind/m_trampoline.S
trunk/coregrind/m_translate.c
trunk/coregrind/pub_core_aspacemgr.h
trunk/coregrind/pub_core_basics.h
trunk/coregrind/pub_core_debuginfo.h
trunk/coregrind/pub_core_machine.h
trunk/coregrind/pub_core_mallocfree.h
trunk/coregrind/pub_core_syscall.h
trunk/coregrind/pub_core_trampoline.h
trunk/coregrind/pub_core_transtab_asm.h
trunk/coregrind/vgdb-invoker-ptrace.c
trunk/docs/internals/3_12_BUGSTATUS.txt
trunk/docs/internals/register-uses.txt
trunk/drd/drd_bitmap.h
trunk/drd/drd_clientreq.c
trunk/drd/drd_load_store.c
trunk/exp-sgcheck/pc_main.c
trunk/exp-sgcheck/tests/is_arch_supported
trunk/gdbserver_tests/mcblocklistsearch.vgtest
trunk/gdbserver_tests/nlcontrolc.vgtest
trunk/gdbserver_tests/nlgone_return.vgtest
trunk/helgrind/tests/annotate_hbefore.c
trunk/helgrind/tests/tc07_hbl1.c
trunk/helgrind/tests/tc08_hbl2.c
trunk/helgrind/tests/tc11_XCHG.c
trunk/include/pub_tool_basics.h
trunk/include/pub_tool_guest.h
trunk/include/pub_tool_machine.h
trunk/include/pub_tool_vkiscnums_asm.h
trunk/include/valgrind.h
trunk/include/vki/vki-linux.h
trunk/memcheck/mc_machine.c
trunk/memcheck/tests/Makefile.am
trunk/memcheck/tests/atomic_incs.c
trunk/memcheck/tests/leak-segv-jmp.c
trunk/memcheck/tests/leak-segv-jmp.stderr.exp
trunk/memcheck/tests/vbit-test/irops.c
trunk/memcheck/tests/vbit-test/vtest.h
trunk/none/tests/Makefile.am
trunk/none/tests/allexec_prepare_prereq
trunk/none/tests/bug234814.vgtest
trunk/none/tests/libvex_test.c
trunk/perf/bigcode.c
trunk/tests/arch_test.c
Modified: trunk/Makefile.all.am
==============================================================================
--- trunk/Makefile.all.am (original)
+++ trunk/Makefile.all.am Mon May 8 18:21:59 2017
@@ -239,9 +239,6 @@
$(AM_CFLAGS_PSO_BASE)
AM_CCASFLAGS_MIPS64_LINUX = @FLAG_M64@ -g @FLAG_MIPS64@
-AM_CFLAGS_TILEGX_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE)
-AM_CFLAGS_PSO_TILEGX_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) $(AM_CFLAGS_PSO_BASE)
-
AM_FLAG_M3264_X86_SOLARIS = @FLAG_M32@
AM_CFLAGS_X86_SOLARIS = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \
$(AM_CFLAGS_BASE) -fomit-frame-pointer \
@@ -299,7 +296,6 @@
PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
-PRELOAD_LDFLAGS_TILEGX_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@
PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@
Modified: trunk/Makefile.tool.am
==============================================================================
--- trunk/Makefile.tool.am (original)
+++ trunk/Makefile.tool.am Mon May 8 18:21:59 2017
@@ -79,9 +79,6 @@
-static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \
@FLAG_M64@
-TOOL_LDFLAGS_TILEGX_LINUX = \
- $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M64@
-
TOOL_LDFLAGS_X86_SOLARIS = \
$(TOOL_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@
@@ -144,9 +141,6 @@
LIBREPLACEMALLOC_MIPS64_LINUX = \
$(top_builddir)/coregrind/libreplacemalloc_toolpreload-mips64-linux.a
-LIBREPLACEMALLOC_TILEGX_LINUX = \
- $(top_builddir)/coregrind/libreplacemalloc_toolpreload-tilegx-linux.a
-
LIBREPLACEMALLOC_X86_SOLARIS = \
$(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-solaris.a
@@ -209,11 +203,6 @@
$(LIBREPLACEMALLOC_MIPS64_LINUX) \
-Wl,--no-whole-archive
-LIBREPLACEMALLOC_LDFLAGS_TILEGX_LINUX = \
- -Wl,--whole-archive \
- $(LIBREPLACEMALLOC_TILEGX_LINUX) \
- -Wl,--no-whole-archive
-
LIBREPLACEMALLOC_LDFLAGS_X86_SOLARIS = \
-Wl,--whole-archive \
$(LIBREPLACEMALLOC_X86_SOLARIS) \
Modified: trunk/Makefile.vex.am
==============================================================================
--- trunk/Makefile.vex.am (original)
+++ trunk/Makefile.vex.am Mon May 8 18:21:59 2017
@@ -26,7 +26,6 @@
pub/libvex_guest_s390x.h \
pub/libvex_guest_mips32.h \
pub/libvex_guest_mips64.h \
- pub/libvex_guest_tilegx.h \
pub/libvex_s390x_common.h \
pub/libvex_ir.h \
pub/libvex_trc_values.h
@@ -45,7 +44,6 @@
priv/guest_arm64_defs.h \
priv/guest_s390_defs.h \
priv/guest_mips_defs.h \
- priv/guest_tilegx_defs.h \
priv/host_generic_regs.h \
priv/host_generic_simd64.h \
priv/host_generic_simd128.h \
@@ -57,11 +55,9 @@
priv/host_arm_defs.h \
priv/host_arm64_defs.h \
priv/host_s390_defs.h \
- priv/host_tilegx_defs.h \
priv/s390_disasm.h \
priv/s390_defs.h \
- priv/host_mips_defs.h \
- priv/tilegx_disasm.h
+ priv/host_mips_defs.h
BUILT_SOURCES = pub/libvex_guest_offsets.h
CLEANFILES = pub/libvex_guest_offsets.h
@@ -86,8 +82,7 @@
pub/libvex_guest_arm64.h \
pub/libvex_guest_s390x.h \
pub/libvex_guest_mips32.h \
- pub/libvex_guest_mips64.h \
- pub/libvex_guest_tilegx.h
+ pub/libvex_guest_mips64.h
rm -f auxprogs/genoffsets.s
$(mkdir_p) auxprogs pub
$(CC) $(CFLAGS_FOR_GENOFFSETS) \
@@ -142,8 +137,6 @@
priv/guest_s390_toIR.c \
priv/guest_mips_helpers.c \
priv/guest_mips_toIR.c \
- priv/guest_tilegx_helpers.c \
- priv/guest_tilegx_toIR.c \
priv/host_generic_regs.c \
priv/host_generic_simd64.c \
priv/host_generic_simd128.c \
@@ -164,10 +157,7 @@
priv/host_s390_isel.c \
priv/s390_disasm.c \
priv/host_mips_defs.c \
- priv/host_mips_isel.c \
- priv/host_tilegx_defs.c \
- priv/host_tilegx_isel.c \
- priv/tilegx_disasm.c
+ priv/host_mips_isel.c
LIBVEXMULTIARCH_SOURCES = priv/multiarch_main_main.c
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Mon May 8 18:21:59 2017
@@ -10,7 +10,7 @@
MIPS32/Linux, MIPS64/Linux, ARM/Android, ARM64/Android,
MIPS32/Android, X86/Android, X86/Solaris, AMD64/Solaris, X86/MacOSX
10.10 and AMD64/MacOSX 10.10. There is also preliminary support for
-X86/MacOSX 10.11/12, AMD64/MacOSX 10.11/12 and TILEGX/Linux.
+X86/MacOSX 10.11/12, and AMD64/MacOSX 10.11/12.
* The 'xtree concept' was added in 3.13:
An xtree is a tree of stacktraces with data associated to the stacktraces.
@@ -36,6 +36,8 @@
is handled like CLONE_VFORK (so removing CLONE_VM flag).
Applications that depends on CLONE_VM exact semantic will (still) not work.
+ - TileGX/Linux port was removed because the platform is essientially dead.
+
* ==================== TOOL CHANGES ====================
* Memcheck:
@@ -169,6 +171,7 @@
(task_register_dyld_shared_cache_image_info)
379390 unhandled syscall: mach:70 (host_create_mach_voucher_trap)
379473 MIPS: add support for rdhwr cycle counter register
+379504 remove TileGX/Linux port
Release 3.12.0 (20 October 2016)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Modified: trunk/cachegrind/cg_arch.c
==============================================================================
--- trunk/cachegrind/cg_arch.c (original)
+++ trunk/cachegrind/cg_arch.c Mon May 8 18:21:59 2017
@@ -477,13 +477,6 @@
*D1c = (cache_t) { 65536, 2, 64 };
*LLc = (cache_t) { 262144, 8, 64 };
-#elif defined(VGA_tilegx)
-
- // Set caches to default for Tilegx.
- *I1c = (cache_t) { 0x8000, 2, 64 };
- *D1c = (cache_t) { 0x8000, 2, 64 };
- *LLc = (cache_t) { 0x40000, 8, 64 };
-
#else
#error "Unknown arch"
Modified: trunk/cachegrind/cg_branchpred.c
==============================================================================
--- trunk/cachegrind/cg_branchpred.c (original)
+++ trunk/cachegrind/cg_branchpred.c Mon May 8 18:21:59 2017
@@ -51,8 +51,6 @@
# define N_IADDR_LO_ZERO_BITS 0
#elif defined(VGA_s390x) || defined(VGA_arm)
# define N_IADDR_LO_ZERO_BITS 1
-#elif defined(VGA_tilegx)
-# define N_IADDR_LO_ZERO_BITS 3
#else
# error "Unsupported architecture"
#endif
Modified: trunk/configure.ac
==============================================================================
--- trunk/configure.ac (original)
+++ trunk/configure.ac Mon May 8 18:21:59 2017
@@ -269,11 +269,6 @@
ARCH_MAX="mips64"
;;
- tilegx)
- AC_MSG_RESULT([ok (${host_cpu})])
- ARCH_MAX="tilegx"
- ;;
-
*)
AC_MSG_RESULT([no (${host_cpu})])
AC_MSG_ERROR([Unsupported host architecture. Sorry])
@@ -722,17 +717,6 @@
valt_load_address_sec_inner="0xUNSET"
AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})])
;;
- tilegx-linux)
- VGCONF_ARCH_PRI="tilegx"
- VGCONF_ARCH_SEC=""
- VGCONF_PLATFORM_PRI_CAPS="TILEGX_LINUX"
- VGCONF_PLATFORM_SEC_CAPS=""
- valt_load_address_pri_norml="0x38000000"
- valt_load_address_pri_inner="0x28000000"
- valt_load_address_sec_norml="0xUNSET"
- valt_load_address_sec_inner="0xUNSET"
- AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})])
- ;;
x86-solaris)
VGCONF_ARCH_PRI="x86"
VGCONF_ARCH_SEC=""
@@ -819,8 +803,6 @@
test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX )
AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_MIPS64,
test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX )
-AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_TILEGX,
- test x$VGCONF_PLATFORM_PRI_CAPS = xTILEGX_LINUX )
# Set up VGCONF_PLATFORMS_INCLUDE_<platform>. Either one or two of these
# become defined.
@@ -848,8 +830,6 @@
test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX)
AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_MIPS64_LINUX,
test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX)
-AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_TILEGX_LINUX,
- test x$VGCONF_PLATFORM_PRI_CAPS = xTILEGX_LINUX)
AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_X86_DARWIN,
test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \
-o x$VGCONF_PLATFORM_SEC_CAPS = xX86_DARWIN)
@@ -875,8 +855,7 @@
-o x$VGCONF_PLATFORM_PRI_CAPS = xARM64_LINUX \
-o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX \
-o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX \
- -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX \
- -o x$VGCONF_PLATFORM_PRI_CAPS = xTILEGX_LINUX)
+ -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX)
AM_CONDITIONAL(VGCONF_OS_IS_DARWIN,
test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \
-o x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_DARWIN)
@@ -4401,7 +4380,6 @@
none/tests/s390x/Makefile
none/tests/mips32/Makefile
none/tests/mips64/Makefile
- none/tests/tilegx/Makefile
none/tests/linux/Makefile
none/tests/darwin/Makefile
none/tests/solaris/Makefile
Modified: trunk/coregrind/Makefile.am
==============================================================================
--- trunk/coregrind/Makefile.am (original)
+++ trunk/coregrind/Makefile.am Mon May 8 18:21:59 2017
@@ -374,7 +374,6 @@
m_dispatch/dispatch-s390x-linux.S \
m_dispatch/dispatch-mips32-linux.S \
m_dispatch/dispatch-mips64-linux.S \
- m_dispatch/dispatch-tilegx-linux.S \
m_dispatch/dispatch-x86-darwin.S \
m_dispatch/dispatch-amd64-darwin.S \
m_dispatch/dispatch-x86-solaris.S \
@@ -396,7 +395,6 @@
m_gdbserver/valgrind-low-s390x.c \
m_gdbserver/valgrind-low-mips32.c \
m_gdbserver/valgrind-low-mips64.c \
- m_gdbserver/valgrind-low-tilegx.c \
m_gdbserver/version.c \
m_initimg/initimg-linux.c \
m_initimg/initimg-darwin.c \
@@ -421,7 +419,6 @@
m_sigframe/sigframe-s390x-linux.c \
m_sigframe/sigframe-mips32-linux.c \
m_sigframe/sigframe-mips64-linux.c \
- m_sigframe/sigframe-tilegx-linux.c \
m_sigframe/sigframe-x86-darwin.c \
m_sigframe/sigframe-amd64-darwin.c \
m_sigframe/sigframe-solaris.c \
@@ -435,7 +432,6 @@
m_syswrap/syscall-s390x-linux.S \
m_syswrap/syscall-mips32-linux.S \
m_syswrap/syscall-mips64-linux.S \
- m_syswrap/syscall-tilegx-linux.S \
m_syswrap/syscall-x86-darwin.S \
m_syswrap/syscall-amd64-darwin.S \
m_syswrap/syscall-x86-solaris.S \
@@ -455,7 +451,6 @@
m_syswrap/syswrap-s390x-linux.c \
m_syswrap/syswrap-mips32-linux.c \
m_syswrap/syswrap-mips64-linux.c \
- m_syswrap/syswrap-tilegx-linux.c \
m_syswrap/syswrap-x86-darwin.c \
m_syswrap/syswrap-amd64-darwin.c \
m_syswrap/syswrap-xen.c \
Modified: trunk/coregrind/launcher-linux.c
==============================================================================
--- trunk/coregrind/launcher-linux.c (original)
+++ trunk/coregrind/launcher-linux.c Mon May 8 18:21:59 2017
@@ -65,10 +65,6 @@
#define EM_PPC64 21 // ditto
#endif
-#ifndef EM_TILEGX
-#define EM_TILEGX 191
-#endif
-
/* Report fatal errors */
__attribute__((noreturn))
static void barf ( const char *format, ... )
@@ -263,10 +259,6 @@
(ehdr->e_ident[EI_OSABI] == ELFOSABI_SYSV ||
ehdr->e_ident[EI_OSABI] == ELFOSABI_LINUX)) {
platform = "mips64-linux";
- } else if (ehdr->e_machine == EM_TILEGX &&
- (ehdr->e_ident[EI_OSABI] == ELFOSABI_SYSV ||
- ehdr->e_ident[EI_OSABI] == ELFOSABI_LINUX)) {
- platform = "tilegx-linux";
} else if (ehdr->e_machine == EM_AARCH64 &&
(ehdr->e_ident[EI_OSABI] == ELFOSABI_SYSV ||
ehdr->e_ident[EI_OSABI] == ELFOSABI_LINUX)) {
@@ -372,7 +364,6 @@
(0==strcmp(VG_PLATFORM,"arm-linux")) ||
(0==strcmp(VG_PLATFORM,"arm64-linux")) ||
(0==strcmp(VG_PLATFORM,"s390x-linux")) ||
- (0==strcmp(VG_PLATFORM,"tilegx-linux")) ||
(0==strcmp(VG_PLATFORM,"mips32-linux")) ||
(0==strcmp(VG_PLATFORM,"mips64-linux")))
default_platform = VG_PLATFORM;
Modified: trunk/coregrind/m_aspacemgr/aspacemgr-common.c
==============================================================================
--- trunk/coregrind/m_aspacemgr/aspacemgr-common.c (original)
+++ trunk/coregrind/m_aspacemgr/aspacemgr-common.c Mon May 8 18:21:59 2017
@@ -158,8 +158,7 @@
# elif defined(VGP_amd64_linux) \
|| defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux) \
|| defined(VGP_s390x_linux) || defined(VGP_mips32_linux) \
- || defined(VGP_mips64_linux) || defined(VGP_arm64_linux) \
- || defined(VGP_tilegx_linux)
+ || defined(VGP_mips64_linux) || defined(VGP_arm64_linux)
res = VG_(do_syscall6)(__NR_mmap, (UWord)start, length,
prot, flags, fd, offset);
# elif defined(VGP_x86_darwin)
@@ -258,9 +257,6 @@
/* ARM64 wants to use __NR_openat rather than __NR_open. */
SysRes res = VG_(do_syscall4)(__NR_openat,
VKI_AT_FDCWD, (UWord)pathname, flags, mode);
-# elif defined(VGP_tilegx_linux)
- SysRes res = VG_(do_syscall4)(__NR_openat, VKI_AT_FDCWD, (UWord)pathname,
- flags, mode);
# elif defined(VGO_linux) || defined(VGO_darwin)
SysRes res = VG_(do_syscall3)(__NR_open, (UWord)pathname, flags, mode);
# elif defined(VGO_solaris)
@@ -289,9 +285,6 @@
# if defined(VGP_arm64_linux)
res = VG_(do_syscall4)(__NR_readlinkat, VKI_AT_FDCWD,
(UWord)path, (UWord)buf, bufsiz);
-# elif defined(VGP_tilegx_linux)
- res = VG_(do_syscall4)(__NR_readlinkat, VKI_AT_FDCWD, (UWord)path,
- (UWord)buf, bufsiz);
# elif defined(VGO_linux) || defined(VGO_darwin)
res = VG_(do_syscall3)(__NR_readlink, (UWord)path, (UWord)buf, bufsiz);
# elif defined(VGO_solaris)
Modified: trunk/coregrind/m_cache.c
==============================================================================
--- trunk/coregrind/m_cache.c (original)
+++ trunk/coregrind/m_cache.c Mon May 8 18:21:59 2017
@@ -540,8 +540,7 @@
#elif defined(VGA_arm) || defined(VGA_ppc32) || \
defined(VGA_ppc64be) || defined(VGA_ppc64le) || \
- defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_arm64) || \
- defined(VGA_tilegx)
+ defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_arm64)
static Bool
get_cache_info(VexArchInfo *vai)
{
Modified: trunk/coregrind/m_coredump/coredump-elf.c
==============================================================================
--- trunk/coregrind/m_coredump/coredump-elf.c (original)
+++ trunk/coregrind/m_coredump/coredump-elf.c Mon May 8 18:21:59 2017
@@ -416,17 +416,6 @@
regs[VKI_MIPS64_EF_HI] = arch->vex.guest_HI;
regs[VKI_MIPS64_EF_CP0_STATUS] = arch->vex.guest_CP0_status;
regs[VKI_MIPS64_EF_CP0_EPC] = arch->vex.guest_PC;
-#elif defined(VGP_tilegx_linux)
-# define DO(n) regs->regs[n] = arch->vex.guest_r##n
- DO(0); DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7);
- DO(8); DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15);
- DO(16); DO(17); DO(18); DO(19); DO(20); DO(21); DO(22); DO(23);
- DO(24); DO(25); DO(26); DO(27); DO(28); DO(29); DO(30); DO(31);
- DO(32); DO(33); DO(34); DO(35); DO(36); DO(37); DO(38); DO(39);
- DO(40); DO(41); DO(42); DO(43); DO(44); DO(45); DO(46); DO(47);
- DO(48); DO(49); DO(50); DO(51); DO(52); DO(53); DO(54); DO(55);
- regs->pc = arch->vex.guest_pc;
- regs->orig_r0 = arch->vex.guest_r0;
#else
# error Unknown ELF platform
#endif
@@ -499,7 +488,7 @@
DO(24); DO(25); DO(26); DO(27); DO(28); DO(29); DO(30); DO(31);
# undef DO
-#elif defined(VGP_arm_linux) || defined(VGP_tilegx_linux)
+#elif defined(VGP_arm_linux)
// umm ...
#elif defined(VGP_arm64_linux)
Modified: trunk/coregrind/m_debuginfo/d3basics.c
==============================================================================
--- trunk/coregrind/m_debuginfo/d3basics.c (original)
+++ trunk/coregrind/m_debuginfo/d3basics.c Mon May 8 18:21:59 2017
@@ -426,9 +426,6 @@
if (regno == 30) { *a = regs->fp; return True; }
# elif defined(VGP_arm64_linux)
if (regno == 31) { *a = regs->sp; return True; }
-# elif defined(VGP_tilegx_linux)
- if (regno == 52) { *a = regs->fp; return True; }
- if (regno == 54) { *a = regs->sp; return True; }
# else
# error "Unknown platform"
# endif
Modified: trunk/coregrind/m_debuginfo/debuginfo.c
==============================================================================
--- trunk/coregrind/m_debuginfo/debuginfo.c (original)
+++ trunk/coregrind/m_debuginfo/debuginfo.c Mon May 8 18:21:59 2017
@@ -953,9 +953,6 @@
# elif defined(VGP_s390x_linux)
is_rx_map = seg->hasR && seg->hasX && !seg->hasW;
is_rw_map = seg->hasR && seg->hasW;
-# elif defined(VGA_tilegx)
- is_rx_map = seg->hasR && seg->hasX; // && !seg->hasW;
- is_rw_map = seg->hasR && seg->hasW; // && !seg->hasX;
# else
# error "Unknown platform"
# endif
@@ -2543,11 +2540,6 @@
|| defined(VGA_ppc64le)
# elif defined(VGP_arm64_linux)
case Creg_ARM64_X30: return eec->uregs->x30;
-# elif defined(VGA_tilegx)
- case Creg_TILEGX_IP: return eec->uregs->pc;
- case Creg_TILEGX_SP: return eec->uregs->sp;
- case Creg_TILEGX_BP: return eec->uregs->fp;
- case Creg_TILEGX_LR: return eec->uregs->lr;
# else
# error "Unsupported arch"
# endif
@@ -2800,16 +2792,6 @@
case CFIC_ARM64_X29REL:
cfa = cfsi_m->cfa_off + uregs->x29;
break;
-# elif defined(VGA_tilegx)
- case CFIC_IA_SPREL:
- cfa = cfsi_m->cfa_off + uregs->sp;
- break;
- case CFIR_SAME:
- cfa = uregs->fp;
- break;
- case CFIC_IA_BPREL:
- cfa = cfsi_m->cfa_off + uregs->fp;
- break;
# else
# error "Unsupported arch"
# endif
@@ -2864,7 +2846,7 @@
return compute_cfa(&uregs,
min_accessible, max_accessible, ce->di, ce->cfsi_m);
}
-#elif defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_tilegx)
+#elif defined(VGA_mips32) || defined(VGA_mips64)
{ D3UnwindRegs uregs;
uregs.pc = ip;
uregs.sp = sp;
@@ -2944,8 +2926,6 @@
# elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le)
# elif defined(VGP_arm64_linux)
ipHere = uregsHere->pc;
-# elif defined(VGA_tilegx)
- ipHere = uregsHere->pc;
# else
# error "Unknown arch"
# endif
@@ -3031,10 +3011,6 @@
COMPUTE(uregsPrev.sp, uregsHere->sp, cfsi_m->sp_how, cfsi_m->sp_off);
COMPUTE(uregsPrev.x30, uregsHere->x30, cfsi_m->x30_how, cfsi_m->x30_off);
COMPUTE(uregsPrev.x29, uregsHere->x29, cfsi_m->x29_how, cfsi_m->x29_off);
-# elif defined(VGA_tilegx)
- COMPUTE(uregsPrev.pc, uregsHere->pc, cfsi_m->ra_how, cfsi_m->ra_off);
- COMPUTE(uregsPrev.sp, uregsHere->sp, cfsi_m->sp_how, cfsi_m->sp_off);
- COMPUTE(uregsPrev.fp, uregsHere->fp, cfsi_m->fp_how, cfsi_m->fp_off);
# else
# error "Unknown arch"
# endif
Modified: trunk/coregrind/m_debuginfo/priv_storage.h
==============================================================================
--- trunk/coregrind/m_debuginfo/priv_storage.h (original)
+++ trunk/coregrind/m_debuginfo/priv_storage.h Mon May 8 18:21:59 2017
@@ -337,19 +337,6 @@
Int fp_off;
}
DiCfSI_m;
-#elif defined(VGA_tilegx)
-typedef
- struct {
- UChar cfa_how; /* a CFIC_IA value */
- UChar ra_how; /* a CFIR_ value */
- UChar sp_how; /* a CFIR_ value */
- UChar fp_how; /* a CFIR_ value */
- Int cfa_off;
- Int ra_off;
- Int sp_off;
- Int fp_off;
- }
- DiCfSI_m;
#else
# error "Unknown arch"
#endif
@@ -403,11 +390,7 @@
Creg_S390_SP,
Creg_S390_FP,
Creg_S390_LR,
- Creg_MIPS_RA,
- Creg_TILEGX_IP,
- Creg_TILEGX_SP,
- Creg_TILEGX_BP,
- Creg_TILEGX_LR
+ Creg_MIPS_RA
}
CfiReg;
Modified: trunk/coregrind/m_debuginfo/readdwarf.c
==============================================================================
--- trunk/coregrind/m_debuginfo/readdwarf.c (original)
+++ trunk/coregrind/m_debuginfo/readdwarf.c Mon May 8 18:21:59 2017
@@ -1732,10 +1732,6 @@
# define FP_REG 30
# define SP_REG 29
# define RA_REG_DEFAULT 31
-#elif defined(VGP_tilegx_linux)
-# define FP_REG 52
-# define SP_REG 54
-# define RA_REG_DEFAULT 55
#else
# error "Unknown platform"
#endif
@@ -1748,7 +1744,7 @@
|| defined(VGP_ppc64le_linux) || defined(VGP_mips32_linux) \
|| defined(VGP_mips64_linux)
# define N_CFI_REGS 72
-#elif defined(VGP_arm_linux) || defined(VGP_tilegx_linux)
+#elif defined(VGP_arm_linux)
# define N_CFI_REGS 320
#elif defined(VGP_arm64_linux)
# define N_CFI_REGS 128
@@ -2058,8 +2054,7 @@
if (ctxs->cfa_is_regoff && ctxs->cfa_reg == SP_REG) {
si_m->cfa_off = ctxs->cfa_off;
# if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \
- || defined(VGA_mips32) || defined(VGA_mips64) \
- || defined(VGA_tilegx)
+ || defined(VGA_mips32) || defined(VGA_mips64)
si_m->cfa_how = CFIC_IA_SPREL;
# elif defined(VGA_arm)
si_m->cfa_how = CFIC_ARM_R13REL;
@@ -2073,8 +2068,7 @@
if (ctxs->cfa_is_regoff && ctxs->cfa_reg == FP_REG) {
si_m->cfa_off = ctxs->cfa_off;
# if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \
- || defined(VGA_mips32) || defined(VGA_mips64) \
- || defined(VGA_tilegx)
+ || defined(VGA_mips32) || defined(VGA_mips64)
si_m->cfa_how = CFIC_IA_BPREL;
# elif defined(VGA_arm)
si_m->cfa_how = CFIC_ARM_R12REL;
@@ -2363,48 +2357,6 @@
*len = (UInt)(ctx->loc - loc_start);
return True;
-# elif defined(VGA_tilegx)
-
- /* --- entire tail of this fn specialised for tilegx --- */
-
- SUMMARISE_HOW(si_m->ra_how, si_m->ra_off,
- ctxs->reg[ctx->ra_reg] );
- SUMMARISE_HOW(si_m->fp_how, si_m->fp_off,
- ctxs->reg[FP_REG] );
- SUMMARISE_HOW(si_m->sp_how, si_m->sp_off,
- ctxs->reg[SP_REG] );
- si_m->sp_how = CFIR_CFAREL;
- si_m->sp_off = 0;
-
- if (si_m->fp_how == CFIR_UNKNOWN)
- si_m->fp_how = CFIR_SAME;
- if (si_m->cfa_how == CFIR_UNKNOWN) {
- si_m->cfa_how = CFIC_IA_SPREL;
- si_m->cfa_off = 160;
- }
- if (si_m->ra_how == CFIR_UNKNOWN) {
- if (!debuginfo->cfsi_exprs)
- debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc),
- "di.ccCt.2a",
- ML_(dinfo_free),
- sizeof(CfiExpr) );
- si_m->ra_how = CFIR_EXPR;
- si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs,
- Creg_TILEGX_LR);
- }
-
- if (si_m->ra_how == CFIR_SAME)
- { why = 3; goto failed; }
-
- if (loc_start >= ctx->loc)
- { why = 4; goto failed; }
- if (ctx->loc - loc_start > 10000000 /* let's say */)
- { why = 5; goto failed; }
-
- *base = loc_start + ctx->initloc;
- *len = (UInt)(ctx->loc - loc_start);
-
- return True;
# elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le)
/* These don't use CFI based unwinding (is that really true?) */
@@ -2501,13 +2453,6 @@
I_die_here;
# elif defined(VGA_ppc32) || defined(VGA_ppc64be) \
|| defined(VGA_ppc64le)
-# elif defined(VGA_tilegx)
- if (dwreg == SP_REG)
- return ML_(CfiExpr_CfiReg)( dstxa, Creg_TILEGX_SP );
- if (dwreg == FP_REG)
- return ML_(CfiExpr_CfiReg)( dstxa, Creg_TILEGX_BP );
- if (dwreg == srcuc->ra_reg)
- return ML_(CfiExpr_CfiReg)( dstxa, Creg_TILEGX_IP );
# else
# error "Unknown arch"
# endif
Modified: trunk/coregrind/m_debuginfo/readelf.c
==============================================================================
--- trunk/coregrind/m_debuginfo/readelf.c (original)
+++ trunk/coregrind/m_debuginfo/readelf.c Mon May 8 18:21:59 2017
@@ -2278,7 +2278,7 @@
# if defined(VGP_x86_linux) || defined(VGP_amd64_linux) \
|| defined(VGP_arm_linux) || defined (VGP_s390x_linux) \
|| defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux) \
+ || defined(VGP_arm64_linux) \
|| defined(VGP_x86_solaris) || defined(VGP_amd64_solaris)
/* Accept .plt where mapped as rx (code) */
if (0 == VG_(strcmp)(name, ".plt")) {
Modified: trunk/coregrind/m_debuginfo/storage.c
==============================================================================
--- trunk/coregrind/m_debuginfo/storage.c (original)
+++ trunk/coregrind/m_debuginfo/storage.c Mon May 8 18:21:59 2017
@@ -216,11 +216,6 @@
SHOW_HOW(si_m->x30_how, si_m->x30_off);
VG_(printf)(" X29=");
SHOW_HOW(si_m->x29_how, si_m->x29_off);
-# elif defined(VGA_tilegx)
- VG_(printf)(" SP=");
- SHOW_HOW(si_m->sp_how, si_m->sp_off);
- VG_(printf)(" FP=");
- SHOW_HOW(si_m->fp_how, si_m->fp_off);
# else
# error "Unknown arch"
# endif
@@ -950,10 +945,6 @@
case Creg_S390_SP: VG_(printf)("SP"); break;
case Creg_S390_FP: VG_(printf)("FP"); break;
case Creg_S390_LR: VG_(printf)("LR"); break;
- case Creg_TILEGX_IP: VG_(printf)("PC"); break;
- case Creg_TILEGX_SP: VG_(printf)("SP"); break;
- case Creg_TILEGX_BP: VG_(printf)("BP"); break;
- case Creg_TILEGX_LR: VG_(printf)("R55"); break;
default: vg_assert(0);
}
}
Modified: trunk/coregrind/m_debuglog.c
==============================================================================
--- trunk/coregrind/m_debuglog.c (original)
+++ trunk/coregrind/m_debuglog.c Mon May 8 18:21:59 2017
@@ -512,53 +512,6 @@
return (UInt)(__res);
}
-#elif defined(VGP_tilegx_linux)
-
-static UInt local_sys_write_stderr ( const HChar* buf, Int n )
-{
- volatile Long block[2];
- block[0] = (Long)buf;
- block[1] = n;
- Long __res = 0;
- __asm__ volatile (
- "movei r0, 2 \n\t" /* stderr */
- "move r1, %1 \n\t" /* buf */
- "move r2, %2 \n\t" /* n */
- "move r3, zero \n\t"
- "moveli r10, %3 \n\t" /* set r10 = __NR_write */
- "swint1 \n\t" /* write() */
- "nop \n\t"
- "move %0, r0 \n\t" /* save return into block[0] */
- : "=r"(__res)
- : "r" (block[0]), "r"(block[1]), "n" (__NR_write)
- : "r0", "r1", "r2", "r3", "r4", "r5");
- if (__res < 0)
- __res = -1;
- return (UInt)__res;
-}
-
-static UInt local_sys_getpid ( void )
-{
- UInt __res, __err;
- __res = 0;
- __err = 0;
- __asm__ volatile (
- "moveli r10, %2\n\t" /* set r10 = __NR_getpid */
- "swint1\n\t" /* getpid() */
- "nop\n\t"
- "move %0, r0\n"
- "move %1, r1\n"
- : "=r" (__res), "=r"(__err)
- : "n" (__NR_getpid)
- : "r0", "r1", "r2", "r3", "r4",
- "r5", "r6", "r7", "r8", "r9",
- "r10", "r11", "r12", "r13", "r14",
- "r15", "r16", "r17", "r18", "r19",
- "r20", "r21", "r22", "r23", "r24",
- "r25", "r26", "r27", "r28", "r29");
- return __res;
-}
-
#elif defined(VGP_x86_solaris)
static UInt local_sys_write_stderr ( const HChar* buf, Int n )
{
Removed: trunk/coregrind/m_dispatch/dispatch-tilegx-linux.S
==============================================================================
--- trunk/coregrind/m_dispatch/dispatch-tilegx-linux.S (original)
+++ trunk/coregrind/m_dispatch/dispatch-tilegx-linux.S (removed)
@@ -1,309 +0,0 @@
-
-/*--------------------------------------------------------------------*/
-/*--- begin dispatch-tilegx-linux.S ---*/
-/*--------------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2010-2017 Tilera Corp.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
-/* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */
-
-#include "pub_core_basics_asm.h"
-
-#if defined(VGP_tilegx_linux)
-#include "pub_core_dispatch_asm.h"
-#include "pub_core_transtab_asm.h"
-#include "libvex_guest_offsets.h" /* for OFFSET_tilegx_PC */
-
- /*------------------------------------------------------------*/
- /*--- ---*/
- /*--- The dispatch loop. VG_(run_innerloop) is used to ---*/
- /*--- run all translations except no-redir ones. ---*/
- /*--- ---*/
- /*------------------------------------------------------------*/
-
- /*----------------------------------------------------*/
- /*--- Preamble (set everything up) ---*/
- /*----------------------------------------------------*/
-
- /* signature:
- void VG_(disp_run_translations)(UWord* two_words,
- void* guest_state,
- Addr host_addr );
- UWord VG_(run_innerloop) ( void* guest_state, UWord do_profiling );
- */
-
- .text
- .globl VG_(disp_run_translations)
- VG_(disp_run_translations):
-
- /* r0 holds two_words
- r1 holds guest_state
- r2 holds host_addr */
-
- /* New stack frame */
- addli sp, sp, -256
- addi r29, sp, 8
- /*
- high memory of stack
- 216 lr
- 208 r53
- 200 r52
- 192 r51
- ...
- 48 r33
- 40 r32
- 32 r31
- 24 r30
- 16 r1 <---
- 8 r0
- 0 <-sp
- */
- st_add r29, r0, 8
- st_add r29, r1, 8
-
- /* ... and r30 - r53 */
- st_add r29, r30, 8
- st_add r29, r31, 8
- st_add r29, r32, 8
- st_add r29, r33, 8
- st_add r29, r34, 8
- st_add r29, r35, 8
- st_add r29, r36, 8
- st_add r29, r37, 8
- st_add r29, r38, 8
- st_add r29, r39, 8
- st_add r29, r40, 8
- st_add r29, r41, 8
- st_add r29, r42, 8
- st_add r29, r43, 8
- st_add r29, r44, 8
- st_add r29, r45, 8
- st_add r29, r46, 8
- st_add r29, r47, 8
- st_add r29, r48, 8
- st_add r29, r49, 8
- st_add r29, r50, 8
- st_add r29, r51, 8
- st_add r29, r52, 8
- st_add r29, r53, 8
- st r29, lr
-
- /* Load the address of guest state into guest state register r50. */
- move r50, r1
-
- //j postamble
-
- /* jump to the code cache. */
- jr r2
- /*NOTREACHED*/
-
-
- /*----------------------------------------------------*/
- /*--- Postamble and exit. ---*/
- /*----------------------------------------------------*/
-
-postamble:
- /* At this point, r12 and r13 contain two
- words to be returned to the caller. r12
- holds a TRC value, and r13 optionally may
- hold another word (for CHAIN_ME exits, the
- address of the place to patch.) */
-
- /* run_innerloop_exit_REALLY:
- r50 holds VG_TRC_* value to return
- Return to parent stack
- addli sp, sp, 256 */
-
- addi r29, sp, 8
-
- /* Restore r0 from stack; holding address of twp words */
- ld_add r0, r29, 16
- /* store r12 in two_words[0] */
- st_add r0, r12, 8
- /* store r13 in two_words[1] */
- st r0, r13
-
- /* Restore callee-saved registers... */
- ld_add r30, r29, 8
- ld_add r31, r29, 8
- ld_add r32, r29, 8
- ld_add r33, r29, 8
- ld_add r34, r29, 8
- ld_add r35, r29, 8
- ld_add r36, r29, 8
- ld_add r37, r29, 8
- ld_add r38, r29, 8
- ld_add r39, r29, 8
- ld_add r40, r29, 8
- ld_add r41, r29, 8
- ld_add r42, r29, 8
- ld_add r43, r29, 8
- ld_add r44, r29, 8
- ld_add r45, r29, 8
- ld_add r46, r29, 8
- ld_add r47, r29, 8
- ld_add r48, r29, 8
- ld_add r49, r29, 8
- ld_add r50, r29, 8
- ld_add r51, r29, 8
- ld_add r52, r29, 8
- ld_add r53, r29, 8
- ld lr, r29
- addli sp, sp, 256 /* stack_size */
- jr lr
- nop
-
-
- /*----------------------------------------------------*/
- /*--- Continuation points ---*/
- /*----------------------------------------------------*/
-
- /* ------ Chain me to slow entry point ------ */
- .global VG_(disp_cp_chain_me_to_slowEP)
- VG_(disp_cp_chain_me_to_slowEP):
- /* We got called. The return address indicates
- where the patching needs to happen. Collect
- the return address and, exit back to C land,
- handing the caller the pair (Chain_me_S, RA) */
- # if (VG_TRC_CHAIN_ME_TO_SLOW_EP > 128)
- # error ("VG_TRC_CHAIN_ME_TO_SLOW_EP is > 128");
- # endif
- moveli r12, VG_TRC_CHAIN_ME_TO_SLOW_EP
- move r13, lr
- /* 32 = mkLoadImm_EXACTLY4
- 8 = jalr r9
- 8 = nop */
- addi r13, r13, -40
- j postamble
-
- /* ------ Chain me to slow entry point ------ */
- .global VG_(disp_cp_chain_me_to_fastEP)
- VG_(disp_cp_chain_me_to_fastEP):
- /* We got called. The return address indicates
- where the patching needs to happen. Collect
- the return address and, exit back to C land,
- handing the caller the pair (Chain_me_S, RA) */
- # if (VG_TRC_CHAIN_ME_TO_FAST_EP > 128)
- # error ("VG_TRC_CHAIN_ME_TO_FAST_EP is > 128");
- # endif
- moveli r12, VG_TRC_CHAIN_ME_TO_FAST_EP
- move r13, lr
- /* 32 = mkLoadImm_EXACTLY4
- 8 = jalr r9
- 8 = nop */
- addi r13, r13, -40
- j postamble
-
- /* ------ Indirect but boring jump ------ */
- .global VG_(disp_cp_xindir)
- VG_(disp_cp_xindir):
- /* Where are we going? */
- addli r11, r50, OFFSET_tilegx_pc
- ld r11, r11
-
- moveli r7, hw2_last(VG_(stats__n_xindirs_32))
- shl16insli r7, r7, hw1(VG_(stats__n_xindirs_32))
- shl16insli r7, r7, hw0(VG_(stats__n_xindirs_32))
- ld4u r6, r7
- addi r6, r6, 1
- st4 r7, r6
-
- /* try a fast lookup in the translation cache */
- /* r14 = VG_TT_FAST_HASH(addr) * sizeof(ULong*)
- = (t8 >> 3 & VG_TT_FAST_MASK) << 3 */
-
- move r14, r11
- /* Assume VG_TT_FAST_MASK < 4G */
- moveli r12, hw1(VG_TT_FAST_MASK)
- shl16insli r12, r12, hw0(VG_TT_FAST_MASK)
- shrui r14, r14, 3
- and r14, r14, r12
- shli r14, r14, 4
- /* Note, each tt_fast hash entry has two pointers i.e. 16 Bytes. */
-
- /* r13 = (addr of VG_(tt_fast)) + r14 */
- moveli r13, hw2_last(VG_(tt_fast))
- shl16insli r13, r13, hw1(VG_(tt_fast))
- shl16insli r13, r13, hw0(VG_(tt_fast))
-
- add r13, r13, r14
-
- /* r12 = VG_(tt_fast)[hash] :: ULong* */
- ld_add r12, r13, 8
-
- {
- ld r25, r13
- sub r7, r12, r11
- }
-
- bnez r7, fast_lookup_failed
-
- /* Run the translation */
- jr r25
-
- .quad 0x0
-
-fast_lookup_failed:
- /* %PC is up to date */
- /* back out decrement of the dispatch counter */
- /* hold dispatch_ctr in t0 (r8) */
-
- moveli r7, hw2_last(VG_(stats__n_xindir_misses_32))
- shl16insli r7, r7, hw1(VG_(stats__n_xindir_misses_32))
- shl16insli r7, r7, hw0(VG_(stats__n_xindir_misses_32))
- ld4u r6, r7
- addi r6, r6, 1
- st4 r7, r6
- moveli r12, VG_TRC_INNER_FASTMISS
- movei r13, 0
- j postamble
-
- /* ------ Assisted jump ------ */
- .global VG_(disp_cp_xassisted)
- VG_(disp_cp_xassisted):
- /* guest-state-pointer contains the TRC. Put the value into the
- return register */
- move r12, r50
- movei r13, 0
- j postamble
-
- /* ------ Event check failed ------ */
- .global VG_(disp_cp_evcheck_fail)
- VG_(disp_cp_evcheck_fail):
- moveli r12, VG_TRC_INNER_COUNTERZERO
- movei r13, 0
- j postamble
-
- .size VG_(disp_run_translations), .-VG_(disp_run_translations)
-
-#endif /* defined(VGP_tilegx_linux) */
-
-/* Let the linker know we don't need an executable stack */
-MARK_STACK_NO_EXEC
-
-/*--------------------------------------------------------------------*/
-/*--- end ---*/
-/*--------------------------------------------------------------------*/
-
Modified: trunk/coregrind/m_gdbserver/target.c
==============================================================================
--- trunk/coregrind/m_gdbserver/target.c (original)
+++ trunk/coregrind/m_gdbserver/target.c Mon May 8 18:21:59 2017
@@ -881,8 +881,6 @@
mips32_init_architecture(&the_low_target);
#elif defined(VGA_mips64)
mips64_init_architecture(&the_low_target);
-#elif defined(VGA_tilegx)
- tilegx_init_architecture(&the_low_target);
#else
#error "architecture missing in target.c valgrind_initialize_target"
#endif
Removed: trunk/coregrind/m_gdbserver/valgrind-low-tilegx.c
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind-low-tilegx.c (original)
+++ trunk/coregrind/m_gdbserver/valgrind-low-tilegx.c (removed)
@@ -1,262 +0,0 @@
-/* Low level interface to valgrind, for the remote server for GDB integrated
- in valgrind.
- Copyright (C) 2012
- Free Software Foundation, Inc.
-
- This file is part of VALGRIND.
- It has been inspired from a file from gdbserver in gdb 6.6.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor,
- Boston, MA 02110-1301, USA. */
-
-#include "server.h"
-#include "target.h"
-#include "regdef.h"
-#include "regcache.h"
-
-#include "pub_core_aspacemgr.h"
-#include "pub_core_threadstate.h"
-#include "pub_core_transtab.h"
-#include "pub_core_gdbserver.h"
-
-#include "valgrind_low.h"
-
-#include "libvex_guest_tilegx.h"
-#define REG_ONE(_n) { "r"#_n, 64 * (_n), 64 }
-#define REG_ONE_NAME(_n, _name) { _name, 64 * (_n), 64 }
-
-static struct reg regs[] = {
- REG_ONE(0),
- REG_ONE(1),
- REG_ONE(2),
- REG_ONE(3),
- REG_ONE(4),
- REG_ONE(5),
- REG_ONE(6),
- REG_ONE(7),
- REG_ONE(8),
- REG_ONE(9),
-
- REG_ONE(10),
- REG_ONE(11),
- REG_ONE(12),
- REG_ONE(13),
- REG_ONE(14),
- REG_ONE(15),
- REG_ONE(16),
- REG_ONE(17),
- REG_ONE(18),
- REG_ONE(19),
-
- REG_ONE(20),
- REG_ONE(21),
- REG_ONE(22),
- REG_ONE(23),
- REG_ONE(24),
- REG_ONE(25),
- REG_ONE(26),
- REG_ONE(27),
- REG_ONE(28),
- REG_ONE(29),
-
- REG_ONE(30),
- REG_ONE(31),
- REG_ONE(32),
- REG_ONE(33),
- REG_ONE(34),
- REG_ONE(35),
- REG_ONE(36),
- REG_ONE(37),
- REG_ONE(38),
- REG_ONE(39),
-
- REG_ONE(40),
- REG_ONE(41),
- REG_ONE(42),
- REG_ONE(43),
- REG_ONE(44),
- REG_ONE(45),
- REG_ONE(46),
- REG_ONE(47),
- REG_ONE(48),
- REG_ONE(49),
-
- REG_ONE(50),
- REG_ONE(51),
- REG_ONE(52),
- REG_ONE(53),
-
- REG_ONE_NAME(54, "sp"),
- REG_ONE_NAME(55, "lr"),
- REG_ONE(56),
- REG_ONE(57),
- REG_ONE(58),
- REG_ONE(59),
-
- REG_ONE(60),
- REG_ONE(61),
- REG_ONE(62),
- REG_ONE_NAME(63, "zero"),
- REG_ONE_NAME(64, "pc"),
-};
-
-#define num_regs (sizeof (regs) / sizeof (regs[0]))
-
-static const char *expedite_regs[] = { "sp", "pc", 0 };
-
-static
-CORE_ADDR get_pc (void)
-{
- unsigned long pc;
-
- collect_register_by_name ("pc", &pc);
-
- dlog(1, "stop pc is %p\n", (void *) pc);
- return pc;
-}
-
-static
-void set_pc ( CORE_ADDR newpc )
-{
- Bool mod;
- supply_register_by_name ("pc", &newpc, &mod);
- if (mod)
- dlog(1, "set pc to %p\n", C2v (newpc));
- else
- dlog(1, "set pc not changed %p\n", C2v (newpc));
-}
-
-/* store registers in the guest state (gdbserver_to_valgrind)
- or fetch register from the guest state (valgrind_to_gdbserver). */
-static
-void transfer_register ( ThreadId tid, int abs_regno, void * buf,
- transfer_direction dir, int size, Bool *mod )
-{
- ThreadState* tst = VG_(get_ThreadState)(tid);
- int set = abs_regno / num_regs;
- int regno = abs_regno % num_regs;
- *mod = False;
-
- VexGuestTILEGXState* tilegx = (VexGuestTILEGXState*) get_arch (set, tst);
-
- switch (regno) {
- case 0: VG_(transfer) (&tilegx->guest_r0, buf, dir, size, mod); break;
- case 1: VG_(transfer) (&tilegx->guest_r1, buf, dir, size, mod); break;
- case 2: VG_(transfer) (&tilegx->guest_r2, buf, dir, size, mod); break;
- case 3: VG_(transfer) (&tilegx->guest_r3, buf, dir, size, mod); break;
- case 4: VG_(transfer) (&tilegx->guest_r4, buf, dir, size, mod); break;
- case 5: VG_(transfer) (&tilegx->guest_r5, buf, dir, size, mod); break;
- case 6: VG_(transfer) (&tilegx->guest_r6, buf, dir, size, mod); break;
- case 7: VG_(transfer) (&tilegx->guest_r7, buf, dir, size, mod); break;
- case 8: VG_(transfer) (&tilegx->guest_r8, buf, dir, size, mod); break;
- case 9: VG_(transfer) (&tilegx->guest_r9, buf, dir, size, mod); break;
- case 10: VG_(transfer) (&tilegx->guest_r10, buf, dir, size, mod); break;
- case 11: VG_(transfer) (&tilegx->guest_r11, buf, dir, size, mod); break;
- case 12: VG_(transfer) (&tilegx->guest_r12, buf, dir, size, mod); break;
- case 13: VG_(transfer) (&tilegx->guest_r13, buf, dir, size, mod); break;
- case 14: VG_(transfer) (&tilegx->guest_r14, buf, dir, size, mod); break;
- case 15: VG_(transfer) (&tilegx->guest_r15, buf, dir, size, mod); break;
- case 16: VG_(transfer) (&tilegx->guest_r16, buf, dir, size, mod); break;
- case 17: VG_(transfer) (&tilegx->guest_r17, buf, dir, size, mod); break;
- case 18: VG_(transfer) (&tilegx->guest_r18, buf, dir, size, mod); break;
- case 19: VG_(transfer) (&tilegx->guest_r19, buf, dir, size, mod); break;
- case 20: VG_(transfer) (&tilegx->guest_r20, buf, dir, size, mod); break;
- case 21: VG_(transfer) (&tilegx->guest_r21, buf, dir, size, mod); break;
- case 22: VG_(transfer) (&tilegx->guest_r22, buf, dir, size, mod); break;
- case 23: VG_(transfer) (&tilegx->guest_r23, buf, dir, size, mod); break;
- case 24: VG_(transfer) (&tilegx->guest_r24, buf, dir, size, mod); break;
- case 25: VG_(transfer) (&tilegx->guest_r25, buf, dir, size, mod); break;
- case 26: VG_(transfer) (&tilegx->guest_r26, buf, dir, size, mod); break;
- case 27: VG_(transfer) (&tilegx->guest_r27, buf, dir, size, mod); break;
- case 28: VG_(transfer) (&tilegx->guest_r28, buf, dir, size, mod); break;
- case 29: VG_(transfer) (&tilegx->guest_r29, buf, dir, size, mod); break;
- case 30: VG_(transfer) (&tilegx->guest_r30, buf, dir, size, mod); break;
- case 31: VG_(transfer) (&tilegx->guest_r31, buf, dir, size, mod); break;
- case 32: VG_(transfer) (&tilegx->guest_r32, buf, dir, size, mod); break;
- case 33: VG_(transfer) (&tilegx->guest_r33, buf, dir, size, mod); break;
- case 34: VG_(transfer) (&tilegx->guest_r34, buf, dir, size, mod); break;
- case 35: VG_(transfer) (&tilegx->guest_r35, buf, dir, size, mod); break;
- case 36: VG_(transfer) (&tilegx->guest_r36, buf, dir, size, mod); break;
- case 37: VG_(transfer) (&tilegx->guest_r37, buf, dir, size, mod); break;
- case 38: VG_(transfer) (&tilegx->guest_r38, buf, dir, size, mod); break;
- case 39: VG_(transfer) (&tilegx->guest_r39, buf, dir, size, mod); break;
- case 40: VG_(transfer) (&tilegx->guest_r40, buf, dir, size, mod); break;
- case 41: VG_(transfer) (&tilegx->guest_r41, buf, dir, size, mod); break;
- case 42: VG_(transfer) (&tilegx->guest_r42, buf, dir, size, mod); break;
- case 43: VG_(transfer) (&tilegx->guest_r43, buf, dir, size, mod); break;
- case 44: VG_(transfer) (&tilegx->guest_r44, buf, dir, size, mod); break;
- case 45: VG_(transfer) (&tilegx->guest_r45, buf, dir, size, mod); break;
- case 46: VG_(transfer) (&tilegx->guest_r46, buf, dir, size, mod); break;
- case 47: VG_(transfer) (&tilegx->guest_r47, buf, dir, size, mod); break;
- case 48: VG_(transfer) (&tilegx->guest_r48, buf, dir, size, mod); break;
- case 49: VG_(transfer) (&tilegx->guest_r49, buf, dir, size, mod); break;
- case 50: VG_(transfer) (&tilegx->guest_r50, buf, dir, size, mod); break;
- case 51: VG_(transfer) (&tilegx->guest_r51, buf, dir, size, mod); break;
- case 52: VG_(transfer) (&tilegx->guest_r52, buf, dir, size, mod); break;
- case 53: VG_(transfer) (&tilegx->guest_r53, buf, dir, size, mod); break;
- case 54: VG_(transfer) (&tilegx->guest_r54, buf, dir, size, mod); break;
- case 55: VG_(transfer) (&tilegx->guest_r55, buf, dir, size, mod); break;
- case 56: VG_(transfer) (&tilegx->guest_r56, buf, dir, size, mod); break;
- case 57: VG_(transfer) (&tilegx->guest_r57, buf, dir, size, mod); break;
- case 58: VG_(transfer) (&tilegx->guest_r58, buf, dir, size, mod); break;
- case 59: VG_(transfer) (&tilegx->guest_r59, buf, dir, size, mod); break;
- case 60: VG_(transfer) (&tilegx->guest_r60, buf, dir, size, mod); break;
- case 61: VG_(transfer) (&tilegx->guest_r61, buf, dir, size, mod); break;
- case 62: VG_(transfer) (&tilegx->guest_r62, buf, dir, size, mod); break;
- case 63: VG_(transfer) (&tilegx->guest_r63, buf, dir, size, mod); break;
- case 64: VG_(transfer) (&tilegx->guest_pc, buf, dir, size, mod); break;
-
- default: VG_(printf)("regno: %d\n", regno); vg_assert(0);
- }
-}
-
-static
-const char* target_xml ( Bool shadow_mode )
-{
- return NULL;
-#if 0
- if (shadow_mode)
- return "tilegx-linux-valgrind.xml";
- else
- return "tilegx-linux.xml";
-#endif
-}
-
-static CORE_ADDR** target_get_dtv (ThreadState *tst)
-{
- VexGuestTILEGXState* tilegx = (VexGuestTILEGXState*)&tst->arch.vex;
- // tilegx dtv location similar to mips
- return (CORE_ADDR**)((CORE_ADDR)tilegx->guest_r53
- - 0x7000 - sizeof(CORE_ADDR));
-}
-
-static struct valgrind_target_ops low_target = {
- num_regs,
- regs,
- 54, //sp = r54, which is register offset 54 in regs
- transfer_register,
- get_pc,
- set_pc,
- "tilegx",
- target_xml,
- target_get_dtv
-};
-
-void tilegx_init_architecture ( struct valgrind_target_ops *target )
-{
- *target = low_target;
- set_register_cache (regs, num_regs);
- gdbserver_expedite_regs = expedite_regs;
-}
Modified: trunk/coregrind/m_gdbserver/valgrind_low.h
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind_low.h (original)
+++ trunk/coregrind/m_gdbserver/valgrind_low.h Mon May 8 18:21:59 2017
@@ -107,6 +107,5 @@
extern void s390x_init_architecture (struct valgrind_target_ops *target);
extern void mips32_init_architecture (struct valgrind_target_ops *target);
extern void mips64_init_architecture (struct valgrind_target_ops *target);
-extern void tilegx_init_architecture (struct valgrind_target_ops *target);
#endif
Modified: trunk/coregrind/m_initimg/initimg-linux.c
==============================================================================
--- trunk/coregrind/m_initimg/initimg-linux.c (original)
+++ trunk/coregrind/m_initimg/initimg-linux.c Mon May 8 18:21:59 2017
@@ -1199,20 +1199,6 @@
arch->vex.guest_PC = iifii.initial_client_IP;
arch->vex.guest_r31 = iifii.initial_client_SP;
-# elif defined(VGP_tilegx_linux)
- vg_assert(0 == sizeof(VexGuestTILEGXState) % LibVEX_GUEST_STATE_ALIGN);
-
- /* Zero out the initial state. */
- LibVEX_GuestTILEGX_initialise(&arch->vex);
-
- /* Zero out the shadow areas. */
- VG_(memset)(&arch->vex_shadow1, 0, sizeof(VexGuestTILEGXState));
- VG_(memset)(&arch->vex_shadow2, 0, sizeof(VexGuestTILEGXState));
-
- /* Put essential stuff into the new state. */
- arch->vex.guest_r54 = iifii.initial_client_SP;
- arch->vex.guest_pc = iifii.initial_client_IP;
-
# else
# error Unknown platform
# endif
Modified: trunk/coregrind/m_libcassert.c
==============================================================================
--- trunk/coregrind/m_libcassert.c (original)
+++ trunk/coregrind/m_libcassert.c Mon May 8 18:21:59 2017
@@ -226,29 +226,6 @@
(srP)->misc.MIPS64.r31 = (ULong)ra; \
(srP)->misc.MIPS64.r28 = (ULong)gp; \
}
-#elif defined(VGP_tilegx_linux)
-# define GET_STARTREGS(srP) \
- { ULong pc, sp, fp, ra; \
- __asm__ __volatile__( \
- "move r8, lr \n" \
- "jal 0f \n" \
- "0:\n" \
- "move %0, lr \n" \
- "move lr, r8 \n" /* put old lr back*/ \
- "move %1, sp \n" \
- "move %2, r52 \n" \
- "move %3, lr \n" \
- : "=r" (pc), \
- "=r" (sp), \
- "=r" (fp), \
- "=r" (ra) \
- : /* reads none */ \
- : "%r8" /* trashed */ ); \
- (srP)->r_pc = (ULong)pc - 8; \
- (srP)->r_sp = (ULong)sp; \
- (srP)->misc.TILEGX.r52 = (ULong)fp; \
- (srP)->misc.TILEGX.r55 = (ULong)ra; \
- }
#else
# error Unknown platform
#endif
Modified: trunk/coregrind/m_libcfile.c
==============================================================================
--- trunk/coregrind/m_libcfile.c (original)
+++ trunk/coregrind/m_libcfile.c Mon May 8 18:21:59 2017
@@ -138,7 +138,7 @@
SysRes VG_(mknod) ( const HChar* pathname, Int mode, UWord dev )
{
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
/* ARM64 wants to use __NR_mknodat rather than __NR_mknod. */
SysRes res = VG_(do_syscall4)(__NR_mknodat,
VKI_AT_FDCWD, (UWord)pathname, mode, dev);
@@ -156,7 +156,7 @@
SysRes VG_(open) ( const HChar* pathname, Int flags, Int mode )
{
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
/* ARM64 wants to use __NR_openat rather than __NR_open. */
SysRes res = VG_(do_syscall4)(__NR_openat,
VKI_AT_FDCWD, (UWord)pathname, flags, mode);
@@ -250,7 +250,7 @@
} else {
return -1;
}
-# elif defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# elif defined(VGP_arm64_linux)
SysRes res = VG_(do_syscall2)(__NR_pipe2, (UWord)fd, 0);
return sr_isError(res) ? -1 : 0;
# elif defined(VGO_linux)
@@ -360,7 +360,7 @@
# endif /* defined(__NR_stat64) */
/* This is the fallback ("vanilla version"). */
{ struct vki_stat buf;
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
res = VG_(do_syscall3)(__NR3264_fstatat, VKI_AT_FDCWD,
(UWord)file_name, (UWord)&buf);
# else
@@ -515,8 +515,7 @@
Int VG_(rename) ( const HChar* old_name, const HChar* new_name )
{
-# if defined(VGO_solaris) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGO_solaris) || defined(VGP_arm64_linux)
SysRes res = VG_(do_syscall4)(__NR_renameat, VKI_AT_FDCWD, (UWord)old_name,
VKI_AT_FDCWD, (UWord)new_name);
# elif defined(VGO_linux) || defined(VGO_darwin)
@@ -529,7 +528,7 @@
Int VG_(unlink) ( const HChar* file_name )
{
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
SysRes res = VG_(do_syscall2)(__NR_unlinkat, VKI_AT_FDCWD,
(UWord)file_name);
# elif defined(VGO_linux) || defined(VGO_darwin)
@@ -604,7 +603,7 @@
SysRes VG_(poll) (struct vki_pollfd *fds, Int nfds, Int timeout)
{
SysRes res;
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
/* ARM64 wants to use __NR_ppoll rather than __NR_poll. */
struct vki_timespec timeout_ts;
if (timeout >= 0) {
@@ -647,7 +646,7 @@
{
SysRes res;
/* res = readlink( path, buf, bufsiz ); */
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
res = VG_(do_syscall4)(__NR_readlinkat, VKI_AT_FDCWD,
(UWord)path, (UWord)buf, bufsiz);
# elif defined(VGO_linux) || defined(VGO_darwin)
@@ -726,7 +725,7 @@
UWord w = (irusr ? VKI_R_OK : 0)
| (iwusr ? VKI_W_OK : 0)
| (ixusr ? VKI_X_OK : 0);
-# if defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+# if defined(VGP_arm64_linux)
SysRes res = VG_(do_syscall3)(__NR_faccessat, VKI_AT_FDCWD, (UWord)path, w);
# elif defined(VGO_linux) || defined(VGO_darwin)
SysRes res = VG_(do_syscall2)(__NR_access, (UWord)path, w);
@@ -870,8 +869,7 @@
return res;
# elif defined(VGP_amd64_linux) || defined(VGP_s390x_linux) \
|| defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux) \
- || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+ || defined(VGP_mips64_linux) || defined(VGP_arm64_linux)
res = VG_(do_syscall4)(__NR_pread64, fd, (UWord)buf, count, offset);
return res;
# elif defined(VGP_amd64_darwin)
@@ -1126,7 +1124,7 @@
# elif defined(VGP_amd64_linux) || defined(VGP_arm_linux) \
|| defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+ || defined(VGP_arm64_linux)
SysRes res;
res = VG_(do_syscall3)(__NR_socket, domain, type, protocol );
return sr_isError(res) ? -1 : sr_Res(res);
@@ -1181,7 +1179,7 @@
# elif defined(VGP_amd64_linux) || defined(VGP_arm_linux) \
|| defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+ || defined(VGP_arm64_linux)
SysRes res;
res = VG_(do_syscall3)(__NR_connect, sockfd, (UWord)serv_addr, addrlen);
return sr_isError(res) ? -1 : sr_Res(res);
@@ -1228,7 +1226,7 @@
# elif defined(VGP_amd64_linux) || defined(VGP_arm_linux) \
|| defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \
- || defined(VGP_arm64_linux) || defined(VGP_tilegx_linux)
+ || defined(VGP_arm64_linux)
SysRes res;
res = VG_(do_syscall6)(__NR_sendto, sd, (UWord)msg,
count, VKI_MSG_NOSIGNAL, 0,0);
@@ -1264,8 +1262,7 @@
return sr_isError(res) ? -1 : sr_Res(res);
# elif defined(VGP_amd64_linux) || defined(VGP_arm_linux) \
- || def...
[truncated message content] |
|
From: <sv...@va...> - 2017-05-08 17:21:48
|
Author: iraisr
Date: Mon May 8 18:21:36 2017
New Revision: 3363
Log:
Remove TileGX/Linux port.
Fixes BZ#379504.
Removed:
trunk/priv/guest_tilegx_defs.h
trunk/priv/guest_tilegx_helpers.c
trunk/priv/guest_tilegx_toIR.c
trunk/priv/host_tilegx_defs.c
trunk/priv/host_tilegx_defs.h
trunk/priv/host_tilegx_isel.c
trunk/priv/tilegx_disasm.c
trunk/priv/tilegx_disasm.h
trunk/pub/libvex_guest_tilegx.h
Modified:
trunk/auxprogs/genoffsets.c
trunk/priv/main_main.c
trunk/pub/libvex.h
trunk/pub/libvex_basictypes.h
Modified: trunk/auxprogs/genoffsets.c
==============================================================================
--- trunk/auxprogs/genoffsets.c (original)
+++ trunk/auxprogs/genoffsets.c Mon May 8 18:21:36 2017
@@ -55,7 +55,6 @@
#include "../pub/libvex_guest_s390x.h"
#include "../pub/libvex_guest_mips32.h"
#include "../pub/libvex_guest_mips64.h"
-#include "../pub/libvex_guest_tilegx.h"
#define VG_STRINGIFZ(__str) #__str
#define VG_STRINGIFY(__str) VG_STRINGIFZ(__str)
@@ -264,68 +263,6 @@
GENOFFSET(MIPS64,mips64,PC);
GENOFFSET(MIPS64,mips64,HI);
GENOFFSET(MIPS64,mips64,LO);
-
- // Tilegx
- GENOFFSET(TILEGX,tilegx,r0);
- GENOFFSET(TILEGX,tilegx,r1);
- GENOFFSET(TILEGX,tilegx,r2);
- GENOFFSET(TILEGX,tilegx,r3);
- GENOFFSET(TILEGX,tilegx,r4);
- GENOFFSET(TILEGX,tilegx,r5);
- GENOFFSET(TILEGX,tilegx,r6);
- GENOFFSET(TILEGX,tilegx,r7);
- GENOFFSET(TILEGX,tilegx,r8);
- GENOFFSET(TILEGX,tilegx,r9);
- GENOFFSET(TILEGX,tilegx,r10);
- GENOFFSET(TILEGX,tilegx,r11);
- GENOFFSET(TILEGX,tilegx,r12);
- GENOFFSET(TILEGX,tilegx,r13);
- GENOFFSET(TILEGX,tilegx,r14);
- GENOFFSET(TILEGX,tilegx,r15);
- GENOFFSET(TILEGX,tilegx,r16);
- GENOFFSET(TILEGX,tilegx,r17);
- GENOFFSET(TILEGX,tilegx,r18);
- GENOFFSET(TILEGX,tilegx,r19);
- GENOFFSET(TILEGX,tilegx,r20);
- GENOFFSET(TILEGX,tilegx,r21);
- GENOFFSET(TILEGX,tilegx,r22);
- GENOFFSET(TILEGX,tilegx,r23);
- GENOFFSET(TILEGX,tilegx,r24);
- GENOFFSET(TILEGX,tilegx,r25);
- GENOFFSET(TILEGX,tilegx,r26);
- GENOFFSET(TILEGX,tilegx,r27);
- GENOFFSET(TILEGX,tilegx,r28);
- GENOFFSET(TILEGX,tilegx,r29);
- GENOFFSET(TILEGX,tilegx,r30);
- GENOFFSET(TILEGX,tilegx,r31);
- GENOFFSET(TILEGX,tilegx,r32);
- GENOFFSET(TILEGX,tilegx,r33);
- GENOFFSET(TILEGX,tilegx,r34);
- GENOFFSET(TILEGX,tilegx,r35);
- GENOFFSET(TILEGX,tilegx,r36);
- GENOFFSET(TILEGX,tilegx,r37);
- GENOFFSET(TILEGX,tilegx,r38);
- GENOFFSET(TILEGX,tilegx,r39);
- GENOFFSET(TILEGX,tilegx,r40);
- GENOFFSET(TILEGX,tilegx,r41);
- GENOFFSET(TILEGX,tilegx,r42);
- GENOFFSET(TILEGX,tilegx,r43);
- GENOFFSET(TILEGX,tilegx,r44);
- GENOFFSET(TILEGX,tilegx,r45);
- GENOFFSET(TILEGX,tilegx,r46);
- GENOFFSET(TILEGX,tilegx,r47);
- GENOFFSET(TILEGX,tilegx,r48);
- GENOFFSET(TILEGX,tilegx,r49);
- GENOFFSET(TILEGX,tilegx,r50);
- GENOFFSET(TILEGX,tilegx,r51);
- GENOFFSET(TILEGX,tilegx,r52);
- GENOFFSET(TILEGX,tilegx,r53);
- GENOFFSET(TILEGX,tilegx,r54);
- GENOFFSET(TILEGX,tilegx,r55);
- GENOFFSET(TILEGX,tilegx,pc);
- GENOFFSET(TILEGX,tilegx,EMNOTE);
- GENOFFSET(TILEGX,tilegx,CMSTART);
- GENOFFSET(TILEGX,tilegx,NRADDR);
}
/*--------------------------------------------------------------------*/
Removed: trunk/priv/guest_tilegx_defs.h
==============================================================================
--- trunk/priv/guest_tilegx_defs.h (original)
+++ trunk/priv/guest_tilegx_defs.h (removed)
@@ -1,110 +0,0 @@
-/*---------------------------------------------------------------*/
-/*--- begin guest_tilegx_defs.h ---*/
-/*---------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2010-2017 Tilera Corp.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
- /* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */
-
-#ifndef __VEX_GUEST_TILEGX_DEFS_H
-#define __VEX_GUEST_TILEGX_DEFS_H
-
-#ifdef __tilegx__
-#include "tilegx_disasm.h"
-#endif
-
-/*---------------------------------------------------------*/
-/*--- tilegx to IR conversion ---*/
-/*---------------------------------------------------------*/
-
-/* Convert one TILEGX insn to IR. See the type DisOneInstrFn in
- guest_generic_bb_to_IR.h. */
-extern DisResult disInstr_TILEGX ( IRSB* irbb,
- Bool (*resteerOkFn) ( void *, Addr ),
- Bool resteerCisOk,
- void* callback_opaque,
- const UChar* guest_code,
- Long delta,
- Addr guest_IP,
- VexArch guest_arch,
- const VexArchInfo* archinfo,
- const VexAbiInfo* abiinfo,
- VexEndness host_endness_IN,
- Bool sigill_diag_IN );
-
-/* Used by the optimiser to specialise calls to helpers. */
-extern IRExpr *guest_tilegx_spechelper ( const HChar * function_name,
- IRExpr ** args,
- IRStmt ** precedingStmts,
- Int n_precedingStmts );
-
-/* Describes to the optimser which part of the guest state require
- precise memory exceptions. This is logically part of the guest
- state description. */
-extern Bool guest_tilegx_state_requires_precise_mem_exns (
- Int, Int, VexRegisterUpdates );
-
-extern VexGuestLayout tilegxGuest_layout;
-
-/*---------------------------------------------------------*/
-/*--- tilegx guest helpers ---*/
-/*---------------------------------------------------------*/
-
-extern ULong tilegx_dirtyhelper_gen ( ULong opc,
- ULong rd0,
- ULong rd1,
- ULong rd2,
- ULong rd3 );
-
-/*---------------------------------------------------------*/
-/*--- Condition code stuff ---*/
-/*---------------------------------------------------------*/
-
-/* Defines conditions which we can ask for TILEGX */
-
-typedef enum {
- TILEGXCondEQ = 0, /* equal : Z=1 */
- TILEGXCondNE = 1, /* not equal : Z=0 */
- TILEGXCondHS = 2, /* >=u (higher or same) : C=1 */
- TILEGXCondLO = 3, /* <u (lower) : C=0 */
- TILEGXCondMI = 4, /* minus (negative) : N=1 */
- TILEGXCondPL = 5, /* plus (zero or +ve) : N=0 */
- TILEGXCondVS = 6, /* overflow : V=1 */
- TILEGXCondVC = 7, /* no overflow : V=0 */
- TILEGXCondHI = 8, /* >u (higher) : C=1 && Z=0 */
- TILEGXCondLS = 9, /* <=u (lower or same) : C=0 || Z=1 */
- TILEGXCondGE = 10, /* >=s (signed greater or equal) : N=V */
- TILEGXCondLT = 11, /* <s (signed less than) : N!=V */
- TILEGXCondGT = 12, /* >s (signed greater) : Z=0 && N=V */
- TILEGXCondLE = 13, /* <=s (signed less or equal) : Z=1 || N!=V */
- TILEGXCondAL = 14, /* always (unconditional) : 1 */
- TILEGXCondNV = 15 /* never (unconditional): : 0 */
-} TILEGXCondcode;
-
-#endif /* __VEX_GUEST_TILEGX_DEFS_H */
-
-/*---------------------------------------------------------------*/
-/*--- end guest_tilegx_defs.h ---*/
-/*---------------------------------------------------------------*/
Removed: trunk/priv/guest_tilegx_helpers.c
==============================================================================
--- trunk/priv/guest_tilegx_helpers.c (original)
+++ trunk/priv/guest_tilegx_helpers.c (removed)
@@ -1,1103 +0,0 @@
-/*---------------------------------------------------------------*/
-/*--- begin guest_tilegx_helpers.c ---*/
-/*---------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2010-2017 Tilera Corp.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
-/* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */
-
-#include "libvex_basictypes.h"
-#include "libvex_emnote.h"
-#include "libvex_guest_tilegx.h"
-#include "libvex_ir.h"
-#include "libvex.h"
-
-#include "main_util.h"
-#include "guest_generic_bb_to_IR.h"
-#include "guest_tilegx_defs.h"
-
-/* This file contains helper functions for tilegx guest code. Calls to
- these functions are generated by the back end.
-*/
-
-#define ALWAYSDEFD(field) \
- { offsetof(VexGuestTILEGXState, field), \
- (sizeof ((VexGuestTILEGXState*)0)->field) }
-
-IRExpr *guest_tilegx_spechelper ( const HChar * function_name, IRExpr ** args,
- IRStmt ** precedingStmts, Int n_precedingStmts)
-{
- return NULL;
-}
-
-/* VISIBLE TO LIBVEX CLIENT */
-void LibVEX_GuestTILEGX_initialise ( VexGuestTILEGXState * vex_state )
-{
- vex_state->guest_r0 = 0;
- vex_state->guest_r1 = 0;
- vex_state->guest_r2 = 0;
- vex_state->guest_r3 = 0;
- vex_state->guest_r4 = 0;
- vex_state->guest_r5 = 0;
- vex_state->guest_r6 = 0;
- vex_state->guest_r7 = 0;
- vex_state->guest_r8 = 0;
- vex_state->guest_r9 = 0;
- vex_state->guest_r10 = 0;
- vex_state->guest_r11 = 0;
- vex_state->guest_r12 = 0;
- vex_state->guest_r13 = 0;
- vex_state->guest_r14 = 0;
- vex_state->guest_r15 = 0;
- vex_state->guest_r16 = 0;
- vex_state->guest_r17 = 0;
- vex_state->guest_r18 = 0;
- vex_state->guest_r19 = 0;
- vex_state->guest_r20 = 0;
- vex_state->guest_r21 = 0;
- vex_state->guest_r22 = 0;
- vex_state->guest_r23 = 0;
- vex_state->guest_r24 = 0;
- vex_state->guest_r25 = 0;
- vex_state->guest_r26 = 0;
- vex_state->guest_r27 = 0;
- vex_state->guest_r28 = 0;
- vex_state->guest_r29 = 0;
- vex_state->guest_r30 = 0;
- vex_state->guest_r31 = 0;
- vex_state->guest_r32 = 0;
- vex_state->guest_r33 = 0;
- vex_state->guest_r34 = 0;
- vex_state->guest_r35 = 0;
- vex_state->guest_r36 = 0;
- vex_state->guest_r37 = 0;
- vex_state->guest_r38 = 0;
- vex_state->guest_r39 = 0;
- vex_state->guest_r40 = 0;
- vex_state->guest_r41 = 0;
- vex_state->guest_r42 = 0;
- vex_state->guest_r43 = 0;
- vex_state->guest_r44 = 0;
- vex_state->guest_r45 = 0;
- vex_state->guest_r46 = 0;
- vex_state->guest_r47 = 0;
- vex_state->guest_r48 = 0;
- vex_state->guest_r49 = 0;
- vex_state->guest_r50 = 0;
- vex_state->guest_r51 = 0;
- vex_state->guest_r52 = 0;
- vex_state->guest_r53 = 0;
- vex_state->guest_r54 = 0;
- vex_state->guest_r55 = 0;
-
- vex_state->guest_pc = 0; /* Program counter */
-
- vex_state->guest_EMNOTE = 0;
- vex_state->guest_CMSTART = 0;
-
- /* For clflush: record start and length of area to invalidate */
- vex_state->guest_CMSTART = 0;
- vex_state->guest_CMLEN = 0;
-
- /* Used to record the unredirected guest address at the start of
- a translation whose start has been redirected. By reading
- this pseudo-register shortly afterwards, the translation can
- find out what the corresponding no-redirection address was.
- Note, this is only set for wrap-style redirects, not for
- replace-style ones. */
- vex_state->guest_NRADDR = 0;
-}
-
-/*-----------------------------------------------------------*/
-/*--- Describing the tilegx guest state, for the benefit ---*/
-/*--- of iropt and instrumenters. ---*/
-/*-----------------------------------------------------------*/
-
-/* Figure out if any part of the guest state contained in minoff
- .. maxoff requires precise memory exceptions. If in doubt return
- True (but this is generates significantly slower code).
-
- We enforce precise exns for guest SP, PC.
-*/
-Bool guest_tilegx_state_requires_precise_mem_exns (
- Int minoff, Int maxoff,
- VexRegisterUpdates pxControl)
-{
- Int sp_min = offsetof(VexGuestTILEGXState, guest_r54);
- Int sp_max = sp_min + 8 - 1;
- Int pc_min = offsetof(VexGuestTILEGXState, guest_pc);
- Int pc_max = pc_min + 8 - 1;
-
- if (maxoff < sp_min || minoff > sp_max) {
- /* no overlap with sp */
- if (pxControl == VexRegUpdSpAtMemAccess)
- return False; /* We only need to check stack pointer. */
- } else {
- return True;
- }
-
- if (maxoff < pc_min || minoff > pc_max) {
- /* no overlap with pc */
- } else {
- return True;
- }
-
- /* We appear to need precise updates of R52 in order to get proper
- stacktraces from non-optimised code. */
- Int fp_min = offsetof(VexGuestTILEGXState, guest_r52);
- Int fp_max = fp_min + 8 - 1;
-
- if (maxoff < fp_min || minoff > fp_max) {
- /* no overlap with fp */
- } else {
- return True;
- }
-
- return False;
-}
-
-VexGuestLayout tilegxGuest_layout = {
- /* Total size of the guest state, in bytes. */
- .total_sizeB = sizeof(VexGuestTILEGXState),
- /* Describe the stack pointer. */
- .offset_SP = offsetof(VexGuestTILEGXState, guest_r54),
- .sizeof_SP = 8,
- /* Describe the frame pointer. */
- .offset_FP = offsetof(VexGuestTILEGXState, guest_r52),
- .sizeof_FP = 8,
- /* Describe the instruction pointer. */
- .offset_IP = offsetof(VexGuestTILEGXState, guest_pc),
- .sizeof_IP = 8,
- /* Describe any sections to be regarded by Memcheck as
- 'always-defined'. */
- .n_alwaysDefd = 8,
- /* ? :( */
- .alwaysDefd = {
- /* 0 */ ALWAYSDEFD(guest_r0),
- /* 1 */ ALWAYSDEFD(guest_r1),
- /* 2 */ ALWAYSDEFD(guest_EMNOTE),
- /* 3 */ ALWAYSDEFD(guest_CMSTART),
- /* 4 */ ALWAYSDEFD(guest_CMLEN),
- /* 5 */ ALWAYSDEFD(guest_r52),
- /* 6 */ ALWAYSDEFD(guest_r55),
- /* 7 */ ALWAYSDEFD(guest_pc),
- }
-};
-
-#ifdef __tilegx__
-ULong tilegx_dirtyhelper_gen ( ULong opc,
- ULong rd0, ULong rd1,
- ULong rd2, ULong rd3)
-{
- switch (opc)
- {
- case 0:
- {
- /* break point */
- switch (rd0) {
- case 0x286a44ae90048fffULL:
- asm (" bpt ");
- break;
- default:
- vex_printf("unhandled \"bpt\": cins=%016llx\n", rd0);
-
- vassert(0);
- return 0;
- }
- }
- break;
- case 28:
- {
- return __insn_addxsc(rd1, rd2);
- }
- break;
-
- case 150:
- {
- __insn_mf();
- return 0;
- }
- break;
-
- case 152: /* mm rd, ra, imm0, imm1 */
- {
- ULong mask;
-
- if( rd2 <= rd3)
- mask = (-1ULL << rd2) ^ ((-1ULL << rd3) << 1);
- else
- mask = (-1ULL << rd2) | (-1ULL >> (63 - rd3));
-
- return (rd0 & mask) | (rd1 & (-1ULL ^ mask));
- }
- break;
- case 154: /* mtspr imm, ra */
- {
- switch(rd0)
- {
- case 0x2785:
- __insn_mtspr(0x2785, rd1);
- break;
- case 0x2780:
- __insn_mtspr(0x2780, rd1);
- break;
- case 0x2708:
- __insn_mtspr(0x2708, rd1);
- break;
- case 0x2580:
- __insn_mtspr(0x2580, rd1);
- break;
- case 0x2581:
- __insn_mtspr(0x2581, rd1);
- break;
- case 0x2709: // PASS
- __insn_mtspr(0x2709, rd1);
- break;
- case 0x2707: // FAIL
- __insn_mtspr(0x2707, rd1);
- break;
- case 0x2705: // DONE
- __insn_mtspr(0x2705, rd1);
- break;
-
- case 0x2870: //
-
- default:
- vex_printf("opc=%d rd0=%llx rd1=%llx\n",
- (int)opc, rd0, rd1);
- vassert(0);
- }
- }
- break;
-
- case 151: /* mfspr rd, imm */
- {
- switch(rd1)
- {
- case 0x2785: // SIM_CTRL
- return __insn_mfspr(0x2785);
- break;
-
- case 0x2708: // ICS
- return __insn_mfspr(0x2708);
- break;
-
- case 0x2780: // CMPEXCH_VALUE
- return __insn_mfspr(0x2780);
- break;
-
- case 0x2781: // CYCLE
- return __insn_mfspr(0x2781);
- break;
-
- case 0x2709: // PASS
- return __insn_mfspr(0x2709);
- break;
-
- case 0x2707: // FAIL
- return __insn_mfspr(0x2707);
- break;
-
- case 0x2705: // DONE
- return __insn_mfspr(0x2705);
- break;
-
- case 0x2580: // EX_CONTEXT_0
- return __insn_mfspr(0x2580);
- break;
-
- case 0x2581: // EX_CONTEXT_1
- return __insn_mfspr(0x2581);
- break;
-
- default:
- vex_printf("opc=%d rd0=%llx rd1=%llx\n",
- (int)opc, rd0, rd1);
- vassert(0);
- }
- }
- break;
- case 183:
- {
- return __insn_pcnt(rd1);
- }
- break;
- case 184:
- {
- return __insn_revbits(rd1);
- }
- break;
- case 185: /* revbytes rd, ra */
- {
- return __insn_revbytes(rd1);
- }
- break;
-
- case 102:
- return __insn_fsingle_add1(rd1, rd2);
- break;
-
- case 103:
- return __insn_fsingle_addsub2(rd0, rd1, rd2);
- break;
-
- case 104:
- return __insn_fsingle_mul1(rd1, rd2);
- break;
-
- case 105:
- return __insn_fsingle_mul2(rd1, rd2);
- break;
-
- case 106:
- return __insn_fsingle_pack1(rd1);
- break;
-
- case 107:
- return __insn_fsingle_pack2(rd1, rd2);
- break;
-
- case 108:
- return __insn_fsingle_sub1(rd1, rd2);
- break;
-
- case 21:
- switch (rd0) {
- case 0x286a44ae90048fffULL:
- asm ("{ moveli zero, 72 ; raise }");
- break;
- default:
- vex_printf("unhandled \"raise\": cins=%016llx\n", rd0);
- __insn_ill();
- return 0;
- }
- break;
-
- case 64:
- {
- return __insn_cmul(rd1, rd2);
- }
- break;
- case 65:
- {
- return __insn_cmula(rd0, rd1, rd2);
- }
- break;
- case 66:
- {
- return __insn_cmulaf(rd0, rd1, rd2);
- }
- break;
- case 67:
- {
- return __insn_cmulf(rd1, rd2);
- }
- break;
- case 68:
- {
- return __insn_cmulfr(rd1, rd2);
- }
- break;
- case 69:
- {
- return __insn_cmulh(rd1, rd2);
- }
- break;
- case 70:
- {
- return __insn_cmulhr(rd1, rd2);
- }
- break;
- case 71:
- {
- return __insn_crc32_32(rd1, rd2);
- }
- break;
- case 72:
- {
- return __insn_crc32_8(rd1, rd2);
- }
- break;
- case 75:
- {
- return __insn_dblalign2(rd1, rd2);
- }
- break;
- case 76:
- {
- return __insn_dblalign4(rd1, rd2);
- }
- break;
- case 77:
- {
- return __insn_dblalign6(rd1, rd2);
- }
- break;
- case 78:
- {
- __insn_drain();
- return 0;
- }
- break;
- case 79:
- {
- __insn_dtlbpr(rd0);
- return 0;
- }
- break;
- case 82:
- {
- return __insn_fdouble_add_flags(rd1, rd2);
- }
- break;
- case 83:
- {
- return __insn_fdouble_addsub(rd0, rd1, rd2);
- }
- break;
- case 84:
- {
- return __insn_fdouble_mul_flags(rd1, rd2);
- }
- break;
- case 85:
- {
- return __insn_fdouble_pack1(rd1, rd2);
- }
- break;
- case 86:
- {
- return __insn_fdouble_pack2(rd0, rd1, rd2);
- }
- break;
- case 87:
- {
- return __insn_fdouble_sub_flags(rd1, rd2);
- }
- break;
- case 88:
- {
- return __insn_fdouble_unpack_max(rd1, rd2);
- }
- break;
- case 89:
- {
- return __insn_fdouble_unpack_min(rd1, rd2);
- }
- break;
-
- case 98:
- {
- __insn_finv(rd0);
- return 0;
- }
- break;
- case 99:
- {
- __insn_flush(rd0);
- return 0;
- }
- break;
- case 100:
- {
- __insn_flushwb();
- return 0;
- }
- break;
-
- case 109:
- {
- __insn_icoh((ULong *)rd0);
- return 0;
- }
- break;
- case 110:
- {
- __insn_ill();
- }
- break;
- case 111:
- {
- __insn_inv((ULong *)rd0);
- return 0;
- }
- break;
-
- case 169:
- {
- return __insn_mula_hu_hu(rd0, rd1, rd2);
- }
- break;
- case 170:
- {
- return __insn_mula_hu_ls(rd0, rd1, rd2);
- }
- break;
- case 205:
- {
- return __insn_shufflebytes(rd0, rd1, rd2);
- }
- break;
- case 224:
- {
- return __insn_subxsc(rd1, rd2);
- }
- break;
- case 229:
- {
- return __insn_tblidxb0(rd0, rd1);
- }
- break;
- case 230:
- {
- return __insn_tblidxb1(rd0, rd1);
- }
- break;
- case 231:
- {
- return __insn_tblidxb2(rd0, rd1);
- }
- break;
- case 232:
- {
- return __insn_tblidxb3(rd0, rd1);
- }
- break;
- case 233:
- {
- return __insn_v1add(rd1, rd2);
- }
- break;
- case 234:
- {
- return __insn_v1add(rd1, rd2);
- }
- break;
- case 235:
- {
- return __insn_v1adduc(rd1, rd2);
- }
- break;
- case 236:
- {
- return __insn_v1adiffu(rd1, rd2);
- }
- break;
- case 237:
- {
- return __insn_v1avgu(rd1, rd2);
- }
- break;
-
- case 238:
- {
- return __insn_v1cmpeq(rd1, rd2);
- }
- break;
- case 239:
- {
- return __insn_v1cmpeq(rd1, rd2);
- }
- break;
- case 240:
- {
- return __insn_v1cmples(rd1, rd2);
- }
- break;
- case 241:
- {
- return __insn_v1cmpleu(rd1, rd2);
- }
- break;
- case 242:
- {
- return __insn_v1cmplts(rd1, rd2);
- }
- break;
- case 243:
- {
- return __insn_v1cmplts(rd1, rd2);
- }
- break;
- case 244:
- {
- return __insn_v1cmpltu(rd1, rd2);
- }
- break;
- case 245:
- {
- return __insn_v1cmpltu(rd1, rd2);
- }
- break;
- case 246:
- {
- return __insn_v1cmpne(rd1, rd2);
- }
- break;
- case 247:
- {
- return __insn_v1ddotpu(rd1, rd2);
- }
- break;
- case 248:
- {
- return __insn_v1ddotpua(rd0, rd1, rd2);
- }
- break;
- case 249:
- {
- return __insn_v1ddotpus(rd1, rd2);
- }
- break;
- case 250:
- {
- return __insn_v1ddotpusa(rd0, rd1, rd2);
- }
- break;
- case 251:
- {
- return __insn_v1dotp(rd1, rd2);
- }
- break;
- case 252:
- {
- return __insn_v1dotpa(rd0, rd1, rd2);
- }
- break;
- case 253:
- {
- return __insn_v1dotpu(rd1, rd2);
- }
- break;
- case 254:
- {
- return __insn_v1dotpua(rd0, rd1, rd2);
- }
- break;
- case 255:
- {
- return __insn_v1dotpus(rd1, rd2);
- }
- break;
- case 256:
- {
- return __insn_v1dotpusa(rd0, rd1, rd2);
- }
- break;
- case 257:
- {
- return __insn_v1int_h(rd1, rd2);
- }
- break;
- case 258:
- {
- return __insn_v1int_l(rd1, rd2);
- }
- break;
- case 259:
- {
- return __insn_v1maxu(rd1, rd2);
- }
- break;
- case 260:
- {
- return __insn_v1maxu(rd1, rd2);
- }
- break;
- case 261:
- {
- return __insn_v1minu(rd1, rd2);
- }
- break;
- case 262:
- {
- return __insn_v1minu(rd1, rd2);
- }
- break;
- case 263:
- {
- return __insn_v1mnz(rd1, rd2);
- }
- break;
- case 264:
- {
- return __insn_v1multu(rd1, rd2);
- }
- break;
- case 265:
- {
- return __insn_v1mulu(rd1, rd2);
- }
- break;
- case 266:
- {
- return __insn_v1mulus(rd1, rd2);
- }
- break;
- case 267:
- {
- return __insn_v1mz(rd1, rd2);
- }
- break;
- case 268:
- {
- return __insn_v1sadau(rd0, rd1, rd2);
- }
- break;
- case 269:
- {
- return __insn_v1sadu(rd1, rd2);
- }
- break;
- case 270:
- {
- return __insn_v1shl(rd1, rd2);
- }
- break;
- case 271:
- {
- return __insn_v1shl(rd1, rd2);
- }
- break;
- case 272:
- {
- return __insn_v1shrs(rd1, rd2);
- }
- break;
- case 273:
- {
- return __insn_v1shrs(rd1, rd2);
- }
- break;
- case 274:
- {
- return __insn_v1shru(rd1, rd2);
- }
- break;
- case 275:
- {
- return __insn_v1shrui(rd1, rd2);
- }
- break;
- case 276:
- {
- return __insn_v1sub(rd1, rd2);
- }
- break;
- case 277:
- {
- return __insn_v1subuc(rd1, rd2);
- }
- break;
- case 278:
- {
- return __insn_v2add(rd1, rd2);
- }
- break;
- case 279:
- {
- return __insn_v2add(rd1, rd2);
- }
- break;
- case 280:
- {
- return __insn_v2addsc(rd1, rd2);
- }
- break;
- case 281:
- {
- return __insn_v2adiffs(rd1, rd2);
- }
- break;
- case 282:
- {
- return __insn_v2avgs(rd1, rd2);
- }
- break;
- case 283:
- {
- return __insn_v2cmpeq(rd1, rd2);
- }
- break;
- case 284:
- {
- return __insn_v2cmpeq(rd1, rd2);
- }
- break;
- case 285:
- {
- return __insn_v2cmples(rd1, rd2);
- }
- break;
- case 286:
- {
- return __insn_v2cmpleu(rd1, rd2);
- }
- break;
- case 287:
- {
- return __insn_v2cmplts(rd1, rd2);
- }
- break;
- case 288:
- {
- return __insn_v2cmplts(rd1, rd2);
- }
- break;
- case 289:
- {
- return __insn_v2cmpltu(rd1, rd2);
- }
- break;
- case 290:
- {
- return __insn_v2cmpltu(rd1, rd2);
- }
- break;
- case 291:
- {
- return __insn_v2cmpne(rd1, rd2);
- }
- break;
- case 292:
- {
- return __insn_v2dotp(rd1, rd2);
- }
- break;
- case 293:
- {
- return __insn_v2dotpa(rd0, rd1, rd2);
- }
- break;
- case 294:
- {
- return __insn_v2int_h(rd1, rd2);
- }
- break;
- case 295:
- {
- return __insn_v2int_l(rd1, rd2);
- }
- break;
- case 296:
- {
- return __insn_v2maxs(rd1, rd2);
- }
- break;
- case 297:
- {
- return __insn_v2maxs(rd1, rd2);
- }
- break;
- case 298:
- {
- return __insn_v2mins(rd1, rd2);
- }
- break;
- case 299:
- {
- return __insn_v2mins(rd1, rd2);
- }
- break;
- case 300:
- {
- return __insn_v2mnz(rd1, rd2);
- }
- break;
- case 301:
- {
- return __insn_v2mulfsc(rd1, rd2);
- }
- break;
- case 302:
- {
- return __insn_v2muls(rd1, rd2);
- }
- break;
- case 303:
- {
- return __insn_v2mults(rd1, rd2);
- }
- break;
- case 304:
- {
- return __insn_v2mz(rd1, rd2);
- }
- break;
- case 305:
- {
- return __insn_v2packh(rd1, rd2);
- }
- break;
- case 306:
- {
- return __insn_v2packl(rd1, rd2);
- }
- break;
- case 307:
- {
- return __insn_v2packuc(rd1, rd2);
- }
- break;
- case 308:
- {
- return __insn_v2sadas(rd0, rd1, rd2);
- }
- break;
- case 309:
- {
- return __insn_v2sadau(rd0, rd1, rd2);
- }
- break;
- case 310:
- {
- return __insn_v2sads(rd1, rd2);
- }
- break;
- case 311:
- {
- return __insn_v2sadu(rd1, rd2);
- }
- break;
- case 312:
- {
- return __insn_v2shl(rd1, rd2);
- }
- break;
- case 313:
- {
- return __insn_v2shl(rd1, rd2);
- }
- break;
- case 314:
- {
- return __insn_v2shlsc(rd1, rd2);
- }
- break;
- case 315:
- {
- return __insn_v2shrs(rd1, rd2);
- }
- break;
- case 316:
- {
- return __insn_v2shrs(rd1, rd2);
- }
- break;
- case 317:
- {
- return __insn_v2shru(rd1, rd2);
- }
- break;
- case 318:
- {
- return __insn_v2shru(rd1, rd2);
- }
- break;
- case 319:
- {
- return __insn_v2sub(rd1, rd2);
- }
- break;
- case 320:
- {
- return __insn_v2subsc(rd1, rd2);
- }
- break;
- case 321:
- {
- return __insn_v4add(rd1, rd2);
- }
- break;
- case 322:
- {
- return __insn_v4addsc(rd1, rd2);
- }
- break;
- case 323:
- {
- return __insn_v4int_h(rd1, rd2);
- }
- break;
- case 324:
- {
- return __insn_v4int_l(rd1, rd2);
- }
- break;
- case 325:
- {
- return __insn_v4packsc(rd1, rd2);
- }
- break;
- case 326:
- {
- return __insn_v4shl(rd1, rd2);
- }
- break;
- case 327:
- {
- return __insn_v4shlsc(rd1, rd2);
- }
- break;
- case 328:
- {
- return __insn_v4shrs(rd1, rd2);
- }
- break;
- case 329:
- {
- return __insn_v4shru(rd1, rd2);
- }
- break;
- case 330:
- {
- return __insn_v4sub(rd1, rd2);
- }
- break;
- case 331:
- {
- return __insn_v4subsc(rd1, rd2);
- }
- break;
-
- default:
- vex_printf("opc=%d rd0=%llx rd1=%llx\n",
- (int)opc, rd0, rd1);
- vassert(0);
- }
-}
-#else
-ULong tilegx_dirtyhelper_gen ( ULong opc,
- ULong rd0, ULong rd1,
- ULong rd2, ULong rd3 )
-{
- vex_printf("NOT a TILEGX platform");
- return 0;
-}
-#endif /* __tilegx__ */
-
-/*---------------------------------------------------------------*/
-/*--- end guest_tilegx_helpers.c ---*/
-/*---------------------------------------------------------------*/
Removed: trunk/priv/guest_tilegx_toIR.c
==============================================================================
--- trunk/priv/guest_tilegx_toIR.c (original)
+++ trunk/priv/guest_tilegx_toIR.c (removed)
@@ -1,2578 +0,0 @@
-
-/*--------------------------------------------------------------------*/
-/*--- begin guest_tilegx_toIR.c ---*/
-/*--------------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2010-2017 Tilera Corp.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
-/* Contributed by Zhi-Gang Liu <zliu at tilera dot com> */
-
-/* Translates TILEGX code to IR. */
-
-#include "libvex_basictypes.h"
-#include "libvex_ir.h"
-#include "libvex.h"
-#include "libvex_guest_tilegx.h"
-
-#include "main_util.h"
-#include "main_globals.h"
-#include "guest_generic_bb_to_IR.h"
-#include "guest_tilegx_defs.h"
-#include "tilegx_disasm.h"
-
-/*------------------------------------------------------------*/
-/*--- Globals ---*/
-/*------------------------------------------------------------*/
-
-/* These are set at the start of the translation of a instruction, so
- that we don't have to pass them around endlessly. CONST means does
- not change during translation of the instruction.
-*/
-
-/* CONST: is the host bigendian? This has to do with float vs double
- register accesses on VFP, but it's complex and not properly thought
- out. */
-static VexEndness host_endness;
-
-/* Pointer to the guest code area. */
-static UChar *guest_code;
-
-/* The guest address corresponding to guest_code[0]. */
-static Addr64 guest_PC_bbstart;
-
-/* CONST: The guest address for the instruction currently being
- translated. */
-static Addr64 guest_PC_curr_instr;
-
-/* MOD: The IRSB* into which we're generating code. */
-static IRSB *irsb;
-
-/*------------------------------------------------------------*/
-/*--- Debugging output ---*/
-/*------------------------------------------------------------*/
-
-#define DIP(format, args...) \
- if (vex_traceflags & VEX_TRACE_FE) \
- vex_printf(format, ## args)
-
-/*------------------------------------------------------------*/
-/*--- Helper bits and pieces for deconstructing the ---*/
-/*--- tilegx insn stream. ---*/
-/*------------------------------------------------------------*/
-
-static Int integerGuestRegOffset ( UInt iregNo )
-{
- return 8 * (iregNo);
-}
-
-/*------------------------------------------------------------*/
-/*--- Field helpers ---*/
-/*------------------------------------------------------------*/
-
-/*------------------------------------------------------------*/
-/*--- Helper bits and pieces for creating IR fragments. ---*/
-/*------------------------------------------------------------*/
-
-static IRExpr *mkU8 ( UInt i )
-{
- return IRExpr_Const(IRConst_U8((UChar) i));
-}
-
-/* Create an expression node for a 32-bit integer constant */
-static IRExpr *mkU32 ( UInt i )
-{
- return IRExpr_Const(IRConst_U32(i));
-}
-
-/* Create an expression node for a 64-bit integer constant */
-static IRExpr *mkU64 ( ULong i )
-{
- return IRExpr_Const(IRConst_U64(i));
-}
-
-static IRExpr *mkexpr ( IRTemp tmp )
-{
- return IRExpr_RdTmp(tmp);
-}
-
-static IRExpr *unop ( IROp op, IRExpr * a )
-{
- return IRExpr_Unop(op, a);
-}
-
-static IRExpr *binop ( IROp op, IRExpr * a1, IRExpr * a2 )
-{
- return IRExpr_Binop(op, a1, a2);
-}
-
-static IRExpr *load ( IRType ty, IRExpr * addr )
-{
- IRExpr *load1 = NULL;
-
- load1 = IRExpr_Load(Iend_LE, ty, addr);
- return load1;
-}
-
-/* Add a statement to the list held by "irsb". */
-static void stmt ( IRStmt * st )
-{
- addStmtToIRSB(irsb, st);
-}
-
-#define OFFB_PC offsetof(VexGuestTILEGXState, guest_pc)
-
-static void putPC ( IRExpr * e )
-{
- stmt(IRStmt_Put(OFFB_PC, e));
-}
-
-static void assign ( IRTemp dst, IRExpr * e )
-{
- stmt(IRStmt_WrTmp(dst, e));
-}
-
-static void store ( IRExpr * addr, IRExpr * data )
-{
- stmt(IRStmt_Store(Iend_LE, addr, data));
-}
-
-/* Generate a new temporary of the given type. */
-static IRTemp newTemp ( IRType ty )
-{
- vassert(isPlausibleIRType(ty));
- return newIRTemp(irsb->tyenv, ty);
-}
-
-static ULong extend_s_16to64 ( UInt x )
-{
- return (ULong) ((((Long) x) << 48) >> 48);
-}
-
-static ULong extend_s_8to64 ( UInt x )
-{
- return (ULong) ((((Long) x) << 56) >> 56);
-}
-
-static IRExpr *getIReg ( UInt iregNo )
-{
- IRType ty = Ity_I64;
- if(!(iregNo < 56 || iregNo == 63 ||
- (iregNo >= 70 && iregNo <= 73))) {
- vex_printf("iregNo=%u\n", iregNo);
- vassert(0);
- }
- return IRExpr_Get(integerGuestRegOffset(iregNo), ty);
-}
-
-static void putIReg ( UInt archreg, IRExpr * e )
-{
- IRType ty = Ity_I64;
- if(!(archreg < 56 || archreg == 63 || archreg == 70 ||
- archreg == 72 || archreg == 73)) {
- vex_printf("archreg=%u\n", archreg);
- vassert(0);
- }
- vassert(typeOfIRExpr(irsb->tyenv, e) == ty);
- if (archreg != 63)
- stmt(IRStmt_Put(integerGuestRegOffset(archreg), e));
-}
-
-/* Narrow 8/16/32 bit int expr to 8/16/32. Clearly only some
- of these combinations make sense. */
-static IRExpr *narrowTo ( IRType dst_ty, IRExpr * e )
-{
- IRType src_ty = typeOfIRExpr(irsb->tyenv, e);
- if (src_ty == dst_ty)
- return e;
- if (src_ty == Ity_I32 && dst_ty == Ity_I16)
- return unop(Iop_32to16, e);
- if (src_ty == Ity_I32 && dst_ty == Ity_I8)
- return unop(Iop_32to8, e);
-
- if (src_ty == Ity_I64 && dst_ty == Ity_I8) {
- return unop(Iop_64to8, e);
- }
- if (src_ty == Ity_I64 && dst_ty == Ity_I16) {
- return unop(Iop_64to16, e);
- }
- if (src_ty == Ity_I64 && dst_ty == Ity_I32) {
- return unop(Iop_64to32, e);
- }
-
- if (vex_traceflags & VEX_TRACE_FE) {
- vex_printf("\nsrc, dst tys are: ");
- ppIRType(src_ty);
- vex_printf(", ");
- ppIRType(dst_ty);
- vex_printf("\n");
- }
- vpanic("narrowTo(tilegx)");
- return e;
-}
-
-#define signExtend(_e, _n) \
- ((_n == 32) ? \
- unop(Iop_32Sto64, _e) : \
- ((_n == 16) ? \
- unop(Iop_16Sto64, _e) : \
- (binop(Iop_Sar64, binop(Iop_Shl64, _e, mkU8(63 - (_n))), mkU8(63 - (_n))))))
-
-static IRStmt* dis_branch ( IRExpr* guard, ULong imm )
-{
- IRTemp t0;
-
- t0 = newTemp(Ity_I1);
- assign(t0, guard);
- return IRStmt_Exit(mkexpr(t0), Ijk_Boring,
- IRConst_U64(imm), OFFB_PC);
-}
-
-#define MARK_REG_WB(_rd, _td) \
- do { \
- vassert(rd_wb_index < 6); \
- rd_wb_temp[rd_wb_index] = _td; \
- rd_wb_reg[rd_wb_index] = _rd; \
- rd_wb_index++; \
- } while(0)
-
-
-/* Expand/repeat byte _X 8 times to a 64-bit value */
-#define V1EXP(_X) \
- ({ \
- _X = ((((UChar)(_X)) << 8) | ((UChar)(_X))); \
- _X = (((_X) << 16) | (_X)); \
- (((_X) << 32) | (_X)); \
- })
-
-/* Expand/repeat byte _X 4 times to a 64-bit value */
-#define V2EXP(_X) \
- ({ \
- _X = ((((UChar)(_X)) << 16) | ((UChar)(_X))); \
- (((_X) << 32) | (_X)); \
- })
-
-/*------------------------------------------------------------*/
-/*--- Disassemble a single instruction ---*/
-/*------------------------------------------------------------*/
-
-/* Disassemble a single instruction bundle into IR. The bundle is
- located in host memory at guest_instr, and has guest IP of
- guest_PC_curr_instr, which will have been set before the call
- here. */
-static DisResult disInstr_TILEGX_WRK ( Bool(*resteerOkFn) (void *, Addr),
- Bool resteerCisOk,
- void *callback_opaque,
- Long delta64,
- const VexArchInfo * archinfo,
- const VexAbiInfo * abiinfo,
- Bool sigill_diag )
-{
- struct tilegx_decoded_instruction
- decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
- ULong cins, opcode = -1, rd, ra, rb, imm = 0;
- ULong opd[4];
- ULong opd_src_map, opd_dst_map, opd_imm_map;
- Int use_dirty_helper;
- IRTemp t0, t1, t2, t3, t4;
- IRTemp tb[4];
- IRTemp rd_wb_temp[6];
- ULong rd_wb_reg[6];
- /* Tilegx is a VLIW processor, we have to commit register write after read.*/
- Int rd_wb_index;
- Int n = 0, nr_insn;
- DisResult dres;
-
- /* The running delta */
- Long delta = delta64;
-
- /* Holds pc at the start of the insn, so that we can print
- consistent error messages for unimplemented insns. */
- //Long delta_start = delta;
-
- UChar *code = (UChar *) (guest_code + delta);
-
- IRStmt *bstmt = NULL; /* Branch statement. */
- IRExpr *next = NULL; /* Next bundle expr. */
- ULong jumpkind = Ijk_Boring;
- ULong steering_pc;
-
- /* Set result defaults. */
- dres.whatNext = Dis_Continue;
- dres.len = 0;
- dres.continueAt = 0;
- dres.jk_StopHere = Ijk_INVALID;
- dres.hint = Dis_HintNone;
-
- /* Verify the code addr is 8-byte aligned. */
- vassert((((Addr)code) & 7) == 0);
-
- /* Get the instruction bundle. */
- cins = *((ULong *)(Addr) code);
-
- /* "Special" instructions. */
- /* Spot the 16-byte preamble: ****tilegx****
- 0:02b3c7ff91234fff { moveli zero, 4660 ; moveli zero, 22136 }
- 8:0091a7ff95678fff { moveli zero, 22136 ; moveli zero, 4660 }
- */
-#define CL_W0 0x02b3c7ff91234fffULL
-#define CL_W1 0x0091a7ff95678fffULL
-
- if (*((ULong*)(Addr)(code)) == CL_W0 &&
- *((ULong*)(Addr)(code + 8)) == CL_W1) {
- /* Got a "Special" instruction preamble. Which one is it? */
- if (*((ULong*)(Addr)(code + 16)) ==
- 0x283a69a6d1483000ULL /* or r13, r13, r13 */ ) {
- /* r0 = client_request ( r12 ) */
- DIP("r0 = client_request ( r12 )\n");
-
- putPC(mkU64(guest_PC_curr_instr + 24));
-
- dres.jk_StopHere = Ijk_ClientReq;
- dres.whatNext = Dis_StopHere;
- dres.len = 24;
- goto decode_success;
-
- } else if (*((ULong*)(Addr)(code + 16)) ==
- 0x283a71c751483000ULL /* or r14, r14, r14 */ ) {
- /* r11 = guest_NRADDR */
- DIP("r11 = guest_NRADDR\n");
- dres.len = 24;
- putIReg(11, IRExpr_Get(offsetof(VexGuestTILEGXState, guest_NRADDR),
- Ity_I64));
- putPC(mkU64(guest_PC_curr_instr + 8));
- goto decode_success;
-
- } else if (*((ULong*)(Addr)(code + 16)) ==
- 0x283a79e7d1483000ULL /* or r15, r15, r15 */ ) {
- /* branch-and-link-to-noredir r12 */
- DIP("branch-and-link-to-noredir r12\n");
- dres.len = 24;
- putIReg(55, mkU64(guest_PC_curr_instr + 24));
-
- putPC(getIReg(12));
-
- dres.jk_StopHere = Ijk_NoRedir;
- dres.whatNext = Dis_StopHere;
- goto decode_success;
-
- } else if (*((ULong*)(Addr)(code + 16)) ==
- 0x283a5965d1483000ULL /* or r11, r11, r11 */ ) {
- /* vex-inject-ir */
- DIP("vex-inject-ir\n");
- dres.len = 24;
-
- vex_inject_ir(irsb, Iend_LE);
-
- stmt(IRStmt_Put(offsetof(VexGuestTILEGXState, guest_CMSTART),
- mkU64(guest_PC_curr_instr)));
- stmt(IRStmt_Put(offsetof(VexGuestTILEGXState, guest_CMLEN),
- mkU64(24)));
-
- /* 2 + 1 = 3 bundles. 24 bytes. */
- putPC(mkU64(guest_PC_curr_instr + 24));
-
- dres.jk_StopHere = Ijk_InvalICache;
- dres.whatNext = Dis_StopHere;
- goto decode_success;
- }
-
- /* We don't expect this. */
- vex_printf("%s: unexpect special bundles at %lx\n",
- __func__, (Addr)guest_PC_curr_instr);
- delta += 16;
- goto decode_failure;
- /*NOTREACHED*/
- }
-
- /* To decode the given instruction bundle. */
- nr_insn = parse_insn_tilegx((tilegx_bundle_bits)cins,
- (ULong)(Addr)code,
- decoded);
-
- if (vex_traceflags & VEX_TRACE_FE)
- decode_and_display(&cins, 1, (ULong)(Addr)code);
-
- /* Init. rb_wb_index */
- rd_wb_index = 0;
-
- steering_pc = -1ULL;
-
- for (n = 0; n < nr_insn; n++) {
- opcode = decoded[n].opcode->mnemonic;
- Int opi;
-
- rd = ra = rb = -1;
- opd[0] = opd[1] = opd[2] = opd[3] = -1;
- opd_dst_map = 0;
- opd_src_map = 0;
- opd_imm_map = 0;
-
- for (opi = 0; opi < decoded[n].opcode->num_operands; opi++) {
- const struct tilegx_operand *op = decoded[n].operands[opi];
- opd[opi] = decoded[n].operand_values[opi];
-
- /* Set the operands. rd, ra, rb and imm. */
- if (opi < 3) {
- if (op->is_dest_reg) {
- if (rd == -1)
- rd = decoded[n].operand_values[opi];
- else if (ra == -1)
- ra = decoded[n].operand_values[opi];
- } else if (op->is_src_reg) {
- if (ra == -1) {
- ra = decoded[n].operand_values[opi];
- } else if(rb == -1) {
- rb = decoded[n].operand_values[opi];
- } else {
- vassert(0);
- }
- } else {
- imm = decoded[n].operand_values[opi];
- }
- }
-
- /* Build bit maps of used dest, source registers
- and immediate. */
- if (op->is_dest_reg) {
- opd_dst_map |= 1ULL << opi;
- if(op->is_src_reg)
- opd_src_map |= 1ULL << opi;
- } else if(op->is_src_reg) {
- opd_src_map |= 1ULL << opi;
- } else {
- opd_imm_map |= 1ULL << opi;
- }
- }
-
- use_dirty_helper = 0;
-
- switch (opcode) {
- case 0: /* "bpt" */ /* "raise" */
- /* "bpt" pseudo instruction is an illegal instruction */
- opd_imm_map |= (1 << 0);
- opd[0] = cins;
- use_dirty_helper = 1;
- break;
- case 1: /* "info" */ /* Ignore this instruction. */
- break;
- case 2: /* "infol" */ /* Ignore this instruction. */
- break;
- case 3: /* "ld4s_tls" */ /* Ignore this instruction. */
- break;
- case 4: /* "ld_tls" */ /* Ignore this instruction. */
- break;
- case 5: /* "move" */
- t2 = newTemp(Ity_I64);
- assign(t2, getIReg(ra));
- MARK_REG_WB(rd, t2);
- break;
- case 6: /* "movei" */
- t2 = newTemp(Ity_I64);
- assign(t2, mkU64(extend_s_8to64(imm)));
- MARK_REG_WB(rd, t2);
- break;
- case 7: /* "moveli" */
- t2 = newTemp(Ity_I64);
- assign(t2, mkU64(extend_s_16to64(imm)));
- MARK_REG_WB(rd, t2);
- break;
- case 8: /* "prefetch" */ /* Ignore. */
- break;
- case 9: /* "prefetch_add_l1" */ /* Ignore. */
- break;
- case 10: /* "prefetch_add_l1_fault" */ /* Ignore. */
- break;
- case 11: /* "prefetch_add_l2" */ /* Ignore. */
- break;
- case 12: /* "prefetch_add_l2_fault" */ /* Ignore. */
- break;
- case 13: /* "prefetch_add_l3" */ /* Ignore. */
- break;
- case 14: /* "prefetch_add_l3_fault" */ /* Ignore. */
- break;
- case 15: /* "prefetch_l1" */ /* Ignore. */
- break;
- case 16: /* "prefetch_l1_fault" */ /* Ignore. */
- break;
- case 17: /* "prefetch_l2" */ /* Ignore. */
- break;
- case 18: /* "prefetch_l2_fault" */ /* Ignore. */
- break;
- case 19: /* "prefetch_l3" */ /* Ignore. */
- break;
- case 20: /* "prefetch_l3_fault" */ /* Ignore. */
- break;
- case 21: /* "raise" */
- /* "raise" pseudo instruction is an illegal instruction plusing
- a "moveli zero, <sig>", so we need save whole bundle in the
- opd[0], which will be used in the dirty helper. */
- opd_imm_map |= (1 << 0);
- opd[0] = cins;
- use_dirty_helper = 1;
- break;
- case 22: /* "add" */
- t2 = newTemp(Ity_I64);
- assign(t2, binop(Iop_Add64, getIReg(ra), getIReg(rb)));
- MARK_REG_WB(rd, t2);
- break;
- case 23: /* "addi" */
- t2 = newTemp(Ity_I64);
- assign(t2, binop(Iop_Add64, getIReg(ra),
- mkU64(extend_s_8to64(imm))));
- MARK_REG_WB(rd, t2);
- break;
- case 24: /* "addli" */
- t2 = newTemp(Ity_I64);
- assign(t2, binop(Iop_Add64, getIReg(ra),
- mkU64(extend_s_16to64(imm))));
- MARK_REG_WB(rd, t2);
- break;
- case 25: /* "addx" */
- t2 = newTemp(Ity_I64);
- assign(t2, signExtend(binop(Iop_Add32,
- narrowTo(Ity_I32, getIReg(ra)),
- narrowTo(Ity_I32, getIReg(rb))),
- 32));
- MARK_REG_WB(rd, t2);
- break;
- case 26: /* "addxi" */
- t2 = newTemp(Ity_I64);
- assign(t2, signExtend(binop(Iop_Add32,
- narrowTo(Ity_I32, getIReg(ra)),
- mkU32(imm)), 32));
- MARK_REG_WB(rd, t2);
- break;
- case 27: /* "addxli" */
- t2 = newTemp(Ity_I64);
- assign(t2, signExtend(binop(Iop_Add32,
- narrowTo(Ity_I32, getIReg(ra)),
- mkU32(imm)), 32));
-
- MARK_REG_WB(rd, t2);
- break;
- case 28: /* "addxsc" */
- use_dirty_helper = 1;
- break;
- case 29: /* "and" */
- t2 = newTemp(Ity_I64);
- assign(t2, binop(Iop_And64, getIReg(ra), getIReg(rb)));
- MARK_REG_WB(rd, t2);
- break;
- case 30: /* "andi" */
- t2 = newTemp(Ity_I64);
- assign(t2, binop(Iop_And64, getIReg(ra),
- mkU64(extend_s_8to64(imm))));
- MARK_REG_WB(rd, t2);
- break;
- case 31: /* "beqz" */
- /* Fall-through */
- case 32:
- /* "beqzt" */
- bstmt = dis_branch(binop(Iop_CmpEQ64, getIReg(ra), mkU64(0)),
- imm);
- break;
- case 33: /* "bfexts" */
- {
- ULong imm0 = decoded[n].operand_values[3];
- ULong mask = ((-1ULL) ^ ((-1ULL << ((imm0 - imm) & 63)) << 1));
- t0 = newTemp(Ity_I64);
- t2 = newTemp(Ity_I64);
- assign(t0, binop(Iop_Xor64,
- binop(Iop_Sub64,
- binop(Iop_And64,
- binop(Iop_Shr64,
- getIReg(ra),
- mkU8(imm0)),
- mkU64(1)),
- mkU64(1)),
- mkU64(-1ULL)));
- assign(t2,
- binop(Iop_Or64,
- binop(Iop_And64,
- binop(Iop_Or64,
- binop(Iop_Shr64,
- getIReg(ra),
- mkU8(imm)),
- binop(Iop_Shl64,
- getIReg(ra),
- mkU8(64 - imm))),
- mkU64(mask)),
- binop(Iop_And64,
- mkexpr(t0),
- mkU64(~mask))));
-
- MARK_REG_WB(rd, t2);
- }
- break;
- case 34: /* "bfextu" */
- {
- ULong imm0 = decoded[n].operand_values[3];
- ULong mask = 0;
- t2 = newTemp(Ity_I64);
- mask = ((-1ULL) ^ ((-1ULL << ((imm0 - imm) & 63)) << 1));
-
- assign(t2,
- binop(Iop_And64,
- binop(Iop_Or64,
- binop(Iop_Shr64,
- getIReg(ra),
- mkU8(imm)),
- binop(Iop_Shl64,
- getIReg(ra),
- mkU8(64 - imm))),
- mkU64(mask)));
- MARK_REG_WB(rd, t2);
- }
- break;
- case 35: /* "bfins" */
- {
- ULong mask;
- ULong imm0 = decoded[n].operand_values[3];
- t0 = newTemp(Ity_I64);
- t2 = newTemp(Ity_I64);
- if (imm <= imm0)
- {
- mask = ((-1ULL << imm) ^ ((-1ULL << imm0) << 1));
- }
- else
- {
- mask = ((-1ULL << imm) | (-1ULL >> (63 - imm0)));
- }
-
- assign(t0, binop(Iop_Or64,
- binop(Iop_Shl64,
- getIReg(ra),
- mkU8(imm)),
- binop(Iop_Shr64,
- getIReg(ra),
- mkU8(64 - imm))));
-
- assign(t2, binop(Iop_Or64,
- binop(Iop_And64,
- mkexpr(t0),
- mkU64(mask)),
- binop(Iop_And64,
- getIReg(rd),
- mkU64(~mask))));
-
- MARK_REG_WB(rd, t2);
- }
- break;
- case 36: /* "bgez" */
- /* Fall-through */
- case 37: /* "bgezt" */
- bstmt = dis_branch(binop(Iop_CmpEQ64,
- binop(Iop_And64,
- getIReg(ra),
- mkU64(0x8000000000000000ULL)),
- mkU64(0x0)),
- imm);
- break;
- case 38: /* "bgtz" */
- /* Fall-through */
- case 39:
- /* "bgtzt" */
- bstmt = dis_branch(unop(Iop_Not1,
- binop(Iop_CmpLE64S,
- getIReg(ra),
- mkU64(0))),
- imm);
- break;
- case 40: /* "blbc" */
- /* Fall-through */
- case 41: /* "blbct" */
- bstmt = dis_branch(unop(Iop_64to1,
- unop(Iop_Not64, getIReg(ra))),
- imm);
-
- break;
- case 42: /* "blbs" */
- /* Fall-through */
- case 43:
- /* "blbst" */
- bstmt = dis_branch(unop(Iop_64to1,
- getIReg(ra)),
- imm);
- break;
- case 44: /* "blez" */
- bstmt = dis_branch(binop(Iop_CmpLE64S, getIReg(ra),
- mkU64(0)),
- imm);
- break;
- case 45: /* "blezt" */
- bstmt = dis_branch(binop(Iop_CmpLE64S, getIReg(ra),
- mkU64(0)),
- imm);
- break;
- case 46: /* "bltz" */
- bstmt = dis_branch(binop(Iop_CmpLT64S, getIReg(ra),
- mkU64(0)),
- imm);
- break;
- case 47: /* "bltzt" */
- bstmt = dis_branch(binop(Iop_CmpLT64S, getIReg(ra),
- mkU64(0)),
- imm);
- break;
- case 48: /* "bnez" */
- /* Fall-through */
- case 49:
- /* "bnezt" */
- bstmt = dis_branch(binop(Iop_CmpNE64, getIReg(ra),
- mkU64(0)),
- imm);
- break;
- case 50: /* "clz" */
- t2 = newTemp(Ity_I64);
- assign(t2, unop(Iop_Clz64, getIReg(ra)));
-
- MARK_REG_WB(rd, t2);
- break;
- case 51: /* "cmoveqz rd, ra, rb" */
- t2 = newTemp(Ity_I64);
- assign(t2, IRExpr_ITE(binop(Iop_CmpEQ64, getIReg(ra), mkU64(0)),
- getIReg(rb), getIReg(rd)));
- MARK_REG_WB(rd, t2);
- break;
- case 52: /* "cmovnez" */
- t2 = newTemp(Ity_I64);
- assign(t2, IRExpr_ITE(binop(Iop_CmpEQ64, getIReg(ra), mkU64(0)),
- getIReg(rd), getIReg(rb)));
- MARK_REG_WB(rd, t2);
- break;
- case 53: /* "cmpeq" */
- t2 = newTemp(Ity_I64);
- assign(t2, unop(Iop_1Uto64, binop(Iop_CmpEQ64,
- getIReg(ra), getIReg(rb))));
- MARK_REG_WB(rd, t2);
- break;
-
- case 54: /* "cmpeqi" */
- t2 = newTemp(Ity_I64);
- assign(t2, unop(Iop_1Uto64, binop(Iop_CmpEQ64,
- getIReg(ra),
- mkU64(extend_s_8to64(imm)))));
- MARK_REG_WB(rd, t2);
- break;
- case 55: /* "cmpexch" */
- t1 = newTemp(Ity_I64);
- t2 = newTemp(Ity_I64);
-
- assign(t1, getIReg(rb));
- stmt( IRStmt_CAS(mkIRCAS(IRTemp_INVALID, t2, Iend_LE,
- getIReg(ra),
- NULL, binop(Iop_Add64,
- getIReg(70),
- getIReg(71)),
- NULL, mkexpr(t1))));
- MARK_REG_WB(rd, t2);
- break;
- case 56: /* "cmpexch4" */
- t1 = newTemp(Ity_I32);
- t2 = newTemp(Ity_I64);
- t3 = newTemp(Ity_I32);
-
- assign(t1, narrowTo(Ity_I32, getIReg(rb)));
- stmt( IRStmt_CAS(mkIRCAS(IRTemp_INVALID, t3, Iend_LE,
- getIReg(ra),
- NULL,
- narrowTo(Ity_I32, binop(Iop_Add64,
- getIReg(70),
- getIReg(71))),
- NULL,
- mkexpr(t1))));
- assign(t2, unop(Iop_32Uto64, mkexpr(t3)));
- MARK_REG_WB(rd, t2);
- break;
- case 57: /* "cmples" */
- t2 = newTemp(Ity_I64);
- assign(t2, unop(Iop_1Uto64,
- binop(Iop_CmpLE64S, getIReg(ra), getIReg(rb))));
- MARK_REG_WB(rd, t2);
- break;
- case 58: /* "cmpleu" */
- t2 = newTemp(Ity_I64);
- assign(t2, unop(Iop_1Uto64,
- binop(Iop_CmpLE64U, getIReg(ra), getIReg(rb))));
- MARK_REG_WB(rd, t2);
- break;
- case 59: /* "cmplts" */
- t2 = newTemp(Ity_I64);
- assign(t2, unop(Iop_1Uto64,
- binop(Iop_CmpLT64S, getIReg(ra), getIReg(rb))));
- MARK_REG_WB(rd, t2);
- break;
- case 60: /* "cmpltsi" */
- t2 = newTemp(Ity_I64);
- assign(t2, unop(Iop_1Uto64,
- binop(Iop_CmpLT64S,
- getIReg(ra),
- mkU64(extend_s_8to64(imm)))));
- MARK_REG_WB(rd, t2);
- break;
- case 61:
-
- /* "cmpltu" */
- t2 = newTemp(Ity_I64);
- assign(t2, unop(Iop_1Uto64,
- binop(Iop_CmpLT64U, getIReg(ra), getIReg(rb))));
- MARK_REG_WB(rd, t2);
-
-
- break;
- case 62: /* "cmpltui" */
- t2 = newTemp(Ity_I64);
- assign(t2, unop(Iop_1Uto64,
- binop(Iop_CmpLT64U,
- getIReg(ra),
- mkU64(imm))));
- MARK_REG_WB(rd, t2);
-
-
- break;
- case 63: /* "cmpne" */
- t2 = newTemp(Ity_I64);
- assign(t2, unop(Iop_1Uto64,
- binop(Iop_CmpNE64, getIReg(ra), getIReg(rb))));
- MARK_REG_WB(rd, t2);
-
-
- break;
- case 64:
- /* Fall-through */
- case 65:
- /* Fall-through */
- case 66:
- /* Fall-through */
- case 67:
- /* Fall-through */
- case 68:
- /* Fall-through */
- case 69:
- /* Fall-through */
- case 70:
- /* Fall-through */
- case 71:
- /* Fall-through */
- case 72:
- use_dirty_helper = 1;
- break;
- case 73: /* "ctz" */
- t2 = newTemp(Ity_I64);
- assign(t2, unop(Iop_Ctz64, getIReg(ra)));
-
- MARK_REG_WB(rd, t2);
-
-
- break;
- case 74: /* "dblalign" */
- t0 = newTemp(Ity_I64);
- t1 = newTemp(Ity_I64);
- t2 = newTemp(Ity_I64);
-
- /* t0 is the bit shift amount */
- assign(t0, binop(Iop_Shl64,
- binop(Iop_And64,
- getIReg(rb),
- mkU64(7)),
- mkU8(3)));
- assign(t1, binop(Iop_Sub64,
- mkU64(64),
- mkexpr(t0)));
-
- assign(t2, binop(Iop_Or64,
- binop(Iop_Shl64,
- getIReg(ra),
- unop(Iop_64to8, mkexpr(t1))),
- binop(Iop_Shr64,
- getIReg(rd),
- unop(Iop_64to8, mkexpr(t0)))));
-
- MARK_REG_WB(rd, t2);
- break;
- case 75:
- /* Fall-through */
- case 76:
- /* Fall-through */
- case 77:
- /* Fall-through */
- case 78:
- /* Fall-through */
- case 79:
- use_dirty_helper = 1;
- break;
- case 80: /* "exch" */
- t2 = newTemp(Ity_I64);
- stmt( IRStmt_CAS(
- mkIRCAS(IRTemp_INVALID,
- t2,
- ...
[truncated message content] |
|
From: <sv...@va...> - 2017-05-08 15:38:30
|
Author: petarj
Date: Mon May 8 16:38:24 2017
New Revision: 16339
Log:
Update NEWS with the latest fix
KDE #379473 has been fixed with VEX r3362.
Modified:
trunk/NEWS
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Mon May 8 16:38:24 2017
@@ -160,6 +160,7 @@
377930 fcntl syscall wrapper is missing flock structure check
378535 Valgrind reports INTERNAL ERROR in execve syscall wrapper
378673 Update libiberty demangler
+378931 Add ISA 3.0B additional isnstructions, add OV32, CA32 setting support
379039 syscall wrapper for prctl(PR_SET_NAME) must not check more than 16 bytes
379094 Valgrind reports INTERNAL ERROR in rt_sigsuspend syscall wrapper
379371 UNKNOWN task message [id 3444, to mach_task_self(), reply 0x603]
@@ -167,7 +168,7 @@
379372 UNKNOWN task message [id 3447, to mach_task_self(), reply 0x603]
(task_register_dyld_shared_cache_image_info)
379390 unhandled syscall: mach:70 (host_create_mach_voucher_trap)
-378931 Add ISA 3.0B additional isnstructions, add OV32, CA32 setting support
+379473 MIPS: add support for rdhwr cycle counter register
Release 3.12.0 (20 October 2016)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
|
From: <sv...@va...> - 2017-05-08 15:32:33
|
Author: petarj
Date: Mon May 8 16:32:25 2017
New Revision: 3362
Log:
mips: improve support for RDHWR instruction
Add support for reading CPUNum, CC and CCRes registers using RDHWR.
This is a fix for KDE #379473.
Patch by Aleksandar Rikalo.
Modified:
trunk/priv/guest_mips_defs.h
trunk/priv/guest_mips_helpers.c
trunk/priv/guest_mips_toIR.c
Modified: trunk/priv/guest_mips_defs.h
==============================================================================
--- trunk/priv/guest_mips_defs.h (original)
+++ trunk/priv/guest_mips_defs.h Mon May 8 16:32:25 2017
@@ -101,8 +101,7 @@
#endif
#if defined(__mips__) && ((defined(__mips_isa_rev) && __mips_isa_rev >= 2))
-extern UInt mips32_dirtyhelper_rdhwr ( UInt rt, UInt rd );
-extern ULong mips64_dirtyhelper_rdhwr ( ULong rt, ULong rd );
+extern HWord mips_dirtyhelper_rdhwr ( UInt rt, UInt rd );
#endif
/* Calculate FCSR in fp32 mode. */
Modified: trunk/priv/guest_mips_helpers.c
==============================================================================
--- trunk/priv/guest_mips_helpers.c (original)
+++ trunk/priv/guest_mips_helpers.c Mon May 8 16:32:25 2017
@@ -425,31 +425,24 @@
};
#if defined(__mips__) && ((defined(__mips_isa_rev) && __mips_isa_rev >= 2))
-UInt mips32_dirtyhelper_rdhwr ( UInt rt, UInt rd )
+HWord mips_dirtyhelper_rdhwr ( UInt rt, UInt rd )
{
- UInt x = 0;
+ HWord x = 0;
switch (rd) {
- case 1: /* x = SYNCI_StepSize() */
- __asm__ __volatile__("rdhwr %0, $1\n\t" : "=r" (x) );
+ case 0: /* x = CPUNum() */
+ __asm__ __volatile__("rdhwr %0, $0\n\t" : "=r" (x) );
break;
- case 31: /* x = CVMX_get_cycles() */
- __asm__ __volatile__("rdhwr %0, $31\n\t" : "=r" (x) );
+ case 1: /* x = SYNCI_Step() */
+ __asm__ __volatile__("rdhwr %0, $1\n\t" : "=r" (x) );
break;
- default:
- vassert(0);
+ case 2: /* x = CC() */
+ __asm__ __volatile__("rdhwr %0, $2\n\t" : "=r" (x) );
break;
- }
- return x;
-}
-ULong mips64_dirtyhelper_rdhwr ( ULong rt, ULong rd )
-{
- ULong x = 0;
- switch (rd) {
- case 1: /* x = SYNCI_StepSize() */
- __asm__ __volatile__("rdhwr %0, $1\n\t" : "=r" (x) );
+ case 3: /* x = CCRes() */
+ __asm__ __volatile__("rdhwr %0, $3\n\t" : "=r" (x) );
break;
case 31: /* x = CVMX_get_cycles() */
Modified: trunk/priv/guest_mips_toIR.c
==============================================================================
--- trunk/priv/guest_mips_toIR.c (original)
+++ trunk/priv/guest_mips_toIR.c Mon May 8 16:32:25 2017
@@ -15096,31 +15096,19 @@
if (rd == 29) {
putIReg(rt, getULR());
#if defined(__mips__) && ((defined(__mips_isa_rev) && __mips_isa_rev >= 2))
- } else if (rd == 1
+ } else if (rd <= 3
|| (rd == 31
&& VEX_MIPS_COMP_ID(archinfo->hwcaps)
== VEX_PRID_COMP_CAVIUM)) {
- if (mode64) {
- IRTemp val = newTemp(Ity_I64);
- IRExpr** args = mkIRExprVec_2 (mkU64(rt), mkU64(rd));
- IRDirty *d = unsafeIRDirty_1_N(val,
- 0,
- "mips64_dirtyhelper_rdhwr",
- &mips64_dirtyhelper_rdhwr,
- args);
- stmt(IRStmt_Dirty(d));
- putIReg(rt, mkexpr(val));
- } else {
- IRTemp val = newTemp(Ity_I32);
- IRExpr** args = mkIRExprVec_2 (mkU32(rt), mkU32(rd));
- IRDirty *d = unsafeIRDirty_1_N(val,
- 0,
- "mips32_dirtyhelper_rdhwr",
- &mips32_dirtyhelper_rdhwr,
- args);
- stmt(IRStmt_Dirty(d));
- putIReg(rt, mkexpr(val));
- }
+ IRExpr** args = mkIRExprVec_2 (mkU32(rt), mkU32(rd));
+ IRTemp val = newTemp(ty);
+ IRDirty *d = unsafeIRDirty_1_N(val,
+ 0,
+ "mips_dirtyhelper_rdhwr",
+ &mips_dirtyhelper_rdhwr,
+ args);
+ stmt(IRStmt_Dirty(d));
+ putIReg(rt, mkexpr(val));
#endif
} else
goto decode_failure;
|
|
From: Carl E. L. <ce...@us...> - 2017-05-08 15:12:20
|
On Mon, 2017-05-08 at 16:01 +0200, Julian Seward wrote: > Hmm, this bug looks suspiciously similar to > https://bugs.kde.org/show_bug.cgi?id=352364 > > Carl, do you know if it is identical? > > J > My understanding is this bug does a comparison against a constant that is not zero. The bug I was working on compares with zero so they take different paths in the CmpORD function. But, the underlying issues seem to be similar. This bug talks about completely redoing the PPC condition code handling to make it more compatible with the other architectures which presumably would fix both issues. Not sure exactly what all would be involved in doing this. Any thoughts on the patch I sent? It didn't seem to work as hoped and not sure why. Carl Love |
|
From: <sv...@va...> - 2017-05-08 14:58:06
|
Author: iraisr
Date: Mon May 8 15:57:58 2017
New Revision: 16338
Log:
Some bug squashing before 3.13 release
Modified:
trunk/docs/internals/3_12_BUGSTATUS.txt
Modified: trunk/docs/internals/3_12_BUGSTATUS.txt
==============================================================================
--- trunk/docs/internals/3_12_BUGSTATUS.txt (original)
+++ trunk/docs/internals/3_12_BUGSTATUS.txt Mon May 8 15:57:58 2017
@@ -17,6 +17,25 @@
367543 bt/btc/btr/bts x86/x86_64 instructions are poorly-handled wrt flags
[Z flag behaviour is wrong]
+369053 AMD64 fma4 instructions missing 256 bit support
+
+369409 vex amd64->IR: unhandled instruction bytes: 0x48 0xF 0xC7 0xF0 0x72 0x2 0xE2 0xF8
+
+371491 handleAddrOverrides() is truncating the segment base address when
+ ASO prefix is used
+ [has patch, easy fix]
+
+371989 PCMPISTRM $0x72 validity bit propagation is imprecise
+
+372188 vex amd64->IR: 0x66 0xF 0x3A 0x62 0x4A 0x10 0x10 0x48 (PCMPxSTRx $0x10)
+
+372828 vex amd64->IR: 0x66 0x4D 0xF 0x38 0xF6 0xD2 0x66 0x4D
+
+373166 vex amd64->IR: 0xFF 0xFF 0x48 0x85 0xC0 0x74 0x8 0x4D 0x89 0xE7
+ [not clear what's going on here]
+
+375008 amd64->IR: 0x8F 0x6A 0x78 0x10 0xD8 0x4 0x4 0x0 0x0 0x8F
+
AMD XOP-prefixed insns:
(carried over)
@@ -24,8 +43,8 @@
[== 328357, still open]
(carried over)
-339596 vex amd64->IR: 0x8F 0xE8 0x78 0xCD 0xC1 0x4 0xC5 0xF9
- [AMD XOP/FMA support]
+339596 - AMD64 xop instructions unsupported. vex amd64->IR: unhandled instruction bytes: 0x8F 0xE8 0x78 0xCD 0xC1 0x4 0xC5 0xF9
+ [has patch, could possibly take it, but needs cleanup/verification with Mark]
== 356138
=== VEX/arm ============================================================
@@ -46,9 +65,23 @@
362934 [AsusWRT] Arm v7 illegal instruction
[unclear what this is; a SIGILL on generated code]
+368868 disInstr(arm64): unhandled instruction 0xD53BE000 = cntfrq_el0 (ARMv8)
+ (should fix this for 3.13?)
+
+369459 valgrind on arm64 violates the ARMv8 spec (ldxr/stxr)
+ [fixed with --sim-hints=fallback-llsc?]
+
+369509 ARMv8.1 LSE instructions are not supported
+
+369723 __builtin_longjmp not supported in clang/llvm on Android arm64 target
+ [has patch at android-review.googlesource.com]
+
+373990 Potential shift left overflow in guest_arm_toIR.c
+ [suggested fix available]
+
=== VEX/arm64 ==========================================================
-376279 disInstr(arm64): unhandled instruction 0xD50320FF
+371503 disInstr(arm64): unhandled instruction 0xF89F0000 (prfum)
=== VEX/x86 ============================================================
@@ -70,18 +103,10 @@
=== Syscalls/ioctls on Linux ===========================================
(carried over)
-348616 Wine/valgrind: Warning: noted but unhandled ioctl 0x5390 with
- no size/direction hints. (DVD_READ_STRUCT)
-
-(carried over)
352742 Custom allocator using sbrk() fails after about 800MB when running
under memcheck
(carried over)
-352767 Wine/valgrind: Warning: noted but unhandled ioctl 0x5307 with
- no size/direction hints. (CDROMSTOP)
-
-(carried over)
355803 Add Lustre's IOC_MDC_GETFILESTRIPE ioctl [has patch]
(carried over)
@@ -89,10 +114,6 @@
[== 345414, still open]
(carried over)
-358620 WARNING: unhandled syscall: 357
- [arm32, 3.7.0, also an unhandled insn]
-
-(carried over)
359705 memcheck causes segfault on a dynamically-linked test from
rustlang's test suite on i686
@@ -110,6 +131,7 @@
362892 test apk in android5.0.2,after fix the bug 344802,android log
"Unable to create protected region in stack for implicit overflow
check. Reason: Out of memory size: 4096"
+ [the patch looks bogus, more info requested]
(carried over)
362939 test apk in android 5.0 or most,at 0x6A23AB4:
@@ -118,14 +140,39 @@
(carried over)
364359 Valgrind crashes on fcntl(F_SETFL, O_NONBLOCK, fd)
-
-(carried over)
-367942 Segfault vgPlain_do_sys_sigaction (m_signals.c:1138)
+ [fcntl(F_SETFL) is supported, perhaps stale bug]
(carried over)
368791 unhandled syscall: 167 (swapon, amd64-linux)
(should fix this for 3.12.1)
+368866 WARNING: unhandled arm64-linux syscall: 238 (migrate_pages)
+368913 WARNING: unhandled arm64-linux syscall: 117
+368914 WARNING: unhandled arm64-linux syscall: 142
+368916 WARNING: unhandled arm64-linux syscall: 234
+368919 WARNING: unhandled arm64-linux syscall: 274
+368920 WARNING: unhandled arm64-linux syscall: 275
+368921 WARNING: unhandled arm64-linux syscall: 162
+368923 WARNING: unhandled arm64-linux syscall: 268
+368960 WARNING: unhandled amd64-linux syscall: 163
+369026 WARNING: unhandled amd64-linux syscall: 169
+369027 WARNING: unhandled amd64-linux syscall: 216 (remap_file_pages)
+369028 WARNING: unhandled amd64-linux syscall: 314 (sched_setattr)
+369029 WARNING: unhandled amd64-linux syscall: 315 (sched_getattr)
+369030 WARNING: unhandled amd64-linux syscall: 171 (setdomainname)
+369031 WARNING: unhandled amd64-linux syscall: 308 (setns)
+369032 WARNING: unhandled amd64-linux syscall: 205 (set_thread_area)
+369033 WARNING: unhandled amd64-linux syscall: 139 (sysfs)
+369034 WARNING: unhandled amd64-linux syscall: 136 (ustat)
+
+371411 Unify fstat64/fstatat64 wrappers
+ [legit check needed]
+
+372513 WARNING: unhandled ppc64be-linux syscall: utimes(251)
+
+372861 Test pselect_alarm for Bug 359871 seg faults on RHEL 4
+ [has a suggested solution]
+
=== Syscalls/ioctls on OSX =============================================
(carried over)
@@ -138,6 +185,8 @@
353346 WARNING: unhandled amd64-darwin syscall: unix:330
== 211362 [not fixed]
+376870 unhandled amd64-darwin syscall: unix:446 (proc_rlimit_control)
+
=== Debuginfo reader ===================================================
(carried over)
@@ -152,6 +201,8 @@
365750 Valgrind fails on binary with .text section not in default place
[Horrible hack to do with relocating .text section]
+372182 Support more languages/demangling styles than just C++ (and Rust)
+
=== Tools/Memcheck =====================================================
(carried over)
@@ -162,12 +213,15 @@
(carried over)
358980 32 byte leak reported when code uses dlopen and links against pthread
+ [native program crashes as well]
(carried over)
-361504 dlopen()/dlclose() and shared object usage check [wishlist]
+361504 dlopen()/dlclose() and shared object usage check
+ [wishlist]
(carried over)
361810 valgrind duplicate stdin after fork
+ [supposedly a bug in glibc when __libc_freeres should not be run]
(carried over)
364279 False "Uninitialized" on atomic_compare_exchange
@@ -183,6 +237,16 @@
than 34255421416 bytes
(increase usable address space post release, on trunk)
+369854 Valgrind reports an Invalid Read in __intel_new_memcpy
+
+371770 Memleak trace back for overwritten or freed memory pointers
+ [wishlist]
+
+371966 No uninitialised values reported with PGI -Mstack_arrays
+
+375415 free list of blocks, mempool blocks and describe addr
+ do not work properly together
+
=== Tools/DRD ==========================================================
(carried over)
@@ -192,17 +256,17 @@
=== Tools/Helgrind =====================================================
(carried over)
-358213 helgrind bar_bad testcase hangs
- with new glibc pthread barrier implementation
- [Also DRD is affected]
-
-(carried over)
360557 helgrind reports data race which I can't see (involves rwlocks)
[probably a legit bug]
(carried over)
363740 Possible data race in vgPlain_amd64_linux_REDIR_FOR_vgettimeofday
+371396 helgrind and drd pth_cond_destroy_busy testcase hang with
+ new glibc cond var implementation (workaround committed as 16097)
+
+376257 helgrind history full speed up using a cached stack
+
=== Tools/SGCheck ======================================================
=== Tools/Massif =======================================================
@@ -211,12 +275,20 @@
=== Tools/Callgrind ====================================================
-(carried over)
-356675 callgrind test apk in android 5.0.2
- [Unclear what this is. Might also be ARM or Android specific]
-
=== Tools/Lackey =======================================================
+=== other/amd64 ========================================================
+
+375171 VG_(scheduler): run_innerloop detected host state invariant failure
+ == 374482
+ == 374850
+
+377006 valgrind/memcheck segfaults under certain kernel versions (amd64)
+ but not others.
+
+374963 increase valgrind's load address to prevent mmap failure
+ [has patch, requested documentation update]
+
=== other/x86 ==========================================================
=== other/mips =========================================================
@@ -228,6 +300,10 @@
=== other/arm ==========================================================
(carried over)
+356675 callgrind test apk in android 5.0.2
+ [Unclear what this is.]
+
+(carried over)
364533 Process terminating with default action of signal 4 (SIGILL): dumping
core, : at 0x4000E7C: ??? (in /lib/ld-uClibc.so.0)
@@ -237,12 +313,22 @@
=== other/arm64 ========================================================
+371439 Get coredump working on arm64
+ [has an incomplete patch]
+
+=== other/mips =========================================================
+
+370028 Reduce the number of compiler warnings on MIPS platforms
+ [1 patch landed, 3 still to go]
+
=== other/s390 =========================================================
=== other/tilegx =======================================================
=== other/Android ======================================================
+374814 VALGRIND INTERNAL ERROR: signal 11 (SIGSEGV) - exiting
+
=== other/OS X =========================================================
(carried over)
@@ -266,9 +352,6 @@
== 258140 [still open]
(carried over)
-354809 Error message for unsupported platform is unhelpful
-
-(carried over)
356122 Apparent infinite loop calling GLib g_get_user_special_dir() function
(carried over)
@@ -285,20 +368,36 @@
(carried over)
366131 Illegal opcode in OS X 11.0 when using function getpwuid()
+369456 callgrind_control failed to find an active callgrind run.
+
+372779 valgrind will hang
+
=== other/Win32 ========================================================
+=== other/*BSD =========================================================
+
+368873 Please add FreeBSD to supported OS list
+
=== GDB server =========================================================
+(carried over)
351792 vgdb doesn't support remote file transfers
+ [wishlist]
+
+(carried over)
356174 Enhance the embedded gdbserver to allow LLDB to use it
=== Output =============================================================
+(carried over)
351857 confusing error message about valid command line option
-352395 Please provide SVN revision info in --version
+
+(carried over)
358569 Unhandled instructions cause creation of "orphan" stack traces
in XML output
+374719 some spelling fixes
+
=== MPI ================================================================
=== Documentation ======================================================
@@ -306,17 +405,11 @@
=== Uncategorised/run ==================================================
(carried over)
-356457 valgrind: m_mallocfree.c:2042 (vgPlain_arena_free):
- Assertion 'blockSane(a, b)' failed.
- [Possible V memory corruption?]
-
-(carried over)
359249 valgrind unable to load 64-bit linux executable
linked with -mcmodel=medium
(carried over)
-362223 valgrind: m_commandline.c:79 (read_dot_valgrindrc):
- Assertion 'n >= 0 && n <= stat_buf.size+1' failed.
+362223 assertion failed when .valgrindrc is a directory instead of a file
(carried over)
362680 --error-exitcode not honored when file descriptor leaks are found
@@ -324,13 +417,6 @@
=== Uncategorised/build ================================================
(carried over)
-358697 valgrind.h: Some code remains even when defining NVALGRIND
- (we should fix this)
-
-(carried over)
-359202 Add musl libc configure/compile
-
-(carried over)
359920 Configure fails with relative DESTDIR
(carried over)
@@ -340,6 +426,9 @@
(carried over)
366345 Dirty compile from m_libcbase.c and vgdb-invoker-ptrace.c
+377066 Some Valgrind unit tests fail to compile on Ubuntu 16.10 with
+ PIE enabled by default
+
=== Intel Compiler problems ============================================
(carried over)
@@ -348,6 +437,7 @@
(carried over)
357011 Memcheck regression tests do not generate expected frame numbers
if compiled with intel compiler
+ [asked for rebased patch]
(carried over)
357012 Memcheck regression tests do not match expected results
@@ -363,113 +453,56 @@
========================================================================
========================================================================
-Thu 15 Sep 12:55:21 CEST 2016
+n-i-bz major perf problems w/ stack registration + stack recycling
+other stuff to fix: annoying duplicate brk() message
-368866 WARNING: unhandled arm64-linux syscall: 238 (migrate_pages)
-368868 disInstr(arm64): unhandled instruction 0xD53BE000 = cntfrq_el0 (ARMv8)
- (should fix this for 3.12.1)
-368873 Please add FreeBSD to supported OS list
-368913 WARNING: unhandled arm64-linux syscall: 117
-368914 WARNING: unhandled arm64-linux syscall: 142
-368916 WARNING: unhandled arm64-linux syscall: 234
-368919 WARNING: unhandled arm64-linux syscall: 274
-368920 WARNING: unhandled arm64-linux syscall: 275
-368921 WARNING: unhandled arm64-linux syscall: 162
-368923 WARNING: unhandled arm64-linux syscall: 268
-368960 WARNING: unhandled amd64-linux syscall: 163
-369026 WARNING: unhandled amd64-linux syscall: 169
-369027 WARNING: unhandled amd64-linux syscall: 216 (remap_file_pages)
-369028 WARNING: unhandled amd64-linux syscall: 314 (sched_setattr)
-369029 WARNING: unhandled amd64-linux syscall: 315 (sched_getattr)
-369030 WARNING: unhandled amd64-linux syscall: 171 (setdomainname)
-369031 WARNING: unhandled amd64-linux syscall: 308 (setns)
-369032 WARNING: unhandled amd64-linux syscall: 205 (set_thread_area)
-369033 WARNING: unhandled amd64-linux syscall: 139 (sysfs)
-369034 WARNING: unhandled amd64-linux syscall: 136 (ustat)
-369053 AMD64 fma4 instructions missing 256 bit support
-369409 null pointer dereference in vgPlain_do_syscall
- possibly a dup of (fixed) 353370
-
-369456 callgrind_control failed to find an active callgrind run.
- OSX specific
+========================================================================
+========================================================================
+========================================================================
+Should take in:
-369459 valgrind on arm64 violates the ARMv8 spec (ldxr/stxr)
+360415 amd64 instructions ADCX and ADOX are not implemented in VEX
+ [has a plausible patch]
-369509 ARMv8.1 LSE instructions are not supported
-369723 __builtin_longjmp not supported in clang/llvm on Android arm64 target
- Has patch
+339596 AMD64 xop instructions unsupported. vex amd64->IR: unhandled instruction bytes: 0x8F 0xE8 0x78 0xCD 0xC1 0x4 0xC5 0xF9
+ [has plausible patches]
-369854 Valgrind reports an Invalid Read in __intel_new_memcpy
- Should be handled by --partial-loads-ok=yes
+322935 disInstr(arm): unhandled instruction: 0xF1010200, valgrind: Unrecognised instruction on Raspbian
+ [should document that Raspian is not supported]
-370028 Reduce the number of compiler warnings on MIPS platforms
-370635 arm64 missing syscall getcpu
- (should fix this for 3.12.1)
+360429 Warning: noted but unhandled ioctl 0x530d with no size/direction hints.
+ [has patch, should take]
-Wed 19 Oct 17:07:42 CEST 2016
+368791 unhandled syscall: 167 (swapon, amd64-linux)
+ [hoist mips64-linux specific wrapper as a linux specific one]
-371227 Clean AArch64 syscall table
-371396 helgrind and drd pth_cond_destroy_busy testcase hang with
- new glibc cond var implementation (workaround committed as 16097)
-371411 Unify fstat64/fstatat64 wrappers
-371439 Get coredump working on arm64
-371491 handleAddrOverrides() is truncating the segment base address when
- ASO prefix is used (EASY FIX)
-371503 disInstr(arm64): unhandled instruction 0xF89F0000
-371770 Memleak trace back for overwritten or freed memory pointers (WISHLIST)
-371916 execution tree xtree concept (SHOULD BE CLOSED?)
-371966 No uninitialised values reported with PGI -Mstack_arrays
-371989 PCMPISTRM $0x72 validity bit propagation is imprecise
-372182 Support more languages/demangling styles than just C++ (and Rust)
-372188 vex amd64->IR: 0x66 0xF 0x3A 0x62 0x4A 0x10 0x10 0x48 (PCMPxSTRx $0x10)
-372513 WARNING: unhandled ppc64be-linux syscall: 251
+368529 Android arm target link error, missing atexit and pthread_atfork
+ [has patch, should take]
-Mon 21 Nov 13:13:47 CET 2016
+362223 assertion failed when .valgrindrc is a directory instead of a file
+ [really easy to fix]
-n-i-bz major perf problems w/ stack registration + stack recycling
-372772 Brew doesn't allow for Valgrind 3.12.0 installation on Sierra OSX
-372779 valgrind will hang
-372828 vex amd64->IR: 0x66 0x4D 0xF 0x38 0xF6 0xD2 0x66 0x4D
-372861 Test pselect_alarm for Bug 359871 seg faults on RHEL 4
-
-Fri 25 Nov 11:47:59 CET 2016
+369723 __builtin_longjmp not supported in clang/llvm on Android arm64 target
+ [has patch at android-review.googlesource.com]
+
+371491 handleAddrOverrides() is truncating the segment base address when
+ ASO prefix is used
+ [has patch, easy fix]
-373166 vex amd64->IR: 0xFF 0xFF 0x48 0x85 0xC0 0x74 0x8 0x4D 0x89 0xE7
373990 Potential shift left overflow in guest_arm_toIR.c
-375171 VG_(scheduler): run_innerloop detected host state invariant failure
- == 374482
- == 374850
-374719 some spelling fixes
-374814 VALGRIND INTERNAL ERROR: signal 11 (SIGSEGV) - exiting
+ [suggested fix available]
+
374963 increase valgrind's load address to prevent mmap failure
-375008 amd64->IR: 0x8F 0x6A 0x78 0x10 0xD8 0x4 0x4 0x0 0x0 0x8F
-375415 free list of blocks, mempool blocks and describe addr
- do not work properly together
-375839 Temporary storage exhausted, with long sequence of vfmadd231ps insns
- == 377159 "vex: the `impossible' happened" still present
- == 375150 Assertion 'tres.status == VexTransOK' failed
-376257 helgrind history full speed up using a cached stack
-376870 The impossible happened on Mavericks 10.9
-376956 Memcheck crashes on access(NULL, F_OK) done by Free Pascal application
-377006 valgrind/memcheck segfaults under certain kernel versions (amd64)
- but not others.
+ [has patch, requested documentation update]
+
377066 Some Valgrind unit tests fail to compile on Ubuntu 16.10 with
PIE enabled by default
+ [Ivosh will fix it as it is annoying]
-other stuff to fix: annoying duplicate brk() message
-
-Mon 6 Mar 21:02:39 CET 2017
-
-========================================================================
-========================================================================
-
-Stuff that we should merge (trunk -> 3.12.1)
-
-372504 Hanging on exit_group
-372600 process loops forever when fatal signals are arriving quickly
-n-i-bz Demangle Rust
-n-i-bz major perf problems w/ stack registration + stack recycling
+368507 valgrind throws std::bad_alloc on memory allocations larger
+ than 34255421416 bytes
+ [should take in after 3.13]
Mon 6 Mar 21:02:39 CET 2017
|
|
From: <sv...@va...> - 2017-05-08 14:50:50
|
Author: sewardj
Date: Mon May 8 15:50:42 2017
New Revision: 16337
Log:
Update.
Modified:
trunk/NEWS
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Mon May 8 15:50:42 2017
@@ -105,7 +105,9 @@
352767 Wine/valgrind: noted but unhandled ioctl 0x5307 [..] (CDROMSTOP)
358213 helgrind/drd bar_bad testcase hangs or crashes with new glibc pthread
barrier implementation
+358697 valgrind.h: Some code remains even when defining NVALGRIND
359202 Add musl libc configure/compile
+367942 Segfault vgPlain_do_sys_sigaction (m_signals.c:1138)
368863 WARNING: unhandled arm64-linux syscall: 100 (get_robust_list)
368865 WARNING: unhandled arm64-linux syscall: 272 (kcmp)
368917 WARNING: unhandled arm64-linux syscall: 218 (request_key)
@@ -140,6 +142,7 @@
for ML_(find_rx_mapping)()
375806 Test helgrind/tests/tc22_exit_w_lock fails with glibc 2.24
376142 Segfaults on MIPS Cavium Octeon boards
+376279 disInstr(arm64): unhandled instruction 0xD50320FF
376455 Solaris: unhandled syscall lgrpsys(180)
376518 Solaris: unhandled fast trap getlgrp(6)
376611 ppc64 and arm64 don't know about prlimit64 syscall
|
|
From: Julian S. <js...@ac...> - 2017-05-08 14:01:53
|
Hmm, this bug looks suspiciously similar to https://bugs.kde.org/show_bug.cgi?id=352364 Carl, do you know if it is identical? J |