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From: Aaron S. <acs...@li...> - 2017-05-11 21:44:37
|
Hello all,
I've been working with Carl Love to try to get valgrind up and
functional on power9. The issue I've been seeing is a bl that is not
being followed. I'm hoping someone can help me with where to look to
see at what point valgrind is choosing the wrong execution path --
basically I need some help knowing where to look in the internal data
structures.
Here's a description of the situation where it is going awry. The code
looks like this:
81b38: a6 02 08 7c mflr r0
81b3c: e0 ff 81 fb std r28,-32(r1)
81b40: e8 ff a1 fb std r29,-24(r1)
81b44: f0 ff c1 fb std r30,-16(r1)
81b48: f8 ff e1 fb std r31,-8(r1)
81b4c: 78 23 9e 7c mr r30,r4
81b50: ff ff 80 38 li r4,-1
81b54: 00 00 e0 38 li r7,0
81b58: 78 1b 7c 7c mr r28,r3
81b5c: 78 2b bd 7c mr r29,r5
81b60: 00 00 20 39 li r9,0
81b64: 00 00 c0 38 li r6,0
81b68: ff ff a0 38 li r5,-1
81b6c: 20 04 84 54 rlwinm r4,r4,0,16,16
81b70: 10 00 01 f8 std r0,16(r1)
81b74: d1 fe 21 f8 stdu r1,-304(r1)
81b78: 20 00 e1 3b addi r31,r1,32
81b7c: a8 00 21 f9 std r9,168(r1)
81b80: 78 fb e3 7f mr r3,r31
81b84: 15 2c 01 48 bl 94798
<_IO_default_doallocate@@GLIBC_2.17+0x158>
81b88: 00 00 00 60 nop
81b8c: ff ff 22 3d addis r9,r2,-1
81b90: 78 e3 84 7f mr r4,r28
81b94: 78 fb e3 7f mr r3,r31
81b98: 00 00 c0 38 li r6,0
81b9c: 00 00 a0 38 li r5,0
81ba0: a8 5a 29 39 addi r9,r9,23208
81ba4: f8 00 21 f9 std r9,248(r1)
81ba8: 81 4f 01 48 bl 96b28
<_IO_str_pbackfail@@GLIBC_2.17+0xf8>
At the end of the first block we see this
0x6CF1B80: mr r3,r31
------ IMark(0x6CF1B80, 4, 0) ------
t54 = GET:I64(264)
t56 = GET:I64(264)
t55 = t54
PUT(40) = t55
PUT(1296) = 0x6CF1B84:I64
0x6CF1B84: bl 0x6D04798
------ IMark(0x6CF1B84, 4, 0) ------
PUT(1304) = 0x6CF1B88:I64
t61 = 0x6D04798:I64
====== AbiHint(Sub64(GET:I64(24),0x120:I64), 288, t61)
======
PUT(1296) = 0x6D04798:I64
PUT(1296) = GET:I64(1296); exit-Call
Where 0x6D04798 is the correct address we should branch-and-link to.
At the end of the generated code there is this:
(xDirect) if (always) { imm64 r30,0x6D04798; std r30,1296(%r31); imm64-
fixed5 r30,$disp_cp_chain_me_to_fastEP; mtctr r30; bctrl }
D0 06 C0 3F 98 47 DE 63 10 05 DF FB 00 00 C0 3F 00 00 DE 63 C6 07 DE 7B
0A 38 DE 67 DC 1D DE 63 A6 03 C9 7F 21 04 80 4E
But the very next block is the code following the bl at 0x6CF1B88, not
the code at 0x6D04798:
==== SB 8420 (evchecks 3471236) [tid 1] 0x6cf1b88
vsscanf@@GLIBC_2.17+88 /opt/at10.0-4-beta1/lib64/power9/libc-
2.24.so+0x81b88
------------------------ Front end ------------------------
0x6CF1B88: ori r0,r0,0x0
------ IMark(0x6CF1B88, 4, 0) ------
t0 = GET:I64(16)
t2 = GET:I64(16)
t1 = Or64(t0,0x0:I64)
PUT(16) = t1
PUT(1296) = 0x6CF1B8C:I64
0x6CF1B8C: addis r9,r2,0xFFFFFFFF
------ IMark(0x6CF1B8C, 4, 0) ------
t3 = GET:I64(32)
t4 = GET:I64(264)
t5 = Add64(t3,0xFFFFFFFFFFFF0000:I64)
PUT(88) = t5
PUT(1296) = 0x6CF1B90:I64
Thanks,
Aaron
--
Aaron Sawdey, Ph.D. acs...@li...
050-2/C113 (507) 253-7520 home: 507/263-0782
IBM Linux Technology Center - PPC Toolchain
--
Aaron Sawdey, Ph.D. acs...@li...
050-2/C113 (507) 253-7520 home: 507/263-0782
IBM Linux Technology Center - PPC Toolchain
|
|
From: <sv...@va...> - 2017-05-11 17:00:24
|
Author: iraisr
Date: Thu May 11 18:00:17 2017
New Revision: 16364
Log:
Fix a problem when reading .valgrindrc and it is a directory instead of a file.
Fixes BZ#362223.
Modified:
trunk/NEWS
trunk/coregrind/m_commandline.c
trunk/docs/xml/manual-core.xml
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Thu May 11 18:00:17 2017
@@ -112,6 +112,7 @@
358697 valgrind.h: Some code remains even when defining NVALGRIND
359202 Add musl libc configure/compile
360429 unhandled ioctl 0x530d with no size/direction hints (CDROMREADMODE1)
+362223 assertion failed when .valgrindrc is a directory instead of a file
367942 Segfault vgPlain_do_sys_sigaction (m_signals.c:1138)
368863 WARNING: unhandled arm64-linux syscall: 100 (get_robust_list)
368865 WARNING: unhandled arm64-linux syscall: 272 (kcmp)
Modified: trunk/coregrind/m_commandline.c
==============================================================================
--- trunk/coregrind/m_commandline.c (original)
+++ trunk/coregrind/m_commandline.c Thu May 11 18:00:17 2017
@@ -55,8 +55,6 @@
static HChar* read_dot_valgrindrc ( const HChar* dir )
{
- Int n;
- SysRes fd;
struct vg_stat stat_buf;
HChar* f_clo = NULL;
const HChar dot_valgrindrc[] = ".valgrindrc";
@@ -66,15 +64,18 @@
HChar filename[VG_(strlen)(dir) + 1 + VG_(strlen)(dot_valgrindrc) + 1];
VG_(sprintf)(filename, "%s/%s", dir, dot_valgrindrc);
- fd = VG_(open)(filename, 0, VKI_S_IRUSR);
+ SysRes fd = VG_(open)(filename, 0, VKI_S_IRUSR);
if ( !sr_isError(fd) ) {
Int res = VG_(fstat)( sr_Res(fd), &stat_buf );
- // Ignore if not owned by current user or world writeable (CVE-2008-4865)
- if (!res && stat_buf.uid == VG_(geteuid)()
- && (!(stat_buf.mode & VKI_S_IWOTH))) {
+ /* Ignore if not owned by the current user, or is not a regular file,
+ or is world writeable (CVE-2008-4865). */
+ if (res == 0
+ && stat_buf.uid == VG_(geteuid)()
+ && (stat_buf.mode & VKI_S_IFREG)
+ && !(stat_buf.mode & VKI_S_IWOTH)) {
if ( stat_buf.size > 0 ) {
f_clo = VG_(malloc)("commandline.rdv.1", stat_buf.size+1);
- n = VG_(read)(sr_Res(fd), f_clo, stat_buf.size);
+ Int n = VG_(read)(sr_Res(fd), f_clo, stat_buf.size);
if (n == -1) n = 0;
vg_assert(n >= 0 && n <= stat_buf.size+1);
f_clo[n] = '\0';
@@ -82,8 +83,9 @@
}
else
VG_(message)(Vg_UserMsg,
- "%s was not read as it is either world writeable or not "
- "owned by the current user\n", filename);
+ "%s was not read as it is either not a regular file,\n"
+ " or is world writeable, or is not owned by the current user.\n",
+ filename);
VG_(close)(sr_Res(fd));
}
Modified: trunk/docs/xml/manual-core.xml
==============================================================================
--- trunk/docs/xml/manual-core.xml (original)
+++ trunk/docs/xml/manual-core.xml Thu May 11 18:00:17 2017
@@ -2567,8 +2567,8 @@
</para>
<para>Please note that the <computeroutput>./.valgrindrc</computeroutput>
-file is ignored if it is marked as world writeable or not owned
-by the current user. This is because the
+file is ignored if it is not a regular file, or is marked as world writeable,
+or is not owned by the current user. This is because the
<computeroutput>./.valgrindrc</computeroutput> can contain options that are
potentially harmful or can be used by a local attacker to execute code under
your user account.
|
Author: petarj
Date: Thu May 11 17:59:33 2017
New Revision: 16363
Log:
mips32: improve none/tests/mips32/MIPS32int
- Invalid memory access fixed;
- Inappropriate immediate value on ROTR test changed;
- Stricter tests for LWL/LWR instructions.
Patch by Aleksandar Rikalo.
Modified:
trunk/none/tests/mips32/MIPS32int.c
trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32-BE
trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32-LE
trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-BE
trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-LE
Modified: trunk/none/tests/mips32/MIPS32int.c
==============================================================================
--- trunk/none/tests/mips32/MIPS32int.c (original)
+++ trunk/none/tests/mips32/MIPS32int.c Thu May 11 17:59:33 2017
@@ -101,9 +101,9 @@
instruction "\n\t" \
"move %0, $" #RT "\n\t" \
: "=&r" (out) \
- : "r" (mem), "r" (RTval) \
- : #RT, "cc", "memory" \
- ); \
+ : "r" (mem), "r" (RTval) \
+ : #RT, "cc", "memory" \
+ ); \
printf("%s :: rt 0x%08x\n", \
instruction, out); \
}
@@ -120,9 +120,9 @@
"mfhi %0\n\t" \
"mflo %1\n\t" \
: "=&r" (HI), "=&r" (LO) \
- : "r" (RSval)\
- : "cc", "memory" \
- ); \
+ : "r" (RSval) \
+ : "cc", "memory" \
+ ); \
printf("mfhi mflo :: HI: 0x%x, LO: 0x%x\n", \
HI, LO); \
}
@@ -662,7 +662,7 @@
TESTINSN5LOAD("lb $t0, 52($t1)", 0, 52, t0);
TESTINSN5LOAD("lb $t0, 56($t1)", 0, 56, t0);
TESTINSN5LOAD("lb $t0, 60($t1)", 0, 60, t0);
- TESTINSN5LOAD("lb $t0, 64($t1)", 0, 64, t0);
+ TESTINSN5LOAD("lb $t0, 1($t1)", 0, 1, t0);
TESTINSN5LOAD("lb $t0, 2($t1)", 0, 2, t0);
TESTINSN5LOAD("lb $t0, 6($t1)", 0, 6, t0);
TESTINSN5LOAD("lb $t0, 10($t1)", 0, 10, t0);
@@ -691,7 +691,7 @@
TESTINSN5LOAD("lbu $t0, 52($t1)", 0, 52, t0);
TESTINSN5LOAD("lbu $t0, 56($t1)", 0, 56, t0);
TESTINSN5LOAD("lbu $t0, 60($t1)", 0, 60, t0);
- TESTINSN5LOAD("lbu $t0, 64($t1)", 0, 64, t0);
+ TESTINSN5LOAD("lbu $t0, 1($t1)", 0, 1, t0);
TESTINSN5LOAD("lbu $t0, 2($t1)", 0, 2, t0);
TESTINSN5LOAD("lbu $t0, 6($t1)", 0, 6, t0);
TESTINSN5LOAD("lbu $t0, 10($t1)", 0, 10, t0);
@@ -720,7 +720,7 @@
TESTINSN5LOAD("lh $t0, 52($t1)", 0, 52, t0);
TESTINSN5LOAD("lh $t0, 56($t1)", 0, 56, t0);
TESTINSN5LOAD("lh $t0, 60($t1)", 0, 60, t0);
- TESTINSN5LOAD("lh $t0, 64($t1)", 0, 64, t0);
+ TESTINSN5LOAD("lh $t0, 62($t1)", 0, 62, t0);
TESTINSN5LOAD("lh $t0, 2($t1)", 0, 2, t0);
TESTINSN5LOAD("lh $t0, 6($t1)", 0, 6, t0);
TESTINSN5LOAD("lh $t0, 10($t1)", 0, 10, t0);
@@ -749,7 +749,7 @@
TESTINSN5LOAD("lhu $t0, 52($t1)", 0, 52, t0);
TESTINSN5LOAD("lhu $t0, 56($t1)", 0, 56, t0);
TESTINSN5LOAD("lhu $t0, 60($t1)", 0, 60, t0);
- TESTINSN5LOAD("lhu $t0, 64($t1)", 0, 64, t0);
+ TESTINSN5LOAD("lhu $t0, 62($t1)", 0, 62, t0);
TESTINSN5LOAD("lhu $t0, 2($t1)", 0, 2, t0);
TESTINSN5LOAD("lhu $t0, 6($t1)", 0, 6, t0);
TESTINSN5LOAD("lhu $t0, 10($t1)", 0, 10, t0);
@@ -786,7 +786,6 @@
TESTINSN5LOAD("lw $t0, 52($t1)", 0, 52, t0);
TESTINSN5LOAD("lw $t0, 56($t1)", 0, 56, t0);
TESTINSN5LOAD("lw $t0, 60($t1)", 0, 60, t0);
- TESTINSN5LOAD("lw $t0, 64($t1)", 0, 64, t0);
TESTINSN5LOAD("lw $t0, 2($t1)", 0, 2, t0);
TESTINSN5LOAD("lw $t0, 6($t1)", 0, 6, t0);
TESTINSN5LOAD("lw $t0, 10($t1)", 0, 10, t0);
@@ -799,62 +798,48 @@
TESTINSN5LOAD("lw $t0, 38($t1)", 0, 38, t0);
printf("LWL\n");
- TESTINSN5LOAD("lwl $t0, 0($t1)", 0, 0, t0);
- TESTINSN5LOAD("lwl $t0, 4($t1)", 0, 4, t0);
- TESTINSN5LOAD("lwl $t0, 8($t1)", 0, 8, t0);
+ TESTINSN5LOAD("lwl $t0, 3($t1)", 0, 3, t0);
+ TESTINSN5LOAD("lwl $t0, 6($t1)", 0, 6, t0);
+ TESTINSN5LOAD("lwl $t0, 9($t1)", 0, 9, t0);
TESTINSN5LOAD("lwl $t0, 12($t1)", 0, 12, t0);
- TESTINSN5LOAD("lwl $t0, 16($t1)", 0, 16, t0);
- TESTINSN5LOAD("lwl $t0, 20($t1)", 0, 20, t0);
+ TESTINSN5LOAD("lwl $t0, 15($t1)", 0, 15, t0);
+ TESTINSN5LOAD("lwl $t0, 18($t1)", 0, 18, t0);
+ TESTINSN5LOAD("lwl $t0, 21($t1)", 0, 21, t0);
TESTINSN5LOAD("lwl $t0, 24($t1)", 0, 24, t0);
- TESTINSN5LOAD("lwl $t0, 28($t1)", 0, 28, t0);
- TESTINSN5LOAD("lwl $t0, 32($t1)", 0, 32, t0);
+ TESTINSN5LOAD("lwl $t0, 27($t1)", 0, 27, t0);
+ TESTINSN5LOAD("lwl $t0, 30($t1)", 0, 30, t0);
+ TESTINSN5LOAD("lwl $t0, 33($t1)", 0, 33, t0);
TESTINSN5LOAD("lwl $t0, 36($t1)", 0, 36, t0);
- TESTINSN5LOAD("lwl $t0, 40($t1)", 0, 40, t0);
- TESTINSN5LOAD("lwl $t0, 44($t1)", 0, 44, t0);
+ TESTINSN5LOAD("lwl $t0, 39($t1)", 0, 39, t0);
+ TESTINSN5LOAD("lwl $t0, 42($t1)", 0, 42, t0);
+ TESTINSN5LOAD("lwl $t0, 45($t1)", 0, 45, t0);
TESTINSN5LOAD("lwl $t0, 48($t1)", 0, 48, t0);
- TESTINSN5LOAD("lwl $t0, 52($t1)", 0, 52, t0);
- TESTINSN5LOAD("lwl $t0, 56($t1)", 0, 56, t0);
+ TESTINSN5LOAD("lwl $t0, 51($t1)", 0, 51, t0);
+ TESTINSN5LOAD("lwl $t0, 54($t1)", 0, 54, t0);
+ TESTINSN5LOAD("lwl $t0, 57($t1)", 0, 57, t0);
TESTINSN5LOAD("lwl $t0, 60($t1)", 0, 60, t0);
- TESTINSN5LOAD("lwl $t0, 64($t1)", 0, 64, t0);
- TESTINSN5LOAD("lwl $t0, 2($t1)", 0, 2, t0);
- TESTINSN5LOAD("lwl $t0, 6($t1)", 0, 6, t0);
- TESTINSN5LOAD("lwl $t0, 10($t1)", 0, 10, t0);
- TESTINSN5LOAD("lwl $t0, 14($t1)", 0, 14, t0);
- TESTINSN5LOAD("lwl $t0, 18($t1)", 0, 18, t0);
- TESTINSN5LOAD("lwl $t0, 22($t1)", 0, 22, t0);
- TESTINSN5LOAD("lwl $t0, 26($t1)", 0, 26, t0);
- TESTINSN5LOAD("lwl $t0, 30($t1)", 0, 30, t0);
- TESTINSN5LOAD("lwl $t0, 34($t1)", 0, 34, t0);
- TESTINSN5LOAD("lwl $t0, 38($t1)", 0, 38, t0);
printf("LWR\n");
- TESTINSN5LOAD("lwr $t0, 0($t1)", 0, 0, t0);
- TESTINSN5LOAD("lwr $t0, 4($t1)", 0, 4, t0);
- TESTINSN5LOAD("lwr $t0, 8($t1)", 0, 8, t0);
+ TESTINSN5LOAD("lwr $t0, 3($t1)", 0, 0, t0);
+ TESTINSN5LOAD("lwr $t0, 6($t1)", 0, 4, t0);
+ TESTINSN5LOAD("lwr $t0, 9($t1)", 0, 8, t0);
TESTINSN5LOAD("lwr $t0, 12($t1)", 0, 12, t0);
- TESTINSN5LOAD("lwr $t0, 16($t1)", 0, 16, t0);
- TESTINSN5LOAD("lwr $t0, 20($t1)", 0, 20, t0);
- TESTINSN5LOAD("lwr $t0, 24($t1)", 0, 24, t0);
- TESTINSN5LOAD("lwr $t0, 28($t1)", 0, 28, t0);
- TESTINSN5LOAD("lwr $t0, 32($t1)", 0, 32, t0);
- TESTINSN5LOAD("lwr $t0, 36($t1)", 0, 36, t0);
- TESTINSN5LOAD("lwr $t0, 40($t1)", 0, 40, t0);
- TESTINSN5LOAD("lwr $t0, 44($t1)", 0, 44, t0);
- TESTINSN5LOAD("lwr $t0, 48($t1)", 0, 48, t0);
- TESTINSN5LOAD("lwr $t0, 52($t1)", 0, 52, t0);
- TESTINSN5LOAD("lwr $t0, 56($t1)", 0, 56, t0);
- TESTINSN5LOAD("lwr $t0, 60($t1)", 0, 60, t0);
- TESTINSN5LOAD("lwr $t0, 64($t1)", 0, 64, t0);
- TESTINSN5LOAD("lwr $t0, 2($t1)", 0, 2, t0);
- TESTINSN5LOAD("lwr $t0, 6($t1)", 0, 6, t0);
- TESTINSN5LOAD("lwr $t0, 10($t1)", 0, 10, t0);
- TESTINSN5LOAD("lwr $t0, 14($t1)", 0, 14, t0);
- TESTINSN5LOAD("lwr $t0, 18($t1)", 0, 18, t0);
- TESTINSN5LOAD("lwr $t0, 22($t1)", 0, 22, t0);
- TESTINSN5LOAD("lwr $t0, 26($t1)", 0, 26, t0);
- TESTINSN5LOAD("lwr $t0, 30($t1)", 0, 30, t0);
- TESTINSN5LOAD("lwr $t0, 34($t1)", 0, 34, t0);
- TESTINSN5LOAD("lwr $t0, 38($t1)", 0, 38, t0);
+ TESTINSN5LOAD("lwr $t0, 15($t1)", 0, 16, t0);
+ TESTINSN5LOAD("lwr $t0, 18($t1)", 0, 20, t0);
+ TESTINSN5LOAD("lwr $t0, 21($t1)", 0, 24, t0);
+ TESTINSN5LOAD("lwr $t0, 24($t1)", 0, 28, t0);
+ TESTINSN5LOAD("lwr $t0, 27($t1)", 0, 32, t0);
+ TESTINSN5LOAD("lwr $t0, 30($t1)", 0, 36, t0);
+ TESTINSN5LOAD("lwr $t0, 33($t1)", 0, 40, t0);
+ TESTINSN5LOAD("lwr $t0, 36($t1)", 0, 44, t0);
+ TESTINSN5LOAD("lwr $t0, 39($t1)", 0, 48, t0);
+ TESTINSN5LOAD("lwr $t0, 42($t1)", 0, 52, t0);
+ TESTINSN5LOAD("lwr $t0, 45($t1)", 0, 56, t0);
+ TESTINSN5LOAD("lwr $t0, 48($t1)", 0, 60, t0);
+ TESTINSN5LOAD("lwr $t0, 51($t1)", 0, 64, t0);
+ TESTINSN5LOAD("lwr $t0, 54($t1)", 0, 2, t0);
+ TESTINSN5LOAD("lwr $t0, 57($t1)", 0, 6, t0);
+ TESTINSN5LOAD("lwr $t0, 60($t1)", 0, 10, t0);
printf("MADD\n");
TESTINST3a("madd $t0, $t1", 0x6, 0x2, t0, t1);
@@ -1211,8 +1196,8 @@
TESTINST2("rotr $t0, $t1, 0x0000000F", 0x31415927, 0x0000000F, t0, t1);
TESTINST2("rotr $t0, $t1, 0x00000010", 0x31415927, 0x00000010, t0, t1);
TESTINST2("rotr $t0, $t1, 0x0000001F", 0x31415927, 0x0000001F, t0, t1);
- TESTINST2("rotr $t0, $t1, 0x00000020", 0x31415927, 0x00000020, t0, t1);
- TESTINST2("rotr $t0, $t1, 0x00000021", 0x31415927, 0x00000021, t0, t1);
+ TESTINST2("rotr $t0, $t1, 0x0000001A", 0x31415927, 0x0000001A, t0, t1);
+ TESTINST2("rotr $t0, $t1, 0x00000007", 0x31415927, 0x00000007, t0, t1);
TESTINST2("rotr $t0, $t1, 0x00000000", 0x00088000, 0x00000000, t0, t1);
TESTINST2("rotr $t0, $t1, 0x00000001", 0x00088000, 0x00000001, t0, t1);
TESTINST2("rotr $t0, $t1, 31", 0x00088000, 31, t0, t1);
@@ -1220,7 +1205,7 @@
TESTINST2("rotr $t0, $t1, 17", 0x00010000, 17, t0, t1);
TESTINST2("rotr $t0, $t1, 18", 0x00010000, 18, t0, t1);
TESTINST2("rotr $t0, $t1, 0", 0, 0, t0, t1);
- TESTINST2("rotr $t0, $t1, 0xffff", 0xffff, 0xffff, t0, t1);
+ TESTINST2("rotr $t0, $t1, 0x1F", 0xFFFF, 0x1F, t0, t1);
#endif
#if (__mips==32) && (__mips_isa_rev>=2)
Modified: trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32-BE
==============================================================================
--- trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32-BE (original)
+++ trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32-BE Thu May 11 17:59:33 2017
@@ -125,7 +125,7 @@
lb $t0, 52($t1) :: rt 0x0000004e
lb $t0, 56($t1) :: rt 0x00000047
lb $t0, 60($t1) :: rt 0x0000004a
-lb $t0, 64($t1) :: rt 0x00000041
+lb $t0, 1($t1) :: rt 0x0000001f
lb $t0, 2($t1) :: rt 0x0000001e
lb $t0, 6($t1) :: rt 0x00000000
lb $t0, 10($t1) :: rt 0x00000000
@@ -153,7 +153,7 @@
lbu $t0, 52($t1) :: rt 0x0000004e
lbu $t0, 56($t1) :: rt 0x00000047
lbu $t0, 60($t1) :: rt 0x0000004a
-lbu $t0, 64($t1) :: rt 0x00000041
+lbu $t0, 1($t1) :: rt 0x0000001f
lbu $t0, 2($t1) :: rt 0x0000001e
lbu $t0, 6($t1) :: rt 0x00000000
lbu $t0, 10($t1) :: rt 0x00000000
@@ -181,7 +181,7 @@
lh $t0, 52($t1) :: rt 0x00004e46
lh $t0, 56($t1) :: rt 0x0000474d
lh $t0, 60($t1) :: rt 0x00004a48
-lh $t0, 64($t1) :: rt 0x00004144
+lh $t0, 62($t1) :: rt 0x00004a4c
lh $t0, 2($t1) :: rt 0x00001e1f
lh $t0, 6($t1) :: rt 0x00000000
lh $t0, 10($t1) :: rt 0x00000003
@@ -209,7 +209,7 @@
lhu $t0, 52($t1) :: rt 0x00004e46
lhu $t0, 56($t1) :: rt 0x0000474d
lhu $t0, 60($t1) :: rt 0x00004a48
-lhu $t0, 64($t1) :: rt 0x00004144
+lhu $t0, 62($t1) :: rt 0x00004a4c
lhu $t0, 2($t1) :: rt 0x00001e1f
lhu $t0, 6($t1) :: rt 0x00000000
lhu $t0, 10($t1) :: rt 0x00000003
@@ -244,7 +244,6 @@
lw $t0, 52($t1) :: rt 0x4e464d46
lw $t0, 56($t1) :: rt 0x474d474c
lw $t0, 60($t1) :: rt 0x4a484a4c
-lw $t0, 64($t1) :: rt 0x41444400
lw $t0, 2($t1) :: rt 0x1e1f0000
lw $t0, 6($t1) :: rt 0x00000000
lw $t0, 10($t1) :: rt 0x0003ffff
@@ -256,61 +255,47 @@
lw $t0, 34($t1) :: rt 0x3f3e3e35
lw $t0, 38($t1) :: rt 0x3d3c363a
LWL
-lwl $t0, 0($t1) :: rt 0x121f1e1f
-lwl $t0, 4($t1) :: rt 0x00000000
-lwl $t0, 8($t1) :: rt 0x00000003
+lwl $t0, 3($t1) :: rt 0x1f000000
+lwl $t0, 6($t1) :: rt 0x00000000
+lwl $t0, 9($t1) :: rt 0x00000300
lwl $t0, 12($t1) :: rt 0xffffffff
-lwl $t0, 16($t1) :: rt 0x232f2e2f
-lwl $t0, 20($t1) :: rt 0x242c2b2b
+lwl $t0, 15($t1) :: rt 0xff000000
+lwl $t0, 18($t1) :: rt 0x2e2f0000
+lwl $t0, 21($t1) :: rt 0x2c2b2b00
lwl $t0, 24($t1) :: rt 0x252a2e2b
-lwl $t0, 28($t1) :: rt 0x262d2d2a
-lwl $t0, 32($t1) :: rt 0x3f343f3e
+lwl $t0, 27($t1) :: rt 0x2b000000
+lwl $t0, 30($t1) :: rt 0x2d2a0000
+lwl $t0, 33($t1) :: rt 0x343f3e00
lwl $t0, 36($t1) :: rt 0x3e353d3c
-lwl $t0, 40($t1) :: rt 0x363a3c3b
-lwl $t0, 44($t1) :: rt 0x3b373b3a
+lwl $t0, 39($t1) :: rt 0x3c000000
+lwl $t0, 42($t1) :: rt 0x3c3b0000
+lwl $t0, 45($t1) :: rt 0x373b3a00
lwl $t0, 48($t1) :: rt 0x454f4e45
-lwl $t0, 52($t1) :: rt 0x4e464d46
-lwl $t0, 56($t1) :: rt 0x474d474c
+lwl $t0, 51($t1) :: rt 0x45000000
+lwl $t0, 54($t1) :: rt 0x4d460000
+lwl $t0, 57($t1) :: rt 0x4d474c00
lwl $t0, 60($t1) :: rt 0x4a484a4c
-lwl $t0, 64($t1) :: rt 0x41444400
-lwl $t0, 2($t1) :: rt 0x1e1f0000
-lwl $t0, 6($t1) :: rt 0x00000000
-lwl $t0, 10($t1) :: rt 0x00030000
-lwl $t0, 14($t1) :: rt 0xffff0000
-lwl $t0, 18($t1) :: rt 0x2e2f0000
-lwl $t0, 22($t1) :: rt 0x2b2b0000
-lwl $t0, 26($t1) :: rt 0x2e2b0000
-lwl $t0, 30($t1) :: rt 0x2d2a0000
-lwl $t0, 34($t1) :: rt 0x3f3e0000
-lwl $t0, 38($t1) :: rt 0x3d3c0000
LWR
-lwr $t0, 0($t1) :: rt 0x00000012
-lwr $t0, 4($t1) :: rt 0x00000000
-lwr $t0, 8($t1) :: rt 0x00000000
+lwr $t0, 3($t1) :: rt 0x121f1e1f
+lwr $t0, 6($t1) :: rt 0x00000000
+lwr $t0, 9($t1) :: rt 0x00000000
lwr $t0, 12($t1) :: rt 0x000000ff
-lwr $t0, 16($t1) :: rt 0x00000023
-lwr $t0, 20($t1) :: rt 0x00000024
+lwr $t0, 15($t1) :: rt 0xffffffff
+lwr $t0, 18($t1) :: rt 0x00232f2e
+lwr $t0, 21($t1) :: rt 0x0000242c
lwr $t0, 24($t1) :: rt 0x00000025
-lwr $t0, 28($t1) :: rt 0x00000026
-lwr $t0, 32($t1) :: rt 0x0000003f
+lwr $t0, 27($t1) :: rt 0x252a2e2b
+lwr $t0, 30($t1) :: rt 0x00262d2d
+lwr $t0, 33($t1) :: rt 0x00003f34
lwr $t0, 36($t1) :: rt 0x0000003e
-lwr $t0, 40($t1) :: rt 0x00000036
-lwr $t0, 44($t1) :: rt 0x0000003b
+lwr $t0, 39($t1) :: rt 0x3e353d3c
+lwr $t0, 42($t1) :: rt 0x00363a3c
+lwr $t0, 45($t1) :: rt 0x00003b37
lwr $t0, 48($t1) :: rt 0x00000045
-lwr $t0, 52($t1) :: rt 0x0000004e
-lwr $t0, 56($t1) :: rt 0x00000047
+lwr $t0, 51($t1) :: rt 0x454f4e45
+lwr $t0, 54($t1) :: rt 0x004e464d
+lwr $t0, 57($t1) :: rt 0x0000474d
lwr $t0, 60($t1) :: rt 0x0000004a
-lwr $t0, 64($t1) :: rt 0x00000041
-lwr $t0, 2($t1) :: rt 0x00121f1e
-lwr $t0, 6($t1) :: rt 0x00000000
-lwr $t0, 10($t1) :: rt 0x00000000
-lwr $t0, 14($t1) :: rt 0x00ffffff
-lwr $t0, 18($t1) :: rt 0x00232f2e
-lwr $t0, 22($t1) :: rt 0x00242c2b
-lwr $t0, 26($t1) :: rt 0x00252a2e
-lwr $t0, 30($t1) :: rt 0x00262d2d
-lwr $t0, 34($t1) :: rt 0x003f343f
-lwr $t0, 38($t1) :: rt 0x003e353d
MADD
madd $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x0000000c
madd $t0, $t1 :: rs 0x00000055 rt 0x00000028 HI 0x00000000 LO 0x00000d48
Modified: trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32-LE
==============================================================================
--- trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32-LE (original)
+++ trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32-LE Thu May 11 17:59:33 2017
@@ -125,7 +125,7 @@
lb $t0, 52($t1) :: rt 0x00000046
lb $t0, 56($t1) :: rt 0x0000004c
lb $t0, 60($t1) :: rt 0x0000004c
-lb $t0, 64($t1) :: rt 0x00000041
+lb $t0, 1($t1) :: rt 0x0000001e
lb $t0, 2($t1) :: rt 0x0000001f
lb $t0, 6($t1) :: rt 0x00000000
lb $t0, 10($t1) :: rt 0x00000000
@@ -153,7 +153,7 @@
lbu $t0, 52($t1) :: rt 0x00000046
lbu $t0, 56($t1) :: rt 0x0000004c
lbu $t0, 60($t1) :: rt 0x0000004c
-lbu $t0, 64($t1) :: rt 0x00000041
+lbu $t0, 1($t1) :: rt 0x0000001e
lbu $t0, 2($t1) :: rt 0x0000001f
lbu $t0, 6($t1) :: rt 0x00000000
lbu $t0, 10($t1) :: rt 0x00000000
@@ -181,7 +181,7 @@
lh $t0, 52($t1) :: rt 0x00004d46
lh $t0, 56($t1) :: rt 0x0000474c
lh $t0, 60($t1) :: rt 0x00004a4c
-lh $t0, 64($t1) :: rt 0x00004441
+lh $t0, 62($t1) :: rt 0x00004a48
lh $t0, 2($t1) :: rt 0x0000121f
lh $t0, 6($t1) :: rt 0x00000000
lh $t0, 10($t1) :: rt 0x00000000
@@ -209,7 +209,7 @@
lhu $t0, 52($t1) :: rt 0x00004d46
lhu $t0, 56($t1) :: rt 0x0000474c
lhu $t0, 60($t1) :: rt 0x00004a4c
-lhu $t0, 64($t1) :: rt 0x00004441
+lhu $t0, 62($t1) :: rt 0x00004a48
lhu $t0, 2($t1) :: rt 0x0000121f
lhu $t0, 6($t1) :: rt 0x00000000
lhu $t0, 10($t1) :: rt 0x00000000
@@ -244,7 +244,6 @@
lw $t0, 52($t1) :: rt 0x4e464d46
lw $t0, 56($t1) :: rt 0x474d474c
lw $t0, 60($t1) :: rt 0x4a484a4c
-lw $t0, 64($t1) :: rt 0x00444441
lw $t0, 2($t1) :: rt 0x0000121f
lw $t0, 6($t1) :: rt 0x00030000
lw $t0, 10($t1) :: rt 0xffff0000
@@ -256,61 +255,47 @@
lw $t0, 34($t1) :: rt 0x3d3c3f34
lw $t0, 38($t1) :: rt 0x3c3b3e35
LWL
-lwl $t0, 0($t1) :: rt 0x1f000000
-lwl $t0, 4($t1) :: rt 0x00000000
-lwl $t0, 8($t1) :: rt 0x03000000
+lwl $t0, 3($t1) :: rt 0x121f1e1f
+lwl $t0, 6($t1) :: rt 0x00000000
+lwl $t0, 9($t1) :: rt 0x00030000
lwl $t0, 12($t1) :: rt 0xff000000
-lwl $t0, 16($t1) :: rt 0x2f000000
-lwl $t0, 20($t1) :: rt 0x2b000000
+lwl $t0, 15($t1) :: rt 0xffffffff
+lwl $t0, 18($t1) :: rt 0x2f2e2f00
+lwl $t0, 21($t1) :: rt 0x2b2b0000
lwl $t0, 24($t1) :: rt 0x2b000000
-lwl $t0, 28($t1) :: rt 0x2a000000
-lwl $t0, 32($t1) :: rt 0x3e000000
+lwl $t0, 27($t1) :: rt 0x252a2e2b
+lwl $t0, 30($t1) :: rt 0x2d2d2a00
+lwl $t0, 33($t1) :: rt 0x3f3e0000
lwl $t0, 36($t1) :: rt 0x3c000000
-lwl $t0, 40($t1) :: rt 0x3b000000
-lwl $t0, 44($t1) :: rt 0x3a000000
+lwl $t0, 39($t1) :: rt 0x3e353d3c
+lwl $t0, 42($t1) :: rt 0x3a3c3b00
+lwl $t0, 45($t1) :: rt 0x3b3a0000
lwl $t0, 48($t1) :: rt 0x45000000
-lwl $t0, 52($t1) :: rt 0x46000000
-lwl $t0, 56($t1) :: rt 0x4c000000
+lwl $t0, 51($t1) :: rt 0x454f4e45
+lwl $t0, 54($t1) :: rt 0x464d4600
+lwl $t0, 57($t1) :: rt 0x474c0000
lwl $t0, 60($t1) :: rt 0x4c000000
-lwl $t0, 64($t1) :: rt 0x41000000
-lwl $t0, 2($t1) :: rt 0x1f1e1f00
-lwl $t0, 6($t1) :: rt 0x00000000
-lwl $t0, 10($t1) :: rt 0x00000300
-lwl $t0, 14($t1) :: rt 0xffffff00
-lwl $t0, 18($t1) :: rt 0x2f2e2f00
-lwl $t0, 22($t1) :: rt 0x2c2b2b00
-lwl $t0, 26($t1) :: rt 0x2a2e2b00
-lwl $t0, 30($t1) :: rt 0x2d2d2a00
-lwl $t0, 34($t1) :: rt 0x343f3e00
-lwl $t0, 38($t1) :: rt 0x353d3c00
LWR
-lwr $t0, 0($t1) :: rt 0x121f1e1f
-lwr $t0, 4($t1) :: rt 0x00000000
-lwr $t0, 8($t1) :: rt 0x00000003
+lwr $t0, 3($t1) :: rt 0x00000012
+lwr $t0, 6($t1) :: rt 0x00000000
+lwr $t0, 9($t1) :: rt 0x00000000
lwr $t0, 12($t1) :: rt 0xffffffff
-lwr $t0, 16($t1) :: rt 0x232f2e2f
-lwr $t0, 20($t1) :: rt 0x242c2b2b
+lwr $t0, 15($t1) :: rt 0x000000ff
+lwr $t0, 18($t1) :: rt 0x0000232f
+lwr $t0, 21($t1) :: rt 0x00242c2b
lwr $t0, 24($t1) :: rt 0x252a2e2b
-lwr $t0, 28($t1) :: rt 0x262d2d2a
-lwr $t0, 32($t1) :: rt 0x3f343f3e
+lwr $t0, 27($t1) :: rt 0x00000025
+lwr $t0, 30($t1) :: rt 0x0000262d
+lwr $t0, 33($t1) :: rt 0x003f343f
lwr $t0, 36($t1) :: rt 0x3e353d3c
-lwr $t0, 40($t1) :: rt 0x363a3c3b
-lwr $t0, 44($t1) :: rt 0x3b373b3a
+lwr $t0, 39($t1) :: rt 0x0000003e
+lwr $t0, 42($t1) :: rt 0x0000363a
+lwr $t0, 45($t1) :: rt 0x003b373b
lwr $t0, 48($t1) :: rt 0x454f4e45
-lwr $t0, 52($t1) :: rt 0x4e464d46
-lwr $t0, 56($t1) :: rt 0x474d474c
+lwr $t0, 51($t1) :: rt 0x00000045
+lwr $t0, 54($t1) :: rt 0x00004e46
+lwr $t0, 57($t1) :: rt 0x00474d47
lwr $t0, 60($t1) :: rt 0x4a484a4c
-lwr $t0, 64($t1) :: rt 0x00444441
-lwr $t0, 2($t1) :: rt 0x0000121f
-lwr $t0, 6($t1) :: rt 0x00000000
-lwr $t0, 10($t1) :: rt 0x00000000
-lwr $t0, 14($t1) :: rt 0x0000ffff
-lwr $t0, 18($t1) :: rt 0x0000232f
-lwr $t0, 22($t1) :: rt 0x0000242c
-lwr $t0, 26($t1) :: rt 0x0000252a
-lwr $t0, 30($t1) :: rt 0x0000262d
-lwr $t0, 34($t1) :: rt 0x00003f34
-lwr $t0, 38($t1) :: rt 0x00003e35
MADD
madd $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x0000000c
madd $t0, $t1 :: rs 0x00000055 rt 0x00000028 HI 0x00000000 LO 0x00000d48
Modified: trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-BE
==============================================================================
--- trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-BE (original)
+++ trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-BE Thu May 11 17:59:33 2017
@@ -511,7 +511,7 @@
lb $t0, 52($t1) :: rt 0x0000004e
lb $t0, 56($t1) :: rt 0x00000047
lb $t0, 60($t1) :: rt 0x0000004a
-lb $t0, 64($t1) :: rt 0x00000041
+lb $t0, 1($t1) :: rt 0x0000001f
lb $t0, 2($t1) :: rt 0x0000001e
lb $t0, 6($t1) :: rt 0x00000000
lb $t0, 10($t1) :: rt 0x00000000
@@ -539,7 +539,7 @@
lbu $t0, 52($t1) :: rt 0x0000004e
lbu $t0, 56($t1) :: rt 0x00000047
lbu $t0, 60($t1) :: rt 0x0000004a
-lbu $t0, 64($t1) :: rt 0x00000041
+lbu $t0, 1($t1) :: rt 0x0000001f
lbu $t0, 2($t1) :: rt 0x0000001e
lbu $t0, 6($t1) :: rt 0x00000000
lbu $t0, 10($t1) :: rt 0x00000000
@@ -567,7 +567,7 @@
lh $t0, 52($t1) :: rt 0x00004e46
lh $t0, 56($t1) :: rt 0x0000474d
lh $t0, 60($t1) :: rt 0x00004a48
-lh $t0, 64($t1) :: rt 0x00004144
+lh $t0, 62($t1) :: rt 0x00004a4c
lh $t0, 2($t1) :: rt 0x00001e1f
lh $t0, 6($t1) :: rt 0x00000000
lh $t0, 10($t1) :: rt 0x00000003
@@ -595,7 +595,7 @@
lhu $t0, 52($t1) :: rt 0x00004e46
lhu $t0, 56($t1) :: rt 0x0000474d
lhu $t0, 60($t1) :: rt 0x00004a48
-lhu $t0, 64($t1) :: rt 0x00004144
+lhu $t0, 62($t1) :: rt 0x00004a4c
lhu $t0, 2($t1) :: rt 0x00001e1f
lhu $t0, 6($t1) :: rt 0x00000000
lhu $t0, 10($t1) :: rt 0x00000003
@@ -630,7 +630,6 @@
lw $t0, 52($t1) :: rt 0x4e464d46
lw $t0, 56($t1) :: rt 0x474d474c
lw $t0, 60($t1) :: rt 0x4a484a4c
-lw $t0, 64($t1) :: rt 0x41444400
lw $t0, 2($t1) :: rt 0x1e1f0000
lw $t0, 6($t1) :: rt 0x00000000
lw $t0, 10($t1) :: rt 0x0003ffff
@@ -642,61 +641,47 @@
lw $t0, 34($t1) :: rt 0x3f3e3e35
lw $t0, 38($t1) :: rt 0x3d3c363a
LWL
-lwl $t0, 0($t1) :: rt 0x121f1e1f
-lwl $t0, 4($t1) :: rt 0x00000000
-lwl $t0, 8($t1) :: rt 0x00000003
+lwl $t0, 3($t1) :: rt 0x1f000000
+lwl $t0, 6($t1) :: rt 0x00000000
+lwl $t0, 9($t1) :: rt 0x00000300
lwl $t0, 12($t1) :: rt 0xffffffff
-lwl $t0, 16($t1) :: rt 0x232f2e2f
-lwl $t0, 20($t1) :: rt 0x242c2b2b
+lwl $t0, 15($t1) :: rt 0xff000000
+lwl $t0, 18($t1) :: rt 0x2e2f0000
+lwl $t0, 21($t1) :: rt 0x2c2b2b00
lwl $t0, 24($t1) :: rt 0x252a2e2b
-lwl $t0, 28($t1) :: rt 0x262d2d2a
-lwl $t0, 32($t1) :: rt 0x3f343f3e
+lwl $t0, 27($t1) :: rt 0x2b000000
+lwl $t0, 30($t1) :: rt 0x2d2a0000
+lwl $t0, 33($t1) :: rt 0x343f3e00
lwl $t0, 36($t1) :: rt 0x3e353d3c
-lwl $t0, 40($t1) :: rt 0x363a3c3b
-lwl $t0, 44($t1) :: rt 0x3b373b3a
+lwl $t0, 39($t1) :: rt 0x3c000000
+lwl $t0, 42($t1) :: rt 0x3c3b0000
+lwl $t0, 45($t1) :: rt 0x373b3a00
lwl $t0, 48($t1) :: rt 0x454f4e45
-lwl $t0, 52($t1) :: rt 0x4e464d46
-lwl $t0, 56($t1) :: rt 0x474d474c
+lwl $t0, 51($t1) :: rt 0x45000000
+lwl $t0, 54($t1) :: rt 0x4d460000
+lwl $t0, 57($t1) :: rt 0x4d474c00
lwl $t0, 60($t1) :: rt 0x4a484a4c
-lwl $t0, 64($t1) :: rt 0x41444400
-lwl $t0, 2($t1) :: rt 0x1e1f0000
-lwl $t0, 6($t1) :: rt 0x00000000
-lwl $t0, 10($t1) :: rt 0x00030000
-lwl $t0, 14($t1) :: rt 0xffff0000
-lwl $t0, 18($t1) :: rt 0x2e2f0000
-lwl $t0, 22($t1) :: rt 0x2b2b0000
-lwl $t0, 26($t1) :: rt 0x2e2b0000
-lwl $t0, 30($t1) :: rt 0x2d2a0000
-lwl $t0, 34($t1) :: rt 0x3f3e0000
-lwl $t0, 38($t1) :: rt 0x3d3c0000
LWR
-lwr $t0, 0($t1) :: rt 0x00000012
-lwr $t0, 4($t1) :: rt 0x00000000
-lwr $t0, 8($t1) :: rt 0x00000000
+lwr $t0, 3($t1) :: rt 0x121f1e1f
+lwr $t0, 6($t1) :: rt 0x00000000
+lwr $t0, 9($t1) :: rt 0x00000000
lwr $t0, 12($t1) :: rt 0x000000ff
-lwr $t0, 16($t1) :: rt 0x00000023
-lwr $t0, 20($t1) :: rt 0x00000024
+lwr $t0, 15($t1) :: rt 0xffffffff
+lwr $t0, 18($t1) :: rt 0x00232f2e
+lwr $t0, 21($t1) :: rt 0x0000242c
lwr $t0, 24($t1) :: rt 0x00000025
-lwr $t0, 28($t1) :: rt 0x00000026
-lwr $t0, 32($t1) :: rt 0x0000003f
+lwr $t0, 27($t1) :: rt 0x252a2e2b
+lwr $t0, 30($t1) :: rt 0x00262d2d
+lwr $t0, 33($t1) :: rt 0x00003f34
lwr $t0, 36($t1) :: rt 0x0000003e
-lwr $t0, 40($t1) :: rt 0x00000036
-lwr $t0, 44($t1) :: rt 0x0000003b
+lwr $t0, 39($t1) :: rt 0x3e353d3c
+lwr $t0, 42($t1) :: rt 0x00363a3c
+lwr $t0, 45($t1) :: rt 0x00003b37
lwr $t0, 48($t1) :: rt 0x00000045
-lwr $t0, 52($t1) :: rt 0x0000004e
-lwr $t0, 56($t1) :: rt 0x00000047
+lwr $t0, 51($t1) :: rt 0x454f4e45
+lwr $t0, 54($t1) :: rt 0x004e464d
+lwr $t0, 57($t1) :: rt 0x0000474d
lwr $t0, 60($t1) :: rt 0x0000004a
-lwr $t0, 64($t1) :: rt 0x00000041
-lwr $t0, 2($t1) :: rt 0x00121f1e
-lwr $t0, 6($t1) :: rt 0x00000000
-lwr $t0, 10($t1) :: rt 0x00000000
-lwr $t0, 14($t1) :: rt 0x00ffffff
-lwr $t0, 18($t1) :: rt 0x00232f2e
-lwr $t0, 22($t1) :: rt 0x00242c2b
-lwr $t0, 26($t1) :: rt 0x00252a2e
-lwr $t0, 30($t1) :: rt 0x00262d2d
-lwr $t0, 34($t1) :: rt 0x003f343f
-lwr $t0, 38($t1) :: rt 0x003e353d
MADD
madd $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x0000000c
madd $t0, $t1 :: rs 0x00000055 rt 0x00000028 HI 0x00000000 LO 0x00000d48
@@ -1034,8 +1019,8 @@
rotr $t0, $t1, 0x0000000F :: rt 0xb24e6282 rs 0x31415927, imm 0x0000000f
rotr $t0, $t1, 0x00000010 :: rt 0x59273141 rs 0x31415927, imm 0x00000010
rotr $t0, $t1, 0x0000001F :: rt 0x6282b24e rs 0x31415927, imm 0x0000001f
-rotr $t0, $t1, 0x00000020 :: rt 0x31415927 rs 0x31415927, imm 0x00000020
-rotr $t0, $t1, 0x00000021 :: rt 0x98a0ac93 rs 0x31415927, imm 0x00000021
+rotr $t0, $t1, 0x0000001A :: rt 0x505649cc rs 0x31415927, imm 0x0000001a
+rotr $t0, $t1, 0x00000007 :: rt 0x4e6282b2 rs 0x31415927, imm 0x00000007
rotr $t0, $t1, 0x00000000 :: rt 0x00088000 rs 0x00088000, imm 0x00000000
rotr $t0, $t1, 0x00000001 :: rt 0x00044000 rs 0x00088000, imm 0x00000001
rotr $t0, $t1, 31 :: rt 0x00110000 rs 0x00088000, imm 0x0000001f
@@ -1043,7 +1028,7 @@
rotr $t0, $t1, 17 :: rt 0x80000000 rs 0x00010000, imm 0x00000011
rotr $t0, $t1, 18 :: rt 0x40000000 rs 0x00010000, imm 0x00000012
rotr $t0, $t1, 0 :: rt 0x00000000 rs 0x00000000, imm 0x00000000
-rotr $t0, $t1, 0xffff :: rt 0x0001fffe rs 0x0000ffff, imm 0x0000ffff
+rotr $t0, $t1, 0x1F :: rt 0x0001fffe rs 0x0000ffff, imm 0x0000001f
ROTRV
rotrv $t0, $t1, $t2 :: rd 0x6282b24e rs 0x31415927, rt 0xffffffff
rotrv $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xee00ee00
Modified: trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-LE
==============================================================================
--- trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-LE (original)
+++ trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-LE Thu May 11 17:59:33 2017
@@ -511,7 +511,7 @@
lb $t0, 52($t1) :: rt 0x00000046
lb $t0, 56($t1) :: rt 0x0000004c
lb $t0, 60($t1) :: rt 0x0000004c
-lb $t0, 64($t1) :: rt 0x00000041
+lb $t0, 1($t1) :: rt 0x0000001e
lb $t0, 2($t1) :: rt 0x0000001f
lb $t0, 6($t1) :: rt 0x00000000
lb $t0, 10($t1) :: rt 0x00000000
@@ -539,7 +539,7 @@
lbu $t0, 52($t1) :: rt 0x00000046
lbu $t0, 56($t1) :: rt 0x0000004c
lbu $t0, 60($t1) :: rt 0x0000004c
-lbu $t0, 64($t1) :: rt 0x00000041
+lbu $t0, 1($t1) :: rt 0x0000001e
lbu $t0, 2($t1) :: rt 0x0000001f
lbu $t0, 6($t1) :: rt 0x00000000
lbu $t0, 10($t1) :: rt 0x00000000
@@ -567,7 +567,7 @@
lh $t0, 52($t1) :: rt 0x00004d46
lh $t0, 56($t1) :: rt 0x0000474c
lh $t0, 60($t1) :: rt 0x00004a4c
-lh $t0, 64($t1) :: rt 0x00004441
+lh $t0, 62($t1) :: rt 0x00004a48
lh $t0, 2($t1) :: rt 0x0000121f
lh $t0, 6($t1) :: rt 0x00000000
lh $t0, 10($t1) :: rt 0x00000000
@@ -595,7 +595,7 @@
lhu $t0, 52($t1) :: rt 0x00004d46
lhu $t0, 56($t1) :: rt 0x0000474c
lhu $t0, 60($t1) :: rt 0x00004a4c
-lhu $t0, 64($t1) :: rt 0x00004441
+lhu $t0, 62($t1) :: rt 0x00004a48
lhu $t0, 2($t1) :: rt 0x0000121f
lhu $t0, 6($t1) :: rt 0x00000000
lhu $t0, 10($t1) :: rt 0x00000000
@@ -630,7 +630,6 @@
lw $t0, 52($t1) :: rt 0x4e464d46
lw $t0, 56($t1) :: rt 0x474d474c
lw $t0, 60($t1) :: rt 0x4a484a4c
-lw $t0, 64($t1) :: rt 0x00444441
lw $t0, 2($t1) :: rt 0x0000121f
lw $t0, 6($t1) :: rt 0x00030000
lw $t0, 10($t1) :: rt 0xffff0000
@@ -642,61 +641,47 @@
lw $t0, 34($t1) :: rt 0x3d3c3f34
lw $t0, 38($t1) :: rt 0x3c3b3e35
LWL
-lwl $t0, 0($t1) :: rt 0x1f000000
-lwl $t0, 4($t1) :: rt 0x00000000
-lwl $t0, 8($t1) :: rt 0x03000000
+lwl $t0, 3($t1) :: rt 0x121f1e1f
+lwl $t0, 6($t1) :: rt 0x00000000
+lwl $t0, 9($t1) :: rt 0x00030000
lwl $t0, 12($t1) :: rt 0xff000000
-lwl $t0, 16($t1) :: rt 0x2f000000
-lwl $t0, 20($t1) :: rt 0x2b000000
+lwl $t0, 15($t1) :: rt 0xffffffff
+lwl $t0, 18($t1) :: rt 0x2f2e2f00
+lwl $t0, 21($t1) :: rt 0x2b2b0000
lwl $t0, 24($t1) :: rt 0x2b000000
-lwl $t0, 28($t1) :: rt 0x2a000000
-lwl $t0, 32($t1) :: rt 0x3e000000
+lwl $t0, 27($t1) :: rt 0x252a2e2b
+lwl $t0, 30($t1) :: rt 0x2d2d2a00
+lwl $t0, 33($t1) :: rt 0x3f3e0000
lwl $t0, 36($t1) :: rt 0x3c000000
-lwl $t0, 40($t1) :: rt 0x3b000000
-lwl $t0, 44($t1) :: rt 0x3a000000
+lwl $t0, 39($t1) :: rt 0x3e353d3c
+lwl $t0, 42($t1) :: rt 0x3a3c3b00
+lwl $t0, 45($t1) :: rt 0x3b3a0000
lwl $t0, 48($t1) :: rt 0x45000000
-lwl $t0, 52($t1) :: rt 0x46000000
-lwl $t0, 56($t1) :: rt 0x4c000000
+lwl $t0, 51($t1) :: rt 0x454f4e45
+lwl $t0, 54($t1) :: rt 0x464d4600
+lwl $t0, 57($t1) :: rt 0x474c0000
lwl $t0, 60($t1) :: rt 0x4c000000
-lwl $t0, 64($t1) :: rt 0x41000000
-lwl $t0, 2($t1) :: rt 0x1f1e1f00
-lwl $t0, 6($t1) :: rt 0x00000000
-lwl $t0, 10($t1) :: rt 0x00000300
-lwl $t0, 14($t1) :: rt 0xffffff00
-lwl $t0, 18($t1) :: rt 0x2f2e2f00
-lwl $t0, 22($t1) :: rt 0x2c2b2b00
-lwl $t0, 26($t1) :: rt 0x2a2e2b00
-lwl $t0, 30($t1) :: rt 0x2d2d2a00
-lwl $t0, 34($t1) :: rt 0x343f3e00
-lwl $t0, 38($t1) :: rt 0x353d3c00
LWR
-lwr $t0, 0($t1) :: rt 0x121f1e1f
-lwr $t0, 4($t1) :: rt 0x00000000
-lwr $t0, 8($t1) :: rt 0x00000003
+lwr $t0, 3($t1) :: rt 0x00000012
+lwr $t0, 6($t1) :: rt 0x00000000
+lwr $t0, 9($t1) :: rt 0x00000000
lwr $t0, 12($t1) :: rt 0xffffffff
-lwr $t0, 16($t1) :: rt 0x232f2e2f
-lwr $t0, 20($t1) :: rt 0x242c2b2b
+lwr $t0, 15($t1) :: rt 0x000000ff
+lwr $t0, 18($t1) :: rt 0x0000232f
+lwr $t0, 21($t1) :: rt 0x00242c2b
lwr $t0, 24($t1) :: rt 0x252a2e2b
-lwr $t0, 28($t1) :: rt 0x262d2d2a
-lwr $t0, 32($t1) :: rt 0x3f343f3e
+lwr $t0, 27($t1) :: rt 0x00000025
+lwr $t0, 30($t1) :: rt 0x0000262d
+lwr $t0, 33($t1) :: rt 0x003f343f
lwr $t0, 36($t1) :: rt 0x3e353d3c
-lwr $t0, 40($t1) :: rt 0x363a3c3b
-lwr $t0, 44($t1) :: rt 0x3b373b3a
+lwr $t0, 39($t1) :: rt 0x0000003e
+lwr $t0, 42($t1) :: rt 0x0000363a
+lwr $t0, 45($t1) :: rt 0x003b373b
lwr $t0, 48($t1) :: rt 0x454f4e45
-lwr $t0, 52($t1) :: rt 0x4e464d46
-lwr $t0, 56($t1) :: rt 0x474d474c
+lwr $t0, 51($t1) :: rt 0x00000045
+lwr $t0, 54($t1) :: rt 0x00004e46
+lwr $t0, 57($t1) :: rt 0x00474d47
lwr $t0, 60($t1) :: rt 0x4a484a4c
-lwr $t0, 64($t1) :: rt 0x00444441
-lwr $t0, 2($t1) :: rt 0x0000121f
-lwr $t0, 6($t1) :: rt 0x00000000
-lwr $t0, 10($t1) :: rt 0x00000000
-lwr $t0, 14($t1) :: rt 0x0000ffff
-lwr $t0, 18($t1) :: rt 0x0000232f
-lwr $t0, 22($t1) :: rt 0x0000242c
-lwr $t0, 26($t1) :: rt 0x0000252a
-lwr $t0, 30($t1) :: rt 0x0000262d
-lwr $t0, 34($t1) :: rt 0x00003f34
-lwr $t0, 38($t1) :: rt 0x00003e35
MADD
madd $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x0000000c
madd $t0, $t1 :: rs 0x00000055 rt 0x00000028 HI 0x00000000 LO 0x00000d48
@@ -1034,8 +1019,8 @@
rotr $t0, $t1, 0x0000000F :: rt 0xb24e6282 rs 0x31415927, imm 0x0000000f
rotr $t0, $t1, 0x00000010 :: rt 0x59273141 rs 0x31415927, imm 0x00000010
rotr $t0, $t1, 0x0000001F :: rt 0x6282b24e rs 0x31415927, imm 0x0000001f
-rotr $t0, $t1, 0x00000020 :: rt 0x31415927 rs 0x31415927, imm 0x00000020
-rotr $t0, $t1, 0x00000021 :: rt 0x98a0ac93 rs 0x31415927, imm 0x00000021
+rotr $t0, $t1, 0x0000001A :: rt 0x505649cc rs 0x31415927, imm 0x0000001a
+rotr $t0, $t1, 0x00000007 :: rt 0x4e6282b2 rs 0x31415927, imm 0x00000007
rotr $t0, $t1, 0x00000000 :: rt 0x00088000 rs 0x00088000, imm 0x00000000
rotr $t0, $t1, 0x00000001 :: rt 0x00044000 rs 0x00088000, imm 0x00000001
rotr $t0, $t1, 31 :: rt 0x00110000 rs 0x00088000, imm 0x0000001f
@@ -1043,7 +1028,7 @@
rotr $t0, $t1, 17 :: rt 0x80000000 rs 0x00010000, imm 0x00000011
rotr $t0, $t1, 18 :: rt 0x40000000 rs 0x00010000, imm 0x00000012
rotr $t0, $t1, 0 :: rt 0x00000000 rs 0x00000000, imm 0x00000000
-rotr $t0, $t1, 0xffff :: rt 0x0001fffe rs 0x0000ffff, imm 0x0000ffff
+rotr $t0, $t1, 0x1F :: rt 0x0001fffe rs 0x0000ffff, imm 0x0000001f
ROTRV
rotrv $t0, $t1, $t2 :: rd 0x6282b24e rs 0x31415927, rt 0xffffffff
rotrv $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xee00ee00
|
|
From: Julian S. <js...@ac...> - 2017-05-11 14:57:04
|
On 11/05/17 10:39, Ivo Raisr wrote: > Please have a look at the patch attached to bug 362223: > https://bugsfiles.kde.org/attachment.cgi?id=105438 Looks good to me. J |
|
From: <sv...@va...> - 2017-05-11 14:37:16
|
Author: sewardj
Date: Thu May 11 15:37:08 2017
New Revision: 519
Log:
Update web site following removal of the TileGX port (patch by Ivo Raisr).
Pertains to bug 379504.
Modified:
trunk/index.html
Modified: trunk/index.html
==============================================================================
--- trunk/index.html (original)
+++ trunk/index.html Thu May 11 15:37:08 2017
@@ -26,7 +26,7 @@
SimPoint basic block vector generator. It runs on the following
platforms: X86/Linux, AMD64/Linux, ARM/Linux, ARM64/Linux,
PPC32/Linux, PPC64/Linux, PPC64LE/Linux, S390X/Linux, MIPS32/Linux,
-MIPS64/Linux, TILEGX/Linux, X86/Solaris, AMD64/Solaris, ARM/Android
+MIPS64/Linux, X86/Solaris, AMD64/Solaris, ARM/Android
(2.3.x and later), ARM64/Android, X86/Android (4.0 and later),
MIPS32/Android, X86/Darwin and AMD64/Darwin (Mac OS X 10.10, with
initial support for 10.11).</p>
@@ -42,17 +42,7 @@
<tr><td>
<h2 align="center">Recent News</h2>
-
<ul>
- <li><p>23 October 2016: We will
- have a <a href="https://fosdem.org/2017/schedule/track/valgrind">Valgrind
- Devroom</a> at <a href="https://fosdem.org/2017">FOSDEM 2017</a>.
- The <a href="https://lists.fosdem.org/pipermail/fosdem/2016-October/002467.html">Call
- for Participation</a> has recently been announced. The Devroom is on
- the first of the two FOSDEM days, on Sat 4 Feb 2017.
- See you all at FOSDEM in Brussels!
- </p></li>
-
<li><p><?php echo $config['release-date'].": ".$config['release-version']; ?>
is available. This release supports:
X86/Linux, AMD64/Linux, ARM32/Linux,
@@ -60,7 +50,7 @@
MIPS32/Linux, MIPS64/Linux, ARM/Android, ARM64/Android,
MIPS32/Android, X86/Android, X86/Solaris, AMD64/Solaris, X86/MacOSX
10.10 and AMD64/MacOSX 10.10. There is also preliminary support for
- X86/MacOSX 10.11/12, AMD64/MacOSX 10.11/12 and TILEGX/Linux.
+ X86/MacOSX 10.11/12, and AMD64/MacOSX 10.11/12.
For more details see the <a href="/docs/manual/dist.news.html">release notes</a>.
</p></li>
</ul>
|
|
From: <sv...@va...> - 2017-05-11 14:28:17
|
Author: sewardj
Date: Thu May 11 15:28:10 2017
New Revision: 3364
Log:
Bug 371491 - handleAddrOverrides() is truncating the segment base address when ASO prefix is used.
Patch from Michael Daniels (mda...@bl...).
Modified:
trunk/priv/guest_amd64_toIR.c
Modified: trunk/priv/guest_amd64_toIR.c
==============================================================================
--- trunk/priv/guest_amd64_toIR.c (original)
+++ trunk/priv/guest_amd64_toIR.c Thu May 11 15:28:10 2017
@@ -2340,6 +2340,10 @@
IRExpr* handleAddrOverrides ( const VexAbiInfo* vbi,
Prefix pfx, IRExpr* virtual )
{
+ /* --- address size override --- */
+ if (haveASO(pfx))
+ virtual = unop(Iop_32Uto64, unop(Iop_64to32, virtual));
+
/* Note that the below are hacks that relies on the assumption
that %fs or %gs are constant.
Typically, %fs is always 0x63 on linux (in the main thread, it
@@ -2367,10 +2371,6 @@
/* cs, ds, es and ss are simply ignored in 64-bit mode. */
- /* --- address size override --- */
- if (haveASO(pfx))
- virtual = unop(Iop_32Uto64, unop(Iop_64to32, virtual));
-
return virtual;
}
|
|
From: <sv...@va...> - 2017-05-11 14:21:36
|
Author: sewardj
Date: Thu May 11 15:21:08 2017
New Revision: 16362
Log:
Minor update.
Modified:
trunk/docs/internals/3_12_BUGSTATUS.txt
Modified: trunk/docs/internals/3_12_BUGSTATUS.txt
==============================================================================
--- trunk/docs/internals/3_12_BUGSTATUS.txt (original)
+++ trunk/docs/internals/3_12_BUGSTATUS.txt Thu May 11 15:21:08 2017
@@ -30,9 +30,6 @@
373166 vex amd64->IR: 0xFF 0xFF 0x48 0x85 0xC0 0x74 0x8 0x4D 0x89 0xE7
[not clear what's going on here]
-377066 Some Valgrind unit tests fail to compile on Ubuntu 16.10 with
- PIE enabled by default
-
379525 Support more x86 nop opcodes
AMD XOP-prefixed insns:
@@ -132,10 +129,6 @@
rustlang's test suite on i686
(carried over)
-360429 Warning: noted but unhandled ioctl 0x530d with no size/direction hints.
- (has patch, should take)
-
-(carried over)
361726 WARNING:unhandled syscall on ppc64
(carried over)
@@ -473,9 +466,6 @@
(carried over)
366345 Dirty compile from m_libcbase.c and vgdb-invoker-ptrace.c
-377066 Some Valgrind unit tests fail to compile on Ubuntu 16.10 with
- PIE enabled by default
-
379502 Checking the code of Valgrind dynamic analyzer by a static analyzer
379537 Client requests can't be used in C++11 constexpr functions
@@ -522,14 +512,10 @@
**
360415 amd64 instructions ADCX and ADOX are not implemented in VEX
[has a plausible patch]
-
-**
-360429 Warning: noted but unhandled ioctl 0x530d with no size/direction hints.
- (has patch, should take)
-
+ == 372828 (vex amd64->IR: 0x66 0xF 0x3A 0x62 0x4A 0x10)
**
362223 assertion failed when .valgrindrc is a directory instead of a file
- [really easy to fix]
+ [has patch by Ivo]
**
(carried over)
@@ -566,18 +552,10 @@
372188 vex amd64->IR: 0x66 0xF 0x3A 0x62 0x4A 0x10 0x10 0x48 (PCMPxSTRx $0x10)
**
-372828 vex amd64->IR: 0x66 0x4D 0xF 0x38 0xF6 0xD2 0x66 0x4D
-
-**
374963 increase valgrind's load address to prevent mmap failure
maybe change to 0x5800'0000
**
-377066 Some Valgrind unit tests fail to compile on Ubuntu 16.10 with
- PIE enabled by default
- [Ivosh will fix it as it is annoying]
-
-**
n-i-bz major perf problems w/ stack registration + stack recycling
Should be fixed. Try again with ./mach gtest
|
|
From: Ivo R. <iv...@iv...> - 2017-05-11 08:51:02
|
2017-05-10 18:13 GMT+02:00 Mineeva, Tatyana A <tat...@in...>: > Hello Ivo, > > Could you please explain how to connect to Valgrind SVN through 'socat' tunneling? Sure. The magic incantation is: socat TCP4-LISTEN:3690,reuseaddr,fork "PROXY:<your-proxy-servername-here>:svn.valgrind.org:3690,proxyport=<your-proxy-port-here>" & Then do something along these lines: svn co --ignore-externals "svn://localhost:3690/valgrind/trunk" valgrind svn co --ignore-externals "svn://localhost:3690/vex/trunk" valgrind/VEX > Also, do I understand correctly that the Git repository does not update along with the svn trunk yet? It is currently for testing only. I'll update it with the latest SVN commits tomorrow. I. |
|
From: Ivo R. <iv...@iv...> - 2017-05-11 08:39:52
|
Folks, Please have a look at the patch attached to bug 362223: https://bugsfiles.kde.org/attachment.cgi?id=105438 Thank you, I. |
|
From: <sv...@va...> - 2017-05-11 03:07:56
|
Author: bart
Date: Thu May 11 04:07:49 2017
New Revision: 16361
Log:
none/tests/amd64/bug132918.c: Mark f64 as an output parameter
This change avoids that gcc 7 complains that f64 is used uninitialized
in this source file.
Modified:
trunk/none/tests/amd64/bug132918.c
Modified: trunk/none/tests/amd64/bug132918.c
==============================================================================
--- trunk/none/tests/amd64/bug132918.c (original)
+++ trunk/none/tests/amd64/bug132918.c Thu May 11 04:07:49 2017
@@ -24,8 +24,8 @@
"fnstsw %%ax\n\t"
"movq %%rax,%0\n\t"
"movq %%r15,%%rax"
- : /*out*/ "=r" (c3210)
- : /*in*/ "m" (f64), "m" (xx), "m" (yy)
+ : /*out*/ "=r" (c3210), "=m" (f64)
+ : /*in*/ "m" (xx), "m" (yy)
: /*trash*/ "r15", "rax", "%st", "%st(1)", "cc"
);
res->d = f64;
|
|
From: <sv...@va...> - 2017-05-11 03:07:18
|
Author: bart
Date: Thu May 11 04:07:11 2017
New Revision: 16360
Log:
tests: Remove exception specifications
Exception specifications are a deprecated feature in C++11 and gcc 7
complains about these specifications. Hence remove these specifications.
This patch avoids that gcc reports the following:
warning: dynamic exception specifications are deprecated in C++11 [-Wdeprecated]
Modified:
trunk/massif/tests/overloaded-new.cpp
trunk/memcheck/tests/new_override.cpp
Modified: trunk/massif/tests/overloaded-new.cpp
==============================================================================
--- trunk/massif/tests/overloaded-new.cpp (original)
+++ trunk/massif/tests/overloaded-new.cpp Thu May 11 04:07:11 2017
@@ -14,32 +14,32 @@
int array[1000];
} s;
-__attribute__((noinline)) void* operator new (std::size_t n) throw (std::bad_alloc)
+__attribute__((noinline)) void* operator new (std::size_t n)
{
return malloc(n);
}
-__attribute__((noinline)) void* operator new (std::size_t n, std::nothrow_t const &) throw ()
+__attribute__((noinline)) void* operator new (std::size_t n, std::nothrow_t const &)
{
return malloc(n);
}
-__attribute__((noinline)) void* operator new[] (std::size_t n) throw (std::bad_alloc)
+__attribute__((noinline)) void* operator new[] (std::size_t n)
{
return malloc(n);
}
-__attribute__((noinline)) void* operator new[] (std::size_t n, std::nothrow_t const &) throw ()
+__attribute__((noinline)) void* operator new[] (std::size_t n, std::nothrow_t const &)
{
return malloc(n);
}
-__attribute__((noinline)) void operator delete (void* p) throw()
+__attribute__((noinline)) void operator delete (void* p)
{
return free(p);
}
-__attribute__((noinline)) void operator delete[] (void* p) throw()
+__attribute__((noinline)) void operator delete[] (void* p)
{
return free(p);
}
Modified: trunk/memcheck/tests/new_override.cpp
==============================================================================
--- trunk/memcheck/tests/new_override.cpp (original)
+++ trunk/memcheck/tests/new_override.cpp Thu May 11 04:07:11 2017
@@ -7,7 +7,7 @@
int a, b, c, d;
};
-void *operator new[](size_t size) throw(std::bad_alloc)
+void *operator new[](size_t size)
{
void *ret = malloc(size);
printf("Here.\n");
|
|
From: <sv...@va...> - 2017-05-11 03:06:04
|
Author: bart
Date: Thu May 11 04:05:53 2017
New Revision: 16359
Log:
drd: Update suppressions file
Modified:
trunk/glibc-2.X-drd.supp
Modified: trunk/glibc-2.X-drd.supp
==============================================================================
--- trunk/glibc-2.X-drd.supp (original)
+++ trunk/glibc-2.X-drd.supp Thu May 11 04:05:53 2017
@@ -115,6 +115,12 @@
fun:pthread_cancel_init
}
{
+ drd-libpthread-pthread_cancel
+ drd:ConflictingAccess
+ fun:pthread_cancel
+ fun:pthread_cancel_intercept
+}
+{
drd-libpthread-_Unwind_ForcedUnwind
drd:ConflictingAccess
...
|