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From: Christian B. <bor...@de...> - 2016-10-20 18:47:55
|
On 10/20/2016 04:35 PM, Julian Seward wrote: > > A release candidate tarball for 3.12.0 is now available for testing, at > > http://valgrind.org/downloads/valgrind-3.12.0.RC2.tar.bz2 > (md5sum = b057a598b2e7298918308dfc6903c141) > > Please give it a try in configurations that are important to you, and report > any problems (and also successes!) to this list. If no critical problems > emerge I'll create the 3.12.0 final tarball tomorrow afternoon. Looks ok for s390x on SLES12SP1. |
|
From: Julian S. <js...@ac...> - 2016-10-20 14:35:46
|
A release candidate tarball for 3.12.0 is now available for testing, at http://valgrind.org/downloads/valgrind-3.12.0.RC2.tar.bz2 (md5sum = b057a598b2e7298918308dfc6903c141) Please give it a try in configurations that are important to you, and report any problems (and also successes!) to this list. If no critical problems emerge I'll create the 3.12.0 final tarball tomorrow afternoon. Thanks. J |
|
From: Julian S. <js...@ac...> - 2016-10-20 14:24:47
|
On 18/10/16 09:06, Christian Borntraeger wrote: > Julian, > > after you have picked several commits (all look good, thanks), are you > going to send out a new beta or rc tarball before the release? Yes, I have made a RC2 tarball. I'll send out details in a separate message. J |
|
From: <sv...@va...> - 2016-10-20 12:13:13
|
Author: sewardj
Date: Thu Oct 20 13:13:04 2016
New Revision: 16096
Log:
-> 3.12.0.RC2
Modified:
branches/VALGRIND_3_12_BRANCH/NEWS
branches/VALGRIND_3_12_BRANCH/configure.ac
Modified: branches/VALGRIND_3_12_BRANCH/NEWS
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/NEWS (original)
+++ branches/VALGRIND_3_12_BRANCH/NEWS Thu Oct 20 13:13:04 2016
@@ -260,6 +260,7 @@
n-i-bz DHAT: added collection of the metric "tot-blocks-allocd"
(3.12.0.RC1: 20 October 2016, vex r3282, valgrind r16094)
+(3.12.0.RC2: 20 October 2016, vex r3282, valgrind r16096)
Modified: branches/VALGRIND_3_12_BRANCH/configure.ac
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/configure.ac (original)
+++ branches/VALGRIND_3_12_BRANCH/configure.ac Thu Oct 20 13:13:04 2016
@@ -8,7 +8,7 @@
##------------------------------------------------------------##
# Process this file with autoconf to produce a configure script.
-AC_INIT([Valgrind],[3.12.0.RC1],[val...@li...])
+AC_INIT([Valgrind],[3.12.0.RC2],[val...@li...])
AC_CONFIG_SRCDIR(coregrind/m_main.c)
AC_CONFIG_HEADERS([config.h])
AM_INIT_AUTOMAKE([foreign subdir-objects])
|
|
From: <sv...@va...> - 2016-10-20 11:47:23
|
Author: sewardj
Date: Thu Oct 20 12:47:15 2016
New Revision: 16095
Log:
Build fixes for MacOS X 10.10.5.
Modified:
branches/VALGRIND_3_12_BRANCH/Makefile.all.am
branches/VALGRIND_3_12_BRANCH/coregrind/link_tool_exe_darwin.in
branches/VALGRIND_3_12_BRANCH/coregrind/m_main.c
Modified: branches/VALGRIND_3_12_BRANCH/Makefile.all.am
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/Makefile.all.am (original)
+++ branches/VALGRIND_3_12_BRANCH/Makefile.all.am Thu Oct 20 12:47:15 2016
@@ -210,7 +210,7 @@
AM_FLAG_M3264_X86_DARWIN = -arch i386
AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
- -mmacosx-version-min=10.5 \
+ -mmacosx-version-min=10.6 \
-fno-stack-protector -fno-pic -fno-PIC
AM_CFLAGS_PSO_X86_DARWIN = $(AM_CFLAGS_X86_DARWIN) $(AM_CFLAGS_PSO_BASE)
@@ -218,7 +218,7 @@
AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
- -mmacosx-version-min=10.5 -fno-stack-protector
+ -mmacosx-version-min=10.6 -fno-stack-protector
AM_CFLAGS_PSO_AMD64_DARWIN = $(AM_CFLAGS_AMD64_DARWIN) $(AM_CFLAGS_PSO_BASE)
AM_CCASFLAGS_AMD64_DARWIN = -arch x86_64 -g
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/link_tool_exe_darwin.in
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/link_tool_exe_darwin.in (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/link_tool_exe_darwin.in Thu Oct 20 12:47:15 2016
@@ -36,7 +36,7 @@
#
# (64-bit):
#
-# /usr/bin/ld -static -arch x86_64 -macosx_version_min 10.5 \
+# /usr/bin/ld -static -arch x86_64 -macosx_version_min 10.6 \
# -o memcheck-amd64-darwin -u __start -e __start \
# -image_base 0x138000000 -stack_addr 0x13c000000 \
# -stack_size 0x800000 \
@@ -46,7 +46,7 @@
#
# (32-bit)
#
-# /usr/bin/ld -static -arch i386 -macosx_version_min 10.5 \
+# /usr/bin/ld -static -arch i386 -macosx_version_min 10.6 \
# -o memcheck-x86-darwin -u __start -e __start \
# -image_base 0x38000000 -stack_addr 0x3c000000 \
# -stack_size 0x800000 \
@@ -150,7 +150,7 @@
}
$cmd = "$cmd -arch $archstr";
-$cmd = "$cmd -macosx_version_min 10.5";
+$cmd = "$cmd -macosx_version_min 10.6";
$cmd = "$cmd -o $outname";
$cmd = "$cmd -u __start -e __start";
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/m_main.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/m_main.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/m_main.c Thu Oct 20 12:47:15 2016
@@ -4058,6 +4058,19 @@
#endif
+#if defined(VGO_darwin) && DARWIN_VERS == DARWIN_10_10
+
+/* This might also be needed for > DARWIN_10_10, but I have no way
+ to test for that. Hence '==' rather than '>=' in the version
+ test above. */
+void __bzero ( void* s, UWord n );
+void __bzero ( void* s, UWord n )
+{
+ (void) VG_(memset)( s, 0, n );
+}
+
+#endif
+
/*--------------------------------------------------------------------*/
/*--- end ---*/
|
|
From: <sv...@va...> - 2016-10-20 08:44:49
|
Author: sewardj
Date: Thu Oct 20 09:44:40 2016
New Revision: 16094
Log:
-> 3.12.0.RC1
Modified:
branches/VALGRIND_3_12_BRANCH/NEWS
branches/VALGRIND_3_12_BRANCH/configure.ac
branches/VALGRIND_3_12_BRANCH/docs/xml/vg-entities.xml
Modified: branches/VALGRIND_3_12_BRANCH/NEWS
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/NEWS (original)
+++ branches/VALGRIND_3_12_BRANCH/NEWS Thu Oct 20 09:44:40 2016
@@ -259,7 +259,7 @@
n-i-bz arm: Fix incorrect register-number constraint check for LDAEX{,B,H,D}
n-i-bz DHAT: added collection of the metric "tot-blocks-allocd"
-(3.12.0.RC1: 20 October 2016, vex r3282, valgrind r16092)
+(3.12.0.RC1: 20 October 2016, vex r3282, valgrind r16094)
Modified: branches/VALGRIND_3_12_BRANCH/configure.ac
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/configure.ac (original)
+++ branches/VALGRIND_3_12_BRANCH/configure.ac Thu Oct 20 09:44:40 2016
@@ -8,7 +8,7 @@
##------------------------------------------------------------##
# Process this file with autoconf to produce a configure script.
-AC_INIT([Valgrind],[3.12.BRANCH],[val...@li...])
+AC_INIT([Valgrind],[3.12.0.RC1],[val...@li...])
AC_CONFIG_SRCDIR(coregrind/m_main.c)
AC_CONFIG_HEADERS([config.h])
AM_INIT_AUTOMAKE([foreign subdir-objects])
Modified: branches/VALGRIND_3_12_BRANCH/docs/xml/vg-entities.xml
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/docs/xml/vg-entities.xml (original)
+++ branches/VALGRIND_3_12_BRANCH/docs/xml/vg-entities.xml Thu Oct 20 09:44:40 2016
@@ -6,8 +6,8 @@
<!-- valgrind release + version stuff -->
<!ENTITY rel-type "Release">
-<!ENTITY rel-version "3.12.0.SVN">
-<!ENTITY rel-date "?? ??????? 2016">
+<!ENTITY rel-version "3.12.0">
+<!ENTITY rel-date "20 October 2016">
<!-- where the docs are installed -->
<!ENTITY vg-docs-path "$INSTALL/share/doc/valgrind/html/index.html">
|
|
From: <sv...@va...> - 2016-10-20 08:31:17
|
Author: sewardj
Date: Thu Oct 20 09:31:08 2016
New Revision: 16093
Log:
Resync these (copy from) the trunk.
Modified:
branches/VALGRIND_3_12_BRANCH/NEWS
branches/VALGRIND_3_12_BRANCH/docs/internals/3_11_BUGSTATUS.txt
Modified: branches/VALGRIND_3_12_BRANCH/NEWS
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/NEWS (original)
+++ branches/VALGRIND_3_12_BRANCH/NEWS Thu Oct 20 09:31:08 2016
@@ -1,10 +1,39 @@
-Release 3.12.0 (?? ????????? 201?)
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-Release 3.12.0 is under development, not yet released.
+
+Release 3.12.0 (20 October 2016)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+3.12.0 is a feature release with many improvements and the usual
+collection of bug fixes.
+
+This release supports X86/Linux, AMD64/Linux, ARM32/Linux,
+ARM64/Linux, PPC32/Linux, PPC64BE/Linux, PPC64LE/Linux, S390X/Linux,
+MIPS32/Linux, MIPS64/Linux, ARM/Android, ARM64/Android,
+MIPS32/Android, X86/Android, X86/Solaris, AMD64/Solaris, X86/MacOSX
+10.10 and AMD64/MacOSX 10.10. There is also preliminary support for
+X86/MacOSX 10.11/12, AMD64/MacOSX 10.11/12 and TILEGX/Linux.
* ================== PLATFORM CHANGES =================
-* Preliminary support for macOS 10.12 (Sierra) has been added.
+* POWER: Support for ISA 3.0 has been added
+
+* mips: support for O32 FPXX ABI has been added.
+* mips: improved recognition of different processors
+* mips: determination of page size now done at run time
+
+* amd64: Partial support for AMD FMA4 instructions.
+
+* arm, arm64: Support for v8 crypto and CRC instructions.
+
+* Improvements and robustification of the Solaris port.
+
+* Preliminary support for MacOS 10.12 (Sierra) has been added.
+
+Whilst 3.12.0 continues to support the 32-bit x86 instruction set, we
+would prefer users to migrate to 64-bit x86 (a.k.a amd64 or x86_64)
+where possible. Valgrind's support for 32-bit x86 has stagnated in
+recent years and has fallen far behind that for 64-bit x86
+instructions. By contrast 64-bit x86 is well supported, up to and
+including AVX2.
* ==================== TOOL CHANGES ====================
@@ -15,33 +44,39 @@
objects in the pool
- Uses itself to allocate other memory blocks
-* Helgrind:
-
-* Callgrind:
+ - New flag --ignore-range-below-sp to ignore memory accesses below
+ the stack pointer, if you really have to. The related flag
+ --workaround-gcc296-bugs=yes is now deprecated. Use
+ --ignore-range-below-sp=1024-1 as a replacement.
* DRD:
-n-i-bz Improved thread startup time significantly on non-Linux platforms.
+
+ - Improved thread startup time significantly on non-Linux platforms.
+
+* DHAT
+
+ - Added collection of the metric "tot-blocks-allocd"
* ==================== OTHER CHANGES ====================
* Replacement/wrapping of malloc/new related functions is now done not just
for system libraries by default, but for any globally defined malloc/new
- related function (both in shared libraries and staticly linked alternative
- malloc implementations). Dynamic (runtime) linker is excluded, though.
+ related function (both in shared libraries and statically linked alternative
+ malloc implementations). The dynamic (runtime) linker is excluded, though.
To only intercept malloc/new related functions in
system libraries use --soname-synonyms=somalloc=nouserintercepts (where
"nouserintercepts" can be any non-existing library name).
- This new functionality is not implemented for darwin/macosx.
+ This new functionality is not implemented for MacOS X.
* The maximum number of callers in a suppression entry is now equal to
the maximum size for --num-callers (500).
- Note that --gen-suppressions=yes|all similarly generate suppression
+ Note that --gen-suppressions=yes|all similarly generates suppressions
containing up to --num-callers frames.
* New and modified GDB server monitor features:
- Valgrind's gdbserver now accepts the command 'catch syscall'.
- Note that you must have a GDB >= 7.11 to use 'catch syscall' with
+ Note that you must have GDB >= 7.11 to use 'catch syscall' with
gdbserver.
* New option --run-cxx-freeres=<yes|no> can be used to change whether
@@ -56,6 +91,13 @@
for the most common use case (x86_64-linux, Memcheck) has been
reduced by 10%-15%.
+* Improved performance for programs that do a lot of discarding of
+ instruction address ranges of 8KB or less.
+
+* The C++ symbol demangler has been updated.
+
+* More robustness against invalid syscall parameters on Linux.
+
* ==================== FIXED BUGS ====================
The following bugs have been fixed or resolved. Note that "n-i-bz"
@@ -70,13 +112,17 @@
where XXXXXX is the bug number as listed below.
191069 Exiting due to signal not reported in XML output
-199468 Suppressions: stack size limited to 25 while --num-callers allows more frames
+199468 Suppressions: stack size limited to 25
+ while --num-callers allows more frames
212352 vex amd64 unhandled opc_aux = 0x 2, first_opcode == 0xDC (FCOM)
278744 cvtps2pd with redundant RexW
303877 valgrind doesn't support compressed debuginfo sections.
345307 Warning about "still reachable" memory when using libstdc++ from gcc 5
348345 Assertion fails for negative lineno
+351282 V 3.10.1 MIPS softfloat build broken with GCC 4.9.3 / binutils 2.25.1
+351692 Dumps created by valgrind are not readable by gdb (mips32 specific)
351804 Crash on generating suppressions for "printf" call on OS X 10.10
+352197 mips: mmap2() not wrapped correctly for page size > 4096
353083 arm64 doesn't implement various xattr system calls
353084 arm64 doesn't support sigpending system call
353137 www: update info for Supported Platforms
@@ -93,6 +139,7 @@
353891 Assert 'bad_scanned_addr < VG_ROUNDDN(start+len, sizeof(Addr))' failed
353917 unhandled amd64-solaris syscall fchdir(120)
353920 unhandled amd64-solaris syscall: 170
+354274 arm: unhandled instruction: 0xEBAD 0x0AC1 (sub.w sl, sp, r1, lsl #3)
354392 unhandled amd64-solaris syscall: 171
354797 Vbit test does not include Iops for Power 8 instruction support
354883 tst->os_state.pthread - magic_delta assertion failure on OSX 10.11
@@ -104,16 +151,21 @@
355454 do not intercept malloc related symbols from the runtime linker
355455 stderr.exp of test cases wrapmalloc and wrapmallocstatic overconstrained
356044 Dwarf line info reader misinterprets is_stmt register
+356112 mips: replace addi with addiu
356393 valgrind (vex) crashes because isZeroU happened
== 363497
== 364497
356676 arm64-linux: unhandled syscalls 125, 126 (sched_get_priority_max/min)
356678 arm64-linux: unhandled syscall 232 (mincore)
356817 valgrind.h triggers compiler errors on MSVC when defining NVALGRIND
+356823 Unsupported ARM instruction: stlex
+357059 x86/amd64: SSE cvtpi2ps with memory source does transition to MMX state
357338 Unhandled instruction for SHA instructions libcrypto Boring SSL
+357673 crash if I try to run valgrind with a binary link with libcurl
357833 Setting RLIMIT_DATA to zero breaks with linux 4.5+
357871 pthread_spin_destroy not properly wrapped
357887 Calls to VG_(fclose) do not close the file descriptor
+357932 amd64->IR: accept redundant REX prefixes for {minsd,maxsd} m128, xmm.
358030 support direct socket calls on x86 32bit (new in linux 4.3)
358478 drd/tests/std_thread.cpp doesn't build with GCC6
359133 Assertion 'eltSzB <= ddpa->poolSzB' failed
@@ -122,10 +174,11 @@
359289 s390x: popcnt (B9E1) not implemented
359472 The Power PC vsubuqm instruction doesn't always give the correct result
359503 Add missing syscalls for aarch64 (arm64)
+359645 "You need libc6-dbg" help message could be more helpful
359703 s390: wire up separate socketcalls system calls
359724 getsockname might crash - deref_UInt should call safe_to_deref
359733 amd64 implement ld.so strchr/index override like x86
-359767 Valgrind does not support the IBM POWER ISA 3.0 instructions
+359767 Valgrind does not support the IBM POWER ISA 3.0 instructions, part 1/5
359829 Power PC test suite none/tests/ppc64/test_isa_2_07.c uses
uninitialized data
359838 arm64: Unhandled instruction 0xD5033F5F (clrex)
@@ -139,46 +192,44 @@
360425 arm64 unsupported instruction ldpsw
== 364435
360519 none/tests/arm64/memory.vgtest might fail with newer gcc
+360571 Error about the Android Runtime reading below the stack pointer on ARM
360574 Wrong parameter type for an ashmem ioctl() call on Android and ARM64
360749 kludge for multiple .rodata sections on Solaris no longer needed
360752 raise the number of reserved fds in m_main.c from 10 to 12
-361207 Valgrind does not support the IBM POWER ISA 3.0 instructions, part 2
+361207 Valgrind does not support the IBM POWER ISA 3.0 instructions, part 2/5
361226 s390x: risbgn (EC59) not implemented
+361253 [s390x] ex_clone.c:42: undefined reference to `pthread_create'
361354 ppc64[le]: wire up separate socketcalls system calls
361615 Inconsistent termination for multithreaded process terminated by signal
361926 Unhandled Solaris syscall: sysfs(84)
-362009 Valgrind dumps core on unimplemented functionality before threads are created
-362329 Valgrind does not support the IBM POWER ISA 3.0 instructions, part 3
+362009 V dumps core on unimplemented functionality before threads are created
+362329 Valgrind does not support the IBM POWER ISA 3.0 instructions, part 3/5
362894 missing (broken) support for wbit field on mtfsfi instruction (ppc64)
362935 [AsusWRT] Assertion 'sizeof(TTEntryC) <= 88' failed
+362953 Request for an update to the Valgrind Developers page
363680 add renameat2() support
363705 arm64 missing syscall name_to_handle_at and open_by_handle_at
363714 ppc64 missing syscalls sync, waitid and name_to/open_by_handle_at
-363858 Add IBM ISA 3.0 support, patch set 4
+363858 Valgrind does not support the IBM POWER ISA 3.0 instructions, part 4/5
364058 clarify in manual limitations of array overruns detections
364413 pselect sycallwrapper mishandles NULL sigmask
364728 Power PC, missing support for several HW registers in
get_otrack_shadow_offset_wrk()
-365273 Invalid write to stack location reported after signal handler runs
-365912 ppc64BE segfault during jm-insns test (RELRO)
-366344 Multiple unhandled instruction for Aarch64
-359767 Valgrind does not support the IBM POWER ISA 3.0 instructions, part 1/5
-361207 Valgrind does not support the IBM POWER ISA 3.0 instructions, part 2/5
-362329 Valgrind does not support the IBM POWER ISA 3.0 instructions, part 3/5
-363858 Valgrind does not support the IBM POWER ISA 3.0 instructions, part 4/5
364948 Valgrind does not support the IBM POWER ISA 3.0 instructions, part 5/5
+365273 Invalid write to stack location reported after signal handler runs
365912 ppc64BE segfault during jm-insns test (RELRO)
+366079 FPXX Support for MIPS32 Valgrind
366138 Fix configure errors out when using Xcode 8 (clang 8.0.0)
366344 Multiple unhandled instruction for Aarch64
(0x0EE0E020, 0x1AC15800, 0x4E284801, 0x5E040023, 0x5E056060)
367995 Integration of memcheck with custom memory allocator
+368120 x86_linux asm _start functions do not keep 16-byte aligned stack pointer
368412 False positive result for altivec capability check
-368461 mmapunmap test fails on ppc64
368416 Add tc06_two_races_xml.exp output for ppc64
-368412 False positive result for altivec capability check
+368419 Perf Events ioctls not implemented
368461 mmapunmap test fails on ppc64
+368823 run_a_thread_NORETURN assembly code typo for VGP_arm64_linux target
369000 AMD64 fma4 instructions unsupported.
-361253 [s390x] ex_clone.c:42: undefined reference to `pthread_create'
369169 ppc64 fails jm_int_isa_2_07 test
369175 jm_vec_isa_2_07 test crashes on ppc64
369209 valgrind loops and eats up all memory if cwd doesn't exist.
@@ -192,20 +243,25 @@
369441 bad lvec argument crashes process_vm_readv/writev syscall wrappers
369446 valgrind crashes on unknown fcntl command
369439 S390x: Unhandled insns RISBLG/RISBHG and LDE/LDER
-369468 Remove quadratic metapool alg. using VG_(HT_remove_at_Iter)
- (VgHashTable *table)
+369468 Remove quadratic metapool algorithm using VG_(HT_remove_at_Iter)
370265 ISA 3.0 HW cap stuff needs updating
371128 BCD add and subtract instructions on Power BE in 32-bit mode do not work
+n-i-bz Fix incorrect (or infinite loop) unwind on RHEL7 x86 and amd64
+n-i-bz massif --pages-as-heap=yes does not report peak caused by mmap+munmap
+n-i-bz false positive leaks due to aspacemgr merging heap & non heap segments
+n-i-bz Fix ppoll_alarm exclusion on OS X
+n-i-bz Document brk segment limitation, reference manual in limit reached msg.
+n-i-bz Fix clobber list in none/tests/amd64/xacq_xrel.c [valgrind r15737]
+n-i-bz Bump allowed shift value for "add.w reg, sp, reg, lsl #N" [vex r3206]
+n-i-bz amd64: memcheck false positive with shr %edx
+n-i-bz arm3: Allow early writeback of SP base register in "strd rD, [sp, #-16]"
+n-i-bz ppc: Fix two cases of PPCAvFpOp vs PPCFpOp enum confusion
+n-i-bz arm: Fix incorrect register-number constraint check for LDAEX{,B,H,D}
+n-i-bz DHAT: added collection of the metric "tot-blocks-allocd"
+
+(3.12.0.RC1: 20 October 2016, vex r3282, valgrind r16092)
+
-n-i-bz Fix incorrect (or infinite loop) unwind on RHEL7 x86 and amd64
-n-i-bz massif --pages-as-heap=yes does not report peak caused by mmap+munmap
-n-i-bz false positive leaks due to aspacemgr merging non heap segments
- with heap segments.
-n-i-bz Fix ppoll_alarm exclusion on OS X
-n-i-bz Document brk segment limitation, reference manual in limit reached msg.
-n-i-bz Fix clobber list in none/tests/amd64/xacq_xrel.c [valgrind r15737]
-n-i-bz Bump allowed shift value for "add.w reg, sp, reg, lsl #N" [vex r3206]
-n-i-bz amd64: memcheck false positive with shr %edx
Release 3.11.0 (22 September 2015)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Modified: branches/VALGRIND_3_12_BRANCH/docs/internals/3_11_BUGSTATUS.txt
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/docs/internals/3_11_BUGSTATUS.txt (original)
+++ branches/VALGRIND_3_12_BRANCH/docs/internals/3_11_BUGSTATUS.txt Thu Oct 20 09:31:08 2016
@@ -8,11 +8,6 @@
356715 vex amd64->IR: 0xC4 0xE2 0x7D 0x13 0x4 0x4A 0xC5 0xFC
vcvtph2ps (%rdx,%rcx,2),%ymm0
-357932 vex amd64->IR: 0xF2 0x49 0xF 0x5D and 0xF2 0x49 0xF 0x5F
- rex.WB minsd (%r8),%xmm0
- rex.WB maxsd (%r8),%xmm0
- redundant rex prefixes
-
360415 amd64 instructions ADCX and ADOX are not implemented in VEX
[has patch, could possibly take it, but needs cleanup/verification]
@@ -31,29 +26,23 @@
=== VEX/arm ============================================================
352630 valgrind: Unrecognised instruction at address 0x4fc4d33.
-354274 arm: unhandled instruction: 0xEBAD 0x0AC1 (sub.w sl, sp, r1, lsl #3)
+ [what insn is this?]
+
355526 disInstr(arm): unhandled instruction: 0x1823E91
+ [what insn is this?]
+
n-i-bz Remove limit on strd's negative immediates
[dev@, Michael Daniels, 19 Nov 2015, easy fix, should land]
-356823 Unsupported ARM instruction: stlex
-357673 crash if I try to run valgrind with a binary link with libcurl
- [IR sanity check failure]
+
362934 [AsusWRT] Arm v7 illegal instruction
+ [unclear what this is; a SIGILL on generated code]
=== VEX/arm64 ==========================================================
=== VEX/x86 ============================================================
-355231 Unhandled Instruction Bytes (SSE4, vmovdqu, "0xC5 0xFA 0x6F 0x2")
-357059 x86: SSE cvtpi2ps with memory source does transition to MMX state
- [Also relevant for amd64. Not sure this is really a bug.]
-358856 unhandled instruction bytes: 0xC4 0xE2 0x7B 0xF7
-
=== VEX/mips ===========================================================
-356112 mips: replace addi with addiu
-366079 FPXX Support for MIPS32 Valgrind
-
=== VEX/ppc ============================================================
361405 disInstr(ppc): unhandled instruction: 0xFF81010C
@@ -61,6 +50,7 @@
=== VEX/s390x ==========================================================
366413 s390x: New z13 instructions not implemented
+ [Per cborntraeger, is not important for 3.12.0]
=== VEX general ========================================================
@@ -80,8 +70,7 @@
359705 memcheck causes segfault on a dynamically-linked test from
rustlang's test suite on i686
360429 Warning: noted but unhandled ioctl 0x530d with no size/direction hints.
-361615 Inconsistent termination when an instrumented multithreaded process
- is terminated by signal
+ (has patch, should take)
361726 WARNING:unhandled syscall on ppc64
361770 Missing F_ADD_SEALS
362892 test apk in android5.0.2,after fix the bug 344802,android log
@@ -92,8 +81,8 @@
[initimg problems on Android]
364359 Valgrind crashes on fcntl(F_SETFL, O_NONBLOCK, fd)
367942 Segfault vgPlain_do_sys_sigaction (m_signals.c:1138)
-368419 Perf Events ioctls not implemented
368791 unhandled syscall: 167 (swapon, amd64-linux)
+ (should fix this for 3.12.1)
=== Syscalls/ioctls on OSX =============================================
@@ -105,8 +94,11 @@
=== Debuginfo reader ===================================================
353192 Debug info/data section not detected on AMD64
+ [To do with rwx, combined code+data sections]
+
355197 Too strong assert in variable debug info code
-359181 Buffer Overflow during Demangling
+ [Still relevant?]
+
365750 Valgrind fails on binary with .text section not in default place
[Horrible hack to do with relocating .text section]
@@ -120,8 +112,8 @@
364279 False "Uninitialized" on atomic_compare_exchange
366035 valgrind misses buffer overflow, segfaults in malloc in localtime
366817 VALGRIND_MEMPOOL_CHANGE has a performance bug
-367995 Integration of memcheck with custom memory allocator
368507 valgrind throws std::bad_alloc on memory allocations larger than 34255421416 bytes
+ (increase usable address space post release, on trunk)
=== Tools/DRD ==========================================================
@@ -152,14 +144,8 @@
=== other/x86 ==========================================================
-368120 x86_linux asm _start functions do not keep 16-byte aligned stack pointer
-
=== other/mips =========================================================
-351282 valgrind 3.10.1 MIPS softfloat build broken with GCC 4.9.3 /
- binutils 2.25.1
-352197 mips: mmap2() not wrapped correctly for page size > 4096
-
=== other/ppc ==========================================================
365208 valgrind stuck after redirecting "memcpy"
@@ -170,15 +156,12 @@
core, : at 0x4000E7C: ??? (in /lib/ld-uClibc.so.0)
368529 Android arm target link error, missing atexit and pthread_atfork
+ (should take patch)
=== other/arm64 ========================================================
-368823 run_a_thread_NORETURN assembly code typo for VGP_arm64_linux target
-
=== other/s390 =========================================================
-361253 [s390x] ex_clone.c:42: undefined reference to `pthread_create'
-
=== other/tilegx =======================================================
=== other/Android ======================================================
@@ -216,24 +199,18 @@
352395 Please provide SVN revision info in --version
358569 Unhandled instructions cause creation of "orphan" stack traces
in XML output
-359645 [patch] "You need libc6-dbg" help message could be more helpful
- with 32-bit target on-64-bit arch
=== MPI ================================================================
=== Documentation ======================================================
-362953 Request for an update to the Valgrind Developers page
-
=== Uncategorised/run ==================================================
-351692 Dumps created by valgrind are not readable by gdb
356457 valgrind: m_mallocfree.c:2042 (vgPlain_arena_free):
Assertion 'blockSane(a, b)' failed.
[Possible V memory corruption?]
359249 valgrind unable to load 64-bit linux executable
linked with -mcmodel=medium
-360571 Error about the Android Runtime reading below the stack pointer on ARM
362223 valgrind: m_commandline.c:79 (read_dot_valgrindrc):
Assertion 'n >= 0 && n <= stat_buf.size+1' failed.
362680 --error-exitcode not honored when file descriptor leaks are found
@@ -241,6 +218,7 @@
=== Uncategorised/build ================================================
358697 valgrind.h: Some code remains even when defining NVALGRIND
+ (we should fix this)
359202 Add musl libc configure/compile
359920 Configure fails with relative DESTDIR
362033 undeclared identifier build failures for getpid(), usleep(),
@@ -264,3 +242,191 @@
========================================================================
Thu 15 Sep 12:55:21 CEST 2016
+
+368863 WARNING: unhandled arm64-linux syscall: 100
+368864 WARNING: unhandled arm64-linux syscall: 262
+368865 WARNING: unhandled arm64-linux syscall: 272
+368866 WARNING: unhandled arm64-linux syscall: 238
+368868 disInstr(arm64): unhandled instruction 0xD53BE000 = cntfrq_el0 (ARMv8)
+ (should fix this for 3.12.1)
+368873 Please add FreeBSD to supported OS list
+368913 WARNING: unhandled arm64-linux syscall: 117
+368914 WARNING: unhandled arm64-linux syscall: 142
+368916 WARNING: unhandled arm64-linux syscall: 234
+368917 WARNING: unhandled arm64-linux syscall: 218
+368918 WARNING: unhandled arm64-linux syscall: 127
+368919 WARNING: unhandled arm64-linux syscall: 274
+368920 WARNING: unhandled arm64-linux syscall: 275
+368921 WARNING: unhandled arm64-linux syscall: 162
+368922 WARNING: unhandled arm64-linux syscall: 161
+368923 WARNING: unhandled arm64-linux syscall: 268
+368924 WARNING: unhandled arm64-linux syscall: 84
+368925 WARNING: unhandled arm64-linux syscall: 130
+368926 WARNING: unhandled arm64-linux syscall: 97
+368960 WARNING: unhandled amd64-linux syscall: 163
+369026 WARNING: unhandled amd64-linux syscall: 169
+369027 WARNING: unhandled amd64-linux syscall: 216 (remap_file_pages)
+369028 WARNING: unhandled amd64-linux syscall: 314 (sched_setattr)
+369029 WARNING: unhandled amd64-linux syscall: 315 (sched_getattr)
+369030 WARNING: unhandled amd64-linux syscall: 171 (setdomainname)
+369031 WARNING: unhandled amd64-linux syscall: 308 (setns)
+369032 WARNING: unhandled amd64-linux syscall: 205 (set_thread_area)
+369033 WARNING: unhandled amd64-linux syscall: 139 (sysfs)
+369034 WARNING: unhandled amd64-linux syscall: 136 (ustat)
+369053 AMD64 fma4 instructions missing 256 bit support
+
+369409 null pointer dereference in vgPlain_do_syscall
+ possibly a dup of (fixed) 353370
+
+369456 callgrind_control failed to find an active callgrind run.
+ OSX specific
+
+369459 valgrind on arm64 violates the ARMv8 spec (ldxr/stxr)
+
+369509 ARMv8.1 LSE instructions are not supported
+369723 __builtin_longjmp not supported in clang/llvm on Android arm64 target
+ Has patch
+
+369854 Valgrind reports an Invalid Read in __intel_new_memcpy
+ Should be handled by --partial-loads-ok=yes
+
+370028 Reduce the number of compiler warnings on MIPS platforms
+370635 arm64 missing syscall getcpu
+ (should fix this for 3.12.1)
+
+371065 www: add CfP for FOSDEM 2017 in valgrind.org NEWS section
+
+Wed 19 Oct 17:07:42 CEST 2016
+
+========================================================================
+========================================================================
+
+
+3_12_BRANCH: vex 3250 is a copy of trunk 3249
+ val 15963 is a copy of trunk 15962
+
+3.12.0.BETA1 is 3_12_BRANCHes at 15973/3250.
+
+MERGED (trunk -> 3_12_BRANCH unless otherwise indicated):
+
+15966 -> 15967 a missing helgrind test file
+15968 -> 15969 Add none/tests/ppc64/ppc64_helpers.h to noinst_HEADERS.
+15970 -> 15972 fix for bugzilla 361253 [s390x]
+15971 -> 15973 Add feature check for tests that use -march=armv8-a+crc.
+15975 -> 16007 Avoid unused variable warning.
+15976 -> 16071 Prelim support for macOS Sierra (10.12).
+ Partial fix for #365327.
+15977 -> 16008 ppcBE, fix the expected output file for
+ none/tests/ppc64/jm_int_isa_2_07.stdout.exp
+15978 -> 16009 Use proper compiler flags on Solaris for fma4 test.
+15979 -> 16010 Fix expected error output of drd/tests/bar_bad* on Solaris.
+15980 -> 16009 Fix none/tests/amd64/Makefile.am typo s/AM_CFKAGS/AM_CFLAGS/
+15981 -> 16016 Add ioctl wrapper for MNTIOC_GETEXTMNTENT.
+15982 -> 16011 Fix #361615 - Inconsistent termination for multithreaded process
+ terminated by signal
+15983 -> 16011 Fix warning introduced by revision 15982
+15984 -> 16012 Added meta mempool support into memcheck Fixes BZ#367995
+15985 -> 16012 Fix test so that leaked bytes is the same in 32 and 64 bits
+15986 -> 16012 Add an optional 2nd arg to leak-autofreepool to test performance
+15987 -> 16012 mc-manual.xml: Fix some mismatched open/close tags.
+15988 -> 16013 Use AM_LDFLAGS instead of LDFLAGS in exp-bbv/tests Makefiles.
+15989 -> 16014 Don't require the current working directory to exist. #369209.
+15990 -> 16015 Fix pre_mem_read_sockaddr crash on invalid syscall arguments.
+ Bug #369356.
+15991 -> 16015 Fix crash in msghdr_foreachfield when iov_len isn't safe to
+ dereference. #369359
+15992 -> 16015 Fix crash when old/new sigprocmask isn't safe to dereference.
+ Bug #369360.
+15993 -> 16015 Fix crash in vmsplice linux kernel wrapper when iovec is bad.
+ Bug #369361.
+15994 -> 16015 Fix crash in linux [rt_]sigaction wrapper with bad old/new
+ sigaction handler. #369362
+15995 -> 16015 Fix crash in sys_modify_ldt wrapper on bad ptr. Bug #369383.
+15996 -> 16015 linux-x86 check get/set_thread_area pointer before use.
+ Bug #369402.
+15997 -> 16015 Don't check bad iovec array in process_vm_readv/writev.
+ Bug #369441.
+15998 -> 16015 Don't crash, but warn and return EINVAL on unknown fcntl command.
+15999 -> 16017 Replace --wait-for-gdb=yes memory loop by a call to VG_(poll)
+ (5000 milliseconds)
+16000 -> 16017 Well, 5 seconds is too short for me to type a attach pid command
+ so increase to 8 seconds.
+3251 -> 3254 Fix for clean helpers on BE
+3252 -> 3255 Fix rounding mode check and instruction stxvl
+16001 -> 16019 mips32: test for syscalls prctl(GET/SET_FP_MODE)
+
+16002 Update svn:ignore list
+
+3253 -> 3256 mips64: support for fp32 mode
+16003 -> 16020 mips64: support for prctl(GET/SET_FP_MODE) syscalls
+16004 -> 16021 mips64: support for prctl(GET/SET_FP_MODE) syscalls
+
+16005 mips: update svn:ignore list
+
+16006 -> 16022 dhat: add "tot-blocks-allocd" metric
+16018 -> 16047 mips: replace use of (d)addi with (d)addiu
+3257 -> 3264 Relax the overly-restrictive implementation of (T3) SUB{S}.W Rd,
+ SP, Rm, {shift}. #354274
+
+16023 Update 3_11_BUGSTATUS.txt
+
+16024 -> 16048 Fix n-i-bz bug in auto free pool: a block using the last byte
+ of the meta pool was not auto-freed.
+16025 -> 16049 Add a warning to the get/set_thread_area wrapper
+ for bad info pointers.
+3258 -> 3265 mips: remove support for mfc0/dmfc0
+16026 -> 16050 mips32: fix the wrong offset for mmap2()
+3259 -> 3266 s390: support RISBLG/RISBHG, MVCIN, LDE/LDER
+16027 -> 16051 s390: support RISBLG/RISBHG, MVCIN, LDE/LDER
+16028 -> 16052 s390/highword fix compile warning with some compilers
+16029 -> 16053 actually test high-word by providing the plumbing...
+16030 -> 16054 fix building the dfp testcase
+16031 -> 16055 mips32: add pselect6 to the list of supported syscalls
+
+3260 -> 3267 ISA 3.0 BE fixes for various new instructions
+16032 -> 16056 ISA 3.0 BE testsuite fixes
+16034 -> 16057 Power configure fixes.
+16035 -> 16058 Update NEWS file for bugzillas 369175 and 370265
+16037 -> 16059 Fix for missing ISA changes in HW cap stuff needs updating patch
+
+16033 -> 16060 Fix some (small) leaks found by self-hosting valgrind
+16036 -> 16061 Fix corruption introduced by revision 16033
+16044 -> 16062 Further fixes following fix of leak in 16033
+16045 -> 16063 Follow up for r16044. Fix compilation problem on Solaris.
+
+16038 -> 16064 mips: clear fcc bits in fcsr after calling printf()
+
+3261 -> 3268 mips: allow VEX to be compiled for soft-float
+16039 -> 16065 mips: allow Valgrind to be compiled for soft-float
+
+3262 -> 3269 mips: fix incorrect implementation of luxc1/suxc1 instructions
+3263 -> 3270 mips64: fix error introduced by r3262
+16040 -> 16066 mips32: add the test cases for luxc1/suxc1 instructions
+
+16041 -> 16067 fix 369468 Remove quadratic metapool alg.
+ using VG_(HT_remove_at_Iter)(VgHashTable *table)
+16042 -> 16068 Clarify name and description/manual for meta mempool
+16043 -> 16069 Introduce leak-pool-3.* back into EXTRA_DIST as they are not
+ related to leak-autofreepool tests. This is a follow up
+ fix for r16042.
+
+3271 -> 3277 Fix PPC BE in 32-bit mode (Iop_CmpXX64 not supported)
+16072 -> 16082 Fix PPC BE in 32-bit mode (Iop_CmpXX64 not supported)
+16073 -> 16083 Add --ignore-range-below-sp=<offset>-<offset>
+16074 -> 16084 Fix run_a_thread_NORETURN assembly code typo for VGP_arm64_linux
+16075 -> 16085 x86_linux asm _start functions do not keep 16-byte aligned %esp.
+3272 -> 3278 Fix incorrect register-number constraint check for LDAEX{,B,H,D}
+3273 -> 3279 Fix two cases of PPCAvFpOp vs PPCFpOp enum confusion.
+3274 -> 3280 Accept redundant REX prefixes for {minsd,maxsd} m128, xmm.
+3275 -> 3281 CVTPI2PS: Only switch to MMX mode if the source is a MMX reg
+16077 -> 16086 Add support for Linux perf-events ioctls.
+16078 -> 16087 "You need libc6-dbg" help message could be more helpful.
+3276 -> 3282 Allow early wback of SP base register in "strd rD, [sp, #-16]"
+16079 -> 16088 Update memcheck/tests/ppc64/power_ISA2_05.vgtest
+16080 -> 16089 mips: fix coredump creation in Valgrind
+16081 -> 16090 Add another incompatibility between illumos and Solaris kernels.
+
+(tracked up to and including 16090/3282)
+
+========================================================================
+========================================================================
|
|
From: <sv...@va...> - 2016-10-20 08:27:14
|
Author: sewardj
Date: Thu Oct 20 09:27:08 2016
New Revision: 16092
Log:
Update.
Modified:
trunk/docs/internals/3_11_BUGSTATUS.txt
Modified: trunk/docs/internals/3_11_BUGSTATUS.txt
==============================================================================
--- trunk/docs/internals/3_11_BUGSTATUS.txt (original)
+++ trunk/docs/internals/3_11_BUGSTATUS.txt Thu Oct 20 09:27:08 2016
@@ -8,11 +8,6 @@
356715 vex amd64->IR: 0xC4 0xE2 0x7D 0x13 0x4 0x4A 0xC5 0xFC
vcvtph2ps (%rdx,%rcx,2),%ymm0
-357932 vex amd64->IR: 0xF2 0x49 0xF 0x5D and 0xF2 0x49 0xF 0x5F
- rex.WB minsd (%r8),%xmm0
- rex.WB maxsd (%r8),%xmm0
- redundant rex prefixes
-
360415 amd64 instructions ADCX and ADOX are not implemented in VEX
[has patch, could possibly take it, but needs cleanup/verification]
@@ -46,9 +41,6 @@
=== VEX/x86 ============================================================
-357059 x86: SSE cvtpi2ps with memory source does transition to MMX state
- [Also relevant for amd64. Not sure this is really a bug.]
-
=== VEX/mips ===========================================================
=== VEX/ppc ============================================================
@@ -89,8 +81,8 @@
[initimg problems on Android]
364359 Valgrind crashes on fcntl(F_SETFL, O_NONBLOCK, fd)
367942 Segfault vgPlain_do_sys_sigaction (m_signals.c:1138)
-368419 Perf Events ioctls not implemented
368791 unhandled syscall: 167 (swapon, amd64-linux)
+ (should fix this for 3.12.1)
=== Syscalls/ioctls on OSX =============================================
@@ -121,6 +113,7 @@
366035 valgrind misses buffer overflow, segfaults in malloc in localtime
366817 VALGRIND_MEMPOOL_CHANGE has a performance bug
368507 valgrind throws std::bad_alloc on memory allocations larger than 34255421416 bytes
+ (increase usable address space post release, on trunk)
=== Tools/DRD ==========================================================
@@ -153,9 +146,6 @@
=== other/mips =========================================================
-351692 Dumps created by valgrind are not readable by gdb
- [mips32 specific?]
-
=== other/ppc ==========================================================
365208 valgrind stuck after redirecting "memcpy"
@@ -209,8 +199,6 @@
352395 Please provide SVN revision info in --version
358569 Unhandled instructions cause creation of "orphan" stack traces
in XML output
-359645 [patch] "You need libc6-dbg" help message could be more helpful
- with 32-bit target on-64-bit arch
=== MPI ================================================================
@@ -248,9 +236,6 @@
if compiled with intel compiler
========================================================================
-
-* mention that x86-linux is deprecated
-
========================================================================
========================================================================
========================================================================
@@ -310,7 +295,6 @@
(should fix this for 3.12.1)
371065 www: add CfP for FOSDEM 2017 in valgrind.org NEWS section
-371128 BCD add/sub instructions on Power BE in 32-bit mode do not work.
Wed 19 Oct 17:07:42 CEST 2016
@@ -426,15 +410,23 @@
related to leak-autofreepool tests. This is a follow up
fix for r16042.
-3271 M Fix PPC BE in 32-bit mode (Iop_CmpXX64 not supported in 32-bit mode)
-16072 M Fix PPC BE in 32-bit mode (Iop_CmpXX64 not supported in 32-bit mode)
-16073 M Add --ignore-range-below-sp=<offset>-<offset>
-16074 M Fix run_a_thread_NORETURN assembly code typo for VGP_arm64_linux
-16075 M x86_linux asm _start functions do not keep 16-byte aligned %esp.
-3272 M Fix incorrect register-number constraint check for LDAEX{,B,H,D}
-3273 M Fix two cases of PPCAvFpOp vs PPCFpOp enum confusion.
+3271 -> 3277 Fix PPC BE in 32-bit mode (Iop_CmpXX64 not supported)
+16072 -> 16082 Fix PPC BE in 32-bit mode (Iop_CmpXX64 not supported)
+16073 -> 16083 Add --ignore-range-below-sp=<offset>-<offset>
+16074 -> 16084 Fix run_a_thread_NORETURN assembly code typo for VGP_arm64_linux
+16075 -> 16085 x86_linux asm _start functions do not keep 16-byte aligned %esp.
+3272 -> 3278 Fix incorrect register-number constraint check for LDAEX{,B,H,D}
+3273 -> 3279 Fix two cases of PPCAvFpOp vs PPCFpOp enum confusion.
+3274 -> 3280 Accept redundant REX prefixes for {minsd,maxsd} m128, xmm.
+3275 -> 3281 CVTPI2PS: Only switch to MMX mode if the source is a MMX reg
+16077 -> 16086 Add support for Linux perf-events ioctls.
+16078 -> 16087 "You need libc6-dbg" help message could be more helpful.
+3276 -> 3282 Allow early wback of SP base register in "strd rD, [sp, #-16]"
+16079 -> 16088 Update memcheck/tests/ppc64/power_ISA2_05.vgtest
+16080 -> 16089 mips: fix coredump creation in Valgrind
+16081 -> 16090 Add another incompatibility between illumos and Solaris kernels.
-(tracked up to and including 16075/3273)
+(tracked up to and including 16090/3282)
========================================================================
========================================================================
|
|
From: <sv...@va...> - 2016-10-20 08:23:40
|
Author: sewardj
Date: Thu Oct 20 09:23:32 2016
New Revision: 16091
Log:
Initial finalisation for 3.12.0.
Modified:
trunk/NEWS
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Thu Oct 20 09:23:32 2016
@@ -1,11 +1,39 @@
-Release 3.12.0 (?? ????????? 201?)
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-Release 3.12.0 is under development, not yet released.
+
+Release 3.12.0 (20 October 2016)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+3.12.0 is a feature release with many improvements and the usual
+collection of bug fixes.
+
+This release supports X86/Linux, AMD64/Linux, ARM32/Linux,
+ARM64/Linux, PPC32/Linux, PPC64BE/Linux, PPC64LE/Linux, S390X/Linux,
+MIPS32/Linux, MIPS64/Linux, ARM/Android, ARM64/Android,
+MIPS32/Android, X86/Android, X86/Solaris, AMD64/Solaris, X86/MacOSX
+10.10 and AMD64/MacOSX 10.10. There is also preliminary support for
+X86/MacOSX 10.11/12, AMD64/MacOSX 10.11/12 and TILEGX/Linux.
* ================== PLATFORM CHANGES =================
-* Preliminary support for macOS 10.12 (Sierra) has been added.
+* POWER: Support for ISA 3.0 has been added
+
* mips: support for O32 FPXX ABI has been added.
+* mips: improved recognition of different processors
+* mips: determination of page size now done at run time
+
+* amd64: Partial support for AMD FMA4 instructions.
+
+* arm, arm64: Support for v8 crypto and CRC instructions.
+
+* Improvements and robustification of the Solaris port.
+
+* Preliminary support for MacOS 10.12 (Sierra) has been added.
+
+Whilst 3.12.0 continues to support the 32-bit x86 instruction set, we
+would prefer users to migrate to 64-bit x86 (a.k.a amd64 or x86_64)
+where possible. Valgrind's support for 32-bit x86 has stagnated in
+recent years and has fallen far behind that for 64-bit x86
+instructions. By contrast 64-bit x86 is well supported, up to and
+including AVX2.
* ==================== TOOL CHANGES ====================
@@ -16,33 +44,39 @@
objects in the pool
- Uses itself to allocate other memory blocks
-* Helgrind:
-
-* Callgrind:
+ - New flag --ignore-range-below-sp to ignore memory accesses below
+ the stack pointer, if you really have to. The related flag
+ --workaround-gcc296-bugs=yes is now deprecated. Use
+ --ignore-range-below-sp=1024-1 as a replacement.
* DRD:
-n-i-bz Improved thread startup time significantly on non-Linux platforms.
+
+ - Improved thread startup time significantly on non-Linux platforms.
+
+* DHAT
+
+ - Added collection of the metric "tot-blocks-allocd"
* ==================== OTHER CHANGES ====================
* Replacement/wrapping of malloc/new related functions is now done not just
for system libraries by default, but for any globally defined malloc/new
- related function (both in shared libraries and staticly linked alternative
- malloc implementations). Dynamic (runtime) linker is excluded, though.
+ related function (both in shared libraries and statically linked alternative
+ malloc implementations). The dynamic (runtime) linker is excluded, though.
To only intercept malloc/new related functions in
system libraries use --soname-synonyms=somalloc=nouserintercepts (where
"nouserintercepts" can be any non-existing library name).
- This new functionality is not implemented for darwin/macosx.
+ This new functionality is not implemented for MacOS X.
* The maximum number of callers in a suppression entry is now equal to
the maximum size for --num-callers (500).
- Note that --gen-suppressions=yes|all similarly generate suppression
+ Note that --gen-suppressions=yes|all similarly generates suppressions
containing up to --num-callers frames.
* New and modified GDB server monitor features:
- Valgrind's gdbserver now accepts the command 'catch syscall'.
- Note that you must have a GDB >= 7.11 to use 'catch syscall' with
+ Note that you must have GDB >= 7.11 to use 'catch syscall' with
gdbserver.
* New option --run-cxx-freeres=<yes|no> can be used to change whether
@@ -57,6 +91,13 @@
for the most common use case (x86_64-linux, Memcheck) has been
reduced by 10%-15%.
+* Improved performance for programs that do a lot of discarding of
+ instruction address ranges of 8KB or less.
+
+* The C++ symbol demangler has been updated.
+
+* More robustness against invalid syscall parameters on Linux.
+
* ==================== FIXED BUGS ====================
The following bugs have been fixed or resolved. Note that "n-i-bz"
@@ -71,13 +112,15 @@
where XXXXXX is the bug number as listed below.
191069 Exiting due to signal not reported in XML output
-199468 Suppressions: stack size limited to 25 while --num-callers allows more frames
+199468 Suppressions: stack size limited to 25
+ while --num-callers allows more frames
212352 vex amd64 unhandled opc_aux = 0x 2, first_opcode == 0xDC (FCOM)
278744 cvtps2pd with redundant RexW
303877 valgrind doesn't support compressed debuginfo sections.
345307 Warning about "still reachable" memory when using libstdc++ from gcc 5
348345 Assertion fails for negative lineno
351282 V 3.10.1 MIPS softfloat build broken with GCC 4.9.3 / binutils 2.25.1
+351692 Dumps created by valgrind are not readable by gdb (mips32 specific)
351804 Crash on generating suppressions for "printf" call on OS X 10.10
352197 mips: mmap2() not wrapped correctly for page size > 4096
353083 arm64 doesn't implement various xattr system calls
@@ -116,11 +159,13 @@
356678 arm64-linux: unhandled syscall 232 (mincore)
356817 valgrind.h triggers compiler errors on MSVC when defining NVALGRIND
356823 Unsupported ARM instruction: stlex
+357059 x86/amd64: SSE cvtpi2ps with memory source does transition to MMX state
357338 Unhandled instruction for SHA instructions libcrypto Boring SSL
357673 crash if I try to run valgrind with a binary link with libcurl
357833 Setting RLIMIT_DATA to zero breaks with linux 4.5+
357871 pthread_spin_destroy not properly wrapped
357887 Calls to VG_(fclose) do not close the file descriptor
+357932 amd64->IR: accept redundant REX prefixes for {minsd,maxsd} m128, xmm.
358030 support direct socket calls on x86 32bit (new in linux 4.3)
358478 drd/tests/std_thread.cpp doesn't build with GCC6
359133 Assertion 'eltSzB <= ddpa->poolSzB' failed
@@ -129,6 +174,7 @@
359289 s390x: popcnt (B9E1) not implemented
359472 The Power PC vsubuqm instruction doesn't always give the correct result
359503 Add missing syscalls for aarch64 (arm64)
+359645 "You need libc6-dbg" help message could be more helpful
359703 s390: wire up separate socketcalls system calls
359724 getsockname might crash - deref_UInt should call safe_to_deref
359733 amd64 implement ld.so strchr/index override like x86
@@ -156,7 +202,7 @@
361354 ppc64[le]: wire up separate socketcalls system calls
361615 Inconsistent termination for multithreaded process terminated by signal
361926 Unhandled Solaris syscall: sysfs(84)
-362009 Valgrind dumps core on unimplemented functionality before threads are created
+362009 V dumps core on unimplemented functionality before threads are created
362329 Valgrind does not support the IBM POWER ISA 3.0 instructions, part 3/5
362894 missing (broken) support for wbit field on mtfsfi instruction (ppc64)
362935 [AsusWRT] Assertion 'sizeof(TTEntryC) <= 88' failed
@@ -179,9 +225,8 @@
367995 Integration of memcheck with custom memory allocator
368120 x86_linux asm _start functions do not keep 16-byte aligned stack pointer
368412 False positive result for altivec capability check
-368461 mmapunmap test fails on ppc64
368416 Add tc06_two_races_xml.exp output for ppc64
-368412 False positive result for altivec capability check
+368419 Perf Events ioctls not implemented
368461 mmapunmap test fails on ppc64
368823 run_a_thread_NORETURN assembly code typo for VGP_arm64_linux target
369000 AMD64 fma4 instructions unsupported.
@@ -198,20 +243,25 @@
369441 bad lvec argument crashes process_vm_readv/writev syscall wrappers
369446 valgrind crashes on unknown fcntl command
369439 S390x: Unhandled insns RISBLG/RISBHG and LDE/LDER
-369468 Remove quadratic metapool alg. using VG_(HT_remove_at_Iter)
- (VgHashTable *table)
+369468 Remove quadratic metapool algorithm using VG_(HT_remove_at_Iter)
370265 ISA 3.0 HW cap stuff needs updating
371128 BCD add and subtract instructions on Power BE in 32-bit mode do not work
+n-i-bz Fix incorrect (or infinite loop) unwind on RHEL7 x86 and amd64
+n-i-bz massif --pages-as-heap=yes does not report peak caused by mmap+munmap
+n-i-bz false positive leaks due to aspacemgr merging heap & non heap segments
+n-i-bz Fix ppoll_alarm exclusion on OS X
+n-i-bz Document brk segment limitation, reference manual in limit reached msg.
+n-i-bz Fix clobber list in none/tests/amd64/xacq_xrel.c [valgrind r15737]
+n-i-bz Bump allowed shift value for "add.w reg, sp, reg, lsl #N" [vex r3206]
+n-i-bz amd64: memcheck false positive with shr %edx
+n-i-bz arm3: Allow early writeback of SP base register in "strd rD, [sp, #-16]"
+n-i-bz ppc: Fix two cases of PPCAvFpOp vs PPCFpOp enum confusion
+n-i-bz arm: Fix incorrect register-number constraint check for LDAEX{,B,H,D}
+n-i-bz DHAT: added collection of the metric "tot-blocks-allocd"
+
+(3.12.0.RC1: 20 October 2016, vex r3282, valgrind r16092)
+
-n-i-bz Fix incorrect (or infinite loop) unwind on RHEL7 x86 and amd64
-n-i-bz massif --pages-as-heap=yes does not report peak caused by mmap+munmap
-n-i-bz false positive leaks due to aspacemgr merging non heap segments
- with heap segments.
-n-i-bz Fix ppoll_alarm exclusion on OS X
-n-i-bz Document brk segment limitation, reference manual in limit reached msg.
-n-i-bz Fix clobber list in none/tests/amd64/xacq_xrel.c [valgrind r15737]
-n-i-bz Bump allowed shift value for "add.w reg, sp, reg, lsl #N" [vex r3206]
-n-i-bz amd64: memcheck false positive with shr %edx
Release 3.11.0 (22 September 2015)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
|
From: <sv...@va...> - 2016-10-20 05:49:16
|
Author: sewardj
Date: Thu Oct 20 06:49:10 2016
New Revision: 16090
Log:
Merge from trunk:
16081 Add another incompatibility between illumos and Solaris kernels.
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/README.solaris
Modified: branches/VALGRIND_3_12_BRANCH/README.solaris
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/README.solaris (original)
+++ branches/VALGRIND_3_12_BRANCH/README.solaris Thu Oct 20 06:49:10 2016
@@ -52,6 +52,8 @@
syscalls [3]
- posix_spawn() functionality is backed up by true spawn() syscall on Solaris 12
whereas illumos and Solaris 11 leverage vfork()
+- illumos and older Solaris use utimesys() syscall whereas newer Solaris
+ uses utimensat()
[1] http://docs.oracle.com/cd/E26502_01/html/E28556/gkzlf.html#gkzip
[2] https://www.illumos.org/issues/521
|
Author: sewardj
Date: Thu Oct 20 06:48:12 2016
New Revision: 16089
Log:
Merge from trunk:
16080 mips: fix coredump creation in Valgrind
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/coregrind/m_coredump/coredump-elf.c
branches/VALGRIND_3_12_BRANCH/include/vki/vki-mips32-linux.h
branches/VALGRIND_3_12_BRANCH/include/vki/vki-mips64-linux.h
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/m_coredump/coredump-elf.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/m_coredump/coredump-elf.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/m_coredump/coredump-elf.c Thu Oct 20 06:48:12 2016
@@ -226,7 +226,11 @@
/*OUT*/struct vki_elf_prstatus *prs,
const vki_siginfo_t *si)
{
+#if defined(VGP_mips32_linux) || defined(VGP_mips64_linux)
+ vki_elf_greg_t *regs;
+#else
struct vki_user_regs_struct *regs;
+#endif
const ThreadArchState* arch = &tst->arch;
VG_(memset)(prs, 0, sizeof(*prs));
@@ -245,6 +249,8 @@
#if defined(VGP_s390x_linux)
/* prs->pr_reg has struct type. Need to take address. */
regs = (struct vki_user_regs_struct *)&(prs->pr_reg);
+#elif defined(VGP_mips32_linux) || defined(VGP_mips64_linux)
+ regs = (vki_elf_greg_t *)prs->pr_reg;
#else
regs = (struct vki_user_regs_struct *)prs->pr_reg;
vg_assert(sizeof(*regs) == sizeof(prs->pr_reg));
@@ -389,24 +395,27 @@
regs->orig_gpr2 = arch->vex.guest_r2;
#elif defined(VGP_mips32_linux)
-# define DO(n) regs->MIPS_r##n = arch->vex.guest_r##n
- DO(0); DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7);
- DO(8); DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15);
- DO(16); DO(17); DO(18); DO(19); DO(20); DO(21); DO(22); DO(23);
- DO(24); DO(25); DO(26); DO(27); DO(28); DO(29); DO(30); DO(31);
-# undef DO
- regs->MIPS_hi = arch->vex.guest_HI;
- regs->MIPS_lo = arch->vex.guest_LO;
-
+# define DO(n) regs[VKI_MIPS32_EF_R##n] = arch->vex.guest_r##n
+ DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7); DO(8);
+ DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15); DO(16);
+ DO(17); DO(18); DO(19); DO(20); DO(21); DO(22); DO(23); DO(24);
+ DO(25); DO(28); DO(29); DO(30); DO(31);
+# undef DO
+ regs[VKI_MIPS32_EF_LO] = arch->vex.guest_LO;
+ regs[VKI_MIPS32_EF_HI] = arch->vex.guest_HI;
+ regs[VKI_MIPS32_EF_CP0_STATUS] = arch->vex.guest_CP0_status;
+ regs[VKI_MIPS32_EF_CP0_EPC] = arch->vex.guest_PC;
#elif defined(VGP_mips64_linux)
-# define DO(n) regs->MIPS_r##n = arch->vex.guest_r##n
- DO(0); DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7);
- DO(8); DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15);
- DO(16); DO(17); DO(18); DO(19); DO(20); DO(21); DO(22); DO(23);
- DO(24); DO(25); DO(26); DO(27); DO(28); DO(29); DO(30); DO(31);
-# undef DO
- regs->MIPS_hi = arch->vex.guest_HI;
- regs->MIPS_lo = arch->vex.guest_LO;
+# define DO(n) regs[VKI_MIPS64_EF_R##n] = arch->vex.guest_r##n
+ DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7); DO(8);
+ DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15); DO(16);
+ DO(17); DO(18); DO(19); DO(20); DO(21); DO(22); DO(23); DO(24);
+ DO(25); DO(28); DO(29); DO(30); DO(31);
+# undef DO
+ regs[VKI_MIPS64_EF_LO] = arch->vex.guest_LO;
+ regs[VKI_MIPS64_EF_HI] = arch->vex.guest_HI;
+ regs[VKI_MIPS64_EF_CP0_STATUS] = arch->vex.guest_CP0_status;
+ regs[VKI_MIPS64_EF_CP0_EPC] = arch->vex.guest_PC;
#elif defined(VGP_tilegx_linux)
# define DO(n) regs->regs[n] = arch->vex.guest_r##n
DO(0); DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7);
Modified: branches/VALGRIND_3_12_BRANCH/include/vki/vki-mips32-linux.h
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/include/vki/vki-mips32-linux.h (original)
+++ branches/VALGRIND_3_12_BRANCH/include/vki/vki-mips32-linux.h Thu Oct 20 06:48:12 2016
@@ -815,56 +815,60 @@
#endif
} __attribute__ ((aligned (8)));
-
-#define vki_user_regs_struct vki_pt_regs
-
-#define MIPS_lo lo
-#define MIPS_hi hi
-//#define MIPS_pc regs[32]
-#define MIPS_r31 regs[31]
-#define MIPS_r30 regs[30]
-#define MIPS_r29 regs[29]
-#define MIPS_r28 regs[28]
-#define MIPS_r27 regs[27]
-#define MIPS_r26 regs[26]
-#define MIPS_r25 regs[25]
-#define MIPS_r24 regs[24]
-#define MIPS_r23 regs[23]
-#define MIPS_r22 regs[22]
-#define MIPS_r21 regs[21]
-#define MIPS_r20 regs[20]
-#define MIPS_r19 regs[19]
-#define MIPS_r18 regs[18]
-#define MIPS_r17 regs[17]
-#define MIPS_r16 regs[16]
-#define MIPS_r15 regs[15]
-#define MIPS_r14 regs[14]
-#define MIPS_r13 regs[13]
-#define MIPS_r12 regs[12]
-#define MIPS_r11 regs[11]
-#define MIPS_r10 regs[10]
-#define MIPS_r9 regs[9]
-#define MIPS_r8 regs[8]
-#define MIPS_r7 regs[7]
-#define MIPS_r6 regs[6]
-#define MIPS_r5 regs[5]
-#define MIPS_r4 regs[4]
-#define MIPS_r3 regs[3]
-#define MIPS_r2 regs[2]
-#define MIPS_r1 regs[1]
-#define MIPS_r0 regs[0]
-
#define VKI_PTRACE_GETREGS 12
#define VKI_PTRACE_SETREGS 13
#define VKI_PTRACE_GETFPREGS 14
#define VKI_PTRACE_SETFPREGS 15
//----------------------------------------------------------------------
-// From linux-2.6.35.5/include/asm-mips/elf.h
+// From linux-4.5/arch/mips/include/uapi/asm/reg.h
+//----------------------------------------------------------------------
+#define VKI_MIPS32_EF_R0 6
+#define VKI_MIPS32_EF_R1 7
+#define VKI_MIPS32_EF_R2 8
+#define VKI_MIPS32_EF_R3 9
+#define VKI_MIPS32_EF_R4 10
+#define VKI_MIPS32_EF_R5 11
+#define VKI_MIPS32_EF_R6 12
+#define VKI_MIPS32_EF_R7 13
+#define VKI_MIPS32_EF_R8 14
+#define VKI_MIPS32_EF_R9 15
+#define VKI_MIPS32_EF_R10 16
+#define VKI_MIPS32_EF_R11 17
+#define VKI_MIPS32_EF_R12 18
+#define VKI_MIPS32_EF_R13 19
+#define VKI_MIPS32_EF_R14 20
+#define VKI_MIPS32_EF_R15 21
+#define VKI_MIPS32_EF_R16 22
+#define VKI_MIPS32_EF_R17 23
+#define VKI_MIPS32_EF_R18 24
+#define VKI_MIPS32_EF_R19 25
+#define VKI_MIPS32_EF_R20 26
+#define VKI_MIPS32_EF_R21 27
+#define VKI_MIPS32_EF_R22 28
+#define VKI_MIPS32_EF_R23 29
+#define VKI_MIPS32_EF_R24 30
+#define VKI_MIPS32_EF_R25 31
+#define VKI_MIPS32_EF_R26 32
+#define VKI_MIPS32_EF_R27 33
+#define VKI_MIPS32_EF_R28 34
+#define VKI_MIPS32_EF_R29 35
+#define VKI_MIPS32_EF_R30 36
+#define VKI_MIPS32_EF_R31 37
+#define VKI_MIPS32_EF_LO 38
+#define VKI_MIPS32_EF_HI 39
+#define VKI_MIPS32_EF_CP0_EPC 40
+#define VKI_MIPS32_EF_CP0_BADVADDR 41
+#define VKI_MIPS32_EF_CP0_STATUS 42
+#define VKI_MIPS32_EF_CP0_CAUSE 43
+#define VKI_MIPS32_EF_UNUSED0 44
+
+//----------------------------------------------------------------------
+// From linux-4.5/arch/mips/include/asm/elf.h
//----------------------------------------------------------------------
typedef unsigned long vki_elf_greg_t;
-#define VKI_ELF_NGREG (sizeof (struct vki_user_regs_struct) / sizeof(vki_elf_greg_t))
-#define VKI_ELF_NFPREG 33 /* includes fpscr */
+#define VKI_ELF_NGREG 45
+#define VKI_ELF_NFPREG 33 /* includes fpscr */
typedef vki_elf_greg_t vki_elf_gregset_t[VKI_ELF_NGREG];
Modified: branches/VALGRIND_3_12_BRANCH/include/vki/vki-mips64-linux.h
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/include/vki/vki-mips64-linux.h (original)
+++ branches/VALGRIND_3_12_BRANCH/include/vki/vki-mips64-linux.h Thu Oct 20 06:48:12 2016
@@ -841,43 +841,48 @@
#endif
} __attribute__ ((aligned (8)));
+//----------------------------------------------------------------------
+// From linux-4.5/arch/mips/include/uapi/asm/reg.h
+//----------------------------------------------------------------------
-#define vki_user_regs_struct vki_pt_regs
-
-#define MIPS_lo lo
-#define MIPS_hi hi
-#define MIPS_r31 regs[31]
-#define MIPS_r30 regs[30]
-#define MIPS_r29 regs[29]
-#define MIPS_r28 regs[28]
-#define MIPS_r27 regs[27]
-#define MIPS_r26 regs[26]
-#define MIPS_r25 regs[25]
-#define MIPS_r24 regs[24]
-#define MIPS_r23 regs[23]
-#define MIPS_r22 regs[22]
-#define MIPS_r21 regs[21]
-#define MIPS_r20 regs[20]
-#define MIPS_r19 regs[19]
-#define MIPS_r18 regs[18]
-#define MIPS_r17 regs[17]
-#define MIPS_r16 regs[16]
-#define MIPS_r15 regs[15]
-#define MIPS_r14 regs[14]
-#define MIPS_r13 regs[13]
-#define MIPS_r12 regs[12]
-#define MIPS_r11 regs[11]
-#define MIPS_r10 regs[10]
-#define MIPS_r9 regs[9]
-#define MIPS_r8 regs[8]
-#define MIPS_r7 regs[7]
-#define MIPS_r6 regs[6]
-#define MIPS_r5 regs[5]
-#define MIPS_r4 regs[4]
-#define MIPS_r3 regs[3]
-#define MIPS_r2 regs[2]
-#define MIPS_r1 regs[1]
-#define MIPS_r0 regs[0]
+#define VKI_MIPS64_EF_R0 0
+#define VKI_MIPS64_EF_R1 1
+#define VKI_MIPS64_EF_R2 2
+#define VKI_MIPS64_EF_R3 3
+#define VKI_MIPS64_EF_R4 4
+#define VKI_MIPS64_EF_R5 5
+#define VKI_MIPS64_EF_R6 6
+#define VKI_MIPS64_EF_R7 7
+#define VKI_MIPS64_EF_R8 8
+#define VKI_MIPS64_EF_R9 9
+#define VKI_MIPS64_EF_R10 10
+#define VKI_MIPS64_EF_R11 11
+#define VKI_MIPS64_EF_R12 12
+#define VKI_MIPS64_EF_R13 13
+#define VKI_MIPS64_EF_R14 14
+#define VKI_MIPS64_EF_R15 15
+#define VKI_MIPS64_EF_R16 16
+#define VKI_MIPS64_EF_R17 17
+#define VKI_MIPS64_EF_R18 18
+#define VKI_MIPS64_EF_R19 19
+#define VKI_MIPS64_EF_R20 20
+#define VKI_MIPS64_EF_R21 21
+#define VKI_MIPS64_EF_R22 22
+#define VKI_MIPS64_EF_R23 23
+#define VKI_MIPS64_EF_R24 24
+#define VKI_MIPS64_EF_R25 25
+#define VKI_MIPS64_EF_R26 26
+#define VKI_MIPS64_EF_R27 27
+#define VKI_MIPS64_EF_R28 28
+#define VKI_MIPS64_EF_R29 29
+#define VKI_MIPS64_EF_R30 30
+#define VKI_MIPS64_EF_R31 31
+#define VKI_MIPS64_EF_LO 32
+#define VKI_MIPS64_EF_HI 33
+#define VKI_MIPS64_EF_CP0_EPC 34
+#define VKI_MIPS64_EF_CP0_BADVADDR 35
+#define VKI_MIPS64_EF_CP0_STATUS 36
+#define VKI_MIPS64_EF_CP0_CAUSE 37
//----------------------------------------------------------------------
// From linux-2.6.35.9/include/asm-i386/ptrace.h
|
|
From: <sv...@va...> - 2016-10-20 05:47:13
|
Author: sewardj
Date: Thu Oct 20 06:47:06 2016
New Revision: 16088
Log:
Merge from trunk:
16079 Update memcheck/tests/ppc64/power_ISA2_05.vgtest
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/memcheck/tests/ppc64/power_ISA2_05.vgtest
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/tests/ppc64/power_ISA2_05.vgtest
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/tests/ppc64/power_ISA2_05.vgtest (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/tests/ppc64/power_ISA2_05.vgtest Thu Oct 20 06:47:06 2016
@@ -1,2 +1,3 @@
prog: power_ISA2_05
-vgopts: --workaround-gcc296-bugs=yes
+## depricated option --workaround-gcc296-bugs=yes
+vgopts: --ignore-range-below-sp=1024-1
|
|
From: <sv...@va...> - 2016-10-20 05:45:24
|
Author: sewardj
Date: Thu Oct 20 06:45:18 2016
New Revision: 16087
Log:
Merge from trunk:
16078 "You need libc6-dbg" help message could be more helpful.
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/coregrind/m_redir.c
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/m_redir.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/m_redir.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/m_redir.c Thu Oct 20 06:45:18 2016
@@ -1297,6 +1297,10 @@
"",
" On Debian, Ubuntu: libc6-dbg",
" On SuSE, openSuSE, Fedora, RHEL: glibc-debuginfo",
+ "",
+ "Note that if you are debugging a 32 bit process on a",
+ "64 bit system, you will need a corresponding 32 bit debuginfo",
+ "package (e.g. libc6-dbg:i386).",
NULL
};
|
|
From: <sv...@va...> - 2016-10-20 05:44:34
|
Author: sewardj
Date: Thu Oct 20 06:44:27 2016
New Revision: 16086
Log:
Merge from trunk:
16077 Add support for Linux perf-events ioctls.
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-linux.c
branches/VALGRIND_3_12_BRANCH/include/vki/vki-linux.h
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-linux.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-linux.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-linux.c Thu Oct 20 06:44:27 2016
@@ -5640,6 +5640,10 @@
case VKI_FIONCLEX:
case VKI_TIOCNOTTY:
+ /* linux perf_event ioctls */
+ case VKI_PERF_EVENT_IOC_ENABLE:
+ case VKI_PERF_EVENT_IOC_DISABLE:
+
/* linux/soundcard interface (ALSA) */
case VKI_SNDRV_PCM_IOCTL_HW_FREE:
case VKI_SNDRV_PCM_IOCTL_HWSYNC:
@@ -8496,6 +8500,25 @@
break;
}
+ case VKI_PERF_EVENT_IOC_RESET:
+ case VKI_PERF_EVENT_IOC_REFRESH:
+ case VKI_PERF_EVENT_IOC_SET_OUTPUT:
+ case VKI_PERF_EVENT_IOC_SET_BPF:
+ /* These take scalar arguments, so already handled above */
+ break;
+
+ case VKI_PERF_EVENT_IOC_PERIOD:
+ PRE_MEM_READ("ioctl(VKI_PERF_EVENT_IOC_PERIOD)", (Addr)ARG3, sizeof(__vki_u64));
+ break;
+
+ case VKI_PERF_EVENT_IOC_SET_FILTER:
+ PRE_MEM_RASCIIZ("ioctl(VKI_PERF_EVENT_IOC_SET_FILTER).filter", ARG3);
+ break;
+
+ case VKI_PERF_EVENT_IOC_ID:
+ PRE_MEM_WRITE("ioctl(VKI_PERF_EVENT_IOC_ID)", (Addr)ARG3, sizeof(__vki_u64));
+ break;
+
default:
/* EVIOC* are variable length and return size written on success */
switch (ARG2 & ~(_VKI_IOC_SIZEMASK << _VKI_IOC_SIZESHIFT)) {
@@ -10388,6 +10411,20 @@
case VKI_TIOCSSERIAL:
break;
+ case VKI_PERF_EVENT_IOC_ENABLE:
+ case VKI_PERF_EVENT_IOC_DISABLE:
+ case VKI_PERF_EVENT_IOC_REFRESH:
+ case VKI_PERF_EVENT_IOC_RESET:
+ case VKI_PERF_EVENT_IOC_PERIOD:
+ case VKI_PERF_EVENT_IOC_SET_OUTPUT:
+ case VKI_PERF_EVENT_IOC_SET_FILTER:
+ case VKI_PERF_EVENT_IOC_SET_BPF:
+ break;
+
+ case VKI_PERF_EVENT_IOC_ID:
+ POST_MEM_WRITE((Addr)ARG3, sizeof(__vki_u64));
+ break;
+
default:
/* EVIOC* are variable length and return size written on success */
switch (ARG2 & ~(_VKI_IOC_SIZEMASK << _VKI_IOC_SIZESHIFT)) {
Modified: branches/VALGRIND_3_12_BRANCH/include/vki/vki-linux.h
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/include/vki/vki-linux.h (original)
+++ branches/VALGRIND_3_12_BRANCH/include/vki/vki-linux.h Thu Oct 20 06:44:27 2016
@@ -2946,6 +2946,16 @@
};
};
+#define VKI_PERF_EVENT_IOC_ENABLE _VKI_IO ('$', 0)
+#define VKI_PERF_EVENT_IOC_DISABLE _VKI_IO ('$', 1)
+#define VKI_PERF_EVENT_IOC_REFRESH _VKI_IO ('$', 2)
+#define VKI_PERF_EVENT_IOC_RESET _VKI_IO ('$', 3)
+#define VKI_PERF_EVENT_IOC_PERIOD _VKI_IOW('$', 4, __vki_u64)
+#define VKI_PERF_EVENT_IOC_SET_OUTPUT _VKI_IO ('$', 5)
+#define VKI_PERF_EVENT_IOC_SET_FILTER _VKI_IOW('$', 6, char *)
+#define VKI_PERF_EVENT_IOC_ID _VKI_IOR('$', 7, __vki_u64 *)
+#define VKI_PERF_EVENT_IOC_SET_BPF _VKI_IOW('$', 8, __vki_u32)
+
/*--------------------------------------------------------------------*/
// From linux-2.6.32.4/include/linux/getcpu.h
/*--------------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2016-10-20 05:41:51
|
Author: sewardj
Date: Thu Oct 20 06:41:44 2016
New Revision: 3282
Log:
Merge from trunk:
3276 Allow early writeback of SP base register in "strd rD, [sp, #-16]"
Modified:
branches/VEX_3_12_BRANCH/ (props changed)
branches/VEX_3_12_BRANCH/priv/guest_arm_toIR.c
Modified: branches/VEX_3_12_BRANCH/priv/guest_arm_toIR.c
==============================================================================
--- branches/VEX_3_12_BRANCH/priv/guest_arm_toIR.c (original)
+++ branches/VEX_3_12_BRANCH/priv/guest_arm_toIR.c Thu Oct 20 06:41:44 2016
@@ -17431,15 +17431,17 @@
ignore alignment issues for the time being. */
/* For almost all cases, we do the writeback after the transfers.
- However, that leaves the stack "uncovered" in this case:
+ However, that leaves the stack "uncovered" in cases like:
strd rD, [sp, #-8]
+ strd rD, [sp, #-16]
In which case, do the writeback to SP now, instead of later.
This is bad in that it makes the insn non-restartable if the
accesses fault, but at least keeps Memcheck happy. */
Bool writeback_already_done = False;
if (bS == 1 /*store*/ && summary == (2 | 16)
&& rN == 13 && rN != rD && rN != rD+1
- && bU == 0/*minus*/ && imm8 == 8) {
+ && bU == 0/*minus*/
+ && (imm8 == 8 || imm8 == 16)) {
putIRegA( rN, mkexpr(eaT), condT, Ijk_Boring );
writeback_already_done = True;
}
@@ -21521,15 +21523,17 @@
IRTemp transAddr = bP == 1 ? postAddr : preAddr;
/* For almost all cases, we do the writeback after the transfers.
- However, that leaves the stack "uncovered" in this case:
+ However, that leaves the stack "uncovered" in cases like:
strd rD, [sp, #-8]
+ strd rD, [sp, #-16]
In which case, do the writeback to SP now, instead of later.
This is bad in that it makes the insn non-restartable if the
accesses fault, but at least keeps Memcheck happy. */
Bool writeback_already_done = False;
if (bL == 0/*store*/ && bW == 1/*wb*/
&& rN == 13 && rN != rT && rN != rT2
- && bU == 0/*minus*/ && (imm8 << 2) == 8) {
+ && bU == 0/*minus*/
+ && ((imm8 << 2) == 8 || (imm8 << 2) == 16)) {
putIRegT(rN, mkexpr(postAddr), condT);
writeback_already_done = True;
}
|
|
From: <sv...@va...> - 2016-10-20 05:40:41
|
Author: sewardj
Date: Thu Oct 20 06:40:34 2016
New Revision: 3281
Log:
Merge from trunk:
3275 CVTPI2PS: Only switch to MMX mode if the source is a MMX register.
Modified:
branches/VEX_3_12_BRANCH/ (props changed)
branches/VEX_3_12_BRANCH/priv/guest_amd64_toIR.c
branches/VEX_3_12_BRANCH/priv/guest_x86_toIR.c
Modified: branches/VEX_3_12_BRANCH/priv/guest_amd64_toIR.c
==============================================================================
--- branches/VEX_3_12_BRANCH/priv/guest_amd64_toIR.c (original)
+++ branches/VEX_3_12_BRANCH/priv/guest_amd64_toIR.c Thu Oct 20 06:40:34 2016
@@ -12848,8 +12848,10 @@
IRTemp rmode = newTemp(Ity_I32);
modrm = getUChar(delta);
- do_MMX_preamble();
if (epartIsReg(modrm)) {
+ /* Only switch to MMX mode if the source is a MMX register.
+ See comments on CVTPI2PD for details. Fixes #357059. */
+ do_MMX_preamble();
assign( arg64, getMMXReg(eregLO3ofRM(modrm)) );
delta += 1;
DIP("cvtpi2ps %s,%s\n", nameMMXReg(eregLO3ofRM(modrm)),
Modified: branches/VEX_3_12_BRANCH/priv/guest_x86_toIR.c
==============================================================================
--- branches/VEX_3_12_BRANCH/priv/guest_x86_toIR.c (original)
+++ branches/VEX_3_12_BRANCH/priv/guest_x86_toIR.c Thu Oct 20 06:40:34 2016
@@ -8565,8 +8565,10 @@
vassert(sz == 4);
modrm = getIByte(delta+2);
- do_MMX_preamble();
if (epartIsReg(modrm)) {
+ /* Only switch to MMX mode if the source is a MMX register.
+ See comments on CVTPI2PD for details. Fixes #357059. */
+ do_MMX_preamble();
assign( arg64, getMMXReg(eregOfRM(modrm)) );
delta += 2+1;
DIP("cvtpi2ps %s,%s\n", nameMMXReg(eregOfRM(modrm)),
|
|
From: <sv...@va...> - 2016-10-20 05:39:25
|
Author: sewardj
Date: Thu Oct 20 06:39:18 2016
New Revision: 3280
Log:
Merge from trunk:
3274 Accept redundant REX prefixes for {minsd,maxsd} m128, xmm.
Modified:
branches/VEX_3_12_BRANCH/ (props changed)
branches/VEX_3_12_BRANCH/priv/guest_amd64_toIR.c
Modified: branches/VEX_3_12_BRANCH/priv/guest_amd64_toIR.c
==============================================================================
--- branches/VEX_3_12_BRANCH/priv/guest_amd64_toIR.c (original)
+++ branches/VEX_3_12_BRANCH/priv/guest_amd64_toIR.c Thu Oct 20 06:39:18 2016
@@ -13520,7 +13520,8 @@
goto decode_success;
}
/* F2 0F 5D = MINSD -- min 64F0x2 from R/M to R */
- if (haveF2no66noF3(pfx) && sz == 4) {
+ if (haveF2no66noF3(pfx)
+ && (sz == 4 || /* ignore redundant REX.W */ sz == 8)) {
delta = dis_SSE_E_to_G_lo64( vbi, pfx, delta, "minsd", Iop_Min64F0x2 );
goto decode_success;
}
@@ -13566,7 +13567,8 @@
goto decode_success;
}
/* F2 0F 5F = MAXSD -- max 64F0x2 from R/M to R */
- if (haveF2no66noF3(pfx) && sz == 4) {
+ if (haveF2no66noF3(pfx)
+ && (sz == 4 || /* ignore redundant REX.W */ sz == 8)) {
delta = dis_SSE_E_to_G_lo64( vbi, pfx, delta, "maxsd", Iop_Max64F0x2 );
goto decode_success;
}
|
|
From: <sv...@va...> - 2016-10-20 05:38:10
|
Author: sewardj
Date: Thu Oct 20 06:38:04 2016
New Revision: 3279
Log:
Merge from trunk:
3273 Fix two cases of PPCAvFpOp vs PPCFpOp enum confusion.
Modified:
branches/VEX_3_12_BRANCH/ (props changed)
branches/VEX_3_12_BRANCH/priv/host_ppc_isel.c
Modified: branches/VEX_3_12_BRANCH/priv/host_ppc_isel.c
==============================================================================
--- branches/VEX_3_12_BRANCH/priv/host_ppc_isel.c (original)
+++ branches/VEX_3_12_BRANCH/priv/host_ppc_isel.c Thu Oct 20 06:38:04 2016
@@ -4210,7 +4210,7 @@
HReg tmp = newVRegV(env);
PPCAMode* zero_r1 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
PPCAMode* eight_r1 = PPCAMode_IR( 8, StackFramePtr(env->mode64) );
- PPCAvFpOp fpop = Pavfp_INVALID;
+ PPCFpOp fpop = Pfp_INVALID;
if (FPU_rounding_mode_isOdd(e->Iex.Binop.arg1)) {
/* use rounding mode specified by RN. Issue inst with R0 = 0 */
@@ -4495,7 +4495,7 @@
static HReg iselFp128Expr_wrk( ISelEnv* env, IRExpr* e, IREndness IEndianess)
{
Bool mode64 = env->mode64;
- PPCAvFpOp fpop = Pavfp_INVALID;
+ PPCFpOp fpop = Pfp_INVALID;
IRType ty = typeOfIRExpr(env->type_env,e);
vassert(e);
|
|
From: <sv...@va...> - 2016-10-20 05:37:14
|
Author: sewardj
Date: Thu Oct 20 06:37:07 2016
New Revision: 3278
Log:
Merge from trunk:
3272 Fix incorrect register-number constraint check for LDAEX{,B,H,D}
Modified:
branches/VEX_3_12_BRANCH/ (props changed)
branches/VEX_3_12_BRANCH/priv/guest_arm_toIR.c
Modified: branches/VEX_3_12_BRANCH/priv/guest_arm_toIR.c
==============================================================================
--- branches/VEX_3_12_BRANCH/priv/guest_arm_toIR.c (original)
+++ branches/VEX_3_12_BRANCH/priv/guest_arm_toIR.c Thu Oct 20 06:37:07 2016
@@ -13329,7 +13329,7 @@
if (szBlg2 < 3) {
if (! (tt != 15 && nn != 15)) gate = False;
} else {
- if (! (tt & 1) == 0 && tt != 14 && nn != 15) gate = False;
+ if (! ((tt & 1) == 0 && tt != 14 && nn != 15)) gate = False;
vassert(tt2 == 16/*invalid*/);
tt2 = tt + 1;
}
|
|
From: <sv...@va...> - 2016-10-20 05:35:54
|
Author: sewardj
Date: Thu Oct 20 06:35:47 2016
New Revision: 16085
Log:
Merge from trunk:
16075 x86_linux asm _start functions do not keep 16-byte aligned %esp.
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/coregrind/m_main.c
branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-x86-linux.c
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/m_main.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/m_main.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/m_main.c Thu Oct 20 06:35:47 2016
@@ -2985,12 +2985,13 @@
"\tmovl $vgPlain_interim_stack, %eax\n"
"\taddl $"VG_STRINGIFY(VG_STACK_GUARD_SZB)", %eax\n"
"\taddl $"VG_STRINGIFY(VG_DEFAULT_STACK_ACTIVE_SZB)", %eax\n"
+ /* allocate at least 16 bytes on the new stack, and aligned */
"\tsubl $16, %eax\n"
"\tandl $~15, %eax\n"
/* install it, and collect the original one */
"\txchgl %eax, %esp\n"
/* call _start_in_C_linux, passing it the startup %esp */
- "\tpushl %eax\n"
+ "\tmovl %eax, (%esp)\n"
"\tcall _start_in_C_linux\n"
"\thlt\n"
".previous\n"
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-x86-linux.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-x86-linux.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-x86-linux.c Thu Oct 20 06:35:47 2016
@@ -83,8 +83,9 @@
".globl vgModuleLocal_call_on_new_stack_0_1\n"
"vgModuleLocal_call_on_new_stack_0_1:\n"
" movl %esp, %esi\n" // remember old stack pointer
-" movl 4(%esi), %esp\n" // set stack
-" pushl 16(%esi)\n" // arg1 to stack
+" movl 4(%esi), %esp\n" // set stack, assume %esp is now 16-byte aligned
+" subl $12, %esp\n" // skip 12 bytes
+" pushl 16(%esi)\n" // arg1 to stack, %esp is 16-byte aligned
" pushl 8(%esi)\n" // retaddr to stack
" pushl 12(%esi)\n" // f to stack
" movl $0, %eax\n" // zero all GP regs
@@ -150,7 +151,8 @@
" movl 4+"FSZ"(%esp), %ecx\n" /* syscall arg2: child stack */
" movl 12+"FSZ"(%esp), %ebx\n" /* fn arg */
" movl 0+"FSZ"(%esp), %eax\n" /* fn */
-" lea -8(%ecx), %ecx\n" /* make space on stack */
+" andl $-16, %ecx\n" /* align to 16-byte */
+" lea -20(%ecx), %ecx\n" /* allocate 16*n+4 bytes on stack */
" movl %ebx, 4(%ecx)\n" /* fn arg */
" movl %eax, 0(%ecx)\n" /* fn */
@@ -165,7 +167,7 @@
" jnz 1f\n"
/* CHILD - call thread function */
-" popl %eax\n"
+" popl %eax\n" /* child %esp is 16-byte aligned */
" call *%eax\n" /* call fn */
/* exit with result */
|
|
From: <sv...@va...> - 2016-10-20 05:34:42
|
Author: sewardj
Date: Thu Oct 20 06:34:35 2016
New Revision: 16084
Log:
Merge from trunk:
16074 Fix run_a_thread_NORETURN assembly code typo for VGP_arm64_linux
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-linux.c
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-linux.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-linux.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-linux.c Thu Oct 20 06:34:35 2016
@@ -270,12 +270,12 @@
#elif defined(VGP_arm64_linux)
asm volatile (
"str %w1, %0\n" /* set tst->status = VgTs_Empty (32-bit store) */
- "mov x8, %2\n" /* set %r7 = __NR_exit */
- "ldr x0, %3\n" /* set %r0 = tst->os_state.exitcode */
+ "mov x8, %2\n" /* set %x8 = __NR_exit */
+ "ldr x0, %3\n" /* set %x0 = tst->os_state.exitcode */
"svc 0x00000000\n" /* exit(tst->os_state.exitcode) */
: "=m" (tst->status)
: "r" (VgTs_Empty), "n" (__NR_exit), "m" (tst->os_state.exitcode)
- : "r0", "r7"
+ : "x0", "x8"
);
#elif defined(VGP_s390x_linux)
asm volatile (
|
|
From: <sv...@va...> - 2016-10-20 05:33:38
|
Author: sewardj
Date: Thu Oct 20 06:33:30 2016
New Revision: 16083
Log:
Merge from trunk:
16073 Add --ignore-range-below-sp=<offset>-<offset>
Added:
branches/VALGRIND_3_12_BRANCH/memcheck/tests/amd64-linux/access_below_sp.c
- copied unchanged from r16073, trunk/memcheck/tests/amd64-linux/access_below_sp.c
branches/VALGRIND_3_12_BRANCH/memcheck/tests/amd64-linux/access_below_sp_1.stderr.exp
- copied unchanged from r16073, trunk/memcheck/tests/amd64-linux/access_below_sp_1.stderr.exp
branches/VALGRIND_3_12_BRANCH/memcheck/tests/amd64-linux/access_below_sp_1.stdout.exp
- copied unchanged from r16073, trunk/memcheck/tests/amd64-linux/access_below_sp_1.stdout.exp
branches/VALGRIND_3_12_BRANCH/memcheck/tests/amd64-linux/access_below_sp_1.vgtest
- copied unchanged from r16073, trunk/memcheck/tests/amd64-linux/access_below_sp_1.vgtest
branches/VALGRIND_3_12_BRANCH/memcheck/tests/amd64-linux/access_below_sp_2.stderr.exp
- copied unchanged from r16073, trunk/memcheck/tests/amd64-linux/access_below_sp_2.stderr.exp
branches/VALGRIND_3_12_BRANCH/memcheck/tests/amd64-linux/access_below_sp_2.stdout.exp
- copied unchanged from r16073, trunk/memcheck/tests/amd64-linux/access_below_sp_2.stdout.exp
branches/VALGRIND_3_12_BRANCH/memcheck/tests/amd64-linux/access_below_sp_2.vgtest
- copied unchanged from r16073, trunk/memcheck/tests/amd64-linux/access_below_sp_2.vgtest
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/coregrind/m_libcbase.c
branches/VALGRIND_3_12_BRANCH/include/pub_tool_libcbase.h
branches/VALGRIND_3_12_BRANCH/memcheck/docs/mc-manual.xml
branches/VALGRIND_3_12_BRANCH/memcheck/mc_errors.c
branches/VALGRIND_3_12_BRANCH/memcheck/mc_include.h
branches/VALGRIND_3_12_BRANCH/memcheck/mc_main.c
branches/VALGRIND_3_12_BRANCH/memcheck/tests/amd64-linux/Makefile.am
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/m_libcbase.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/m_libcbase.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/m_libcbase.c Thu Oct 20 06:33:30 2016
@@ -511,6 +511,25 @@
return True;
}
+Bool VG_(parse_UInt) ( const HChar** ppc, UInt* result )
+{
+ ULong res64 = 0;
+ Int used, limit = 10;
+ used = 0;
+ while (VG_(isdigit)(**ppc)) {
+ res64 = res64 * 10 + ((ULong)(**ppc)) - (ULong)'0';
+ (*ppc)++;
+ used++;
+ if (used > limit) return False;
+ }
+ if (used == 0)
+ return False;
+ if ((res64 >> 32) != 0)
+ return False;
+ *result = (UInt)res64;
+ return True;
+}
+
Bool VG_(parse_enum_set) ( const HChar *tokens,
Bool allow_all,
const HChar *input,
Modified: branches/VALGRIND_3_12_BRANCH/include/pub_tool_libcbase.h
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/include/pub_tool_libcbase.h (original)
+++ branches/VALGRIND_3_12_BRANCH/include/pub_tool_libcbase.h Thu Oct 20 06:33:30 2016
@@ -101,11 +101,15 @@
extern HChar* VG_(strtok) (HChar* s, const HChar* delim);
/* Parse a 32- or 64-bit hex number, including leading 0x, from string
- starting at *ppc, putting result in *result, and return True. Or
- fail, in which case *ppc and *result are undefined, and return
- False. */
+ starting at *ppc, putting result in *result, advance *ppc past the
+ characters used, and return True. Or fail, in which case *ppc and
+ *result are undefined, and return False. */
extern Bool VG_(parse_Addr) ( const HChar** ppc, Addr* result );
+/* Parse an unsigned 32 bit number, written using decimals only.
+ Calling conventions are the same as for VG_(parse_Addr). */
+extern Bool VG_(parse_UInt) ( const HChar** ppc, UInt* result );
+
/* Parse an "enum set" made of one or more words comma separated.
The allowed word values are given in 'tokens', separated by comma.
If a word in 'tokens' is found in 'input', the corresponding bit
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/docs/mc-manual.xml
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/docs/mc-manual.xml (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/docs/mc-manual.xml Thu Oct 20 06:33:30 2016
@@ -1107,9 +1107,38 @@
conversions. This is in violation of the 32-bit PowerPC ELF
specification, which makes no provision for locations below the
stack pointer to be accessible.</para>
+
+ <para>This option is deprecated as of version 3.12 and may be
+ removed from future versions. You should instead use
+ <option>--ignore-range-below-sp</option> to specify the exact
+ range of offsets below the stack pointer that should be ignored.
+ A suitable equivalent
+ is <option>--ignore-range-below-sp=1024-1</option>.
+ </para>
</listitem>
</varlistentry>
+ <varlistentry id="opt.ignore-range-below-sp"
+ xreflabel="--ignore-range-below-sp">
+ <term>
+ <option><![CDATA[--ignore-range-below-sp=<number>-<number> ]]></option>
+ </term>
+ <listitem>
+ <para>This is a more general replacement for the deprecated
+ <option>--workaround-gcc296-bugs</option> option. When
+ specified, it causes Memcheck not to report errors for accesses
+ at the specified offsets below the stack pointer. The two
+ offsets must be positive decimal numbers and -- somewhat
+ counterintuitively -- the first one must be larger, in order to
+ imply a non-wraparound address range to ignore. For example,
+ to ignore 4 byte accesses at 8192 bytes below the stack
+ pointer,
+ use <option>--ignore-range-below-sp=8192-8189</option>. Only
+ one range may be specified.
+ </para>
+ </listitem>
+ </varlistentry>
+
<varlistentry id="opt.show-mismatched-frees"
xreflabel="--show-mismatched-frees">
<term>
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/mc_errors.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/mc_errors.c (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/mc_errors.c Thu Oct 20 06:33:30 2016
@@ -746,13 +746,20 @@
if (VG_(is_watched)( (isWrite ? write_watchpoint : read_watchpoint), a, szB))
return;
- just_below_esp = is_just_below_ESP( VG_(get_SP)(tid), a );
+ Addr current_sp = VG_(get_SP)(tid);
+ just_below_esp = is_just_below_ESP( current_sp, a );
/* If this is caused by an access immediately below %ESP, and the
user asks nicely, we just ignore it. */
if (MC_(clo_workaround_gcc296_bugs) && just_below_esp)
return;
+ /* Also, if this is caused by an access in the range of offsets
+ below the stack pointer as described by
+ --ignore-range-below-sp, ignore it. */
+ if (MC_(in_ignored_range_below_sp)( current_sp, a, szB ))
+ return;
+
extra.Err.Addr.isWrite = isWrite;
extra.Err.Addr.szB = szB;
extra.Err.Addr.maybe_gcc = just_below_esp;
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/mc_include.h
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/mc_include.h (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/mc_include.h Thu Oct 20 06:33:30 2016
@@ -572,6 +572,10 @@
/* Is this address in a user-specified "ignored range" ? */
Bool MC_(in_ignored_range) ( Addr a );
+/* Is this address in a user-specified "ignored range of offsets below
+ the current thread's stack pointer?" */
+Bool MC_(in_ignored_range_below_sp) ( Addr sp, Addr a, UInt szB );
+
/*------------------------------------------------------------*/
/*--- Client blocks ---*/
@@ -715,6 +719,12 @@
operations? Default: NO */
extern Bool MC_(clo_expensive_definedness_checks);
+/* Do we have a range of stack offsets to ignore? Default: NO */
+extern Bool MC_(clo_ignore_range_below_sp);
+extern UInt MC_(clo_ignore_range_below_sp__first_offset);
+extern UInt MC_(clo_ignore_range_below_sp__last_offset);
+
+
/*------------------------------------------------------------*/
/*--- Instrumentation ---*/
/*------------------------------------------------------------*/
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/mc_main.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/mc_main.c (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/mc_main.c Thu Oct 20 06:33:30 2016
@@ -1121,9 +1121,32 @@
/*NOTREACHED*/
}
-/* Parse two Addr separated by a dash, or fail. */
+Bool MC_(in_ignored_range_below_sp) ( Addr sp, Addr a, UInt szB )
+{
+ if (LIKELY(!MC_(clo_ignore_range_below_sp)))
+ return False;
+ tl_assert(szB >= 1 && szB <= 32);
+ tl_assert(MC_(clo_ignore_range_below_sp__first_offset)
+ > MC_(clo_ignore_range_below_sp__last_offset));
+ Addr range_lo = sp - MC_(clo_ignore_range_below_sp__first_offset);
+ Addr range_hi = sp - MC_(clo_ignore_range_below_sp__last_offset);
+ if (range_lo >= range_hi) {
+ /* Bizarre. We have a wraparound situation. What should we do? */
+ return False; // Play safe
+ } else {
+ /* This is the expected case. */
+ if (range_lo <= a && a + szB - 1 <= range_hi)
+ return True;
+ else
+ return False;
+ }
+ /*NOTREACHED*/
+ tl_assert(0);
+}
-static Bool parse_range ( const HChar** ppc, Addr* result1, Addr* result2 )
+/* Parse two Addrs (in hex) separated by a dash, or fail. */
+
+static Bool parse_Addr_pair ( const HChar** ppc, Addr* result1, Addr* result2 )
{
Bool ok = VG_(parse_Addr) (ppc, result1);
if (!ok)
@@ -1137,6 +1160,23 @@
return True;
}
+/* Parse two UInts (32 bit unsigned, in decimal) separated by a dash,
+ or fail. */
+
+static Bool parse_UInt_pair ( const HChar** ppc, UInt* result1, UInt* result2 )
+{
+ Bool ok = VG_(parse_UInt) (ppc, result1);
+ if (!ok)
+ return False;
+ if (**ppc != '-')
+ return False;
+ (*ppc)++;
+ ok = VG_(parse_UInt) (ppc, result2);
+ if (!ok)
+ return False;
+ return True;
+}
+
/* Parse a set of ranges separated by commas into 'ignoreRanges', or
fail. If they are valid, add them to the global set of ignored
ranges. */
@@ -1148,7 +1188,7 @@
while (1) {
Addr start = ~(Addr)0;
Addr end = (Addr)0;
- Bool ok = parse_range(ppc, &start, &end);
+ Bool ok = parse_Addr_pair(ppc, &start, &end);
if (!ok)
return False;
if (start > end)
@@ -5976,6 +6016,9 @@
Int MC_(clo_mc_level) = 2;
Bool MC_(clo_show_mismatched_frees) = True;
Bool MC_(clo_expensive_definedness_checks) = False;
+Bool MC_(clo_ignore_range_below_sp) = False;
+UInt MC_(clo_ignore_range_below_sp__first_offset) = 0;
+UInt MC_(clo_ignore_range_below_sp__last_offset) = 0;
static const HChar * MC_(parse_leak_heuristics_tokens) =
"-,stdstring,length64,newarray,multipleinheritance";
@@ -6106,6 +6149,48 @@
}
}
+ else if VG_STR_CLO(arg, "--ignore-range-below-sp", tmp_str) {
+ /* This seems at first a bit weird, but: in order to imply
+ a non-wrapped-around address range, the first offset needs to be
+ larger than the second one. For example
+ --ignore-range-below-sp=8192,8189
+ would cause accesses to in the range [SP-8192, SP-8189] to be
+ ignored. */
+ UInt offs1 = 0, offs2 = 0;
+ Bool ok = parse_UInt_pair(&tmp_str, &offs1, &offs2);
+ // Ensure we used all the text after the '=' sign.
+ if (ok && *tmp_str != 0) ok = False;
+ if (!ok) {
+ VG_(message)(Vg_DebugMsg,
+ "ERROR: --ignore-range-below-sp: invalid syntax. "
+ " Expected \"...=decimalnumber-decimalnumber\".\n");
+ return False;
+ }
+ if (offs1 > 1000*1000 /*arbitrary*/ || offs2 > 1000*1000 /*ditto*/) {
+ VG_(message)(Vg_DebugMsg,
+ "ERROR: --ignore-range-below-sp: suspiciously large "
+ "offset(s): %u and %u\n", offs1, offs2);
+ return False;
+ }
+ if (offs1 <= offs2) {
+ VG_(message)(Vg_DebugMsg,
+ "ERROR: --ignore-range-below-sp: invalid offsets "
+ "(the first must be larger): %u and %u\n", offs1, offs2);
+ return False;
+ }
+ tl_assert(offs1 > offs2);
+ if (offs1 - offs2 > 4096 /*arbitrary*/) {
+ VG_(message)(Vg_DebugMsg,
+ "ERROR: --ignore-range-below-sp: suspiciously large "
+ "range: %u-%u (size %u)\n", offs1, offs2, offs1 - offs2);
+ return False;
+ }
+ MC_(clo_ignore_range_below_sp) = True;
+ MC_(clo_ignore_range_below_sp__first_offset) = offs1;
+ MC_(clo_ignore_range_below_sp__last_offset) = offs2;
+ return True;
+ }
+
else if VG_BHEX_CLO(arg, "--malloc-fill", MC_(clo_malloc_fill), 0x00,0xFF) {}
else if VG_BHEX_CLO(arg, "--free-fill", MC_(clo_free_fill), 0x00,0xFF) {}
@@ -6163,8 +6248,11 @@
" Use extra-precise definedness tracking [no]\n"
" --freelist-vol=<number> volume of freed blocks queue [20000000]\n"
" --freelist-big-blocks=<number> releases first blocks with size>= [1000000]\n"
-" --workaround-gcc296-bugs=no|yes self explanatory [no]\n"
+" --workaround-gcc296-bugs=no|yes self explanatory [no]. Deprecated.\n"
+" Use --ignore-range-below-sp instead.\n"
" --ignore-ranges=0xPP-0xQQ[,0xRR-0xSS] assume given addresses are OK\n"
+" --ignore-range-below-sp=<number>-<number> do not report errors for\n"
+" accesses at the given offsets below SP\n"
" --malloc-fill=<hexnumber> fill malloc'd areas with given value\n"
" --free-fill=<hexnumber> fill free'd areas with given value\n"
" --keep-stacktraces=alloc|free|alloc-and-free|alloc-then-free|none\n"
@@ -7667,12 +7755,23 @@
MC_(clo_leak_check) = LC_Full;
}
- if (MC_(clo_freelist_big_blocks) >= MC_(clo_freelist_vol))
+ if (MC_(clo_freelist_big_blocks) >= MC_(clo_freelist_vol)
+ && VG_(clo_verbosity) == 1 && !VG_(clo_xml)) {
VG_(message)(Vg_UserMsg,
"Warning: --freelist-big-blocks value %lld has no effect\n"
"as it is >= to --freelist-vol value %lld\n",
MC_(clo_freelist_big_blocks),
MC_(clo_freelist_vol));
+ }
+
+ if (MC_(clo_workaround_gcc296_bugs)
+ && VG_(clo_verbosity) == 1 && !VG_(clo_xml)) {
+ VG_(umsg)(
+ "Warning: --workaround-gcc296-bugs=yes is deprecated.\n"
+ "Warning: Instead use: --ignore-range-below-sp=1024-1\n"
+ "\n"
+ );
+ }
tl_assert( MC_(clo_mc_level) >= 1 && MC_(clo_mc_level) <= 3 );
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/tests/amd64-linux/Makefile.am
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/tests/amd64-linux/Makefile.am (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/tests/amd64-linux/Makefile.am Thu Oct 20 06:33:30 2016
@@ -5,10 +5,15 @@
filter_stderr filter_defcfaexpr
EXTRA_DIST = \
+ access_below_sp_1.vgtest \
+ access_below_sp_1.stderr.exp access_below_sp_1.stdout.exp \
+ access_below_sp_2.vgtest \
+ access_below_sp_2.stderr.exp access_below_sp_2.stdout.exp \
defcfaexpr.vgtest defcfaexpr.stderr.exp \
int3-amd64.vgtest int3-amd64.stderr.exp int3-amd64.stdout.exp
check_PROGRAMS = \
+ access_below_sp \
defcfaexpr \
int3-amd64
|
Author: sewardj
Date: Thu Oct 20 06:30:07 2016
New Revision: 16082
Log:
Merge from trunk:
16072 Fix PPC BE in 32-bit mode (Iop_CmpXX64 not supported in 32-bit mode)
Added:
branches/VALGRIND_3_12_BRANCH/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp-LE
- copied unchanged from r16072, trunk/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp-LE
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/NEWS (contents, props changed)
branches/VALGRIND_3_12_BRANCH/none/tests/ppc32/Makefile.am
branches/VALGRIND_3_12_BRANCH/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp
Modified: branches/VALGRIND_3_12_BRANCH/NEWS
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/NEWS (original)
+++ branches/VALGRIND_3_12_BRANCH/NEWS Thu Oct 20 06:30:07 2016
@@ -195,6 +195,7 @@
369468 Remove quadratic metapool alg. using VG_(HT_remove_at_Iter)
(VgHashTable *table)
370265 ISA 3.0 HW cap stuff needs updating
+371128 BCD add and subtract instructions on Power BE in 32-bit mode do not work
n-i-bz Fix incorrect (or infinite loop) unwind on RHEL7 x86 and amd64
n-i-bz massif --pages-as-heap=yes does not report peak caused by mmap+munmap
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/ppc32/Makefile.am
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/ppc32/Makefile.am (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/ppc32/Makefile.am Thu Oct 20 06:30:07 2016
@@ -38,7 +38,8 @@
test_dfp3.stderr.exp test_dfp3.stdout.exp test_dfp3.vgtest \
test_dfp4.stderr.exp test_dfp4.stdout.exp test_dfp4.vgtest \
test_dfp5.stderr.exp test_dfp5.stdout.exp test_dfp5.vgtest \
- jm_vec_isa_2_07.stderr.exp jm_vec_isa_2_07.stdout.exp jm_vec_isa_2_07.vgtest \
+ jm_vec_isa_2_07.stderr.exp jm_vec_isa_2_07.vgtest \
+ jm_vec_isa_2_07.stdout.exp jm_vec_isa_2_07.stdout.exp-LE \
jm_fp_isa_2_07.stderr.exp jm_fp_isa_2_07.stdout.exp jm_fp_isa_2_07.vgtest \
jm_int_isa_2_07.stderr.exp jm_int_isa_2_07.vgtest \
jm_int_isa_2_07.stdout.exp \
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp Thu Oct 20 06:30:07 2016
@@ -2,224 +2,777 @@
mfvsrd: 090a0b0c0e0d0e0f => 000000000e0d0e0f
mfvsrd: f1f2f3f4f5f6f7f8 => 00000000f5f6f7f8
mfvsrd: f9fafbfcfefdfeff => 00000000fefdfeff
+mfvsrd: 00007fffffffffff => 00000000ffffffff
+mfvsrd: ffff000000000000 => 0000000000000000
+mfvsrd: 0000800000000000 => 0000000000000000
+mfvsrd: 0000000000000000 => 0000000000000000
+mfvsrd: ffffffffffffffff => 00000000ffffffff
mfvsrwz: 0102030405060708 => 0000000005060708
mfvsrwz: 090a0b0c0e0d0e0f => 000000000e0d0e0f
mfvsrwz: f1f2f3f4f5f6f7f8 => 00000000f5f6f7f8
mfvsrwz: f9fafbfcfefdfeff => 00000000fefdfeff
+mfvsrwz: 00007fffffffffff => 00000000ffffffff
+mfvsrwz: ffff000000000000 => 0000000000000000
+mfvsrwz: 0000800000000000 => 0000000000000000
+mfvsrwz: 0000000000000000 => 0000000000000000
+mfvsrwz: ffffffffffffffff => 00000000ffffffff
mtvsrd: 0102030405060708 => 0000000005060708
mtvsrd: 090a0b0c0e0d0e0f => 000000000e0d0e0f
mtvsrd: f1f2f3f4f5f6f7f8 => 00000000f5f6f7f8
mtvsrd: f9fafbfcfefdfeff => 00000000fefdfeff
+mtvsrd: 00007fffffffffff => 00000000ffffffff
+mtvsrd: ffff000000000000 => 0000000000000000
+mtvsrd: 0000800000000000 => 0000000000000000
+mtvsrd: 0000000000000000 => 0000000000000000
+mtvsrd: ffffffffffffffff => 00000000ffffffff
mtvsrwz: 05060708 => 0000000005060708
mtvsrwz: 0e0d0e0f => 000000000e0d0e0f
mtvsrwz: f5f6f7f8 => 00000000f5f6f7f8
mtvsrwz: fefdfeff => 00000000fefdfeff
+mtvsrwz: ffffffff => 00000000ffffffff
+mtvsrwz: 00000000 => 0000000000000000
+mtvsrwz: 00000000 => 0000000000000000
+mtvsrwz: 00000000 => 0000000000000000
+mtvsrwz: ffffffff => 00000000ffffffff
mtfprwa: 05060708 => 0000000005060708
mtfprwa: 0e0d0e0f => 000000000e0d0e0f
mtfprwa: f5f6f7f8 => fffffffff5f6f7f8
mtfprwa: fefdfeff => fffffffffefdfeff
+mtfprwa: ffffffff => ffffffffffffffff
+mtfprwa: 00000000 => 0000000000000000
+mtfprwa: 00000000 => 0000000000000000
+mtfprwa: 00000000 => 0000000000000000
+mtfprwa: ffffffff => ffffffffffffffff
vaddudm: 0102030405060708 @@ 0102030405060708 ==> 020406080a0c0e10
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 121416181c1a1c1e
vaddudm: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> f2f4f6f8fafcff00
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 030507090d0b0d0e
+vaddudm: 0102030405060708 @@ 00007fffffffffff ==> 0102830405060707
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 09090b0c0e0d0e0f
+vaddudm: 0102030405060708 @@ 0000800000000000 ==> 0102830405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vaddudm: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f2f4f6f8fafcff00
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 030507090d0b0d0e
vaddudm: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> e3e5e7e9ebedeff0
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> f3f5f7f9fdfbfdfe
+vaddudm: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> f1f373f4f5f6f7f7
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9f9fbfcfefdfeff
+vaddudm: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f373f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vaddudm: 00007fffffffffff @@ 0102030405060708 ==> 0102830405060707
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 09090b0c0e0d0e0f
+vaddudm: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> f1f373f4f5f6f7f7
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> f9f9fbfcfefdfeff
+vaddudm: 00007fffffffffff @@ 00007fffffffffff ==> 0000fffffffffffe
+ ffff000000000000 @@ ffff000000000000 ==> fffe000000000000
+vaddudm: 00007fffffffffff @@ 0000800000000000 ==> 0000ffffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vaddudm: 0000800000000000 @@ 0102030405060708 ==> 0102830405060708
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
+vaddudm: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> f1f373f4f5f6f7f8
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vaddudm: 0000800000000000 @@ 00007fffffffffff ==> 0000ffffffffffff
+ 0000000000000000 @@ ffff000000000000 ==> ffff000000000000
+vaddudm: 0000800000000000 @@ 0000800000000000 ==> 0001000000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vsubudm: 0102030405060708 @@ 0102030405060708 ==> 0000000000000000
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0000000000000000
vsubudm: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0f0f0f0f0f0f0f10
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0f0f0f0f0f0f0f10
+vsubudm: 0102030405060708 @@ 00007fffffffffff ==> 0101830405060709
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090b0b0c0e0d0e0f
+vsubudm: 0102030405060708 @@ 0000800000000000 ==> 0101830405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vsubudm: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f0f0f0f0f0f0f0f0
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> f0f0f0f0f0f0f0f0
vsubudm: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsubudm: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> f1f273f4f5f6f7f9
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fbfbfcfefdfeff
+vsubudm: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f273f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vsubudm: 00007fffffffffff @@ 0102030405060708 ==> fefe7cfbfaf9f8f7
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> f6f4f4f3f1f2f1f1
+vsubudm: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0e0d8c0b0a090807
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 0604040301020101
+vsubudm: 00007fffffffffff @@ 00007fffffffffff ==> 0000000000000000
+ ffff000000000000 @@ ffff000000000000 ==> 0000000000000000
+vsubudm: 00007fffffffffff @@ 0000800000000000 ==> ffffffffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vsubudm: 0000800000000000 @@ 0102030405060708 ==> fefe7cfbfaf9f8f8
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> f6f5f4f3f1f2f1f1
+vsubudm: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0e0d8c0b0a090808
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0605040301020101
+vsubudm: 0000800000000000 @@ 00007fffffffffff ==> 0000000000000001
+ 0000000000000000 @@ ffff000000000000 ==> 0001000000000000
+vsubudm: 0000800000000000 @@ 0000800000000000 ==> 0000000000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vmaxud: 0102030405060708 @@ 0102030405060708 ==> 0102030405060708
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
vmaxud: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vmaxud: 0102030405060708 @@ 00007fffffffffff ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> ffff000000000000
+vmaxud: 0102030405060708 @@ 0000800000000000 ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vmaxud: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f1f2f3f4f5f6f7f8
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> f9fafbfcfefdfeff
vmaxud: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vmaxud: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> ffff000000000000
+vmaxud: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vmaxud: 00007fffffffffff @@ 0102030405060708 ==> 0102030405060708
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> ffff000000000000
+vmaxud: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ffff000000000000
+vmaxud: 00007fffffffffff @@ 00007fffffffffff ==> 00007fffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vmaxud: 00007fffffffffff @@ 0000800000000000 ==> 0000800000000000
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vmaxud: 0000800000000000 @@ 0102030405060708 ==> 0102030405060708
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
+vmaxud: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vmaxud: 0000800000000000 @@ 00007fffffffffff ==> 0000800000000000
+ 0000000000000000 @@ ffff000000000000 ==> ffff000000000000
+vmaxud: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vmaxsd: 0102030405060708 @@ 0102030405060708 ==> 0102030405060708
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
vmaxsd: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0102030405060708
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 090a0b0c0e0d0e0f
+vmaxsd: 0102030405060708 @@ 00007fffffffffff ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090a0b0c0e0d0e0f
+vmaxsd: 0102030405060708 @@ 0000800000000000 ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vmaxsd: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 0102030405060708
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
vmaxsd: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vmaxsd: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 00007fffffffffff
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> ffff000000000000
+vmaxsd: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 0000800000000000
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 0000000000000000
+vmaxsd: 00007fffffffffff @@ 0102030405060708 ==> 0102030405060708
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
+vmaxsd: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 00007fffffffffff
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ffff000000000000
+vmaxsd: 00007fffffffffff @@ 00007fffffffffff ==> 00007fffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vmaxsd: 00007fffffffffff @@ 0000800000000000 ==> 0000800000000000
+ ffff000000000000 @@ 0000000000000000 ==> 0000000000000000
+vmaxsd: 0000800000000000 @@ 0102030405060708 ==> 0102030405060708
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
+vmaxsd: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000800000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vmaxsd: 0000800000000000 @@ 00007fffffffffff ==> 0000800000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vmaxsd: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vminud: 0102030405060708 @@ 0102030405060708 ==> 0102030405060708
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
vminud: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0102030405060708
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 090a0b0c0e0d0e0f
+vminud: 0102030405060708 @@ 00007fffffffffff ==> 00007fffffffffff
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090a0b0c0e0d0e0f
+vminud: 0102030405060708 @@ 0000800000000000 ==> 0000800000000000
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 0000000000000000
vminud: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 0102030405060708
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
vminud: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vminud: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 00007fffffffffff
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fafbfcfefdfeff
+vminud: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 0000800000000000
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 0000000000000000
+vminud: 00007fffffffffff @@ 0102030405060708 ==> 00007fffffffffff
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
+vminud: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 00007fffffffffff
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vminud: 00007fffffffffff @@ 00007fffffffffff ==> 00007fffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vminud: 00007fffffffffff @@ 0000800000000000 ==> 00007fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> 0000000000000000
+vminud: 0000800000000000 @@ 0102030405060708 ==> 0000800000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vminud: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000800000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vminud: 0000800000000000 @@ 00007fffffffffff ==> 00007fffffffffff
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vminud: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vminsd: 0102030405060708 @@ 0102030405060708 ==> 0102030405060708
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
vminsd: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vminsd: 0102030405060708 @@ 00007fffffffffff ==> 00007fffffffffff
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> ffff000000000000
+vminsd: 0102030405060708 @@ 0000800000000000 ==> 0000800000000000
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 0000000000000000
vminsd: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f1f2f3f4f5f6f7f8
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> f9fafbfcfefdfeff
vminsd: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vminsd: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fafbfcfefdfeff
+vminsd: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vminsd: 00007fffffffffff @@ 0102030405060708 ==> 00007fffffffffff
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> ffff000000000000
+vminsd: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vminsd: 00007fffffffffff @@ 00007fffffffffff ==> 00007fffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vminsd: 00007fffffffffff @@ 0000800000000000 ==> 00007fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vminsd: 0000800000000000 @@ 0102030405060708 ==> 0000800000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vminsd: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vminsd: 0000800000000000 @@ 00007fffffffffff ==> 00007fffffffffff
+ 0000000000000000 @@ ffff000000000000 ==> ffff000000000000
+vminsd: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vcmpequd: 0102030405060708 @@ 0102030405060708 ==> ffffffffffffffff
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
vcmpequd: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpequd: 0102030405060708 @@ 00007fffffffffff ==> 0000000000000000
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 0000000000000000
+vcmpequd: 0102030405060708 @@ 0000800000000000 ==> 0000000000000000
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 0000000000000000
vcmpequd: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 0000000000000000
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 0000000000000000
vcmpequd: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> ffffffffffffffff
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vcmpequd: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 0000000000000000
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 0000000000000000
+vcmpequd: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 0000000000000000
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 0000000000000000
+vcmpequd: 00007fffffffffff @@ 0102030405060708 ==> 0000000000000000
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vcmpequd: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpequd: 00007fffffffffff @@ 00007fffffffffff ==> ffffffffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffffffffffffffff
+vcmpequd: 00007fffffffffff @@ 0000800000000000 ==> 0000000000000000
+ ffff000000000000 @@ 0000000000000000 ==> 0000000000000000
+vcmpequd: 0000800000000000 @@ 0102030405060708 ==> 0000000000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vcmpequd: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpequd: 0000800000000000 @@ 00007fffffffffff ==> 0000000000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vcmpequd: 0000800000000000 @@ 0000800000000000 ==> ffffffffffffffff
+ 0000000000000000 @@ 0000000000000000 ==> ffffffffffffffff
vcmpgtud: 0102030405060708 @@ 0102030405060708 ==> 0000000000000000
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0000000000000000
vcmpgtud: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpgtud: 0102030405060708 @@ 00007fffffffffff ==> ffffffffffffffff
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 0000000000000000
+vcmpgtud: 0102030405060708 @@ 0000800000000000 ==> ffffffffffffffff
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> ffffffffffffffff
vcmpgtud: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> ffffffffffffffff
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
vcmpgtud: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpgtud: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> ffffffffffffffff
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 0000000000000000
+vcmpgtud: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> ffffffffffffffff
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> ffffffffffffffff
+vcmpgtud: 00007fffffffffff @@ 0102030405060708 ==> 0000000000000000
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
+vcmpgtud: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vcmpgtud: 00007fffffffffff @@ 00007fffffffffff ==> 0000000000000000
+ ffff000000000000 @@ ffff000000000000 ==> 0000000000000000
+vcmpgtud: 00007fffffffffff @@ 0000800000000000 ==> 0000000000000000
+ ffff000000000000 @@ 0000000000000000 ==> ffffffffffffffff
+vcmpgtud: 0000800000000000 @@ 0102030405060708 ==> 0000000000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vcmpgtud: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpgtud: 0000800000000000 @@ 00007fffffffffff ==> ffffffffffffffff
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vcmpgtud: 0000800000000000 @@ 0000800000000000 ==> 0000000000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vcmpgtsd: 0102030405060708 @@ 0102030405060708 ==> 0000000000000000
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0000000000000000
vcmpgtsd: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> ffffffffffffffff
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vcmpgtsd: 0102030405060708 @@ 00007fffffffffff ==> ffffffffffffffff
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> ffffffffffffffff
+vcmpgtsd: 0102030405060708 @@ 0000800000000000 ==> ffffffffffffffff
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> ffffffffffffffff
vcmpgtsd: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 0000000000000000
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 0000000000000000
vcmpgtsd: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpgtsd: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 0000000000000000
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 0000000000000000
+vcmpgtsd: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 0000000000000000
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 0000000000000000
+vcmpgtsd: 00007fffffffffff @@ 0102030405060708 ==> 0000000000000000
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vcmpgtsd: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> ffffffffffffffff
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vcmpgtsd: 00007fffffffffff @@ 00007fffffffffff ==> 0000000000000000
+ ffff000000000000 @@ ffff000000000000 ==> 0000000000000000
+vcmpgtsd: 00007fffffffffff @@ 0000800000000000 ==> 0000000000000000
+ ffff000000000000 @@ 0000000000000000 ==> 0000000000000000
+vcmpgtsd: 0000800000000000 @@ 0102030405060708 ==> 0000000000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vcmpgtsd: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> ffffffffffffffff
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vcmpgtsd: 0000800000000000 @@ 00007fffffffffff ==> ffffffffffffffff
+ 0000000000000000 @@ ffff000000000000 ==> ffffffffffffffff
+vcmpgtsd: 0000800000000000 @@ 0000800000000000 ==> 0000000000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vrld: 0102030405060708 @@ 0102030405060708 ==> 0203040506070801
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0586070687078485
vrld: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0801020304050607
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 8485058607068707
+vrld: 0102030405060708 @@ 00007fffffffffff ==> 0081018202830384
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090a0b0c0e0d0e0f
+vrld: 0102030405060708 @@ 0000800000000000 ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vrld: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f2f3f4f5f6f7f8f1
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 7dfe7f7eff7ffcfd
vrld: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f8f1f2f3f4f5f6f7
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> fcfd7dfe7f7eff7f
+vrld: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 78f979fa7afb7bfc
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fafbfcfefdfeff
+vrld: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vrld: 00007fffffffffff @@ 0102030405060708 ==> 007fffffffffff00
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 8000000000007fff
+vrld: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> ff00007fffffffff
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 7fff800000000000
+vrld: 00007fffffffffff @@ 00007fffffffffff ==> 80003fffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vrld: 00007fffffffffff @@ 0000800000000000 ==> 00007fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vrld: 0000800000000000 @@ 0102030405060708 ==> 0080000000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vrld: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000008000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vrld: 0000800000000000 @@ 00007fffffffffff ==> 0000400000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vrld: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vsld: 0102030405060708 @@ 0102030405060708 ==> 0203040506070800
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0586070687078000
vsld: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0800000000000000
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 8000000000000000
+vsld: 0102030405060708 @@ 00007fffffffffff ==> 0000000000000000
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090a0b0c0e0d0e0f
+vsld: 0102030405060708 @@ 0000800000000000 ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vsld: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f2f3f4f5f6f7f800
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 7dfe7f7eff7f8000
vsld: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f800000000000000
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 8000000000000000
+vsld: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 0000000000000000
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fafbfcfefdfeff
+vsld: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vsld: 00007fffffffffff @@ 0102030405060708 ==> 007fffffffffff00
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 8000000000000000
+vsld: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> ff00000000000000
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsld: 00007fffffffffff @@ 00007fffffffffff ==> 8000000000000000
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vsld: 00007fffffffffff @@ 0000800000000000 ==> 00007fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vsld: 0000800000000000 @@ 0102030405060708 ==> 0080000000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vsld: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsld: 0000800000000000 @@ 00007fffffffffff ==> 0000000000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vsld: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vsrad: 0102030405060708 @@ 0102030405060708 ==> 0001020304050607
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0000121416181c1a
vsrad: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000001
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsrad: 0102030405060708 @@ 00007fffffffffff ==> 0000000000000000
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090a0b0c0e0d0e0f
+vsrad: 0102030405060708 @@ 0000800000000000 ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vsrad: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> fff1f2f3f4f5f6f7
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> fffff3f5f7f9fdfb
vsrad: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> fffffffffffffff1
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vsrad: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> ffffffffffffffff
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fafbfcfefdfeff
+vsrad: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vsrad: 00007fffffffffff @@ 0102030405060708 ==> 0000007fffffffff
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> fffffffe00000000
+vsrad: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vsrad: 00007fffffffffff @@ 00007fffffffffff ==> 0000000000000000
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vsrad: 00007fffffffffff @@ 0000800000000000 ==> 00007fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vsrad: 0000800000000000 @@ 0102030405060708 ==> 0000008000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vsrad: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsrad: 0000800000000000 @@ 00007fffffffffff ==> 0000000000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vsrad: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vsrd: 0102030405060708 @@ 0102030405060708 ==> 0001020304050607
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0000121416181c1a
vsrd: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000001
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsrd: 0102030405060708 @@ 00007fffffffffff ==> 0000000000000000
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090a0b0c0e0d0e0f
+vsrd: 0102030405060708 @@ 0000800000000000 ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vsrd: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 00f1f2f3f4f5f6f7
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 0001f3f5f7f9fdfb
vsrd: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 00000000000000f1
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0000000000000001
+vsrd: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 0000000000000001
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fafbfcfefdfeff
+vsrd: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vsrd: 00007fffffffffff @@ 0102030405060708 ==> 0000007fffffffff
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 0001fffe00000000
+vsrd: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000001
+vsrd: 00007fffffffffff @@ 00007fffffffffff ==> 0000000000000000
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vsrd: 00007fffffffffff @@ 0000800000000000 ==> 00007fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vsrd: 0000800000000000 @@ 0102030405060708 ==> 0000008000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vsrd: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsrd: 0000800000000000 @@ 00007fffffffffff ==> 0000000000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vsrd: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vpkudum: Inputs: 05060708 0e0d0e0f 05060708 0e0d0e0f
Output: 05060708 0e0d0e0f 05060708 0e0d0e0f
vpkudum: Inputs: 05060708 0e0d0e0f f5f6f7f8 fefdfeff
Output: 05060708 0e0d0e0f f5f6f7f8 fefdfeff
+vpkudum: Inputs: 05060708 0e0d0e0f ffffffff 00000000
+ Output: 05060708 0e0d0e0f ffffffff 00000000
+vpkudum: Inputs: 05060708 0e0d0e0f 00000000 00000000
+ Output: 05060708 0e0d0e0f 00000000 00000000
vpkudum: Inputs: f5f6f7f8 fefdfeff 05060708 0e0d0e0f
Output: f5f6f7f8 fefdfeff 05060708 0e0d0e0f
vpkudum: Inputs: f5f6f7f8 fefdfeff f5f6f7f8 fefdfeff
Output: f5f6f7f8 fefdfeff f5f6f7f8 fefdfeff
+vpkudum: Inputs: f5f6f7f8 fefdfeff ffffffff 00000000
+ Output: f5f6f7f8 fefdfeff ffffffff 00000000
+vpkudum: Inputs: f5f6f7f8 fefdfeff 00000000 00000000
+ Output: f5f6f7f8 fefdfeff 00000000 00000000
+vpkudum: Inputs: ffffffff 00000000 05060708 0e0d0e0f
+ Output: ffffffff 00000000 05060708 0e0d0e0f
+vpkudum: Inputs: ffffffff 00000000 f5f6f7f8 fefdfeff
+ Output: ffffffff 00000000 f5f6f7f8 fefdfeff
+vpkudum: Inputs: ffffffff 00000000 ffffffff 00000000
+ Output: ffffffff 00000000 ffffffff 00000000
+vpkudum: Inputs: ffffffff 00000000 00000000 00000000
+ Output: ffffffff 00000000 00000000 00000000
+vpkudum: Inputs: 00000000 00000000 05060708 0e0d0e0f
+ Output: 00000000 00000000 05060708 0e0d0e0f
+vpkudum: Inputs: 00000000 00000000 f5f6f7f8 fefdfeff
+ Output: 00000000 00000000 f5f6f7f8 fefdfeff
+vpkudum: Inputs: 00000000 00000000 ffffffff 00000000
+ Output: 00000000 00000000 ffffffff 00000000
+vpkudum: Inputs: 00000000 00000000 00000000 00000000
+ Output: 00000000 00000000 00000000 00000000
vpmsumd: 0102030405060708 @@ 0102030405060708 ==> 0040004000400040
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0045004500410015
vpmsumd: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 07c007c006d00735
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> a260a260a374a2c5
+vpmsumd: 0102030405060708 @@ 00007fffffffffff ==> 07060182fc7efe7f
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 0478fefc030202f8
+vpmsumd: 0102030405060708 @@ 0000800000000000 ==> 0000008101820283
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 0384000000000000
vpmsumd: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 07c007c006d00735
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> a260a260a374a2c5
vpmsumd: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 0040004000400040
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0045004500410015
+vpmsumd: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 575629aad456d657
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 2c50aeac535252a8
+vpmsumd: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 000078f979fa7afb
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 7bfc000000000000
+vpmsumd: 00007fffffffffff @@ 0102030405060708 ==> 07060182fc7efe7f
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 0478fefc030202f8
+vpmsumd: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 575629aad456d657
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 2c50aeac535252a8
+vpmsumd: 00007fffffffffff @@ 00007fffffffffff ==> 5555555515555555
+ ffff000000000000 @@ ffff000000000000 ==> 5555555555555555
+vpmsumd: 00007fffffffffff @@ 0000800000000000 ==> 000000003fffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff800000000000
+vpmsumd: 0000800000000000 @@ 0102030405060708 ==> 0000008101820283
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0384000000000000
+vpmsumd: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 000078f979fa7afb
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 7bfc000000000000
+vpmsumd: 0000800000000000 @@ 00007fffffffffff ==> 000000003fffffff
+ 0000000000000000 @@ ffff000000000000 ==> ffff800000000000
+vpmsumd: 0000800000000000 @@ 0000800000000000 ==> 0000000040000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vnand: 0102030405060708 @@ 0102030405060708 ==> fefdfcfbfaf9f8f7
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> f6f5f4f3f1f2f1f0
vnand: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> fefdfcfbfaf9f8f7
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> f6f5f4f3f1f2f1f0
+vnand: 0102030405060708 @@ 00007fffffffffff ==> fffffcfbfaf9f8f7
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> f6f5ffffffffffff
+vnand: 0102030405060708 @@ 0000800000000000 ==> ffffffffffffffff
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> ffffffffffffffff
vnand: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> fefdfcfbfaf9f8f7
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> f6f5f4f3f1f2f1f0
vnand: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 0e0d0c0b0a090807
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0605040301020100
+vnand: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> ffff8c0b0a090807
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 0605ffffffffffff
+vnand: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> ffff7fffffffffff
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> ffffffffffffffff
+vnand: 00007fffffffffff @@ 0102030405060708 ==> fffffcfbfaf9f8f7
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> f6f5ffffffffffff
+vnand: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> ffff8c0b0a090807
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 0605ffffffffffff
+vnand: 00007fffffffffff @@ 00007fffffffffff ==> ffff800000000000
+ ffff000000000000 @@ ffff000000000000 ==> 0000ffffffffffff
+vnand: 00007fffffffffff @@ 0000800000000000 ==> ffffffffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffffffffffffffff
+vnand: 0000800000000000 @@ 0102030405060708 ==> ffffffffffffffff
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
+vnand: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> ffff7fffffffffff
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vnand: 0000800000000000 @@ 00007fffffffffff ==> ffffffffffffffff
+ 0000000000000000 @@ ffff000000000000 ==> ffffffffffffffff
+vnand: 0000800000000000 @@ 0000800000000000 ==> ffff7fffffffffff
+ 0000000000000000 @@ 0000000000000000 ==> ffffffffffffffff
vorc: 0102030405060708 @@ 0102030405060708 ==> ffffffffffffffff
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
vorc: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0f0f0f0f0f0f0f0f
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0f0f0f0f0f0f0f0f
+vorc: 0102030405060708 @@ 00007fffffffffff ==> ffff830405060708
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090affffffffffff
+vorc: 0102030405060708 @@ 0000800000000000 ==> ffff7fffffffffff
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> ffffffffffffffff
vorc: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> ffffffffffffffff
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
vorc: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> ffffffffffffffff
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vorc: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> fffff3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9faffffffffffff
+vorc: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> ffffffffffffffff
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> ffffffffffffffff
+vorc: 00007fffffffffff @@ 0102030405060708 ==> fefdffffffffffff
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> fffff4f3f1f2f1f0
+vorc: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0e0d7fffffffffff
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ffff040301020100
+vorc: 00007fffffffffff @@ 00007fffffffffff ==> ffffffffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffffffffffffffff
+vorc: 00007fffffffffff @@ 0000800000000000 ==> ffff7fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffffffffffffffff
+vorc: 0000800000000000 @@ 0102030405060708 ==> fefdfcfbfaf9f8f7
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> f6f5f4f3f1f2f1f0
+vorc: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0e0d8c0b0a090807
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0605040301020100
+vorc: 0000800000000000 @@ 00007fffffffffff ==> ffff800000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000ffffffffffff
+vorc: 0000800000000000 @@ 0000800000000000 ==> ffffffffffffffff
+ 0000000000000000 @@ 0000000000000000 ==> ffffffffffffffff
veqv: 0102030405060708 @@ 0102030405060708 ==> ffffffffffffffff
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
veqv: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0f0f0f0f0f0f0f0f
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0f0f0f0f0f0f0f0f
+veqv: 0102030405060708 @@ 00007fffffffffff ==> fefd830405060708
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090af4f3f1f2f1f0
+veqv: 0102030405060708 @@ 0000800000000000 ==> fefd7cfbfaf9f8f7
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> f6f5f4f3f1f2f1f0
veqv: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 0f0f0f0f0f0f0f0f
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 0f0f0f0f0f0f0f0f
veqv: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> ffffffffffffffff
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+veqv: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 0e0d73f4f5f6f7f8
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fa040301020100
+veqv: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 0e0d8c0b0a090807
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 0605040301020100
+veqv: 00007fffffffffff @@ 0102030405060708 ==> fefd830405060708
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 090af4f3f1f2f1f0
+veqv: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0e0d73f4f5f6f7f8
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> f9fa040301020100
+veqv: 00007fffffffffff @@ 00007fffffffffff ==> ffffffffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffffffffffffffff
+veqv: 00007fffffffffff @@ 0000800000000000 ==> ffff000000000000
+ ffff000000000000 @@ 0000000000000000 ==> 0000ffffffffffff
+veqv: 0000800000000000 @@ 0102030405060708 ==> fefd7cfbfaf9f8f7
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> f6f5f4f3f1f2f1f0
+veqv: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0e0d8c0b0a090807
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0605040301020100
+veqv: 0000800000000000 @@ 00007fffffffffff ==> ffff000000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000ffffffffffff
+veqv: 0000800000000000 @@ 0000800000000000 ==> ffffffffffffffff
+ 0000000000000000 @@ 0000000000000000 ==> ffffffffffffffff
vcipher: 0102030405060708 @@ 0102030405060708 ==> 15abdc2823b74b86
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 22037bc3e1e25abc
vcipher: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> e55b2cd8d347bb76
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> d2f38b331112aa4c
+vcipher: 0102030405060708 @@ 00007fffffffffff ==> 14a9a0d3d94eb371
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> d4f670cfefef54b3
+vcipher: 0102030405060708 @@ 0000800000000000 ==> 14a95f2c26b14c8e
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 2b0970cfefef54b3
vcipher: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 8720c49da1d37bca
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 906d1f673bb72743
vcipher: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 77d0346d51238b3a
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 609def97cb47d7b3
+vcipher: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 8622b8665b2a833d
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 6698146b35ba294c
+vcipher: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 86224799a4d57cc2
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 9967146b35ba294c
+vcipher: 00007fffffffffff @@ 0102030405060708 ==> fd8b1512668ffb6b
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 44a1fbab18f18719
+vcipher: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0d7be5e2967f0b9b
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> b4510b5be80177e9
+vcipher: 00007fffffffffff @@ 00007fffffffffff ==> fc8969e99c76039c
+ ffff000000000000 @@ ffff000000000000 ==> b254f0a716fc8916
+vcipher: 00007fffffffffff @@ 0000800000000000 ==> fc8996166389fc63
+ ffff000000000000 @@ 0000000000000000 ==> 4dabf0a716fc8916
+vcipher: 0000800000000000 @@ 0102030405060708 ==> 626160676665646b
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> c4802fc16d6e6d6c
+vcipher: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 929190979695949b
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 3470df319d9e9d9c
+vcipher: 0000800000000000 @@ 00007fffffffffff ==> 63631c9c9c9c9c9c
+ 0000000000000000 @@ ffff000000000000 ==> 327524cd63636363
+vcipher: 0000800000000000 @@ 0000800000000000 ==> 6363e36363636363
+ 0000000000000000 @@ 0000000000000000 ==> cd8a24cd63636363
vcipherlast: 0102030405060708 @@ 0102030405060708 ==> 7d6d28726e61acfa
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 08dd703ca57acbf1
vcipherlast: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 8d9dd8829e915c0a
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> f82d80cc558a3b01
+vcipherlast: 0102030405060708 @@ 00007fffffffffff ==> 7c6f54899498540d
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> fe287b30ab77c5fe
+vcipherlast: 0102030405060708 @@ 0000800000000000 ==> 7c6fab766b67abf2
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 01d77b30ab77c5fe
vcipherlast: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> a0400c12e32bbcb7
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 905e064db58466bf
vcipherlast: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 50b0fce213db4c47
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 60aef6bd4574964f
+vcipherlast: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> a14270e919d24440
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 66ab0d41bb8968b0
+vcipherlast: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> a1428f16e62dbbbf
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 99540d41bb8968b0
+vcipherlast: 00007fffffffffff @@ 0102030405060708 ==> 621460671310641e
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 1f69d91a6d6e186c
+vcipherlast: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 92e49097e3e094ee
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ef9929ea9d9ee89c
+vcipherlast: 00007fffffffffff @@ 00007fffffffffff ==> 63161c9ce9e99ce9
+ ffff000000000000 @@ ffff000000000000 ==> e99cd21663631663
+vcipherlast: 00007fffffffffff @@ 0000800000000000 ==> 6316e36316166316
+ ffff000000000000 @@ 0000000000000000 ==> 1663d21663631663
+vcipherlast: 0000800000000000 @@ 0102030405060708 ==> 626160676665646b
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 6a69c66f6d6e6d6c
+vcipherlast: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 929190979695949b
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 9a99369f9d9e9d9c
+vcipherlast: 0000800000000000 @@ 00007fffffffffff ==> 63631c9c9c9c9c9c
+ 0000000000000000 @@ ffff000000000000 ==> 9c9ccd6363636363
+vcipherlast: 0000800000000000 @@ 0000800000000000 ==> 6363e36363636363
+ 0000000000000000 @@ 0000000000000000 ==> 6363cd6363636363
vncipher: 0102030405060708 @@ 0102030405060708 ==> fe67ce881a80f569
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 19db0b0605541639
vncipher: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0e973e78ea700599
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> e92bfbf6f5a4e6c9
+vncipher: 0102030405060708 @@ 00007fffffffffff ==> de98809d822f77d0
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 1424f3081f45082e
+vncipher: 0102030405060708 @@ 0000800000000000 ==> 0facae567dd0882f
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 3aef223c1f45082e
vncipher: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 8b10c2d5607a5569
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 581826de46277b9c
vncipher: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 7be03225908aa599
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> a8e8d62eb6d78b6c
+vncipher: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> abef8cc0f8d5d7d0
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 55e7ded05c36658b
+vncipher: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 7adba20b072a282f
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 7b2c0fe45c36658b
+vncipher: 00007fffffffffff @@ 0102030405060708 ==> 359e61e1b44edf06
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> ec338260e6209378
+vncipher: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> c56e911144be2ff6
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 1cc3729016d06388
+vncipher: 00007fffffffffff @@ 00007fffffffffff ==> 15612ff42ce15dbf
+ ffff000000000000 @@ ffff000000000000 ==> e1cc7a6efc318d6f
+vncipher: 00007fffffffffff @@ 0000800000000000 ==> c455013fd31ea240
+ ffff000000000000 @@ 0000000000000000 ==> cf07ab5afc318d6f
+vncipher: 0000800000000000 @@ 0102030405060708 ==> 796e736035022f14
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> cfb37d6d48434c45
+vncipher: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 899e8390c5f2dfe4
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 3f438d9db8b3bcb5
+vncipher: 0000800000000000 @@ 00007fffffffffff ==> 59913d75adadadad
+ 0000000000000000 @@ ffff000000000000 ==> c24c856352525252
+vncipher: 0000800000000000 @@ 0000800000000000 ==> 88a513be52525252
+ 0000000000000000 @@ 0000000000000000 ==> ec87545752525252
vncipherlast: 0102030405060708 @@ 0102030405060708 ==> 08f19dbb336cd089
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 49afdef7d9ae363f
vncipherlast: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> f8016d4bc39c2079
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> b95f2e07295ec6cf
+vncipherlast: 0102030405060708 @@ 00007fffffffffff ==> 09f3e140c995287e
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> bf5ad5fbd7a33830
+vncipherlast: 0102030405060708 @@ 0000800000000000 ==> 09f31ebf366ad781
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 40a5d5fbd7a33830
vncipherlast: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 2a2360e572020b5d
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 60dc7571021928b5
vncipherlast: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> dad3901582f2fbad
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 902c8581f2e9d845
+vncipherlast: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 2b211c1e88fbf3aa
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 96297e7d0c1426ba
+vncipherlast: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 2b21e3e177040c55
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 69d67e7d0c1426ba
+vncipherlast: 00007fffffffffff @@ 0102030405060708 ==> 535051797854555a
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 7477605e5c707372
+vncipherlast: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> a3a0a18988a4a5aa
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 848790aeac808382
+vncipherlast: 00007fffffffffff @@ 00007fffffffffff ==> 52522d8282adadad
+ ffff000000000000 @@ ffff000000000000 ==> 82826b52527d7d7d
+vncipherlast: 00007fffffffffff @@ 0000800000000000 ==> 5252d27d7d525252
+ ffff000000000000 @@ 0000000000000000 ==> 7d7d6b52527d7d7d
+vncipherlast: 0000800000000000 @@ 0102030405060708 ==> 535051565754555a
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 5b58315e5c5f5c5d
+vncipherlast: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> a3a0a1a6a7a4a5aa
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> aba8c1aeacafacad
+vncipherlast: 0000800000000000 @@ 00007fffffffffff ==> 52522dadadadadad
+ 0000000000000000 @@ ffff000000000000 ==> adad3a5252525252
+vncipherlast: 0000800000000000 @@ 0000800000000000 ==> 5252d25252525252
+ 0000000000000000 @@ 0000000000000000 ==> 52523a5252525252
vmulouw: 01020304 05060708 090a0b0c 0e0d0e0f ==> 00193c6aa4917040 00c56e34124ba4e1
vmulouw: 01020304 05060708 090a0b0c 0e0d0e0f ==> 04d39d63184f87c0 0dfee4d8b9c6e2f1
@@ -300,6 +853,14 @@
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> fbfafdfffffcfffe
vpermxor: 0102030405060708 @@ f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> fdfcfbfaf9f8f7f6
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> f5f4f3f1f1f2f1f0
+vpermxor: 0102030405060708 @@ 00007fffffffffff @@ 0102030405060708 ==> 017efefefefefefe
+ 090a0b0c0e0d0e0f @@ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> fe01010101010101
+vpermxor: 0102030405060708 @@ 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0f70f0f0f0f0f0f0
+ 090a0b0c0e0d0e0f @@ ffff000000000000 @@ f9fafbfcfefdfeff ==> f00f0f0f0f0f0f0f
+vpermxor: 0102030405060708 @@ 0000800000000000 @@ 0102030405060708 ==> 0181010101010101
+ 090a0b0c0e0d0e0f @@ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0101010101010101
+vpermxor: 0102030405060708 @@ 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0f8f0f0f0f0f0f0f
+ 090a0b0c0e0d0e0f @@ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0f0f0f0f0f0f0f0f
vpermxor: f1f2f3f4f5f6f7f8 @@ 0102030405060708 @@ 0102030405060708 ==> f3f2f5f4f7f6f9f8
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> fbfafdfffffcfffe
vpermxor: f1f2f3f4f5f6f7f8 @@ 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> fdfcfbfaf9f8f7f6
@@ -308,36 +869,96 @@
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 0b0a0d0f0f0c0f0e
vpermxor: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 0d0c0b0a09080706
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0504030101020100
+vpermxor: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff @@ 0102030405060708 ==> f18e0e0e0e0e0e0e
+ f9fafbfcfefdfeff @@ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 0ef1f1f1f1f1f1f1
+vpermxor: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> ff80000000000000
+ f9fafbfcfefdfeff @@ ffff000000000000 @@ f9fafbfcfefdfeff ==> 00ffffffffffffff
+vpermxor: f1f2f3f4f5f6f7f8 @@ 0000800000000000 @@ 0102030405060708 ==> f171f1f1f1f1f1f1
+ f9fafbfcfefdfeff @@ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> f1f1f1f1f1f1f1f1
+vpermxor: f1f2f3f4f5f6f7f8 @@ 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> ff7fffffffffffff
+ f9fafbfcfefdfeff @@ 0000000000000000 @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vpermxor: 00007fffffffffff @@ 0102030405060708 @@ 0102030405060708 ==> 0203040506070809
+ ffff000000000000 @@ 090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0a0b0c0e0e0d0e0f
+vpermxor: 00007fffffffffff @@ 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0203040506070809
+ ffff000000000000 @@ 090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0a0b0c0e0e0d0e0f
+vpermxor: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f2f3f4f5f6f7f8f9
+ ffff000000000000 @@ f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> fafbfcfefefdfeff
+vpermxor: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f2f3f4f5f6f7f8f9
+ ffff000000000000 @@ f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> fafbfcfefefdfeff
+vpermxor: 00007fffffffffff @@ 00007fffffffffff @@ 0102030405060708 ==> 007fffffffffffff
+ ffff000000000000 @@ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> ff00000000000000
+vpermxor: 00007fffffffffff @@ 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 007fffffffffffff
+ ffff000000000000 @@ ffff000000000000 @@ f9fafbfcfefdfeff ==> ff00000000000000
+vpermxor: 00007fffffffffff @@ 0000800000000000 @@ 0102030405060708 ==> 0080000000000000
+ ffff000000000000 @@ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vpermxor: 00007fffffffffff @@ 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0080000000000000
+ ffff000000000000 @@ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vpermxor: 0000800000000000 @@ 0102030405060708 @@ 0102030405060708 ==> 0203040506070809
+ 0000000000000000 @@ 090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0a0b0c0e0e0d0e0f
+vpermxor: 0000800000000000 @@ 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0203040506070809
+ 0000000000000000 @@ 090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0a0b0c0e0e0d0e0f
+vpermxor: 0000800000000000 @@ f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f2f3f4f5f6f7f8f9
+ 0000000000000000 @@ f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> fafbfcfefefdfeff
+vpermxor: 0000800000000000 @@ f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f2f3f4f5f6f7f8f9
+ 0000000000000000 @@ f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> fafbfcfefefdfeff
+vpermxor: 0000800000000000 @@ 00007fffffffffff @@ 0102030405060708 ==> 007fffffffffffff
+ 0000000000000000 @@ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> ff00000000000000
+vpermxor: 0000800000000000 @@ 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 007fffffffffffff
+ 0000000000000000 @@ ffff000000000000 @@ f9fafbfcfefdfeff ==> ff00000000000000
+vpermxor: 0000800000000000 @@ 0000800000000000 @@ 0102030405060708 ==> 0080000000000000
+ 0000000000000000 @@ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vpermxor: 0000800000000000 @@ 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0080000000000000
+ 0000000000000000 @@ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
vclzb: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 07060605050505040404040404040404
vclzb: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 00000000000000000000000000000000
+vclzb: 00007fffffffffff @@ ffff000000000000 ==> 08080100000000000000080808080808
+vclzb: 0000800000000000 @@ 0000000000000000 ==> 08080008080808080808080808080808
vclzw: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 00000007000000050000000400000004
vclzw: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 00000000000000000000000000000000
+vclzw: 00007fffffffffff @@ ffff000000000000 ==> 00000011000000000000000000000020
+vclzw: 0000800000000000 @@ 0000000000000000 ==> 00000010000000200000002000000020
vclzh: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 00070006000500050004000400040004
vclzh: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 00000000000000000000000000000000
+vclzh: 00007fffffffffff @@ ffff000000000000 ==> 00100001000000000000001000100010
+vclzh: 0000800000000000 @@ 0000000000000000 ==> 00100000001000100010001000100010
vclzd: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 00000000000000070000000000000004
vclzd: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 00000000000000000000000000000000
+vclzd: 00007fffffffffff @@ ffff000000000000 ==> 00000000000000110000000000000000
+vclzd: 0000800000000000 @@ 0000000000000000 ==> 00000000000000100000000000000040
vpopcntb: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 01010201020203010202030203030304
vpopcntb: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 05050605060607050606070607070708
+vpopcntb: 00007fffffffffff @@ ffff000000000000 ==> 00000708080808080808000000000000
+vpopcntb: 0000800000000000 @@ 0000000000000000 ==> 00000100000000000000000000000000
vpopcnth: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 00020003000400040004000500060007
vpopcnth: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 000a000b000c000c000c000d000e000f
+vpopcnth: 00007fffffffffff @@ ffff000000000000 ==> 0000000f001000100010000000000000
+vpopcnth: 0000800000000000 @@ 0000000000000000 ==> 00000001000000000000000000000000
vpopcntw: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 0000000500000008000000090000000d
vpopcntw: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 0000001500000018000000190000001d
+vpopcntw: 00007fffffffffff @@ ffff000000000000 ==> 0000000f000000200000001000000000
+vpopcntw: 0000800000000000 @@ 0000000000000000 ==> 00000001000000000000000000000000
vpopcntd: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 000000000000000d0000000000000016
vpopcntd: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 000000000000002d0000000000000036
+vpopcntd: 00007fffffffffff @@ ffff000000000000 ==> 000000000000002f0000000000000010
+vpopcntd: 0000800000000000 @@ 0000000000000000 ==> 00000000000000010000000000000000
vsbox: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 7c777bf26b6fc53001672bfeabd7ab76
vsbox: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> a1890dbfe6426841992d0fb0bb54bb16
+vsbox: 00007fffffffffff @@ ffff000000000000 ==> 6363d216161616161616636363636363
+vsbox: 0000800000000000 @@ 0000000000000000 ==> 6363cd63636363636363636363636363
vgbbd: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 00000000011e66aa00000000ff1f6ba5
vgbbd: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> ffffffff011e66aaffffffffff1f6ba5
+vgbbd: 00007fffffffffff @@ ffff000000000000 ==> 1f3f3f3f3f3f3f3fc0c0c0c0c0c0c0c0
+vgbbd: 0000800000000000 @@ 0000000000000000 ==> 20000000000000000000000000000000
vshasigmad: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 088207870e8c098d || 8b9e1b9b13149015
vshasigmad: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> c8f5100c7844a0fc || e9b5916d0131c581
@@ -347,6 +968,14 @@
vshasigmad: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 52af4a56221efaa6 || 73efcb375b6b9fdb
vshasigmad: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 8bf92f9ed2b06655 || 299d6bbd9e22f4c7
vshasigmad: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 986700cc8f5613df || 7a3f676a2ef03935
+vshasigmad: 00007fffffffffff @@ ffff000000000000 ==> 7f003f7fffffffff || 7eff810000000000
+vshasigmad: 00007fffffffffff @@ ffff000000000000 ==> fffc1e000ffffff8 || fc07e3ffe0000007
+vshasigmad: 00007fffffffffff @@ ffff000000000000 ==> fffffff03e07e0ff || 0000000fc1f03e00
+vshasigmad: 00007fffffffffff @@ ffff000000000000 ==> fffc3ffe1f80003f || 0003c003c07fff80
+vshasigmad: 0000800000000000 @@ 0000000000000000 ==> 0000418000000000 || 0000000000000000
+vshasigmad: 0000800000000000 @@ 0000000000000000 ==> 0004020010000000 || 0000000000000000
+vshasigmad: 0000800000000000 @@ 0000000000000000 ==> 0000000000082100 || 0000000000000000
+vshasigmad: 0000800000000000 @@ 0000000000000000 ==> 0000000220000040 || 0000000000000000
vshasigmaw: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 88e344269168cdae || 9bf057355c5e785e
vshasigmaw: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 41e2c021c36443a2 || 44e5c72626c5e584
@@ -356,6 +985,14 @@
vshasigmaw: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 27b89a7ba53e19f8 || 22bf9d7c409fbfde
vshasigmaw: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 6814e0ad5965f19e || 0a7682cfffbb77ab
vshasigmaw: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 54200fe9e7b2997b || 71052acc5efb57bb
+vshasigmaw: 00007fffffffffff @@ ffff000000000000 ==> e1ffcf001fffffff || de0021ff00000000
+vshasigmaw: 00007fffffffffff @@ ffff000000000000 ==> 3000601f003fffff || 603f9fc000000000
+vshasigmaw: 00007fffffffffff @@ ffff000000000000 ==> 3e07e3fcffffffff || c3f83c0700000000
+vshasigmaw: 00007fffffffffff @@ ffff000000000000 ==> 03dffe70ffffffff || fc60039f00000000
+vshasigmaw: 0000800000000000 @@ 0000000000000000 ==> 2000110000000000 || 0000000000000000
+vshasigmaw: 0000800000000000 @@ 0000000000000000 ==> 5000002000000000 || 0000000000000000
+vshasigmaw: 0000800000000000 @@ 0000000000000000 ==> 0200200400000000 || 0000000000000000
+vshasigmaw: 0000800000000000 @@ 0000000000000000 ==> 0040021000000000 || 0000000000000000
bcdadd.: 8045090189321003 || 001122334556677d @@ 8045090189321003 || 001122334556677d ==> 6090...
[truncated message content] |
|
From: <sv...@va...> - 2016-10-20 05:27:13
|
Author: sewardj
Date: Thu Oct 20 06:26:41 2016
New Revision: 3277
Log:
Merge from trunk:
3271 Fix PPC BE in 32-bit mode (Iop_CmpXX64 not supported in 32-bit mode)
Modified:
branches/VEX_3_12_BRANCH/ (props changed)
branches/VEX_3_12_BRANCH/priv/guest_ppc_toIR.c
branches/VEX_3_12_BRANCH/priv/host_ppc_isel.c
Modified: branches/VEX_3_12_BRANCH/priv/guest_ppc_toIR.c
==============================================================================
--- branches/VEX_3_12_BRANCH/priv/guest_ppc_toIR.c (original)
+++ branches/VEX_3_12_BRANCH/priv/guest_ppc_toIR.c Thu Oct 20 06:26:41 2016
@@ -4354,14 +4354,39 @@
IRTemp tsrc = newTemp( Ity_V128 );
assign( tsrc, src);
- return mkAND1( binop( Iop_CmpEQ64,
- mkU64( 0 ),
- unop( Iop_V128HIto64,
- mkexpr( tsrc ) ) ),
- binop( Iop_CmpEQ64,
- mkU64( 0 ),
- unop( Iop_V128to64,
- mkexpr( tsrc ) ) ) );
+ if ( mode64 ) {
+ return mkAND1( binop( Iop_CmpEQ64,
+ mkU64( 0 ),
+ unop( Iop_V128HIto64,
+ mkexpr( tsrc ) ) ),
+ binop( Iop_CmpEQ64,
+ mkU64( 0 ),
+ unop( Iop_V128to64,
+ mkexpr( tsrc ) ) ) );
+ } else {
+ /* make this work in 32-bit mode */
+ return mkAND1(
+ mkAND1( binop( Iop_CmpEQ32,
+ mkU32( 0 ),
+ unop( Iop_64HIto32,
+ unop( Iop_V128HIto64,
+ mkexpr( tsrc ) ) ) ),
+ binop( Iop_CmpEQ32,
+ mkU32( 0 ),
+ unop( Iop_64to32,
+ unop( Iop_V128HIto64,
+ mkexpr( tsrc ) ) ) ) ),
+ mkAND1( binop( Iop_CmpEQ32,
+ mkU32( 0 ),
+ unop( Iop_64HIto32,
+ unop( Iop_V128to64,
+ mkexpr( tsrc ) ) ) ),
+ binop( Iop_CmpEQ32,
+ mkU32( 0 ),
+ unop( Iop_64to32,
+ unop( Iop_V128to64,
+ mkexpr( tsrc ) ) ) ) ) );
+ }
}
static IRExpr * check_BCD_round (IRExpr *src, IRTemp shift)
@@ -4594,6 +4619,64 @@
return mkexpr( result );
}
+static IRExpr * UNSIGNED_CMP_GT_V128 ( IRExpr *vA, IRExpr *vB ) {
+ /* This function does an unsigned compare of two V128 values. The
+ * function is for use in 32-bit mode only as it is expensive. The
+ * issue is that compares (GT, LT, EQ) are not supported for operands
+ * larger then 32-bits when running in 32-bit mode. The function returns
+ * a 1-bit expression, 1 for TRUE and 0 for FALSE.
+ */
+ IRTemp vA_word0 = newTemp( Ity_I32);
+ IRTemp vA_word1 = newTemp( Ity_I32);
+ IRTemp vA_word2 = newTemp( Ity_I32);
+ IRTemp vA_word3 = newTemp( Ity_I32);
+ IRTemp vB_word0 = newTemp( Ity_I32);
+ IRTemp vB_word1 = newTemp( Ity_I32);
+ IRTemp vB_word2 = newTemp( Ity_I32);
+ IRTemp vB_word3 = newTemp( Ity_I32);
+
+ IRTemp eq_word1 = newTemp( Ity_I1);
+ IRTemp eq_word2 = newTemp( Ity_I1);
+ IRTemp eq_word3 = newTemp( Ity_I1);
+
+
+ IRExpr *gt_word0, *gt_word1, *gt_word2, *gt_word3;
+ IRExpr *eq_word3_2, *eq_word3_2_1;
+ IRTemp result = newTemp( Ity_I1 );
+
+ assign( vA_word0, unop( Iop_64to32, unop( Iop_V128to64, vA ) ) );
+ assign( vA_word1, unop( Iop_64HIto32, unop( Iop_V128to64, vA ) ) );
+ assign( vA_word2, unop( Iop_64to32, unop( Iop_V128HIto64, vA ) ) );
+ assign( vA_word3, unop( Iop_64HIto32, unop( Iop_V128HIto64, vA ) ) );
+
+ assign( vB_word0, unop( Iop_64to32, unop( Iop_V128to64, vB ) ) );
+ assign( vB_word1, unop( Iop_64HIto32, unop( Iop_V128to64, vB ) ) );
+ assign( vB_word2, unop( Iop_64to32, unop( Iop_V128HIto64, vB ) ) );
+ assign( vB_word3, unop( Iop_64HIto32, unop( Iop_V128HIto64, vB ) ) );
+
+ assign( eq_word3, binop( Iop_CmpEQ32, mkexpr( vA_word3 ),
+ mkexpr( vB_word3 ) ) );
+ assign( eq_word2, binop( Iop_CmpEQ32, mkexpr( vA_word2 ),
+ mkexpr( vB_word2 ) ) );
+ assign( eq_word1, binop( Iop_CmpEQ32, mkexpr( vA_word1 ),
+ mkexpr( vB_word1 ) ) );
+
+ gt_word3 = binop( Iop_CmpLT32U, mkexpr( vB_word3 ), mkexpr( vA_word3 ) );
+ gt_word2 = binop( Iop_CmpLT32U, mkexpr( vB_word2 ), mkexpr( vA_word2 ) );
+ gt_word1 = binop( Iop_CmpLT32U, mkexpr( vB_word1 ), mkexpr( vA_word1 ) );
+ gt_word0 = binop( Iop_CmpLT32U, mkexpr( vB_word0 ), mkexpr( vA_word0 ) );
+
+ eq_word3_2 = mkAND1( mkexpr( eq_word3 ), mkexpr( eq_word2 ) );
+ eq_word3_2_1 = mkAND1( mkexpr( eq_word1 ), eq_word3_2 );
+
+ assign( result, mkOR1(
+ mkOR1( gt_word3,
+ mkAND1( mkexpr( eq_word3 ), gt_word2 ) ),
+ mkOR1( mkAND1( eq_word3_2, gt_word1 ),
+ mkAND1( eq_word3_2_1, gt_word0 ) ) ) );
+ return mkexpr( result );
+}
+
/*------------------------------------------------------------*/
/* Transactional memory helpers
*
@@ -25122,6 +25205,8 @@
* because passing a constant via triop() breaks the vbit-test test. The
* vbit-tester assumes it can set non-zero shadow bits for the triop()
* arguments. Thus they have to be expressions not a constant.
+ * Use 32-bit compare instructiions as 64-bit compares are not supported
+ * in 32-bit mode.
*/
IRTemp mask = newTemp(Ity_I64);
IRExpr *rtn;
@@ -25131,11 +25216,14 @@
rtn = tmp;
} else {
- /* check if lower four bits are 0b1100, if so, change to 0b1111 */
+ /* Check if lower four bits are 0b1100, if so, change to 0b1111 */
+ /* Make this work in 32-bit mode using only 32-bit compares */
assign( mask, unop( Iop_1Sto64,
- binop( Iop_CmpEQ64, mkU64( 0xC ),
- binop( Iop_And64, mkU64( 0xF ),
- unop( Iop_V128to64, tmp ) ) ) ) );
+ binop( Iop_CmpEQ32, mkU32( 0xC ),
+ binop( Iop_And32, mkU32( 0xF ),
+ unop( Iop_64to32,
+ unop( Iop_V128to64, tmp )
+ ) ) ) ) );
rtn = binop( Iop_64HLtoV128,
unop( Iop_V128HIto64, tmp ),
binop( Iop_Or64,
@@ -25297,6 +25385,10 @@
case 0x1: // bcdadd.
case 0x41: // bcdsub.
{
+ /* NOTE 64 bit compares are not supported in 32-bit mode. Use
+ * 32-bit compares only.
+ */
+
IRExpr *sign, *res_smaller;
IRExpr *signA, *signB, *sign_digitA, *sign_digitB;
IRExpr *zeroA, *zeroB, *posA, *posB, *negA, *negB;
@@ -25316,7 +25408,6 @@
}
putVReg( vRT_addr, mkexpr( dst ) );
-
/* set CR field 6 */
/* result */
zero = BCDstring_zero( binop( Iop_AndV128,
@@ -25324,27 +25415,28 @@
mkU64( 0xFFFFFFFFFFFFFFFF ),
mkU64( 0xFFFFFFFFFFFFFFF0 ) ),
mkexpr(dst) ) ); // ignore sign
- sign_digit = binop( Iop_And64, mkU64( 0xF ),
- unop( Iop_V128to64, mkexpr( dst ) ) );
- sign = mkOR1( binop( Iop_CmpEQ64,
+ sign_digit = binop( Iop_And32, mkU32( 0xF ),
+ unop( Iop_64to32,
+ unop( Iop_V128to64, mkexpr( dst ) ) ) );
+
+ sign = mkOR1( binop( Iop_CmpEQ32,
sign_digit,
- mkU64 ( 0xB ) ),
- binop( Iop_CmpEQ64,
+ mkU32 ( 0xB ) ),
+ binop( Iop_CmpEQ32,
sign_digit,
- mkU64 ( 0xD ) ) );
+ mkU32 ( 0xD ) ) );
neg = mkAND1( sign, mkNOT1( zero ) );
/* Pos position AKA gt = 1 if ((not neg) & (not eq zero)) */
pos = mkAND1( mkNOT1( sign ), mkNOT1( zero ) );
-
- valid =
- unop( Iop_64to32,
- binop( Iop_And64,
- is_BCDstring128( vbi,
- /* Signed */True, mkexpr( vA ) ),
- is_BCDstring128( vbi,
- /* Signed */True, mkexpr( vB ) ) ) );
+ valid = unop( Iop_64to32,
+ binop( Iop_And64,
+ is_BCDstring128( vbi,
+ /*Signed*/True, mkexpr( vA ) ),
+ is_BCDstring128( vbi,
+ /*Signed*/True, mkexpr( vB ) )
+ ) );
/* src A */
zeroA = BCDstring_zero( binop( Iop_AndV128,
@@ -25352,17 +25444,17 @@
mkU64( 0xFFFFFFFFFFFFFFFF ),
mkU64( 0xFFFFFFFFFFFFFFF0 ) ),
mkexpr( vA ) ) ); // ignore sign
- sign_digitA = binop( Iop_And64, mkU64( 0xF ),
- unop( Iop_V128to64, mkexpr( vA ) ) );
+ sign_digitA = binop( Iop_And32, mkU32( 0xF ),
+ unop( Iop_64to32,
+ unop( Iop_V128to64, mkexpr( vA ) ) ) );
- signA = mkOR1( binop( Iop_CmpEQ64,
+ signA = mkOR1( binop( Iop_CmpEQ32,
sign_digitA,
- mkU64 ( 0xB ) ),
- binop( Iop_CmpEQ64,
+ mkU32 ( 0xB ) ),
+ binop( Iop_CmpEQ32,
sign_digitA,
- mkU64 ( 0xD ) ) );
+ mkU32 ( 0xD ) ) );
negA = mkAND1( signA, mkNOT1( zeroA ) );
-
/* Pos position AKA gt = 1 if ((not neg) & (not eq zero)) */
posA = mkAND1( mkNOT1( signA ), mkNOT1( zeroA ) );
@@ -25372,22 +25464,35 @@
mkU64( 0xFFFFFFFFFFFFFFFF ),
mkU64( 0xFFFFFFFFFFFFFFF0 ) ),
mkexpr( vB ) ) ); // ignore sign
- sign_digitB = binop( Iop_And64, mkU64( 0xF ),
- unop( Iop_V128to64, mkexpr( vB ) ) );
+ sign_digitB = binop( Iop_And32, mkU32( 0xF ),
+ unop( Iop_64to32,
+ unop( Iop_V128to64, mkexpr( vB ) ) ) );
- signB = mkOR1( binop( Iop_CmpEQ64,
+ signB = mkOR1( binop( Iop_CmpEQ32,
sign_digitB,
- mkU64 ( 0xB ) ),
- binop( Iop_CmpEQ64,
+ mkU32 ( 0xB ) ),
+ binop( Iop_CmpEQ32,
sign_digitB,
- mkU64 ( 0xD ) ) );
+ mkU32 ( 0xD ) ) );
negB = mkAND1( signB, mkNOT1( zeroB ) );
+
/* Pos position AKA gt = 1 if ((not neg) & (not eq zero)) */
posB = mkAND1( mkNOT1( signB ), mkNOT1( zeroB ) );
- res_smaller = mkAND1( CmpGT128U( mkexpr( vA ), mkexpr( dst ) ),
- CmpGT128U( mkexpr( vB ), mkexpr( dst ) ) );
+
+ if (mode64) {
+ res_smaller = mkAND1( CmpGT128U( mkexpr( vA ), mkexpr( dst ) ),
+ CmpGT128U( mkexpr( vB ), mkexpr( dst ) ) );
+
+ } else {
+ /* Have to do this with 32-bit compares, expensive */
+ res_smaller = mkAND1( UNSIGNED_CMP_GT_V128( mkexpr( vA ),
+ mkexpr( dst ) ),
+ UNSIGNED_CMP_GT_V128( mkexpr( vB ),
+ mkexpr( dst ) ) );
+ }
+
if ( opc2 == 0x1) {
/* Overflow for Add can only occur if the signs of the operands
* are the same and the two operands are non-zero. On overflow,
Modified: branches/VEX_3_12_BRANCH/priv/host_ppc_isel.c
==============================================================================
--- branches/VEX_3_12_BRANCH/priv/host_ppc_isel.c (original)
+++ branches/VEX_3_12_BRANCH/priv/host_ppc_isel.c Thu Oct 20 06:26:41 2016
@@ -3329,6 +3329,36 @@
return;
}
+ /* --------- CCALL --------- */
+ if(e->tag == Iex_CCall) {
+ IRType ty = typeOfIRExpr(env->type_env,e);
+ Bool mode64 = env->mode64;
+
+ vassert(ty == e->Iex.CCall.retty); /* well-formedness of IR */
+
+ /* be very restrictive for now. Only 32-bit ints allowed for
+ args, and 32 bits or host machine word for return type. */
+ vassert(!(ty == Ity_I32 || (mode64 && ty == Ity_I64)));
+
+ /* Marshal args, do the call, clear stack. */
+ UInt addToSp = 0;
+ RetLoc rloc = mk_RetLoc_INVALID();
+ doHelperCall( &addToSp, &rloc, env, NULL/*guard*/,
+ e->Iex.CCall.cee, e->Iex.CCall.retty, e->Iex.CCall.args,
+ IEndianess );
+ vassert(is_sane_RetLoc(rloc));
+
+ vassert(rloc.pri == RLPri_2Int);
+ vassert(addToSp == 0);
+
+ /* GPR3 now holds the destination address from Pin_Goto */
+ HReg r_dst = newVRegI(env);
+ addInstr(env, mk_iMOVds_RR(r_dst, hregPPC_GPR3(mode64)));
+ *rHi = r_dst;
+ *rLo = r_dst;
+ return;
+ }
+
/* 64-bit ITE */
if (e->tag == Iex_ITE) { // VFD
HReg e0Lo, e0Hi, eXLo, eXHi;
|