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From: Ivo R. <iv...@iv...> - 2016-10-18 21:07:36
|
Valgrind developer room at FOSDEM 2017 (Brussels, Belgium, February 4th). FOSDEM is a free software event that offers open source communities a place to meet, share ideas and collaborate. It is renown for being highly developer-oriented and brings together 5000+ hackers from all over the world. It is held in the city of Brussels (Belgium). http://fosdem.org/ FOSDEM 2017 will take place during the weekend of Saturday, February 4th and Sunday February 5th 2017. On Saturday we will have a devroom for Valgrind. Devrooms are a place for development teams to meet, discuss, hack and publicly present the project's latest improvements and future directions. For the third time there will be a dedicated Valgrind devroom. We will have a whole day to hang out together as Valgrind community. Please join us, regardless of whether you are a Valgrind core hacker, Valgrind tool hacker, Valgrind user, Valgrind packager or hacker on a project that integrates, extends or complements Valgrind. Call For Participation We would like to organize a series of talks/discussions on various topics relevant to both core hackers, new developers, users, packagers and cross project functionality. Please do submit a talk proposal by Thursday December 1st 2016, so we can make a list of activities during the day. Some possible topics for talks/discussions are: - Recently added functional changes (for valgrind users). - State of the valgrind code base (core hackers). - Speeding up Memcheck by inlining of the fast cases of its helper function calls (core hackers). - Supporting Valgrind on new MacOS X versions (valgrind developers and users). - Status of current ports and possible future ports to other architectures (valgrind developers and users). - Valgrind and Wine (valgrind developers and users). - Helgrind - basic design, problems and opportunities (core and tools). - Get feedback on what what kinds of new functionality would be useful. Which tools users would like to see and/or which new features for the existing tools. (valgrind developers and users). - Modify memcheck to report the last leaked pointer to a block integrate "omega" as a memcheck option or omega as a separate tool. - Better support compiled and JITted code. allowing the JIT compiler to indicate the link between the JITted code and the source code. - Valgrind and transactional memory. - How to add simple features (adding syscalls for a platform or VEX instructions for an architecture port). (new core developers). - Making Valgrind really multi-threaded, parallelising Memcheck parallelising the rest of the framework, and tools (for core hackers). - Should we continue to support OS X? What about Valgrind on MS-Windows? Solaris? *BSD? (attracting new hackers). - Redo the JIT framework to reduce baseline overheads? (core hackers). - Discuss release/bugfixing strategy/policy (core hackers, packagers). - Packaging valgrind for distros, handling patches, suppressions, etc. (packagers). - Valgrind/GDB integration (cross project). - Valgrind vs the compiler. Compilers like GCC and clang now have "valgrind like" features, eg -fsanitize=address|thread|undefined. How does valgrind complement or improve on these features? - Eclipse and other visualisation tools for valgrind (cross project). - Practical examples of using Valgrind in (big) system automatic regression testing (users). - Tuning Valgrind for large workloads (users). Use the FOSDEM 'pentabarf' tool to submit your proposal: https://penta.fosdem.org/submission/FOSDEM17 - If necessary, create a Pentabarf account and activate it. Please reuse your account from previous years if you have already created it. - In the "Person" section, provide First name, Last name (in the "General" tab), Email (in the "Contact" tab) and Bio ("Abstract" field in the "Description" tab). - Submit a proposal by clicking on "Create event". - Important! Select the "Valgrind devroom" track (on the "General" tab). - Provide the title of your talk ("Event title" in the "General" tab). - Provide a description of the subject of the talk and the intended audience (in the "Abstract" field of the "Description" tab) - Provide a rough outline of the talk or goals of the session (a short list of bullet points covering topics that will be discussed) in the "Full description" field in the "Description" tab Julian, Philippe, Mark and Ivosh will review the proposals and organize the schedule for the day. Please feel free to suggest or discuss any ideas for the devroom on the Valgrind developer mailinglist before creating a proposal: valgrind-developers at lists.sourceforge.net Recording of talks As usually the FOSDEM organisers plan to have live streaming and recording fully working, both for remote/later viewing of talks, and so that people can watch streams in the hallways when rooms are full. This obviously requires speakers to consent to being recorded and streamed. If you plan to be a speaker, please understand that by doing so you implicitly give consent for your talk to be recorded and streamed. The recordings will be published under the same licence as all FOSDEM content (CC-BY). Important dates: Talk/Discussion Submission deadline: Thursday 1 Dec 2016 Devroom Schedule announcement: Thursday 15 Dec 2016 Devroom day: Saturday 4 Feb 2017 Hope to see you all at FOSDEM 2017 in the Valgrind devroom. Brussels (Belgium), Saturday February 4th 2017. https://fosdem.org/2017/schedule/track/valgrind/ |
|
From: <sv...@va...> - 2016-10-18 17:31:59
|
Author: sewardj
Date: Tue Oct 18 18:31:53 2016
New Revision: 16074
Log:
Fix run_a_thread_NORETURN assembly code typo for VGP_arm64_linux target.
Fixes #368823. Patch from ch...@go....
Modified:
trunk/coregrind/m_syswrap/syswrap-linux.c
Modified: trunk/coregrind/m_syswrap/syswrap-linux.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-linux.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-linux.c Tue Oct 18 18:31:53 2016
@@ -270,12 +270,12 @@
#elif defined(VGP_arm64_linux)
asm volatile (
"str %w1, %0\n" /* set tst->status = VgTs_Empty (32-bit store) */
- "mov x8, %2\n" /* set %r7 = __NR_exit */
- "ldr x0, %3\n" /* set %r0 = tst->os_state.exitcode */
+ "mov x8, %2\n" /* set %x8 = __NR_exit */
+ "ldr x0, %3\n" /* set %x0 = tst->os_state.exitcode */
"svc 0x00000000\n" /* exit(tst->os_state.exitcode) */
: "=m" (tst->status)
: "r" (VgTs_Empty), "n" (__NR_exit), "m" (tst->os_state.exitcode)
- : "r0", "r7"
+ : "x0", "x8"
);
#elif defined(VGP_s390x_linux)
asm volatile (
|
|
From: <sv...@va...> - 2016-10-18 17:16:21
|
Author: sewardj
Date: Tue Oct 18 18:16:11 2016
New Revision: 16073
Log:
Add to Memcheck a flag --ignore-range-below-sp=<offset>-<offset>, for
ignoring accesses on the stack below SP. Serves as a more modern
replacement for --workaround-gcc296-bugs, which is now deprecated.
Fixes #360571.
Added:
trunk/memcheck/tests/amd64-linux/access_below_sp.c
trunk/memcheck/tests/amd64-linux/access_below_sp_1.stderr.exp
trunk/memcheck/tests/amd64-linux/access_below_sp_1.stdout.exp
trunk/memcheck/tests/amd64-linux/access_below_sp_1.vgtest
trunk/memcheck/tests/amd64-linux/access_below_sp_2.stderr.exp
trunk/memcheck/tests/amd64-linux/access_below_sp_2.stdout.exp
trunk/memcheck/tests/amd64-linux/access_below_sp_2.vgtest
Modified:
trunk/coregrind/m_libcbase.c
trunk/include/pub_tool_libcbase.h
trunk/memcheck/docs/mc-manual.xml
trunk/memcheck/mc_errors.c
trunk/memcheck/mc_include.h
trunk/memcheck/mc_main.c
trunk/memcheck/tests/amd64-linux/Makefile.am
Modified: trunk/coregrind/m_libcbase.c
==============================================================================
--- trunk/coregrind/m_libcbase.c (original)
+++ trunk/coregrind/m_libcbase.c Tue Oct 18 18:16:11 2016
@@ -511,6 +511,25 @@
return True;
}
+Bool VG_(parse_UInt) ( const HChar** ppc, UInt* result )
+{
+ ULong res64 = 0;
+ Int used, limit = 10;
+ used = 0;
+ while (VG_(isdigit)(**ppc)) {
+ res64 = res64 * 10 + ((ULong)(**ppc)) - (ULong)'0';
+ (*ppc)++;
+ used++;
+ if (used > limit) return False;
+ }
+ if (used == 0)
+ return False;
+ if ((res64 >> 32) != 0)
+ return False;
+ *result = (UInt)res64;
+ return True;
+}
+
Bool VG_(parse_enum_set) ( const HChar *tokens,
Bool allow_all,
const HChar *input,
Modified: trunk/include/pub_tool_libcbase.h
==============================================================================
--- trunk/include/pub_tool_libcbase.h (original)
+++ trunk/include/pub_tool_libcbase.h Tue Oct 18 18:16:11 2016
@@ -101,11 +101,15 @@
extern HChar* VG_(strtok) (HChar* s, const HChar* delim);
/* Parse a 32- or 64-bit hex number, including leading 0x, from string
- starting at *ppc, putting result in *result, and return True. Or
- fail, in which case *ppc and *result are undefined, and return
- False. */
+ starting at *ppc, putting result in *result, advance *ppc past the
+ characters used, and return True. Or fail, in which case *ppc and
+ *result are undefined, and return False. */
extern Bool VG_(parse_Addr) ( const HChar** ppc, Addr* result );
+/* Parse an unsigned 32 bit number, written using decimals only.
+ Calling conventions are the same as for VG_(parse_Addr). */
+extern Bool VG_(parse_UInt) ( const HChar** ppc, UInt* result );
+
/* Parse an "enum set" made of one or more words comma separated.
The allowed word values are given in 'tokens', separated by comma.
If a word in 'tokens' is found in 'input', the corresponding bit
Modified: trunk/memcheck/docs/mc-manual.xml
==============================================================================
--- trunk/memcheck/docs/mc-manual.xml (original)
+++ trunk/memcheck/docs/mc-manual.xml Tue Oct 18 18:16:11 2016
@@ -1107,9 +1107,38 @@
conversions. This is in violation of the 32-bit PowerPC ELF
specification, which makes no provision for locations below the
stack pointer to be accessible.</para>
+
+ <para>This option is deprecated as of version 3.12 and may be
+ removed from future versions. You should instead use
+ <option>--ignore-range-below-sp</option> to specify the exact
+ range of offsets below the stack pointer that should be ignored.
+ A suitable equivalent
+ is <option>--ignore-range-below-sp=1024-1</option>.
+ </para>
</listitem>
</varlistentry>
+ <varlistentry id="opt.ignore-range-below-sp"
+ xreflabel="--ignore-range-below-sp">
+ <term>
+ <option><![CDATA[--ignore-range-below-sp=<number>-<number> ]]></option>
+ </term>
+ <listitem>
+ <para>This is a more general replacement for the deprecated
+ <option>--workaround-gcc296-bugs</option> option. When
+ specified, it causes Memcheck not to report errors for accesses
+ at the specified offsets below the stack pointer. The two
+ offsets must be positive decimal numbers and -- somewhat
+ counterintuitively -- the first one must be larger, in order to
+ imply a non-wraparound address range to ignore. For example,
+ to ignore 4 byte accesses at 8192 bytes below the stack
+ pointer,
+ use <option>--ignore-range-below-sp=8192-8189</option>. Only
+ one range may be specified.
+ </para>
+ </listitem>
+ </varlistentry>
+
<varlistentry id="opt.show-mismatched-frees"
xreflabel="--show-mismatched-frees">
<term>
Modified: trunk/memcheck/mc_errors.c
==============================================================================
--- trunk/memcheck/mc_errors.c (original)
+++ trunk/memcheck/mc_errors.c Tue Oct 18 18:16:11 2016
@@ -746,13 +746,20 @@
if (VG_(is_watched)( (isWrite ? write_watchpoint : read_watchpoint), a, szB))
return;
- just_below_esp = is_just_below_ESP( VG_(get_SP)(tid), a );
+ Addr current_sp = VG_(get_SP)(tid);
+ just_below_esp = is_just_below_ESP( current_sp, a );
/* If this is caused by an access immediately below %ESP, and the
user asks nicely, we just ignore it. */
if (MC_(clo_workaround_gcc296_bugs) && just_below_esp)
return;
+ /* Also, if this is caused by an access in the range of offsets
+ below the stack pointer as described by
+ --ignore-range-below-sp, ignore it. */
+ if (MC_(in_ignored_range_below_sp)( current_sp, a, szB ))
+ return;
+
extra.Err.Addr.isWrite = isWrite;
extra.Err.Addr.szB = szB;
extra.Err.Addr.maybe_gcc = just_below_esp;
Modified: trunk/memcheck/mc_include.h
==============================================================================
--- trunk/memcheck/mc_include.h (original)
+++ trunk/memcheck/mc_include.h Tue Oct 18 18:16:11 2016
@@ -572,6 +572,10 @@
/* Is this address in a user-specified "ignored range" ? */
Bool MC_(in_ignored_range) ( Addr a );
+/* Is this address in a user-specified "ignored range of offsets below
+ the current thread's stack pointer?" */
+Bool MC_(in_ignored_range_below_sp) ( Addr sp, Addr a, UInt szB );
+
/*------------------------------------------------------------*/
/*--- Client blocks ---*/
@@ -715,6 +719,12 @@
operations? Default: NO */
extern Bool MC_(clo_expensive_definedness_checks);
+/* Do we have a range of stack offsets to ignore? Default: NO */
+extern Bool MC_(clo_ignore_range_below_sp);
+extern UInt MC_(clo_ignore_range_below_sp__first_offset);
+extern UInt MC_(clo_ignore_range_below_sp__last_offset);
+
+
/*------------------------------------------------------------*/
/*--- Instrumentation ---*/
/*------------------------------------------------------------*/
Modified: trunk/memcheck/mc_main.c
==============================================================================
--- trunk/memcheck/mc_main.c (original)
+++ trunk/memcheck/mc_main.c Tue Oct 18 18:16:11 2016
@@ -1121,9 +1121,32 @@
/*NOTREACHED*/
}
-/* Parse two Addr separated by a dash, or fail. */
+Bool MC_(in_ignored_range_below_sp) ( Addr sp, Addr a, UInt szB )
+{
+ if (LIKELY(!MC_(clo_ignore_range_below_sp)))
+ return False;
+ tl_assert(szB >= 1 && szB <= 32);
+ tl_assert(MC_(clo_ignore_range_below_sp__first_offset)
+ > MC_(clo_ignore_range_below_sp__last_offset));
+ Addr range_lo = sp - MC_(clo_ignore_range_below_sp__first_offset);
+ Addr range_hi = sp - MC_(clo_ignore_range_below_sp__last_offset);
+ if (range_lo >= range_hi) {
+ /* Bizarre. We have a wraparound situation. What should we do? */
+ return False; // Play safe
+ } else {
+ /* This is the expected case. */
+ if (range_lo <= a && a + szB - 1 <= range_hi)
+ return True;
+ else
+ return False;
+ }
+ /*NOTREACHED*/
+ tl_assert(0);
+}
-static Bool parse_range ( const HChar** ppc, Addr* result1, Addr* result2 )
+/* Parse two Addrs (in hex) separated by a dash, or fail. */
+
+static Bool parse_Addr_pair ( const HChar** ppc, Addr* result1, Addr* result2 )
{
Bool ok = VG_(parse_Addr) (ppc, result1);
if (!ok)
@@ -1137,6 +1160,23 @@
return True;
}
+/* Parse two UInts (32 bit unsigned, in decimal) separated by a dash,
+ or fail. */
+
+static Bool parse_UInt_pair ( const HChar** ppc, UInt* result1, UInt* result2 )
+{
+ Bool ok = VG_(parse_UInt) (ppc, result1);
+ if (!ok)
+ return False;
+ if (**ppc != '-')
+ return False;
+ (*ppc)++;
+ ok = VG_(parse_UInt) (ppc, result2);
+ if (!ok)
+ return False;
+ return True;
+}
+
/* Parse a set of ranges separated by commas into 'ignoreRanges', or
fail. If they are valid, add them to the global set of ignored
ranges. */
@@ -1148,7 +1188,7 @@
while (1) {
Addr start = ~(Addr)0;
Addr end = (Addr)0;
- Bool ok = parse_range(ppc, &start, &end);
+ Bool ok = parse_Addr_pair(ppc, &start, &end);
if (!ok)
return False;
if (start > end)
@@ -5976,6 +6016,9 @@
Int MC_(clo_mc_level) = 2;
Bool MC_(clo_show_mismatched_frees) = True;
Bool MC_(clo_expensive_definedness_checks) = False;
+Bool MC_(clo_ignore_range_below_sp) = False;
+UInt MC_(clo_ignore_range_below_sp__first_offset) = 0;
+UInt MC_(clo_ignore_range_below_sp__last_offset) = 0;
static const HChar * MC_(parse_leak_heuristics_tokens) =
"-,stdstring,length64,newarray,multipleinheritance";
@@ -6106,6 +6149,48 @@
}
}
+ else if VG_STR_CLO(arg, "--ignore-range-below-sp", tmp_str) {
+ /* This seems at first a bit weird, but: in order to imply
+ a non-wrapped-around address range, the first offset needs to be
+ larger than the second one. For example
+ --ignore-range-below-sp=8192,8189
+ would cause accesses to in the range [SP-8192, SP-8189] to be
+ ignored. */
+ UInt offs1 = 0, offs2 = 0;
+ Bool ok = parse_UInt_pair(&tmp_str, &offs1, &offs2);
+ // Ensure we used all the text after the '=' sign.
+ if (ok && *tmp_str != 0) ok = False;
+ if (!ok) {
+ VG_(message)(Vg_DebugMsg,
+ "ERROR: --ignore-range-below-sp: invalid syntax. "
+ " Expected \"...=decimalnumber-decimalnumber\".\n");
+ return False;
+ }
+ if (offs1 > 1000*1000 /*arbitrary*/ || offs2 > 1000*1000 /*ditto*/) {
+ VG_(message)(Vg_DebugMsg,
+ "ERROR: --ignore-range-below-sp: suspiciously large "
+ "offset(s): %u and %u\n", offs1, offs2);
+ return False;
+ }
+ if (offs1 <= offs2) {
+ VG_(message)(Vg_DebugMsg,
+ "ERROR: --ignore-range-below-sp: invalid offsets "
+ "(the first must be larger): %u and %u\n", offs1, offs2);
+ return False;
+ }
+ tl_assert(offs1 > offs2);
+ if (offs1 - offs2 > 4096 /*arbitrary*/) {
+ VG_(message)(Vg_DebugMsg,
+ "ERROR: --ignore-range-below-sp: suspiciously large "
+ "range: %u-%u (size %u)\n", offs1, offs2, offs1 - offs2);
+ return False;
+ }
+ MC_(clo_ignore_range_below_sp) = True;
+ MC_(clo_ignore_range_below_sp__first_offset) = offs1;
+ MC_(clo_ignore_range_below_sp__last_offset) = offs2;
+ return True;
+ }
+
else if VG_BHEX_CLO(arg, "--malloc-fill", MC_(clo_malloc_fill), 0x00,0xFF) {}
else if VG_BHEX_CLO(arg, "--free-fill", MC_(clo_free_fill), 0x00,0xFF) {}
@@ -6163,8 +6248,11 @@
" Use extra-precise definedness tracking [no]\n"
" --freelist-vol=<number> volume of freed blocks queue [20000000]\n"
" --freelist-big-blocks=<number> releases first blocks with size>= [1000000]\n"
-" --workaround-gcc296-bugs=no|yes self explanatory [no]\n"
+" --workaround-gcc296-bugs=no|yes self explanatory [no]. Deprecated.\n"
+" Use --ignore-range-below-sp instead.\n"
" --ignore-ranges=0xPP-0xQQ[,0xRR-0xSS] assume given addresses are OK\n"
+" --ignore-range-below-sp=<number>-<number> do not report errors for\n"
+" accesses at the given offsets below SP\n"
" --malloc-fill=<hexnumber> fill malloc'd areas with given value\n"
" --free-fill=<hexnumber> fill free'd areas with given value\n"
" --keep-stacktraces=alloc|free|alloc-and-free|alloc-then-free|none\n"
@@ -7667,12 +7755,23 @@
MC_(clo_leak_check) = LC_Full;
}
- if (MC_(clo_freelist_big_blocks) >= MC_(clo_freelist_vol))
+ if (MC_(clo_freelist_big_blocks) >= MC_(clo_freelist_vol)
+ && VG_(clo_verbosity) == 1 && !VG_(clo_xml)) {
VG_(message)(Vg_UserMsg,
"Warning: --freelist-big-blocks value %lld has no effect\n"
"as it is >= to --freelist-vol value %lld\n",
MC_(clo_freelist_big_blocks),
MC_(clo_freelist_vol));
+ }
+
+ if (MC_(clo_workaround_gcc296_bugs)
+ && VG_(clo_verbosity) == 1 && !VG_(clo_xml)) {
+ VG_(umsg)(
+ "Warning: --workaround-gcc296-bugs=yes is deprecated.\n"
+ "Warning: Instead use: --ignore-range-below-sp=1024-1\n"
+ "\n"
+ );
+ }
tl_assert( MC_(clo_mc_level) >= 1 && MC_(clo_mc_level) <= 3 );
Modified: trunk/memcheck/tests/amd64-linux/Makefile.am
==============================================================================
--- trunk/memcheck/tests/amd64-linux/Makefile.am (original)
+++ trunk/memcheck/tests/amd64-linux/Makefile.am Tue Oct 18 18:16:11 2016
@@ -5,10 +5,15 @@
filter_stderr filter_defcfaexpr
EXTRA_DIST = \
+ access_below_sp_1.vgtest \
+ access_below_sp_1.stderr.exp access_below_sp_1.stdout.exp \
+ access_below_sp_2.vgtest \
+ access_below_sp_2.stderr.exp access_below_sp_2.stdout.exp \
defcfaexpr.vgtest defcfaexpr.stderr.exp \
int3-amd64.vgtest int3-amd64.stderr.exp int3-amd64.stdout.exp
check_PROGRAMS = \
+ access_below_sp \
defcfaexpr \
int3-amd64
Added: trunk/memcheck/tests/amd64-linux/access_below_sp.c
==============================================================================
--- trunk/memcheck/tests/amd64-linux/access_below_sp.c (added)
+++ trunk/memcheck/tests/amd64-linux/access_below_sp.c Tue Oct 18 18:16:11 2016
@@ -0,0 +1,39 @@
+
+#include <stdio.h>
+
+
+#define COMPILER_BARRIER __asm__ __volatile("":::"cc","memory")
+
+/* force the kernel to map in 15k below SP, so we can safely poke
+ around there. */
+__attribute__((noinline)) void make_below_sp_safe ( void )
+{
+ const int N = 15000;
+ unsigned char a[N];
+ int i;
+
+ for (i = 0; i < N; i++) {
+ a[i] = i & 0xFF;
+ }
+
+ COMPILER_BARRIER;
+
+ unsigned int r = 0;
+ for (i = 0; i < N; i++) {
+ r = (r << 1) | (r >> 31);
+ r ^= (unsigned int)a[i];
+ }
+ fprintf(stderr, "Checksum: %08x\n", r);
+}
+
+
+int main ( void )
+{
+ make_below_sp_safe();
+
+ unsigned int res;
+ __asm__ __volatile__("movl -8192(%%rsp), %0"
+ : "=r"(res) : : "memory","cc");
+ fprintf(stderr, "Got %08x\n", res);
+ return 0;
+}
Added: trunk/memcheck/tests/amd64-linux/access_below_sp_1.stderr.exp
==============================================================================
--- trunk/memcheck/tests/amd64-linux/access_below_sp_1.stderr.exp (added)
+++ trunk/memcheck/tests/amd64-linux/access_below_sp_1.stderr.exp Tue Oct 18 18:16:11 2016
@@ -0,0 +1,2 @@
+Checksum: 7ff7077f
+Got e3e2e1e0
Added: trunk/memcheck/tests/amd64-linux/access_below_sp_1.stdout.exp
==============================================================================
(empty)
Added: trunk/memcheck/tests/amd64-linux/access_below_sp_1.vgtest
==============================================================================
--- trunk/memcheck/tests/amd64-linux/access_below_sp_1.vgtest (added)
+++ trunk/memcheck/tests/amd64-linux/access_below_sp_1.vgtest Tue Oct 18 18:16:11 2016
@@ -0,0 +1,2 @@
+prog: access_below_sp
+vgopts: -q --ignore-range-below-sp=8192-8189
Added: trunk/memcheck/tests/amd64-linux/access_below_sp_2.stderr.exp
==============================================================================
--- trunk/memcheck/tests/amd64-linux/access_below_sp_2.stderr.exp (added)
+++ trunk/memcheck/tests/amd64-linux/access_below_sp_2.stderr.exp Tue Oct 18 18:16:11 2016
@@ -0,0 +1,7 @@
+Checksum: 7ff7077f
+Invalid read of size 4
+ ...
+ Address 0x........ is on thread 1's stack
+ .... bytes below stack pointer
+
+Got e3e2e1e0
Added: trunk/memcheck/tests/amd64-linux/access_below_sp_2.stdout.exp
==============================================================================
(empty)
Added: trunk/memcheck/tests/amd64-linux/access_below_sp_2.vgtest
==============================================================================
--- trunk/memcheck/tests/amd64-linux/access_below_sp_2.vgtest (added)
+++ trunk/memcheck/tests/amd64-linux/access_below_sp_2.vgtest Tue Oct 18 18:16:11 2016
@@ -0,0 +1,2 @@
+prog: access_below_sp
+vgopts: -q
|
Author: carll
Date: Tue Oct 18 16:56:55 2016
New Revision: 16072
Log:
Fix PPC BE in 32-bit mode.
The 64-bit compares are not supported in 32-bit mode. Change the 64-bit
compares to 32-bit compares when doing byte compares. Add routine for
doing V128 GT compare using 32-bit compares.
The clean caller support was missing for 32-bit mode
Update the expected output file jm_vec_isa_2_07.stdout.exp
Bugzilla 371128 VEX commit 3271
Added:
trunk/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp-LE
Modified:
trunk/NEWS
trunk/none/tests/ppc32/Makefile.am
trunk/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Tue Oct 18 16:56:55 2016
@@ -196,6 +196,7 @@
369468 Remove quadratic metapool alg. using VG_(HT_remove_at_Iter)
(VgHashTable *table)
370265 ISA 3.0 HW cap stuff needs updating
+371128 BCD add and subtract instructions on Power BE in 32-bit mode do not work
n-i-bz Fix incorrect (or infinite loop) unwind on RHEL7 x86 and amd64
n-i-bz massif --pages-as-heap=yes does not report peak caused by mmap+munmap
Modified: trunk/none/tests/ppc32/Makefile.am
==============================================================================
--- trunk/none/tests/ppc32/Makefile.am (original)
+++ trunk/none/tests/ppc32/Makefile.am Tue Oct 18 16:56:55 2016
@@ -38,7 +38,8 @@
test_dfp3.stderr.exp test_dfp3.stdout.exp test_dfp3.vgtest \
test_dfp4.stderr.exp test_dfp4.stdout.exp test_dfp4.vgtest \
test_dfp5.stderr.exp test_dfp5.stdout.exp test_dfp5.vgtest \
- jm_vec_isa_2_07.stderr.exp jm_vec_isa_2_07.stdout.exp jm_vec_isa_2_07.vgtest \
+ jm_vec_isa_2_07.stderr.exp jm_vec_isa_2_07.vgtest \
+ jm_vec_isa_2_07.stdout.exp jm_vec_isa_2_07.stdout.exp-LE \
jm_fp_isa_2_07.stderr.exp jm_fp_isa_2_07.stdout.exp jm_fp_isa_2_07.vgtest \
jm_int_isa_2_07.stderr.exp jm_int_isa_2_07.vgtest \
jm_int_isa_2_07.stdout.exp \
Modified: trunk/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp
==============================================================================
--- trunk/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp (original)
+++ trunk/none/tests/ppc32/jm_vec_isa_2_07.stdout.exp Tue Oct 18 16:56:55 2016
@@ -2,224 +2,777 @@
mfvsrd: 090a0b0c0e0d0e0f => 000000000e0d0e0f
mfvsrd: f1f2f3f4f5f6f7f8 => 00000000f5f6f7f8
mfvsrd: f9fafbfcfefdfeff => 00000000fefdfeff
+mfvsrd: 00007fffffffffff => 00000000ffffffff
+mfvsrd: ffff000000000000 => 0000000000000000
+mfvsrd: 0000800000000000 => 0000000000000000
+mfvsrd: 0000000000000000 => 0000000000000000
+mfvsrd: ffffffffffffffff => 00000000ffffffff
mfvsrwz: 0102030405060708 => 0000000005060708
mfvsrwz: 090a0b0c0e0d0e0f => 000000000e0d0e0f
mfvsrwz: f1f2f3f4f5f6f7f8 => 00000000f5f6f7f8
mfvsrwz: f9fafbfcfefdfeff => 00000000fefdfeff
+mfvsrwz: 00007fffffffffff => 00000000ffffffff
+mfvsrwz: ffff000000000000 => 0000000000000000
+mfvsrwz: 0000800000000000 => 0000000000000000
+mfvsrwz: 0000000000000000 => 0000000000000000
+mfvsrwz: ffffffffffffffff => 00000000ffffffff
mtvsrd: 0102030405060708 => 0000000005060708
mtvsrd: 090a0b0c0e0d0e0f => 000000000e0d0e0f
mtvsrd: f1f2f3f4f5f6f7f8 => 00000000f5f6f7f8
mtvsrd: f9fafbfcfefdfeff => 00000000fefdfeff
+mtvsrd: 00007fffffffffff => 00000000ffffffff
+mtvsrd: ffff000000000000 => 0000000000000000
+mtvsrd: 0000800000000000 => 0000000000000000
+mtvsrd: 0000000000000000 => 0000000000000000
+mtvsrd: ffffffffffffffff => 00000000ffffffff
mtvsrwz: 05060708 => 0000000005060708
mtvsrwz: 0e0d0e0f => 000000000e0d0e0f
mtvsrwz: f5f6f7f8 => 00000000f5f6f7f8
mtvsrwz: fefdfeff => 00000000fefdfeff
+mtvsrwz: ffffffff => 00000000ffffffff
+mtvsrwz: 00000000 => 0000000000000000
+mtvsrwz: 00000000 => 0000000000000000
+mtvsrwz: 00000000 => 0000000000000000
+mtvsrwz: ffffffff => 00000000ffffffff
mtfprwa: 05060708 => 0000000005060708
mtfprwa: 0e0d0e0f => 000000000e0d0e0f
mtfprwa: f5f6f7f8 => fffffffff5f6f7f8
mtfprwa: fefdfeff => fffffffffefdfeff
+mtfprwa: ffffffff => ffffffffffffffff
+mtfprwa: 00000000 => 0000000000000000
+mtfprwa: 00000000 => 0000000000000000
+mtfprwa: 00000000 => 0000000000000000
+mtfprwa: ffffffff => ffffffffffffffff
vaddudm: 0102030405060708 @@ 0102030405060708 ==> 020406080a0c0e10
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 121416181c1a1c1e
vaddudm: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> f2f4f6f8fafcff00
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 030507090d0b0d0e
+vaddudm: 0102030405060708 @@ 00007fffffffffff ==> 0102830405060707
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 09090b0c0e0d0e0f
+vaddudm: 0102030405060708 @@ 0000800000000000 ==> 0102830405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vaddudm: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f2f4f6f8fafcff00
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 030507090d0b0d0e
vaddudm: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> e3e5e7e9ebedeff0
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> f3f5f7f9fdfbfdfe
+vaddudm: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> f1f373f4f5f6f7f7
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9f9fbfcfefdfeff
+vaddudm: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f373f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vaddudm: 00007fffffffffff @@ 0102030405060708 ==> 0102830405060707
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 09090b0c0e0d0e0f
+vaddudm: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> f1f373f4f5f6f7f7
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> f9f9fbfcfefdfeff
+vaddudm: 00007fffffffffff @@ 00007fffffffffff ==> 0000fffffffffffe
+ ffff000000000000 @@ ffff000000000000 ==> fffe000000000000
+vaddudm: 00007fffffffffff @@ 0000800000000000 ==> 0000ffffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vaddudm: 0000800000000000 @@ 0102030405060708 ==> 0102830405060708
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
+vaddudm: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> f1f373f4f5f6f7f8
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vaddudm: 0000800000000000 @@ 00007fffffffffff ==> 0000ffffffffffff
+ 0000000000000000 @@ ffff000000000000 ==> ffff000000000000
+vaddudm: 0000800000000000 @@ 0000800000000000 ==> 0001000000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vsubudm: 0102030405060708 @@ 0102030405060708 ==> 0000000000000000
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0000000000000000
vsubudm: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0f0f0f0f0f0f0f10
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0f0f0f0f0f0f0f10
+vsubudm: 0102030405060708 @@ 00007fffffffffff ==> 0101830405060709
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090b0b0c0e0d0e0f
+vsubudm: 0102030405060708 @@ 0000800000000000 ==> 0101830405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vsubudm: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f0f0f0f0f0f0f0f0
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> f0f0f0f0f0f0f0f0
vsubudm: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsubudm: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> f1f273f4f5f6f7f9
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fbfbfcfefdfeff
+vsubudm: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f273f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vsubudm: 00007fffffffffff @@ 0102030405060708 ==> fefe7cfbfaf9f8f7
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> f6f4f4f3f1f2f1f1
+vsubudm: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0e0d8c0b0a090807
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 0604040301020101
+vsubudm: 00007fffffffffff @@ 00007fffffffffff ==> 0000000000000000
+ ffff000000000000 @@ ffff000000000000 ==> 0000000000000000
+vsubudm: 00007fffffffffff @@ 0000800000000000 ==> ffffffffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vsubudm: 0000800000000000 @@ 0102030405060708 ==> fefe7cfbfaf9f8f8
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> f6f5f4f3f1f2f1f1
+vsubudm: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0e0d8c0b0a090808
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0605040301020101
+vsubudm: 0000800000000000 @@ 00007fffffffffff ==> 0000000000000001
+ 0000000000000000 @@ ffff000000000000 ==> 0001000000000000
+vsubudm: 0000800000000000 @@ 0000800000000000 ==> 0000000000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vmaxud: 0102030405060708 @@ 0102030405060708 ==> 0102030405060708
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
vmaxud: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vmaxud: 0102030405060708 @@ 00007fffffffffff ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> ffff000000000000
+vmaxud: 0102030405060708 @@ 0000800000000000 ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vmaxud: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f1f2f3f4f5f6f7f8
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> f9fafbfcfefdfeff
vmaxud: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vmaxud: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> ffff000000000000
+vmaxud: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vmaxud: 00007fffffffffff @@ 0102030405060708 ==> 0102030405060708
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> ffff000000000000
+vmaxud: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ffff000000000000
+vmaxud: 00007fffffffffff @@ 00007fffffffffff ==> 00007fffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vmaxud: 00007fffffffffff @@ 0000800000000000 ==> 0000800000000000
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vmaxud: 0000800000000000 @@ 0102030405060708 ==> 0102030405060708
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
+vmaxud: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vmaxud: 0000800000000000 @@ 00007fffffffffff ==> 0000800000000000
+ 0000000000000000 @@ ffff000000000000 ==> ffff000000000000
+vmaxud: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vmaxsd: 0102030405060708 @@ 0102030405060708 ==> 0102030405060708
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
vmaxsd: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0102030405060708
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 090a0b0c0e0d0e0f
+vmaxsd: 0102030405060708 @@ 00007fffffffffff ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090a0b0c0e0d0e0f
+vmaxsd: 0102030405060708 @@ 0000800000000000 ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vmaxsd: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 0102030405060708
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
vmaxsd: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vmaxsd: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 00007fffffffffff
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> ffff000000000000
+vmaxsd: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 0000800000000000
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 0000000000000000
+vmaxsd: 00007fffffffffff @@ 0102030405060708 ==> 0102030405060708
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
+vmaxsd: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 00007fffffffffff
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ffff000000000000
+vmaxsd: 00007fffffffffff @@ 00007fffffffffff ==> 00007fffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vmaxsd: 00007fffffffffff @@ 0000800000000000 ==> 0000800000000000
+ ffff000000000000 @@ 0000000000000000 ==> 0000000000000000
+vmaxsd: 0000800000000000 @@ 0102030405060708 ==> 0102030405060708
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
+vmaxsd: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000800000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vmaxsd: 0000800000000000 @@ 00007fffffffffff ==> 0000800000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vmaxsd: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vminud: 0102030405060708 @@ 0102030405060708 ==> 0102030405060708
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
vminud: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0102030405060708
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 090a0b0c0e0d0e0f
+vminud: 0102030405060708 @@ 00007fffffffffff ==> 00007fffffffffff
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090a0b0c0e0d0e0f
+vminud: 0102030405060708 @@ 0000800000000000 ==> 0000800000000000
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 0000000000000000
vminud: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 0102030405060708
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
vminud: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vminud: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 00007fffffffffff
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fafbfcfefdfeff
+vminud: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 0000800000000000
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 0000000000000000
+vminud: 00007fffffffffff @@ 0102030405060708 ==> 00007fffffffffff
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
+vminud: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 00007fffffffffff
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vminud: 00007fffffffffff @@ 00007fffffffffff ==> 00007fffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vminud: 00007fffffffffff @@ 0000800000000000 ==> 00007fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> 0000000000000000
+vminud: 0000800000000000 @@ 0102030405060708 ==> 0000800000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vminud: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000800000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vminud: 0000800000000000 @@ 00007fffffffffff ==> 00007fffffffffff
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vminud: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vminsd: 0102030405060708 @@ 0102030405060708 ==> 0102030405060708
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 090a0b0c0e0d0e0f
vminsd: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vminsd: 0102030405060708 @@ 00007fffffffffff ==> 00007fffffffffff
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> ffff000000000000
+vminsd: 0102030405060708 @@ 0000800000000000 ==> 0000800000000000
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 0000000000000000
vminsd: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f1f2f3f4f5f6f7f8
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> f9fafbfcfefdfeff
vminsd: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vminsd: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fafbfcfefdfeff
+vminsd: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vminsd: 00007fffffffffff @@ 0102030405060708 ==> 00007fffffffffff
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> ffff000000000000
+vminsd: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vminsd: 00007fffffffffff @@ 00007fffffffffff ==> 00007fffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vminsd: 00007fffffffffff @@ 0000800000000000 ==> 00007fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vminsd: 0000800000000000 @@ 0102030405060708 ==> 0000800000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vminsd: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> f1f2f3f4f5f6f7f8
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> f9fafbfcfefdfeff
+vminsd: 0000800000000000 @@ 00007fffffffffff ==> 00007fffffffffff
+ 0000000000000000 @@ ffff000000000000 ==> ffff000000000000
+vminsd: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vcmpequd: 0102030405060708 @@ 0102030405060708 ==> ffffffffffffffff
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
vcmpequd: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpequd: 0102030405060708 @@ 00007fffffffffff ==> 0000000000000000
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 0000000000000000
+vcmpequd: 0102030405060708 @@ 0000800000000000 ==> 0000000000000000
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 0000000000000000
vcmpequd: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 0000000000000000
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 0000000000000000
vcmpequd: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> ffffffffffffffff
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vcmpequd: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 0000000000000000
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 0000000000000000
+vcmpequd: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 0000000000000000
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 0000000000000000
+vcmpequd: 00007fffffffffff @@ 0102030405060708 ==> 0000000000000000
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vcmpequd: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpequd: 00007fffffffffff @@ 00007fffffffffff ==> ffffffffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffffffffffffffff
+vcmpequd: 00007fffffffffff @@ 0000800000000000 ==> 0000000000000000
+ ffff000000000000 @@ 0000000000000000 ==> 0000000000000000
+vcmpequd: 0000800000000000 @@ 0102030405060708 ==> 0000000000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vcmpequd: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpequd: 0000800000000000 @@ 00007fffffffffff ==> 0000000000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vcmpequd: 0000800000000000 @@ 0000800000000000 ==> ffffffffffffffff
+ 0000000000000000 @@ 0000000000000000 ==> ffffffffffffffff
vcmpgtud: 0102030405060708 @@ 0102030405060708 ==> 0000000000000000
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0000000000000000
vcmpgtud: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpgtud: 0102030405060708 @@ 00007fffffffffff ==> ffffffffffffffff
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 0000000000000000
+vcmpgtud: 0102030405060708 @@ 0000800000000000 ==> ffffffffffffffff
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> ffffffffffffffff
vcmpgtud: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> ffffffffffffffff
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
vcmpgtud: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpgtud: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> ffffffffffffffff
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 0000000000000000
+vcmpgtud: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> ffffffffffffffff
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> ffffffffffffffff
+vcmpgtud: 00007fffffffffff @@ 0102030405060708 ==> 0000000000000000
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
+vcmpgtud: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vcmpgtud: 00007fffffffffff @@ 00007fffffffffff ==> 0000000000000000
+ ffff000000000000 @@ ffff000000000000 ==> 0000000000000000
+vcmpgtud: 00007fffffffffff @@ 0000800000000000 ==> 0000000000000000
+ ffff000000000000 @@ 0000000000000000 ==> ffffffffffffffff
+vcmpgtud: 0000800000000000 @@ 0102030405060708 ==> 0000000000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vcmpgtud: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpgtud: 0000800000000000 @@ 00007fffffffffff ==> ffffffffffffffff
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vcmpgtud: 0000800000000000 @@ 0000800000000000 ==> 0000000000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vcmpgtsd: 0102030405060708 @@ 0102030405060708 ==> 0000000000000000
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0000000000000000
vcmpgtsd: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> ffffffffffffffff
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vcmpgtsd: 0102030405060708 @@ 00007fffffffffff ==> ffffffffffffffff
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> ffffffffffffffff
+vcmpgtsd: 0102030405060708 @@ 0000800000000000 ==> ffffffffffffffff
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> ffffffffffffffff
vcmpgtsd: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 0000000000000000
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 0000000000000000
vcmpgtsd: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0000000000000000
+vcmpgtsd: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 0000000000000000
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 0000000000000000
+vcmpgtsd: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 0000000000000000
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 0000000000000000
+vcmpgtsd: 00007fffffffffff @@ 0102030405060708 ==> 0000000000000000
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vcmpgtsd: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> ffffffffffffffff
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vcmpgtsd: 00007fffffffffff @@ 00007fffffffffff ==> 0000000000000000
+ ffff000000000000 @@ ffff000000000000 ==> 0000000000000000
+vcmpgtsd: 00007fffffffffff @@ 0000800000000000 ==> 0000000000000000
+ ffff000000000000 @@ 0000000000000000 ==> 0000000000000000
+vcmpgtsd: 0000800000000000 @@ 0102030405060708 ==> 0000000000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vcmpgtsd: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> ffffffffffffffff
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vcmpgtsd: 0000800000000000 @@ 00007fffffffffff ==> ffffffffffffffff
+ 0000000000000000 @@ ffff000000000000 ==> ffffffffffffffff
+vcmpgtsd: 0000800000000000 @@ 0000800000000000 ==> 0000000000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vrld: 0102030405060708 @@ 0102030405060708 ==> 0203040506070801
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0586070687078485
vrld: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0801020304050607
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 8485058607068707
+vrld: 0102030405060708 @@ 00007fffffffffff ==> 0081018202830384
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090a0b0c0e0d0e0f
+vrld: 0102030405060708 @@ 0000800000000000 ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vrld: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f2f3f4f5f6f7f8f1
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 7dfe7f7eff7ffcfd
vrld: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f8f1f2f3f4f5f6f7
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> fcfd7dfe7f7eff7f
+vrld: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 78f979fa7afb7bfc
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fafbfcfefdfeff
+vrld: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vrld: 00007fffffffffff @@ 0102030405060708 ==> 007fffffffffff00
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 8000000000007fff
+vrld: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> ff00007fffffffff
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 7fff800000000000
+vrld: 00007fffffffffff @@ 00007fffffffffff ==> 80003fffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vrld: 00007fffffffffff @@ 0000800000000000 ==> 00007fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vrld: 0000800000000000 @@ 0102030405060708 ==> 0080000000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vrld: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000008000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vrld: 0000800000000000 @@ 00007fffffffffff ==> 0000400000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vrld: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vsld: 0102030405060708 @@ 0102030405060708 ==> 0203040506070800
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0586070687078000
vsld: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0800000000000000
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 8000000000000000
+vsld: 0102030405060708 @@ 00007fffffffffff ==> 0000000000000000
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090a0b0c0e0d0e0f
+vsld: 0102030405060708 @@ 0000800000000000 ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vsld: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f2f3f4f5f6f7f800
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 7dfe7f7eff7f8000
vsld: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f800000000000000
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 8000000000000000
+vsld: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 0000000000000000
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fafbfcfefdfeff
+vsld: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vsld: 00007fffffffffff @@ 0102030405060708 ==> 007fffffffffff00
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 8000000000000000
+vsld: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> ff00000000000000
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsld: 00007fffffffffff @@ 00007fffffffffff ==> 8000000000000000
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vsld: 00007fffffffffff @@ 0000800000000000 ==> 00007fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vsld: 0000800000000000 @@ 0102030405060708 ==> 0080000000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vsld: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsld: 0000800000000000 @@ 00007fffffffffff ==> 0000000000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vsld: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vsrad: 0102030405060708 @@ 0102030405060708 ==> 0001020304050607
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0000121416181c1a
vsrad: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000001
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsrad: 0102030405060708 @@ 00007fffffffffff ==> 0000000000000000
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090a0b0c0e0d0e0f
+vsrad: 0102030405060708 @@ 0000800000000000 ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vsrad: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> fff1f2f3f4f5f6f7
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> fffff3f5f7f9fdfb
vsrad: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> fffffffffffffff1
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vsrad: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> ffffffffffffffff
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fafbfcfefdfeff
+vsrad: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vsrad: 00007fffffffffff @@ 0102030405060708 ==> 0000007fffffffff
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> fffffffe00000000
+vsrad: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vsrad: 00007fffffffffff @@ 00007fffffffffff ==> 0000000000000000
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vsrad: 00007fffffffffff @@ 0000800000000000 ==> 00007fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vsrad: 0000800000000000 @@ 0102030405060708 ==> 0000008000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vsrad: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsrad: 0000800000000000 @@ 00007fffffffffff ==> 0000000000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vsrad: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vsrd: 0102030405060708 @@ 0102030405060708 ==> 0001020304050607
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0000121416181c1a
vsrd: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000001
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsrd: 0102030405060708 @@ 00007fffffffffff ==> 0000000000000000
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090a0b0c0e0d0e0f
+vsrd: 0102030405060708 @@ 0000800000000000 ==> 0102030405060708
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 090a0b0c0e0d0e0f
vsrd: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 00f1f2f3f4f5f6f7
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 0001f3f5f7f9fdfb
vsrd: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 00000000000000f1
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0000000000000001
+vsrd: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 0000000000000001
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fafbfcfefdfeff
+vsrd: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> f1f2f3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> f9fafbfcfefdfeff
+vsrd: 00007fffffffffff @@ 0102030405060708 ==> 0000007fffffffff
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 0001fffe00000000
+vsrd: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000001
+vsrd: 00007fffffffffff @@ 00007fffffffffff ==> 0000000000000000
+ ffff000000000000 @@ ffff000000000000 ==> ffff000000000000
+vsrd: 00007fffffffffff @@ 0000800000000000 ==> 00007fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff000000000000
+vsrd: 0000800000000000 @@ 0102030405060708 ==> 0000008000000000
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vsrd: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0000000000000000
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vsrd: 0000800000000000 @@ 00007fffffffffff ==> 0000000000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000000000000000
+vsrd: 0000800000000000 @@ 0000800000000000 ==> 0000800000000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vpkudum: Inputs: 05060708 0e0d0e0f 05060708 0e0d0e0f
Output: 05060708 0e0d0e0f 05060708 0e0d0e0f
vpkudum: Inputs: 05060708 0e0d0e0f f5f6f7f8 fefdfeff
Output: 05060708 0e0d0e0f f5f6f7f8 fefdfeff
+vpkudum: Inputs: 05060708 0e0d0e0f ffffffff 00000000
+ Output: 05060708 0e0d0e0f ffffffff 00000000
+vpkudum: Inputs: 05060708 0e0d0e0f 00000000 00000000
+ Output: 05060708 0e0d0e0f 00000000 00000000
vpkudum: Inputs: f5f6f7f8 fefdfeff 05060708 0e0d0e0f
Output: f5f6f7f8 fefdfeff 05060708 0e0d0e0f
vpkudum: Inputs: f5f6f7f8 fefdfeff f5f6f7f8 fefdfeff
Output: f5f6f7f8 fefdfeff f5f6f7f8 fefdfeff
+vpkudum: Inputs: f5f6f7f8 fefdfeff ffffffff 00000000
+ Output: f5f6f7f8 fefdfeff ffffffff 00000000
+vpkudum: Inputs: f5f6f7f8 fefdfeff 00000000 00000000
+ Output: f5f6f7f8 fefdfeff 00000000 00000000
+vpkudum: Inputs: ffffffff 00000000 05060708 0e0d0e0f
+ Output: ffffffff 00000000 05060708 0e0d0e0f
+vpkudum: Inputs: ffffffff 00000000 f5f6f7f8 fefdfeff
+ Output: ffffffff 00000000 f5f6f7f8 fefdfeff
+vpkudum: Inputs: ffffffff 00000000 ffffffff 00000000
+ Output: ffffffff 00000000 ffffffff 00000000
+vpkudum: Inputs: ffffffff 00000000 00000000 00000000
+ Output: ffffffff 00000000 00000000 00000000
+vpkudum: Inputs: 00000000 00000000 05060708 0e0d0e0f
+ Output: 00000000 00000000 05060708 0e0d0e0f
+vpkudum: Inputs: 00000000 00000000 f5f6f7f8 fefdfeff
+ Output: 00000000 00000000 f5f6f7f8 fefdfeff
+vpkudum: Inputs: 00000000 00000000 ffffffff 00000000
+ Output: 00000000 00000000 ffffffff 00000000
+vpkudum: Inputs: 00000000 00000000 00000000 00000000
+ Output: 00000000 00000000 00000000 00000000
vpmsumd: 0102030405060708 @@ 0102030405060708 ==> 0040004000400040
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0045004500410015
vpmsumd: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 07c007c006d00735
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> a260a260a374a2c5
+vpmsumd: 0102030405060708 @@ 00007fffffffffff ==> 07060182fc7efe7f
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 0478fefc030202f8
+vpmsumd: 0102030405060708 @@ 0000800000000000 ==> 0000008101820283
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 0384000000000000
vpmsumd: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 07c007c006d00735
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> a260a260a374a2c5
vpmsumd: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 0040004000400040
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0045004500410015
+vpmsumd: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 575629aad456d657
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 2c50aeac535252a8
+vpmsumd: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 000078f979fa7afb
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 7bfc000000000000
+vpmsumd: 00007fffffffffff @@ 0102030405060708 ==> 07060182fc7efe7f
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 0478fefc030202f8
+vpmsumd: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 575629aad456d657
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 2c50aeac535252a8
+vpmsumd: 00007fffffffffff @@ 00007fffffffffff ==> 5555555515555555
+ ffff000000000000 @@ ffff000000000000 ==> 5555555555555555
+vpmsumd: 00007fffffffffff @@ 0000800000000000 ==> 000000003fffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffff800000000000
+vpmsumd: 0000800000000000 @@ 0102030405060708 ==> 0000008101820283
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0384000000000000
+vpmsumd: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 000078f979fa7afb
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 7bfc000000000000
+vpmsumd: 0000800000000000 @@ 00007fffffffffff ==> 000000003fffffff
+ 0000000000000000 @@ ffff000000000000 ==> ffff800000000000
+vpmsumd: 0000800000000000 @@ 0000800000000000 ==> 0000000040000000
+ 0000000000000000 @@ 0000000000000000 ==> 0000000000000000
vnand: 0102030405060708 @@ 0102030405060708 ==> fefdfcfbfaf9f8f7
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> f6f5f4f3f1f2f1f0
vnand: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> fefdfcfbfaf9f8f7
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> f6f5f4f3f1f2f1f0
+vnand: 0102030405060708 @@ 00007fffffffffff ==> fffffcfbfaf9f8f7
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> f6f5ffffffffffff
+vnand: 0102030405060708 @@ 0000800000000000 ==> ffffffffffffffff
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> ffffffffffffffff
vnand: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> fefdfcfbfaf9f8f7
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> f6f5f4f3f1f2f1f0
vnand: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 0e0d0c0b0a090807
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0605040301020100
+vnand: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> ffff8c0b0a090807
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 0605ffffffffffff
+vnand: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> ffff7fffffffffff
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> ffffffffffffffff
+vnand: 00007fffffffffff @@ 0102030405060708 ==> fffffcfbfaf9f8f7
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> f6f5ffffffffffff
+vnand: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> ffff8c0b0a090807
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 0605ffffffffffff
+vnand: 00007fffffffffff @@ 00007fffffffffff ==> ffff800000000000
+ ffff000000000000 @@ ffff000000000000 ==> 0000ffffffffffff
+vnand: 00007fffffffffff @@ 0000800000000000 ==> ffffffffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffffffffffffffff
+vnand: 0000800000000000 @@ 0102030405060708 ==> ffffffffffffffff
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
+vnand: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> ffff7fffffffffff
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vnand: 0000800000000000 @@ 00007fffffffffff ==> ffffffffffffffff
+ 0000000000000000 @@ ffff000000000000 ==> ffffffffffffffff
+vnand: 0000800000000000 @@ 0000800000000000 ==> ffff7fffffffffff
+ 0000000000000000 @@ 0000000000000000 ==> ffffffffffffffff
vorc: 0102030405060708 @@ 0102030405060708 ==> ffffffffffffffff
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
vorc: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0f0f0f0f0f0f0f0f
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0f0f0f0f0f0f0f0f
+vorc: 0102030405060708 @@ 00007fffffffffff ==> ffff830405060708
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090affffffffffff
+vorc: 0102030405060708 @@ 0000800000000000 ==> ffff7fffffffffff
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> ffffffffffffffff
vorc: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> ffffffffffffffff
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
vorc: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> ffffffffffffffff
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vorc: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> fffff3f4f5f6f7f8
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9faffffffffffff
+vorc: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> ffffffffffffffff
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> ffffffffffffffff
+vorc: 00007fffffffffff @@ 0102030405060708 ==> fefdffffffffffff
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> fffff4f3f1f2f1f0
+vorc: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0e0d7fffffffffff
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ffff040301020100
+vorc: 00007fffffffffff @@ 00007fffffffffff ==> ffffffffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffffffffffffffff
+vorc: 00007fffffffffff @@ 0000800000000000 ==> ffff7fffffffffff
+ ffff000000000000 @@ 0000000000000000 ==> ffffffffffffffff
+vorc: 0000800000000000 @@ 0102030405060708 ==> fefdfcfbfaf9f8f7
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> f6f5f4f3f1f2f1f0
+vorc: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0e0d8c0b0a090807
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0605040301020100
+vorc: 0000800000000000 @@ 00007fffffffffff ==> ffff800000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000ffffffffffff
+vorc: 0000800000000000 @@ 0000800000000000 ==> ffffffffffffffff
+ 0000000000000000 @@ 0000000000000000 ==> ffffffffffffffff
veqv: 0102030405060708 @@ 0102030405060708 ==> ffffffffffffffff
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> ffffffffffffffff
veqv: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0f0f0f0f0f0f0f0f
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0f0f0f0f0f0f0f0f
+veqv: 0102030405060708 @@ 00007fffffffffff ==> fefd830405060708
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 090af4f3f1f2f1f0
+veqv: 0102030405060708 @@ 0000800000000000 ==> fefd7cfbfaf9f8f7
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> f6f5f4f3f1f2f1f0
veqv: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 0f0f0f0f0f0f0f0f
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 0f0f0f0f0f0f0f0f
veqv: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> ffffffffffffffff
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+veqv: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 0e0d73f4f5f6f7f8
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> f9fa040301020100
+veqv: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 0e0d8c0b0a090807
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 0605040301020100
+veqv: 00007fffffffffff @@ 0102030405060708 ==> fefd830405060708
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 090af4f3f1f2f1f0
+veqv: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0e0d73f4f5f6f7f8
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> f9fa040301020100
+veqv: 00007fffffffffff @@ 00007fffffffffff ==> ffffffffffffffff
+ ffff000000000000 @@ ffff000000000000 ==> ffffffffffffffff
+veqv: 00007fffffffffff @@ 0000800000000000 ==> ffff000000000000
+ ffff000000000000 @@ 0000000000000000 ==> 0000ffffffffffff
+veqv: 0000800000000000 @@ 0102030405060708 ==> fefd7cfbfaf9f8f7
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> f6f5f4f3f1f2f1f0
+veqv: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0e0d8c0b0a090807
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0605040301020100
+veqv: 0000800000000000 @@ 00007fffffffffff ==> ffff000000000000
+ 0000000000000000 @@ ffff000000000000 ==> 0000ffffffffffff
+veqv: 0000800000000000 @@ 0000800000000000 ==> ffffffffffffffff
+ 0000000000000000 @@ 0000000000000000 ==> ffffffffffffffff
vcipher: 0102030405060708 @@ 0102030405060708 ==> 15abdc2823b74b86
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 22037bc3e1e25abc
vcipher: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> e55b2cd8d347bb76
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> d2f38b331112aa4c
+vcipher: 0102030405060708 @@ 00007fffffffffff ==> 14a9a0d3d94eb371
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> d4f670cfefef54b3
+vcipher: 0102030405060708 @@ 0000800000000000 ==> 14a95f2c26b14c8e
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 2b0970cfefef54b3
vcipher: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 8720c49da1d37bca
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 906d1f673bb72743
vcipher: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 77d0346d51238b3a
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 609def97cb47d7b3
+vcipher: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 8622b8665b2a833d
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 6698146b35ba294c
+vcipher: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 86224799a4d57cc2
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 9967146b35ba294c
+vcipher: 00007fffffffffff @@ 0102030405060708 ==> fd8b1512668ffb6b
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 44a1fbab18f18719
+vcipher: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0d7be5e2967f0b9b
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> b4510b5be80177e9
+vcipher: 00007fffffffffff @@ 00007fffffffffff ==> fc8969e99c76039c
+ ffff000000000000 @@ ffff000000000000 ==> b254f0a716fc8916
+vcipher: 00007fffffffffff @@ 0000800000000000 ==> fc8996166389fc63
+ ffff000000000000 @@ 0000000000000000 ==> 4dabf0a716fc8916
+vcipher: 0000800000000000 @@ 0102030405060708 ==> 626160676665646b
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> c4802fc16d6e6d6c
+vcipher: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 929190979695949b
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 3470df319d9e9d9c
+vcipher: 0000800000000000 @@ 00007fffffffffff ==> 63631c9c9c9c9c9c
+ 0000000000000000 @@ ffff000000000000 ==> 327524cd63636363
+vcipher: 0000800000000000 @@ 0000800000000000 ==> 6363e36363636363
+ 0000000000000000 @@ 0000000000000000 ==> cd8a24cd63636363
vcipherlast: 0102030405060708 @@ 0102030405060708 ==> 7d6d28726e61acfa
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 08dd703ca57acbf1
vcipherlast: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 8d9dd8829e915c0a
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> f82d80cc558a3b01
+vcipherlast: 0102030405060708 @@ 00007fffffffffff ==> 7c6f54899498540d
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> fe287b30ab77c5fe
+vcipherlast: 0102030405060708 @@ 0000800000000000 ==> 7c6fab766b67abf2
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 01d77b30ab77c5fe
vcipherlast: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> a0400c12e32bbcb7
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 905e064db58466bf
vcipherlast: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 50b0fce213db4c47
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 60aef6bd4574964f
+vcipherlast: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> a14270e919d24440
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 66ab0d41bb8968b0
+vcipherlast: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> a1428f16e62dbbbf
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 99540d41bb8968b0
+vcipherlast: 00007fffffffffff @@ 0102030405060708 ==> 621460671310641e
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 1f69d91a6d6e186c
+vcipherlast: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 92e49097e3e094ee
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> ef9929ea9d9ee89c
+vcipherlast: 00007fffffffffff @@ 00007fffffffffff ==> 63161c9ce9e99ce9
+ ffff000000000000 @@ ffff000000000000 ==> e99cd21663631663
+vcipherlast: 00007fffffffffff @@ 0000800000000000 ==> 6316e36316166316
+ ffff000000000000 @@ 0000000000000000 ==> 1663d21663631663
+vcipherlast: 0000800000000000 @@ 0102030405060708 ==> 626160676665646b
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 6a69c66f6d6e6d6c
+vcipherlast: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 929190979695949b
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 9a99369f9d9e9d9c
+vcipherlast: 0000800000000000 @@ 00007fffffffffff ==> 63631c9c9c9c9c9c
+ 0000000000000000 @@ ffff000000000000 ==> 9c9ccd6363636363
+vcipherlast: 0000800000000000 @@ 0000800000000000 ==> 6363e36363636363
+ 0000000000000000 @@ 0000000000000000 ==> 6363cd6363636363
vncipher: 0102030405060708 @@ 0102030405060708 ==> fe67ce881a80f569
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 19db0b0605541639
vncipher: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0e973e78ea700599
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> e92bfbf6f5a4e6c9
+vncipher: 0102030405060708 @@ 00007fffffffffff ==> de98809d822f77d0
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> 1424f3081f45082e
+vncipher: 0102030405060708 @@ 0000800000000000 ==> 0facae567dd0882f
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 3aef223c1f45082e
vncipher: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 8b10c2d5607a5569
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 581826de46277b9c
vncipher: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 7be03225908aa599
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> a8e8d62eb6d78b6c
+vncipher: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> abef8cc0f8d5d7d0
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 55e7ded05c36658b
+vncipher: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 7adba20b072a282f
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 7b2c0fe45c36658b
+vncipher: 00007fffffffffff @@ 0102030405060708 ==> 359e61e1b44edf06
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> ec338260e6209378
+vncipher: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> c56e911144be2ff6
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 1cc3729016d06388
+vncipher: 00007fffffffffff @@ 00007fffffffffff ==> 15612ff42ce15dbf
+ ffff000000000000 @@ ffff000000000000 ==> e1cc7a6efc318d6f
+vncipher: 00007fffffffffff @@ 0000800000000000 ==> c455013fd31ea240
+ ffff000000000000 @@ 0000000000000000 ==> cf07ab5afc318d6f
+vncipher: 0000800000000000 @@ 0102030405060708 ==> 796e736035022f14
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> cfb37d6d48434c45
+vncipher: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 899e8390c5f2dfe4
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> 3f438d9db8b3bcb5
+vncipher: 0000800000000000 @@ 00007fffffffffff ==> 59913d75adadadad
+ 0000000000000000 @@ ffff000000000000 ==> c24c856352525252
+vncipher: 0000800000000000 @@ 0000800000000000 ==> 88a513be52525252
+ 0000000000000000 @@ 0000000000000000 ==> ec87545752525252
vncipherlast: 0102030405060708 @@ 0102030405060708 ==> 08f19dbb336cd089
090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 49afdef7d9ae363f
vncipherlast: 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> f8016d4bc39c2079
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> b95f2e07295ec6cf
+vncipherlast: 0102030405060708 @@ 00007fffffffffff ==> 09f3e140c995287e
+ 090a0b0c0e0d0e0f @@ ffff000000000000 ==> bf5ad5fbd7a33830
+vncipherlast: 0102030405060708 @@ 0000800000000000 ==> 09f31ebf366ad781
+ 090a0b0c0e0d0e0f @@ 0000000000000000 ==> 40a5d5fbd7a33830
vncipherlast: f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> 2a2360e572020b5d
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 60dc7571021928b5
vncipherlast: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> dad3901582f2fbad
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 902c8581f2e9d845
+vncipherlast: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff ==> 2b211c1e88fbf3aa
+ f9fafbfcfefdfeff @@ ffff000000000000 ==> 96297e7d0c1426ba
+vncipherlast: f1f2f3f4f5f6f7f8 @@ 0000800000000000 ==> 2b21e3e177040c55
+ f9fafbfcfefdfeff @@ 0000000000000000 ==> 69d67e7d0c1426ba
+vncipherlast: 00007fffffffffff @@ 0102030405060708 ==> 535051797854555a
+ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 7477605e5c707372
+vncipherlast: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> a3a0a18988a4a5aa
+ ffff000000000000 @@ f9fafbfcfefdfeff ==> 848790aeac808382
+vncipherlast: 00007fffffffffff @@ 00007fffffffffff ==> 52522d8282adadad
+ ffff000000000000 @@ ffff000000000000 ==> 82826b52527d7d7d
+vncipherlast: 00007fffffffffff @@ 0000800000000000 ==> 5252d27d7d525252
+ ffff000000000000 @@ 0000000000000000 ==> 7d7d6b52527d7d7d
+vncipherlast: 0000800000000000 @@ 0102030405060708 ==> 535051565754555a
+ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 5b58315e5c5f5c5d
+vncipherlast: 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> a3a0a1a6a7a4a5aa
+ 0000000000000000 @@ f9fafbfcfefdfeff ==> aba8c1aeacafacad
+vncipherlast: 0000800000000000 @@ 00007fffffffffff ==> 52522dadadadadad
+ 0000000000000000 @@ ffff000000000000 ==> adad3a5252525252
+vncipherlast: 0000800000000000 @@ 0000800000000000 ==> 5252d25252525252
+ 0000000000000000 @@ 0000000000000000 ==> 52523a5252525252
vmulouw: 01020304 05060708 090a0b0c 0e0d0e0f ==> 00193c6aa4917040 00c56e34124ba4e1
vmulouw: 01020304 05060708 090a0b0c 0e0d0e0f ==> 04d39d63184f87c0 0dfee4d8b9c6e2f1
@@ -300,6 +853,14 @@
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> fbfafdfffffcfffe
vpermxor: 0102030405060708 @@ f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> fdfcfbfaf9f8f7f6
090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> f5f4f3f1f1f2f1f0
+vpermxor: 0102030405060708 @@ 00007fffffffffff @@ 0102030405060708 ==> 017efefefefefefe
+ 090a0b0c0e0d0e0f @@ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> fe01010101010101
+vpermxor: 0102030405060708 @@ 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 0f70f0f0f0f0f0f0
+ 090a0b0c0e0d0e0f @@ ffff000000000000 @@ f9fafbfcfefdfeff ==> f00f0f0f0f0f0f0f
+vpermxor: 0102030405060708 @@ 0000800000000000 @@ 0102030405060708 ==> 0181010101010101
+ 090a0b0c0e0d0e0f @@ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0101010101010101
+vpermxor: 0102030405060708 @@ 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0f8f0f0f0f0f0f0f
+ 090a0b0c0e0d0e0f @@ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0f0f0f0f0f0f0f0f
vpermxor: f1f2f3f4f5f6f7f8 @@ 0102030405060708 @@ 0102030405060708 ==> f3f2f5f4f7f6f9f8
f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> fbfafdfffffcfffe
vpermxor: f1f2f3f4f5f6f7f8 @@ 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> fdfcfbfaf9f8f7f6
@@ -308,36 +869,96 @@
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> 0b0a0d0f0f0c0f0e
vpermxor: f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> 0d0c0b0a09080706
f9fafbfcfefdfeff @@ f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> 0504030101020100
+vpermxor: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff @@ 0102030405060708 ==> f18e0e0e0e0e0e0e
+ f9fafbfcfefdfeff @@ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> 0ef1f1f1f1f1f1f1
+vpermxor: f1f2f3f4f5f6f7f8 @@ 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> ff80000000000000
+ f9fafbfcfefdfeff @@ ffff000000000000 @@ f9fafbfcfefdfeff ==> 00ffffffffffffff
+vpermxor: f1f2f3f4f5f6f7f8 @@ 0000800000000000 @@ 0102030405060708 ==> f171f1f1f1f1f1f1
+ f9fafbfcfefdfeff @@ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> f1f1f1f1f1f1f1f1
+vpermxor: f1f2f3f4f5f6f7f8 @@ 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> ff7fffffffffffff
+ f9fafbfcfefdfeff @@ 0000000000000000 @@ f9fafbfcfefdfeff ==> ffffffffffffffff
+vpermxor: 00007fffffffffff @@ 0102030405060708 @@ 0102030405060708 ==> 0203040506070809
+ ffff000000000000 @@ 090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0a0b0c0e0e0d0e0f
+vpermxor: 00007fffffffffff @@ 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0203040506070809
+ ffff000000000000 @@ 090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0a0b0c0e0e0d0e0f
+vpermxor: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f2f3f4f5f6f7f8f9
+ ffff000000000000 @@ f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> fafbfcfefefdfeff
+vpermxor: 00007fffffffffff @@ f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f2f3f4f5f6f7f8f9
+ ffff000000000000 @@ f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> fafbfcfefefdfeff
+vpermxor: 00007fffffffffff @@ 00007fffffffffff @@ 0102030405060708 ==> 007fffffffffffff
+ ffff000000000000 @@ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> ff00000000000000
+vpermxor: 00007fffffffffff @@ 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 007fffffffffffff
+ ffff000000000000 @@ ffff000000000000 @@ f9fafbfcfefdfeff ==> ff00000000000000
+vpermxor: 00007fffffffffff @@ 0000800000000000 @@ 0102030405060708 ==> 0080000000000000
+ ffff000000000000 @@ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vpermxor: 00007fffffffffff @@ 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0080000000000000
+ ffff000000000000 @@ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
+vpermxor: 0000800000000000 @@ 0102030405060708 @@ 0102030405060708 ==> 0203040506070809
+ 0000000000000000 @@ 090a0b0c0e0d0e0f @@ 090a0b0c0e0d0e0f ==> 0a0b0c0e0e0d0e0f
+vpermxor: 0000800000000000 @@ 0102030405060708 @@ f1f2f3f4f5f6f7f8 ==> 0203040506070809
+ 0000000000000000 @@ 090a0b0c0e0d0e0f @@ f9fafbfcfefdfeff ==> 0a0b0c0e0e0d0e0f
+vpermxor: 0000800000000000 @@ f1f2f3f4f5f6f7f8 @@ 0102030405060708 ==> f2f3f4f5f6f7f8f9
+ 0000000000000000 @@ f9fafbfcfefdfeff @@ 090a0b0c0e0d0e0f ==> fafbfcfefefdfeff
+vpermxor: 0000800000000000 @@ f1f2f3f4f5f6f7f8 @@ f1f2f3f4f5f6f7f8 ==> f2f3f4f5f6f7f8f9
+ 0000000000000000 @@ f9fafbfcfefdfeff @@ f9fafbfcfefdfeff ==> fafbfcfefefdfeff
+vpermxor: 0000800000000000 @@ 00007fffffffffff @@ 0102030405060708 ==> 007fffffffffffff
+ 0000000000000000 @@ ffff000000000000 @@ 090a0b0c0e0d0e0f ==> ff00000000000000
+vpermxor: 0000800000000000 @@ 00007fffffffffff @@ f1f2f3f4f5f6f7f8 ==> 007fffffffffffff
+ 0000000000000000 @@ ffff000000000000 @@ f9fafbfcfefdfeff ==> ff00000000000000
+vpermxor: 0000800000000000 @@ 0000800000000000 @@ 0102030405060708 ==> 0080000000000000
+ 0000000000000000 @@ 0000000000000000 @@ 090a0b0c0e0d0e0f ==> 0000000000000000
+vpermxor: 0000800000000000 @@ 0000800000000000 @@ f1f2f3f4f5f6f7f8 ==> 0080000000000000
+ 0000000000000000 @@ 0000000000000000 @@ f9fafbfcfefdfeff ==> 0000000000000000
vclzb: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 07060605050505040404040404040404
vclzb: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 00000000000000000000000000000000
+vclzb: 00007fffffffffff @@ ffff000000000000 ==> 08080100000000000000080808080808
+vclzb: 0000800000000000 @@ 0000000000000000 ==> 08080008080808080808080808080808
vclzw: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 00000007000000050000000400000004
vclzw: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 00000000000000000000000000000000
+vclzw: 00007fffffffffff @@ ffff000000000000 ==> 00000011000000000000000000000020
+vclzw: 0000800000000000 @@ 0000000000000000 ==> 00000010000000200000002000000020
vclzh: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 00070006000500050004000400040004
vclzh: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 00000000000000000000000000000000
+vclzh: 00007fffffffffff @@ ffff000000000000 ==> 00100001000000000000001000100010
+vclzh: 0000800000000000 @@ 0000000000000000 ==> 00100000001000100010001000100010
vclzd: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 00000000000000070000000000000004
vclzd: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 00000000000000000000000000000000
+vclzd: 00007fffffffffff @@ ffff000000000000 ==> 00000000000000110000000000000000
+vclzd: 0000800000000000 @@ 0000000000000000 ==> 00000000000000100000000000000040
vpopcntb: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 01010201020203010202030203030304
vpopcntb: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 05050605060607050606070607070708
+vpopcntb: 00007fffffffffff @@ ffff000000000000 ==> 00000708080808080808000000000000
+vpopcntb: 0000800000000000 @@ 0000000000000000 ==> 00000100000000000000000000000000
vpopcnth: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 00020003000400040004000500060007
vpopcnth: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 000a000b000c000c000c000d000e000f
+vpopcnth: 00007fffffffffff @@ ffff000000000000 ==> 0000000f001000100010000000000000
+vpopcnth: 0000800000000000 @@ 0000000000000000 ==> 00000001000000000000000000000000
vpopcntw: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 0000000500000008000000090000000d
vpopcntw: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 0000001500000018000000190000001d
+vpopcntw: 00007fffffffffff @@ ffff000000000000 ==> 0000000f000000200000001000000000
+vpopcntw: 0000800000000000 @@ 0000000000000000 ==> 00000001000000000000000000000000
vpopcntd: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 000000000000000d0000000000000016
vpopcntd: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 000000000000002d0000000000000036
+vpopcntd: 00007fffffffffff @@ ffff000000000000 ==> 000000000000002f0000000000000010
+vpopcntd: 0000800000000000 @@ 0000000000000000 ==> 00000000000000010000000000000000
vsbox: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 7c777bf26b6fc53001672bfeabd7ab76
vsbox: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> a1890dbfe6426841992d0fb0bb54bb16
+vsbox: 00007fffffffffff @@ ffff000000000000 ==> 6363d216161616161616636363636363
+vsbox: 0000800000000000 @@ 0000000000000000 ==> 6363cd63636363636363636363636363
vgbbd: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 00000000011e66aa00000000ff1f6ba5
vgbbd: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> ffffffff011e66aaffffffffff1f6ba5
+vgbbd: 00007fffffffffff @@ ffff000000000000 ==> 1f3f3f3f3f3f3f3fc0c0c0c0c0c0c0c0
+vgbbd: 0000800000000000 @@ 0000000000000000 ==> 20000000000000000000000000000000
vshasigmad: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 088207870e8c098d || 8b9e1b9b13149015
vshasigmad: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> c8f5100c7844a0fc || e9b5916d0131c581
@@ -347,6 +968,14 @@
vshasigmad: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 52af4a56221efaa6 || 73efcb375b6b9fdb
vshasigmad: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 8bf92f9ed2b06655 || 299d6bbd9e22f4c7
vshasigmad: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 986700cc8f5613df || 7a3f676a2ef03935
+vshasigmad: 00007fffffffffff @@ ffff000000000000 ==> 7f003f7fffffffff || 7eff810000000000
+vshasigmad: 00007fffffffffff @@ ffff000000000000 ==> fffc1e000ffffff8 || fc07e3ffe0000007
+vshasigmad: 00007fffffffffff @@ ffff000000000000 ==> fffffff03e07e0ff || 0000000fc1f03e00
+vshasigmad: 00007fffffffffff @@ ffff000000000000 ==> fffc3ffe1f80003f || 0003c003c07fff80
+vshasigmad: 0000800000000000 @@ 0000000000000000 ==> 0000418000000000 || 0000000000000000
+vshasigmad: 0000800000000000 @@ 0000000000000000 ==> 0004020010000000 || 0000000000000000
+vshasigmad: 0000800000000000 @@ 0000000000000000 ==> 0000000000082100 || 0000000000000000
+vshasigmad: 0000800000000000 @@ 0000000000000000 ==> 0000000220000040 || 0000000000000000
vshasigmaw: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 88e344269168cdae || 9bf057355c5e785e
vshasigmaw: 0102030405060708 @@ 090a0b0c0e0d0e0f ==> 41e2c021c36443a2 || 44e5c72626c5e584
@@ -356,6 +985,14 @@
vshasigmaw: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 27b89a7ba53e19f8 || 22bf9d7c409fbfde
vshasigmaw: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 6814e0ad5965f19e || 0a7682cfffbb77ab
vshasigmaw: f1f2f3f4f5f6f7f8 @@ f9fafbfcfefdfeff ==> 54200fe9e7b2997b || 71052acc5efb57bb
+vshasigmaw: 00007fffffffffff @@ ffff000000000000 ==> e1ffcf001fffffff || de0021ff00000000
+vshasigmaw: 00007fffffffffff @@ ffff000000000000 ==> 3000601f003fffff || 603f9fc000000000
+vshasigmaw: 00007fffffffffff @@ ffff000000000000 ==> 3e07e3fcffffffff || c3f83c0700000000
+vshasigmaw: 00007fffffffffff @@ ffff000000000000 ==> 03dffe70ffffffff || fc60039f00000000
+vshasigmaw: 0000800000000000 @@ 0000000000000000 ==> 2000110000000000 || 0000000000000000
+vshasigmaw: 0000800000000000 @@ 0000000000000000 ==> 5000002000000000 || 0000000000000000
+vshasigmaw: 0000800000000000 @@ 0000000000000000 ==> 0200200400000000 || 0000000000000000
+vshasigmaw: 0000800000000000 @@ 0000000000000000 ==> 0040021000000000 || 0000000000000000
bcdadd.: 8045090189321003 || 001122334556677d @@ 8045090189321003 || 001122334556677d ==> 6090180378642006 || 002244669113354d
bcdadd.: 8045090189321003 || 001122334556677d @@ 8045090189321003 || 001122334556677d ==> 6090180378642006 || 002244669113354d
@@ -425,63 +1062,219 @@
vaddcuq: 01020304050607...
[truncated message content] |
|
From: <sv...@va...> - 2016-10-18 15:52:17
|
Author: carll
Date: Tue Oct 18 16:52:09 2016
New Revision: 3271
Log:
Fix PPC BE in 32-bit mode.
The 64-bit compares are not supported in 32-bit mode. Change the 64-bit
compares to 32-bit compares when doing byte compares. Add routine for
doing V128 GT compare using 32-bit compares.
The clean caller support was missing for 32-bit mode
Update the expected output file jm_vec_isa_2_07.stdout.exp
Bugzilla 371128
Modified:
trunk/priv/guest_ppc_toIR.c
trunk/priv/host_ppc_isel.c
Modified: trunk/priv/guest_ppc_toIR.c
==============================================================================
--- trunk/priv/guest_ppc_toIR.c (original)
+++ trunk/priv/guest_ppc_toIR.c Tue Oct 18 16:52:09 2016
@@ -4354,14 +4354,39 @@
IRTemp tsrc = newTemp( Ity_V128 );
assign( tsrc, src);
- return mkAND1( binop( Iop_CmpEQ64,
- mkU64( 0 ),
- unop( Iop_V128HIto64,
- mkexpr( tsrc ) ) ),
- binop( Iop_CmpEQ64,
- mkU64( 0 ),
- unop( Iop_V128to64,
- mkexpr( tsrc ) ) ) );
+ if ( mode64 ) {
+ return mkAND1( binop( Iop_CmpEQ64,
+ mkU64( 0 ),
+ unop( Iop_V128HIto64,
+ mkexpr( tsrc ) ) ),
+ binop( Iop_CmpEQ64,
+ mkU64( 0 ),
+ unop( Iop_V128to64,
+ mkexpr( tsrc ) ) ) );
+ } else {
+ /* make this work in 32-bit mode */
+ return mkAND1(
+ mkAND1( binop( Iop_CmpEQ32,
+ mkU32( 0 ),
+ unop( Iop_64HIto32,
+ unop( Iop_V128HIto64,
+ mkexpr( tsrc ) ) ) ),
+ binop( Iop_CmpEQ32,
+ mkU32( 0 ),
+ unop( Iop_64to32,
+ unop( Iop_V128HIto64,
+ mkexpr( tsrc ) ) ) ) ),
+ mkAND1( binop( Iop_CmpEQ32,
+ mkU32( 0 ),
+ unop( Iop_64HIto32,
+ unop( Iop_V128to64,
+ mkexpr( tsrc ) ) ) ),
+ binop( Iop_CmpEQ32,
+ mkU32( 0 ),
+ unop( Iop_64to32,
+ unop( Iop_V128to64,
+ mkexpr( tsrc ) ) ) ) ) );
+ }
}
static IRExpr * check_BCD_round (IRExpr *src, IRTemp shift)
@@ -4594,6 +4619,64 @@
return mkexpr( result );
}
+static IRExpr * UNSIGNED_CMP_GT_V128 ( IRExpr *vA, IRExpr *vB ) {
+ /* This function does an unsigned compare of two V128 values. The
+ * function is for use in 32-bit mode only as it is expensive. The
+ * issue is that compares (GT, LT, EQ) are not supported for operands
+ * larger then 32-bits when running in 32-bit mode. The function returns
+ * a 1-bit expression, 1 for TRUE and 0 for FALSE.
+ */
+ IRTemp vA_word0 = newTemp( Ity_I32);
+ IRTemp vA_word1 = newTemp( Ity_I32);
+ IRTemp vA_word2 = newTemp( Ity_I32);
+ IRTemp vA_word3 = newTemp( Ity_I32);
+ IRTemp vB_word0 = newTemp( Ity_I32);
+ IRTemp vB_word1 = newTemp( Ity_I32);
+ IRTemp vB_word2 = newTemp( Ity_I32);
+ IRTemp vB_word3 = newTemp( Ity_I32);
+
+ IRTemp eq_word1 = newTemp( Ity_I1);
+ IRTemp eq_word2 = newTemp( Ity_I1);
+ IRTemp eq_word3 = newTemp( Ity_I1);
+
+
+ IRExpr *gt_word0, *gt_word1, *gt_word2, *gt_word3;
+ IRExpr *eq_word3_2, *eq_word3_2_1;
+ IRTemp result = newTemp( Ity_I1 );
+
+ assign( vA_word0, unop( Iop_64to32, unop( Iop_V128to64, vA ) ) );
+ assign( vA_word1, unop( Iop_64HIto32, unop( Iop_V128to64, vA ) ) );
+ assign( vA_word2, unop( Iop_64to32, unop( Iop_V128HIto64, vA ) ) );
+ assign( vA_word3, unop( Iop_64HIto32, unop( Iop_V128HIto64, vA ) ) );
+
+ assign( vB_word0, unop( Iop_64to32, unop( Iop_V128to64, vB ) ) );
+ assign( vB_word1, unop( Iop_64HIto32, unop( Iop_V128to64, vB ) ) );
+ assign( vB_word2, unop( Iop_64to32, unop( Iop_V128HIto64, vB ) ) );
+ assign( vB_word3, unop( Iop_64HIto32, unop( Iop_V128HIto64, vB ) ) );
+
+ assign( eq_word3, binop( Iop_CmpEQ32, mkexpr( vA_word3 ),
+ mkexpr( vB_word3 ) ) );
+ assign( eq_word2, binop( Iop_CmpEQ32, mkexpr( vA_word2 ),
+ mkexpr( vB_word2 ) ) );
+ assign( eq_word1, binop( Iop_CmpEQ32, mkexpr( vA_word1 ),
+ mkexpr( vB_word1 ) ) );
+
+ gt_word3 = binop( Iop_CmpLT32U, mkexpr( vB_word3 ), mkexpr( vA_word3 ) );
+ gt_word2 = binop( Iop_CmpLT32U, mkexpr( vB_word2 ), mkexpr( vA_word2 ) );
+ gt_word1 = binop( Iop_CmpLT32U, mkexpr( vB_word1 ), mkexpr( vA_word1 ) );
+ gt_word0 = binop( Iop_CmpLT32U, mkexpr( vB_word0 ), mkexpr( vA_word0 ) );
+
+ eq_word3_2 = mkAND1( mkexpr( eq_word3 ), mkexpr( eq_word2 ) );
+ eq_word3_2_1 = mkAND1( mkexpr( eq_word1 ), eq_word3_2 );
+
+ assign( result, mkOR1(
+ mkOR1( gt_word3,
+ mkAND1( mkexpr( eq_word3 ), gt_word2 ) ),
+ mkOR1( mkAND1( eq_word3_2, gt_word1 ),
+ mkAND1( eq_word3_2_1, gt_word0 ) ) ) );
+ return mkexpr( result );
+}
+
/*------------------------------------------------------------*/
/* Transactional memory helpers
*
@@ -25122,6 +25205,8 @@
* because passing a constant via triop() breaks the vbit-test test. The
* vbit-tester assumes it can set non-zero shadow bits for the triop()
* arguments. Thus they have to be expressions not a constant.
+ * Use 32-bit compare instructiions as 64-bit compares are not supported
+ * in 32-bit mode.
*/
IRTemp mask = newTemp(Ity_I64);
IRExpr *rtn;
@@ -25131,11 +25216,14 @@
rtn = tmp;
} else {
- /* check if lower four bits are 0b1100, if so, change to 0b1111 */
+ /* Check if lower four bits are 0b1100, if so, change to 0b1111 */
+ /* Make this work in 32-bit mode using only 32-bit compares */
assign( mask, unop( Iop_1Sto64,
- binop( Iop_CmpEQ64, mkU64( 0xC ),
- binop( Iop_And64, mkU64( 0xF ),
- unop( Iop_V128to64, tmp ) ) ) ) );
+ binop( Iop_CmpEQ32, mkU32( 0xC ),
+ binop( Iop_And32, mkU32( 0xF ),
+ unop( Iop_64to32,
+ unop( Iop_V128to64, tmp )
+ ) ) ) ) );
rtn = binop( Iop_64HLtoV128,
unop( Iop_V128HIto64, tmp ),
binop( Iop_Or64,
@@ -25297,6 +25385,10 @@
case 0x1: // bcdadd.
case 0x41: // bcdsub.
{
+ /* NOTE 64 bit compares are not supported in 32-bit mode. Use
+ * 32-bit compares only.
+ */
+
IRExpr *sign, *res_smaller;
IRExpr *signA, *signB, *sign_digitA, *sign_digitB;
IRExpr *zeroA, *zeroB, *posA, *posB, *negA, *negB;
@@ -25316,7 +25408,6 @@
}
putVReg( vRT_addr, mkexpr( dst ) );
-
/* set CR field 6 */
/* result */
zero = BCDstring_zero( binop( Iop_AndV128,
@@ -25324,27 +25415,28 @@
mkU64( 0xFFFFFFFFFFFFFFFF ),
mkU64( 0xFFFFFFFFFFFFFFF0 ) ),
mkexpr(dst) ) ); // ignore sign
- sign_digit = binop( Iop_And64, mkU64( 0xF ),
- unop( Iop_V128to64, mkexpr( dst ) ) );
- sign = mkOR1( binop( Iop_CmpEQ64,
+ sign_digit = binop( Iop_And32, mkU32( 0xF ),
+ unop( Iop_64to32,
+ unop( Iop_V128to64, mkexpr( dst ) ) ) );
+
+ sign = mkOR1( binop( Iop_CmpEQ32,
sign_digit,
- mkU64 ( 0xB ) ),
- binop( Iop_CmpEQ64,
+ mkU32 ( 0xB ) ),
+ binop( Iop_CmpEQ32,
sign_digit,
- mkU64 ( 0xD ) ) );
+ mkU32 ( 0xD ) ) );
neg = mkAND1( sign, mkNOT1( zero ) );
/* Pos position AKA gt = 1 if ((not neg) & (not eq zero)) */
pos = mkAND1( mkNOT1( sign ), mkNOT1( zero ) );
-
- valid =
- unop( Iop_64to32,
- binop( Iop_And64,
- is_BCDstring128( vbi,
- /* Signed */True, mkexpr( vA ) ),
- is_BCDstring128( vbi,
- /* Signed */True, mkexpr( vB ) ) ) );
+ valid = unop( Iop_64to32,
+ binop( Iop_And64,
+ is_BCDstring128( vbi,
+ /*Signed*/True, mkexpr( vA ) ),
+ is_BCDstring128( vbi,
+ /*Signed*/True, mkexpr( vB ) )
+ ) );
/* src A */
zeroA = BCDstring_zero( binop( Iop_AndV128,
@@ -25352,17 +25444,17 @@
mkU64( 0xFFFFFFFFFFFFFFFF ),
mkU64( 0xFFFFFFFFFFFFFFF0 ) ),
mkexpr( vA ) ) ); // ignore sign
- sign_digitA = binop( Iop_And64, mkU64( 0xF ),
- unop( Iop_V128to64, mkexpr( vA ) ) );
+ sign_digitA = binop( Iop_And32, mkU32( 0xF ),
+ unop( Iop_64to32,
+ unop( Iop_V128to64, mkexpr( vA ) ) ) );
- signA = mkOR1( binop( Iop_CmpEQ64,
+ signA = mkOR1( binop( Iop_CmpEQ32,
sign_digitA,
- mkU64 ( 0xB ) ),
- binop( Iop_CmpEQ64,
+ mkU32 ( 0xB ) ),
+ binop( Iop_CmpEQ32,
sign_digitA,
- mkU64 ( 0xD ) ) );
+ mkU32 ( 0xD ) ) );
negA = mkAND1( signA, mkNOT1( zeroA ) );
-
/* Pos position AKA gt = 1 if ((not neg) & (not eq zero)) */
posA = mkAND1( mkNOT1( signA ), mkNOT1( zeroA ) );
@@ -25372,22 +25464,35 @@
mkU64( 0xFFFFFFFFFFFFFFFF ),
mkU64( 0xFFFFFFFFFFFFFFF0 ) ),
mkexpr( vB ) ) ); // ignore sign
- sign_digitB = binop( Iop_And64, mkU64( 0xF ),
- unop( Iop_V128to64, mkexpr( vB ) ) );
+ sign_digitB = binop( Iop_And32, mkU32( 0xF ),
+ unop( Iop_64to32,
+ unop( Iop_V128to64, mkexpr( vB ) ) ) );
- signB = mkOR1( binop( Iop_CmpEQ64,
+ signB = mkOR1( binop( Iop_CmpEQ32,
sign_digitB,
- mkU64 ( 0xB ) ),
- binop( Iop_CmpEQ64,
+ mkU32 ( 0xB ) ),
+ binop( Iop_CmpEQ32,
sign_digitB,
- mkU64 ( 0xD ) ) );
+ mkU32 ( 0xD ) ) );
negB = mkAND1( signB, mkNOT1( zeroB ) );
+
/* Pos position AKA gt = 1 if ((not neg) & (not eq zero)) */
posB = mkAND1( mkNOT1( signB ), mkNOT1( zeroB ) );
- res_smaller = mkAND1( CmpGT128U( mkexpr( vA ), mkexpr( dst ) ),
- CmpGT128U( mkexpr( vB ), mkexpr( dst ) ) );
+
+ if (mode64) {
+ res_smaller = mkAND1( CmpGT128U( mkexpr( vA ), mkexpr( dst ) ),
+ CmpGT128U( mkexpr( vB ), mkexpr( dst ) ) );
+
+ } else {
+ /* Have to do this with 32-bit compares, expensive */
+ res_smaller = mkAND1( UNSIGNED_CMP_GT_V128( mkexpr( vA ),
+ mkexpr( dst ) ),
+ UNSIGNED_CMP_GT_V128( mkexpr( vB ),
+ mkexpr( dst ) ) );
+ }
+
if ( opc2 == 0x1) {
/* Overflow for Add can only occur if the signs of the operands
* are the same and the two operands are non-zero. On overflow,
Modified: trunk/priv/host_ppc_isel.c
==============================================================================
--- trunk/priv/host_ppc_isel.c (original)
+++ trunk/priv/host_ppc_isel.c Tue Oct 18 16:52:09 2016
@@ -3329,6 +3329,36 @@
return;
}
+ /* --------- CCALL --------- */
+ if(e->tag == Iex_CCall) {
+ IRType ty = typeOfIRExpr(env->type_env,e);
+ Bool mode64 = env->mode64;
+
+ vassert(ty == e->Iex.CCall.retty); /* well-formedness of IR */
+
+ /* be very restrictive for now. Only 32-bit ints allowed for
+ args, and 32 bits or host machine word for return type. */
+ vassert(!(ty == Ity_I32 || (mode64 && ty == Ity_I64)));
+
+ /* Marshal args, do the call, clear stack. */
+ UInt addToSp = 0;
+ RetLoc rloc = mk_RetLoc_INVALID();
+ doHelperCall( &addToSp, &rloc, env, NULL/*guard*/,
+ e->Iex.CCall.cee, e->Iex.CCall.retty, e->Iex.CCall.args,
+ IEndianess );
+ vassert(is_sane_RetLoc(rloc));
+
+ vassert(rloc.pri == RLPri_2Int);
+ vassert(addToSp == 0);
+
+ /* GPR3 now holds the destination address from Pin_Goto */
+ HReg r_dst = newVRegI(env);
+ addInstr(env, mk_iMOVds_RR(r_dst, hregPPC_GPR3(mode64)));
+ *rHi = r_dst;
+ *rLo = r_dst;
+ return;
+ }
+
/* 64-bit ITE */
if (e->tag == Iex_ITE) { // VFD
HReg e0Lo, e0Hi, eXLo, eXHi;
|
|
From: Christian B. <bor...@de...> - 2016-10-18 10:26:36
|
Julian, after you have picked several commits (all look good, thanks), are you going to send out a new beta or rc tarball before the release? Christian |
|
From: Ivo R. <iv...@iv...> - 2016-10-18 07:09:39
|
2016-10-14 19:20 GMT+02:00 Petar Jovanovic <mip...@gm...>: > On Sat, Oct 8, 2016 at 8:08 PM, Ivo Raisr <iv...@iv...> wrote: > > Dear developers, > > > > Johan van Selst recently announced on fosdem alias that we have a dev > room > > at FOSDEM 2017. > > He also said this will be announced shortly on FOSDEM website. > > Here is the devroom link: > https://fosdem.org/2017/schedule/track/valgrind/ And the corresponding Call for Participation: https://lists.fosdem.org/pipermail/fosdem/2016-October/002467.html linked from: https://fosdem.org/2017/news/2016-10-10-accepted-developer-rooms/ I. |
|
From: Julian S. <js...@ac...> - 2016-10-18 06:23:06
|
Rhys, Sorry for the delay on merging. I just merged r15976 into the 3.12 branch, as r16071. It wasn't clear to me to what extent it will be possible to merge future Sierra support patches into the branch after release, at low risk, and to what extent 15976 actually gives usable Sierra support right now. But on looking at 15976 it looks pretty harmless, so I merged it. J On 08/10/16 16:24, Rhys Kidd wrote: > On 7 October 2016 at 15:17, osjup <dam...@gm...> wrote: > >> Julian Seward-2 wrote >>> Details of what's new in 3.12.0 will be in the NEWS file, >>> although that is somewhat incomplete at present. Some of the >>> highlights are: >>> ... >>> - Preliminary support for macOS 10.12 (Sierra) >> >> Preliminary support means I should already be able to use it, with the >> 'risk' of having some bugs right? Or it's not yet the point? >> Because when I'm trying just to configure it on my 10.12 I get this error: >> >>> configure: error: Valgrind works on Darwin 10.x, 11.x, 12.x, 13.x, 14.x >>> and 15.x (Mac OS X 10.6/7/8/9/10/11) >> >> Not sure whether it was meant to be like that in this beta, or not, so I >> thought I would just let you know. >> >> > Thanks for this report Damian. > > The macOS 10.12 (Sierra) support patch is indeed not in BETA1, although the > email cover note mentions it as coming in 3.12 final causing potential > confusion. > > Julian, it appears that r15976 has not yet made its way to the > 3_12_BRANCHes. > > Regards, > Rhys > > >> >> -- >> View this message in context: http://valgrind.10908.n7. >> nabble.com/Valgrind-3-12-0-BETA-is-available-for-testing- >> tp56801p56860.html >> Sent from the Valgrind - Dev mailing list archive at Nabble.com. >> >> ------------------------------------------------------------ >> ------------------ >> Check out the vibrant tech community on one of the world's most >> engaging tech sites, SlashDot.org! http://sdm.link/slashdot >> _______________________________________________ >> Valgrind-developers mailing list >> Val...@li... >> https://lists.sourceforge.net/lists/listinfo/valgrind-developers >> > > > > ------------------------------------------------------------------------------ > Check out the vibrant tech community on one of the world's most > engaging tech sites, SlashDot.org! http://sdm.link/slashdot > > > > _______________________________________________ > Valgrind-developers mailing list > Val...@li... > https://lists.sourceforge.net/lists/listinfo/valgrind-developers > |
|
From: <sv...@va...> - 2016-10-18 06:18:20
|
Author: sewardj
Date: Tue Oct 18 07:18:10 2016
New Revision: 16071
Log:
Merge from trunk:
15976 Prelim support for macOS Sierra (10.12). Partial fix for #365327.
Added:
branches/VALGRIND_3_12_BRANCH/darwin16.supp
- copied unchanged from r15976, trunk/darwin16.supp
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/Makefile.am
branches/VALGRIND_3_12_BRANCH/NEWS (contents, props changed)
branches/VALGRIND_3_12_BRANCH/configure.ac
branches/VALGRIND_3_12_BRANCH/coregrind/fixup_macho_loadcmds.c
branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-amd64-darwin.c
branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-x86-darwin.c
branches/VALGRIND_3_12_BRANCH/include/vki/vki-scnums-darwin.h
Modified: branches/VALGRIND_3_12_BRANCH/Makefile.am
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/Makefile.am (original)
+++ branches/VALGRIND_3_12_BRANCH/Makefile.am Tue Oct 18 07:18:10 2016
@@ -47,6 +47,7 @@
darwin9.supp darwin9-drd.supp \
darwin10.supp darwin10-drd.supp \
darwin11.supp darwin12.supp darwin13.supp darwin14.supp darwin15.supp \
+ darwin16.supp \
bionic.supp \
solaris11.supp solaris12.supp
DEFAULT_SUPP_FILES = @DEFAULT_SUPP@
Modified: branches/VALGRIND_3_12_BRANCH/NEWS
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/NEWS (original)
+++ branches/VALGRIND_3_12_BRANCH/NEWS Tue Oct 18 07:18:10 2016
@@ -4,6 +4,8 @@
* ================== PLATFORM CHANGES =================
+* Preliminary support for macOS 10.12 (Sierra) has been added.
+
* ==================== TOOL CHANGES ====================
* Memcheck:
Modified: branches/VALGRIND_3_12_BRANCH/configure.ac
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/configure.ac (original)
+++ branches/VALGRIND_3_12_BRANCH/configure.ac Tue Oct 18 07:18:10 2016
@@ -353,6 +353,7 @@
AC_DEFINE([DARWIN_10_9], 100900, [DARWIN_VERS value for Mac OS X 10.9])
AC_DEFINE([DARWIN_10_10], 101000, [DARWIN_VERS value for Mac OS X 10.10])
AC_DEFINE([DARWIN_10_11], 101100, [DARWIN_VERS value for Mac OS X 10.11])
+ AC_DEFINE([DARWIN_10_12], 101200, [DARWIN_VERS value for macOS 10.12])
AC_MSG_CHECKING([for the kernel version])
kernel=`uname -r`
@@ -416,9 +417,15 @@
DEFAULT_SUPP="darwin15.supp ${DEFAULT_SUPP}"
DEFAULT_SUPP="darwin10-drd.supp ${DEFAULT_SUPP}"
;;
+ 16.*)
+ AC_MSG_RESULT([Darwin 16.x (${kernel}) / macOS 10.12 Sierra])
+ AC_DEFINE([DARWIN_VERS], DARWIN_10_12, [Darwin / Mac OS X version])
+ DEFAULT_SUPP="darwin16.supp ${DEFAULT_SUPP}"
+ DEFAULT_SUPP="darwin10-drd.supp ${DEFAULT_SUPP}"
+ ;;
*)
AC_MSG_RESULT([unsupported (${kernel})])
- AC_MSG_ERROR([Valgrind works on Darwin 10.x, 11.x, 12.x, 13.x, 14.x and 15.x (Mac OS X 10.6/7/8/9/10/11)])
+ AC_MSG_ERROR([Valgrind works on Darwin 10.x, 11.x, 12.x, 13.x, 14.x, 15.x and 16.x (Mac OS X 10.6/7/8/9/10/11 and macOS 10.12)])
;;
esac
;;
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/fixup_macho_loadcmds.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/fixup_macho_loadcmds.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/fixup_macho_loadcmds.c Tue Oct 18 07:18:10 2016
@@ -122,7 +122,7 @@
#if DARWIN_VERS != DARWIN_10_5 && DARWIN_VERS != DARWIN_10_6 \
&& DARWIN_VERS != DARWIN_10_7 && DARWIN_VERS != DARWIN_10_8 \
&& DARWIN_VERS != DARWIN_10_9 && DARWIN_VERS != DARWIN_10_10 \
- && DARWIN_VERS != DARWIN_10_11
+ && DARWIN_VERS != DARWIN_10_11 && DARWIN_VERS != DARWIN_10_12
# error "Unknown DARWIN_VERS value. This file only compiles on Darwin."
#endif
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-amd64-darwin.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-amd64-darwin.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-amd64-darwin.c Tue Oct 18 07:18:10 2016
@@ -479,7 +479,10 @@
UWord magic_delta = 0;
# elif DARWIN_VERS == DARWIN_10_7 || DARWIN_VERS == DARWIN_10_8
UWord magic_delta = 0x60;
-# elif DARWIN_VERS == DARWIN_10_9 || DARWIN_VERS == DARWIN_10_10 || DARWIN_VERS == DARWIN_10_11
+# elif DARWIN_VERS == DARWIN_10_9 \
+ || DARWIN_VERS == DARWIN_10_10 \
+ || DARWIN_VERS == DARWIN_10_11 \
+ || DARWIN_VERS == DARWIN_10_12
UWord magic_delta = 0xE0;
# else
# error "magic_delta: to be computed on new OS version"
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-x86-darwin.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-x86-darwin.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/m_syswrap/syswrap-x86-darwin.c Tue Oct 18 07:18:10 2016
@@ -427,7 +427,10 @@
UWord magic_delta = 0;
# elif DARWIN_VERS == DARWIN_10_7 || DARWIN_VERS == DARWIN_10_8
UWord magic_delta = 0x48;
-# elif DARWIN_VERS == DARWIN_10_9 || DARWIN_VERS == DARWIN_10_10 || DARWIN_VERS == DARWIN_10_11
+# elif DARWIN_VERS == DARWIN_10_9 \
+ || DARWIN_VERS == DARWIN_10_10 \
+ || DARWIN_VERS == DARWIN_10_11 \
+ || DARWIN_VERS == DARWIN_10_12
UWord magic_delta = 0xB0;
# else
# error "magic_delta: to be computed on new OS version"
Modified: branches/VALGRIND_3_12_BRANCH/include/vki/vki-scnums-darwin.h
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/include/vki/vki-scnums-darwin.h (original)
+++ branches/VALGRIND_3_12_BRANCH/include/vki/vki-scnums-darwin.h Tue Oct 18 07:18:10 2016
@@ -756,6 +756,32 @@
/* 499 */
#endif /* DARWIN_VERS >= DARWIN_10_11 */
+// TODO Update with macOS 10.12 kernel (xnu) source code release
+#if DARWIN_VERS >= DARWIN_10_12
+ /* 500 */
+ /* 501 */
+ /* 502 */
+ /* 503 */
+ /* 504 */
+ /* 505 */
+ /* 506 */
+ /* 507 */
+ /* 508 */
+ /* 509 */
+ /* 510 */
+ /* 511 */
+ /* 512 */
+ /* 513 */
+ /* 514 */
+ /* 515 */
+ /* 516 */
+ /* 517 */
+ /* 518 */
+ /* 519 */
+ /* 520 */
+ /* 521 */
+#endif /* DARWIN_VERS >= DARWIN_10_12 */
+
#if DARWIN_VERS < DARWIN_10_6
#define __NR_MAXSYSCALL VG_DARWIN_SYSCALL_CONSTRUCT_UNIX(427)
#elif DARWIN_VERS < DARWIN_10_7
@@ -768,6 +794,9 @@
#define __NR_MAXSYSCALL VG_DARWIN_SYSCALL_CONSTRUCT_UNIX(490)
#elif DARWIN_VERS == DARWIN_10_11
#define __NR_MAXSYSCALL VG_DARWIN_SYSCALL_CONSTRUCT_UNIX(500)
+#elif DARWIN_VERS == DARWIN_10_12
+// TODO Confirm against final release
+#define __NR_MAXSYSCALL VG_DARWIN_SYSCALL_CONSTRUCT_UNIX(522)
#else
#error unknown darwin version
#endif
|
|
From: Julian S. <js...@ac...> - 2016-10-18 05:55:14
|
On 15/10/16 17:36, Ivo Raisr wrote: > 2016-10-15 15:01 GMT+02:00 Philippe Waroquiers < > phi...@sk...>: > >> Quadratic aspect of meta pool fixed in r16041 >> Renamed macro and clarified documentation in r16042. And merged into the branch, 16067/8/9. > Thank you very much for providing such nice explanation about implicit > relation between first and second level blocks in a metapool when various > flags are in effect. Now the documentation clearly describes what the > implementation does. Yes, indeed! J |
|
From: Julian S. <js...@ac...> - 2016-10-18 05:50:09
|
Hi Andreas, > I'd like the fix for Bug 369439 to be merged. It consists of the > following commits by Christian Bornträger: > > VEX r3259 > Valgrind r16027 > Valgrind r16028 > Valgrind r16029 Merged. Thanks for the fixes. J |
|
From: <sv...@va...> - 2016-10-18 05:39:35
|
Author: sewardj
Date: Tue Oct 18 06:39:28 2016
New Revision: 16070
Log:
Update merge status info.
Modified:
trunk/docs/internals/3_11_BUGSTATUS.txt
Modified: trunk/docs/internals/3_11_BUGSTATUS.txt
==============================================================================
--- trunk/docs/internals/3_11_BUGSTATUS.txt (original)
+++ trunk/docs/internals/3_11_BUGSTATUS.txt Tue Oct 18 06:39:28 2016
@@ -340,7 +340,7 @@
val 15963 is a copy of trunk 15962
-TO MERGE (trunk -> 3_12_BRANCH unless otherwise indicated):
+MERGED (trunk -> 3_12_BRANCH unless otherwise indicated):
15966 -> 15967 a missing helgrind test file
15968 -> 15969 Add none/tests/ppc64/ppc64_helpers.h to noinst_HEADERS.
@@ -398,41 +398,51 @@
16005 mips: update svn:ignore list
16006 -> 16022 dhat: add "tot-blocks-allocd" metric
+16018 -> 16047 mips: replace use of (d)addi with (d)addiu
+3257 -> 3264 Relax the overly-restrictive implementation of (T3) SUB{S}.W Rd,
+ SP, Rm, {shift}. #354274
-16018 M mips: replace use of (d)addi with (d)addiu
-3257 M Relax the overly-restrictive implementation of (T3) SUB{S}.W Rd,
- SP, Rm, {shift}. #354274
16023 Update 3_11_BUGSTATUS.txt
-16024 M Fix n-i-bz bug in auto free pool: a block using the last byte
- of the meta pool was not auto-freed.
-16025 M Add a warning to the get/set_thread_area wrapper for bad info pointers.
-3258 M mips: remove support for mfc0/dmfc0
-16026 M mips32: fix the wrong offset for mmap2()
-3259 M s390: support RISBLG/RISBHG, MVCIN, LDE/LDER
-16027 M s390: support RISBLG/RISBHG, MVCIN, LDE/LDER
-16028 M s390/highword fix compile warning with some compilers
-16029 M actually test high-word by providing the plumbing...
-16030 M fix building the dfp testcase
-16031 M mips32: add pselect6 to the list of supported syscalls
-3260 M ISA 3.0 BE fixes for various new instructions
-16032 M ISA 3.0 BE testsuite fixes
-16033 M Fix some (small) leaks found by self-hosting valgrind
-16034 M Power configure fixes.
-16035 M Update NEWS file for bugzillas 369175 and 370265
-16036 M Fix corruption introduced by revision 16033
-16037 M Fix for missing ISA changes in HW cap stuff needs updating patch
-16038 M mips: clear fcc bits in fcsr after calling printf()
-3261 M mips: allow VEX to be compiled for soft-float
-16039 M mips: allow Valgrind to be compiled for soft-float
-3262 M mips: fix incorrect implementation of luxc1/suxc1 instructions
-16040 M mips32: add the test cases for luxc1/suxc1 instructions
-3263 M mips64: fix error introduced by r3262
-16041 M fix 369468 Remove quadratic metapool alg. using VG_(HT_remove_at_Iter)(VgHashTable *table)
-16042 M Clarify name and description/manual for meta mempool
-16043 M Introduce leak-pool-3.* back into EXTRA_DIST as they are not related
-to leak-autofreepool tests. This is a follow up fix for r16042.
-16044 M Further fixes following fix of leak in 16033
-16045 M Follow up for r16044. Fix compilation problem on Solaris.
+
+16024 -> 16048 Fix n-i-bz bug in auto free pool: a block using the last byte
+ of the meta pool was not auto-freed.
+16025 -> 16049 Add a warning to the get/set_thread_area wrapper
+ for bad info pointers.
+3258 -> 3265 mips: remove support for mfc0/dmfc0
+16026 -> 16050 mips32: fix the wrong offset for mmap2()
+3259 -> 3266 s390: support RISBLG/RISBHG, MVCIN, LDE/LDER
+16027 -> 16051 s390: support RISBLG/RISBHG, MVCIN, LDE/LDER
+16028 -> 16052 s390/highword fix compile warning with some compilers
+16029 -> 16053 actually test high-word by providing the plumbing...
+16030 -> 16054 fix building the dfp testcase
+16031 -> 16055 mips32: add pselect6 to the list of supported syscalls
+
+3260 -> 3267 ISA 3.0 BE fixes for various new instructions
+16032 -> 16056 ISA 3.0 BE testsuite fixes
+16034 -> 16057 Power configure fixes.
+16035 -> 16058 Update NEWS file for bugzillas 369175 and 370265
+16037 -> 16059 Fix for missing ISA changes in HW cap stuff needs updating patch
+
+16033 -> 16060 Fix some (small) leaks found by self-hosting valgrind
+16036 -> 16061 Fix corruption introduced by revision 16033
+16044 -> 16062 Further fixes following fix of leak in 16033
+16045 -> 16063 Follow up for r16044. Fix compilation problem on Solaris.
+
+16038 -> 16064 mips: clear fcc bits in fcsr after calling printf()
+
+3261 -> 3268 mips: allow VEX to be compiled for soft-float
+16039 -> 16065 mips: allow Valgrind to be compiled for soft-float
+
+3262 -> 3269 mips: fix incorrect implementation of luxc1/suxc1 instructions
+3263 -> 3270 mips64: fix error introduced by r3262
+16040 -> 16066 mips32: add the test cases for luxc1/suxc1 instructions
+
+16041 -> 16067 fix 369468 Remove quadratic metapool alg.
+ using VG_(HT_remove_at_Iter)(VgHashTable *table)
+16042 -> 16068 Clarify name and description/manual for meta mempool
+16043 -> 16069 Introduce leak-pool-3.* back into EXTRA_DIST as they are not
+ related to leak-autofreepool tests. This is a follow up
+ fix for r16042.
(tracked up to and including 16045/3263)
|
|
From: <sv...@va...> - 2016-10-18 05:28:41
|
Author: sewardj
Date: Tue Oct 18 06:28:35 2016
New Revision: 16069
Log:
Merge from trunk:
16043 Introduce leak-pool-3.* back into EXTRA_DIST as they are not related
to leak-autofreepool tests. This is a follow up fix for r16042.
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/memcheck/tests/Makefile.am
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/tests/Makefile.am
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/tests/Makefile.am (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/tests/Makefile.am Tue Oct 18 06:28:35 2016
@@ -153,6 +153,7 @@
leak-pool-0.vgtest leak-pool-0.stderr.exp \
leak-pool-1.vgtest leak-pool-1.stderr.exp \
leak-pool-2.vgtest leak-pool-2.stderr.exp \
+ leak-pool-3.vgtest leak-pool-3.stderr.exp \
leak-pool-4.vgtest leak-pool-4.stderr.exp \
leak-pool-5.vgtest leak-pool-5.stderr.exp \
leak-autofreepool-0.vgtest leak-autofreepool-0.stderr.exp \
|
|
From: <sv...@va...> - 2016-10-18 05:27:16
|
Author: sewardj
Date: Tue Oct 18 06:27:07 2016
New Revision: 16068
Log:
Merge from trunk:
16042 Clarify name and description/manual for meta mempool
Removed:
branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool-3.stderr.exp
branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool-3.vgtest
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/include/valgrind.h
branches/VALGRIND_3_12_BRANCH/memcheck/docs/mc-manual.xml
branches/VALGRIND_3_12_BRANCH/memcheck/mc_malloc_wrappers.c
branches/VALGRIND_3_12_BRANCH/memcheck/tests/Makefile.am
branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool.c
Modified: branches/VALGRIND_3_12_BRANCH/include/valgrind.h
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/include/valgrind.h (original)
+++ branches/VALGRIND_3_12_BRANCH/include/valgrind.h Tue Oct 18 06:27:07 2016
@@ -7009,21 +7009,37 @@
VALGRIND_DO_CLIENT_REQUEST_STMT(VG_USERREQ__CREATE_MEMPOOL, \
pool, rzB, is_zeroed, 0, 0)
-/* Create a memory pool with special flags. When the VALGRIND_MEMPOOL_AUTO_FREE
- is passed, a MEMPOOL_DELETE will auto-free all chunks (so not reported as
- leaks) for allocators that assume that destroying a pool destroys all
- objects in the pool. When VALGRIND_MEMPOOL_METAPOOL is passed, the custom
- allocator uses the pool blocks as superblocks to dole out MALLOC_LIKE blocks.
- The resulting behaviour would normally be classified as overlapping blocks,
- and cause assert-errors in valgrind.
- These 2 MEMPOOL flags can be OR-ed together into the "flags" argument.
+/* Create a memory pool with some flags specifying extended behaviour.
When flags is zero, the behaviour is identical to VALGRIND_CREATE_MEMPOOL.
+
+ The flag VALGRIND_MEMPOOL_METAPOOL specifies that the pieces of memory
+ associated with the pool using VALGRIND_MEMPOOL_ALLOC will be used
+ by the application as superblocks to dole out MALLOC_LIKE blocks using
+ VALGRIND_MALLOCLIKE_BLOCK. In other words, a meta pool is a "2 levels"
+ pool : first level is the blocks described by VALGRIND_MEMPOOL_ALLOC.
+ The second level blocks are described using VALGRIND_MALLOCLIKE_BLOCK.
+ Note that the association between the pool and the second level blocks
+ is implicit : second level blocks will be located inside first level
+ blocks. It is necessary to use the VALGRIND_MEMPOOL_METAPOOL flag
+ for such 2 levels pools, as otherwise valgrind will detect overlapping
+ memory blocks, and will abort execution (e.g. during leak search).
+
+ Such a meta pool can also be marked as an 'auto free' pool using the flag
+ VALGRIND_MEMPOOL_AUTO_FREE, which must be OR-ed together with the
+ VALGRIND_MEMPOOL_METAPOOL. For an 'auto free' pool, VALGRIND_MEMPOOL_FREE
+ will automatically free the second level blocks that are contained
+ inside the first level block freed with VALGRIND_MEMPOOL_FREE.
+ In other words, calling VALGRIND_MEMPOOL_FREE will cause implicit calls
+ to VALGRIND_FREELIKE_BLOCK for all the second level blocks included
+ in the first level block.
+ Note: it is an error to use the VALGRIND_MEMPOOL_AUTO_FREE flag
+ without the VALGRIND_MEMPOOL_METAPOOL flag.
*/
#define VALGRIND_MEMPOOL_AUTO_FREE 1
#define VALGRIND_MEMPOOL_METAPOOL 2
-#define VALGRIND_CREATE_META_MEMPOOL(pool, rzB, is_zeroed, flags) \
- VALGRIND_DO_CLIENT_REQUEST_STMT(VG_USERREQ__CREATE_MEMPOOL, \
- pool, rzB, is_zeroed, flags, 0)
+#define VALGRIND_CREATE_MEMPOOL_EXT(pool, rzB, is_zeroed, flags) \
+ VALGRIND_DO_CLIENT_REQUEST_STMT(VG_USERREQ__CREATE_MEMPOOL, \
+ pool, rzB, is_zeroed, flags, 0)
/* Destroy a memory pool. */
#define VALGRIND_DESTROY_MEMPOOL(pool) \
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/docs/mc-manual.xml
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/docs/mc-manual.xml (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/docs/mc-manual.xml Tue Oct 18 06:27:07 2016
@@ -2320,34 +2320,53 @@
</listitem>
<listitem>
+ <!-- Note: the below is mostly a copy of valgrind.h. Keep in sync! -->
<para>
- <varname>VALGRIND_CREATE_META_MEMPOOL(pool, rzB, is_zeroed, flags)</varname>:
- This does the same as <varname>VALGRIND_CREATE_MEMPOOL</varname>,
- but allows you to specify two seldom-used options for custom
- allocators (or-ed together) in the <varname>flags</varname> argument:</para>
+ <varname>VALGRIND_CREATE_MEMPOOL_EXT(pool, rzB, is_zeroed, flags)</varname>:
+ Create a memory pool with some flags (that can
+ be OR-ed together) specifying extended behaviour. When flags is
+ zero, the behaviour is identical to
+ <varname>VALGRIND_CREATE_MEMPOOL</varname>.</para>
<itemizedlist>
<listitem>
- <para>
- <varname>VALGRIND_MEMPOOL_AUTO_FREE</varname>.
- This indicates that items allocated from this
- memory pool are automatically freed when
- <varname>VALGRIND_MEMPOOL_FREE</varname>
- is used on a block. This allows a custom allocator to delete
- (part of) a memory pool without explicitly deleting all allocated
- items. Without this option, such an action will report all items
- in the pool as memory leaks.
+ <para> The flag <varname>VALGRIND_MEMPOOL_METAPOOL</varname>
+ specifies that the pieces of memory associated with the pool
+ using <varname>VALGRIND_MEMPOOL_ALLOC</varname> will be used
+ by the application as superblocks to dole out MALLOC_LIKE
+ blocks using <varname>VALGRIND_MALLOCLIKE_BLOCK</varname>.
+ In other words, a meta pool is a "2 levels" pool : first
+ level is the blocks described
+ by <varname>VALGRIND_MEMPOOL_ALLOC</varname>. The second
+ level blocks are described
+ using <varname>VALGRIND_MALLOCLIKE_BLOCK</varname>. Note
+ that the association between the pool and the second level
+ blocks is implicit : second level blocks will be located
+ inside first level blocks. It is necessary to use
+ the <varname>VALGRIND_MEMPOOL_METAPOOL</varname> flag for
+ such 2 levels pools, as otherwise valgrind will detect
+ overlapping memory blocks, and will abort execution
+ (e.g. during leak search).
</para>
</listitem>
<listitem>
<para>
- <varname>VALGRIND_MEMPOOL_METAPOOL</varname>.
- This indicates that memory that has been
- marked as being allocated with
- <varname>VALGRIND_MALLOCLIKE_BLOCK</varname> is used
- by a custom allocator to pass out memory to an application (again
- marked with <varname>VALGRIND_MALLOCLIKE_BLOCK</varname>).
- Without this option, such overlapping memory blocks may trigger
- a fatal error message in memcheck.
+ <varname>VALGRIND_MEMPOOL_AUTO_FREE</varname>. Such a meta
+ pool can also be marked as an 'auto free' pool using the
+ flag <varname>VALGRIND_MEMPOOL_AUTO_FREE</varname>, which
+ must be OR-ed together with
+ the <varname>VALGRIND_MEMPOOL_METAPOOL</varname>. For an
+ 'auto free' pool, <varname>VALGRIND_MEMPOOL_FREE</varname>
+ will automatically free the second level blocks that are
+ contained inside the first level block freed
+ with <varname>VALGRIND_MEMPOOL_FREE</varname>. In other
+ words, calling <varname>VALGRIND_MEMPOOL_FREE</varname> will
+ cause implicit calls
+ to <varname>VALGRIND_FREELIKE_BLOCK</varname> for all the
+ second level blocks included in the first level block.
+ Note: it is an error to use
+ the <varname>VALGRIND_MEMPOOL_AUTO_FREE</varname> flag
+ without the
+ <varname>VALGRIND_MEMPOOL_METAPOOL</varname> flag.
</para>
</listitem>
</itemizedlist>
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/mc_malloc_wrappers.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/mc_malloc_wrappers.c (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/mc_malloc_wrappers.c Tue Oct 18 06:27:07 2016
@@ -711,12 +711,17 @@
{
MC_Mempool* mp;
- if (VG_(clo_verbosity) > 2) {
+ if (VG_(clo_verbosity) > 2 || (auto_free && !metapool)) {
VG_(message)(Vg_UserMsg,
- "create_mempool(0x%lx, rzB=%u, zeroed=%d, autofree=%d, metapool=%d)\n",
- pool, rzB, is_zeroed, auto_free, metapool);
+ "create_mempool(0x%lx, rzB=%u, zeroed=%d,"
+ " autofree=%d, metapool=%d)\n",
+ pool, rzB, is_zeroed,
+ auto_free, metapool);
VG_(get_and_pp_StackTrace)
(VG_(get_running_tid)(), MEMPOOL_DEBUG_STACKTRACE_DEPTH);
+ if (auto_free && !metapool)
+ VG_(tool_panic)("Inappropriate use of mempool:"
+ " an auto free pool must be a meta pool. Aborting\n");
}
mp = VG_(HT_lookup)(MC_(mempool_list), (UWord)pool);
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/tests/Makefile.am
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/tests/Makefile.am (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/tests/Makefile.am Tue Oct 18 06:27:07 2016
@@ -153,13 +153,11 @@
leak-pool-0.vgtest leak-pool-0.stderr.exp \
leak-pool-1.vgtest leak-pool-1.stderr.exp \
leak-pool-2.vgtest leak-pool-2.stderr.exp \
- leak-pool-3.vgtest leak-pool-3.stderr.exp \
leak-pool-4.vgtest leak-pool-4.stderr.exp \
leak-pool-5.vgtest leak-pool-5.stderr.exp \
leak-autofreepool-0.vgtest leak-autofreepool-0.stderr.exp \
leak-autofreepool-1.vgtest leak-autofreepool-1.stderr.exp \
leak-autofreepool-2.vgtest leak-autofreepool-2.stderr.exp \
- leak-autofreepool-3.vgtest leak-autofreepool-3.stderr.exp \
leak-autofreepool-4.vgtest leak-autofreepool-4.stderr.exp \
leak-autofreepool-5.vgtest leak-autofreepool-5.stderr.exp \
leak-autofreepool-6.vgtest leak-autofreepool-6.stderr.exp \
Removed: branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool-3.stderr.exp
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool-3.stderr.exp (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool-3.stderr.exp (removed)
@@ -1,10 +0,0 @@
-
-
-HEAP SUMMARY:
- in use at exit: ... bytes in ... blocks
- total heap usage: ... allocs, ... frees, ... bytes allocated
-
-All heap blocks were freed -- no leaks are possible
-
-For counts of detected and suppressed errors, rerun with: -v
-ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
Removed: branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool-3.vgtest
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool-3.vgtest (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool-3.vgtest (removed)
@@ -1,4 +0,0 @@
-prog: leak-autofreepool
-vgopts: --leak-check=full --show-possibly-lost=no --track-origins=yes
-args: 3
-stderr_filter: filter_allocs
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool.c (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool.c Tue Oct 18 06:27:07 2016
@@ -7,7 +7,7 @@
#include "../memcheck.h"
-// Test VALGRIND_CREATE_META_MEMPOOL features, the VALGRIND_MEMPOOL_METAPOOL and
+// Test VALGRIND_CREATE_MEMPOOL_EXT features, the VALGRIND_MEMPOOL_METAPOOL and
// VALGRIND_MEMPOOL_AUTO_FREE flags.
// Also show that without these, having a custom allocator that:
// - Allocates a MEMPOOL
@@ -64,7 +64,7 @@
void create_meta_pool (void)
{
- VALGRIND_CREATE_META_MEMPOOL(MetaPool, 0, 0, MetaPoolFlags);
+ VALGRIND_CREATE_MEMPOOL_EXT(MetaPool, 0, 0, MetaPoolFlags);
VALGRIND_MEMPOOL_ALLOC(MetaPool, MetaBlock, POOL_BLOCK_SIZE);
MetaPool->buf = (uint8_t *) MetaBlock;
@@ -124,7 +124,7 @@
static void set_flags ( int n )
{
switch (n) {
- // Case 0: No special flags. VALGRIND_CREATE_META_MEMPOOL is same as
+ // Case 0: No special flags. VALGRIND_CREATE_MEMPOOL_EXT is same as
// VALGRIND_CREATE_MEMPOOL.
// When mempools are destroyed, the METAPOOL leaks because auto-free is
// missing. Must show 2*N (20) leaks.
@@ -148,13 +148,15 @@
// Same as before, but now the MALLOCLIKE blocks are auto-freed.
// Must show 0 leaks.
case 2:
- MetaPoolFlags = VALGRIND_MEMPOOL_AUTO_FREE | VALGRIND_MEMPOOL_METAPOOL;
+ MetaPoolFlags = VALGRIND_MEMPOOL_METAPOOL | VALGRIND_MEMPOOL_AUTO_FREE;
CleanupBeforeExit = 1;
break;
- case 3:
- // Just auto-free, with cleanup. The cleanup removes the overlapping
- // blocks, so this is the same as case 2: No leaks, no problems.
+ case 3: // Note: this is incorrect behaviour, and aborts valgrind.
+ // (so it is not exercised during regression testing).
+ // Just auto-free, not marked with meta pool flag.
+ // This is an error, and will cause valgrind to abort when the pool
+ // is created.
MetaPoolFlags = VALGRIND_MEMPOOL_AUTO_FREE;
CleanupBeforeExit = 1;
break;
@@ -185,7 +187,7 @@
// already done above) is by allocating lots of other chunks that are
// NOT part of the pool so the MC_Alloc lists contain other stuff.
// That will make the iterator find stuff AND skip stuff.
- MetaPoolFlags = VALGRIND_MEMPOOL_AUTO_FREE | VALGRIND_MEMPOOL_METAPOOL;
+ MetaPoolFlags = VALGRIND_MEMPOOL_METAPOOL | VALGRIND_MEMPOOL_AUTO_FREE;
CleanupBeforeExit = 1;
GenerateNoise = 1;
break;
@@ -314,9 +316,9 @@
pool_block_size = nr_elts * sizeof(struct cell) + sizeof(uint8_t) + 1;
// Create perf meta pool
- VALGRIND_CREATE_META_MEMPOOL
+ VALGRIND_CREATE_MEMPOOL_EXT
(&perf_meta_pool, 0, 0,
- VALGRIND_MEMPOOL_AUTO_FREE | VALGRIND_MEMPOOL_METAPOOL);
+ VALGRIND_MEMPOOL_METAPOOL | VALGRIND_MEMPOOL_AUTO_FREE);
perf_meta_block = malloc(pool_block_size);
VALGRIND_MEMPOOL_ALLOC(&perf_meta_pool, perf_meta_block,
|
|
From: <sv...@va...> - 2016-10-18 05:25:30
|
Author: sewardj
Date: Tue Oct 18 06:25:22 2016
New Revision: 16067
Log:
Merge from trunk:
16041 fix 369468 Remove quadratic metapool alg.
using VG_(HT_remove_at_Iter)(VgHashTable *table)
Added:
branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool-6.stderr.exp
- copied unchanged from r16041, trunk/memcheck/tests/leak-autofreepool-6.stderr.exp
branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool-6.vgtest
- copied unchanged from r16041, trunk/memcheck/tests/leak-autofreepool-6.vgtest
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/NEWS (contents, props changed)
branches/VALGRIND_3_12_BRANCH/coregrind/m_hashtable.c
branches/VALGRIND_3_12_BRANCH/include/pub_tool_hashtable.h
branches/VALGRIND_3_12_BRANCH/memcheck/mc_malloc_wrappers.c
branches/VALGRIND_3_12_BRANCH/memcheck/tests/Makefile.am
branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool.c
Modified: branches/VALGRIND_3_12_BRANCH/NEWS
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/NEWS (original)
+++ branches/VALGRIND_3_12_BRANCH/NEWS Tue Oct 18 06:25:22 2016
@@ -178,6 +178,7 @@
369000 AMD64 fma4 instructions unsupported.
361253 [s390x] ex_clone.c:42: undefined reference to `pthread_create'
369169 ppc64 fails jm_int_isa_2_07 test
+369175 jm_vec_isa_2_07 test crashes on ppc64
369209 valgrind loops and eats up all memory if cwd doesn't exist.
369356 pre_mem_read_sockaddr syscall wrapper can crash with bad sockaddr
369359 msghdr_foreachfield can crash when handling bad iovec
@@ -189,12 +190,14 @@
369441 bad lvec argument crashes process_vm_readv/writev syscall wrappers
369446 valgrind crashes on unknown fcntl command
369439 S390x: Unhandled insns RISBLG/RISBHG and LDE/LDER
-369175 jm_vec_isa_2_07 test crashes on ppc64
+369468 Remove quadratic metapool alg. using VG_(HT_remove_at_Iter)
+ (VgHashTable *table)
370265 ISA 3.0 HW cap stuff needs updating
n-i-bz Fix incorrect (or infinite loop) unwind on RHEL7 x86 and amd64
n-i-bz massif --pages-as-heap=yes does not report peak caused by mmap+munmap
-n-i-bz false positive leaks due to aspacemgr merging non heap segments with heap segments.
+n-i-bz false positive leaks due to aspacemgr merging non heap segments
+ with heap segments.
n-i-bz Fix ppoll_alarm exclusion on OS X
n-i-bz Document brk segment limitation, reference manual in limit reached msg.
n-i-bz Fix clobber list in none/tests/amd64/xacq_xrel.c [valgrind r15737]
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/m_hashtable.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/m_hashtable.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/m_hashtable.c Tue Oct 18 06:25:22 2016
@@ -365,7 +365,9 @@
vg_assert(table);
/* See long comment on HT_Next prototype in pub_tool_hashtable.h.
In short if this fails, it means the caller tried to modify the
- table whilst iterating over it, which is a bug. */
+ table whilst iterating over it, which is a bug.
+ One exception: HT_remove_at_Iter can remove the current entry and
+ leave the iterator in a valid state for HT_Next. */
vg_assert(table->iterOK);
if (table->iterNode && table->iterNode->next) {
@@ -383,6 +385,37 @@
return NULL;
}
+void VG_(HT_remove_at_Iter)(VgHashTable *table)
+{
+ vg_assert(table);
+ vg_assert(table->iterOK);
+ vg_assert(table->iterNode);
+
+ const UInt curChain = table->iterChain - 1; // chain of iterNode.
+
+
+ if (table->chains[curChain] == table->iterNode) {
+ /* iterNode is the first of its chain -> remove it from the chain. */
+ table->chains[curChain] = table->iterNode->next;
+ /* Setup the iterator to visit first node of curChain: */
+ table->iterNode = NULL;
+ table->iterChain = curChain;
+ } else {
+ /* iterNode is somewhere inside curChain chain */
+ VgHashNode* prev = table->chains[curChain];
+
+ while (prev->next != table->iterNode)
+ prev = prev->next;
+ /* Remove iterNode from the chain. */
+ prev->next = table->iterNode->next;
+ /* Setup the iterator to visit prev->next, which is the node
+ that was after the deleted node. */
+ table->iterNode = prev;
+ }
+
+ table->n_elements--;
+}
+
void VG_(HT_destruct)(VgHashTable *table, void(*freenode_fn)(void*))
{
UInt i;
Modified: branches/VALGRIND_3_12_BRANCH/include/pub_tool_hashtable.h
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/include/pub_tool_hashtable.h (original)
+++ branches/VALGRIND_3_12_BRANCH/include/pub_tool_hashtable.h Tue Oct 18 06:25:22 2016
@@ -121,6 +121,14 @@
assurance. */
extern void* VG_(HT_Next) ( VgHashTable *table );
+/* Remove the element pointed to by the iterator and leave the iterator
+ in a state where VG_(HT_Next) will return the element just after the removed
+ node.
+ This allows removing elements from the table whilst iterating over it.
+ Note that removing an entry does not resize the hash table, making this
+ safe. */
+extern void VG_(HT_remove_at_Iter)( VgHashTable *table );
+
/* Destroy a table and deallocates the memory used by the nodes using
freenode_fn.*/
extern void VG_(HT_destruct) ( VgHashTable *table, void(*freenode_fn)(void*) );
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/mc_malloc_wrappers.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/mc_malloc_wrappers.c (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/mc_malloc_wrappers.c Tue Oct 18 06:25:22 2016
@@ -681,7 +681,6 @@
{
MC_Chunk *mc;
ThreadId tid;
- Bool found;
tl_assert(mp->auto_free);
@@ -693,23 +692,18 @@
tid = VG_(get_running_tid)();
- do {
- found = False;
+ VG_(HT_ResetIter)(MC_(malloc_list));
+ while ( (mc = VG_(HT_Next)(MC_(malloc_list))) ) {
+ if (mc->data >= StartAddr && mc->data + mc->szB <= EndAddr) {
+ if (VG_(clo_verbosity) > 2) {
+ VG_(message)(Vg_UserMsg, "Auto-free of 0x%lx size=%lu\n",
+ mc->data, (mc->szB + 0UL));
+ }
- VG_(HT_ResetIter)(MC_(malloc_list));
- while (!found && (mc = VG_(HT_Next)(MC_(malloc_list))) ) {
- if (mc->data >= StartAddr && mc->data + mc->szB <= EndAddr) {
- if (VG_(clo_verbosity) > 2) {
- VG_(message)(Vg_UserMsg, "Auto-free of 0x%lx size=%lu\n",
- mc->data, (mc->szB + 0UL));
- }
-
- mc = VG_(HT_remove) ( MC_(malloc_list), (UWord) mc->data);
- die_and_free_mem(tid, mc, mp->rzB);
- found = True;
- }
+ VG_(HT_remove_at_Iter)(MC_(malloc_list));
+ die_and_free_mem(tid, mc, mp->rzB);
}
- } while (found);
+ }
}
void MC_(create_mempool)(Addr pool, UInt rzB, Bool is_zeroed,
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/tests/Makefile.am
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/tests/Makefile.am (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/tests/Makefile.am Tue Oct 18 06:25:22 2016
@@ -162,6 +162,7 @@
leak-autofreepool-3.vgtest leak-autofreepool-3.stderr.exp \
leak-autofreepool-4.vgtest leak-autofreepool-4.stderr.exp \
leak-autofreepool-5.vgtest leak-autofreepool-5.stderr.exp \
+ leak-autofreepool-6.vgtest leak-autofreepool-6.stderr.exp \
leak-tree.vgtest leak-tree.stderr.exp \
leak-segv-jmp.vgtest leak-segv-jmp.stderr.exp \
lks.vgtest lks.stdout.exp lks.supp lks.stderr.exp \
Modified: branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool.c (original)
+++ branches/VALGRIND_3_12_BRANCH/memcheck/tests/leak-autofreepool.c Tue Oct 18 06:25:22 2016
@@ -43,16 +43,22 @@
#define N 10
#define POOL_BLOCK_SIZE 4096
+#define NOISE_SIZE 256
+
// For easy testing, the plain mempool uses N allocations, the
// metapool 2 * N (so 10 reported leaks are from the plain pool, 20 must be
-// from the metapool.
+// from the metapool).
static int MetaPoolFlags = 0;
static int CleanupBeforeExit = 0;
+static int GenerateNoise = 0;
+static int NoiseCounter = 0;
static struct cell *cells_plain[2 * N];
static struct cell *cells_meta[2 * N];
+static unsigned char *noise[3 * N];
+
static char PlainBlock[POOL_BLOCK_SIZE];
static char MetaBlock[POOL_BLOCK_SIZE];
@@ -106,7 +112,7 @@
void *a = p->buf + p->used;
assert(p->used + n < p->allocated);
- // And this is custom allocator that knows what it is allocating from a pool.
+ // And this is custom allocator that knows that it is allocating from a pool.
VALGRIND_MEMPOOL_ALLOC(p, a, n);
p->used += n;
@@ -172,11 +178,49 @@
CleanupBeforeExit = 0;
break;
+ case 6:
+ // Test the VG_(HT_remove_at_Iter)() function, which removes a chunk
+ // from a hashlist without the need to reset the iterator. The pool
+ // is auto_freed, and the best test for the function (besides the ones
+ // already done above) is by allocating lots of other chunks that are
+ // NOT part of the pool so the MC_Alloc lists contain other stuff.
+ // That will make the iterator find stuff AND skip stuff.
+ MetaPoolFlags = VALGRIND_MEMPOOL_AUTO_FREE | VALGRIND_MEMPOOL_METAPOOL;
+ CleanupBeforeExit = 1;
+ GenerateNoise = 1;
+ break;
+
default:
assert(0);
}
}
+static void GenerateNoisyBit (void)
+{
+ // In case the HT_remove_at_Iter messes up the administration, the wrong
+ // blocks may be deleted from the list, making access to these noise-blocks
+ // invalid. So fill 256-byte blocks with easily tested contents.
+
+ noise[NoiseCounter] = malloc(NOISE_SIZE);
+ assert(noise[NoiseCounter] != NULL);
+ memset(noise[NoiseCounter],(unsigned char) (NoiseCounter % 256), NOISE_SIZE);
+ NoiseCounter++;
+}
+
+static void CheckNoiseContents (void)
+{
+ int i;
+
+ for (i = 0; i < NoiseCounter; i++) {
+ unsigned char Check = (unsigned char) ( i % 256);
+ int j;
+
+ for (j = 0; j < NOISE_SIZE; j++) {
+ assert(noise[i][j] == Check);
+ }
+ }
+}
+
int main( int argc, char** argv )
{
int arg;
@@ -195,11 +239,17 @@
// N plain allocs
for (i = 0; i < N; ++i) {
cells_plain[i] = allocate_plain_style(PlainPool,sizeof(struct cell));
+
+ if (GenerateNoise)
+ GenerateNoisyBit();
}
// 2*N meta allocs
for (i = 0; i < 2 * N; ++i) {
cells_meta[i] = allocate_meta_style(MetaPool,sizeof(struct cell));
+
+ if (GenerateNoise)
+ GenerateNoisyBit();
}
// Leak the memory from the pools by losing the pointers.
@@ -211,18 +261,43 @@
cells_meta[i] = NULL;
}
+ if (GenerateNoise)
+ CheckNoiseContents();
+
// This must free MALLOCLIKE allocations from the pool when
// VALGRIND_MEMPOOL_AUTO_FREE
// is set for the pool and report leaks when not.
+
if (CleanupBeforeExit) {
VALGRIND_MEMPOOL_FREE(MetaPool, MetaBlock);
- VALGRIND_DESTROY_MEMPOOL(MetaPool);
+
+ if (GenerateNoise)
+ CheckNoiseContents();
+
+ VALGRIND_DESTROY_MEMPOOL(MetaPool);
+
+ if (GenerateNoise)
+ CheckNoiseContents();
+
}
// Cleanup.
VALGRIND_DESTROY_MEMPOOL(PlainPool);
- // Perf test
+ if (GenerateNoise)
+ CheckNoiseContents();
+
+ // Try to trigger an error in the bookkeeping by freeing the noise bits.
+ // Valgrind should report no leaks, and zero memory in use. If the
+ // new HT_remove_at_Iter function would corrupt the bookkeeping in any
+ // way, this should bring it out!
+ if (GenerateNoise) {
+ for (i = 0; i < NoiseCounter; i++)
+ free(noise[i]);
+ }
+
+
+ // Perf test
if (argc == 3) {
struct pool perf_plain_pool;
void *perf_plain_block;
|
Author: sewardj
Date: Tue Oct 18 06:22:51 2016
New Revision: 16066
Log:
Merge from trunk:
16040 mips32: add the test cases for luxc1/suxc1 instructions
Added:
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.stdout.exp-mips32r2-fpu_64-BE
- copied unchanged from r16040, trunk/none/tests/mips32/vfp.stdout.exp-mips32r2-fpu_64-BE
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.stdout.exp-mips32r2-fpu_64-LE
- copied unchanged from r16040, trunk/none/tests/mips32/vfp.stdout.exp-mips32r2-fpu_64-LE
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/Makefile.am
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.c
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/Makefile.am
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/Makefile.am (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/Makefile.am Tue Oct 18 06:22:51 2016
@@ -6,10 +6,13 @@
EXTRA_DIST = \
block_size.stdout.exp block_size.stderr.exp block_size.vgtest \
branches.stdout.exp branches.stderr.exp branches.vgtest \
+ bug320057-mips32.stdout.exp bug320057-mips32.stderr.exp \
+ bug320057-mips32.vgtest \
change_fp_mode.stdout.exp change_fp_mode.stdout.exp-fpu32 \
- change_fp_mode.stderr.exp change_fp_mode.vgtest \
+ change_fp_mode.stderr.exp change_fp_mode.vgtest \
FPUarithmetic.stdout.exp FPUarithmetic.stdout.exp-mips32 \
FPUarithmetic.stderr.exp FPUarithmetic.vgtest \
+ fpu_branches.stdout.exp fpu_branches.stderr.exp fpu_branches.vgtest \
LoadStore.stdout.exp LoadStore.stdout.exp-BE LoadStore.stderr.exp \
LoadStore.vgtest \
LoadStore1.stdout.exp LoadStore1.stdout.exp-LE LoadStore1.stderr.exp \
@@ -18,27 +21,25 @@
MIPS32int.stdout.exp-mips32-BE MIPS32int.stdout.exp-mips32r2-BE \
MIPS32int.stdout.exp-mips32-LE MIPS32int.stdout.exp-mips32r2-LE \
MIPS32int.stderr.exp MIPS32int.vgtest \
+ mips32_dsp.stdout.exp-LE mips32_dsp.stdout.exp-BE \
+ mips32_dsp.stderr.exp mips32_dsp.vgtest \
+ mips32_dspr2.stdout.exp mips32_dspr2.stderr.exp \
+ mips32_dspr2.vgtest \
MoveIns.stdout.exp MoveIns.stdout.exp-BE \
MoveIns.stdout.exp-mips32r2-BE MoveIns.stdout.exp-mips32r2-LE \
MoveIns.stderr.exp MoveIns.vgtest \
+ round_fpu64.stdout.exp round_fpu64.stdout.exp-fpu32 \
+ round_fpu64.stderr.exp round_fpu64.vgtest \
round.stdout.exp round.stderr.exp round.vgtest \
- vfp.stdout.exp-mips32-BE vfp.stdout.exp-mips32r2-BE \
- vfp.stdout.exp-mips32-LE vfp.stdout.exp-mips32r2-LE vfp.stderr.exp \
- vfp.vgtest \
SignalException.stderr.exp SignalException.vgtest \
- bug320057-mips32.stdout.exp bug320057-mips32.stderr.exp \
- bug320057-mips32.vgtest \
- mips32_dsp.stdout.exp-LE mips32_dsp.stdout.exp-BE \
- mips32_dsp.stderr.exp mips32_dsp.vgtest \
- mips32_dspr2.stdout.exp mips32_dspr2.stderr.exp \
- mips32_dspr2.vgtest \
- unaligned_load_store.stdout.exp-LE unaligned_load_store.stdout.exp-BE \
- unaligned_load_store.stderr.exp unaligned_load_store.vgtest \
test_fcsr.stdout.exp test_fcsr.stderr.exp test_fcsr.vgtest \
test_math.stdout.exp test_math.stderr.exp test_math.vgtest \
- round_fpu64.stdout.exp round_fpu64.stdout.exp-fpu32 \
- round_fpu64.stderr.exp round_fpu64.vgtest \
- fpu_branches.stdout.exp fpu_branches.stderr.exp fpu_branches.vgtest
+ unaligned_load_store.stdout.exp-LE unaligned_load_store.stdout.exp-BE \
+ unaligned_load_store.stderr.exp unaligned_load_store.vgtest \
+ vfp.stdout.exp-mips32-BE vfp.stdout.exp-mips32r2-BE \
+ vfp.stdout.exp-mips32-LE vfp.stdout.exp-mips32r2-LE vfp.stderr.exp \
+ vfp.stdout.exp-mips32r2-fpu_64-BE vfp.stdout.exp-mips32r2-fpu_64-LE \
+ vfp.vgtest
check_PROGRAMS = \
allexec \
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.c (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.c Tue Oct 18 06:22:51 2016
@@ -1,5 +1,6 @@
#if defined(__mips_hard_float)
-
+#include <setjmp.h>
+#include <signal.h>
#include <stdint.h>
#include <stdio.h>
@@ -15,6 +16,18 @@
0x3FBF9ADD, 0x3746F65F
};
+long long meml[] = {
+ 0x236457894095A266, 0x7777777766666666,
+ 0xBFF00000aaaaccde, 0x0004563217800000,
+ 0x3FF0556644770000, 0x0002255889900000,
+ 0x25254123698a2e2b, 0x21a2b3d6f62d2d2a,
+ 0xFFaabb22ccFFFFFF, 0x542698eeFFFFFFFF,
+ 0x41D2658041D26580, 0xB487E5C9B487E5C9,
+ 0x420774411aa26580, 0xaabbccddB750E388,
+ 0xffffeeee3E45798E, 0xccccccccE2308C3A,
+ 0x123abb983FBF9ADD, 0x002255443746F65F
+};
+
float fs_f[] = {
0, 456.2489562, 3, -1,
1384.6, -7.2945676, 1000000000, -5786.47,
@@ -118,6 +131,22 @@
instruction, (uint32_t)out, (uint32_t)(out >> 32)); \
}
+// luxc1 $f0, $a3($v0)
+#define TESTINSN6LOADlu(instruction, indexVal, fd, index, base) \
+{ \
+ uint64_t out; \
+ __asm__ volatile( \
+ "move $" #base ", %0\n\t" \
+ "li $" #index ", " #indexVal"\n\t" \
+ instruction "\n\t" \
+ "sdc1 $"#fd ", 0(%1)" \
+ : : "r" (meml), "r" (&out) \
+ : #base, #index, "$"#fd, "memory" \
+ ); \
+ printf("%s :: ft lo: 0x%x, ft hi: 0x%x\n", \
+ instruction, (uint32_t)out, (uint32_t)(out >> 32)); \
+}
+
// sdc1 $f0, 0($t0)
#define TESTINST1(offset) \
{ \
@@ -158,6 +187,28 @@
out, out1); \
}
+// SUXC1 $f0, $t2($t0)
+#define TESTINST1b(offset, unligned_offset) \
+{ \
+ unsigned int out; \
+ unsigned int out1; \
+ __asm__ volatile( \
+ "move $t0, %2\n\t" \
+ "move $t1, %3\n\t" \
+ "li $t2, "#unligned_offset"\n\t" \
+ "ldc1 $f0, "#offset"($t1)\n\t" \
+ "suxc1 $f0, $t2($t0) \n\t" \
+ "lw %0, "#offset"($t0)\n\t" \
+ "addi $t0, $t0, 4 \n\t" \
+ "lw %1, "#offset"($t0)\n\t" \
+ : "=r" (out), "=r" (out1) \
+ : "r" (mem1), "r" (fs_d) \
+ : "t2", "t1", "t0", "$f0", "memory" \
+ ); \
+ printf("suxc1 $f0, #t2($t0) :: out: 0x%x : out1: 0x%x\n", \
+ out, out1); \
+}
+
// swc1 $f0, 0($t0)
#define TESTINST2(offset) \
{ \
@@ -195,6 +246,19 @@
out); \
}
+#define TEST_FPU64 \
+ __asm__ __volatile__( \
+ "cvt.l.s $f0, $f0" "\n\t" \
+ : \
+ : \
+ : "$f0" \
+ );
+
+static void handler(int sig)
+{
+ exit(0);
+}
+
void ppMem(double *m, int len)
{
int i;
@@ -405,6 +469,66 @@
ppMemF(mem1f, 16);
#endif
+#if (__mips==32) && (__mips_isa_rev>=2) && (__mips_fpr==64 || __mips_fpr==xx)
+ signal(SIGILL, handler);
+ /* Test fpu64 mode. */
+ TEST_FPU64;
+
+ printf("luxc1\n");
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 40, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 48, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 56, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 64, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 40, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 48, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 56, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 64, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 40, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 48, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 56, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 64, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0);
+ TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0);
+
+ printf("SUXC1\n");
+ TESTINST1b(0, 0);
+ TESTINST1b(0, 1);
+ TESTINST1b(8, 8);
+ TESTINST1b(8, 9);
+ TESTINST1b(16, 16);
+ TESTINST1b(16, 17);
+ TESTINST1b(24, 24);
+ TESTINST1b(24, 25);
+ TESTINST1b(32, 32);
+ TESTINST1b(32, 35);
+ TESTINST1b(40, 40);
+ TESTINST1b(40, 42);
+ TESTINST1b(48, 48);
+ TESTINST1b(48, 50);
+ TESTINST1b(56, 56);
+ TESTINST1b(56, 60);
+ TESTINST1b(64, 64);
+ TESTINST1b(64, 67);
+ ppMem(mem1, 16);
+#endif
return 0;
}
#else
|
|
From: <sv...@va...> - 2016-10-18 05:20:31
|
Author: sewardj
Date: Tue Oct 18 06:20:24 2016
New Revision: 3270
Log:
Merge from trunk:
3263 mips64: fix error introduced by r3262
Modified:
branches/VEX_3_12_BRANCH/ (props changed)
branches/VEX_3_12_BRANCH/priv/guest_mips_toIR.c
Modified: branches/VEX_3_12_BRANCH/priv/guest_mips_toIR.c
==============================================================================
--- branches/VEX_3_12_BRANCH/priv/guest_mips_toIR.c (original)
+++ branches/VEX_3_12_BRANCH/priv/guest_mips_toIR.c Tue Oct 18 06:20:24 2016
@@ -13538,7 +13538,7 @@
t1 = newTemp(ty);
assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32,
getIReg(rs), getIReg(rt)));
- assign(t1, binop(mode64 ? Iop_Add64 : Iop_And32,
+ assign(t1, binop(mode64 ? Iop_And64 : Iop_And32,
mkexpr(t0),
mode64 ? mkU64(0xfffffffffffffff8ULL)
: mkU32(0xfffffff8ULL)));
@@ -13577,7 +13577,7 @@
t1 = newTemp(ty);
assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32,
getIReg(rs), getIReg(rt)));
- assign(t1, binop(mode64 ? Iop_Add64 : Iop_And32,
+ assign(t1, binop(mode64 ? Iop_And64 : Iop_And32,
mkexpr(t0),
mode64 ? mkU64(0xfffffffffffffff8ULL)
: mkU32(0xfffffff8ULL)));
|
|
From: <sv...@va...> - 2016-10-18 05:19:27
|
Author: sewardj
Date: Tue Oct 18 06:19:20 2016
New Revision: 3269
Log:
Merge from trunk:
3262 mips: fix incorrect implementation of luxc1/suxc1 instructions
Modified:
branches/VEX_3_12_BRANCH/ (props changed)
branches/VEX_3_12_BRANCH/priv/guest_mips_toIR.c
Modified: branches/VEX_3_12_BRANCH/priv/guest_mips_toIR.c
==============================================================================
--- branches/VEX_3_12_BRANCH/priv/guest_mips_toIR.c (original)
+++ branches/VEX_3_12_BRANCH/priv/guest_mips_toIR.c Tue Oct 18 06:19:20 2016
@@ -13530,14 +13530,22 @@
}
case 0x5: /* Load Doubleword Indexed Unaligned to Floating Point - LUXC1;
- MIPS32r2 */
+ MIPS32r2 and MIPS64 */
DIP("luxc1 f%u, r%u(r%u)", fd, rt, rs);
- t0 = newTemp(Ity_I64);
- t1 = newTemp(Ity_I64);
- assign(t0, binop(Iop_Add64, getIReg(rs), getIReg(rt)));
- assign(t1, binop(Iop_And64, mkexpr(t0),
- mkU64(0xfffffffffffffff8ULL)));
- putFReg(fd, load(Ity_F64, mkexpr(t1)));
+ if ((mode64 || VEX_MIPS_CPU_HAS_MIPS32R2(archinfo->hwcaps))
+ && fp_mode64) {
+ t0 = newTemp(ty);
+ t1 = newTemp(ty);
+ assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32,
+ getIReg(rs), getIReg(rt)));
+ assign(t1, binop(mode64 ? Iop_Add64 : Iop_And32,
+ mkexpr(t0),
+ mode64 ? mkU64(0xfffffffffffffff8ULL)
+ : mkU32(0xfffffff8ULL)));
+ putFReg(fd, load(Ity_F64, mkexpr(t1)));
+ } else {
+ ILLEGAL_INSTRUCTON;
+ }
break;
case 0x8: { /* Store Word Indexed from Floating Point - SWXC1 */
@@ -13563,11 +13571,20 @@
case 0xD: /* Store Doubleword Indexed Unaligned from Floating Point -
SUXC1; MIPS64 MIPS32r2 */
DIP("suxc1 f%u, r%u(r%u)", fd, rt, rs);
- t0 = newTemp(Ity_I64);
- t1 = newTemp(Ity_I64);
- assign(t0, binop(Iop_Add64, getIReg(rs), getIReg(rt)));
- assign(t1, binop(Iop_And64, mkexpr(t0), mkU64(0xfffffffffffffff8ULL)));
- store(mkexpr(t1), getFReg(fs));
+ if ((mode64 || VEX_MIPS_CPU_HAS_MIPS32R2(archinfo->hwcaps))
+ && fp_mode64) {
+ t0 = newTemp(ty);
+ t1 = newTemp(ty);
+ assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32,
+ getIReg(rs), getIReg(rt)));
+ assign(t1, binop(mode64 ? Iop_Add64 : Iop_And32,
+ mkexpr(t0),
+ mode64 ? mkU64(0xfffffffffffffff8ULL)
+ : mkU32(0xfffffff8ULL)));
+ store(mkexpr(t1), getFReg(fs));
+ } else {
+ ILLEGAL_INSTRUCTON;
+ }
break;
case 0x0F: {
|
|
From: <sv...@va...> - 2016-10-18 05:18:14
|
Author: sewardj
Date: Tue Oct 18 06:18:06 2016
New Revision: 16065
Log:
Merge from trunk:
16039 mips: allow Valgrind to be compiled for soft-float
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/coregrind/m_machine.c
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/FPUarithmetic.c
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/FPUarithmetic.vgtest
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/MoveIns.c
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/MoveIns.vgtest
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/change_fp_mode.c
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/change_fp_mode.vgtest
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/fpu_branches.c
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/fpu_branches.vgtest
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round.c
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round.vgtest
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round_fpu64.c
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round_fpu64.vgtest
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/test_fcsr.c
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/test_fcsr.vgtest
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.c
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.vgtest
branches/VALGRIND_3_12_BRANCH/none/tests/mips64/change_fp_mode.c
branches/VALGRIND_3_12_BRANCH/none/tests/mips64/change_fp_mode.vgtest
Modified: branches/VALGRIND_3_12_BRANCH/coregrind/m_machine.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/coregrind/m_machine.c (original)
+++ branches/VALGRIND_3_12_BRANCH/coregrind/m_machine.c Tue Oct 18 06:18:06 2016
@@ -1738,10 +1738,6 @@
}
}
- VG_(convert_sigaction_fromK_to_toK)(&saved_sigill_act, &tmp_sigill_act);
- VG_(sigaction)(VKI_SIGILL, &tmp_sigill_act, NULL);
- VG_(sigprocmask)(VKI_SIG_SETMASK, &saved_set, NULL);
-
# if defined(VGP_mips32_linux)
Int fpmode = VG_(prctl)(VKI_PR_GET_FP_MODE);
# else
@@ -1752,25 +1748,33 @@
/* prctl(PR_GET_FP_MODE) is not supported by Kernel,
we are using alternative way to determine FP mode */
ULong result = 0;
- __asm__ volatile (
- ".set push\n\t"
- ".set noreorder\n\t"
- ".set oddspreg\n\t"
- "lui $t0, 0x3FF0\n\t"
- "ldc1 $f0, %0\n\t"
- "mtc1 $t0, $f1\n\t"
- "sdc1 $f0, %0\n\t"
- ".set pop\n\t"
- : "+m"(result)
- :
- : "t0", "$f0", "$f1", "memory");
- fpmode = (result != 0x3FF0000000000000ull);
+ if (!VG_MINIMAL_SETJMP(env_unsup_insn)) {
+ __asm__ volatile (
+ ".set push\n\t"
+ ".set noreorder\n\t"
+ ".set oddspreg\n\t"
+ ".set hardfloat\n\t"
+ "lui $t0, 0x3FF0\n\t"
+ "ldc1 $f0, %0\n\t"
+ "mtc1 $t0, $f1\n\t"
+ "sdc1 $f0, %0\n\t"
+ ".set pop\n\t"
+ : "+m"(result)
+ :
+ : "t0", "$f0", "$f1", "memory");
+
+ fpmode = (result != 0x3FF0000000000000ull);
+ }
}
if (fpmode != 0)
vai.hwcaps |= VEX_MIPS_HOST_FR;
+ VG_(convert_sigaction_fromK_to_toK)(&saved_sigill_act, &tmp_sigill_act);
+ VG_(sigaction)(VKI_SIGILL, &tmp_sigill_act, NULL);
+ VG_(sigprocmask)(VKI_SIG_SETMASK, &saved_set, NULL);
+
VG_(debugLog)(1, "machine", "hwcaps = 0x%x\n", vai.hwcaps);
VG_(machine_get_cache_info)(&vai);
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/FPUarithmetic.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/FPUarithmetic.c (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/FPUarithmetic.c Tue Oct 18 06:18:06 2016
@@ -1,3 +1,5 @@
+#if defined(__mips_hard_float)
+
#include <stdio.h>
#include <stdlib.h>
@@ -235,4 +237,8 @@
return 0;
}
-
+#else
+int main() {
+ return 0;
+}
+#endif
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/FPUarithmetic.vgtest
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/FPUarithmetic.vgtest (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/FPUarithmetic.vgtest Tue Oct 18 06:18:06 2016
@@ -1,2 +1,3 @@
prog: FPUarithmetic
+prereq: ../../../tests/mips_features fpu
vgopts: -q
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/MoveIns.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/MoveIns.c (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/MoveIns.c Tue Oct 18 06:18:06 2016
@@ -1,3 +1,5 @@
+#if defined(__mips_hard_float)
+
#include <stdint.h>
#include <stdio.h>
@@ -661,3 +663,8 @@
return 0;
}
+#else
+int main() {
+ return 0;
+}
+#endif
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/MoveIns.vgtest
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/MoveIns.vgtest (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/MoveIns.vgtest Tue Oct 18 06:18:06 2016
@@ -1,2 +1,3 @@
prog: MoveIns
+prereq: ../../../tests/mips_features fpu
vgopts: -q
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/change_fp_mode.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/change_fp_mode.c (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/change_fp_mode.c Tue Oct 18 06:18:06 2016
@@ -1,3 +1,5 @@
+#if defined(__mips_hard_float)
+
#include <elf.h>
#include <stdio.h>
#include <stdlib.h>
@@ -76,3 +78,8 @@
return 0;
}
+#else
+int main() {
+ return 0;
+}
+#endif
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/change_fp_mode.vgtest
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/change_fp_mode.vgtest (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/change_fp_mode.vgtest Tue Oct 18 06:18:06 2016
@@ -1,2 +1,3 @@
prog: change_fp_mode
+prereq: ../../../tests/mips_features fpu
vgopts: -q
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/fpu_branches.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/fpu_branches.c (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/fpu_branches.c Tue Oct 18 06:18:06 2016
@@ -1,3 +1,5 @@
+#if defined(__mips_hard_float)
+
#include <stdio.h>
#define MAX_ARR 24
@@ -314,4 +316,8 @@
}
return 0;
}
-
+#else
+int main() {
+ return 0;
+}
+#endif
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/fpu_branches.vgtest
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/fpu_branches.vgtest (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/fpu_branches.vgtest Tue Oct 18 06:18:06 2016
@@ -1,2 +1,3 @@
prog: fpu_branches
+prereq: ../../../tests/mips_features fpu
vgopts: -q
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round.c (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round.c Tue Oct 18 06:18:06 2016
@@ -1,3 +1,5 @@
+#if defined(__mips_hard_float)
+
#include <stdio.h>
typedef enum {
@@ -289,4 +291,9 @@
}
return 0;
}
+#else
+int main() {
+ return 0;
+}
+#endif
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round.vgtest
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round.vgtest (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round.vgtest Tue Oct 18 06:18:06 2016
@@ -1,2 +1,3 @@
prog: round
+prereq: ../../../tests/mips_features fpu
vgopts: -q
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round_fpu64.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round_fpu64.c (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round_fpu64.c Tue Oct 18 06:18:06 2016
@@ -1,3 +1,5 @@
+#if defined(__mips_hard_float)
+
#include <stdio.h>
#include <stdlib.h>
#include <signal.h>
@@ -202,3 +204,8 @@
#endif
return 0;
}
+#else
+int main() {
+ return 0;
+}
+#endif
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round_fpu64.vgtest
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round_fpu64.vgtest (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round_fpu64.vgtest Tue Oct 18 06:18:06 2016
@@ -1,2 +1,3 @@
prog: round_fpu64
+prereq: ../../../tests/mips_features fpu
vgopts: -q
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/test_fcsr.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/test_fcsr.c (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/test_fcsr.c Tue Oct 18 06:18:06 2016
@@ -1,3 +1,5 @@
+#if defined(__mips_hard_float)
+
#include <stdio.h>
int main ()
@@ -23,3 +25,8 @@
printf("FCSR::1: 0x%x, 2: 0x%x\n", out[0], out[1]);
return 0;
}
+#else
+int main() {
+ return 0;
+}
+#endif
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/test_fcsr.vgtest
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/test_fcsr.vgtest (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/test_fcsr.vgtest Tue Oct 18 06:18:06 2016
@@ -1,2 +1,3 @@
prog: test_fcsr
+prereq: ../../../tests/mips_features fpu
vgopts: -q
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.c (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.c Tue Oct 18 06:18:06 2016
@@ -1,3 +1,5 @@
+#if defined(__mips_hard_float)
+
#include <stdint.h>
#include <stdio.h>
@@ -405,4 +407,8 @@
return 0;
}
-
+#else
+int main() {
+ return 0;
+}
+#endif
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.vgtest
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.vgtest (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/vfp.vgtest Tue Oct 18 06:18:06 2016
@@ -1,2 +1,3 @@
prog: vfp
+prereq: ../../../tests/mips_features fpu
vgopts: -q
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips64/change_fp_mode.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips64/change_fp_mode.c (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips64/change_fp_mode.c Tue Oct 18 06:18:06 2016
@@ -1,3 +1,5 @@
+#if defined(__mips_hard_float)
+
#include <elf.h>
#include <stdio.h>
#include <stdlib.h>
@@ -257,3 +259,8 @@
return 0;
}
+#else
+int main() {
+ return 0;
+}
+#endif
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips64/change_fp_mode.vgtest
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips64/change_fp_mode.vgtest (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips64/change_fp_mode.vgtest Tue Oct 18 06:18:06 2016
@@ -1,2 +1,3 @@
prog: change_fp_mode
+prereq: ../../../tests/mips_features fpu
vgopts: -q
|
|
From: <sv...@va...> - 2016-10-18 05:16:14
|
Author: sewardj
Date: Tue Oct 18 06:16:07 2016
New Revision: 3268
Log:
Merge from trunk:
3261 mips: allow VEX to be compiled for soft-float
Modified:
branches/VEX_3_12_BRANCH/ (props changed)
branches/VEX_3_12_BRANCH/priv/guest_mips_helpers.c
Modified: branches/VEX_3_12_BRANCH/priv/guest_mips_helpers.c
==============================================================================
--- branches/VEX_3_12_BRANCH/priv/guest_mips_helpers.c (original)
+++ branches/VEX_3_12_BRANCH/priv/guest_mips_helpers.c Tue Oct 18 06:16:07 2016
@@ -459,75 +459,93 @@
#endif
#define ASM_VOLATILE_UNARY32(inst) \
- __asm__ volatile("cfc1 $t0, $31" "\n\t" \
+ __asm__ volatile(".set push" "\n\t" \
+ ".set hardfloat" "\n\t" \
+ "cfc1 $t0, $31" "\n\t" \
"ctc1 %2, $31" "\n\t" \
"mtc1 %1, $f20" "\n\t" \
#inst" $f20, $f20" "\n\t" \
"cfc1 %0, $31" "\n\t" \
"ctc1 $t0, $31" "\n\t" \
+ ".set pop" "\n\t" \
: "=r" (ret) \
: "r" (loFsVal), "r" (fcsr) \
: "t0", "$f20" \
);
#define ASM_VOLATILE_UNARY32_DOUBLE(inst) \
- __asm__ volatile("cfc1 $t0, $31" "\n\t" \
+ __asm__ volatile(".set push" "\n\t" \
+ ".set hardfloat" "\n\t" \
+ "cfc1 $t0, $31" "\n\t" \
"ctc1 %2, $31" "\n\t" \
"ldc1 $f20, 0(%1)" "\n\t" \
#inst" $f20, $f20" "\n\t" \
"cfc1 %0, $31" "\n\t" \
"ctc1 $t0, $31" "\n\t" \
+ ".set pop" "\n\t" \
: "=r" (ret) \
: "r" (&fsVal), "r" (fcsr) \
: "t0", "$f20", "$f21" \
);
#define ASM_VOLATILE_UNARY64(inst) \
- __asm__ volatile("cfc1 $t0, $31" "\n\t" \
+ __asm__ volatile(".set push" "\n\t" \
+ ".set hardfloat" "\n\t" \
+ "cfc1 $t0, $31" "\n\t" \
"ctc1 %2, $31" "\n\t" \
"ldc1 $f24, 0(%1)" "\n\t" \
#inst" $f24, $f24" "\n\t" \
"cfc1 %0, $31" "\n\t" \
"ctc1 $t0, $31" "\n\t" \
+ ".set pop" "\n\t" \
: "=r" (ret) \
: "r" (&(addr[fs])), "r" (fcsr) \
: "t0", "$f24" \
);
#define ASM_VOLATILE_BINARY32(inst) \
- __asm__ volatile("cfc1 $t0, $31" "\n\t" \
+ __asm__ volatile(".set push" "\n\t" \
+ ".set hardfloat" "\n\t" \
+ "cfc1 $t0, $31" "\n\t" \
"ctc1 %3, $31" "\n\t" \
"mtc1 %1, $f20" "\n\t" \
"mtc1 %2, $f22" "\n\t" \
#inst" $f20, $f20, $f22" "\n\t" \
"cfc1 %0, $31" "\n\t" \
"ctc1 $t0, $31" "\n\t" \
+ ".set pop" "\n\t" \
: "=r" (ret) \
: "r" (loFsVal), "r" (loFtVal), "r" (fcsr) \
: "t0", "$f20", "$f22" \
);
#define ASM_VOLATILE_BINARY32_DOUBLE(inst) \
- __asm__ volatile("cfc1 $t0, $31" "\n\t" \
+ __asm__ volatile(".set push" "\n\t" \
+ ".set hardfloat" "\n\t" \
+ "cfc1 $t0, $31" "\n\t" \
"ctc1 %3, $31" "\n\t" \
"ldc1 $f20, 0(%1)" "\n\t" \
"ldc1 $f22, 0(%2)" "\n\t" \
#inst" $f20, $f20, $f22" "\n\t" \
"cfc1 %0, $31" "\n\t" \
"ctc1 $t0, $31" "\n\t" \
+ ".set pop" "\n\t" \
: "=r" (ret) \
: "r" (&fsVal), "r" (&ftVal), "r" (fcsr) \
: "t0", "$f20", "$f21", "$f22", "$f23" \
);
#define ASM_VOLATILE_BINARY64(inst) \
- __asm__ volatile("cfc1 $t0, $31" "\n\t" \
+ __asm__ volatile(".set push" "\n\t" \
+ ".set hardfloat" "\n\t" \
+ "cfc1 $t0, $31" "\n\t" \
"ctc1 %3, $31" "\n\t" \
"ldc1 $f24, 0(%1)" "\n\t" \
"ldc1 $f26, 0(%2)" "\n\t" \
#inst" $f24, $f24, $f26" "\n\t" \
"cfc1 %0, $31" "\n\t" \
"ctc1 $t0, $31" "\n\t" \
+ ".set pop" "\n\t" \
: "=r" (ret) \
: "r" (&(addr[fs])), "r" (&(addr[ft])), "r" (fcsr) \
: "t0", "$f24", "$f26" \
|
|
From: <sv...@va...> - 2016-10-18 05:14:41
|
Author: sewardj
Date: Tue Oct 18 06:14:29 2016
New Revision: 16064
Log:
Merge from trunk:
16038 mips: clear fcc bits in fcsr after calling printf()
Modified:
branches/VALGRIND_3_12_BRANCH/ (props changed)
branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round.c
branches/VALGRIND_3_12_BRANCH/none/tests/mips64/round.c
branches/VALGRIND_3_12_BRANCH/none/tests/mips64/rounding_mode.h
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round.c (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips32/round.c Tue Oct 18 06:14:29 2016
@@ -149,12 +149,24 @@
}
}
+void clear_fcc(){
+ __asm__ __volatile__(
+ "cfc1 $t0, $31" "\n\t"
+ "and $t0, $t0, 0x17FFFFF" "\n\t"
+ "ctc1 $t0, $31" "\n\t"
+ :
+ :
+ : "t0"
+ );
+}
+
int directedRoundingMode(flt_dir_op_t op) {
int fd_w = 0;
int i;
int fcsr = 0;
round_mode_t rm = TO_NEAREST;
for (i = 0; i < 24; i++) {
+ clear_fcc();
set_rounding_mode(rm);
switch(op) {
case CEILWS:
@@ -217,6 +229,7 @@
set_rounding_mode(rm);
printf("roundig mode: %s\n", round_mode_name[rm]);
for (i = 0; i < 24; i++) {
+ clear_fcc();
set_rounding_mode(rm);
switch(op1) {
case CVTDS:
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips64/round.c
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips64/round.c (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips64/round.c Tue Oct 18 06:14:29 2016
@@ -9,6 +9,7 @@
int i;
int fcsr = 0;
for (i = 0; i < MAX_ARR; i++) {
+ clear_fcc();
switch(op) {
case CEILWS:
UNOPfw("ceil.w.s");
@@ -111,6 +112,7 @@
set_rounding_mode(rm);
printf("roundig mode: %s\n", round_mode_name[rm]);
for (i = 0; i < MAX_ARR; i++) {
+ clear_fcc();
set_rounding_mode(rm);
switch(op1) {
case CVTDS:
Modified: branches/VALGRIND_3_12_BRANCH/none/tests/mips64/rounding_mode.h
==============================================================================
--- branches/VALGRIND_3_12_BRANCH/none/tests/mips64/rounding_mode.h (original)
+++ branches/VALGRIND_3_12_BRANCH/none/tests/mips64/rounding_mode.h Tue Oct 18 06:14:29 2016
@@ -60,4 +60,15 @@
break;
}
}
+
+void clear_fcc(){
+ __asm__ __volatile__(
+ "cfc1 $t0, $31" "\n\t"
+ "and $t0, $t0, 0x17FFFFF" "\n\t"
+ "ctc1 $t0, $31" "\n\t"
+ :
+ :
+ : "t0"
+ );
+}
#endif
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