You can subscribe to this list here.
| 2002 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
(1) |
Oct
(122) |
Nov
(152) |
Dec
(69) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2003 |
Jan
(6) |
Feb
(25) |
Mar
(73) |
Apr
(82) |
May
(24) |
Jun
(25) |
Jul
(10) |
Aug
(11) |
Sep
(10) |
Oct
(54) |
Nov
(203) |
Dec
(182) |
| 2004 |
Jan
(307) |
Feb
(305) |
Mar
(430) |
Apr
(312) |
May
(187) |
Jun
(342) |
Jul
(487) |
Aug
(637) |
Sep
(336) |
Oct
(373) |
Nov
(441) |
Dec
(210) |
| 2005 |
Jan
(385) |
Feb
(480) |
Mar
(636) |
Apr
(544) |
May
(679) |
Jun
(625) |
Jul
(810) |
Aug
(838) |
Sep
(634) |
Oct
(521) |
Nov
(965) |
Dec
(543) |
| 2006 |
Jan
(494) |
Feb
(431) |
Mar
(546) |
Apr
(411) |
May
(406) |
Jun
(322) |
Jul
(256) |
Aug
(401) |
Sep
(345) |
Oct
(542) |
Nov
(308) |
Dec
(481) |
| 2007 |
Jan
(427) |
Feb
(326) |
Mar
(367) |
Apr
(255) |
May
(244) |
Jun
(204) |
Jul
(223) |
Aug
(231) |
Sep
(354) |
Oct
(374) |
Nov
(497) |
Dec
(362) |
| 2008 |
Jan
(322) |
Feb
(482) |
Mar
(658) |
Apr
(422) |
May
(476) |
Jun
(396) |
Jul
(455) |
Aug
(267) |
Sep
(280) |
Oct
(253) |
Nov
(232) |
Dec
(304) |
| 2009 |
Jan
(486) |
Feb
(470) |
Mar
(458) |
Apr
(423) |
May
(696) |
Jun
(461) |
Jul
(551) |
Aug
(575) |
Sep
(134) |
Oct
(110) |
Nov
(157) |
Dec
(102) |
| 2010 |
Jan
(226) |
Feb
(86) |
Mar
(147) |
Apr
(117) |
May
(107) |
Jun
(203) |
Jul
(193) |
Aug
(238) |
Sep
(300) |
Oct
(246) |
Nov
(23) |
Dec
(75) |
| 2011 |
Jan
(133) |
Feb
(195) |
Mar
(315) |
Apr
(200) |
May
(267) |
Jun
(293) |
Jul
(353) |
Aug
(237) |
Sep
(278) |
Oct
(611) |
Nov
(274) |
Dec
(260) |
| 2012 |
Jan
(303) |
Feb
(391) |
Mar
(417) |
Apr
(441) |
May
(488) |
Jun
(655) |
Jul
(590) |
Aug
(610) |
Sep
(526) |
Oct
(478) |
Nov
(359) |
Dec
(372) |
| 2013 |
Jan
(467) |
Feb
(226) |
Mar
(391) |
Apr
(281) |
May
(299) |
Jun
(252) |
Jul
(311) |
Aug
(352) |
Sep
(481) |
Oct
(571) |
Nov
(222) |
Dec
(231) |
| 2014 |
Jan
(185) |
Feb
(329) |
Mar
(245) |
Apr
(238) |
May
(281) |
Jun
(399) |
Jul
(382) |
Aug
(500) |
Sep
(579) |
Oct
(435) |
Nov
(487) |
Dec
(256) |
| 2015 |
Jan
(338) |
Feb
(357) |
Mar
(330) |
Apr
(294) |
May
(191) |
Jun
(108) |
Jul
(142) |
Aug
(261) |
Sep
(190) |
Oct
(54) |
Nov
(83) |
Dec
(22) |
| 2016 |
Jan
(49) |
Feb
(89) |
Mar
(33) |
Apr
(50) |
May
(27) |
Jun
(34) |
Jul
(53) |
Aug
(53) |
Sep
(98) |
Oct
(206) |
Nov
(93) |
Dec
(53) |
| 2017 |
Jan
(65) |
Feb
(82) |
Mar
(102) |
Apr
(86) |
May
(187) |
Jun
(67) |
Jul
(23) |
Aug
(93) |
Sep
(65) |
Oct
(45) |
Nov
(35) |
Dec
(17) |
| 2018 |
Jan
(26) |
Feb
(35) |
Mar
(38) |
Apr
(32) |
May
(8) |
Jun
(43) |
Jul
(27) |
Aug
(30) |
Sep
(43) |
Oct
(42) |
Nov
(38) |
Dec
(67) |
| 2019 |
Jan
(32) |
Feb
(37) |
Mar
(53) |
Apr
(64) |
May
(49) |
Jun
(18) |
Jul
(14) |
Aug
(53) |
Sep
(25) |
Oct
(30) |
Nov
(49) |
Dec
(31) |
| 2020 |
Jan
(87) |
Feb
(45) |
Mar
(37) |
Apr
(51) |
May
(99) |
Jun
(36) |
Jul
(11) |
Aug
(14) |
Sep
(20) |
Oct
(24) |
Nov
(40) |
Dec
(23) |
| 2021 |
Jan
(14) |
Feb
(53) |
Mar
(85) |
Apr
(15) |
May
(19) |
Jun
(3) |
Jul
(14) |
Aug
(1) |
Sep
(57) |
Oct
(73) |
Nov
(56) |
Dec
(22) |
| 2022 |
Jan
(3) |
Feb
(22) |
Mar
(6) |
Apr
(55) |
May
(46) |
Jun
(39) |
Jul
(15) |
Aug
(9) |
Sep
(11) |
Oct
(34) |
Nov
(20) |
Dec
(36) |
| 2023 |
Jan
(79) |
Feb
(41) |
Mar
(99) |
Apr
(169) |
May
(48) |
Jun
(16) |
Jul
(16) |
Aug
(57) |
Sep
(19) |
Oct
|
Nov
|
Dec
|
| S | M | T | W | T | F | S |
|---|---|---|---|---|---|---|
|
|
|
|
|
|
1
|
2
(1) |
|
3
(3) |
4
(7) |
5
|
6
(1) |
7
(3) |
8
(4) |
9
(2) |
|
10
|
11
|
12
|
13
|
14
|
15
|
16
(1) |
|
17
(4) |
18
(2) |
19
(1) |
20
(1) |
21
(2) |
22
(4) |
23
(2) |
|
24
(1) |
25
|
26
(5) |
27
(2) |
28
(3) |
29
(1) |
30
|
|
From: <sv...@va...> - 2016-04-17 15:57:19
|
Author: iraisr
Date: Sun Apr 17 16:57:11 2016
New Revision: 15857
Log:
Fix build on newer illumos distributions which streamlined inclusion of sys/regset.h.
This means that sys/regset.h needs to be included explicitly now.
n-i-bz
Modified:
trunk/memcheck/tests/amd64-solaris/context_gpr.c
trunk/memcheck/tests/amd64-solaris/context_gpr.stderr.exp
trunk/memcheck/tests/amd64-solaris/context_rflags.c
trunk/memcheck/tests/amd64-solaris/context_rflags2.c
trunk/memcheck/tests/amd64-solaris/context_rflags2.stderr.exp
trunk/memcheck/tests/solaris/thr_daemon_exit_standalone.c
trunk/memcheck/tests/x86-solaris/context_eflags.c
trunk/memcheck/tests/x86-solaris/context_eflags2.c
trunk/memcheck/tests/x86-solaris/context_eflags2.stderr.exp
trunk/memcheck/tests/x86-solaris/context_gpr.c
trunk/memcheck/tests/x86-solaris/context_gpr.stderr.exp
Modified: trunk/memcheck/tests/amd64-solaris/context_gpr.c
==============================================================================
--- trunk/memcheck/tests/amd64-solaris/context_gpr.c (original)
+++ trunk/memcheck/tests/amd64-solaris/context_gpr.c Sun Apr 17 16:57:11 2016
@@ -7,6 +7,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
+#include <sys/regset.h>
#include <sys/syscall.h>
#include <sys/ucontext.h>
Modified: trunk/memcheck/tests/amd64-solaris/context_gpr.stderr.exp
==============================================================================
--- trunk/memcheck/tests/amd64-solaris/context_gpr.stderr.exp (original)
+++ trunk/memcheck/tests/amd64-solaris/context_gpr.stderr.exp Sun Apr 17 16:57:11 2016
@@ -1,18 +1,18 @@
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_gpr.c:83)
+ at 0x........: main (context_gpr.c:84)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_gpr.c:42)
+ by 0x........: main (context_gpr.c:43)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_gpr.c:90)
+ at 0x........: main (context_gpr.c:91)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_gpr.c:42)
+ by 0x........: main (context_gpr.c:43)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_gpr.c:90)
+ at 0x........: main (context_gpr.c:91)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_gpr.c:38)
+ by 0x........: main (context_gpr.c:39)
Modified: trunk/memcheck/tests/amd64-solaris/context_rflags.c
==============================================================================
--- trunk/memcheck/tests/amd64-solaris/context_rflags.c (original)
+++ trunk/memcheck/tests/amd64-solaris/context_rflags.c Sun Apr 17 16:57:11 2016
@@ -7,6 +7,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
+#include <sys/regset.h>
#include <sys/syscall.h>
#include <sys/ucontext.h>
Modified: trunk/memcheck/tests/amd64-solaris/context_rflags2.c
==============================================================================
--- trunk/memcheck/tests/amd64-solaris/context_rflags2.c (original)
+++ trunk/memcheck/tests/amd64-solaris/context_rflags2.c Sun Apr 17 16:57:11 2016
@@ -14,6 +14,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
+#include <sys/regset.h>
#include <sys/syscall.h>
#include <sys/ucontext.h>
Modified: trunk/memcheck/tests/amd64-solaris/context_rflags2.stderr.exp
==============================================================================
--- trunk/memcheck/tests/amd64-solaris/context_rflags2.stderr.exp (original)
+++ trunk/memcheck/tests/amd64-solaris/context_rflags2.stderr.exp Sun Apr 17 16:57:11 2016
@@ -1,12 +1,12 @@
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_rflags2.c:85)
+ at 0x........: main (context_rflags2.c:86)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_rflags2.c:44)
+ by 0x........: main (context_rflags2.c:45)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_rflags2.c:85)
+ at 0x........: main (context_rflags2.c:86)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_rflags2.c:44)
+ by 0x........: main (context_rflags2.c:45)
Modified: trunk/memcheck/tests/solaris/thr_daemon_exit_standalone.c
==============================================================================
--- trunk/memcheck/tests/solaris/thr_daemon_exit_standalone.c (original)
+++ trunk/memcheck/tests/solaris/thr_daemon_exit_standalone.c Sun Apr 17 16:57:11 2016
@@ -3,6 +3,7 @@
#include <sys/lwp.h>
#include <sys/mman.h>
+#include <sys/regset.h>
#include <sys/syscall.h>
#include <sys/ucontext.h>
Modified: trunk/memcheck/tests/x86-solaris/context_eflags.c
==============================================================================
--- trunk/memcheck/tests/x86-solaris/context_eflags.c (original)
+++ trunk/memcheck/tests/x86-solaris/context_eflags.c Sun Apr 17 16:57:11 2016
@@ -5,6 +5,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
+#include <sys/regset.h>
#include <sys/syscall.h>
#include <sys/ucontext.h>
Modified: trunk/memcheck/tests/x86-solaris/context_eflags2.c
==============================================================================
--- trunk/memcheck/tests/x86-solaris/context_eflags2.c (original)
+++ trunk/memcheck/tests/x86-solaris/context_eflags2.c Sun Apr 17 16:57:11 2016
@@ -5,6 +5,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
+#include <sys/regset.h>
#include <sys/syscall.h>
#include <sys/ucontext.h>
Modified: trunk/memcheck/tests/x86-solaris/context_eflags2.stderr.exp
==============================================================================
--- trunk/memcheck/tests/x86-solaris/context_eflags2.stderr.exp (original)
+++ trunk/memcheck/tests/x86-solaris/context_eflags2.stderr.exp Sun Apr 17 16:57:11 2016
@@ -1,12 +1,12 @@
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_eflags2.c:75)
+ at 0x........: main (context_eflags2.c:76)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_eflags2.c:35)
+ by 0x........: main (context_eflags2.c:36)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_eflags2.c:75)
+ at 0x........: main (context_eflags2.c:76)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_eflags2.c:35)
+ by 0x........: main (context_eflags2.c:36)
Modified: trunk/memcheck/tests/x86-solaris/context_gpr.c
==============================================================================
--- trunk/memcheck/tests/x86-solaris/context_gpr.c (original)
+++ trunk/memcheck/tests/x86-solaris/context_gpr.c Sun Apr 17 16:57:11 2016
@@ -5,6 +5,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
+#include <sys/regset.h>
#include <sys/syscall.h>
#include <sys/ucontext.h>
Modified: trunk/memcheck/tests/x86-solaris/context_gpr.stderr.exp
==============================================================================
--- trunk/memcheck/tests/x86-solaris/context_gpr.stderr.exp (original)
+++ trunk/memcheck/tests/x86-solaris/context_gpr.stderr.exp Sun Apr 17 16:57:11 2016
@@ -1,18 +1,18 @@
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_gpr.c:80)
+ at 0x........: main (context_gpr.c:81)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_gpr.c:36)
+ by 0x........: main (context_gpr.c:37)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_gpr.c:87)
+ at 0x........: main (context_gpr.c:88)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_gpr.c:36)
+ by 0x........: main (context_gpr.c:37)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_gpr.c:87)
+ at 0x........: main (context_gpr.c:88)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_gpr.c:32)
+ by 0x........: main (context_gpr.c:33)
|
|
From: <sv...@va...> - 2016-04-17 10:05:38
|
Author: iraisr
Date: Sun Apr 17 11:05:29 2016
New Revision: 15856
Log:
Fix build on newer illumos distributions where struct fpchip_state
was renamed to _fpchip_state.
n-i-z
Modified:
trunk/configure.ac
trunk/include/vki/vki-solaris.h
trunk/memcheck/tests/amd64-solaris/context_sse.c
trunk/memcheck/tests/amd64-solaris/context_sse.stderr.exp
trunk/memcheck/tests/x86-solaris/context_sse.c
trunk/memcheck/tests/x86-solaris/context_sse.stderr.exp
Modified: trunk/configure.ac
==============================================================================
--- trunk/configure.ac (original)
+++ trunk/configure.ac Sun Apr 17 11:05:29 2016
@@ -3520,6 +3520,23 @@
])
AM_CONDITIONAL(SOLARIS_SYSTEM_STATS_SYSCALL, test x$solaris_system_stats_syscall = xyes)
+
+# Solaris-specific check determining if fpregset_t defines struct _fpchip_state
+# (on newer illumos) or struct fpchip_state (Solaris, older illumos).
+#
+# C-level symbol: SOLARIS_FPCHIP_STATE_TAKES_UNDERSCORE
+# Automake-level symbol: none
+#
+AC_CHECK_TYPE([struct _fpchip_state],
+ [solaris_fpchip_state_takes_underscore=yes],
+ [solaris_fpchip_state_takes_underscore=no],
+ [[#include <sys/regset.h>]])
+if test "$solaris_fpchip_state_takes_underscore" = "yes"; then
+ AC_DEFINE(SOLARIS_FPCHIP_STATE_TAKES_UNDERSCORE, 1,
+ [Define to 1 if fpregset_t defines struct _fpchip_state])
+fi
+
+
else
AM_CONDITIONAL(SOLARIS_SUN_STUDIO_AS, false)
AM_CONDITIONAL(SOLARIS_XPG_SYMBOLS_PRESENT, false)
Modified: trunk/include/vki/vki-solaris.h
==============================================================================
--- trunk/include/vki/vki-solaris.h (original)
+++ trunk/include/vki/vki-solaris.h Sun Apr 17 11:05:29 2016
@@ -1442,7 +1442,11 @@
#error "Unknown platform"
#endif
+#if defined(SOLARIS_FPCHIP_STATE_TAKES_UNDERSCORE)
+#define vki_fpchip_state _fpchip_state
+#else
#define vki_fpchip_state fpchip_state
+#endif /* SOLARIS_FPCHIP_STATE_TAKES_UNDERSCORE */
#define VKI_GETCONTEXT GETCONTEXT
#define VKI_SETCONTEXT SETCONTEXT
Modified: trunk/memcheck/tests/amd64-solaris/context_sse.c
==============================================================================
--- trunk/memcheck/tests/amd64-solaris/context_sse.c (original)
+++ trunk/memcheck/tests/amd64-solaris/context_sse.c Sun Apr 17 11:05:29 2016
@@ -10,6 +10,8 @@
#include <sys/syscall.h>
#include <sys/ucontext.h>
+#include "config.h"
+
static siginfo_t si;
static ucontext_t uc;
/* x0 is always zero, but is visible to Valgrind as uninitialised. */
@@ -31,7 +33,13 @@
pid_t pid;
upad128_t out[8];
upad128_t y0;
- struct fpchip_state *fs = &uc.uc_mcontext.fpregs.fp_reg_set.fpchip_state;
+
+#if defined(SOLARIS_FPCHIP_STATE_TAKES_UNDERSCORE)
+ struct _fpchip_state *fs;
+#else
+ struct fpchip_state *fs;
+#endif
+ fs = &uc.uc_mcontext.fpregs.fp_reg_set.fpchip_state;
/* Uninitialised, but we know px[0] is 0x0. */
upad128_t *px = malloc(sizeof(*px));
Modified: trunk/memcheck/tests/amd64-solaris/context_sse.stderr.exp
==============================================================================
--- trunk/memcheck/tests/amd64-solaris/context_sse.stderr.exp (original)
+++ trunk/memcheck/tests/amd64-solaris/context_sse.stderr.exp Sun Apr 17 11:05:29 2016
@@ -1,96 +1,96 @@
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:87)
+ at 0x........: main (context_sse.c:95)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:87)
+ at 0x........: main (context_sse.c:95)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:87)
+ at 0x........: main (context_sse.c:95)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:87)
+ at 0x........: main (context_sse.c:95)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:87)
+ at 0x........: main (context_sse.c:95)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:87)
+ at 0x........: main (context_sse.c:95)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:87)
+ at 0x........: main (context_sse.c:95)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:87)
+ at 0x........: main (context_sse.c:95)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:95)
+ at 0x........: main (context_sse.c:103)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:37)
+ by 0x........: main (context_sse.c:45)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:95)
+ at 0x........: main (context_sse.c:103)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:37)
+ by 0x........: main (context_sse.c:45)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:95)
+ at 0x........: main (context_sse.c:103)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:95)
+ at 0x........: main (context_sse.c:103)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:95)
+ at 0x........: main (context_sse.c:103)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:95)
+ at 0x........: main (context_sse.c:103)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:95)
+ at 0x........: main (context_sse.c:103)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:95)
+ at 0x........: main (context_sse.c:103)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:41)
+ by 0x........: main (context_sse.c:49)
Modified: trunk/memcheck/tests/x86-solaris/context_sse.c
==============================================================================
--- trunk/memcheck/tests/x86-solaris/context_sse.c (original)
+++ trunk/memcheck/tests/x86-solaris/context_sse.c Sun Apr 17 11:05:29 2016
@@ -8,6 +8,8 @@
#include <sys/syscall.h>
#include <sys/ucontext.h>
+#include "config.h"
+
static siginfo_t si;
static ucontext_t uc;
/* x0 is always zero, but is visible to Valgrind as uninitialised. */
@@ -29,7 +31,13 @@
pid_t pid;
upad128_t out[8];
upad128_t y0;
- struct fpchip_state *fs = &uc.uc_mcontext.fpregs.fp_reg_set.fpchip_state;
+
+#if defined(SOLARIS_FPCHIP_STATE_TAKES_UNDERSCORE)
+ struct _fpchip_state *fs;
+#else
+ struct fpchip_state *fs;
+#endif
+ fs = &uc.uc_mcontext.fpregs.fp_reg_set.fpchip_state;
/* Uninitialised, but we know px[0] is 0x0. */
upad128_t *px = malloc(sizeof(*px));
Modified: trunk/memcheck/tests/x86-solaris/context_sse.stderr.exp
==============================================================================
--- trunk/memcheck/tests/x86-solaris/context_sse.stderr.exp (original)
+++ trunk/memcheck/tests/x86-solaris/context_sse.stderr.exp Sun Apr 17 11:05:29 2016
@@ -1,96 +1,96 @@
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:93)
+ at 0x........: main (context_sse.c:101)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:93)
+ at 0x........: main (context_sse.c:101)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:93)
+ at 0x........: main (context_sse.c:101)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:93)
+ at 0x........: main (context_sse.c:101)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:93)
+ at 0x........: main (context_sse.c:101)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:93)
+ at 0x........: main (context_sse.c:101)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:93)
+ at 0x........: main (context_sse.c:101)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:93)
+ at 0x........: main (context_sse.c:101)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:101)
+ at 0x........: main (context_sse.c:109)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:35)
+ by 0x........: main (context_sse.c:43)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:101)
+ at 0x........: main (context_sse.c:109)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:35)
+ by 0x........: main (context_sse.c:43)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:101)
+ at 0x........: main (context_sse.c:109)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:101)
+ at 0x........: main (context_sse.c:109)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:101)
+ at 0x........: main (context_sse.c:109)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:101)
+ at 0x........: main (context_sse.c:109)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:101)
+ at 0x........: main (context_sse.c:109)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
Conditional jump or move depends on uninitialised value(s)
- at 0x........: main (context_sse.c:101)
+ at 0x........: main (context_sse.c:109)
Uninitialised value was created by a heap allocation
at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: main (context_sse.c:39)
+ by 0x........: main (context_sse.c:47)
|
|
From: Ivo R. <iv...@iv...> - 2016-04-16 23:14:25
|
303877 - valgrind doesn't support compressed debuginfo sections. https://bugs.kde.org/show_bug.cgi?id=303877 is ready to land. Feel free to review and test on your favourite distribution! Cheers, I. |
|
From: Julian S. <js...@ac...> - 2016-04-09 20:46:46
|
On 09/04/16 01:08, John Reiser wrote: >> Is valgrind used to check valgrind? I couldn't run valgrind on >> itself easily, and didn't try harder: >> >> valgrind valgrind.bin > > README_DEVELOPERS Yeah, it is doable, and is even done sometimes. It's a bit tricky though, but it is doable. J |
|
From: <sv...@va...> - 2016-04-09 19:49:45
|
Author: iraisr
Date: Sat Apr 9 20:49:37 2016
New Revision: 15855
Log:
Solaris specific fixes to nightly report.
Solaris libc is always tied to the Solaris release.
n-i-bz
Modified:
trunk/nightly/bin/nightly
Modified: trunk/nightly/bin/nightly
==============================================================================
--- trunk/nightly/bin/nightly (original)
+++ trunk/nightly/bin/nightly Sat Apr 9 20:49:37 2016
@@ -224,21 +224,27 @@
gcc_version="`gcc --version 2> /dev/null | head -1`"
gdb_version="`gdb --version 2> /dev/null | head -1`"
as_version="`as --version 2> /dev/null | head -1`"
-libc_so="`ls -1 /lib/libc.so.* /lib64/libc.so.* /lib32/libc.so.* /lib/*-linux-gnu/libc.so.* 2>/dev/null | tail -1`"
-libc="unknown"
-if [ "x$libc_so" != "x" ]; then
- if [ -e "$libc_so" -a -r "$libc_so" ]; then
- libc="`$libc_so | head -1`"
+if [ `uname -o` = "Solaris" ]; then
+ libc="Solaris libc"
+else
+ libc_so="`ls -1 /lib/libc.so.* /lib64/libc.so.* /lib32/libc.so.* /lib/*-linux-gnu/libc.so.* 2>/dev/null | tail -1`"
+ libc="unknown"
+ if [ "x$libc_so" != "x" ]; then
+ if [ -e "$libc_so" -a -r "$libc_so" ]; then
+ libc="`$libc_so | head -1`"
+ fi
fi
+ libc=`echo $libc | sed "s/, by Roland.*//"`
fi
-libc=`echo $libc | sed "s/, by Roland.*//"`
uname_stuff="`uname -mrs`"
if [ -r /etc/os-release ]; then
vendor_stuff="`. /etc/os-release; echo ${NAME} ${VERSION}`"
-elif which lsb_release 2>&1 > /dev/null; then
+elif which lsb_release >/dev/null 2>&1; then
vendor_stuff="`lsb_release -sicr | xargs echo`"
elif [ -e "/etc/issue.net" -a -r "/etc/issue.net" ]; then
vendor_stuff="`cat /etc/issue.net | head -1`"
+elif [ -r /etc/release ]; then
+ vendor_stuff="`cat /etc/release | head -1`"
else
vendor_stuff="unknown"
fi
|
|
From: John R. <jr...@bi...> - 2016-04-08 23:08:14
|
> Is valgrind used to check valgrind? I couldn't run valgrind on > itself easily, and didn't try harder: > > valgrind valgrind.bin README_DEVELOPERS |
|
From: Daniel G. <dan...@ta...> - 2016-04-08 23:01:10
|
Hi, Is valgrind used to check valgrind? I couldn't run valgrind on itself easily, and didn't try harder: valgrind valgrind.bin Thanks, Daniel. |
|
From: <sv...@va...> - 2016-04-08 21:29:22
|
Author: iraisr
Date: Fri Apr 8 22:29:15 2016
New Revision: 15854
Log:
Follow up to bug 345307.
Passing parameter on x86 architecture was wrong in final_tidyup().
Modified:
trunk/coregrind/m_main.c
Modified: trunk/coregrind/m_main.c
==============================================================================
--- trunk/coregrind/m_main.c (original)
+++ trunk/coregrind/m_main.c Fri Apr 8 22:29:15 2016
@@ -2819,9 +2819,9 @@
/* Pass a parameter to freeres_wrapper(). */
# if defined(VGA_x86)
Addr sp = VG_(threads)[tid].arch.vex.guest_ESP;
- sp = sp - sizeof(UWord);
*((UWord *) sp) = to_run;
VG_TRACK(post_mem_write, Vg_CoreClientReq, tid, sp, sizeof(UWord));
+ sp = sp - sizeof(UWord);
VG_(threads)[tid].arch.vex.guest_ESP = sp;
VG_TRACK(post_reg_write, Vg_CoreClientReq, tid,
offsetof(VexGuestX86State, guest_ESP),
|
|
From: <sv...@va...> - 2016-04-08 20:38:39
|
Author: iraisr
Date: Fri Apr 8 21:38:30 2016
New Revision: 15853
Log:
Kludge for multiple .rodata sections on Solaris introduced by BZ#353802
is no longer needed. The situation with multiple ".rodata" sections existed
only between dozens of builds of Solaris 12.
Fixes BZ#360749
Modified:
trunk/NEWS
trunk/coregrind/m_debuginfo/readelf.c
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Fri Apr 8 21:38:30 2016
@@ -88,6 +88,7 @@
359871 Incorrect mask handling in ppoll
360425 arm64 unsupported instruction ldpsw
360519 none/tests/arm64/memory.vgtest might fail with newer gcc
+360749 kludge for multiple .rodata sections on Solaris no longer needed
360752 raise the number of reserved fds in m_main.c from 10 to 12
361354 ppc64[le]: wire up separate socketcalls system calls
361226 s390x: risbgn (EC59) not implemented
Modified: trunk/coregrind/m_debuginfo/readelf.c
==============================================================================
--- trunk/coregrind/m_debuginfo/readelf.c (original)
+++ trunk/coregrind/m_debuginfo/readelf.c Fri Apr 8 21:38:30 2016
@@ -1520,11 +1520,6 @@
XArray* /* of RangeAndBias */ svma_ranges = NULL;
-# if defined(VGO_solaris)
- Word *rodata_sects = NULL;
- Word rodata_shndx = -1;
-# endif /* VGO_solaris */
-
vg_assert(di);
vg_assert(di->fsm.have_rx_map == True);
vg_assert(di->fsm.have_rw_map == True);
@@ -1855,81 +1850,6 @@
}
/* TOPLEVEL */
-# if defined(VGO_solaris)
- /* Quick pre-scan of sections headers. Check if multiple .rodata sections
- are present. See https://bugs.kde.org/show_bug.cgi?id=353802 */
- rodata_sects = ML_(dinfo_zalloc)("di.redi_name.1",
- shdr_mnent * sizeof(Word));
- Word rodata_nsects = 0;
- Word symtab_shndx = -1;
- DiOffT symtab_sz = DiOffT_INVALID;
- DiOffT symtab_ioff = DiOffT_INVALID;
- for (i = 0; i < shdr_mnent; i++) {
- ElfXX_Shdr a_shdr;
- ML_(img_get)(&a_shdr, mimg,
- INDEX_BIS(shdr_mioff, i, shdr_ment_szB), sizeof(a_shdr));
- DiOffT name_mioff = shdr_strtab_mioff + a_shdr.sh_name;
- if (ML_(img_strcmp_c)(mimg, name_mioff, ".rodata") == 0) {
- rodata_sects[i] = True;
- rodata_nsects += 1;
- } else if (ML_(img_strcmp_c)(mimg, name_mioff, ".symtab") == 0) {
- symtab_shndx = i;
- symtab_sz = a_shdr.sh_size;
- symtab_ioff = a_shdr.sh_offset;
- }
- }
-
- if ((rodata_nsects > 1) && (symtab_shndx != -1)) {
- TRACE_SYMTAB("Multiple (%ld) .rodata sections present.\n", rodata_nsects);
-
- /* Multiple .rodata sections present. Which one the symbols point to? */
- for (i = 1; i < (Word) (symtab_sz/sizeof(ElfXX_Sym)); i++) {
- ElfXX_Sym sym;
- ML_(img_get)(&sym, mimg,
- symtab_ioff + i * sizeof(ElfXX_Sym), sizeof(sym));
- /* Consider only object symbols with size > 0. */
- if ((sym.st_size > 0) && (ELFXX_ST_TYPE(sym.st_info) == STT_OBJECT)) {
- HChar buf[100]; // large enough
- if (sym.st_shndx >= shdr_mnent) {
- VG_(snprintf)(buf, sizeof(buf), "Symbol %ld points to a "
- "non-existent section %d.\n", i, sym.st_shndx);
- ML_(symerr)(di, True, buf);
- goto out;
- }
- if (rodata_sects[sym.st_shndx] == True) {
- if (rodata_shndx == -1)
- rodata_shndx = sym.st_shndx;
-
- if (rodata_shndx != sym.st_shndx) {
- VG_(snprintf)(buf, sizeof(buf), "Object symbols point to "
- "multiple .rodata sections (%lu and %d). "
- "Giving up.\n", rodata_shndx, sym.st_shndx);
- ML_(symerr)(di, True, buf);
- goto out;
- }
- }
- }
- }
- }
-
- if (rodata_shndx == -1) {
- if (rodata_nsects >= 1) {
- for (i = 0; i < shdr_mnent; i++) {
- if (rodata_sects[i] == True)
- rodata_shndx = i;
- }
- }
-
- if (rodata_nsects > 1)
- TRACE_SYMTAB("Symbols do not point to any .rodata section. Section "
- "#%ld was chosen.\n", rodata_shndx);
- } else {
- TRACE_SYMTAB("Symbols point only to .rodata section #%ld. Good.\n",
- rodata_shndx);
- }
-# endif /* VGO_solaris */
-
- /* TOPLEVEL */
/* Iterate over section headers */
for (i = 0; i < shdr_mnent; i++) {
ElfXX_Shdr a_shdr;
@@ -2071,11 +1991,7 @@
/* Accept .rodata where mapped as rx (data), even if zero-sized */
if (0 == VG_(strcmp)(name, ".rodata")) {
- if (inrx && !di->rodata_present
-# if defined(VGO_solaris)
- && i == rodata_shndx
-# endif
- ) {
+ if (inrx && !di->rodata_present) {
di->rodata_present = True;
di->rodata_svma = svma;
di->rodata_avma = svma + inrx->bias;
@@ -2092,11 +2008,6 @@
di->rodata_avma + di->rodata_size - 1);
TRACE_SYMTAB("acquiring .rodata bias = %#lx\n",
(UWord)di->rodata_bias);
-# if defined(VGO_solaris)
- } else if (i != rodata_shndx) {
- /* Skip this section. It is of no use to us.
- See https://bugs.kde.org/show_bug.cgi?id=353802 */
-# endif
} else {
BAD(".rodata");
}
@@ -3133,10 +3044,6 @@
if (svma_ranges) VG_(deleteXA)(svma_ranges);
-# if defined(VGO_solaris)
- if (rodata_sects != NULL) ML_(dinfo_free)(rodata_sects);
-# endif
-
return res;
} /* out: */
|
Author: cborntra
Date: Thu Apr 7 19:55:25 2016
New Revision: 15852
Log:
Bug 361226 valgrind part: s390x: risbgn (EC59) not implemented
Modified:
trunk/NEWS
trunk/docs/internals/s390-opcodes.csv
trunk/none/tests/s390x/opcodes.h
trunk/none/tests/s390x/rxsbg.c
trunk/none/tests/s390x/rxsbg.stdout.exp
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Thu Apr 7 19:55:25 2016
@@ -90,6 +90,7 @@
360519 none/tests/arm64/memory.vgtest might fail with newer gcc
360752 raise the number of reserved fds in m_main.c from 10 to 12
361354 ppc64[le]: wire up separate socketcalls system calls
+361226 s390x: risbgn (EC59) not implemented
n-i-bz Fix incorrect (or infinite loop) unwind on RHEL7 x86 and amd64
n-i-bz massif --pages-as-heap=yes does not report peak caused by mmap+munmap
Modified: trunk/docs/internals/s390-opcodes.csv
==============================================================================
--- trunk/docs/internals/s390-opcodes.csv (original)
+++ trunk/docs/internals/s390-opcodes.csv Thu Apr 7 19:55:25 2016
@@ -975,7 +975,7 @@
llgtat,"load logical thirty one bits and trap 31>64","not implemented",zEC12,
clt,"compare logical and trap 32 bit reg-mem","not implemented",zEC12,
clgt,"compare logical and trap 64 bit reg-mem","not implemented",zEC12,
-risbgn,"rotate then insert selected bits nocc","not implemented",zEC12,
+risbgn,"rotate then insert selected bits nocc",implemented,zEC12,
cdzt,"convert from zoned long","not implemented",zEC12,
cxzt,"convert from zoned extended","not implemented",zEC12,
czdt,"convert to zoned long","not implemented",zEC12,
Modified: trunk/none/tests/s390x/opcodes.h
==============================================================================
--- trunk/none/tests/s390x/opcodes.h (original)
+++ trunk/none/tests/s390x/opcodes.h Thu Apr 7 19:55:25 2016
@@ -329,6 +329,7 @@
#define RNSBG(r1,r2,i3,i4,i5) RIE_RRUUU(ec,r1,r2,i3,i4,i5,54)
#define ROSBG(r1,r2,i3,i4,i5) RIE_RRUUU(ec,r1,r2,i3,i4,i5,56)
#define RXSBG(r1,r2,i3,i4,i5) RIE_RRUUU(ec,r1,r2,i3,i4,i5,57)
+#define RISBGN(r1,r2,i3,i4,i5) RIE_RRUUU(ec,r1,r2,i3,i4,i5,59)
#define SFPC(r1) RRE_R0(b384,r1)
#define SGRK(r3,r1,r2) RRF_R0RR2(b9e9,r3,0,r1,r2)
#define SHHHR(r3,r1,r2) RRF_R0RR2(b9c9,r3,0,r1,r2)
Modified: trunk/none/tests/s390x/rxsbg.c
==============================================================================
--- trunk/none/tests/s390x/rxsbg.c (original)
+++ trunk/none/tests/s390x/rxsbg.c Thu Apr 7 19:55:25 2016
@@ -6,11 +6,12 @@
register unsigned long r1 asm ("1") = _r1; \
register unsigned long r2 asm ("2") = _r2; \
int cc; \
- asm volatile( insn(1,2, i3, i4, i5) \
+ asm volatile( "clgr 1,2\n" \
+ insn(1,2, i3, i4, i5) \
"ipm %1\n" \
"srl %1,28\n" \
: "+d" (r1), "=d" (cc) \
- : "d" (r1), "d" (r2) \
+ : "d" (r1), "d" (r2) \
: "cc"); \
printf(#insn " r1(==%16.16lX),r2(==%16.16lX),0x" #i3 ",0x" #i4 ",0x" #i5 " = %16.16lX (cc=%d)\n", _r1, _r2, r1, cc); \
})
@@ -73,6 +74,7 @@
i5sweep(RNSBG);
i5sweep(ROSBG);
i5sweep(RXSBG);
+ i5sweep(RISBGN);
return 0;
}
Modified: trunk/none/tests/s390x/rxsbg.stdout.exp
==============================================================================
--- trunk/none/tests/s390x/rxsbg.stdout.exp (original)
+++ trunk/none/tests/s390x/rxsbg.stdout.exp Thu Apr 7 19:55:25 2016
@@ -6478,3 +6478,1623 @@
RXSBG r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xbf,0xbf,0x3f = 0000000000000000 (cc=1)
RXSBG r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xbf,0xbf,0x3f = 0000FFFFCCCCAAAA (cc=1)
RXSBG r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xbf,0xbf,0x3f = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x00,0x00,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0x00,0x00 = 0000FFFFCCCCAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0x00,0x00 = 7FFFFFFFFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0x00,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x00,0x00,0x00 = 0000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x00,0x00,0x00 = 7FFFFFFFFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x00,0x00,0x00 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x00,0x00,0x00 = 8000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x00,0x00,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x14,0x00,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x14,0x00,0x00 = 0000F00000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x14,0x00,0x00 = 7FFFF00000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x14,0x00,0x00 = 00000CCCFFFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x14,0x00,0x00 = 0000FCCCFFFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x14,0x00,0x00 = 7FFFFCCCFFFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x14,0x00,0x00 = 80000FFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x14,0x00,0x00 = 8000FFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x14,0x00,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x3f,0x00,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x3f,0x00,0x00 = 0000FFFFCCCCAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x3f,0x00,0x00 = 7FFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x3f,0x00,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x3f,0x00,0x00 = 0000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x3f,0x00,0x00 = 7FFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x3f,0x00,0x00 = 8000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x3f,0x00,0x00 = 8000FFFFCCCCAAAB (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x3f,0x00,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x80,0x00,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x80,0x00,0x00 = 0000FFFFCCCCAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x80,0x00,0x00 = 7FFFFFFFFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x80,0x00,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x80,0x00,0x00 = 0000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x80,0x00,0x00 = 7FFFFFFFFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x80,0x00,0x00 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x80,0x00,0x00 = 8000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x80,0x00,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xa1,0x00,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xa1,0x00,0x00 = 0000FFFF80000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xa1,0x00,0x00 = 7FFFFFFF80000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xa1,0x00,0x00 = 000000007FFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xa1,0x00,0x00 = 0000FFFFFFFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xa1,0x00,0x00 = 7FFFFFFFFFFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xa1,0x00,0x00 = 800000007FFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xa1,0x00,0x00 = 8000FFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xa1,0x00,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xbf,0x00,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xbf,0x00,0x00 = 0000FFFFCCCCAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xbf,0x00,0x00 = 7FFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xbf,0x00,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xbf,0x00,0x00 = 0000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xbf,0x00,0x00 = 7FFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xbf,0x00,0x00 = 8000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xbf,0x00,0x00 = 8000FFFFCCCCAAAB (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xbf,0x00,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x00,0x2a,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0x2a,0x00 = 00000000000CAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0x2a,0x00 = 00000000001FFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0x2a,0x00 = 5555CCCCFFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x00,0x2a,0x00 = 5555CCCCFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x00,0x2a,0x00 = 5555CCCCFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x00,0x2a,0x00 = FFFFFFFFFFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x00,0x2a,0x00 = FFFFFFFFFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x00,0x2a,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x14,0x2a,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x14,0x2a,0x00 = 0000F000000CAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x14,0x2a,0x00 = FFFFF000001FFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x14,0x2a,0x00 = 00000CCCFFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x14,0x2a,0x00 = 0000FCCCFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x14,0x2a,0x00 = FFFFFCCCFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x14,0x2a,0x00 = 00000FFFFFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x14,0x2a,0x00 = 0000FFFFFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x14,0x2a,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x3f,0x2a,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x3f,0x2a,0x00 = 00000000000CAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x3f,0x2a,0x00 = 00000000001FFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x3f,0x2a,0x00 = 5555CCCCFFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x3f,0x2a,0x00 = 5555CCCCFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x3f,0x2a,0x00 = 5555CCCCFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x3f,0x2a,0x00 = FFFFFFFFFFE00001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x3f,0x2a,0x00 = FFFFFFFFFFECAAAB (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x3f,0x2a,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x80,0x2a,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x80,0x2a,0x00 = 00000000000CAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x80,0x2a,0x00 = 00000000001FFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x80,0x2a,0x00 = 5555CCCCFFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x80,0x2a,0x00 = 5555CCCCFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x80,0x2a,0x00 = 5555CCCCFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x80,0x2a,0x00 = FFFFFFFFFFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x80,0x2a,0x00 = FFFFFFFFFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x80,0x2a,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xa1,0x2a,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xa1,0x2a,0x00 = 0000FFFF800CAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xa1,0x2a,0x00 = FFFFFFFF801FFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xa1,0x2a,0x00 = 000000007FE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xa1,0x2a,0x00 = 0000FFFFFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xa1,0x2a,0x00 = FFFFFFFFFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xa1,0x2a,0x00 = 000000007FE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xa1,0x2a,0x00 = 0000FFFFFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xa1,0x2a,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xbf,0x2a,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xbf,0x2a,0x00 = 00000000000CAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xbf,0x2a,0x00 = 00000000001FFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xbf,0x2a,0x00 = 5555CCCCFFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xbf,0x2a,0x00 = 5555CCCCFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xbf,0x2a,0x00 = 5555CCCCFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xbf,0x2a,0x00 = FFFFFFFFFFE00001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xbf,0x2a,0x00 = FFFFFFFFFFECAAAB (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xbf,0x2a,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x00,0x3f,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0x3f,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0x3f,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0x3f,0x00 = 5555CCCCFFFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x00,0x3f,0x00 = 5555CCCCFFFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x00,0x3f,0x00 = 5555CCCCFFFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x00,0x3f,0x00 = FFFFFFFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x00,0x3f,0x00 = FFFFFFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x00,0x3f,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x14,0x3f,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x14,0x3f,0x00 = 0000F00000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x14,0x3f,0x00 = FFFFF00000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x14,0x3f,0x00 = 00000CCCFFFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x14,0x3f,0x00 = 0000FCCCFFFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x14,0x3f,0x00 = FFFFFCCCFFFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x14,0x3f,0x00 = 00000FFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x14,0x3f,0x00 = 0000FFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x14,0x3f,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x3f,0x3f,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x3f,0x3f,0x00 = 0000FFFFCCCCAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x3f,0x3f,0x00 = FFFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x3f,0x3f,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x3f,0x3f,0x00 = 0000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x3f,0x3f,0x00 = FFFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x3f,0x3f,0x00 = 0000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x3f,0x3f,0x00 = 0000FFFFCCCCAAAB (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x3f,0x3f,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x80,0x3f,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x80,0x3f,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x80,0x3f,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x80,0x3f,0x00 = 5555CCCCFFFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x80,0x3f,0x00 = 5555CCCCFFFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x80,0x3f,0x00 = 5555CCCCFFFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x80,0x3f,0x00 = FFFFFFFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x80,0x3f,0x00 = FFFFFFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x80,0x3f,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xa1,0x3f,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xa1,0x3f,0x00 = 0000FFFF80000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xa1,0x3f,0x00 = FFFFFFFF80000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xa1,0x3f,0x00 = 000000007FFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xa1,0x3f,0x00 = 0000FFFFFFFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xa1,0x3f,0x00 = FFFFFFFFFFFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xa1,0x3f,0x00 = 000000007FFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xa1,0x3f,0x00 = 0000FFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xa1,0x3f,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xbf,0x3f,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xbf,0x3f,0x00 = 0000FFFFCCCCAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xbf,0x3f,0x00 = FFFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xbf,0x3f,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xbf,0x3f,0x00 = 0000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xbf,0x3f,0x00 = FFFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xbf,0x3f,0x00 = 0000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xbf,0x3f,0x00 = 0000FFFFCCCCAAAB (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xbf,0x3f,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x00,0x80,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0x80,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x00,0x80,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x00,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x00,0x80,0x00 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x00,0x80,0x00 = 8000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x00,0x80,0x00 = 8000000000000000 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x14,0x80,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x14,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x14,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x14,0x80,0x00 = 00000CCCFFFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x14,0x80,0x00 = 00000CCCFFFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x14,0x80,0x00 = 00000CCCFFFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x14,0x80,0x00 = 80000FFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x14,0x80,0x00 = 80000FFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x14,0x80,0x00 = 80000FFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x3f,0x80,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x3f,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x3f,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x3f,0x80,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x3f,0x80,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x3f,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x3f,0x80,0x00 = 8000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x3f,0x80,0x00 = 8000000000000001 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x3f,0x80,0x00 = 8000000000000001 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x80,0x80,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x80,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x80,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x80,0x80,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x80,0x80,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x80,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x80,0x80,0x00 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x80,0x80,0x00 = 8000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x80,0x80,0x00 = 8000000000000000 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xa1,0x80,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xa1,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xa1,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xa1,0x80,0x00 = 000000007FFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xa1,0x80,0x00 = 000000007FFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xa1,0x80,0x00 = 000000007FFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xa1,0x80,0x00 = 800000007FFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xa1,0x80,0x00 = 800000007FFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xa1,0x80,0x00 = 800000007FFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xbf,0x80,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xbf,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xbf,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xbf,0x80,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xbf,0x80,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xbf,0x80,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xbf,0x80,0x00 = 8000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xbf,0x80,0x00 = 8000000000000001 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xbf,0x80,0x00 = 8000000000000001 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x00,0x9e,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0x9e,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0x9e,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0x9e,0x00 = 5555CCCC00000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x00,0x9e,0x00 = 5555CCCC00000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x00,0x9e,0x00 = 5555CCCC00000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x00,0x9e,0x00 = FFFFFFFE00000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x00,0x9e,0x00 = FFFFFFFE00000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x00,0x9e,0x00 = FFFFFFFE00000000 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x14,0x9e,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x14,0x9e,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x14,0x9e,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x14,0x9e,0x00 = 00000CCC00000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x14,0x9e,0x00 = 00000CCC00000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x14,0x9e,0x00 = 00000CCC00000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x14,0x9e,0x00 = 00000FFE00000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x14,0x9e,0x00 = 00000FFE00000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x14,0x9e,0x00 = 00000FFE00000000 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x3f,0x9e,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x3f,0x9e,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x3f,0x9e,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x3f,0x9e,0x00 = 5555CCCC00000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x3f,0x9e,0x00 = 5555CCCC00000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x3f,0x9e,0x00 = 5555CCCC00000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x3f,0x9e,0x00 = FFFFFFFE00000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x3f,0x9e,0x00 = FFFFFFFE00000001 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x3f,0x9e,0x00 = FFFFFFFE00000001 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x80,0x9e,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x80,0x9e,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x80,0x9e,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x80,0x9e,0x00 = 5555CCCC00000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x80,0x9e,0x00 = 5555CCCC00000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x80,0x9e,0x00 = 5555CCCC00000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x80,0x9e,0x00 = FFFFFFFE00000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x80,0x9e,0x00 = FFFFFFFE00000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x80,0x9e,0x00 = FFFFFFFE00000000 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xa1,0x9e,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xa1,0x9e,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xa1,0x9e,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xa1,0x9e,0x00 = 5555CCCC7FFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xa1,0x9e,0x00 = 5555CCCC7FFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xa1,0x9e,0x00 = 5555CCCC7FFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xa1,0x9e,0x00 = FFFFFFFE7FFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xa1,0x9e,0x00 = FFFFFFFE7FFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xa1,0x9e,0x00 = FFFFFFFE7FFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xbf,0x9e,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xbf,0x9e,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xbf,0x9e,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xbf,0x9e,0x00 = 5555CCCC00000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xbf,0x9e,0x00 = 5555CCCC00000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xbf,0x9e,0x00 = 5555CCCC00000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xbf,0x9e,0x00 = FFFFFFFE00000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xbf,0x9e,0x00 = FFFFFFFE00000001 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xbf,0x9e,0x00 = FFFFFFFE00000001 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x00,0xbf,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0xbf,0x00 = 5555CCCCFFFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x00,0xbf,0x00 = 5555CCCCFFFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x00,0xbf,0x00 = 5555CCCCFFFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x00,0xbf,0x00 = FFFFFFFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x00,0xbf,0x00 = FFFFFFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x00,0xbf,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x14,0xbf,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x14,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x14,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x14,0xbf,0x00 = 00000CCCFFFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x14,0xbf,0x00 = 00000CCCFFFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x14,0xbf,0x00 = 00000CCCFFFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x14,0xbf,0x00 = 00000FFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x14,0xbf,0x00 = 00000FFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x14,0xbf,0x00 = 00000FFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x3f,0xbf,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x3f,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x3f,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x3f,0xbf,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x3f,0xbf,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x3f,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x3f,0xbf,0x00 = 0000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x3f,0xbf,0x00 = 0000000000000001 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x3f,0xbf,0x00 = 0000000000000001 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x80,0xbf,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x80,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x80,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x80,0xbf,0x00 = 5555CCCCFFFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x80,0xbf,0x00 = 5555CCCCFFFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x80,0xbf,0x00 = 5555CCCCFFFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x80,0xbf,0x00 = FFFFFFFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x80,0xbf,0x00 = FFFFFFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x80,0xbf,0x00 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xa1,0xbf,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xa1,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xa1,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xa1,0xbf,0x00 = 000000007FFF0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xa1,0xbf,0x00 = 000000007FFF0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xa1,0xbf,0x00 = 000000007FFF0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xa1,0xbf,0x00 = 000000007FFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xa1,0xbf,0x00 = 000000007FFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xa1,0xbf,0x00 = 000000007FFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xbf,0xbf,0x00 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xbf,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xbf,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xbf,0xbf,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xbf,0xbf,0x00 = 0000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xbf,0xbf,0x00 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xbf,0xbf,0x00 = 0000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xbf,0xbf,0x00 = 0000000000000001 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xbf,0xbf,0x00 = 0000000000000001 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x00,0x00,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0x00,0x01 = 0000FFFFCCCCAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0x00,0x01 = 7FFFFFFFFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0x00,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x00,0x00,0x01 = 8000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x00,0x00,0x01 = FFFFFFFFFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x00,0x00,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x00,0x00,0x01 = 8000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x00,0x00,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x14,0x00,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x14,0x00,0x01 = 0000F00000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x14,0x00,0x01 = 7FFFF00000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x14,0x00,0x01 = 80000999FFFE0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x14,0x00,0x01 = 8000F999FFFE0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x14,0x00,0x01 = FFFFF999FFFE0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x14,0x00,0x01 = 80000FFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x14,0x00,0x01 = 8000FFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x14,0x00,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x3f,0x00,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x3f,0x00,0x01 = 0000FFFFCCCCAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x3f,0x00,0x01 = 7FFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x3f,0x00,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x3f,0x00,0x01 = 8000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x3f,0x00,0x01 = FFFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x3f,0x00,0x01 = 8000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x3f,0x00,0x01 = 8000FFFFCCCCAAAB (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x3f,0x00,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x80,0x00,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x80,0x00,0x01 = 0000FFFFCCCCAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x80,0x00,0x01 = 7FFFFFFFFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x80,0x00,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x80,0x00,0x01 = 8000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x80,0x00,0x01 = FFFFFFFFFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x80,0x00,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x80,0x00,0x01 = 8000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x80,0x00,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xa1,0x00,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xa1,0x00,0x01 = 0000FFFF80000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xa1,0x00,0x01 = 7FFFFFFF80000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xa1,0x00,0x01 = 800000007FFE0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xa1,0x00,0x01 = 8000FFFFFFFE0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xa1,0x00,0x01 = FFFFFFFFFFFE0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xa1,0x00,0x01 = 800000007FFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xa1,0x00,0x01 = 8000FFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xa1,0x00,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xbf,0x00,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xbf,0x00,0x01 = 0000FFFFCCCCAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xbf,0x00,0x01 = 7FFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xbf,0x00,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xbf,0x00,0x01 = 8000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xbf,0x00,0x01 = FFFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xbf,0x00,0x01 = 8000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xbf,0x00,0x01 = 8000FFFFCCCCAAAB (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xbf,0x00,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x00,0x2a,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0x2a,0x01 = 00000000000CAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0x2a,0x01 = 00000000001FFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0x2a,0x01 = AAAB9999FFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x00,0x2a,0x01 = AAAB9999FFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x00,0x2a,0x01 = AAAB9999FFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x00,0x2a,0x01 = FFFFFFFFFFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x00,0x2a,0x01 = FFFFFFFFFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x00,0x2a,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x14,0x2a,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x14,0x2a,0x01 = 0000F000000CAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x14,0x2a,0x01 = FFFFF000001FFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x14,0x2a,0x01 = 00000999FFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x14,0x2a,0x01 = 0000F999FFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x14,0x2a,0x01 = FFFFF999FFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x14,0x2a,0x01 = 00000FFFFFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x14,0x2a,0x01 = 0000FFFFFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x14,0x2a,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x3f,0x2a,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x3f,0x2a,0x01 = 00000000000CAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x3f,0x2a,0x01 = 00000000001FFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x3f,0x2a,0x01 = AAAB9999FFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x3f,0x2a,0x01 = AAAB9999FFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x3f,0x2a,0x01 = AAAB9999FFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x3f,0x2a,0x01 = FFFFFFFFFFE00001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x3f,0x2a,0x01 = FFFFFFFFFFECAAAB (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x3f,0x2a,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x80,0x2a,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x80,0x2a,0x01 = 00000000000CAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x80,0x2a,0x01 = 00000000001FFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x80,0x2a,0x01 = AAAB9999FFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x80,0x2a,0x01 = AAAB9999FFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x80,0x2a,0x01 = AAAB9999FFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x80,0x2a,0x01 = FFFFFFFFFFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x80,0x2a,0x01 = FFFFFFFFFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x80,0x2a,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xa1,0x2a,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xa1,0x2a,0x01 = 0000FFFF800CAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xa1,0x2a,0x01 = FFFFFFFF801FFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xa1,0x2a,0x01 = 000000007FE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xa1,0x2a,0x01 = 0000FFFFFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xa1,0x2a,0x01 = FFFFFFFFFFFFFFFF (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xa1,0x2a,0x01 = 000000007FE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xa1,0x2a,0x01 = 0000FFFFFFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xa1,0x2a,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xbf,0x2a,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xbf,0x2a,0x01 = 00000000000CAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xbf,0x2a,0x01 = 00000000001FFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xbf,0x2a,0x01 = AAAB9999FFE00000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xbf,0x2a,0x01 = AAAB9999FFECAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xbf,0x2a,0x01 = AAAB9999FFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xbf,0x2a,0x01 = FFFFFFFFFFE00001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xbf,0x2a,0x01 = FFFFFFFFFFECAAAB (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xbf,0x2a,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x00,0x3f,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0x3f,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0x3f,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0x3f,0x01 = AAAB9999FFFE0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x00,0x3f,0x01 = AAAB9999FFFE0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x00,0x3f,0x01 = AAAB9999FFFE0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x00,0x3f,0x01 = FFFFFFFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x00,0x3f,0x01 = FFFFFFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x00,0x3f,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x14,0x3f,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x14,0x3f,0x01 = 0000F00000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x14,0x3f,0x01 = FFFFF00000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x14,0x3f,0x01 = 00000999FFFE0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x14,0x3f,0x01 = 0000F999FFFE0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x14,0x3f,0x01 = FFFFF999FFFE0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x14,0x3f,0x01 = 00000FFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x14,0x3f,0x01 = 0000FFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x14,0x3f,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x3f,0x3f,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x3f,0x3f,0x01 = 0000FFFFCCCCAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x3f,0x3f,0x01 = FFFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x3f,0x3f,0x01 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x3f,0x3f,0x01 = 0000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x3f,0x3f,0x01 = FFFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x3f,0x3f,0x01 = 0000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x3f,0x3f,0x01 = 0000FFFFCCCCAAAB (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x3f,0x3f,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x80,0x3f,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x80,0x3f,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x80,0x3f,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x80,0x3f,0x01 = AAAB9999FFFE0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x80,0x3f,0x01 = AAAB9999FFFE0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x80,0x3f,0x01 = AAAB9999FFFE0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x80,0x3f,0x01 = FFFFFFFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x80,0x3f,0x01 = FFFFFFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x80,0x3f,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xa1,0x3f,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xa1,0x3f,0x01 = 0000FFFF80000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xa1,0x3f,0x01 = FFFFFFFF80000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xa1,0x3f,0x01 = 000000007FFE0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xa1,0x3f,0x01 = 0000FFFFFFFE0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xa1,0x3f,0x01 = FFFFFFFFFFFE0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xa1,0x3f,0x01 = 000000007FFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xa1,0x3f,0x01 = 0000FFFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xa1,0x3f,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xbf,0x3f,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xbf,0x3f,0x01 = 0000FFFFCCCCAAAA (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xbf,0x3f,0x01 = FFFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xbf,0x3f,0x01 = 0000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xbf,0x3f,0x01 = 0000FFFFCCCCAAAA (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xbf,0x3f,0x01 = FFFFFFFFFFFFFFFE (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xbf,0x3f,0x01 = 0000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xbf,0x3f,0x01 = 0000FFFFCCCCAAAB (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xbf,0x3f,0x01 = FFFFFFFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x00,0x80,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0x80,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0x80,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0x80,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x00,0x80,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x00,0x80,0x01 = 8000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x00,0x80,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x00,0x80,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x00,0x80,0x01 = 8000000000000000 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x14,0x80,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x14,0x80,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x14,0x80,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x14,0x80,0x01 = 80000999FFFE0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x14,0x80,0x01 = 80000999FFFE0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x14,0x80,0x01 = 80000999FFFE0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x14,0x80,0x01 = 80000FFFFFFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x14,0x80,0x01 = 80000FFFFFFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x14,0x80,0x01 = 80000FFFFFFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x3f,0x80,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x3f,0x80,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x3f,0x80,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x3f,0x80,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x3f,0x80,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x3f,0x80,0x01 = 8000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x3f,0x80,0x01 = 8000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x3f,0x80,0x01 = 8000000000000001 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x3f,0x80,0x01 = 8000000000000001 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x80,0x80,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x80,0x80,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x80,0x80,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x80,0x80,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x80,0x80,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x80,0x80,0x01 = 8000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x80,0x80,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x80,0x80,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x80,0x80,0x01 = 8000000000000000 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xa1,0x80,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xa1,0x80,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xa1,0x80,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xa1,0x80,0x01 = 800000007FFE0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xa1,0x80,0x01 = 800000007FFE0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xa1,0x80,0x01 = 800000007FFE0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xa1,0x80,0x01 = 800000007FFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xa1,0x80,0x01 = 800000007FFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xa1,0x80,0x01 = 800000007FFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xbf,0x80,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xbf,0x80,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xbf,0x80,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xbf,0x80,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xbf,0x80,0x01 = 8000000000000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xbf,0x80,0x01 = 8000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xbf,0x80,0x01 = 8000000000000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xbf,0x80,0x01 = 8000000000000001 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xbf,0x80,0x01 = 8000000000000001 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x00,0x9e,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0x9e,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0x9e,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0x9e,0x01 = AAAB999800000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x00,0x9e,0x01 = AAAB999800000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x00,0x9e,0x01 = AAAB999800000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x00,0x9e,0x01 = FFFFFFFE00000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x00,0x9e,0x01 = FFFFFFFE00000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x00,0x9e,0x01 = FFFFFFFE00000000 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x14,0x9e,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x14,0x9e,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x14,0x9e,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x14,0x9e,0x01 = 0000099800000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x14,0x9e,0x01 = 0000099800000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x14,0x9e,0x01 = 0000099800000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x14,0x9e,0x01 = 00000FFE00000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x14,0x9e,0x01 = 00000FFE00000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x14,0x9e,0x01 = 00000FFE00000000 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x3f,0x9e,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x3f,0x9e,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x3f,0x9e,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x3f,0x9e,0x01 = AAAB999800000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x3f,0x9e,0x01 = AAAB999800000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x3f,0x9e,0x01 = AAAB999800000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x3f,0x9e,0x01 = FFFFFFFE00000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x3f,0x9e,0x01 = FFFFFFFE00000001 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x3f,0x9e,0x01 = FFFFFFFE00000001 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x80,0x9e,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x80,0x9e,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x80,0x9e,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x80,0x9e,0x01 = AAAB999800000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0x80,0x9e,0x01 = AAAB999800000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0x80,0x9e,0x01 = AAAB999800000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0x80,0x9e,0x01 = FFFFFFFE00000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0x80,0x9e,0x01 = FFFFFFFE00000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0x80,0x9e,0x01 = FFFFFFFE00000000 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xa1,0x9e,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xa1,0x9e,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xa1,0x9e,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xa1,0x9e,0x01 = AAAB99987FFE0000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xa1,0x9e,0x01 = AAAB99987FFE0000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xa1,0x9e,0x01 = AAAB99987FFE0000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xa1,0x9e,0x01 = FFFFFFFE7FFFFFFF (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xa1,0x9e,0x01 = FFFFFFFE7FFFFFFF (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xa1,0x9e,0x01 = FFFFFFFE7FFFFFFF (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0xbf,0x9e,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0xbf,0x9e,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0xbf,0x9e,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0xbf,0x9e,0x01 = AAAB999800000000 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==5555CCCCFFFF0000),0xbf,0x9e,0x01 = AAAB999800000000 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==5555CCCCFFFF0000),0xbf,0x9e,0x01 = AAAB999800000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==FFFFFFFFFFFFFFFF),0xbf,0x9e,0x01 = FFFFFFFE00000001 (cc=1)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==FFFFFFFFFFFFFFFF),0xbf,0x9e,0x01 = FFFFFFFE00000001 (cc=1)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==FFFFFFFFFFFFFFFF),0xbf,0x9e,0x01 = FFFFFFFE00000001 (cc=0)
+RISBGN r1(==0000000000000000),r2(==0000000000000000),0x00,0xbf,0x01 = 0000000000000000 (cc=0)
+RISBGN r1(==0000FFFFCCCCAAAA),r2(==0000000000000000),0x00,0xbf,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==FFFFFFFFFFFFFFFF),r2(==0000000000000000),0x00,0xbf,0x01 = 0000000000000000 (cc=2)
+RISBGN r1(==0000000000000000),r2(==5555CCCCFFFF0000),0x00,0xbf,0x01 = AAAB9999FFFE0000 (cc=1)
+RISBGN r1(==...
[truncated message content] |
|
From: <sv...@va...> - 2016-04-07 18:55:00
|
Author: cborntra
Date: Thu Apr 7 19:54:53 2016
New Revision: 3216
Log:
Bug 361226 VEX part: s390x: risbgn (EC59) not implemented
Modified:
trunk/priv/guest_s390_toIR.c
Modified: trunk/priv/guest_s390_toIR.c
==============================================================================
--- trunk/priv/guest_s390_toIR.c (original)
+++ trunk/priv/guest_s390_toIR.c Thu Apr 7 19:54:53 2016
@@ -7578,7 +7578,8 @@
}
static const HChar *
-s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+s390_irgen_RISBGx(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5,
+ Bool set_cc)
{
UChar from;
UChar to;
@@ -7612,9 +7613,24 @@
put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
}
assign(result, get_gpr_dw0(r1));
- s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
+ if (set_cc) {
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
+ return "risbg";
+ }
+
+ return "risbgn";
+}
+
+static const HChar *
+s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+{
+ return s390_irgen_RISBGx(r1, r2, i3, i4, i5, True);
+}
- return "risbg";
+static const HChar *
+s390_irgen_RISBGN(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+{
+ return s390_irgen_RISBGx(r1, r2, i3, i4, i5, False);
}
static const HChar *
@@ -16059,7 +16075,13 @@
ovl.fmt.RIE_RRUUU.i4,
ovl.fmt.RIE_RRUUU.i5);
goto ok;
- case 0xec0000000059ULL: /* RISBGN */ goto unimplemented;
+ case 0xec0000000059ULL: s390_format_RIE_RRUUU(s390_irgen_RISBGN,
+ ovl.fmt.RIE_RRUUU.r1,
+ ovl.fmt.RIE_RRUUU.r2,
+ ovl.fmt.RIE_RRUUU.i3,
+ ovl.fmt.RIE_RRUUU.i4,
+ ovl.fmt.RIE_RRUUU.i5);
+ goto ok;
case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
ovl.fmt.RIE_RRPU.r1,
|
|
From: <sv...@va...> - 2016-04-07 03:49:07
|
Author: rhyskidd
Date: Thu Apr 7 04:48:59 2016
New Revision: 15851
Log:
Fix ppoll_alarm exclusion on OS X. n-i-bz.
ppoll() is not POSIX, and accordingly we should ignore the lack
of support for this on OS X.
Exclude the ppoll_alarm regression test on that platform, as
introduced in r15823.
Regression test output on OS X 10.11
Before:
n/a
After:
== 602 tests, 223 stderr failures, 13 stdout failures, 0 stderrB failures, 0 stdoutB failures, 31 post failures ==
Modified:
trunk/NEWS
trunk/none/tests/Makefile.am
trunk/none/tests/ppoll_alarm.vgtest
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Thu Apr 7 04:48:59 2016
@@ -94,6 +94,7 @@
n-i-bz Fix incorrect (or infinite loop) unwind on RHEL7 x86 and amd64
n-i-bz massif --pages-as-heap=yes does not report peak caused by mmap+munmap
n-i-bz false positive leaks due to aspacemgr merging non heap segments with heap segments.
+n-i-bz Fix ppoll_alarm exclusion on OS X
Release 3.11.0 (22 September 2015)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Modified: trunk/none/tests/Makefile.am
==============================================================================
--- trunk/none/tests/Makefile.am (original)
+++ trunk/none/tests/Makefile.am Thu Apr 7 04:48:59 2016
@@ -217,7 +217,6 @@
mmap_fcntl_bug \
munmap_exe map_unaligned map_unmap mq \
pending \
- ppoll_alarm \
procfs-cmdline-exe \
pselect_alarm \
pth_atfork1 pth_blockedsig pth_cancel1 pth_cancel2 pth_cvsimple \
@@ -251,7 +250,8 @@
# This doesn't appear to be compilable on Darwin.
if ! VGCONF_OS_IS_DARWIN
- check_PROGRAMS += rlimit64_nofile
+ check_PROGRAMS += rlimit64_nofile \
+ ppoll_alarm
endif
# clang does not know -ansi
Modified: trunk/none/tests/ppoll_alarm.vgtest
==============================================================================
--- trunk/none/tests/ppoll_alarm.vgtest (original)
+++ trunk/none/tests/ppoll_alarm.vgtest Thu Apr 7 04:48:59 2016
@@ -1,3 +1,4 @@
+prereq: ../../tests/os_test linux || ../../tests/os_test solaris
prog: ppoll_alarm
vgopts: -q
stderr_filter: filter_stderr
|
|
From: <sv...@va...> - 2016-04-06 09:52:26
|
Author: sewardj
Date: Wed Apr 6 10:52:17 2016
New Revision: 15850
Log:
Improve performance of helperc_MAKE_STACK_UNINIT, especially for the
amd64-{linux,darwin} cases. n-i-bz.
Modified:
trunk/memcheck/mc_include.h
trunk/memcheck/mc_main.c
trunk/memcheck/mc_translate.c
Modified: trunk/memcheck/mc_include.h
==============================================================================
--- trunk/memcheck/mc_include.h (original)
+++ trunk/memcheck/mc_include.h Wed Apr 6 10:52:17 2016
@@ -316,6 +316,12 @@
MCPE_DIE_MEM_STACK_128,
MCPE_DIE_MEM_STACK_144,
MCPE_DIE_MEM_STACK_160,
+ MCPE_MAKE_STACK_UNINIT_W_O,
+ MCPE_MAKE_STACK_UNINIT_NO_O,
+ MCPE_MAKE_STACK_UNINIT_128_NO_O,
+ MCPE_MAKE_STACK_UNINIT_128_NO_O_ALIGNED_16,
+ MCPE_MAKE_STACK_UNINIT_128_NO_O_ALIGNED_8,
+ MCPE_MAKE_STACK_UNINIT_128_NO_O_SLOWCASE,
/* Do not add enumerators past this line. */
MCPE_LAST
};
@@ -749,8 +755,14 @@
VG_REGPARM(1) UWord MC_(helperc_LOADV16le) ( Addr );
VG_REGPARM(1) UWord MC_(helperc_LOADV8) ( Addr );
-void MC_(helperc_MAKE_STACK_UNINIT) ( Addr base, UWord len,
- Addr nia );
+VG_REGPARM(3)
+void MC_(helperc_MAKE_STACK_UNINIT_w_o) ( Addr base, UWord len, Addr nia );
+
+VG_REGPARM(2)
+void MC_(helperc_MAKE_STACK_UNINIT_no_o) ( Addr base, UWord len );
+
+VG_REGPARM(1)
+void MC_(helperc_MAKE_STACK_UNINIT_128_no_o) ( Addr base );
/* Origin tag load/store helpers */
VG_REGPARM(2) void MC_(helperc_b_store1) ( Addr a, UWord d32 );
Modified: trunk/memcheck/mc_main.c
==============================================================================
--- trunk/memcheck/mc_main.c (original)
+++ trunk/memcheck/mc_main.c Wed Apr 6 10:52:17 2016
@@ -255,6 +255,9 @@
#define VA_BITS16_UNDEFINED 0x5555 // 01_01_01_01b x 2
#define VA_BITS16_DEFINED 0xaaaa // 10_10_10_10b x 2
+// These represent 128 bits of memory.
+#define VA_BITS32_UNDEFINED 0x55555555 // 01_01_01_01b x 4
+
#define SM_CHUNKS 16384 // Each SM covers 64k of memory.
#define SM_OFF(aaa) (((aaa) & 0xffff) >> 2)
@@ -596,6 +599,12 @@
// In all these, 'low' means it's definitely in the main primary map,
// 'high' means it's definitely in the auxiliary table.
+static INLINE UWord get_primary_map_low_offset ( Addr a )
+{
+ UWord pm_off = a >> 16;
+ return pm_off;
+}
+
static INLINE SecMap** get_secmap_low_ptr ( Addr a )
{
UWord pm_off = a >> 16;
@@ -3515,31 +3524,22 @@
}
-/* Note that this serves both the origin-tracking and
- no-origin-tracking modes. We assume that calls to it are
- sufficiently infrequent that it isn't worth specialising for the
- with/without origin-tracking cases. */
-void MC_(helperc_MAKE_STACK_UNINIT) ( Addr base, UWord len, Addr nia )
+/* This marks the stack as addressible but undefined, after a call or
+ return for a target that has an ABI defined stack redzone. It
+ happens quite a lot and needs to be fast. This is the version for
+ origin tracking. The non-origin-tracking version is below. */
+VG_REGPARM(3)
+void MC_(helperc_MAKE_STACK_UNINIT_w_o) ( Addr base, UWord len, Addr nia )
{
- UInt otag;
- tl_assert(sizeof(UWord) == sizeof(SizeT));
+ PROF_EVENT(MCPE_MAKE_STACK_UNINIT_W_O);
if (0)
- VG_(printf)("helperc_MAKE_STACK_UNINIT (%#lx,%lu,nia=%#lx)\n",
+ VG_(printf)("helperc_MAKE_STACK_UNINIT_w_o (%#lx,%lu,nia=%#lx)\n",
base, len, nia );
- if (UNLIKELY( MC_(clo_mc_level) == 3 )) {
- UInt ecu = convert_nia_to_ecu ( nia );
- tl_assert(VG_(is_plausible_ECU)(ecu));
- otag = ecu | MC_OKIND_STACK;
- } else {
- tl_assert(nia == 0);
- otag = 0;
- }
+ UInt ecu = convert_nia_to_ecu ( nia );
+ tl_assert(VG_(is_plausible_ECU)(ecu));
-# if 0
- /* Really slow version */
- MC_(make_mem_undefined_w_otag)(base, len, otag);
-# endif
+ UInt otag = ecu | MC_OKIND_STACK;
# if 0
/* Slow(ish) version, which is fairly easily seen to be correct.
@@ -3577,21 +3577,20 @@
directly into the vabits array. (If the sm was distinguished, this
will make a copy and then write to it.)
*/
-
if (LIKELY( len == 128 && VG_IS_8_ALIGNED(base) )) {
/* Now we know the address range is suitably sized and aligned. */
UWord a_lo = (UWord)(base);
UWord a_hi = (UWord)(base + 128 - 1);
tl_assert(a_lo < a_hi); // paranoia: detect overflow
- if (a_hi <= MAX_PRIMARY_ADDRESS) {
- // Now we know the entire range is within the main primary map.
- SecMap* sm = get_secmap_for_writing_low(a_lo);
- SecMap* sm_hi = get_secmap_for_writing_low(a_hi);
- /* Now we know that the entire address range falls within a
- single secondary map, and that that secondary 'lives' in
- the main primary map. */
- if (LIKELY(sm == sm_hi)) {
- // Finally, we know that the range is entirely within one secmap.
+ if (LIKELY(a_hi <= MAX_PRIMARY_ADDRESS)) {
+ /* Now we know the entire range is within the main primary map. */
+ UWord pm_off_lo = get_primary_map_low_offset(a_lo);
+ UWord pm_off_hi = get_primary_map_low_offset(a_hi);
+ if (LIKELY(pm_off_lo == pm_off_hi)) {
+ /* Now we know that the entire address range falls within a
+ single secondary map, and that that secondary 'lives' in
+ the main primary map. */
+ SecMap* sm = get_secmap_for_writing_low(a_lo);
UWord v_off = SM_OFF(a_lo);
UShort* p = (UShort*)(&sm->vabits8[v_off]);
p[ 0] = VA_BITS16_UNDEFINED;
@@ -3610,24 +3609,22 @@
p[13] = VA_BITS16_UNDEFINED;
p[14] = VA_BITS16_UNDEFINED;
p[15] = VA_BITS16_UNDEFINED;
- if (UNLIKELY( MC_(clo_mc_level) == 3 )) {
- set_aligned_word64_Origin_to_undef( base + 8 * 0, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 1, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 2, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 3, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 4, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 5, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 6, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 7, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 8, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 9, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 10, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 11, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 12, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 13, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 14, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 15, otag );
- }
+ set_aligned_word64_Origin_to_undef( base + 8 * 0, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 1, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 2, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 3, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 4, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 5, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 6, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 7, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 8, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 9, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 10, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 11, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 12, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 13, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 14, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 15, otag );
return;
}
}
@@ -3640,14 +3637,13 @@
UWord a_hi = (UWord)(base + 288 - 1);
tl_assert(a_lo < a_hi); // paranoia: detect overflow
if (a_hi <= MAX_PRIMARY_ADDRESS) {
- // Now we know the entire range is within the main primary map.
- SecMap* sm = get_secmap_for_writing_low(a_lo);
- SecMap* sm_hi = get_secmap_for_writing_low(a_hi);
- /* Now we know that the entire address range falls within a
- single secondary map, and that that secondary 'lives' in
- the main primary map. */
- if (LIKELY(sm == sm_hi)) {
- // Finally, we know that the range is entirely within one secmap.
+ UWord pm_off_lo = get_primary_map_low_offset(a_lo);
+ UWord pm_off_hi = get_primary_map_low_offset(a_hi);
+ if (LIKELY(pm_off_lo == pm_off_hi)) {
+ /* Now we know that the entire address range falls within a
+ single secondary map, and that that secondary 'lives' in
+ the main primary map. */
+ SecMap* sm = get_secmap_for_writing_low(a_lo);
UWord v_off = SM_OFF(a_lo);
UShort* p = (UShort*)(&sm->vabits8[v_off]);
p[ 0] = VA_BITS16_UNDEFINED;
@@ -3686,44 +3682,42 @@
p[33] = VA_BITS16_UNDEFINED;
p[34] = VA_BITS16_UNDEFINED;
p[35] = VA_BITS16_UNDEFINED;
- if (UNLIKELY( MC_(clo_mc_level) == 3 )) {
- set_aligned_word64_Origin_to_undef( base + 8 * 0, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 1, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 2, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 3, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 4, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 5, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 6, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 7, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 8, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 9, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 10, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 11, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 12, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 13, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 14, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 15, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 16, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 17, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 18, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 19, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 20, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 21, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 22, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 23, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 24, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 25, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 26, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 27, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 28, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 29, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 30, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 31, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 32, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 33, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 34, otag );
- set_aligned_word64_Origin_to_undef( base + 8 * 35, otag );
- }
+ set_aligned_word64_Origin_to_undef( base + 8 * 0, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 1, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 2, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 3, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 4, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 5, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 6, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 7, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 8, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 9, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 10, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 11, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 12, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 13, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 14, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 15, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 16, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 17, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 18, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 19, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 20, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 21, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 22, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 23, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 24, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 25, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 26, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 27, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 28, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 29, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 30, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 31, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 32, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 33, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 34, otag );
+ set_aligned_word64_Origin_to_undef( base + 8 * 35, otag );
return;
}
}
@@ -3734,6 +3728,278 @@
}
+/* This is a version of MC_(helperc_MAKE_STACK_UNINIT_w_o) that is
+ specialised for the non-origin-tracking case. */
+VG_REGPARM(2)
+void MC_(helperc_MAKE_STACK_UNINIT_no_o) ( Addr base, UWord len )
+{
+ PROF_EVENT(MCPE_MAKE_STACK_UNINIT_NO_O);
+ if (0)
+ VG_(printf)("helperc_MAKE_STACK_UNINIT_no_o (%#lx,%lu)\n",
+ base, len );
+
+# if 0
+ /* Slow(ish) version, which is fairly easily seen to be correct.
+ */
+ if (LIKELY( VG_IS_8_ALIGNED(base) && len==128 )) {
+ make_aligned_word64_undefined(base + 0);
+ make_aligned_word64_undefined(base + 8);
+ make_aligned_word64_undefined(base + 16);
+ make_aligned_word64_undefined(base + 24);
+
+ make_aligned_word64_undefined(base + 32);
+ make_aligned_word64_undefined(base + 40);
+ make_aligned_word64_undefined(base + 48);
+ make_aligned_word64_undefined(base + 56);
+
+ make_aligned_word64_undefined(base + 64);
+ make_aligned_word64_undefined(base + 72);
+ make_aligned_word64_undefined(base + 80);
+ make_aligned_word64_undefined(base + 88);
+
+ make_aligned_word64_undefined(base + 96);
+ make_aligned_word64_undefined(base + 104);
+ make_aligned_word64_undefined(base + 112);
+ make_aligned_word64_undefined(base + 120);
+ } else {
+ make_mem_undefined(base, len);
+ }
+# endif
+
+ /* Idea is: go fast when
+ * 8-aligned and length is 128
+ * the sm is available in the main primary map
+ * the address range falls entirely with a single secondary map
+ If all those conditions hold, just update the V+A bits by writing
+ directly into the vabits array. (If the sm was distinguished, this
+ will make a copy and then write to it.)
+ */
+ if (LIKELY( len == 128 && VG_IS_8_ALIGNED(base) )) {
+ /* Now we know the address range is suitably sized and aligned. */
+ UWord a_lo = (UWord)(base);
+ UWord a_hi = (UWord)(base + 128 - 1);
+ tl_assert(a_lo < a_hi); // paranoia: detect overflow
+ if (LIKELY(a_hi <= MAX_PRIMARY_ADDRESS)) {
+ /* Now we know the entire range is within the main primary map. */
+ UWord pm_off_lo = get_primary_map_low_offset(a_lo);
+ UWord pm_off_hi = get_primary_map_low_offset(a_hi);
+ if (LIKELY(pm_off_lo == pm_off_hi)) {
+ /* Now we know that the entire address range falls within a
+ single secondary map, and that that secondary 'lives' in
+ the main primary map. */
+ SecMap* sm = get_secmap_for_writing_low(a_lo);
+ UWord v_off = SM_OFF(a_lo);
+ UShort* p = (UShort*)(&sm->vabits8[v_off]);
+ p[ 0] = VA_BITS16_UNDEFINED;
+ p[ 1] = VA_BITS16_UNDEFINED;
+ p[ 2] = VA_BITS16_UNDEFINED;
+ p[ 3] = VA_BITS16_UNDEFINED;
+ p[ 4] = VA_BITS16_UNDEFINED;
+ p[ 5] = VA_BITS16_UNDEFINED;
+ p[ 6] = VA_BITS16_UNDEFINED;
+ p[ 7] = VA_BITS16_UNDEFINED;
+ p[ 8] = VA_BITS16_UNDEFINED;
+ p[ 9] = VA_BITS16_UNDEFINED;
+ p[10] = VA_BITS16_UNDEFINED;
+ p[11] = VA_BITS16_UNDEFINED;
+ p[12] = VA_BITS16_UNDEFINED;
+ p[13] = VA_BITS16_UNDEFINED;
+ p[14] = VA_BITS16_UNDEFINED;
+ p[15] = VA_BITS16_UNDEFINED;
+ return;
+ }
+ }
+ }
+
+ /* 288 bytes (36 ULongs) is the magic value for ELF ppc64. */
+ if (LIKELY( len == 288 && VG_IS_8_ALIGNED(base) )) {
+ /* Now we know the address range is suitably sized and aligned. */
+ UWord a_lo = (UWord)(base);
+ UWord a_hi = (UWord)(base + 288 - 1);
+ tl_assert(a_lo < a_hi); // paranoia: detect overflow
+ if (a_hi <= MAX_PRIMARY_ADDRESS) {
+ UWord pm_off_lo = get_primary_map_low_offset(a_lo);
+ UWord pm_off_hi = get_primary_map_low_offset(a_hi);
+ if (LIKELY(pm_off_lo == pm_off_hi)) {
+ /* Now we know that the entire address range falls within a
+ single secondary map, and that that secondary 'lives' in
+ the main primary map. */
+ SecMap* sm = get_secmap_for_writing_low(a_lo);
+ UWord v_off = SM_OFF(a_lo);
+ UShort* p = (UShort*)(&sm->vabits8[v_off]);
+ p[ 0] = VA_BITS16_UNDEFINED;
+ p[ 1] = VA_BITS16_UNDEFINED;
+ p[ 2] = VA_BITS16_UNDEFINED;
+ p[ 3] = VA_BITS16_UNDEFINED;
+ p[ 4] = VA_BITS16_UNDEFINED;
+ p[ 5] = VA_BITS16_UNDEFINED;
+ p[ 6] = VA_BITS16_UNDEFINED;
+ p[ 7] = VA_BITS16_UNDEFINED;
+ p[ 8] = VA_BITS16_UNDEFINED;
+ p[ 9] = VA_BITS16_UNDEFINED;
+ p[10] = VA_BITS16_UNDEFINED;
+ p[11] = VA_BITS16_UNDEFINED;
+ p[12] = VA_BITS16_UNDEFINED;
+ p[13] = VA_BITS16_UNDEFINED;
+ p[14] = VA_BITS16_UNDEFINED;
+ p[15] = VA_BITS16_UNDEFINED;
+ p[16] = VA_BITS16_UNDEFINED;
+ p[17] = VA_BITS16_UNDEFINED;
+ p[18] = VA_BITS16_UNDEFINED;
+ p[19] = VA_BITS16_UNDEFINED;
+ p[20] = VA_BITS16_UNDEFINED;
+ p[21] = VA_BITS16_UNDEFINED;
+ p[22] = VA_BITS16_UNDEFINED;
+ p[23] = VA_BITS16_UNDEFINED;
+ p[24] = VA_BITS16_UNDEFINED;
+ p[25] = VA_BITS16_UNDEFINED;
+ p[26] = VA_BITS16_UNDEFINED;
+ p[27] = VA_BITS16_UNDEFINED;
+ p[28] = VA_BITS16_UNDEFINED;
+ p[29] = VA_BITS16_UNDEFINED;
+ p[30] = VA_BITS16_UNDEFINED;
+ p[31] = VA_BITS16_UNDEFINED;
+ p[32] = VA_BITS16_UNDEFINED;
+ p[33] = VA_BITS16_UNDEFINED;
+ p[34] = VA_BITS16_UNDEFINED;
+ p[35] = VA_BITS16_UNDEFINED;
+ return;
+ }
+ }
+ }
+
+ /* else fall into slow case */
+ make_mem_undefined(base, len);
+}
+
+
+/* And this is an even more specialised case, for the case where there
+ is no origin tracking, and the length is 128. */
+VG_REGPARM(1)
+void MC_(helperc_MAKE_STACK_UNINIT_128_no_o) ( Addr base )
+{
+ PROF_EVENT(MCPE_MAKE_STACK_UNINIT_128_NO_O);
+ if (0)
+ VG_(printf)("helperc_MAKE_STACK_UNINIT_128_no_o (%#lx)\n", base );
+
+# if 0
+ /* Slow(ish) version, which is fairly easily seen to be correct.
+ */
+ if (LIKELY( VG_IS_8_ALIGNED(base) )) {
+ make_aligned_word64_undefined(base + 0);
+ make_aligned_word64_undefined(base + 8);
+ make_aligned_word64_undefined(base + 16);
+ make_aligned_word64_undefined(base + 24);
+
+ make_aligned_word64_undefined(base + 32);
+ make_aligned_word64_undefined(base + 40);
+ make_aligned_word64_undefined(base + 48);
+ make_aligned_word64_undefined(base + 56);
+
+ make_aligned_word64_undefined(base + 64);
+ make_aligned_word64_undefined(base + 72);
+ make_aligned_word64_undefined(base + 80);
+ make_aligned_word64_undefined(base + 88);
+
+ make_aligned_word64_undefined(base + 96);
+ make_aligned_word64_undefined(base + 104);
+ make_aligned_word64_undefined(base + 112);
+ make_aligned_word64_undefined(base + 120);
+ } else {
+ make_mem_undefined(base, 128);
+ }
+# endif
+
+ /* Idea is: go fast when
+ * 16-aligned and length is 128
+ * the sm is available in the main primary map
+ * the address range falls entirely with a single secondary map
+ If all those conditions hold, just update the V+A bits by writing
+ directly into the vabits array. (If the sm was distinguished, this
+ will make a copy and then write to it.)
+
+ Typically this applies to amd64 'ret' instructions, since RSP is
+ 16-aligned (0 % 16) after the instruction (per the amd64-ELF ABI).
+ */
+ if (LIKELY( VG_IS_16_ALIGNED(base) )) {
+ /* Now we know the address range is suitably sized and aligned. */
+ UWord a_lo = (UWord)(base);
+ UWord a_hi = (UWord)(base + 128 - 1);
+ /* FIXME: come up with a sane story on the wraparound case
+ (which of course cnanot happen, but still..) */
+ /* tl_assert(a_lo < a_hi); */ // paranoia: detect overflow
+ if (LIKELY(a_hi <= MAX_PRIMARY_ADDRESS)) {
+ /* Now we know the entire range is within the main primary map. */
+ UWord pm_off_lo = get_primary_map_low_offset(a_lo);
+ UWord pm_off_hi = get_primary_map_low_offset(a_hi);
+ if (LIKELY(pm_off_lo == pm_off_hi)) {
+ /* Now we know that the entire address range falls within a
+ single secondary map, and that that secondary 'lives' in
+ the main primary map. */
+ PROF_EVENT(MCPE_MAKE_STACK_UNINIT_128_NO_O_ALIGNED_16);
+ SecMap* sm = get_secmap_for_writing_low(a_lo);
+ UWord v_off = SM_OFF(a_lo);
+ UInt* w32 = (UInt*)(&sm->vabits8[v_off]);
+ w32[ 0] = VA_BITS32_UNDEFINED;
+ w32[ 1] = VA_BITS32_UNDEFINED;
+ w32[ 2] = VA_BITS32_UNDEFINED;
+ w32[ 3] = VA_BITS32_UNDEFINED;
+ w32[ 4] = VA_BITS32_UNDEFINED;
+ w32[ 5] = VA_BITS32_UNDEFINED;
+ w32[ 6] = VA_BITS32_UNDEFINED;
+ w32[ 7] = VA_BITS32_UNDEFINED;
+ return;
+ }
+ }
+ }
+
+ /* The same, but for when base is 8 % 16, which is the situation
+ with RSP for amd64-ELF immediately after call instructions.
+ */
+ if (LIKELY( VG_IS_16_ALIGNED(base+8) )) { // restricts to 8 aligned
+ /* Now we know the address range is suitably sized and aligned. */
+ UWord a_lo = (UWord)(base);
+ UWord a_hi = (UWord)(base + 128 - 1);
+ /* FIXME: come up with a sane story on the wraparound case
+ (which of course cnanot happen, but still..) */
+ /* tl_assert(a_lo < a_hi); */ // paranoia: detect overflow
+ if (LIKELY(a_hi <= MAX_PRIMARY_ADDRESS)) {
+ /* Now we know the entire range is within the main primary map. */
+ UWord pm_off_lo = get_primary_map_low_offset(a_lo);
+ UWord pm_off_hi = get_primary_map_low_offset(a_hi);
+ if (LIKELY(pm_off_lo == pm_off_hi)) {
+ PROF_EVENT(MCPE_MAKE_STACK_UNINIT_128_NO_O_ALIGNED_8);
+ /* Now we know that the entire address range falls within a
+ single secondary map, and that that secondary 'lives' in
+ the main primary map. */
+ SecMap* sm = get_secmap_for_writing_low(a_lo);
+ UWord v_off = SM_OFF(a_lo);
+ UShort* w16 = (UShort*)(&sm->vabits8[v_off]);
+ UInt* w32 = (UInt*)(&w16[1]);
+ /* The following assertion is commented out for obvious
+ performance reasons, but was verified as valid when
+ running the entire testsuite and also Firefox. */
+ /* tl_assert(VG_IS_4_ALIGNED(w32)); */
+ w16[ 0] = VA_BITS16_UNDEFINED; // w16[0]
+ w32[ 0] = VA_BITS32_UNDEFINED; // w16[1,2]
+ w32[ 1] = VA_BITS32_UNDEFINED; // w16[3,4]
+ w32[ 2] = VA_BITS32_UNDEFINED; // w16[5,6]
+ w32[ 3] = VA_BITS32_UNDEFINED; // w16[7,8]
+ w32[ 4] = VA_BITS32_UNDEFINED; // w16[9,10]
+ w32[ 5] = VA_BITS32_UNDEFINED; // w16[11,12]
+ w32[ 6] = VA_BITS32_UNDEFINED; // w16[13,14]
+ w16[15] = VA_BITS16_UNDEFINED; // w16[15]
+ return;
+ }
+ }
+ }
+
+ /* else fall into slow case */
+ PROF_EVENT(MCPE_MAKE_STACK_UNINIT_128_NO_O_SLOWCASE);
+ make_mem_undefined(base, 128);
+}
+
+
/*------------------------------------------------------------*/
/*--- Checking memory ---*/
/*------------------------------------------------------------*/
@@ -6991,6 +7257,15 @@
[MCPE_DIE_MEM_STACK_160] = "die_mem_stack_160",
[MCPE_NEW_MEM_STACK] = "new_mem_stack",
[MCPE_DIE_MEM_STACK] = "die_mem_stack",
+ [MCPE_MAKE_STACK_UNINIT_W_O] = "MAKE_STACK_UNINIT_w_o",
+ [MCPE_MAKE_STACK_UNINIT_NO_O] = "MAKE_STACK_UNINIT_no_o",
+ [MCPE_MAKE_STACK_UNINIT_128_NO_O] = "MAKE_STACK_UNINIT_128_no_o",
+ [MCPE_MAKE_STACK_UNINIT_128_NO_O_ALIGNED_16]
+ = "MAKE_STACK_UNINIT_128_no_o_aligned_16",
+ [MCPE_MAKE_STACK_UNINIT_128_NO_O_ALIGNED_8]
+ = "MAKE_STACK_UNINIT_128_no_o_aligned_8",
+ [MCPE_MAKE_STACK_UNINIT_128_NO_O_SLOWCASE]
+ = "MAKE_STACK_UNINIT_128_no_o_slowcase",
};
static void init_prof_mem ( void )
@@ -7869,6 +8144,8 @@
# endif
}
+STATIC_ASSERT(sizeof(UWord) == sizeof(SizeT));
+
VG_DETERMINE_INTERFACE_VERSION(mc_pre_clo_init)
/*--------------------------------------------------------------------*/
Modified: trunk/memcheck/mc_translate.c
==============================================================================
--- trunk/memcheck/mc_translate.c (original)
+++ trunk/memcheck/mc_translate.c Wed Apr 6 10:52:17 2016
@@ -5512,20 +5512,36 @@
void do_AbiHint ( MCEnv* mce, IRExpr* base, Int len, IRExpr* nia )
{
IRDirty* di;
- /* Minor optimisation: if not doing origin tracking, ignore the
- supplied nia and pass zero instead. This is on the basis that
- MC_(helperc_MAKE_STACK_UNINIT) will ignore it anyway, and we can
- almost always generate a shorter instruction to put zero into a
- register than any other value. */
- if (MC_(clo_mc_level) < 3)
- nia = mkIRExpr_HWord(0);
-
- di = unsafeIRDirty_0_N(
- 0/*regparms*/,
- "MC_(helperc_MAKE_STACK_UNINIT)",
- VG_(fnptr_to_fnentry)( &MC_(helperc_MAKE_STACK_UNINIT) ),
- mkIRExprVec_3( base, mkIRExpr_HWord( (UInt)len), nia )
- );
+
+ if (MC_(clo_mc_level) == 3) {
+ di = unsafeIRDirty_0_N(
+ 3/*regparms*/,
+ "MC_(helperc_MAKE_STACK_UNINIT_w_o)",
+ VG_(fnptr_to_fnentry)( &MC_(helperc_MAKE_STACK_UNINIT_w_o) ),
+ mkIRExprVec_3( base, mkIRExpr_HWord( (UInt)len), nia )
+ );
+ } else {
+ /* We ignore the supplied nia, since it is irrelevant. */
+ tl_assert(MC_(clo_mc_level) == 2 || MC_(clo_mc_level) == 1);
+ /* Special-case the len==128 case, since that is for amd64-ELF,
+ which is a very common target. */
+ if (len == 128) {
+ di = unsafeIRDirty_0_N(
+ 1/*regparms*/,
+ "MC_(helperc_MAKE_STACK_UNINIT_128_no_o)",
+ VG_(fnptr_to_fnentry)( &MC_(helperc_MAKE_STACK_UNINIT_128_no_o)),
+ mkIRExprVec_1( base )
+ );
+ } else {
+ di = unsafeIRDirty_0_N(
+ 2/*regparms*/,
+ "MC_(helperc_MAKE_STACK_UNINIT_no_o)",
+ VG_(fnptr_to_fnentry)( &MC_(helperc_MAKE_STACK_UNINIT_no_o) ),
+ mkIRExprVec_2( base, mkIRExpr_HWord( (UInt)len) )
+ );
+ }
+ }
+
stmt( 'V', mce, IRStmt_Dirty(di) );
}
|
|
From: <sv...@va...> - 2016-04-04 18:22:23
|
Author: mjw
Date: Mon Apr 4 19:22:15 2016
New Revision: 15849
Log:
Limit gcc114-arm64 test results mail to 2250 lines.
The arm64 results (diffs) are too big for the mailinglist.
Only email the first 2250 lines to the list.
Modified:
trunk/nightly/conf/gcc114-arm64.sendmail
Modified: trunk/nightly/conf/gcc114-arm64.sendmail
==============================================================================
--- trunk/nightly/conf/gcc114-arm64.sendmail (original)
+++ trunk/nightly/conf/gcc114-arm64.sendmail Mon Apr 4 19:22:15 2016
@@ -13,4 +13,4 @@
echo " " >> $MAILFILE
cat "$diffs" >> $MAILFILE
-/usr/sbin/sendmail -t -i < $MAILFILE
+head -2250 < $MAILFILE | /usr/sbin/sendmail -t -i
|
|
From: Aman A. <ama...@gm...> - 2016-04-04 16:41:15
|
Thank you so much for your valuable response. On Mon 4 Apr, 2016, 7:12 PM John Reiser, <jr...@bi...> wrote: > > I'm currently working in an application which uses java/jsp in front end > (client side) and C++ as middle tier on a Linux server (server side). Will > valgrind still be able to help me identify memory leaks? > > If the C++ server side is a separate process, and if that process > can be invoked under valgrind, and if the process calls exit(), > and if the monitoring slowdown of 20X to 50X in CPU time can be > tolerated, and if the memory size expansion of about 2X can be > handled, and if all allocation uses malloc/free/new/delete (no > private allocation arenas), then yes, valgrind can help find memory leaks. > Java: no. > > > ------------------------------------------------------------------------------ > _______________________________________________ > Valgrind-developers mailing list > Val...@li... > https://lists.sourceforge.net/lists/listinfo/valgrind-developers > |
|
From: John R. <jr...@bi...> - 2016-04-04 13:41:56
|
> I'm currently working in an application which uses java/jsp in front end (client side) and C++ as middle tier on a Linux server (server side). Will valgrind still be able to help me identify memory leaks? If the C++ server side is a separate process, and if that process can be invoked under valgrind, and if the process calls exit(), and if the monitoring slowdown of 20X to 50X in CPU time can be tolerated, and if the memory size expansion of about 2X can be handled, and if all allocation uses malloc/free/new/delete (no private allocation arenas), then yes, valgrind can help find memory leaks. Java: no. |
|
From: <sv...@va...> - 2016-04-04 12:33:44
|
Author: sewardj
Date: Mon Apr 4 13:33:35 2016
New Revision: 15848
Log:
memset replacement: unroll vectorised loops.
Modified:
trunk/shared/vg_replace_strmem.c
Modified: trunk/shared/vg_replace_strmem.c
==============================================================================
--- trunk/shared/vg_replace_strmem.c (original)
+++ trunk/shared/vg_replace_strmem.c Mon Apr 4 13:33:35 2016
@@ -1200,6 +1200,11 @@
c8 = (c8 << 32) | c8; \
while ((a & 7) != 0 && n >= 1) \
{ *(UChar*)a = (UChar)c; a += 1; n -= 1; } \
+ while (n >= 32) \
+ { *(ULong*)a = c8; a += 8; n -= 8; \
+ *(ULong*)a = c8; a += 8; n -= 8; \
+ *(ULong*)a = c8; a += 8; n -= 8; \
+ *(ULong*)a = c8; a += 8; n -= 8; } \
while (n >= 8) \
{ *(ULong*)a = c8; a += 8; n -= 8; } \
while (n >= 1) \
@@ -1212,6 +1217,11 @@
c4 = (c4 << 16) | c4; \
while ((a & 3) != 0 && n >= 1) \
{ *(UChar*)a = (UChar)c; a += 1; n -= 1; } \
+ while (n >= 16) \
+ { *(UInt*)a = c4; a += 4; n -= 4; \
+ *(UInt*)a = c4; a += 4; n -= 4; \
+ *(UInt*)a = c4; a += 4; n -= 4; \
+ *(UInt*)a = c4; a += 4; n -= 4; } \
while (n >= 4) \
{ *(UInt*)a = c4; a += 4; n -= 4; } \
while (n >= 1) \
|
|
From: Aman A. <ama...@gm...> - 2016-04-04 07:15:36
|
Hi, I'm currently working in an application which uses java/jsp in front end (client side) and C++ as middle tier on a Linux server (server side). Will valgrind still be able to help me identify memory leaks? Thanks, Ishan |
|
From: <sv...@va...> - 2016-04-04 02:25:47
|
Author: iraisr
Date: Mon Apr 4 03:25:40 2016
New Revision: 15847
Log:
Fix expected output of massif/tests/{new-cpp,overloaded-new}
for libstdc++ from gcc5.
Even with fix for bug 345307 we still see allocations for
the emergency pool in libstdc++ which skew the expected results.
Modified:
trunk/massif/tests/new-cpp.post.exp
trunk/massif/tests/new-cpp.vgtest
trunk/massif/tests/overloaded-new.post.exp
trunk/massif/tests/overloaded-new.vgtest
Modified: trunk/massif/tests/new-cpp.post.exp
==============================================================================
--- trunk/massif/tests/new-cpp.post.exp (original)
+++ trunk/massif/tests/new-cpp.post.exp Mon Apr 4 03:25:40 2016
@@ -1,6 +1,6 @@
--------------------------------------------------------------------------------
Command: ./new-cpp
-Massif arguments: --stacks=no --time-unit=B --massif-out-file=massif.out --ignore-fn=__part_load_locale --ignore-fn=__time_load_locale --ignore-fn=dwarf2_unwind_dyld_add_image_hook --ignore-fn=get_or_create_key_element
+Massif arguments: --stacks=no --time-unit=B --massif-out-file=massif.out --ignore-fn=__part_load_locale --ignore-fn=__time_load_locale --ignore-fn=dwarf2_unwind_dyld_add_image_hook --ignore-fn=get_or_create_key_element --ignore-fn=_GLOBAL__sub_I_eh_alloc.cc
ms_print arguments: massif.out
--------------------------------------------------------------------------------
Modified: trunk/massif/tests/new-cpp.vgtest
==============================================================================
--- trunk/massif/tests/new-cpp.vgtest (original)
+++ trunk/massif/tests/new-cpp.vgtest Mon Apr 4 03:25:40 2016
@@ -1,5 +1,6 @@
prog: new-cpp
vgopts: --stacks=no --time-unit=B --massif-out-file=massif.out
-vgopts: --ignore-fn=__part_load_locale --ignore-fn=__time_load_locale --ignore-fn=dwarf2_unwind_dyld_add_image_hook --ignore-fn=get_or_create_key_element
+vgopts: --ignore-fn=__part_load_locale --ignore-fn=__time_load_locale --ignore-fn=dwarf2_unwind_dyld_add_image_hook
+vgopts: --ignore-fn=get_or_create_key_element --ignore-fn=_GLOBAL__sub_I_eh_alloc.cc
post: perl ../../massif/ms_print massif.out | ../../tests/filter_addresses
cleanup: rm massif.out
Modified: trunk/massif/tests/overloaded-new.post.exp
==============================================================================
--- trunk/massif/tests/overloaded-new.post.exp (original)
+++ trunk/massif/tests/overloaded-new.post.exp Mon Apr 4 03:25:40 2016
@@ -1,6 +1,6 @@
--------------------------------------------------------------------------------
Command: ./overloaded-new
-Massif arguments: --stacks=no --time-unit=B --massif-out-file=massif.out --ignore-fn=__part_load_locale --ignore-fn=__time_load_locale --ignore-fn=dwarf2_unwind_dyld_add_image_hook --ignore-fn=get_or_create_key_element
+Massif arguments: --stacks=no --time-unit=B --massif-out-file=massif.out --ignore-fn=__part_load_locale --ignore-fn=__time_load_locale --ignore-fn=dwarf2_unwind_dyld_add_image_hook --ignore-fn=get_or_create_key_element --ignore-fn=_GLOBAL__sub_I_eh_alloc.cc
ms_print arguments: massif.out
--------------------------------------------------------------------------------
Modified: trunk/massif/tests/overloaded-new.vgtest
==============================================================================
--- trunk/massif/tests/overloaded-new.vgtest (original)
+++ trunk/massif/tests/overloaded-new.vgtest Mon Apr 4 03:25:40 2016
@@ -1,5 +1,6 @@
prog: overloaded-new
vgopts: --stacks=no --time-unit=B --massif-out-file=massif.out
-vgopts: --ignore-fn=__part_load_locale --ignore-fn=__time_load_locale --ignore-fn=dwarf2_unwind_dyld_add_image_hook --ignore-fn=get_or_create_key_element
+vgopts: --ignore-fn=__part_load_locale --ignore-fn=__time_load_locale --ignore-fn=dwarf2_unwind_dyld_add_image_hook
+vgopts: --ignore-fn=get_or_create_key_element --ignore-fn=_GLOBAL__sub_I_eh_alloc.cc
post: perl ../../massif/ms_print massif.out | ../../tests/filter_addresses
cleanup: rm massif.out
|
|
From: <sv...@va...> - 2016-04-04 02:14:07
|
Author: iraisr
Date: Mon Apr 4 03:13:59 2016
New Revision: 15846
Log:
Follow up to SVN commit r15844.
Fix expected output of gdbserver_tests also for Solaris.
Modified:
trunk/gdbserver_tests/solaris/nlcontrolc.stdoutB.exp
Modified: trunk/gdbserver_tests/solaris/nlcontrolc.stdoutB.exp
==============================================================================
--- trunk/gdbserver_tests/solaris/nlcontrolc.stdoutB.exp (original)
+++ trunk/gdbserver_tests/solaris/nlcontrolc.stdoutB.exp Mon Apr 4 03:13:59 2016
@@ -1,9 +1,6 @@
Continuing.
Program received signal SIGTRAP, Trace/breakpoint trap.
0x........ in syscall ...
- 4 Thread .... (tid 4 VgTs_WaitSys) 0x........ in __pollsys ()
- 3 Thread .... (tid 3 VgTs_WaitSys) 0x........ in __pollsys ()
- 2 Thread .... (tid 2 VgTs_WaitSys) 0x........ in __pollsys ()
* 1 Thread .... (tid 1 VgTs_WaitSys) 0x........ in __pollsys ()
Now threads are burning CPU
Continuing.
|
|
From: <sv...@va...> - 2016-04-03 20:33:20
|
Author: mjw
Date: Sun Apr 3 21:33:11 2016
New Revision: 15845
Log:
Bug 361354 ppc64[le]: wire up separate socketcalls system calls
Newer glibc will use separate socket related syscalls instead of using
the multiplexing socketcall systemcall. On Fedora rawhide this causes
several tests to fail.
Modified:
trunk/NEWS
trunk/coregrind/m_syswrap/syswrap-ppc64-linux.c
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Sun Apr 3 21:33:11 2016
@@ -89,6 +89,7 @@
360425 arm64 unsupported instruction ldpsw
360519 none/tests/arm64/memory.vgtest might fail with newer gcc
360752 raise the number of reserved fds in m_main.c from 10 to 12
+361354 ppc64[le]: wire up separate socketcalls system calls
n-i-bz Fix incorrect (or infinite loop) unwind on RHEL7 x86 and amd64
n-i-bz massif --pages-as-heap=yes does not report peak caused by mmap+munmap
Modified: trunk/coregrind/m_syswrap/syswrap-ppc64-linux.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-ppc64-linux.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-ppc64-linux.c Sun Apr 3 21:33:11 2016
@@ -1151,6 +1151,23 @@
LINX_(__NR_pwritev, sys_pwritev), // 321
LINXY(__NR_rt_tgsigqueueinfo, sys_rt_tgsigqueueinfo),// 322
+ LINXY(__NR_socket, sys_socket), // 326
+ LINX_(__NR_bind, sys_bind), // 327
+ LINX_(__NR_connect, sys_connect), // 328
+ LINX_(__NR_listen, sys_listen), // 329
+ LINXY(__NR_accept, sys_accept), // 330
+ LINXY(__NR_getsockname, sys_getsockname), // 331
+ LINXY(__NR_getpeername, sys_getpeername), // 332
+ LINXY(__NR_socketpair, sys_socketpair), // 333
+ LINX_(__NR_send, sys_send), // 334
+ LINX_(__NR_sendto, sys_sendto), // 335
+ LINXY(__NR_recv, sys_recv), // 336
+ LINXY(__NR_recvfrom, sys_recvfrom), // 337
+ LINX_(__NR_shutdown, sys_shutdown), // 338
+ LINX_(__NR_setsockopt, sys_setsockopt), // 339
+ LINXY(__NR_getsockopt, sys_getsockopt), // 340
+ LINX_(__NR_sendmsg, sys_sendmsg), // 341
+ LINXY(__NR_recvmsg, sys_recvmsg), // 342
LINXY(__NR_recvmmsg, sys_recvmmsg), // 343
LINXY(__NR_accept4, sys_accept4), // 344
|
|
From: <sv...@va...> - 2016-04-03 15:24:28
|
Author: mjw
Date: Sun Apr 3 16:24:20 2016
New Revision: 15844
Log:
Update gdbserver_tests filter for newer GDB version.
- Newer gdb say Thread .... hit Breakpoint, we expect just Breakpoint.
- We expect "Program received" instead of "Thread .... received"
- Ordering of ' Thread .... (tid .' might differ between gdb version,
so remove all such lines except the "current" one (starts with '*').
Modified:
trunk/gdbserver_tests/filter_gdb
trunk/gdbserver_tests/nlcontrolc.stdoutB.exp
Modified: trunk/gdbserver_tests/filter_gdb
==============================================================================
--- trunk/gdbserver_tests/filter_gdb (original)
+++ trunk/gdbserver_tests/filter_gdb Sun Apr 3 16:24:20 2016
@@ -62,6 +62,10 @@
# gdb might also try to show the "entry value" p=p@entry=0x...
# Some gdb versions don't show the source line:number after switching
# threads in #0 0x........ in do_burn ().
+# Newer gdb say Thread .... hit Breakpoint, we expect just Breakpoint.
+# We expect "Program received" instead of "Thread .... received"
+# Ordering of ' Thread .... (tid .' might differ between gdb version,
+# so remove all such lines except the "current" one (starts with '*').
sed -e '/Remote debugging using/,/vgdb launched process attached/d' \
-e '/filter_gdb BEGIN drop/,/filter_gdb END drop/d' \
-e 's/^\[?1034hReading symbols/Reading symbols/' \
@@ -74,6 +78,8 @@
-e '/\[Switching to Thread ....\]/d' \
-e 's/\(\[Switching to thread [1234] (Thread ....)\]\)#0/\1\n#0/' \
-e 's/^\([ \* ] [0-9] Thread .... (tid [0-9] VgTs_WaitSys) 0x........ in\).*$/\1 syscall .../' \
+ -e 's/^Thread .... hit Breakpoint /Breakpoint /' \
+ -e 's/^Thread .... received /Program received /' \
-e 's/#[0-9]\( 0x........ in sleeper_or_burner\)/#.\1/' \
-e 's/\(#0 0x........ in do_burn ()\) at sleepers.c:41/\1/' \
-e '/^Reading symbols from .*\.\.\.done\./d' \
@@ -115,6 +121,7 @@
-e 's/\(^Breakpoint 1, tls_ptr (p=0x........\) <tests[0-9+]*>\() at tls.c:55\)/\1\2/' \
-e '/Id Target Id Frame/d' \
-e 's/^\([ \*] [1234] \) *Thread /\1Thread /' \
+ -e 's/^ [0-9] Thread .... (tid [0-9] .*$//' \
-e 's/VgTs_WaitSys) 0x/VgTs_WaitSys) 0x/' \
-e '/Cannot access memory at address 0x......../d' \
-e '/\[New Thread/d' \
Modified: trunk/gdbserver_tests/nlcontrolc.stdoutB.exp
==============================================================================
--- trunk/gdbserver_tests/nlcontrolc.stdoutB.exp (original)
+++ trunk/gdbserver_tests/nlcontrolc.stdoutB.exp Sun Apr 3 16:24:20 2016
@@ -1,9 +1,6 @@
Continuing.
Program received signal SIGTRAP, Trace/breakpoint trap.
0x........ in syscall ...
- 4 Thread .... (tid 4 VgTs_WaitSys) 0x........ in syscall ...
- 3 Thread .... (tid 3 VgTs_WaitSys) 0x........ in syscall ...
- 2 Thread .... (tid 2 VgTs_WaitSys) 0x........ in syscall ...
* 1 Thread .... (tid 1 VgTs_WaitSys) 0x........ in syscall ...
$1 = 0
$2 = 0
|
|
From: <sv...@va...> - 2016-04-03 13:56:59
|
Author: mjw
Date: Sun Apr 3 14:56:51 2016
New Revision: 15843
Log:
Add nightly gcc114 arm64 builder.
Added:
trunk/nightly/conf/gcc114-arm64.conf
trunk/nightly/conf/gcc114-arm64.sendmail (with props)
Added: trunk/nightly/conf/gcc114-arm64.conf
==============================================================================
--- trunk/nightly/conf/gcc114-arm64.conf (added)
+++ trunk/nightly/conf/gcc114-arm64.conf Sun Apr 3 14:56:51 2016
@@ -0,0 +1,3 @@
+export ABT_DETAILS="`lsb_release -sicr | xargs echo` `uname -m`"
+export ABT_JOBS=4
+#export ABT_PERF="--vg=../valgrind-new --vg=../valgrind-old"
Added: trunk/nightly/conf/gcc114-arm64.sendmail
==============================================================================
--- trunk/nightly/conf/gcc114-arm64.sendmail (added)
+++ trunk/nightly/conf/gcc114-arm64.sendmail Sun Apr 3 14:56:51 2016
@@ -0,0 +1,16 @@
+subject="$1"
+summary="$2"
+diffs="$3"
+
+MAILFILE="$HOME/valgrind-results/$(date +%d-%b-%Y.%R)"
+
+echo "Subject: $subject" > $MAILFILE
+echo "To: val...@li..." >> $MAILFILE
+echo "Bcc: val...@wi..." >> $MAILFILE
+echo >> $MAILFILE
+
+cat "$summary" >> $MAILFILE
+echo " " >> $MAILFILE
+cat "$diffs" >> $MAILFILE
+
+/usr/sbin/sendmail -t -i < $MAILFILE
|
|
From: <sv...@va...> - 2016-04-02 22:08:13
|
Author: mjw Date: Sat Apr 2 23:07:59 2016 New Revision: 15842 Log: drd/tests/std_thread[2].cpp rename execute_native_thread_routine. Both tests define a execute_native_thread_routine function that we took from libstdc++. Unfortunately because of a bug this function is not local in some versions of libstdc++ and so our similar named function will clash when trying to link. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70476#c2 Simply rename our version to work around this. Since we don't build this part of the test code for gcc >= 6, this issue only happens if the buggy libstdc++ thread code is used together with gcc 5. This is the case with for example devtoolset-4-gcc-5. Modified: trunk/drd/tests/std_thread.cpp trunk/drd/tests/std_thread2.cpp Modified: trunk/drd/tests/std_thread.cpp ============================================================================== --- trunk/drd/tests/std_thread.cpp (original) +++ trunk/drd/tests/std_thread.cpp Sat Apr 2 23:07:59 2016 @@ -26,7 +26,7 @@ // From libstdc++-v3/src/c++11/thread.cc // -extern "C" void* execute_native_thread_routine(void* __p) +extern "C" void* _v_execute_native_thread_routine(void* __p) { std::thread::_Impl_base* __t = static_cast<std::thread::_Impl_base*>(__p); std::thread::__shared_base_type __local; @@ -58,7 +58,7 @@ #endif __b->_M_this_ptr = __b; - int __e = __gthread_create(&_M_id._M_thread, execute_native_thread_routine, + int __e = __gthread_create(&_M_id._M_thread, _v_execute_native_thread_routine, __b.get()); if (__e) { __b->_M_this_ptr.reset(); Modified: trunk/drd/tests/std_thread2.cpp ============================================================================== --- trunk/drd/tests/std_thread2.cpp (original) +++ trunk/drd/tests/std_thread2.cpp Sat Apr 2 23:07:59 2016 @@ -31,7 +31,7 @@ // From libstdc++-v3/src/c++11/thread.cc // -extern "C" void* execute_native_thread_routine(void* __p) +extern "C" void* _v_execute_native_thread_routine(void* __p) { std::thread::_Impl_base* __t = static_cast<std::thread::_Impl_base*>(__p); std::thread::__shared_base_type __local; @@ -63,7 +63,7 @@ #endif __b->_M_this_ptr = __b; - int __e = __gthread_create(&_M_id._M_thread, execute_native_thread_routine, + int __e = __gthread_create(&_M_id._M_thread, _v_execute_native_thread_routine, __b.get()); if (__e) { __b->_M_this_ptr.reset(); |