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From: <sv...@va...> - 2015-11-06 22:08:56
|
Author: florian
Date: Fri Nov 6 22:08:46 2015
New Revision: 15722
Log:
Fix documentation of command line flag
BZ #354933
Modified:
trunk/NEWS
trunk/README.android
trunk/README.android_emulator
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Fri Nov 6 22:08:46 2015
@@ -41,6 +41,7 @@
353920 unhandled amd64-solaris syscall: 170
354392 unhandled amd64-solaris syscall: 171
354797 Added vbit tester support for PPC 64 isa 2.07 iops
+354933 Fix documentation of --kernel-variant=android-no-hw-tls option
Release 3.11.0 (22 September 2015)
Modified: trunk/README.android
==============================================================================
--- trunk/README.android (original)
+++ trunk/README.android Fri Nov 6 22:08:46 2015
@@ -174,7 +174,7 @@
# at startup. This is because the emulator (for ARM) may not be
# simulating a hardware TLS register. To get around this, run
# Valgrind with:
-# --kernel-variant=android-emulator-no-hw-tls
+# --kernel-variant=android-no-hw-tls
#
# (2) if you are running a real device, you need to tell Valgrind
# what GPU it has, so Valgrind knows how to handle custom GPU
Modified: trunk/README.android_emulator
==============================================================================
--- trunk/README.android_emulator (original)
+++ trunk/README.android_emulator Fri Nov 6 22:08:46 2015
@@ -63,7 +63,7 @@
# IMPORTANT: when running Valgrind, you may need give it the flag
#
-# --kernel-variant=android-emulator-no-hw-tls
+# --kernel-variant=android-no-hw-tls
#
# since otherwise it may crash at startup.
# See README.android for details.
|
|
From: Aaron C. <aar...@do...> - 2015-11-06 19:39:57
|
I am doing some work on an application that uses the latest Xen version (4.6).
When I ran valgrind on my application I noticed that it didn't support the
latest Xen HYPERCALL interface versions. I have created the following patch
based off of valgrind-3.11.0.
I have only tested it with my own applications, so it is entirely possible that
I have missed something.
I've never sent a message to this list before, so I hope this is the proper way
to include a patch.
Aaron Cornelius
==========================================================
diff -aur valgrind-3.11.0/coregrind/m_syswrap/syswrap-xen.c
valgrind-3.11.0_xen4.6/coregrind/m_syswrap/syswrap-xen.c
--- valgrind-3.11.0/coregrind/m_syswrap/syswrap-xen.c 2015-09-08
09:23:26.000000000 -0400
+++ valgrind-3.11.0_xen4.6/coregrind/m_syswrap/syswrap-xen.c 2015-11-05
10:36:03.268521000 -0500
@@ -584,6 +584,7 @@
case 0x00000009:
case 0x0000000a:
case 0x0000000b:
+ case 0x0000000c:
break;
default:
bad_intf_version(tid, layout, arrghs, status, flags,
@@ -626,6 +627,7 @@
break;
case 0x0000000a:
case 0x0000000b:
+ case 0x0000000c:
PRE_XEN_SYSCTL_READ(getdomaininfolist_0000000a, first_domain);
PRE_XEN_SYSCTL_READ(getdomaininfolist_0000000a, max_domains);
PRE_XEN_SYSCTL_READ(getdomaininfolist_0000000a, buffer);
@@ -676,6 +678,35 @@
break;
+ case VKI_XEN_SYSCTL_scheduler_op:
+ PRE_XEN_SYSCTL_READ(scheduler_op, cpupool_id);
+ PRE_XEN_SYSCTL_READ(scheduler_op, sched_id);
+ PRE_XEN_SYSCTL_READ(scheduler_op, cmd);
+
+ if ( sysctl->u.scheduler_op.cmd == VKI_XEN_SYSCTL_SCHEDOP_putinfo ) {
+ switch (sysctl->u.scheduler_op.sched_id) {
+ case VKI_XEN_SCHEDULER_CREDIT:
+ PRE_XEN_SYSCTL_READ(scheduler_op, u.sched_credit.tslice_ms);
+ PRE_XEN_SYSCTL_READ(scheduler_op, u.sched_credit.ratelimit_us);
+ break;
+
+ case VKI_XEN_SCHEDULER_ARINC653:
+ PRE_MEM_READ("XEN_SYSCTL_scheduler_op
*u.scheduler_op.u.sched_arinc653.schedule.p",
+ (Addr)sysctl->u.scheduler_op.u.sched_arinc653.schedule.p,
+ sizeof(struct vki_xen_sysctl_arinc653_schedule));
+ break;
+
+ default:
+ VG_(dmsg)("WARNING: XEN_SYSCTL_scheduler_OP for sched_id type "
+ "%u not implemented yet\n",
+ sysctl->u.scheduler_op.sched_id);
+ SET_STATUS_Failure(VKI_EINVAL);
+ return;
+ }
+ }
+
+ break;
+
case VKI_XEN_SYSCTL_physinfo:
/* No input params */
break;
@@ -728,6 +759,7 @@
case 0x00000008:
case 0x00000009:
case 0x0000000a:
+ case 0x0000000b:
break;
default:
bad_intf_version(tid, layout, arrghs, status, flags,
@@ -889,6 +921,7 @@
__PRE_XEN_DOMCTL_READ(getvcpuaffinity, vcpuaffinity_00000009,
cpumap.nr_bits);
break;
case 0x0000000a:
+ case 0x0000000b:
__PRE_XEN_DOMCTL_READ(getvcpuaffinity, vcpuaffinity_0000000a, vcpu);
if (domctl->u.vcpuaffinity_0000000a.flags & VKI_XEN_VCPUAFFINITY_HARD)
__PRE_XEN_DOMCTL_READ(
@@ -968,6 +1001,8 @@
break;
case 0x00000009:
+ case 0x0000000a:
+ case 0x0000000b:
__PRE_XEN_DOMCTL_READ(get_ext_vcpucontext, ext_vcpucontext_00000009,
vcpu);
break;
@@ -1008,6 +1043,8 @@
break;
case 0x00000009:
+ case 0x0000000a:
+ case 0x0000000b:
__PRE_XEN_DOMCTL_READ(set_ext_vcpucontext, ext_vcpucontext_00000009,
vcpu);
__PRE_XEN_DOMCTL_READ(set_ext_vcpucontext, ext_vcpucontext_00000009,
size);
#if defined(__i386__) || defined(__x86_64__)
@@ -1534,6 +1571,7 @@
case 0x00000009:
case 0x0000000a:
case 0x0000000b:
+ case 0x0000000c:
break;
default:
return;
@@ -1568,6 +1606,7 @@
break;
case 0x0000000a:
case 0x0000000b:
+ case 0x0000000c:
POST_XEN_SYSCTL_WRITE(getdomaininfolist_0000000a, num_domains);
POST_MEM_WRITE((Addr)sysctl->u.getdomaininfolist_0000000a.buffer.p,
sizeof(*sysctl->u.getdomaininfolist_0000000a.buffer.p)
@@ -1593,6 +1632,30 @@
POST_XEN_SYSCTL_WRITE(cpupool_op, cpumap);
break;
+ case VKI_XEN_SYSCTL_scheduler_op:
+ if ( sysctl->u.scheduler_op.cmd == VKI_XEN_SYSCTL_SCHEDOP_getinfo ) {
+ switch (sysctl->u.scheduler_op.sched_id) {
+ case VKI_XEN_SCHEDULER_CREDIT:
+ POST_XEN_SYSCTL_WRITE(scheduler_op, u.sched_credit.tslice_ms);
+ POST_XEN_SYSCTL_WRITE(scheduler_op, u.sched_credit.ratelimit_us);
+ break;
+
+ case VKI_XEN_SCHEDULER_ARINC653:
+
POST_MEM_WRITE((Addr)sysctl->u.scheduler_op.u.sched_arinc653.schedule.p,
+ sizeof(struct vki_xen_sysctl_arinc653_schedule));
+ break;
+
+ default:
+ VG_(dmsg)("WARNING: XEN_SYSCTL_scheduler_OP for sched_id type "
+ "%u not supported\n",
+ sysctl->u.scheduler_op.sched_id);
+ SET_STATUS_Failure(VKI_EINVAL);
+ return;
+ }
+ }
+
+ break;
+
case VKI_XEN_SYSCTL_physinfo:
switch (sysctl->interface_version)
{
@@ -1613,6 +1676,7 @@
break;
case 0x0000000a:
case 0x0000000b:
+ case 0x0000000c:
POST_XEN_SYSCTL_WRITE(physinfo_0000000a, threads_per_core);
POST_XEN_SYSCTL_WRITE(physinfo_0000000a, cores_per_socket);
POST_XEN_SYSCTL_WRITE(physinfo_0000000a, nr_cpus);
@@ -1669,6 +1733,7 @@
case 0x00000008:
case 0x00000009:
case 0x0000000a:
+ case 0x0000000b:
break;
default:
return;
@@ -1791,6 +1856,7 @@
domctl->u.vcpuaffinity_00000009.cpumap.nr_bits / 8);
break;
case 0x0000000a:
+ case 0x0000000b:
if (domctl->u.vcpuaffinity_0000000a.flags & VKI_XEN_VCPUAFFINITY_HARD)
POST_MEM_WRITE(
(Addr)domctl->u.vcpuaffinity_0000000a.cpumap_hard.bitmap.p,
@@ -1840,6 +1906,7 @@
break;
case 0x00000009:
case 0x0000000a:
+ case 0x0000000b:
POST_XEN_DOMCTL_WRITE(getdomaininfo_00000009, domain);
POST_XEN_DOMCTL_WRITE(getdomaininfo_00000009, flags);
POST_XEN_DOMCTL_WRITE(getdomaininfo_00000009, tot_pages);
@@ -1892,6 +1959,8 @@
break;
case 0x00000009:
+ case 0x0000000a:
+ case 0x0000000b:
__POST_XEN_DOMCTL_WRITE(get_ext_vcpucontext,
ext_vcpucontext_00000009, size);
#if defined(__i386__) || defined(__x86_64__)
__POST_XEN_DOMCTL_WRITE(get_ext_vcpucontext, ext_vcpucontext_00000009,
diff -aur valgrind-3.11.0/include/vki/vki-xen-domctl.h
valgrind-3.11.0_xen4.6/include/vki/vki-xen-domctl.h
--- valgrind-3.11.0/include/vki/vki-xen-domctl.h 2015-09-08 09:23:26.000000000 -0400
+++ valgrind-3.11.0_xen4.6/include/vki/vki-xen-domctl.h 2015-11-05
08:54:42.764521000 -0500
@@ -36,6 +36,7 @@
* - 0x00000008: Xen 4.2
* - 0x00000009: Xen 4.3 & 4.4
* - 0x0000000a: Xen 4.5
+ * - 0x0000000b: Xen 4.6
*
* When adding a new subop be sure to include the variants used by all
* of the above, both here and in syswrap-xen.c
@@ -116,6 +117,11 @@
#define VKI_XEN_DOMCTL_cacheflush 71
#define VKI_XEN_DOMCTL_get_vcpu_msrs 72
#define VKI_XEN_DOMCTL_set_vcpu_msrs 73
+#define VKI_XEN_DOMCTL_setvnumainfo 74
+#define VKI_XEN_DOMCTL_psr_cmt_op 75
+#define VKI_XEN_DOMCTL_monitor_op 77
+#define VKI_XEN_DOMCTL_psr_cat_op 78
+#define VKI_XEN_DOMCTL_soft_reset 79
#define VKI_XEN_DOMCTL_gdbsx_guestmemio 1000
#define VKI_XEN_DOMCTL_gdbsx_pausevcpu 1001
#define VKI_XEN_DOMCTL_gdbsx_unpausevcpu 1002
@@ -187,6 +193,7 @@
DEFINE_VKI_XEN_GUEST_HANDLE(vki_xen_domctl_getdomaininfo_00000009_t);
/* vki_xen_domctl_getdomaininfo_0000000a is the same as 00000009 */
+/* vki_xen_domctl_getdomaininfo_0000000b is the same as 00000009 */
/* Get/set the NUMA node(s) with which the guest has affinity with. */
/* XEN_DOMCTL_setnodeaffinity */
@@ -216,6 +223,8 @@
struct vki_xenctl_bitmap cpumap_soft; /* IN/OUT */
};
+/* vki_xen_domctl_vcpuaffinity_0000000b is the same as 0000000a */
+
struct vki_xen_domctl_shadow_op_stats {
vki_uint32_t fault_count;
vki_uint32_t dirty_count;
@@ -413,6 +422,7 @@
};
/* vki_xen_domctl_ext_vcpucontext_0000000a is the same as 00000009 */
+/* vki_xen_domctl_ext_vcpucontext_0000000b is the same as 00000009 */
struct vki_xen_domctl_vcpuextstate {
vki_uint32_t vcpu;
@@ -532,6 +542,10 @@
struct vki_xen_domctl_cacheflush cacheflush;
//struct vki_xen_domctl_gdbsx_pauseunp_vcpu gdbsx_pauseunp_vcpu;
//struct vki_xen_domctl_gdbsx_domstatus gdbsx_domstatus;
+ //struct vki_xen_domctl_vnuma vnuma;
+ //struct vki_xen_domctl_psr_cmt_op psr_cmt_op;
+ //struct vki_xen_domctl_monitor_op monitor_op;
+ //struct vki_xen_domctl_psr_cat_op psr_cat_op;
vki_uint8_t pad[128];
} u;
};
diff -aur valgrind-3.11.0/include/vki/vki-xen-sysctl.h
valgrind-3.11.0_xen4.6/include/vki/vki-xen-sysctl.h
--- valgrind-3.11.0/include/vki/vki-xen-sysctl.h 2015-09-08 09:23:26.000000000 -0400
+++ valgrind-3.11.0_xen4.6/include/vki/vki-xen-sysctl.h 2015-11-05
10:30:26.820521000 -0500
@@ -9,6 +9,7 @@
* - 0x00000009: Xen 4.2
* - 0x0000000a: Xen 4.3 & 4.4
* - 0x0000000b: Xen 4.5
+ * - 0x0000000c: Xen 4.6
*
* When adding a new subop be sure to include the variants used by all
* of the above, both here and in syswrap-xen.c
@@ -38,6 +39,10 @@
#define VKI_XEN_SYSCTL_cpupool_op 18
#define VKI_XEN_SYSCTL_scheduler_op 19
#define VKI_XEN_SYSCTL_coverage_op 20
+#define VKI_XEN_SYSCTL_psr_cmt_op 21
+#define VKI_XEN_SYSCTL_pcitopoinfo 22
+#define VKI_XEN_SYSCTL_psr_cat_op 23
+#define VKI_XEN_SYSCTL_tmem_op 24
struct vki_xen_sysctl_readconsole {
/* IN */
@@ -88,6 +93,7 @@
};
/* vki_xen_sysctl_getdomaininfolist_0000000b is the same as 0000000a */
+/* vki_xen_sysctl_getdomaininfolist_0000000c is the same as 0000000a */
#define VKI_XEN_SYSCTL_CPUPOOL_OP_CREATE 1 /* C */
#define VKI_XEN_SYSCTL_CPUPOOL_OP_DESTROY 2 /* D */
@@ -107,6 +113,42 @@
struct vki_xenctl_bitmap cpumap; /* OUT: IF */
};
+struct vki_xen_sysctl_arinc653_schedule {
+ vki_xen_uint64_aligned_t major_frame;
+ vki_uint8_t num_sched_entries;
+ struct {
+ vki_xen_domain_handle_t dom_handle;
+ vki_uint32_t vcpu_id;
+ vki_xen_uint64_aligned_t runtime;
+ } sched_entries[64];
+};
+typedef struct vki_xen_sysctl_arinc653_schedule vki_xen_sysctl_arinc653_schedule_t;
+DEFINE_VKI_XEN_GUEST_HANDLE(vki_xen_sysctl_arinc653_schedule_t);
+
+struct vki_xen_sysctl_credit_schedule {
+ vki_uint32_t tslice_ms;
+ vki_uint32_t ratelimit_us;
+};
+typedef struct vki_xen_sysctl_credit_schedule vki_xen_sysctl_credit_schedule_t;
+DEFINE_VKI_XEN_GUEST_HANDLE(vki_xen_sysctl_credit_schedule_t);
+
+#define VKI_XEN_SYSCTL_SCHEDOP_putinfo 0
+#define VKI_XEN_SYSCTL_SCHEDOP_getinfo 1
+struct vki_xen_sysctl_scheduler_op {
+ vki_uint32_t cpupool_id; /* IN */
+ /* Only VKI_XEN_SCHEDULER_CREDIT supported */
+ vki_uint32_t sched_id; /* IN */
+ vki_uint32_t cmd; /* IN */
+
+ /* The schedule fields point to user memory locations */
+ union {
+ struct vki_xen_sysctl_sched_arinc653 {
+ VKI_XEN_GUEST_HANDLE_64(vki_xen_sysctl_arinc653_schedule_t) schedule;
+ } sched_arinc653;
+ struct vki_xen_sysctl_credit_schedule sched_credit;
+ } u;
+};
+
struct vki_xen_sysctl_debug_keys {
/* IN variables. */
VKI_XEN_GUEST_HANDLE_64(char) keys;
@@ -160,6 +202,7 @@
};
/* vki_xen_sysctl_physinfo_0000000b is the same as 0000000a */
+/* vki_xen_sysctl_physinfo_0000000c is the same as 0000000a */
struct vki_xen_sysctl_sched_id {
/* OUT variable. */
@@ -190,9 +233,11 @@
//struct vki_xen_sysctl_page_offline_op page_offline;
//struct vki_xen_sysctl_lockprof_op lockprof_op;
struct vki_xen_sysctl_cpupool_op cpupool_op;
- //struct vki_xen_sysctl_scheduler_op scheduler_op;
+ struct vki_xen_sysctl_scheduler_op scheduler_op;
//struct vki_xen_sysctl_coverage_op coverage_op;
-
+ //struct vki_xen_sysctl_psr_cmt_op psr_cmt_op;
+ //struct vki_xen_sysctl_psr_cat_op psr_cat_op;
+ //struct vki_xen_sysctl_tmem_op tmem_op;
vki_uint8_t pad[128];
} u;
};
|
|
From: John R. <jr...@bi...> - 2015-11-04 16:07:32
|
>> For the containers and algorithms in the C++ standard library, "new" >> and "delete" should be the only problem. (Note that I mean "container" >> and "algorithm" in the C++ standard sense; think vector, map, >> unordered_set, etc., plus anything from the <algorithm> header.) > > There are other problems. STL containers sometimes call the runtime library to do their work. For example, LLVM's libc++ implementation has a function called __next_prime() which is used by the hash-based containers (unordered_map and others). That function is implemented in the libcxx runtime library and is never inlined. If you don't link to the libcxx runtime then you can't use those containers. Supplying replacement libraries is expected when dealing with "embedded" environments such as valgrind internals. Often only a few functions are needed, and often reduced functionality and/or loss of speed is acceptable. In the particular case of next_prime(unsigned n) used by hash tables, the following reduced requirements may be enough: a) x > n b) odd(x) c) 1 == gcd(x, n) [or, combining with b): 1 == gcd(x, 2*n)] d) 1 == gcd(x, 3*5*7*11*13*17*19*23*29u) e) 1 == gcd(x, 31*37*41*43*47u) 'x' will be correct for n < (53*53) and for most other cases, too. The bad effects of being composite might be only some slowness due to probing only part of the table. |
|
From: Ivo R. <iv...@iv...> - 2015-11-04 15:07:47
|
Dear developers, We found the following comment in VEX/priv/host_ppc_defs.c, lines 107-109: /* Don't waste the reg-allocs's time trawling through zillions of FP registers - they mostly will never be used. We'll tolerate the occasional extra spill instead. */ Is this comment still valid - that is, is the register allocator susceptible for a high number of allocatable registers? I went quickly through the register allocator code in doRegisterAllocation() but could not find anything relevant. Thank you for any insight here, I. |
|
From: <pa...@fr...> - 2015-11-04 15:03:55
|
----- Original Message ----- > Hello, > I would like to use some C++ containers in my tool. I have attempted > to modify my tool's Makefile.am by adding AM_CXXFLAGS = -std=gnu++11 > at the top and changing $(LINK) to $(CXXLINK). However, because of > the -nodefaultlibs switch I have to manually add libraries to be > linked. I receive a multiple definition error: > > > /usr/lib/gcc/x86_64-redhat-linux/5.1.1/../../../../lib64/libc.a(abort.o): > In function `abort': > (.text+0x0): multiple definition of `abort' > ../coregrind/libcoregrind-amd64-linux.a(libcoregrind_amd64_linux_a-m_main.o):/home/will/Downloads/vg1/coregrind/m_main.c:2861: > first defined here > > > There is a conflict because of valgrind's redefinition of standard > library functions. Is it possible or are the examples of using C++ > in a valgrind tool. Hi Google Thread Sanitizer [https://code.google.com/p/data-race-test/wiki/ThreadSanitizer] advertises that it uses C++. This has been dead for some time (replaced with a GCC/llvm run time tool). I've only ever glanced at the tsan code, and I presume that all of the Valgrind interfaces are done in C and the post run analysis code is done in C++. A+ Paul |
|
From: Greg P. <gp...@ap...> - 2015-11-04 00:23:11
|
> On Nov 3, 2015, at 9:19 AM, Patrick J. LoPresti <lop...@gm...> wrote: > > On Mon, Nov 2, 2015 at 1:54 PM, Philippe Waroquiers > <phi...@sk...> wrote: >> >> The prudent way is to do the same as the other valgrind tools, >> i.e. use C and the existing valgrind containers/abstractions/... >> such as pub_tool_hashtable.h, pub_tool_oset.h, pub_tool_xarray.h, >> pub_tool_wordfm.h, .... > > You are right, of course. But just in case someone is feeling imprudent... > >> Now, it might be possible to use C++ but I think you will encounter >> difficulties linked to the constraint 'no library'. >> I am not a C++ expert, but e.g. I guess that new/delete will not >> be usable, as these will be in a library and/or based on malloc/free. >> More generally, any C++ feature implemented fully or partially with >> a library will not be usable (including any c++ feature that >> imply doing a syscall). > > For the containers and algorithms in the C++ standard library, "new" > and "delete" should be the only problem. (Note that I mean "container" > and "algorithm" in the C++ standard sense; think vector, map, > unordered_set, etc., plus anything from the <algorithm> header.) There are other problems. STL containers sometimes call the runtime library to do their work. For example, LLVM's libc++ implementation has a function called __next_prime() which is used by the hash-based containers (unordered_map and others). That function is implemented in the libcxx runtime library and is never inlined. If you don't link to the libcxx runtime then you can't use those containers. -- Greg Parker gp...@ap... Runtime Wrangler |
|
From: <sv...@va...> - 2015-11-03 17:52:14
|
Author: carll
Date: Tue Nov 3 17:52:08 2015
New Revision: 15721
Log:
Add ISA 2.07 vbit test support
Updated the NEWS file for this fix in VEX commit 3202 and valgrind commit
15720.
Bugzilla 354797 was created for this issue.
Modified:
trunk/NEWS
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Tue Nov 3 17:52:08 2015
@@ -40,7 +40,7 @@
353917 unhandled amd64-solaris syscall fchdir(120)
353920 unhandled amd64-solaris syscall: 170
354392 unhandled amd64-solaris syscall: 171
-
+354797 Added vbit tester support for PPC 64 isa 2.07 iops
Release 3.11.0 (22 September 2015)
|
|
From: <sv...@va...> - 2015-11-03 17:48:13
|
Author: carll
Date: Tue Nov 3 17:48:04 2015
New Revision: 15720
Log:
Add ISA 2.07 vbit test support
The ISA 2.07 support adds new Iops as well as support for some existing
Iops. None of these Iops have been enabled in the vbit tester. This commit
adds the needed support to the files in memcheck/tests/vbit-test.
These changes add support for additional immediate operands and additional
undefined bit checking functions.
There are additional changes to files VEX/priv/ir_inject.c and VEX/pub/libvex.h
that are in VEX commit 3202
Bugzilla 354797 was created for this issue.
Modified:
trunk/memcheck/tests/vbit-test/binary.c
trunk/memcheck/tests/vbit-test/irops.c
trunk/memcheck/tests/vbit-test/main.c
trunk/memcheck/tests/vbit-test/qernary.c
trunk/memcheck/tests/vbit-test/ternary.c
trunk/memcheck/tests/vbit-test/unary.c
trunk/memcheck/tests/vbit-test/valgrind.c
trunk/memcheck/tests/vbit-test/vbits.c
trunk/memcheck/tests/vbit-test/vbits.h
trunk/memcheck/tests/vbit-test/vtest.h
Modified: trunk/memcheck/tests/vbit-test/binary.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/binary.c (original)
+++ trunk/memcheck/tests/vbit-test/binary.c Tue Nov 3 17:48:04 2015
@@ -75,6 +75,7 @@
const opnd_t *result = &data->result;
const opnd_t *opnd1 = &data->opnds[0];
const opnd_t *opnd2 = &data->opnds[1];
+ opnd_t tmp;
vbits_t expected_vbits;
/* Only handle those undef-kinds that actually occur. */
@@ -84,6 +85,9 @@
break;
case UNDEF_ALL:
+ /* Iop_ShlD64, Iop_ShrD64, Iop_ShlD128, Iop_ShrD128 have
+ * one immediate operand in operand 2.
+ */
expected_vbits = undefined_vbits(result->vbits.num_bits);
break;
@@ -187,6 +191,161 @@
opnd2->vbits.num_bits);
break;
+ case UNDEF_ALL_64x2:
+ assert(opnd1->vbits.num_bits == opnd2->vbits.num_bits);
+ expected_vbits =
+ undefined_vbits_BxE(64, 2,
+ or_vbits(opnd1->vbits, opnd2->vbits));
+ break;
+
+ case UNDEF_ALL_32x4:
+ assert(opnd1->vbits.num_bits == opnd2->vbits.num_bits);
+ expected_vbits =
+ undefined_vbits_BxE(32, 4,
+ or_vbits(opnd1->vbits, opnd2->vbits));
+ break;
+
+ case UNDEF_ALL_16x8:
+ assert(opnd1->vbits.num_bits == opnd2->vbits.num_bits);
+ expected_vbits =
+ undefined_vbits_BxE(16, 8,
+ or_vbits(opnd1->vbits, opnd2->vbits));
+ break;
+
+ case UNDEF_ALL_8x16:
+ assert(opnd1->vbits.num_bits == opnd2->vbits.num_bits);
+ expected_vbits =
+ undefined_vbits_BxE(8, 16,
+ or_vbits(opnd1->vbits, opnd2->vbits));
+ break;
+
+ case UNDEF_ALL_32x4_EVEN:
+ /* Only even input bytes are used, result can be twice as wide */
+ assert(opnd1->vbits.num_bits == opnd2->vbits.num_bits);
+ expected_vbits =
+ undefined_vbits_BxE(64, 2,
+ undefined_vbits_128_even_element(32, 4,
+ or_vbits(opnd1->vbits, opnd2->vbits)));
+ break;
+
+ case UNDEF_ALL_16x8_EVEN:
+ /* Only even input bytes are used, result can be twice as wide */
+ assert(opnd1->vbits.num_bits == opnd2->vbits.num_bits);
+ expected_vbits =
+ undefined_vbits_BxE(32, 4,
+ undefined_vbits_128_even_element(16, 8,
+ or_vbits(opnd1->vbits, opnd2->vbits)));
+ break;
+
+ case UNDEF_ALL_8x16_EVEN:
+ /* Only even input bytes are used, result can be twice as wide */
+ assert(opnd1->vbits.num_bits == opnd2->vbits.num_bits);
+ expected_vbits =
+ undefined_vbits_BxE(16, 8,
+ undefined_vbits_128_even_element(8, 16,
+ or_vbits(opnd1->vbits, opnd2->vbits)));
+ break;
+
+ case UNDEF_64x2_ROTATE:
+ /* Rotate left each element in opnd1 by the amount in the corresponding
+ * element of opnd2.
+ */
+ assert(opnd1->vbits.num_bits == opnd2->vbits.num_bits);
+ /* Setup the tmp to match what the vbit tester seems to use. I can't
+ * use opnd2-value since valgrind doesn't think it has been set.
+ */
+ tmp.value.u128[0] = -1;
+ tmp.value.u128[1] = -1;
+ /* Calculate expected for the first operand when it is shifted.
+ * If any of the vbits are set for the shift field of the second operand
+ * then the result of the expected result for that element is all 1's.
+ */
+ expected_vbits = or_vbits(undefined_vbits_BxE_rotate(64, 2, opnd1->vbits,
+ tmp.value),
+ undefined_vbits_BxE(64, 2, opnd2->vbits));
+ break;
+
+ case UNDEF_32x4_ROTATE:
+ /* Rotate left each element in opnd1 by the amount in the corresponding
+ * element of opnd2.
+ */
+ assert(opnd1->vbits.num_bits == opnd2->vbits.num_bits);
+ expected_vbits = undefined_vbits_BxE_rotate(32, 4, opnd1->vbits,
+ opnd2->value);
+ break;
+
+ case UNDEF_16x8_ROTATE:
+ /* Rotate left each element in opnd1 by the amount in the corresponding
+ * element of opnd2.
+ */
+ assert(opnd1->vbits.num_bits == opnd2->vbits.num_bits);
+ expected_vbits = undefined_vbits_BxE_rotate(16, 8, opnd1->vbits,
+ opnd2->value);
+ break;
+
+ case UNDEF_8x16_ROTATE:
+ /* Rotate left each element in opnd1 by the amount in the corresponding
+ * element of opnd2.
+ */
+ assert(opnd1->vbits.num_bits == opnd2->vbits.num_bits);
+ expected_vbits = undefined_vbits_BxE_rotate(16, 8, opnd1->vbits,
+ opnd2->value);
+ break;
+
+ case UNDEF_SOME:
+ /* The result for the Iop_SHA256 and Iop_SHA256 is a secure hash. If
+ * one of the input bits is not defined there must be atleast one
+ * undefined bit in the output. Which bit and how many depends on
+ * which bit is undefined. Don't know the secure hash algorithm so
+ * we can only make sure at least one of the result bits is set.
+ *
+ * The Iop_SHA256, Iop_SHA512 iops have one immediate value in the
+ * second operand.
+ */
+ expected_vbits.num_bits = result->vbits.num_bits;
+
+ if ((result->vbits.bits.u128[0] != 0) ||
+ (result->vbits.bits.u128[1] != 0)) {
+ expected_vbits.bits.u128[0] = result->vbits.bits.u128[0];
+ expected_vbits.bits.u128[1] = result->vbits.bits.u128[1];
+
+ } else {
+ /* The input had at least one vbit set but the result doesn't have any
+ * bit set. Set them all so we will trigger the error on the call
+ * to complain().
+ */
+ expected_vbits.bits.u128[0] = ~0x0ULL;
+ expected_vbits.bits.u128[1] = ~0x0ULL;
+ }
+ break;
+
+ case UNDEF_NARROW256_AtoB:
+ assert(opnd1->vbits.num_bits == opnd2->vbits.num_bits);
+ switch(op->op) {
+ case Iop_NarrowBin64to32x4:
+ expected_vbits =
+ undefined_vbits_Narrow256_AtoB(64, 32, opnd1->vbits, opnd1->value,
+ opnd2->vbits, opnd2->value,
+ False);
+ break;
+ case Iop_QNarrowBin64Sto32Sx4:
+ expected_vbits =
+ undefined_vbits_Narrow256_AtoB(64, 32, opnd1->vbits, opnd1->value,
+ opnd2->vbits, opnd2->value,
+ True);
+ break;
+ case Iop_QNarrowBin64Uto32Ux4:
+ expected_vbits =
+ undefined_vbits_Narrow256_AtoB(64, 32, opnd1->vbits, opnd1->value,
+ opnd2->vbits, opnd2->value,
+ True);
+ break;
+ default:
+ fprintf(stderr, "ERROR, unknown Iop for UNDEF_NARROW256_AtoB\n");
+ panic(__func__);
+ }
+ break;
+
default:
panic(__func__);
}
@@ -225,7 +384,7 @@
// 2nd (right) operand
/* If the operand is an immediate value, there are no v-bits to set. */
- if (op->shift_amount_is_immediate) return tests_done;
+ if (!op->immediate_index) return tests_done;
num_input_bits = bitsof_irtype(opnds[1].type);
@@ -462,9 +621,10 @@
operand. */
for (i = 0; i < 2; ++i) {
- /* If this is a shift op that requires an immediate shift amount,
- do not iterate the v-bits of the 2nd operand */
- if (i == 1 && op->shift_amount_is_immediate) break;
+ /* If this is a Iop that requires an immediate amount,
+ do not iterate the v-bits of the operand */
+ if (((i+1) == op->immediate_index)
+ && (op->immediate_index)) break;
num_input_bits = bitsof_irtype(opnds[i].type);
opnds[0].vbits = defined_vbits(bitsof_irtype(opnds[0].type));
@@ -486,8 +646,13 @@
assert(sizeof xx.v1 == sizeof xx.v2.u64);
assert(xx.v1 == xx.v2.u64);
*/
- if (op->shift_amount_is_immediate)
+
+ if (op->immediate_index > 0) {
+ assert((op->immediate_type == Ity_I8)
+ || (op->immediate_type == Ity_I16)
+ || (op->immediate_type == Ity_I32));
opnds[1].value.u64 = 1;
+ }
for (bitpos = 0; bitpos < num_input_bits; ++bitpos) {
opnds[i].vbits = onehot_vbits(bitpos, bitsof_irtype(opnds[i].type));
Modified: trunk/memcheck/tests/vbit-test/irops.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/irops.c (original)
+++ trunk/memcheck/tests/vbit-test/irops.c Tue Nov 3 17:48:04 2015
@@ -1,3 +1,4 @@
+
/* -*- mode: C; c-basic-offset: 3; -*- */
/*
@@ -729,12 +730,13 @@
{ DEFOP(Iop_MulHi32Ux4, UNDEF_UNKNOWN), },
{ DEFOP(Iop_MulHi16Sx8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_MulHi32Sx4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_MullEven8Ux16, UNDEF_UNKNOWN), },
- { DEFOP(Iop_MullEven16Ux8, UNDEF_UNKNOWN), },
- { DEFOP(Iop_MullEven32Ux4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_MullEven8Sx16, UNDEF_UNKNOWN), },
- { DEFOP(Iop_MullEven16Sx8, UNDEF_UNKNOWN), },
- { DEFOP(Iop_MullEven32Sx4, UNDEF_UNKNOWN), },
+ /* Result of the Iop_MullEvenBxE is 2*BxE/2 */
+ { DEFOP(Iop_MullEven8Ux16, UNDEF_ALL_8x16_EVEN), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_MullEven16Ux8, UNDEF_ALL_16x8_EVEN), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_MullEven32Ux4, UNDEF_ALL_32x4_EVEN), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_MullEven8Sx16, UNDEF_ALL_8x16_EVEN), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_MullEven16Sx8, UNDEF_ALL_16x8_EVEN), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_MullEven32Sx4, UNDEF_ALL_32x4_EVEN), .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_Mull8Ux8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Mull8Sx8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Mull16Ux4, UNDEF_UNKNOWN), },
@@ -772,19 +774,19 @@
{ DEFOP(Iop_Max8Sx16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Max16Sx8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Max32Sx4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_Max64Sx2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_Max64Sx2, UNDEF_ALL_64x2), .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_Max8Ux16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Max16Ux8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Max32Ux4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_Max64Ux2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_Max64Ux2, UNDEF_ALL_64x2), .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_Min8Sx16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Min16Sx8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Min32Sx4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_Min64Sx2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_Min64Sx2, UNDEF_ALL_64x2), .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_Min8Ux16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Min16Ux8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Min32Ux4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_Min64Ux2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_Min64Ux2, UNDEF_ALL_64x2), .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_CmpEQ8x16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_CmpEQ16x8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_CmpEQ32x4, UNDEF_UNKNOWN), },
@@ -796,12 +798,12 @@
{ DEFOP(Iop_CmpGT8Ux16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_CmpGT16Ux8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_CmpGT32Ux4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_CmpGT64Ux2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_CmpGT64Ux2, UNDEF_ALL_64x2), .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_Cnt8x16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Clz8x16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Clz16x8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Clz32x4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_Clz64x2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_Clz64x2, UNDEF_ALL_64x2), .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_Cls8x16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Cls16x8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Cls32x4, UNDEF_UNKNOWN), },
@@ -836,7 +838,7 @@
{ DEFOP(Iop_Rol8x16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Rol16x8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Rol32x4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_Rol64x2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_Rol64x2, UNDEF_64x2_ROTATE), .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_QShl8x16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QShl16x8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QShl32x4, UNDEF_UNKNOWN), },
@@ -917,18 +919,18 @@
{ DEFOP(Iop_QNarrowBin32Uto16Ux8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_NarrowBin16to8x16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_NarrowBin32to16x8, UNDEF_UNKNOWN), },
- { DEFOP(Iop_NarrowBin64to32x4, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_NarrowBin64to32x4, UNDEF_NARROW256_AtoB), .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_NarrowUn16to8x8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_NarrowUn32to16x4, UNDEF_UNKNOWN), },
{ DEFOP(Iop_NarrowUn64to32x2, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowUn16Sto8Sx8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowUn32Sto16Sx4, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowUn64Sto32Sx2, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QNarrowBin64Sto32Sx4, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QNarrowBin64Sto32Sx4, UNDEF_NARROW256_AtoB), .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_QNarrowUn16Sto8Ux8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowUn32Sto16Ux4, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowUn64Sto32Ux2, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QNarrowBin64Uto32Ux4, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QNarrowBin64Uto32Ux4, UNDEF_NARROW256_AtoB), .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_QNarrowUn16Uto8Ux8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowUn32Uto16Ux4, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowUn64Uto32Ux2, UNDEF_UNKNOWN), },
@@ -1064,20 +1066,20 @@
{ DEFOP(Iop_Min32Fx8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Max64Fx4, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Min64Fx4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_BCDAdd, UNDEF_UNKNOWN), },
- { DEFOP(Iop_BCDSub, UNDEF_UNKNOWN), },
- { DEFOP(Iop_PolynomialMulAdd8x16, UNDEF_UNKNOWN), },
- { DEFOP(Iop_PolynomialMulAdd16x8, UNDEF_UNKNOWN), },
- { DEFOP(Iop_PolynomialMulAdd32x4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_PolynomialMulAdd64x2, UNDEF_UNKNOWN), },
- { DEFOP(Iop_CipherV128, UNDEF_UNKNOWN), },
- { DEFOP(Iop_CipherLV128, UNDEF_UNKNOWN), },
- { DEFOP(Iop_CipherSV128, UNDEF_UNKNOWN), },
- { DEFOP(Iop_NCipherV128, UNDEF_UNKNOWN), },
- { DEFOP(Iop_NCipherLV128, UNDEF_UNKNOWN), },
- { DEFOP(Iop_SHA512, UNDEF_UNKNOWN), },
- { DEFOP(Iop_SHA256, UNDEF_UNKNOWN), },
- { DEFOP(Iop_PwBitMtxXpose64x2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_BCDAdd, UNDEF_SOME), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_BCDSub, UNDEF_SOME), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_PolynomialMulAdd8x16, UNDEF_ALL_8x16), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_PolynomialMulAdd16x8, UNDEF_ALL_16x8), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_PolynomialMulAdd32x4, UNDEF_ALL_32x4), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_PolynomialMulAdd64x2, UNDEF_ALL_64x2), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_CipherV128, UNDEF_ALL_64x2), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_CipherLV128, UNDEF_ALL_64x2), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_CipherSV128, UNDEF_ALL_64x2), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_NCipherV128, UNDEF_ALL_64x2), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_NCipherLV128, UNDEF_ALL_64x2), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_SHA512, UNDEF_SOME), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_SHA256, UNDEF_SOME), .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_PwBitMtxXpose64x2, UNDEF_64x2_TRANSPOSE), .ppc64 = 1, .ppc32 = 1 },
};
/* Force compile time failure in case libvex_ir.h::IROp was updated
@@ -1090,6 +1092,7 @@
irop_t *
get_irop(IROp op)
{
+ int rc;
unsigned i;
for (i = 0; i < sizeof irops / sizeof *irops; ++i) {
@@ -1122,7 +1125,6 @@
case Iop_F64toI64U:
case Iop_F128toI32U:
case Iop_F128toI64U: {
- int rc;
/* These IROps require the floating point extension facility */
rc = system(S390X_FEATURES " s390x-fpext");
// s390x_features returns 1 if feature does not exist
@@ -1180,8 +1182,7 @@
case Iop_I64UtoF64:
case Iop_I64UtoF32:
case Iop_I64StoD64: {
- int rc;
- /* IROps require a processor that supports ISA 2.06 or newer */
+ /* IROps require a processor that supports ISA 2.06 (Power 7) or newer */
rc = system(MIN_POWER_ISA " 2.06 ");
rc /= 256;
/* MIN_POWER_ISA returns 0 if underlying HW supports the
@@ -1192,6 +1193,48 @@
if (rc > 2) {
panic(" ERROR, min_power_isa() return code is invalid.\n");
}
+ }
+ case Iop_PwBitMtxXpose64x2:
+ case Iop_Clz64x2:
+ case Iop_BCDAdd:
+ case Iop_BCDSub:
+ case Iop_PolynomialMulAdd8x16:
+ case Iop_PolynomialMulAdd16x8:
+ case Iop_PolynomialMulAdd32x4:
+ case Iop_PolynomialMulAdd64x2:
+ case Iop_CipherV128:
+ case Iop_CipherLV128:
+ case Iop_CipherSV128:
+ case Iop_NCipherV128:
+ case Iop_NCipherLV128:
+ case Iop_SHA512:
+ case Iop_SHA256:
+ case Iop_MullEven8Ux16:
+ case Iop_MullEven16Ux8:
+ case Iop_MullEven32Ux4:
+ case Iop_MullEven8Sx16:
+ case Iop_MullEven16Sx8:
+ case Iop_MullEven32Sx4:
+ case Iop_Max64Sx2:
+ case Iop_Max64Ux2:
+ case Iop_Min64Sx2:
+ case Iop_Min64Ux2:
+ case Iop_CmpGT64Ux2:
+ case Iop_Rol64x2:
+ case Iop_QNarrowBin64Sto32Sx4:
+ case Iop_QNarrowBin64Uto32Ux4:
+ case Iop_NarrowBin64to32x4: {
+ /* IROps require a processor that supports ISA 2.07 (Power 8) or newer */
+ rc = system(MIN_POWER_ISA " 2.07 ");
+ rc /= 256;
+ /* MIN_POWER_ISA returns 0 if underlying HW supports the
+ * specified ISA or newer. Returns 1 if the HW does not support
+ * the specified ISA. Returns 2 on error.
+ */
+ if (rc == 1) return NULL;
+ if (rc > 2) {
+ panic(" ERROR, min_power_isa() return code is invalid.\n");
+ }
}
break;
Modified: trunk/memcheck/tests/vbit-test/main.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/main.c (original)
+++ trunk/memcheck/tests/vbit-test/main.c Tue Nov 3 17:48:04 2015
@@ -80,10 +80,57 @@
fixup_irops(void)
{
#ifdef __powerpc__
- get_irop(Iop_ShlD64)->shift_amount_is_immediate = 1;
- get_irop(Iop_ShrD64)->shift_amount_is_immediate = 1;
- get_irop(Iop_ShlD128)->shift_amount_is_immediate = 1;
- get_irop(Iop_ShrD128)->shift_amount_is_immediate = 1;
+ irop_t* tmp;
+
+ /* Iops with immediate shift value */
+ tmp = get_irop(Iop_ShlD64);
+ if (tmp) {
+ tmp->immediate_index = 2;
+ tmp->immediate_type = Ity_I8;
+ }
+
+ tmp = get_irop(Iop_ShrD64);
+ if (tmp) {
+ tmp->immediate_index = 2;
+ tmp->immediate_type = Ity_I8;
+ }
+
+ tmp = get_irop(Iop_ShlD128);
+ if (tmp) {
+ tmp->immediate_index = 2;
+ tmp->immediate_type = Ity_I8;
+ }
+
+ tmp = get_irop(Iop_ShrD128);
+ if (tmp) {
+ tmp->immediate_index = 2;
+ tmp->immediate_type = Ity_I8;
+ }
+
+ /* Iops with immediate value that controls PPC instruction behavior */
+ tmp = get_irop(Iop_SHA256);
+ if (tmp) {
+ tmp->immediate_index = 2;
+ tmp->immediate_type = Ity_I8;
+ }
+
+ tmp = get_irop(Iop_SHA512);
+ if (tmp) {
+ tmp->immediate_index = 2;
+ tmp->immediate_type = Ity_I8;
+ }
+
+ tmp = get_irop(Iop_BCDAdd);
+ if (tmp) {
+ tmp->immediate_index = 3;
+ tmp->immediate_type = Ity_I8;
+ }
+
+ tmp = get_irop(Iop_BCDSub);
+ if (tmp) {
+ tmp->immediate_index = 3;
+ tmp->immediate_type = Ity_I8;
+ }
#endif
}
Modified: trunk/memcheck/tests/vbit-test/qernary.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/qernary.c (original)
+++ trunk/memcheck/tests/vbit-test/qernary.c Tue Nov 3 17:48:04 2015
@@ -67,6 +67,9 @@
opnd_t *opnds = data->opnds;
int tests_done = 0;
+ /* Immediate operands are currently not supported here */
+ assert(op->immediate_index == 0);
+
/* For each operand, set a single bit to undefined and observe how
that propagates to the output. Do this for all bits in each
operand. */
Modified: trunk/memcheck/tests/vbit-test/ternary.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/ternary.c (original)
+++ trunk/memcheck/tests/vbit-test/ternary.c Tue Nov 3 17:48:04 2015
@@ -50,6 +50,34 @@
opnd3->vbits);
break;
+ case UNDEF_SOME:
+ /* The result of the Iop_BCDAdd and the Iop_BCDSub has some result
+ * vbits set. Not sure how the vbit propagation works on these Iops.
+ * for now, just make sure there are some vbits set in the result.
+ *
+ * The Iop_BCDAdd and Iop_BCDSub iops have one immediate value in the
+ * third operand.
+ *
+ * TODO, figure out details of vbit propagation for these Iops.
+ */
+ expected_vbits.num_bits = result->vbits.num_bits;
+
+ if ((result->vbits.bits.u128[0] != 0) ||
+ (result->vbits.bits.u128[1] != 0)) {
+ expected_vbits.bits.u128[0] = result->vbits.bits.u128[0];
+ expected_vbits.bits.u128[1] = result->vbits.bits.u128[1];
+
+ } else {
+ /* The input had at least one vbit set but the result doesn't have any
+ * bit set. Set them all so we will trigger the error on the call
+ * to complain().
+ */
+ expected_vbits.bits.u128[0] = ~0x0ULL;
+ expected_vbits.bits.u128[1] = ~0x0ULL;
+ }
+
+ break;
+
default:
panic(__func__);
}
Modified: trunk/memcheck/tests/vbit-test/unary.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/unary.c (original)
+++ trunk/memcheck/tests/vbit-test/unary.c Tue Nov 3 17:48:04 2015
@@ -68,6 +68,31 @@
expected_vbits = zextend_vbits(opnd->vbits, num_bits);
break;
+ case UNDEF_ALL_64x2:
+ assert(num_bits == 128);
+ expected_vbits = undefined_vbits_BxE(64, 2, opnd->vbits);
+ break;
+
+ case UNDEF_ALL_32x4:
+ assert(num_bits == 128);
+ expected_vbits = undefined_vbits_BxE(32, 4, opnd->vbits);
+ break;
+
+ case UNDEF_ALL_16x8:
+ assert(num_bits == 128);
+ expected_vbits = undefined_vbits_BxE(16, 8, opnd->vbits);
+ break;
+
+ case UNDEF_ALL_8x16:
+ assert(num_bits == 128);
+ expected_vbits = undefined_vbits_BxE(8, 16, opnd->vbits);
+ break;
+
+ case UNDEF_64x2_TRANSPOSE:
+ assert(num_bits == 128);
+ expected_vbits = undefined_vbits_64x2_transpose(opnd->vbits);
+ break;
+
default:
panic(__func__);
}
@@ -83,6 +108,9 @@
unsigned num_input_bits, bitpos;
int tests_done = 0;
+ /* Immediate operands are currently not supported here */
+ assert(op->immediate_index == 0);
+
num_input_bits = bitsof_irtype(data->opnds[0].type);
for (bitpos = 0; bitpos < num_input_bits; ++bitpos) {
Modified: trunk/memcheck/tests/vbit-test/valgrind.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/valgrind.c (original)
+++ trunk/memcheck/tests/vbit-test/valgrind.c Tue Nov 3 17:48:04 2015
@@ -51,7 +51,8 @@
cb.num_operands = get_num_operands(op->op);
- cb.shift_amount_is_immediate = op->shift_amount_is_immediate;
+ cb.immediate_index = op->immediate_index;
+ cb.immediate_type = op->immediate_type;
return cb;
}
Modified: trunk/memcheck/tests/vbit-test/vbits.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/vbits.c (original)
+++ trunk/memcheck/tests/vbit-test/vbits.c Tue Nov 3 17:48:04 2015
@@ -128,6 +128,278 @@
return new;
}
+/* The following routines named undefined_vbits_BxE() return a 128-bit
+ * vector with E elements each of size bits. If any of the bits in an
+ * element is undefined, then return a value where all bits in that
+ * element are undefined.
+ */
+vbits_t
+undefined_vbits_BxE(unsigned int bits, unsigned int elements, vbits_t v)
+{
+ vbits_t new = { .num_bits = v.num_bits };
+ uint64_t mask = ~0ull >> (64 - bits);
+ int i, j;
+
+ assert ((elements % 2) == 0);
+ assert (bits <= 64);
+
+ for (i = 0; i<2; i++) {
+ new.bits.u128[i] = 0ull;
+
+ for (j = 0; j<elements/2; j++) {
+ if ((v.bits.u128[i] & (mask << (j*bits))) != 0)
+ new.bits.u128[i] |= (mask << (j*bits));
+ }
+ }
+ return new;
+}
+
+/* The following routines named undefined_vbits_BxE_rotate() return a 128-bit
+ * vector with E elements each of size bits. The bits in v are rotated
+ * left by the amounts in the corresponding element of val. Specified rotate
+ * amount field is assumed to be at most 8-bits wide.
+ */
+vbits_t
+undefined_vbits_BxE_rotate(unsigned int bits, unsigned int elements,
+ vbits_t v, value_t val)
+{
+ vbits_t new = { .num_bits = v.num_bits };
+ uint64_t mask = ~0ull >> (64 - bits);
+ uint64_t const shift_mask = 0xFF;
+ uint64_t element;
+ int i, j;
+ signed char shift;
+ assert ((elements % 2) == 0);
+ assert (bits <= 64);
+
+ for (i = 0; i<2; i++) {
+ new.bits.u128[i] = 0ull;
+
+ for (j = 0; j<elements/2; j++) {
+ element = (v.bits.u128[i] >> (j*bits)) & mask;
+ shift = (int)((val.u128[i] >> (j*bits)) & shift_mask);
+
+ if (shift < 0) {
+ /* right shift */
+ new.bits.u128[i] = element >> -shift;
+
+ /* OR in the bits shifted out into the top of the element */
+ new.bits.u128[i] |= element << (bits + shift);
+ } else {
+ /* left shift */
+ /* upper bits from shift */
+ new.bits.u128[i] = element << shift;
+
+ /* OR in the bits shifted out into the bottom of the element */
+ new.bits.u128[i] |= element >> (bits - shift);
+ }
+ }
+ }
+ return new;
+}
+
+/* Only the even elements of the input are used by the Iop*/
+vbits_t
+undefined_vbits_128_even_element(unsigned int bits, unsigned int elements,
+ vbits_t v)
+{
+ int i;
+ uint64_t mask;
+ unsigned int const element_width = 128/elements;
+ vbits_t new = { .num_bits = v.num_bits };
+
+ assert ((elements % 2) == 0);
+ assert (bits <= 64);
+
+ /* Create a 128-bit mask with the bits in the even numbered
+ * elements are all ones.
+ */
+ mask = ~0ull >> (64 - bits);
+
+ for (i = 2; i < elements/2; i=i+2) {
+ mask |= mask << (i * element_width);
+ }
+
+ new.bits.u128[0] = mask & v.bits.u128[0];
+ new.bits.u128[1] = mask & v.bits.u128[1];
+
+ return new;
+}
+
+/* Concatenate bit i from each byte j. Place concatenated 8 bit value into
+ * byte i of the result. Do for all i from 0 to 7 and j from 0 to 7 of each
+ * 64-bit element.
+ */
+vbits_t
+undefined_vbits_64x2_transpose(vbits_t v)
+{
+ vbits_t new = { .num_bits = v.num_bits };
+ unsigned int bit, byte, element;
+ uint64_t value, new_value, select_bit;
+
+ for (element = 0; element < 2; element++) {
+ value = v.bits.u128[element];
+ new_value = 0;
+ for (byte = 0; byte < 8; byte++) {
+ for (bit = 0; bit < 8; bit++) {
+ select_bit = 1ULL & (value >> (bit + 8*byte));
+ new_value |= select_bit << (bit*8 + byte);
+ }
+ }
+ new.bits.u128[element] = new_value;
+ }
+ return new;
+}
+
+/* The routine takes a 256-bit vector value stored across the two 128-bit
+ * source operands src1 and src2. The size of each element in the input is
+ * src_num_bits. The elements are narrowed to result_num_bits and packed
+ * into the result. If saturate is True, then the all the result bits are
+ * set to 1 if the source element can not be represented in result_num_bits.
+ */
+vbits_t
+undefined_vbits_Narrow256_AtoB(unsigned int src_num_bits,
+ unsigned int result_num_bits,
+ vbits_t src1_v, value_t src1_value,
+ vbits_t src2_v, value_t src2_value,
+ bool saturate)
+{
+
+ vbits_t new = { .num_bits = src1_v.num_bits };
+ unsigned int i;
+ uint64_t vbits, new_value;
+ uint64_t const src_mask = ~0x0ULL >> (64 - src_num_bits);
+ uint64_t const result_mask = ~0x0ULL >> (64 - result_num_bits);
+ unsigned int num_elements_per_64_bits = src_num_bits/64;
+ unsigned int shift;
+
+ /*
+ * NOTE: POWER PPC
+ * the saturated value is 0xFFFF for the vbit is in one of the lower
+ * 32-bits of the source. The saturated result is 0xFFFF0000 if the
+ * vbit is in the upper 32-bits of the source. Not sure what
+ * the saturated result is in general for a B-bit result.
+ *
+ * ONLY TESTED FOR 64 bit input, 32 bit result
+ */
+ uint64_t const saturated_result = 0xFFFFULL;
+
+ /* Source elements are split between the two source operands */
+
+ assert(src_num_bits <= 64);
+ assert(result_num_bits < 64);
+ assert(result_num_bits < src_num_bits);
+
+ /* Narrow the elements from src1 to the upper 64-bits of result.
+ * Do each of the 64 bit values that make up a u128
+ */
+ new_value = 0;
+ for (i = 0; i < num_elements_per_64_bits; i++) {
+ vbits = src1_v.bits.u128[0] >> (i * src_num_bits);
+ vbits &= src_mask;
+
+ shift = result_num_bits * i;
+ if (vbits) {
+ if (saturate) {
+ /* Value will not fit in B-bits, saturate the result as needed. */
+ if (vbits >> (src_num_bits/2))
+ /* vbit is upper half of the source */
+ new_value |= saturated_result << ( shift + result_num_bits/2);
+ else
+ new_value |= saturated_result << shift;
+ } else {
+ new_value |= (vbits & result_mask) << shift;
+ }
+ }
+ }
+
+ for (i = 0; i < num_elements_per_64_bits; i++) {
+ vbits = src1_v.bits.u128[1] >> (i * src_num_bits);
+ vbits &= src_mask;
+
+ shift = result_num_bits * i + (num_elements_per_64_bits
+ * result_num_bits);
+ if (vbits) {
+ if (saturate) {
+ /* Value will not fit in result_num_bits, saturate the result
+ * as needed.
+ */
+ if (vbits >> (src_num_bits/2))
+ /* vbit is upper half of the source */
+ new_value |= saturated_result << (shift + result_num_bits/2);
+
+ else
+ new_value |= saturated_result << shift;
+
+ } else {
+ new_value |= (vbits & result_mask) << shift;
+ }
+ }
+ }
+ if (__BYTE_ORDER == __LITTLE_ENDIAN)
+ new.bits.u128[1] = new_value;
+ else
+ /* Big endian, swap the upper and lower 32-bits of new_value */
+ new.bits.u128[0] = (new_value << 32) | (new_value >> 32);
+
+ new_value = 0;
+ /* Narrow the elements from src2 to the lower 64-bits of result.
+ * Do each of the 64 bit values that make up a u128
+ */
+ for (i = 0; i < num_elements_per_64_bits; i++) {
+ vbits = src2_v.bits.u128[0] >> (i * src_num_bits);
+ vbits &= src_mask;
+
+ shift = result_num_bits * i;
+ if (vbits) {
+ if (saturate) {
+ /* Value will not fit in result, saturate the result as needed. */
+ if (vbits >> (src_num_bits/2))
+ /* vbit is upper half of the source */
+ new_value |= saturated_result << (shift + result_num_bits/2);
+ else
+ new_value |= saturated_result << shift;
+ } else {
+ new_value |= (vbits & result_mask) << shift;
+ }
+ }
+ }
+
+ for (i = 0; i < num_elements_per_64_bits; i++) {
+ vbits = src2_v.bits.u128[1] >> (i * src_num_bits);
+ vbits &= src_mask;
+
+ if (vbits) {
+ if (saturate) {
+ /* Value will not fit in result_num_bits, saturate the result
+ * as needed.
+ */
+ if (vbits >> (src_num_bits/2))
+ /* vbit is upper half of the source */
+ new_value |= saturated_result << (result_num_bits * i
+ + result_num_bits/2
+ + (num_elements_per_64_bits
+ * result_num_bits));
+ else
+ new_value |= saturated_result << (result_num_bits * i
+ + (num_elements_per_64_bits
+ * result_num_bits));
+
+ } else {
+ new_value |= (vbits & result_mask) << (result_num_bits * i
+ + (num_elements_per_64_bits
+ * result_num_bits));
+ }
+ }
+ }
+ if (__BYTE_ORDER == __LITTLE_ENDIAN)
+ new.bits.u128[0] = new_value;
+ else
+ /* Big endian, swap the upper and lower 32-bits of new_value */
+ new.bits.u128[1] = (new_value << 32) | (new_value >> 32);
+
+ return new;
+}
/* Return a value where all bits are set to defined. */
vbits_t
Modified: trunk/memcheck/tests/vbit-test/vbits.h
==============================================================================
--- trunk/memcheck/tests/vbit-test/vbits.h (original)
+++ trunk/memcheck/tests/vbit-test/vbits.h Tue Nov 3 17:48:04 2015
@@ -29,6 +29,7 @@
#include <stdint.h>
#include <stdio.h>
+#include <stdbool.h>
typedef uint64_t uint128_t[2];
typedef uint64_t uint256_t[4];
@@ -62,6 +63,19 @@
void print_vbits(FILE *, vbits_t);
vbits_t undefined_vbits(unsigned num_bits);
+vbits_t undefined_vbits_BxE(unsigned int bits, unsigned int elements,
+ vbits_t v);
+vbits_t undefined_vbits_BxE_rotate(unsigned int bits, unsigned int elements,
+ vbits_t vbits,
+ value_t value);
+vbits_t undefined_vbits_128_even_element(unsigned int bits,
+ unsigned int elements, vbits_t v);
+vbits_t undefined_vbits_64x2_transpose(vbits_t v);
+vbits_t undefined_vbits_Narrow256_AtoB(unsigned int src_num_bits,
+ unsigned int result_num_bits,
+ vbits_t src1_v, value_t src1_value,
+ vbits_t src2_v, value_t src2_value,
+ bool sataurate);
vbits_t defined_vbits(unsigned num_bits);
int equal_vbits(vbits_t, vbits_t);
vbits_t truncate_vbits(vbits_t, unsigned num_bits);
Modified: trunk/memcheck/tests/vbit-test/vtest.h
==============================================================================
--- trunk/memcheck/tests/vbit-test/vtest.h (original)
+++ trunk/memcheck/tests/vbit-test/vtest.h Tue Nov 3 17:48:04 2015
@@ -79,6 +79,81 @@
UNDEF_ORD, // Iop_CmpORD compare
+ /* For each of the following UNDEF_ALL_BxE, E is the number of
+ * elements and B is the number of bits in the element.
+ *
+ * If any bits in one of the E elements is not defined, then the
+ * return value has all bits in the corresponding element set to 1.
+ */
+ UNDEF_ALL_64x2, // 128-bit vector, two 64-bit elements
+ UNDEF_ALL_32x4, // 128-bit vector, four 32-bit elements
+ UNDEF_ALL_16x8, // 128-bit vector, eight 16-bit elements
+ UNDEF_ALL_8x16, // 128-bit vector, sixteen 8-bit elements
+
+ /* For each of the following UNDEF_ALL_BxE_EVEN, E is the number of
+ * elements and B is the number of bits in the element. Elements are
+ * numbered from right to left starting with element number 0.
+ *
+ * If any bits in one of the even numbered elements is not defined, then
+ * the return value has all bits in the corresponding element set to 1.
+ * The bits in the odd numbered elements are not checked
+ */
+ UNDEF_ALL_32x4_EVEN, // 128-bit vector, four 32-bit elements
+ UNDEF_ALL_16x8_EVEN, // 128-bit vector, eight 16-bit elements
+ UNDEF_ALL_8x16_EVEN, // 128-bit vector, sixteen 8-bit elements
+
+ /* For each of the following UNDEF_BxE_TRANSPOSE, E is the number of
+ * elements and B is the number of bits in the element.
+ *
+ * Concatenate bit i from each byte j. Place concatenated 8 bit value
+ * into byte i of the result. Do for each bit i from 0 to 7 and
+ * byte j from 0 to 7 of each 64-bit element.
+ */
+ UNDEF_64x2_TRANSPOSE,
+
+ /* For each of the following UNDEF_BxE_ROTATE, E is the number of
+ * elements and B is the number of bits in the element.
+ *
+ * The result is the undefined bits in each element rotated by the
+ * specified amount. Bits rotated out of the element are discarded.
+ * No additional bits are set to undefined.
+ */
+ UNDEF_64x2_ROTATE, /* 128-bit vector, two 64-bit elements, rotate
+ * elements left.
+ */
+ UNDEF_32x4_ROTATE, /* 128-bit vector, four 32-bit elements, rotate
+ * elements left.
+ */
+ UNDEF_16x8_ROTATE, /* 128-bit vector, eight 16-bit elements, rotate
+ * elements left.
+ */
+ UNDEF_8x16_ROTATE, /* 128-bit vector, sixteen 8-bit elements, rotate
+ * elements left.
+ */
+
+ /* If the input had some vbits set, the result will have one or more
+ * vbits set. Minimal test when the vbit propagation can not be easily
+ * calculated.
+ */
+ UNDEF_SOME,
+
+ /* For UNDEF_NARROW256_AtoB, narrow the elements of size A-bits in
+ * the 256-bit source (stored in two 128-bit values) to a 128-bit
+ * result with elements of size B-bits.
+ *
+ * If the source element will fit into the corresponding destination
+ * element, then only the undefined bits in the source element are
+ * undefined in the corresponding bit position of the destination element.
+ *
+ * If the source element will not fit into the destination element, then
+ * only the lower B undefined bits of the source element will be
+ * undefined in the corresponding result element unless the saturate
+ * flag is true. If the saturate flag is true and the element in the
+ * source will not fit into the corresponding destination element, then
+ * all of the bits in the corresponding destination element are set to one.
+ */
+ UNDEF_NARROW256_AtoB,
+
// For IROps I don't know anything about
UNDEF_UNKNOWN
} undef_t;
@@ -89,7 +164,15 @@
IROp op;
const char *name;
undef_t undef_kind;
- int shift_amount_is_immediate;
+ /* The following two members describe if this operand has immediate
+ * operands. There are a few restrictions:
+ * (1) An operator can have at most one immediate operand.
+ * (2) If there is an immediate operand, it is the right-most operand.
+ * An immediate_index of 0 means there is no immediate operand.
+ */
+ unsigned immediate_index;
+ unsigned immediate_type;
+
// Indicate whether IROp can be tested on a particular architecture
unsigned s390x : 1;
unsigned amd64 : 1;
|
|
From: <sv...@va...> - 2015-11-03 17:45:07
|
Author: carll
Date: Tue Nov 3 17:44:55 2015
New Revision: 3202
Log:
Add ISA 2.07 vbit test support
The ISA 2.07 support adds new Iops as well as support for some existing
Iops. None of these Iops have been enabled in the vbit tester. This commit
adds the needed support to the files VEX/priv/ir_inject and VEX/pub/libvex.h.
These changes add support for additional immediate operands.
There are additional changes to the memcheck files to complete the ISA 2.07
support.
Bugzilla 354797 was created for this issue.
Modified:
trunk/priv/ir_inject.c
trunk/pub/libvex.h
Modified: trunk/priv/ir_inject.c
==============================================================================
--- trunk/priv/ir_inject.c (original)
+++ trunk/priv/ir_inject.c Tue Nov 3 17:44:55 2015
@@ -36,6 +36,7 @@
/* Convenience macros for readibility */
#define mkU8(v) IRExpr_Const(IRConst_U8(v))
+#define mkU16(v) IRExpr_Const(IRConst_U16(v))
#define mkU32(v) IRExpr_Const(IRConst_U32(v))
#define mkU64(v) IRExpr_Const(IRConst_U64(v))
#define unop(kind, a) IRExpr_Unop(kind, a)
@@ -209,12 +210,26 @@
case 2:
opnd1 = load(endian, iricb.t_opnd1, iricb.opnd1);
+ /* HACK, compiler warning âopnd2â may be used uninitialized */
+ opnd2 = opnd1;
+
+ /* immediate_index = 0 immediate value is not used.
+ * immediate_index = 2 opnd2 is an immediate value.
+ */
+ vassert(iricb.immediate_index == 0 || iricb.immediate_index == 2);
+
+ if (iricb.immediate_index == 2) {
+ vassert((iricb.t_opnd2 == Ity_I8) || (iricb.t_opnd2 == Ity_I16)
+ || (iricb.t_opnd2 == Ity_I32));
- if (iricb.shift_amount_is_immediate) {
- // This implies that the IROp is a shift op
- vassert(iricb.t_opnd2 == Ity_I8);
/* Interpret the memory as an ULong. */
- opnd2 = mkU8(*((ULong *)iricb.opnd2));
+ if (iricb.immediate_type == Ity_I8) {
+ opnd2 = mkU8(*((ULong *)iricb.opnd2));
+ } else if (iricb.immediate_type == Ity_I16) {
+ opnd2 = mkU16(*((ULong *)iricb.opnd2));
+ } else if (iricb.immediate_type == Ity_I32) {
+ opnd2 = mkU32(*((ULong *)iricb.opnd2));
+ }
} else {
opnd2 = load(endian, iricb.t_opnd2, iricb.opnd2);
}
@@ -228,7 +243,28 @@
case 3:
opnd1 = load(endian, iricb.t_opnd1, iricb.opnd1);
opnd2 = load(endian, iricb.t_opnd2, iricb.opnd2);
- opnd3 = load(endian, iricb.t_opnd3, iricb.opnd3);
+ /* HACK, compiler warning âopnd3â may be used uninitialized */
+ opnd3 = opnd2;
+
+ /* immediate_index = 0 immediate value is not used.
+ * immediate_index = 3 opnd3 is an immediate value.
+ */
+ vassert(iricb.immediate_index == 0 || iricb.immediate_index == 3);
+
+ if (iricb.immediate_index == 3) {
+ vassert((iricb.t_opnd3 == Ity_I8) || (iricb.t_opnd3 == Ity_I16)
+ || (iricb.t_opnd2 == Ity_I32));
+
+ if (iricb.immediate_type == Ity_I8) {
+ opnd3 = mkU8(*((ULong *)iricb.opnd3));
+ } else if (iricb.immediate_type == Ity_I16) {
+ opnd3 = mkU16(*((ULong *)iricb.opnd3));
+ } else if (iricb.immediate_type == Ity_I32) {
+ opnd3 = mkU32(*((ULong *)iricb.opnd3));
+ }
+ } else {
+ opnd3 = load(endian, iricb.t_opnd3, iricb.opnd3);
+ }
if (rounding_mode)
data = qop(iricb.op, rounding_mode, opnd1, opnd2, opnd3);
else
@@ -240,7 +276,28 @@
opnd1 = load(endian, iricb.t_opnd1, iricb.opnd1);
opnd2 = load(endian, iricb.t_opnd2, iricb.opnd2);
opnd3 = load(endian, iricb.t_opnd3, iricb.opnd3);
- opnd4 = load(endian, iricb.t_opnd4, iricb.opnd4);
+ /* HACK, compiler warning âopnd4â may be used uninitialized */
+ opnd4 = opnd3;
+
+ /* immediate_index = 0 immediate value is not used.
+ * immediate_index = 4 opnd4 is an immediate value.
+ */
+ vassert(iricb.immediate_index == 0 || iricb.immediate_index == 4);
+
+ if (iricb.immediate_index == 4) {
+ vassert((iricb.t_opnd3 == Ity_I8) || (iricb.t_opnd3 == Ity_I16)
+ || (iricb.t_opnd2 == Ity_I32));
+
+ if (iricb.immediate_type == Ity_I8) {
+ opnd4 = mkU8(*((ULong *)iricb.opnd4));
+ } else if (iricb.immediate_type == Ity_I16) {
+ opnd4 = mkU16(*((ULong *)iricb.opnd4));
+ } else if (iricb.immediate_type == Ity_I32) {
+ opnd4 = mkU32(*((ULong *)iricb.opnd4));
+ }
+ } else {
+ opnd4 = load(endian, iricb.t_opnd4, iricb.opnd4);
+ }
data = qop(iricb.op, opnd1, opnd2, opnd3, opnd4);
break;
Modified: trunk/pub/libvex.h
==============================================================================
--- trunk/pub/libvex.h (original)
+++ trunk/pub/libvex.h Tue Nov 3 17:44:55 2015
@@ -847,7 +847,14 @@
IRType t_opnd4; // type of 4th operand
UInt rounding_mode;
UInt num_operands; // excluding rounding mode, if any
- Bool shift_amount_is_immediate;
+ /* The following two members describe if this operand has immediate
+ * operands. There are a few restrictions:
+ * (1) An operator can have at most one immediate operand.
+ * (2) If there is an immediate operand, it is the right-most operand
+ * An immediate_index of 0 means there is no immediate operand.
+ */
+ UInt immediate_type; // size of immediate Ity_I8, Ity_16
+ UInt immediate_index; // operand number: 1, 2
}
IRICB;
|
|
From: Patrick J. L. <lop...@gm...> - 2015-11-03 17:19:10
|
On Mon, Nov 2, 2015 at 1:54 PM, Philippe Waroquiers <phi...@sk...> wrote: > > The prudent way is to do the same as the other valgrind tools, > i.e. use C and the existing valgrind containers/abstractions/... > such as pub_tool_hashtable.h, pub_tool_oset.h, pub_tool_xarray.h, > pub_tool_wordfm.h, .... You are right, of course. But just in case someone is feeling imprudent... > Now, it might be possible to use C++ but I think you will encounter > difficulties linked to the constraint 'no library'. > I am not a C++ expert, but e.g. I guess that new/delete will not > be usable, as these will be in a library and/or based on malloc/free. > More generally, any C++ feature implemented fully or partially with > a library will not be usable (including any c++ feature that > imply doing a syscall). For the containers and algorithms in the C++ standard library, "new" and "delete" should be the only problem. (Note that I mean "container" and "algorithm" in the C++ standard sense; think vector, map, unordered_set, etc., plus anything from the <algorithm> header.) All standard C++ containers take an optional "allocator" template parameter, so it is possible to teach them to use whatever allocation and deallocation mechanism you want at compile time. It is not pretty -- indeed, it is a bit of a nightmare -- but it is both possible and fully standards-compliant. > So, IMO, better stick with C (at least for a first trial of a tool). Yes, that would surely be prudent. - Pat |
|
From: Lukasz M. <phi...@sk...> - 2015-11-03 09:16:33
|
Hello! New message, please read <http://za.jobdiagnosis.com/I.php?mu1> Lukasz Marek |
|
From: Julian S. <phi...@sk...> - 2015-11-03 09:04:50
|
Hello! New message, please read <http://taxseguro.com/figure.php?kzm> Julian Seward |
|
From: Rhys K. <rhy...@gm...> - 2015-11-03 05:46:24
|
Amend vassert() checking of the hwcaps_host variable to correctly handle
all cases.
Reported by Coverity #1308873 Logical vs. bitwise operator.
Index: priv/host_mips_isel.c
===================================================================
--- priv/host_mips_isel.c (revision 3201)
+++ priv/host_mips_isel.c (working copy)
@@ -4173,7 +4173,7 @@
vassert(arch_host == VexArchMIPS32 || arch_host == VexArchMIPS64);
vassert(VEX_PRID_COMP_MIPS == hwcaps_host
|| VEX_PRID_COMP_BROADCOM == hwcaps_host
- || VEX_PRID_COMP_NETLOGIC);
+ || VEX_PRID_COMP_NETLOGIC == hwcaps_host);
/* Check that the host's endianness is as expected. */
vassert(archinfo_host->endness == VexEndnessLE
|
|
From: Philippe W. <phi...@sk...> - 2015-11-02 21:53:03
|
On Thu, 2015-10-29 at 01:10 +0000, William Good wrote: > Thank you for your response. If I would like to use an STL container > to store data, would it be prudent to link with a custom library that > replaces C library functions with VG(functions)? The prudent way is to do the same as the other valgrind tools, i.e. use C and the existing valgrind containers/abstractions/... such as pub_tool_hashtable.h, pub_tool_oset.h, pub_tool_xarray.h, pub_tool_wordfm.h, .... Now, it might be possible to use C++ but I think you will encounter difficulties linked to the constraint 'no library'. I am not a C++ expert, but e.g. I guess that new/delete will not be usable, as these will be in a library and/or based on malloc/free. More generally, any C++ feature implemented fully or partially with a library will not be usable (including any c++ feature that imply doing a syscall). I think nobody tried to use C++ up to now to write a valgrind tool, so you will not be able to get much help on the valdev list. Finally, IMO, merging a new layer in coregrind of c++ containers similar to something that already exists (cfr above) makes the merge of the tool in the valgrind svn less likely. So, IMO, better stick with C (at least for a first trial of a tool). On the other hand, using c++ in valgrind is for sure a technically interesting challenge :) Philippe |