You can subscribe to this list here.
| 2002 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
(1) |
Oct
(122) |
Nov
(152) |
Dec
(69) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2003 |
Jan
(6) |
Feb
(25) |
Mar
(73) |
Apr
(82) |
May
(24) |
Jun
(25) |
Jul
(10) |
Aug
(11) |
Sep
(10) |
Oct
(54) |
Nov
(203) |
Dec
(182) |
| 2004 |
Jan
(307) |
Feb
(305) |
Mar
(430) |
Apr
(312) |
May
(187) |
Jun
(342) |
Jul
(487) |
Aug
(637) |
Sep
(336) |
Oct
(373) |
Nov
(441) |
Dec
(210) |
| 2005 |
Jan
(385) |
Feb
(480) |
Mar
(636) |
Apr
(544) |
May
(679) |
Jun
(625) |
Jul
(810) |
Aug
(838) |
Sep
(634) |
Oct
(521) |
Nov
(965) |
Dec
(543) |
| 2006 |
Jan
(494) |
Feb
(431) |
Mar
(546) |
Apr
(411) |
May
(406) |
Jun
(322) |
Jul
(256) |
Aug
(401) |
Sep
(345) |
Oct
(542) |
Nov
(308) |
Dec
(481) |
| 2007 |
Jan
(427) |
Feb
(326) |
Mar
(367) |
Apr
(255) |
May
(244) |
Jun
(204) |
Jul
(223) |
Aug
(231) |
Sep
(354) |
Oct
(374) |
Nov
(497) |
Dec
(362) |
| 2008 |
Jan
(322) |
Feb
(482) |
Mar
(658) |
Apr
(422) |
May
(476) |
Jun
(396) |
Jul
(455) |
Aug
(267) |
Sep
(280) |
Oct
(253) |
Nov
(232) |
Dec
(304) |
| 2009 |
Jan
(486) |
Feb
(470) |
Mar
(458) |
Apr
(423) |
May
(696) |
Jun
(461) |
Jul
(551) |
Aug
(575) |
Sep
(134) |
Oct
(110) |
Nov
(157) |
Dec
(102) |
| 2010 |
Jan
(226) |
Feb
(86) |
Mar
(147) |
Apr
(117) |
May
(107) |
Jun
(203) |
Jul
(193) |
Aug
(238) |
Sep
(300) |
Oct
(246) |
Nov
(23) |
Dec
(75) |
| 2011 |
Jan
(133) |
Feb
(195) |
Mar
(315) |
Apr
(200) |
May
(267) |
Jun
(293) |
Jul
(353) |
Aug
(237) |
Sep
(278) |
Oct
(611) |
Nov
(274) |
Dec
(260) |
| 2012 |
Jan
(303) |
Feb
(391) |
Mar
(417) |
Apr
(441) |
May
(488) |
Jun
(655) |
Jul
(590) |
Aug
(610) |
Sep
(526) |
Oct
(478) |
Nov
(359) |
Dec
(372) |
| 2013 |
Jan
(467) |
Feb
(226) |
Mar
(391) |
Apr
(281) |
May
(299) |
Jun
(252) |
Jul
(311) |
Aug
(352) |
Sep
(481) |
Oct
(571) |
Nov
(222) |
Dec
(231) |
| 2014 |
Jan
(185) |
Feb
(329) |
Mar
(245) |
Apr
(238) |
May
(281) |
Jun
(399) |
Jul
(382) |
Aug
(500) |
Sep
(579) |
Oct
(435) |
Nov
(487) |
Dec
(256) |
| 2015 |
Jan
(338) |
Feb
(357) |
Mar
(330) |
Apr
(294) |
May
(191) |
Jun
(108) |
Jul
(142) |
Aug
(261) |
Sep
(190) |
Oct
(54) |
Nov
(83) |
Dec
(22) |
| 2016 |
Jan
(49) |
Feb
(89) |
Mar
(33) |
Apr
(50) |
May
(27) |
Jun
(34) |
Jul
(53) |
Aug
(53) |
Sep
(98) |
Oct
(206) |
Nov
(93) |
Dec
(53) |
| 2017 |
Jan
(65) |
Feb
(82) |
Mar
(102) |
Apr
(86) |
May
(187) |
Jun
(67) |
Jul
(23) |
Aug
(93) |
Sep
(65) |
Oct
(45) |
Nov
(35) |
Dec
(17) |
| 2018 |
Jan
(26) |
Feb
(35) |
Mar
(38) |
Apr
(32) |
May
(8) |
Jun
(43) |
Jul
(27) |
Aug
(30) |
Sep
(43) |
Oct
(42) |
Nov
(38) |
Dec
(67) |
| 2019 |
Jan
(32) |
Feb
(37) |
Mar
(53) |
Apr
(64) |
May
(49) |
Jun
(18) |
Jul
(14) |
Aug
(53) |
Sep
(25) |
Oct
(30) |
Nov
(49) |
Dec
(31) |
| 2020 |
Jan
(87) |
Feb
(45) |
Mar
(37) |
Apr
(51) |
May
(99) |
Jun
(36) |
Jul
(11) |
Aug
(14) |
Sep
(20) |
Oct
(24) |
Nov
(40) |
Dec
(23) |
| 2021 |
Jan
(14) |
Feb
(53) |
Mar
(85) |
Apr
(15) |
May
(19) |
Jun
(3) |
Jul
(14) |
Aug
(1) |
Sep
(57) |
Oct
(73) |
Nov
(56) |
Dec
(22) |
| 2022 |
Jan
(3) |
Feb
(22) |
Mar
(6) |
Apr
(55) |
May
(46) |
Jun
(39) |
Jul
(15) |
Aug
(9) |
Sep
(11) |
Oct
(34) |
Nov
(20) |
Dec
(36) |
| 2023 |
Jan
(79) |
Feb
(41) |
Mar
(99) |
Apr
(169) |
May
(48) |
Jun
(16) |
Jul
(16) |
Aug
(57) |
Sep
(19) |
Oct
|
Nov
|
Dec
|
| S | M | T | W | T | F | S |
|---|---|---|---|---|---|---|
|
|
|
1
(7) |
2
(5) |
3
(2) |
4
(8) |
5
(10) |
|
6
(3) |
7
(9) |
8
(7) |
9
(8) |
10
(7) |
11
(4) |
12
(11) |
|
13
(5) |
14
(17) |
15
(6) |
16
(15) |
17
|
18
(3) |
19
(1) |
|
20
(6) |
21
(18) |
22
(5) |
23
(9) |
24
(6) |
25
(3) |
26
(1) |
|
27
(1) |
28
|
29
(8) |
30
(5) |
|
|
|
|
From: Petar J. <mip...@gm...> - 2015-09-16 23:43:09
|
The 3.11.0 tarball has been tested on mips32/mips64 LE/BE, and the results are fine (i.e. just a several known failures for each of these). Regards, Petar On Thu, Sep 10, 2015 at 8:20 PM, Julian Seward <js...@ac...> wrote: > > On 07/09/15 15:44, Julian Seward wrote: > > If the branch seems stable then I propose to let the branch stabilise > > until Mon 21 Sept and release at that point. > > A test tarball is available at > http://valgrind.org/downloads/valgrind-3.11.0.TEST1.tar.bz2 > (md5 = 6a858b4a1e98db8c82bc6bc9c760873b) > > Please test it on systems that are important for you and report any > failures > (and successes!). > > I've tested it, to varying extents, on: > > amd64-linux, Fedora 21 and 22 > ppc64-linux (big endian) > arm32-linux > arm64-linux > OSX 10.10 (32 and 64 bit) > mips64-linux > > J > > > > ------------------------------------------------------------------------------ > Monitor Your Dynamic Infrastructure at Any Scale With Datadog! > Get real-time metrics from all of your servers, apps and tools > in one place. > SourceForge users - Click here to start your Free Trial of Datadog now! > http://pubads.g.doubleclick.net/gampad/clk?id=241902991&iu=/4140 > _______________________________________________ > Valgrind-developers mailing list > Val...@li... > https://lists.sourceforge.net/lists/listinfo/valgrind-developers > |
|
From: <sv...@va...> - 2015-09-16 23:33:47
|
Author: carll
Date: Thu Sep 17 00:33:40 2015
New Revision: 15653
Log:
Add Power PC ISA check to the vbit-test
The support for the Valgrind Iops is dependent on the Power processor
support for various instructions. The instructions supported by a
given Power processor is based on the version of the ISA. The patch
add a check to the vbit-test to ensure it does not try to test an Iop
that generates an instruction on the host that is not supported.
This patch fixes bugzilla 352765.
Added:
trunk/tests/min_power_isa.c
Modified:
trunk/memcheck/tests/vbit-test/irops.c
trunk/tests/Makefile.am
Modified: trunk/memcheck/tests/vbit-test/irops.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/irops.c (original)
+++ trunk/memcheck/tests/vbit-test/irops.c Thu Sep 17 00:33:40 2015
@@ -1143,6 +1143,38 @@
return p->amd64 ? p : NULL;
#endif
#ifdef __powerpc__
+#define MIN_POWER_ISA "../../../tests/min_power_isa"
+
+ switch (op) {
+ case Iop_DivS64E:
+ case Iop_DivU64E:
+ case Iop_DivU32E:
+ case Iop_DivS32E:
+ case Iop_F64toI64U:
+ case Iop_F64toI32U:
+ case Iop_I64UtoF64:
+ case Iop_I64UtoF32:
+ case Iop_I64StoD64: {
+ int rc;
+ /* IROps require a processor that supports ISA 2.06 or newer */
+ rc = system(MIN_POWER_ISA " 2.06 ");
+ rc /= 256;
+ /* MIN_POWER_ISA returns 0 if underlying HW supports the
+ * specified ISA or newer. Returns 1 if the HW does not support
+ * the specified ISA. Returns 2 on error.
+ */
+ if (rc == 1) return NULL;
+ if (rc > 2) {
+ panic(" ERROR, min_power_isa() return code is invalid.\n");
+ }
+ }
+ break;
+
+ /* Other */
+ default:
+ break;
+ }
+
#ifdef __powerpc64__
return p->ppc64 ? p : NULL;
#else
Modified: trunk/tests/Makefile.am
==============================================================================
--- trunk/tests/Makefile.am (original)
+++ trunk/tests/Makefile.am Thu Sep 17 00:33:40 2015
@@ -1,6 +1,26 @@
include $(top_srcdir)/Makefile.tool-tests.am
+if HAS_ISA_2_05
+ISA_2_05_FLAG = -DHAS_ISA_2_05
+else
+ISA_2_05_FLAG =
+endif
+
+if HAS_ISA_2_06
+ISA_2_06_FLAG = -DHAS_ISA_2_06
+else
+ISA_2_06_FLAG =
+endif
+
+if HAS_ISA_2_07
+ISA_2_07_FLAG = -DHAS_ISA_2_07
+else
+ISA_2_07_FLAG =
+endif
+
+min_power_isa_FLAGS = $(ISA_2_05_FLAG) $(ISA_2_06_FLAG) $(ISA_2_07_FLAG)
+
dist_noinst_SCRIPTS = \
check_headers_and_includes \
check_makefile_consistency \
@@ -29,7 +49,8 @@
s390x_features \
mips_features \
power_insn_available \
- is_ppc64_BE
+ is_ppc64_BE \
+ min_power_isa
AM_CFLAGS += $(AM_FLAG_M3264_PRI)
AM_CXXFLAGS += $(AM_FLAG_M3264_PRI)
@@ -40,3 +61,4 @@
x86_amd64_features_CFLAGS = $(AM_CFLAGS)
endif
+min_power_isa_CFLAGS = $(min_power_isa_FLAGS)
Added: trunk/tests/min_power_isa.c
==============================================================================
--- trunk/tests/min_power_isa.c (added)
+++ trunk/tests/min_power_isa.c Thu Sep 17 00:33:40 2015
@@ -0,0 +1,65 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+/* main() */
+int main(int argc, char **argv)
+{
+ /* This program is passed in a minimum ISA that the underlying hardwre
+ * needs to support. If the HW supports this ISA or newer, return 0
+ * for supported. Otherwise, return 1 for not supported. Return 2 for
+ * usage error.
+ *
+ * First argument is required, it must be an ISA version number.
+ * Second argument "-debug" is optional. If passed, then the defined ISA
+ * values are printed.
+ */
+ char *min_isa;
+ int isa_level = 0;
+ int debug = 0;
+
+ /* set the isa_level set by the Make */
+
+ if ((argc == 3) && (strcmp(argv[2], "-debug") == 0)) {
+ debug = 1;
+
+ } else if (argc != 2) {
+ fprintf(stderr, "usage: min_power_ISA <ISA> [-debug]\n" );
+ exit(2);
+ }
+
+ min_isa = argv[1];
+
+#ifdef HAS_ISA_2_05
+ if (debug) printf("HAS_ISA_2_05 is set\n");
+ isa_level = 5;
+#endif
+
+#ifdef HAS_ISA_2_06
+ if (debug) printf("HAS_ISA_2_06 is set\n");
+ isa_level = 6;
+#endif
+
+#ifdef HAS_ISA_2_07
+ if (debug) printf("HAS_ISA_2_07 is set\n");
+ isa_level = 7;
+#endif
+
+ /* return 0 for supported (success), 1 for not supported (failure) */
+ if (strcmp (min_isa, "2.05") == 0) {
+ return !(isa_level >= 5);
+
+ } else if (strcmp (min_isa, "2.06") == 0) {
+ return !(isa_level >= 6);
+
+ } else if (strcmp (min_isa, "2.07") == 0) {
+ return !(isa_level >= 7);
+
+ } else {
+ fprintf(stderr, "ERROR: invalid ISA version. Valid versions numbers are:\n" );
+ fprintf(stderr, " 2.05, 2.06, 2.07\n" );
+ exit(2);
+ }
+
+ return 1;
+}
|
|
From: <sv...@va...> - 2015-09-16 23:01:12
|
Author: carll
Date: Thu Sep 17 00:01:04 2015
New Revision: 3190
Log:
Add support for the Power PC mbar instruction.
This patch fixes bugzilla 352768.
Modified:
trunk/priv/guest_ppc_toIR.c
Modified: trunk/priv/guest_ppc_toIR.c
==============================================================================
--- trunk/priv/guest_ppc_toIR.c (original)
+++ trunk/priv/guest_ppc_toIR.c Thu Sep 17 00:01:04 2015
@@ -6369,6 +6369,7 @@
UInt b11to25 = IFIELD(theInstr, 11, 15);
UChar flag_L = ifieldRegDS(theInstr);
UInt b11to20 = IFIELD(theInstr, 11, 10);
+ UInt M0 = IFIELD(theInstr, 11, 5);
UChar rD_addr = ifieldRegDS(theInstr);
UChar rS_addr = rD_addr;
UChar rA_addr = ifieldRegA(theInstr);
@@ -6399,12 +6400,20 @@
/* X-Form */
case 0x1F:
switch (opc2) {
- case 0x356: // eieio (Enforce In-Order Exec of I/O, PPC32 p394)
- if (b11to25 != 0 || b0 != 0) {
- vex_printf("dis_memsync(ppc)(eiei0,b11to25|b0)\n");
- return False;
+ case 0x356: // eieio or mbar (Enforce In-Order Exec of I/O, PPC32 p394)
+ if (M0 == 0) {
+ if (b11to20 != 0 || b0 != 0) {
+ vex_printf("dis_memsync(ppc)(eieio,b11to20|b0)\n");
+ return False;
+ }
+ DIP("eieio\n");
+ } else {
+ if (b11to20 != 0 || b0 != 0) {
+ vex_printf("dis_memsync(ppc)(mbar,b11to20|b0)\n");
+ return False;
+ }
+ DIP("mbar %d\n", M0);
}
- DIP("eieio\n");
/* Insert a memory fence, just to be on the safe side. */
stmt( IRStmt_MBE(Imbe_Fence) );
break;
|
|
From: <sv...@va...> - 2015-09-16 22:27:07
|
Author: carll
Date: Wed Sep 16 23:26:59 2015
New Revision: 3189
Log:
Add support for the Power PC Program Priority Register
Added the Program Priority Register (PPR), support to read and write it
via the mfspr and mtspr instructions as well as the special OR instruction
No Op instructions. The setting of the PPR is dependent on the value in
the Problem State Priority Boost register. Basic support for this register
was added. Not all of the PSPB register functionality was added.
This patch fixes bugzilla 352769.
Modified:
trunk/priv/guest_ppc_helpers.c
trunk/priv/guest_ppc_toIR.c
trunk/pub/libvex_guest_ppc32.h
trunk/pub/libvex_guest_ppc64.h
Modified: trunk/priv/guest_ppc_helpers.c
==============================================================================
--- trunk/priv/guest_ppc_helpers.c (original)
+++ trunk/priv/guest_ppc_helpers.c Wed Sep 16 23:26:59 2015
@@ -521,6 +521,8 @@
vex_state->guest_IP_AT_SYSCALL = 0;
vex_state->guest_SPRG3_RO = 0;
+ vex_state->guest_PPR = 0x4ULL << 50; // medium priority
+ vex_state->guest_PSPB = 0x100; // an arbitrary non-zero value to start with
vex_state->padding1 = 0;
vex_state->padding2 = 0;
@@ -691,6 +693,8 @@
vex_state->guest_TFHAR = 0;
vex_state->guest_TFIAR = 0;
vex_state->guest_TEXASR = 0;
+ vex_state->guest_PPR = 0x4ULL << 50; // medium priority
+ vex_state->guest_PSPB = 0x00; // an arbitrary non-zero value to start with
}
Modified: trunk/priv/guest_ppc_toIR.c
==============================================================================
--- trunk/priv/guest_ppc_toIR.c (original)
+++ trunk/priv/guest_ppc_toIR.c Wed Sep 16 23:26:59 2015
@@ -288,6 +288,8 @@
#define OFFB_TEXASR offsetofPPCGuestState(guest_TEXASR)
#define OFFB_TEXASRU offsetofPPCGuestState(guest_TEXASRU)
#define OFFB_TFIAR offsetofPPCGuestState(guest_TFIAR)
+#define OFFB_PPR offsetofPPCGuestState(guest_PPR)
+#define OFFB_PSPB offsetofPPCGuestState(guest_PSPB)
/*------------------------------------------------------------*/
@@ -438,6 +440,14 @@
PPC_GST_TFIAR, // Transactional Failure Instruction Address Register
PPC_GST_TEXASR, // Transactional EXception And Summary Register
PPC_GST_TEXASRU, // Transactional EXception And Summary Register Upper
+ PPC_GST_PPR, // Program Priority register
+ PPC_GST_PPR32, // Upper 32-bits of Program Priority register
+ PPC_GST_PSPB, /* Problem State Priority Boost register, Note, the
+ * register is initialized to a non-zero value. Currently
+ * Valgrind is not supporting the register value to
+ * automatically decrement. Could be added later if
+ * needed.
+ */
PPC_GST_MAX
} PPC_GST;
@@ -2747,6 +2757,15 @@
case PPC_GST_TFIAR:
return IRExpr_Get( OFFB_TFIAR, ty );
+ case PPC_GST_PPR:
+ return IRExpr_Get( OFFB_PPR, ty );
+
+ case PPC_GST_PPR32:
+ return unop( Iop_64HIto32, IRExpr_Get( OFFB_PPR, ty ) );
+
+ case PPC_GST_PSPB:
+ return IRExpr_Get( OFFB_PSPB, ty );
+
default:
vex_printf("getGST(ppc): reg = %u", reg);
vpanic("getGST(ppc)");
@@ -2926,6 +2945,95 @@
vassert( ty_src == Ity_I64 );
stmt( IRStmt_Put( OFFB_TFHAR, src ) );
break;
+
+ case PPC_GST_PPR32:
+ case PPC_GST_PPR:
+ {
+ /* The Program Priority Register (PPR) stores the priority in
+ * bits [52:50]. The user setable priorities are:
+ *
+ * 001 very low
+ * 010 low
+ * 011 medium low
+ * 100 medium
+ * 101 medium high
+ *
+ * If the argument is not between 0b001 and 0b100 the priority is set
+ * to 0b100. The priority can only be set to 0b101 if the the Problem
+ * State Boost Register is non-zero. The value of the PPR is not
+ * changed if the input is not valid.
+ */
+
+ IRTemp not_valid = newTemp(Ity_I64);
+ IRTemp has_perm = newTemp(Ity_I64);
+ IRTemp new_src = newTemp(Ity_I64);
+ IRTemp PSPB_val = newTemp(Ity_I64);
+ IRTemp value = newTemp(Ity_I64);
+
+ vassert(( ty_src == Ity_I64 ) || ( ty_src == Ity_I32 ));
+ assign( PSPB_val, binop( Iop_32HLto64,
+ mkU32( 0 ),
+ IRExpr_Get( OFFB_PSPB, Ity_I32 ) ) );
+ if( reg == PPC_GST_PPR32 ) {
+ vassert( ty_src == Ity_I32 );
+ assign( value, binop( Iop_32HLto64,
+ mkU32(0),
+ binop( Iop_And32,
+ binop( Iop_Shr32, src, mkU8( 18 ) ),
+ mkU32( 0x7 ) ) ) );
+ } else {
+ vassert( ty_src == Ity_I64 );
+ assign( value, binop( Iop_And64,
+ binop( Iop_Shr64, src, mkU8( 50 ) ),
+ mkU64( 0x7 ) ) );
+ }
+ assign( has_perm,
+ binop( Iop_And64,
+ unop( Iop_1Sto64,
+ binop( Iop_CmpEQ64,
+ mkexpr( PSPB_val ),
+ mkU64( 0 ) ) ),
+ unop( Iop_1Sto64,
+ binop( Iop_CmpEQ64,
+ mkU64( 0x5 ),
+ mkexpr( value ) ) ) ) );
+ assign( not_valid,
+ binop( Iop_Or64,
+ unop( Iop_1Sto64,
+ binop( Iop_CmpEQ64,
+ mkexpr( value ),
+ mkU64( 0 ) ) ),
+ unop( Iop_1Sto64,
+ binop( Iop_CmpLT64U,
+ mkU64( 0x5 ),
+ mkexpr( value ) ) ) ) );
+ assign( new_src,
+ binop( Iop_Or64,
+ binop( Iop_And64,
+ unop( Iop_Not64,
+ mkexpr( not_valid ) ),
+ src ),
+ binop( Iop_And64,
+ mkexpr( not_valid ),
+ binop( Iop_Or64,
+ binop( Iop_And64,
+ mkexpr( has_perm),
+ binop( Iop_Shl64,
+ mkexpr( value ),
+ mkU8( 50 ) ) ),
+ binop( Iop_And64,
+ IRExpr_Get( OFFB_PPR, ty ),
+ unop( Iop_Not64,
+ mkexpr( has_perm )
+ ) ) ) ) ) );
+
+ /* make sure we only set the valid bit field [52:50] */
+ stmt( IRStmt_Put( OFFB_PPR,
+ binop( Iop_And64,
+ mkexpr( new_src ),
+ mkU64( 0x1C000000000000) ) ) );
+ break;
+ }
default:
vex_printf("putGST(ppc): reg = %u", reg);
vpanic("putGST(ppc)");
@@ -7131,6 +7239,18 @@
DIP("mfspr r%u (TEXASRU)\n", rD_addr);
putIReg( rD_addr, getGST( PPC_GST_TEXASRU) );
break;
+ case 0x9F: // 159
+ DIP("mfspr r%u (PSPB)\n", rD_addr);
+ putIReg( rD_addr, getGST( PPC_GST_PSPB) );
+ break;
+ case 0x380: // 896
+ DIP("mfspr r%u (PPR)\n", rD_addr);
+ putIReg( rD_addr, getGST( PPC_GST_PPR) );
+ break;
+ case 0x382: // 898
+ DIP("mfspr r%u (PPR)32\n", rD_addr);
+ putIReg( rD_addr, getGST( PPC_GST_PPR32) );
+ break;
case 0x100:
DIP("mfvrsave r%u\n", rD_addr);
putIReg( rD_addr, mkWidenFrom32(ty, getGST( PPC_GST_VRSAVE ),
@@ -7287,6 +7407,18 @@
DIP("mtspr r%u (TEXASR)\n", rS_addr);
putGST( PPC_GST_TEXASR, mkexpr(rS) );
break;
+ case 0x9F: // 159
+ DIP("mtspr r%u (PSPB)\n", rS_addr);
+ putGST( PPC_GST_PSPB, mkexpr(rS) );
+ break;
+ case 0x380: // 896
+ DIP("mtspr r%u (PPR)\n", rS_addr);
+ putGST( PPC_GST_PPR, mkexpr(rS) );
+ break;
+ case 0x382: // 898
+ DIP("mtspr r%u (PPR32)\n", rS_addr);
+ putGST( PPC_GST_PPR32, mkexpr(rS) );
+ break;
default:
vex_printf("dis_proc_ctl(ppc)(mtspr,SPR)(%u)\n", SPR);
return False;
Modified: trunk/pub/libvex_guest_ppc32.h
==============================================================================
--- trunk/pub/libvex_guest_ppc32.h (original)
+++ trunk/pub/libvex_guest_ppc32.h Wed Sep 16 23:26:59 2015
@@ -241,11 +241,12 @@
/* 1360 */ ULong guest_TFHAR; // Transaction Failure Handler Address Register
/* 1368 */ ULong guest_TEXASR; // Transaction EXception And Summary Register
/* 1376 */ ULong guest_TFIAR; // Transaction Failure Instruction Address Register
- /* 1384 */ UInt guest_TEXASRU; // Transaction EXception And Summary Register Upper
-
+ /* 1384 */ ULong guest_PPR; // Program Priority register
+ /* 1392 */ UInt guest_TEXASRU; // Transaction EXception And Summary Register Upper
+ /* 1396 */ UInt guest_PSPB; // Problem State Priority Boost register
/* Padding to make it have an 16-aligned size */
- /* 1388 */ UInt padding2;
-
+ /* 1400 */ UInt padding2;
+ /* 1404 */ UInt padding3;
}
VexGuestPPC32State;
Modified: trunk/pub/libvex_guest_ppc64.h
==============================================================================
--- trunk/pub/libvex_guest_ppc64.h (original)
+++ trunk/pub/libvex_guest_ppc64.h Wed Sep 16 23:26:59 2015
@@ -282,12 +282,14 @@
/* 1656 */ ULong guest_TFHAR; // Transaction Failure Handler Address Register
/* 1664 */ ULong guest_TEXASR; // Transaction EXception And Summary Register
/* 1672 */ ULong guest_TFIAR; // Transaction Failure Instruction Address Register
- /* 1680 */ UInt guest_TEXASRU; // Transaction EXception And Summary Register Upper
+ /* 1680 */ ULong guest_PPR; // Program Priority register
+ /* 1688 */ UInt guest_TEXASRU; // Transaction EXception And Summary Register Upper
+ /* 1692 */ UInt guest_PSPB; // Problem State Priority Boost register
/* Padding to make it have an 16-aligned size */
- /* 1684 */ UInt padding1;
- /* 1688 */ UInt padding2;
- /* 1692 */ UInt padding3;
+ /* 1696 UInt padding1; currently not needed */
+ /* 1700 UInt padding2; currently not needed */
+ /* 1708 UInt padding3; currently not needed */
}
VexGuestPPC64State;
|
|
From: Philippe W. <phi...@sk...> - 2015-09-16 21:39:48
|
On Tue, 2015-09-15 at 23:23 -0400, Yue Chen wrote:
> Under x86_64 Linux, I change
> VG_(printf)("I %08lx,%lu\n", addr, size);
> to
> VG_(printf)("I %16lx,%lu\n", addr, size);
This is not needed. If the address would exceed 8 digits,
%08lx will in any case print all the digits.
> in lackey, but the result seems not correct too.
> The output is something like
> I 4ca3292,2
> But the real code address is around 400xxx (6 digits, not 7), which
> differs from the lackey output.
I do not know. I have checked on linux, where there is a correct
matching between what lackey reports, and e.g. what gdb disass tells.
What I suggest is:
1. try the same on a linux box, to exclude any misunderstanding
or manipulation error.
2. if valgrind on freeBSD has a working gdbserver, you might
run your program under lackey, activating gdbserver.
Then put a breakpoint at a certain address,
Run, and double check which address lackey has just reported
(which should be the address just before your breakpoint).
Philippe
|
|
From: Carl E. L. <ce...@us...> - 2015-09-16 20:22:02
|
On Wed, 2015-09-16 at 21:48 +0200, Matthias Schwarzott wrote:
> > + case Iop_I64StoD64: {
> > + int rc;
> > + /* IROps require a processor that supports ISA 2.06 or
> newer */
> > + rc = system(MIN_POWER_ISA " 2.06 ");
> > + rc /= 256;
>
> I have an additional finding: Is dividing here really correct?
Matthias:
Actually yes. The system call return value consists of the return
value, the signal that ended the process and if a core dump was saved.
rc[6:0] is the signal id
rc[7] indicates if a core dump was saved
rc[31:8] return value.
That is my understanding of the bit fields. I did check that an exit
value of 1 from the program resulted in rc being set to 256.
Carl Love
|
|
From: Matthias S. <zz...@ge...> - 2015-09-16 19:48:34
|
Am 16.09.2015 um 21:35 schrieb Carl E. Love:
>
> diff --git a/memcheck/tests/vbit-test/irops.c b/memcheck/tests/vbit-test/irops.c
> index d0e3b58..9e9f017 100644
> --- a/memcheck/tests/vbit-test/irops.c
> +++ b/memcheck/tests/vbit-test/irops.c
> @@ -1143,6 +1143,38 @@ get_irop(IROp op)
> return p->amd64 ? p : NULL;
> #endif
> #ifdef __powerpc__
> +#define MIN_POWER_ISA "../../../tests/min_power_isa"
> +
> + switch (op) {
> + case Iop_DivS64E:
> + case Iop_DivU64E:
> + case Iop_DivU32E:
> + case Iop_DivS32E:
> + case Iop_F64toI64U:
> + case Iop_F64toI32U:
> + case Iop_I64UtoF64:
> + case Iop_I64UtoF32:
> + case Iop_I64StoD64: {
> + int rc;
> + /* IROps require a processor that supports ISA 2.06 or newer */
> + rc = system(MIN_POWER_ISA " 2.06 ");
> + rc /= 256;
I have an additional finding: Is dividing here really correct?
> + /* MIN_POWER_ISA returns 0 if underlying HW supports the
> + * specified ISA or newer. Returns 1 if the HW does not support
> + * the specified ISA. Returns 2 on error.
> + */
> + if (rc == 1) return NULL;
> + if (rc > 2) {
> + panic(" ERROR, min_power_isa() return code is invalid.\n");
> + }
> + }
> + break;
> +
> + /* Other */
> + default:
> + break;
> + }
> +
> #ifdef __powerpc64__
> return p->ppc64 ? p : NULL;
> #else
|
|
From: Carl E. L. <ce...@us...> - 2015-09-16 19:35:24
|
> I cannot check all this, but just from looking at the code, the
> exit-code of min_power_isa is not respecting the normal conventions.
> Normally a success-value is represented by an exit-code of 0.
>
> Then min_power_isa could then be used with normal shell-logic, e.g. as
> precondition for vgtest etc. or in command-lines like this:
>
> # min_power_isa 2.06 && echo "isa 2.06 is supported"
OK, I reversed the return values and corresponding comments to match to
match the shell-logic.
> The exit(1) isn't needed. The panic function already does that.
Removed the exit.
> stdbool.h isn't needed. But you need to include <string.h> for strcmp.
Changed.
I retested to make sure it all still works. Here is the updated patch.
Please let me know if I missed anything especially in the comments.
Carl Love
-------------------------------------------------------------------------------
Add Power PC ISA check to the vbit-test
The support for the Valgrind Iops is dependent on the Power processor
support for various instructions. The instructions supported by a
given Power processor is based on the version of the ISA. The patch
add a check to the vbit-test to ensure it does not try to test an Iop
that generates an instruction on the host that is not supported.
Signed-off-by: Carl Love <ca...@us...>
---
memcheck/tests/vbit-test/irops.c | 32 ++++++++++++++++++++
tests/Makefile.am | 24 ++++++++++++++-
tests/min_power_isa.c | 65 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 120 insertions(+), 1 deletion(-)
create mode 100644 tests/min_power_isa.c
diff --git a/memcheck/tests/vbit-test/irops.c b/memcheck/tests/vbit-test/irops.c
index d0e3b58..9e9f017 100644
--- a/memcheck/tests/vbit-test/irops.c
+++ b/memcheck/tests/vbit-test/irops.c
@@ -1143,6 +1143,38 @@ get_irop(IROp op)
return p->amd64 ? p : NULL;
#endif
#ifdef __powerpc__
+#define MIN_POWER_ISA "../../../tests/min_power_isa"
+
+ switch (op) {
+ case Iop_DivS64E:
+ case Iop_DivU64E:
+ case Iop_DivU32E:
+ case Iop_DivS32E:
+ case Iop_F64toI64U:
+ case Iop_F64toI32U:
+ case Iop_I64UtoF64:
+ case Iop_I64UtoF32:
+ case Iop_I64StoD64: {
+ int rc;
+ /* IROps require a processor that supports ISA 2.06 or newer */
+ rc = system(MIN_POWER_ISA " 2.06 ");
+ rc /= 256;
+ /* MIN_POWER_ISA returns 0 if underlying HW supports the
+ * specified ISA or newer. Returns 1 if the HW does not support
+ * the specified ISA. Returns 2 on error.
+ */
+ if (rc == 1) return NULL;
+ if (rc > 2) {
+ panic(" ERROR, min_power_isa() return code is invalid.\n");
+ }
+ }
+ break;
+
+ /* Other */
+ default:
+ break;
+ }
+
#ifdef __powerpc64__
return p->ppc64 ? p : NULL;
#else
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 708c28e..9c0cc3a 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -1,6 +1,26 @@
include $(top_srcdir)/Makefile.tool-tests.am
+if HAS_ISA_2_05
+ISA_2_05_FLAG = -DHAS_ISA_2_05
+else
+ISA_2_05_FLAG =
+endif
+
+if HAS_ISA_2_06
+ISA_2_06_FLAG = -DHAS_ISA_2_06
+else
+ISA_2_06_FLAG =
+endif
+
+if HAS_ISA_2_07
+ISA_2_07_FLAG = -DHAS_ISA_2_07
+else
+ISA_2_07_FLAG =
+endif
+
+min_power_isa_FLAGS = $(ISA_2_05_FLAG) $(ISA_2_06_FLAG) $(ISA_2_07_FLAG)
+
dist_noinst_SCRIPTS = \
check_headers_and_includes \
check_makefile_consistency \
@@ -29,7 +49,8 @@ check_PROGRAMS = \
s390x_features \
mips_features \
power_insn_available \
- is_ppc64_BE
+ is_ppc64_BE \
+ min_power_isa
AM_CFLAGS += $(AM_FLAG_M3264_PRI)
AM_CXXFLAGS += $(AM_FLAG_M3264_PRI)
@@ -40,3 +61,4 @@ else
x86_amd64_features_CFLAGS = $(AM_CFLAGS)
endif
+min_power_isa_CFLAGS = $(min_power_isa_FLAGS)
diff --git a/tests/min_power_isa.c b/tests/min_power_isa.c
new file mode 100644
index 0000000..73062de
--- /dev/null
+++ b/tests/min_power_isa.c
@@ -0,0 +1,65 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+/* main() */
+int main(int argc, char **argv)
+{
+ /* This program is passed in a minimum ISA that the underlying hardwre
+ * needs to support. If the HW supports this ISA or newer, return 0
+ * for supported. Otherwise, return 1 for not supported. Return 2 for
+ * usage error.
+ *
+ * First argument is required, it must be an ISA version number.
+ * Second argument "-debug" is optional. If passed, then the defined ISA
+ * values are printed.
+ */
+ char *min_isa;
+ int isa_level = 0;
+ int debug = 0;
+
+ /* set the isa_level set by the Make */
+
+ if ((argc == 3) && (strcmp(argv[2], "-debug") == 0)) {
+ debug = 1;
+
+ } else if (argc != 2) {
+ fprintf(stderr, "usage: min_power_ISA <ISA> [-debug]\n" );
+ exit(2);
+ }
+
+ min_isa = argv[1];
+
+#ifdef HAS_ISA_2_05
+ if (debug) printf("HAS_ISA_2_05 is set\n");
+ isa_level = 5;
+#endif
+
+#ifdef HAS_ISA_2_06
+ if (debug) printf("HAS_ISA_2_06 is set\n");
+ isa_level = 6;
+#endif
+
+#ifdef HAS_ISA_2_07
+ if (debug) printf("HAS_ISA_2_07 is set\n");
+ isa_level = 7;
+#endif
+
+ /* return 0 for supported (success), 1 for not supported (failure) */
+ if (strcmp (min_isa, "2.05") == 0) {
+ return !(isa_level >= 5);
+
+ } else if (strcmp (min_isa, "2.06") == 0) {
+ return !(isa_level >= 6);
+
+ } else if (strcmp (min_isa, "2.07") == 0) {
+ return !(isa_level >= 7);
+
+ } else {
+ fprintf(stderr, "ERROR: invalid ISA version. Valid versions numbers are:\n" );
+ fprintf(stderr, " 2.05, 2.06, 2.07\n" );
+ exit(2);
+ }
+
+ return 1;
+}
--
2.1.0
|
|
From: Florian K. <fl...@ei...> - 2015-09-16 18:08:52
|
On 16.09.2015 19:42, Matthias Schwarzott wrote: > I cannot check all this, but just from looking at the code, the > exit-code of min_power_isa is not respecting the normal conventions. > Normally a success-value is represented by an exit-code of 0. > > Then min_power_isa could then be used with normal shell-logic, e.g. as > precondition for vgtest etc. or in command-lines like this: > > # min_power_isa 2.06 && echo "isa 2.06 is supported" > Good point! Florian |
|
From: Florian K. <fl...@ei...> - 2015-09-16 17:44:08
|
Carl,
looks good all in all. 2 comments below:
On 16.09.2015 19:06, Carl E. Love wrote:
> + case Iop_I64UtoF32:
> + case Iop_I64StoD64: {
> + int rc;
> + /* IROps require a processor that supports ISA 2.06 or newer */
> + rc = system(MIN_POWER_ISA " 2.06 ");
> + rc /= 256;
> + /* MIN_POWER_ISA returns 1 if underlying HW supports the
> + * specified ISA or newer.
> + */
> + if (rc == 0) return NULL;
> + if (rc > 2) {
> + panic(" ERROR, min_power_isa() return code is invalid.\n");
> + exit(1);
The exit(1) isn't needed. The panic function already does that.
> +++ b/tests/min_power_isa.c
> @@ -0,0 +1,63 @@
> +#include <stdio.h>
> +#include <stdbool.h>
stdbool.h isn't needed. But you need to include <string.h> for strcmp.
With those changes you can check it in to HEAD. Julian will cherry-pick
changes from HEAD later and merge them to the 3.11 branch.
Florian
|
|
From: Matthias S. <zz...@ge...> - 2015-09-16 17:42:35
|
Am 16.09.2015 um 19:06 schrieb Carl E. Love: > Florian: > > Thanks for the feedback. > >> Hmm... The Makefile defines HAS_ISA_2_05 etc... not HWCAP_HAS_ISA_2_05 > > Yes, that was messed up and not working correctly. I had tested it and > it all seemed to work. Not sure how I missed that. Anyway, I added > some debug capability to min_power_isa.c to make it easier to verify it > is correct. I also added some more error checking on the input. > > I made the other changes you suggested as well. Here is the updated > patch. Let me know if you see anything else. > Hi! I cannot check all this, but just from looking at the code, the exit-code of min_power_isa is not respecting the normal conventions. Normally a success-value is represented by an exit-code of 0. Then min_power_isa could then be used with normal shell-logic, e.g. as precondition for vgtest etc. or in command-lines like this: # min_power_isa 2.06 && echo "isa 2.06 is supported" Regards Matthias |
|
From: Carl E. L. <ce...@us...> - 2015-09-16 17:09:10
|
Florian:
Thanks for the feedback.
> Hmm... The Makefile defines HAS_ISA_2_05 etc... not HWCAP_HAS_ISA_2_05
Yes, that was messed up and not working correctly. I had tested it and
it all seemed to work. Not sure how I missed that. Anyway, I added
some debug capability to min_power_isa.c to make it easier to verify it
is correct. I also added some more error checking on the input.
I made the other changes you suggested as well. Here is the updated
patch. Let me know if you see anything else.
Hopefully Julian will approve to push into the 3.11 release.
Carl Love
--------------------------------------------------------------------------------
Add Power PC ISA check to the vbit-test
The support for the Valgrind Iops is dependent on the Power processor
support for various instructions. The instructions supported by a
given Power processor is based on the version of the ISA. The patch
add a check to the vbit-test to ensure it does not try to test an Iop
that generates an instruction on the host that is not supported.
Signed-off-by: Carl Love <ca...@us...>
---
memcheck/tests/vbit-test/irops.c | 32 ++++++++++++++++++++
tests/Makefile.am | 24 ++++++++++++++-
tests/min_power_isa.c | 63 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 118 insertions(+), 1 deletion(-)
create mode 100644 tests/min_power_isa.c
diff --git a/memcheck/tests/vbit-test/irops.c b/memcheck/tests/vbit-test/irops.c
index d0e3b58..679e73f 100644
--- a/memcheck/tests/vbit-test/irops.c
+++ b/memcheck/tests/vbit-test/irops.c
@@ -1143,6 +1143,38 @@ get_irop(IROp op)
return p->amd64 ? p : NULL;
#endif
#ifdef __powerpc__
+#define MIN_POWER_ISA "../../../tests/min_power_isa"
+
+ switch (op) {
+ case Iop_DivS64E:
+ case Iop_DivU64E:
+ case Iop_DivU32E:
+ case Iop_DivS32E:
+ case Iop_F64toI64U:
+ case Iop_F64toI32U:
+ case Iop_I64UtoF64:
+ case Iop_I64UtoF32:
+ case Iop_I64StoD64: {
+ int rc;
+ /* IROps require a processor that supports ISA 2.06 or newer */
+ rc = system(MIN_POWER_ISA " 2.06 ");
+ rc /= 256;
+ /* MIN_POWER_ISA returns 1 if underlying HW supports the
+ * specified ISA or newer.
+ */
+ if (rc == 0) return NULL;
+ if (rc > 2) {
+ panic(" ERROR, min_power_isa() return code is invalid.\n");
+ exit(1);
+ }
+ }
+ break;
+
+ /* Other */
+ default:
+ break;
+ }
+
#ifdef __powerpc64__
return p->ppc64 ? p : NULL;
#else
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 708c28e..9c0cc3a 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -1,6 +1,26 @@
include $(top_srcdir)/Makefile.tool-tests.am
+if HAS_ISA_2_05
+ISA_2_05_FLAG = -DHAS_ISA_2_05
+else
+ISA_2_05_FLAG =
+endif
+
+if HAS_ISA_2_06
+ISA_2_06_FLAG = -DHAS_ISA_2_06
+else
+ISA_2_06_FLAG =
+endif
+
+if HAS_ISA_2_07
+ISA_2_07_FLAG = -DHAS_ISA_2_07
+else
+ISA_2_07_FLAG =
+endif
+
+min_power_isa_FLAGS = $(ISA_2_05_FLAG) $(ISA_2_06_FLAG) $(ISA_2_07_FLAG)
+
dist_noinst_SCRIPTS = \
check_headers_and_includes \
check_makefile_consistency \
@@ -29,7 +49,8 @@ check_PROGRAMS = \
s390x_features \
mips_features \
power_insn_available \
- is_ppc64_BE
+ is_ppc64_BE \
+ min_power_isa
AM_CFLAGS += $(AM_FLAG_M3264_PRI)
AM_CXXFLAGS += $(AM_FLAG_M3264_PRI)
@@ -40,3 +61,4 @@ else
x86_amd64_features_CFLAGS = $(AM_CFLAGS)
endif
+min_power_isa_CFLAGS = $(min_power_isa_FLAGS)
diff --git a/tests/min_power_isa.c b/tests/min_power_isa.c
new file mode 100644
index 0000000..d31abdd
--- /dev/null
+++ b/tests/min_power_isa.c
@@ -0,0 +1,63 @@
+#include <stdio.h>
+#include <stdbool.h>
+#include <stdlib.h>
+
+/* main() */
+int main(int argc, char **argv)
+{
+ /* This program is passed in a minimum ISA that the underlying hardwre
+ * needs to support. If the HW supports this ISA or newer, return 1
+ * for true. Otherwise, return 0 for false. Return 2 for usage error.
+ *
+ * First argument is required, it must be an ISA version number.
+ * Second argument "-debug" is optional. If passed, then the defined ISA
+ * values are printed.
+ */
+ char *min_isa;
+ int isa_level = 0;
+ int debug = 0;
+
+ /* set the isa_level set by the Make */
+
+ if ((argc == 3) && (strcmp(argv[2], "-debug") == 0)) {
+ debug = 1;
+
+ } else if (argc != 2) {
+ fprintf(stderr, "usage: min_power_ISA <ISA> [-debug]\n" );
+ exit(2);
+ }
+
+ min_isa = argv[1];
+
+#ifdef HAS_ISA_2_05
+ if (debug) printf("HAS_ISA_2_05 is set\n");
+ isa_level = 5;
+#endif
+
+#ifdef HAS_ISA_2_06
+ if (debug) printf("HAS_ISA_2_06 is set\n");
+ isa_level = 6;
+#endif
+
+#ifdef HAS_ISA_2_07
+ if (debug) printf("HAS_ISA_2_07 is set\n");
+ isa_level = 7;
+#endif
+
+ if (strcmp (min_isa, "2.05") == 0) {
+ return (isa_level >= 5);
+
+ } else if (strcmp (min_isa, "2.06") == 0) {
+ return (isa_level >= 6);
+
+ } else if (strcmp (min_isa, "2.07") == 0) {
+ return (isa_level >= 7);
+
+ } else {
+ fprintf(stderr, "ERROR: invalid ISA version. Valid versions numbers are:\n" );
+ fprintf(stderr, " 2.05, 2.06, 2.07\n" );
+ exit(2);
+ }
+
+ return 0;
+}
--
2.1.0
|
|
From: <sv...@va...> - 2015-09-16 08:59:11
|
Author: florian
Date: Wed Sep 16 09:59:03 2015
New Revision: 15652
Log:
Pick up 'egrep' and 'strings' from $PATH instead of using
hardwired absolute path names. People can always arrange $PATH
such that these tools are found.
Fixes BZ #294065. Patch by Austin English <aus...@gm...>
Modified:
trunk/NEWS
trunk/coregrind/m_debuginfo/readpdb.c
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Wed Sep 16 09:59:03 2015
@@ -193,6 +193,7 @@
226609 Crediting upstream authors in man page
231257 Valgrind omits path when executing script from shebang line
254164 OS X task_info: UNKNOWN task message [id 3405, to mach_task_self() [..]
+294065 Improve the pdb file reader by avoiding hardwired absolute pathnames
269360 s390x: Fix addressing mode selection for compare-and-swap
302630 Memcheck: Assertion failed: 'sizeof(UWord) == sizeof(UInt)'
== 326797
Modified: trunk/coregrind/m_debuginfo/readpdb.c
==============================================================================
--- trunk/coregrind/m_debuginfo/readpdb.c (original)
+++ trunk/coregrind/m_debuginfo/readpdb.c Wed Sep 16 09:59:03 2015
@@ -2503,8 +2503,8 @@
sh -c "strings (pename) | egrep '\.pdb$|\.PDB$' > (tmpname)"
*/
const HChar* sh = "/bin/sh";
- const HChar* strings = "/usr/bin/strings";
- const HChar* egrep = "/usr/bin/egrep";
+ const HChar* strings = "strings";
+ const HChar* egrep = "grep -E";
/* (sh) -c "(strings) (pename) | (egrep) 'pdb' > (tmpname) */
Int cmdlen = VG_(strlen)(strings) + VG_(strlen)(pename)
|
|
From: Yue C. <yc...@gm...> - 2015-09-16 03:23:44
|
Under x86_64 Linux, I change
VG_(printf)("I %08lx,%lu\n", addr, size);
to
VG_(printf)("I %16lx,%lu\n", addr, size);
in lackey, but the result seems not correct too.
The output is something like
I 4ca3292,2
But the real code address is around 400xxx (6 digits, not 7), which
differs from
the lackey output.
On Tue, Sep 15, 2015 at 4:25 PM, Philippe Waroquiers <
phi...@sk...> wrote:
> On Tue, 2015-09-15 at 04:19 -0400, Yue Chen wrote:
> > Hi,
> >
> >
> > Due to instrumentation, when doing memory tracing using tool lackey
> > (``--tool=lackey --trace-mem=yes''), the recorded instruction
> > addresses seem different from the original program's (e.g., ``I
> > 04002166, 2''), and only have a 32-bit format output.
> >
> >
> > Is there any way that I can translate this address to the original
> > one?
> >
> >
> > My environment is x86-64 FreeBSD 10.1.
> FreeBSD port is not part of the valgrind (IMO, would be good
> to merge the port).
>
> Apart of that, checking on a 32 bits and 64 bits linux, lackey properly
> shows the address of the instructions being executed.
>
> This is the way I tested:
> gdb ./memcheck/tests/trivialleak
> (gdb) disass main
> //// select one or 2 relevant instructions
>
> Then run lackey, and see that these instructions were properly
> reported, with their length.
> The fact that they look only 32 bits (even on a 64 bits) is that lackey
> is printing the addresses with code such as:
> VG_(printf)("I %08lx,%lu\n", addr, size);
> but that will properly print the correct values if addresses are > 4GB.
>
> So, if really the addresses reported by lackey do not match your
> executable, maybe there is something strange on FreeBSD port ?
>
> Philippe
>
>
>
>
|