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From: <sv...@va...> - 2015-09-21 09:54:23
|
Author: sewardj
Date: Mon Sep 21 10:54:17 2015
New Revision: 15663
Log:
Merge, from trunk, r15654 (Filter out glibc warning messages about unexpected futex results in tests.)
Modified:
branches/VALGRIND_3_11_BRANCH/ (props changed)
branches/VALGRIND_3_11_BRANCH/tests/filter_libc
Modified: branches/VALGRIND_3_11_BRANCH/tests/filter_libc
==============================================================================
--- branches/VALGRIND_3_11_BRANCH/tests/filter_libc (original)
+++ branches/VALGRIND_3_11_BRANCH/tests/filter_libc Mon Sep 21 10:54:17 2015
@@ -36,6 +36,9 @@
s/(at.*)__builtin_vec_delete/$1...operator delete[].../;
s/(at.*)operator delete\[\]\(void\*\)/$1...operator delete[].../;
+ # Some glibc versions complain about unexpected futex syscall errors.
+ s/The futex facility returned an unexpected error code.//;
+
print;
}
|
|
From: <sv...@va...> - 2015-09-21 09:53:07
|
Author: sewardj
Date: Mon Sep 21 10:53:00 2015
New Revision: 15662
Log:
Merge, from trunk, r15653 (Add Power PC ISA check to the vbit-test; bug 352765)
Added:
branches/VALGRIND_3_11_BRANCH/tests/min_power_isa.c
- copied unchanged from r15653, trunk/tests/min_power_isa.c
Modified:
branches/VALGRIND_3_11_BRANCH/ (props changed)
branches/VALGRIND_3_11_BRANCH/memcheck/tests/vbit-test/irops.c
branches/VALGRIND_3_11_BRANCH/tests/Makefile.am
Modified: branches/VALGRIND_3_11_BRANCH/memcheck/tests/vbit-test/irops.c
==============================================================================
--- branches/VALGRIND_3_11_BRANCH/memcheck/tests/vbit-test/irops.c (original)
+++ branches/VALGRIND_3_11_BRANCH/memcheck/tests/vbit-test/irops.c Mon Sep 21 10:53:00 2015
@@ -1143,6 +1143,38 @@
return p->amd64 ? p : NULL;
#endif
#ifdef __powerpc__
+#define MIN_POWER_ISA "../../../tests/min_power_isa"
+
+ switch (op) {
+ case Iop_DivS64E:
+ case Iop_DivU64E:
+ case Iop_DivU32E:
+ case Iop_DivS32E:
+ case Iop_F64toI64U:
+ case Iop_F64toI32U:
+ case Iop_I64UtoF64:
+ case Iop_I64UtoF32:
+ case Iop_I64StoD64: {
+ int rc;
+ /* IROps require a processor that supports ISA 2.06 or newer */
+ rc = system(MIN_POWER_ISA " 2.06 ");
+ rc /= 256;
+ /* MIN_POWER_ISA returns 0 if underlying HW supports the
+ * specified ISA or newer. Returns 1 if the HW does not support
+ * the specified ISA. Returns 2 on error.
+ */
+ if (rc == 1) return NULL;
+ if (rc > 2) {
+ panic(" ERROR, min_power_isa() return code is invalid.\n");
+ }
+ }
+ break;
+
+ /* Other */
+ default:
+ break;
+ }
+
#ifdef __powerpc64__
return p->ppc64 ? p : NULL;
#else
Modified: branches/VALGRIND_3_11_BRANCH/tests/Makefile.am
==============================================================================
--- branches/VALGRIND_3_11_BRANCH/tests/Makefile.am (original)
+++ branches/VALGRIND_3_11_BRANCH/tests/Makefile.am Mon Sep 21 10:53:00 2015
@@ -1,6 +1,26 @@
include $(top_srcdir)/Makefile.tool-tests.am
+if HAS_ISA_2_05
+ISA_2_05_FLAG = -DHAS_ISA_2_05
+else
+ISA_2_05_FLAG =
+endif
+
+if HAS_ISA_2_06
+ISA_2_06_FLAG = -DHAS_ISA_2_06
+else
+ISA_2_06_FLAG =
+endif
+
+if HAS_ISA_2_07
+ISA_2_07_FLAG = -DHAS_ISA_2_07
+else
+ISA_2_07_FLAG =
+endif
+
+min_power_isa_FLAGS = $(ISA_2_05_FLAG) $(ISA_2_06_FLAG) $(ISA_2_07_FLAG)
+
dist_noinst_SCRIPTS = \
check_headers_and_includes \
check_makefile_consistency \
@@ -29,7 +49,8 @@
s390x_features \
mips_features \
power_insn_available \
- is_ppc64_BE
+ is_ppc64_BE \
+ min_power_isa
AM_CFLAGS += $(AM_FLAG_M3264_PRI)
AM_CXXFLAGS += $(AM_FLAG_M3264_PRI)
@@ -40,3 +61,4 @@
x86_amd64_features_CFLAGS = $(AM_CFLAGS)
endif
+min_power_isa_CFLAGS = $(min_power_isa_FLAGS)
|
|
From: <sv...@va...> - 2015-09-21 09:51:14
|
Author: sewardj
Date: Mon Sep 21 10:51:07 2015
New Revision: 15661
Log:
Merge, from trunk, r15651 (Do not compile with -Wcast-align on arm.)
Modified:
branches/VALGRIND_3_11_BRANCH/ (props changed)
branches/VALGRIND_3_11_BRANCH/Makefile.all.am
branches/VALGRIND_3_11_BRANCH/configure.ac
Modified: branches/VALGRIND_3_11_BRANCH/Makefile.all.am
==============================================================================
--- branches/VALGRIND_3_11_BRANCH/Makefile.all.am (original)
+++ branches/VALGRIND_3_11_BRANCH/Makefile.all.am Mon Sep 21 10:51:07 2015
@@ -100,12 +100,12 @@
-O2 -g \
-std=gnu99 \
-Wall \
- -Wcast-align \
-Wmissing-prototypes \
-Wshadow \
-Wpointer-arith \
-Wstrict-prototypes \
-Wmissing-declarations \
+ @FLAG_W_CAST_ALIGN@ \
@FLAG_W_CAST_QUAL@ \
@FLAG_W_WRITE_STRINGS@ \
@FLAG_W_EMPTY_BODY@ \
Modified: branches/VALGRIND_3_11_BRANCH/configure.ac
==============================================================================
--- branches/VALGRIND_3_11_BRANCH/configure.ac (original)
+++ branches/VALGRIND_3_11_BRANCH/configure.ac Mon Sep 21 10:51:07 2015
@@ -1967,6 +1967,15 @@
])
CFLAGS=$safe_CFLAGS
+# On ARM we do not want to pass -Wcast-align as that produces loads
+# of warnings. GCC is just being conservative. See here:
+# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65459#c4
+if test "X$VGCONF_ARCH_PRI" = "Xarm"; then
+ AC_SUBST([FLAG_W_CAST_ALIGN], [""])
+else
+ AC_SUBST([FLAG_W_CAST_ALIGN], [-Wcast-align])
+fi
+
# does this compiler support -fno-stack-protector ?
AC_MSG_CHECKING([if gcc accepts -fno-stack-protector])
|
|
From: <sv...@va...> - 2015-09-21 09:48:51
|
Author: sewardj
Date: Mon Sep 21 10:48:44 2015
New Revision: 15660
Log:
Merge, from trunk, r15650 (Fix various compiler warnings for the arm architecture.)
Modified:
branches/VALGRIND_3_11_BRANCH/ (props changed)
branches/VALGRIND_3_11_BRANCH/coregrind/m_debuginfo/readexidx.c
branches/VALGRIND_3_11_BRANCH/coregrind/m_sigframe/sigframe-arm-linux.c
Modified: branches/VALGRIND_3_11_BRANCH/coregrind/m_debuginfo/readexidx.c
==============================================================================
--- branches/VALGRIND_3_11_BRANCH/coregrind/m_debuginfo/readexidx.c (original)
+++ branches/VALGRIND_3_11_BRANCH/coregrind/m_debuginfo/readexidx.c Mon Sep 21 10:48:44 2015
@@ -205,7 +205,7 @@
/* Helper function for fishing bits out of the EXIDX representation. */
-static void* Prel31ToAddr(const void* addr)
+static const void* Prel31ToAddr(const void* addr)
{
UInt offset32 = *(const UInt*)addr;
// sign extend offset32[30:0] to 64 bits -- copy bit 30 to positions
@@ -215,7 +215,7 @@
offset64 |= 0xFFFFFFFF80000000ULL;
else
offset64 &= 0x000000007FFFFFFFULL;
- return ((UChar*)addr) + (UWord)offset64;
+ return ((const UChar*)addr) + (UWord)offset64;
}
@@ -242,9 +242,9 @@
buf[(*buf_used)++] = (_byte); } while (0)
# define GET_EX_U32(_lval, _addr, _mr) \
- do { if (!MemoryRange__covers((_mr), (void*)(_addr), 4)) \
+ do { if (!MemoryRange__covers((_mr), (const void*)(_addr), 4)) \
return ExInBufOverflow; \
- (_lval) = *(UInt*)(_addr); } while (0)
+ (_lval) = *(const UInt*)(_addr); } while (0)
# define GET_EXIDX_U32(_lval, _addr) \
GET_EX_U32(_lval, _addr, mr_exidx)
@@ -263,7 +263,7 @@
UInt pers; // personality number
UInt extra; // number of extra data words required
UInt extra_allowed; // number of extra data words allowed
- UInt* extbl_data; // the handler entry, if not inlined
+ const UInt* extbl_data; // the handler entry, if not inlined
if (data & ARM_EXIDX_COMPACT) {
// The handler table entry has been inlined into the index table entry.
@@ -283,7 +283,7 @@
// The index table entry is a pointer to the handler entry. Note
// that Prel31ToAddr will read the given address, but we already
// range-checked above.
- extbl_data = (UInt*)(Prel31ToAddr(&entry->data));
+ extbl_data = Prel31ToAddr(&entry->data);
GET_EXTAB_U32(data, extbl_data);
if (!(data & ARM_EXIDX_COMPACT)) {
// This denotes a "generic model" handler. That will involve
@@ -941,7 +941,7 @@
VG_(printf)("BEGIN ML_(read_exidx) exidx_img=[%p, +%lu) "
"extab_img=[%p, +%lu) text_last_svma=%lx text_bias=%lx\n",
exidx_img, exidx_size, extab_img, extab_size,
- text_last_svma, text_bias);
+ text_last_svma, (UWord)text_bias);
Bool ok;
MemoryRange mr_exidx, mr_extab;
ok = MemoryRange__init(&mr_exidx, exidx_img, exidx_size);
Modified: branches/VALGRIND_3_11_BRANCH/coregrind/m_sigframe/sigframe-arm-linux.c
==============================================================================
--- branches/VALGRIND_3_11_BRANCH/coregrind/m_sigframe/sigframe-arm-linux.c (original)
+++ branches/VALGRIND_3_11_BRANCH/coregrind/m_sigframe/sigframe-arm-linux.c Mon Sep 21 10:48:44 2015
@@ -248,7 +248,6 @@
struct vg_sig_private *priv;
Addr sp;
UInt frame_size;
- struct vki_sigcontext *mc;
Int sigNo;
Bool has_siginfo = isRT;
@@ -259,14 +258,12 @@
if (has_siginfo) {
struct rt_sigframe *frame = (struct rt_sigframe *)sp;
frame_size = sizeof(*frame);
- mc = &frame->sig.uc.uc_mcontext;
priv = &frame->sig.vp;
vg_assert(priv->magicPI == 0x31415927);
tst->sig_mask = frame->sig.uc.uc_sigmask;
} else {
struct sigframe *frame = (struct sigframe *)sp;
frame_size = sizeof(*frame);
- mc = &frame->uc.uc_mcontext;
priv = &frame->vp;
vg_assert(priv->magicPI == 0x31415927);
tst->sig_mask = frame->uc.uc_sigmask;
|
|
From: <sv...@va...> - 2015-09-21 09:47:01
|
Author: sewardj
Date: Mon Sep 21 10:46:55 2015
New Revision: 15659
Log:
Merge, from trunk, r15647
(libvex_test: Use arm64_[di]MinLine_lg2_szB values that make libvex happy.)
Modified:
branches/VALGRIND_3_11_BRANCH/ (props changed)
branches/VALGRIND_3_11_BRANCH/none/tests/libvex_test.c
Modified: branches/VALGRIND_3_11_BRANCH/none/tests/libvex_test.c
==============================================================================
--- branches/VALGRIND_3_11_BRANCH/none/tests/libvex_test.c (original)
+++ branches/VALGRIND_3_11_BRANCH/none/tests/libvex_test.c Mon Sep 21 10:46:55 2015
@@ -221,6 +221,10 @@
// Use some values that makes AMD64 happy.
vta.abiinfo_both.guest_stack_redzone_size = 128;
+ // Use some values that makes ARM64 happy.
+ vta.archinfo_guest.arm64_dMinLine_lg2_szB = 6;
+ vta.archinfo_guest.arm64_iMinLine_lg2_szB = 6;
+
// Prepare first for a translation where guest == host
// We will translate the get_guest_arch function
vta.arch_guest = guest_arch;
|
|
From: <sv...@va...> - 2015-09-21 09:45:06
|
Author: sewardj
Date: Mon Sep 21 10:44:59 2015
New Revision: 15658
Log:
Merge, from trunk, r15645 (Update doc build hints for Fedora 21 and 22.)
Modified:
branches/VALGRIND_3_11_BRANCH/ (props changed)
branches/VALGRIND_3_11_BRANCH/docs/README
Modified: branches/VALGRIND_3_11_BRANCH/docs/README
==============================================================================
--- branches/VALGRIND_3_11_BRANCH/docs/README (original)
+++ branches/VALGRIND_3_11_BRANCH/docs/README Mon Sep 21 10:44:59 2015
@@ -81,6 +81,22 @@
Below are random notes and recollections about how to build PDF / PS
documents from the XML source at various times on various Linux distros.
+Notes [Sept 2015]
+-----------------
+Fedora 21 and 22: Had mucho trouble with building the print docs on
+F21/22 even with the [Mar 2015] package set (or something similarish)
+installed. Eventually installed "passivetex" and that fixes the
+failures.
+
+Installing the packages below on Fedora _might_ get you a working setup.
+Also you need the epstopdf-base.sty hack detailed below.
+
+ texlive-xmltex texlive-xmltex-bin texlive-xmltex-doc texlive dblatex
+ texlive-xmltex docbook-style-xsl docbook-dtds docbook-style-xsl.noarch
+ docbook-simple.noarch docbook-simple.noarch docbook-slides.noarch
+ docbook-style-dsssl.noarch docbook-utils.noarch
+ docbook-utils-pdf.noarch docbook5-schemas.noarch
+ docbook5-style-xsl.noarch passivetex
Notes [Mar 2015]
----------------
|
|
From: Florian K. <fl...@ei...> - 2015-09-20 13:44:33
|
On 20.09.2015 13:21, Florian Krohm wrote: > We should also consider the small patch set by Jean Delvare which was > posted to valgrind-developers sep 9: > "VKI_I2C_SMBUS: Fixes and cleanups". > > This patch set relates to r14908 which is the changeset for BZ #342603. > This is a bug that we say was fixed in 3.11. So we should fix it properly. > > I cannot tell whether the patch is correct or not. But as the person who > provided r14908 was on copy and has not spoken up since, I presume this > is good to go in. > > I'll commit to HEAD shortly. > r15655, r15656, r15657 Florian |
|
From: Florian K. <fl...@ei...> - 2015-09-20 13:43:26
|
Thanks for the patches. I applied them as r15655-r15657. Florian On 09.09.2015 10:47, Jean Delvare wrote: > Hi all, > > I have been testing VKI_I2C_SMBUS with i2c-tools and found a few issues. > > I am familiar with the Linux kernel I2C API, but not with VKI, so > please let me know if I got anything wrong. > > [PATCH 1/4] VKI_I2C_SMBUS: Fix size of block transactions > [PATCH 2/4] VKI_I2C_SMBUS: Fix test on quick transaction > [PATCH 3/4] VKI_I2C_SMBUS: Fix typo in comment > [PATCH 4/4] VKI_I2C_SMBUS: Drop irrelevant comment > |
|
From: <sv...@va...> - 2015-09-20 13:42:13
|
Author: florian
Date: Sun Sep 20 14:42:06 2015
New Revision: 15657
Log:
Fix up a few comments.
Patch by Jean Delvare <jde...@su...>.
Modified:
trunk/coregrind/m_syswrap/syswrap-linux.c
Modified: trunk/coregrind/m_syswrap/syswrap-linux.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-linux.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-linux.c Sun Sep 20 14:42:06 2015
@@ -6862,7 +6862,7 @@
PRE_MEM_READ("ioctl(VKI_I2C_SMBUS).i2c_smbus_ioctl_data.command",
(Addr)&vkis->command, sizeof(vkis->command));
/* i2c_smbus_write_quick hides its value in read_write, so
- this variable can hava a different meaning */
+ this variable can have a different meaning */
/* to make matters worse i2c_smbus_write_byte stores its
value in command */
if ( ! ((vkis->size == VKI_I2C_SMBUS_QUICK) ||
@@ -9387,9 +9387,7 @@
struct vki_i2c_smbus_ioctl_data *vkis
= (struct vki_i2c_smbus_ioctl_data *) ARG3;
/* i2c_smbus_write_quick hides its value in read_write, so
- this variable can hava a different meaning */
- /* to make matters worse i2c_smbus_write_byte stores its
- value in command */
+ this variable can have a different meaning */
if ((vkis->read_write == VKI_I2C_SMBUS_READ)
|| (vkis->size == VKI_I2C_SMBUS_PROC_CALL)
|| (vkis->size == VKI_I2C_SMBUS_BLOCK_PROC_CALL)) {
|
|
From: <sv...@va...> - 2015-09-20 13:41:32
|
Author: florian
Date: Sun Sep 20 14:41:25 2015
New Revision: 15656
Log:
Followup to r14908 (BZ #342603).
Comparing the command byte with VKI_I2C_SMBUS_QUICK is like comparing
apples to carrots, it makes no sense. The command byte is unused for
quick transactions anyway so checking its value is pointless.
Patch by Jean Delvare <jde...@su...>.
Modified:
trunk/coregrind/m_syswrap/syswrap-linux.c
Modified: trunk/coregrind/m_syswrap/syswrap-linux.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-linux.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-linux.c Sun Sep 20 14:41:25 2015
@@ -6865,8 +6865,7 @@
this variable can hava a different meaning */
/* to make matters worse i2c_smbus_write_byte stores its
value in command */
- if ( ! (((vkis->size == VKI_I2C_SMBUS_QUICK)
- && (vkis->command == VKI_I2C_SMBUS_QUICK)) ||
+ if ( ! ((vkis->size == VKI_I2C_SMBUS_QUICK) ||
((vkis->size == VKI_I2C_SMBUS_BYTE)
&& (vkis->read_write == VKI_I2C_SMBUS_WRITE)))) {
/* the rest uses the byte array to store the data,
@@ -9394,8 +9393,7 @@
if ((vkis->read_write == VKI_I2C_SMBUS_READ)
|| (vkis->size == VKI_I2C_SMBUS_PROC_CALL)
|| (vkis->size == VKI_I2C_SMBUS_BLOCK_PROC_CALL)) {
- if ( ! ((vkis->size == VKI_I2C_SMBUS_QUICK)
- && (vkis->command == VKI_I2C_SMBUS_QUICK))) {
+ if ( ! (vkis->size == VKI_I2C_SMBUS_QUICK)) {
UInt size;
switch(vkis->size) {
case VKI_I2C_SMBUS_BYTE:
|
|
From: <sv...@va...> - 2015-09-20 13:40:55
|
Author: florian
Date: Sun Sep 20 14:40:47 2015
New Revision: 15655
Log:
Followup to r14908 (BZ #342603).
The first byte of the data array holds the length, so the actual data
length is the value of that byte plus one.
Patch by Jean Delvare <jde...@su...>.
Modified:
trunk/coregrind/m_syswrap/syswrap-linux.c
Modified: trunk/coregrind/m_syswrap/syswrap-linux.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-linux.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-linux.c Sun Sep 20 14:40:47 2015
@@ -6884,7 +6884,7 @@
case VKI_I2C_SMBUS_I2C_BLOCK_BROKEN:
case VKI_I2C_SMBUS_BLOCK_PROC_CALL:
case VKI_I2C_SMBUS_I2C_BLOCK_DATA:
- size = vkis->data->block[0];
+ size = 1 + vkis->data->block[0];
break;
default:
size = 0;
@@ -9410,7 +9410,7 @@
case VKI_I2C_SMBUS_I2C_BLOCK_BROKEN:
case VKI_I2C_SMBUS_BLOCK_PROC_CALL:
case VKI_I2C_SMBUS_I2C_BLOCK_DATA:
- size = vkis->data->block[0];
+ size = 1 + vkis->data->block[0];
break;
default:
size = 0;
|
|
From: Florian K. <fl...@ei...> - 2015-09-20 11:22:12
|
On 19.09.2015 15:40, Mark Wielaard wrote: > On Mon, 2015-09-07 at 15:44 +0200, Julian Seward wrote: >> I plan to branch for 3.11.0 in the next 24 hours or so. Please >> yell ASAP if you believe there to be big breakage on the trunk >> that should be fixed before that. >> >> If the branch seems stable then I propose to let the branch stabilise >> until Mon 21 Sept and release at that point. > > I think the branch and valgrind-3.11.0.TEST1 are pretty stable and good. > I have been testing a bit with some additional patches to get slightly > less test failures and suppress some warnings. These are not urgently > needed, but would be nice to have in the final release: > > r15647 > libvex_test: Use arm64_[di]MinLine_lg2_szB values that make libvex > happy. > > r15650 > Fix various compiler warnings for the arm architecture. > > r15651 > Do not compile with -Wcast-align on arm. > > r15653 > Add Power PC ISA check to the vbit-test (bug #352765) > > r15654 > Filter out glibc warning messages about unexpected futex results in > tests. > > Additionally there are the following 3 VEX revisions for some issues on > ppc: > > r3188 > guard dis_dfp_fmt_conv and dis_dfp_exponent_test with allow_DFP > > r3189 > Add support for the Power PC Program Priority Register (bug #352769) > > =Note= there is one open review comment about this patch from Matthias. > In the ppc64 case the guest_PSPB is initialized to zero. The comment and > the ppc32 case explicitly say it should be non-zero. > > r3190 > Add support for the Power PC mbar instruction (bug #352768) > > With or without these patches I think valgrind 3.11.0 will be a great > release. > We should also consider the small patch set by Jean Delvare which was posted to valgrind-developers sep 9: "VKI_I2C_SMBUS: Fixes and cleanups". This patch set relates to r14908 which is the changeset for BZ #342603. This is a bug that we say was fixed in 3.11. So we should fix it properly. I cannot tell whether the patch is correct or not. But as the person who provided r14908 was on copy and has not spoken up since, I presume this is good to go in. I'll commit to HEAD shortly. Florian |
|
From: Mark W. <mj...@re...> - 2015-09-19 13:40:18
|
On Mon, 2015-09-07 at 15:44 +0200, Julian Seward wrote: > I plan to branch for 3.11.0 in the next 24 hours or so. Please > yell ASAP if you believe there to be big breakage on the trunk > that should be fixed before that. > > If the branch seems stable then I propose to let the branch stabilise > until Mon 21 Sept and release at that point. I think the branch and valgrind-3.11.0.TEST1 are pretty stable and good. I have been testing a bit with some additional patches to get slightly less test failures and suppress some warnings. These are not urgently needed, but would be nice to have in the final release: r15647 libvex_test: Use arm64_[di]MinLine_lg2_szB values that make libvex happy. r15650 Fix various compiler warnings for the arm architecture. r15651 Do not compile with -Wcast-align on arm. r15653 Add Power PC ISA check to the vbit-test (bug #352765) r15654 Filter out glibc warning messages about unexpected futex results in tests. Additionally there are the following 3 VEX revisions for some issues on ppc: r3188 guard dis_dfp_fmt_conv and dis_dfp_exponent_test with allow_DFP r3189 Add support for the Power PC Program Priority Register (bug #352769) =Note= there is one open review comment about this patch from Matthias. In the ppc64 case the guest_PSPB is initialized to zero. The comment and the ppc32 case explicitly say it should be non-zero. r3190 Add support for the Power PC mbar instruction (bug #352768) With or without these patches I think valgrind 3.11.0 will be a great release. Thanks, Mark |
|
From: Matthias S. <zz...@ge...> - 2015-09-18 16:16:01
|
Am 17.09.2015 um 00:26 schrieb sv...@va...: > Author: carll > Date: Wed Sep 16 23:26:59 2015 > New Revision: 3189 > > Log: > Add support for the Power PC Program Priority Register > > Added the Program Priority Register (PPR), support to read and write it > via the mfspr and mtspr instructions as well as the special OR instruction > No Op instructions. The setting of the PPR is dependent on the value in > the Problem State Priority Boost register. Basic support for this register > was added. Not all of the PSPB register functionality was added. > > This patch fixes bugzilla 352769. > > Modified: > trunk/priv/guest_ppc_helpers.c > trunk/priv/guest_ppc_toIR.c > trunk/pub/libvex_guest_ppc32.h > trunk/pub/libvex_guest_ppc64.h > > Modified: trunk/priv/guest_ppc_helpers.c > ============================================================================== > --- trunk/priv/guest_ppc_helpers.c (original) > +++ trunk/priv/guest_ppc_helpers.c Wed Sep 16 23:26:59 2015 > @@ -521,6 +521,8 @@ > > vex_state->guest_IP_AT_SYSCALL = 0; > vex_state->guest_SPRG3_RO = 0; > + vex_state->guest_PPR = 0x4ULL << 50; // medium priority > + vex_state->guest_PSPB = 0x100; // an arbitrary non-zero value to start with > > vex_state->padding1 = 0; > vex_state->padding2 = 0; > @@ -691,6 +693,8 @@ > vex_state->guest_TFHAR = 0; > vex_state->guest_TFIAR = 0; > vex_state->guest_TEXASR = 0; > + vex_state->guest_PPR = 0x4ULL << 50; // medium priority > + vex_state->guest_PSPB = 0x00; // an arbitrary non-zero value to start with So here is some kind of inconsistency. Either the value or the comment are wrong. Regards Matthias |
|
From: Mark W. <mj...@re...> - 2015-09-18 09:17:29
|
On Sun, 2015-09-13 at 23:22 +0200, Mark Wielaard wrote: > On Fri, Sep 11, 2015 at 05:06:11PM +0200, Mark Wielaard wrote: > > [Now the various tc18/20 tests fail because glibc helpfully puts "The > > futex facility returned an unexpected error code." on stderr before > > aborting... Will supply some filter for that.] > > I couldn't replicate this. Replicated that now. Some glibc versions indeed just barf some warning messages when getting unexpected futex syscall results. I have filtered them out for the tests in r15654. |
|
From: <sv...@va...> - 2015-09-18 09:15:23
|
Author: mjw
Date: Fri Sep 18 10:15:15 2015
New Revision: 15654
Log:
Filter out glibc warning messages about unexpected futex results in tests.
Modified:
trunk/tests/filter_libc
Modified: trunk/tests/filter_libc
==============================================================================
--- trunk/tests/filter_libc (original)
+++ trunk/tests/filter_libc Fri Sep 18 10:15:15 2015
@@ -36,6 +36,9 @@
s/(at.*)__builtin_vec_delete/$1...operator delete[].../;
s/(at.*)operator delete\[\]\(void\*\)/$1...operator delete[].../;
+ # Some glibc versions complain about unexpected futex syscall errors.
+ s/The futex facility returned an unexpected error code.//;
+
print;
}
|
|
From: Petar J. <mip...@gm...> - 2015-09-16 23:43:09
|
The 3.11.0 tarball has been tested on mips32/mips64 LE/BE, and the results are fine (i.e. just a several known failures for each of these). Regards, Petar On Thu, Sep 10, 2015 at 8:20 PM, Julian Seward <js...@ac...> wrote: > > On 07/09/15 15:44, Julian Seward wrote: > > If the branch seems stable then I propose to let the branch stabilise > > until Mon 21 Sept and release at that point. > > A test tarball is available at > http://valgrind.org/downloads/valgrind-3.11.0.TEST1.tar.bz2 > (md5 = 6a858b4a1e98db8c82bc6bc9c760873b) > > Please test it on systems that are important for you and report any > failures > (and successes!). > > I've tested it, to varying extents, on: > > amd64-linux, Fedora 21 and 22 > ppc64-linux (big endian) > arm32-linux > arm64-linux > OSX 10.10 (32 and 64 bit) > mips64-linux > > J > > > > ------------------------------------------------------------------------------ > Monitor Your Dynamic Infrastructure at Any Scale With Datadog! > Get real-time metrics from all of your servers, apps and tools > in one place. > SourceForge users - Click here to start your Free Trial of Datadog now! > http://pubads.g.doubleclick.net/gampad/clk?id=241902991&iu=/4140 > _______________________________________________ > Valgrind-developers mailing list > Val...@li... > https://lists.sourceforge.net/lists/listinfo/valgrind-developers > |
|
From: <sv...@va...> - 2015-09-16 23:33:47
|
Author: carll
Date: Thu Sep 17 00:33:40 2015
New Revision: 15653
Log:
Add Power PC ISA check to the vbit-test
The support for the Valgrind Iops is dependent on the Power processor
support for various instructions. The instructions supported by a
given Power processor is based on the version of the ISA. The patch
add a check to the vbit-test to ensure it does not try to test an Iop
that generates an instruction on the host that is not supported.
This patch fixes bugzilla 352765.
Added:
trunk/tests/min_power_isa.c
Modified:
trunk/memcheck/tests/vbit-test/irops.c
trunk/tests/Makefile.am
Modified: trunk/memcheck/tests/vbit-test/irops.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/irops.c (original)
+++ trunk/memcheck/tests/vbit-test/irops.c Thu Sep 17 00:33:40 2015
@@ -1143,6 +1143,38 @@
return p->amd64 ? p : NULL;
#endif
#ifdef __powerpc__
+#define MIN_POWER_ISA "../../../tests/min_power_isa"
+
+ switch (op) {
+ case Iop_DivS64E:
+ case Iop_DivU64E:
+ case Iop_DivU32E:
+ case Iop_DivS32E:
+ case Iop_F64toI64U:
+ case Iop_F64toI32U:
+ case Iop_I64UtoF64:
+ case Iop_I64UtoF32:
+ case Iop_I64StoD64: {
+ int rc;
+ /* IROps require a processor that supports ISA 2.06 or newer */
+ rc = system(MIN_POWER_ISA " 2.06 ");
+ rc /= 256;
+ /* MIN_POWER_ISA returns 0 if underlying HW supports the
+ * specified ISA or newer. Returns 1 if the HW does not support
+ * the specified ISA. Returns 2 on error.
+ */
+ if (rc == 1) return NULL;
+ if (rc > 2) {
+ panic(" ERROR, min_power_isa() return code is invalid.\n");
+ }
+ }
+ break;
+
+ /* Other */
+ default:
+ break;
+ }
+
#ifdef __powerpc64__
return p->ppc64 ? p : NULL;
#else
Modified: trunk/tests/Makefile.am
==============================================================================
--- trunk/tests/Makefile.am (original)
+++ trunk/tests/Makefile.am Thu Sep 17 00:33:40 2015
@@ -1,6 +1,26 @@
include $(top_srcdir)/Makefile.tool-tests.am
+if HAS_ISA_2_05
+ISA_2_05_FLAG = -DHAS_ISA_2_05
+else
+ISA_2_05_FLAG =
+endif
+
+if HAS_ISA_2_06
+ISA_2_06_FLAG = -DHAS_ISA_2_06
+else
+ISA_2_06_FLAG =
+endif
+
+if HAS_ISA_2_07
+ISA_2_07_FLAG = -DHAS_ISA_2_07
+else
+ISA_2_07_FLAG =
+endif
+
+min_power_isa_FLAGS = $(ISA_2_05_FLAG) $(ISA_2_06_FLAG) $(ISA_2_07_FLAG)
+
dist_noinst_SCRIPTS = \
check_headers_and_includes \
check_makefile_consistency \
@@ -29,7 +49,8 @@
s390x_features \
mips_features \
power_insn_available \
- is_ppc64_BE
+ is_ppc64_BE \
+ min_power_isa
AM_CFLAGS += $(AM_FLAG_M3264_PRI)
AM_CXXFLAGS += $(AM_FLAG_M3264_PRI)
@@ -40,3 +61,4 @@
x86_amd64_features_CFLAGS = $(AM_CFLAGS)
endif
+min_power_isa_CFLAGS = $(min_power_isa_FLAGS)
Added: trunk/tests/min_power_isa.c
==============================================================================
--- trunk/tests/min_power_isa.c (added)
+++ trunk/tests/min_power_isa.c Thu Sep 17 00:33:40 2015
@@ -0,0 +1,65 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+/* main() */
+int main(int argc, char **argv)
+{
+ /* This program is passed in a minimum ISA that the underlying hardwre
+ * needs to support. If the HW supports this ISA or newer, return 0
+ * for supported. Otherwise, return 1 for not supported. Return 2 for
+ * usage error.
+ *
+ * First argument is required, it must be an ISA version number.
+ * Second argument "-debug" is optional. If passed, then the defined ISA
+ * values are printed.
+ */
+ char *min_isa;
+ int isa_level = 0;
+ int debug = 0;
+
+ /* set the isa_level set by the Make */
+
+ if ((argc == 3) && (strcmp(argv[2], "-debug") == 0)) {
+ debug = 1;
+
+ } else if (argc != 2) {
+ fprintf(stderr, "usage: min_power_ISA <ISA> [-debug]\n" );
+ exit(2);
+ }
+
+ min_isa = argv[1];
+
+#ifdef HAS_ISA_2_05
+ if (debug) printf("HAS_ISA_2_05 is set\n");
+ isa_level = 5;
+#endif
+
+#ifdef HAS_ISA_2_06
+ if (debug) printf("HAS_ISA_2_06 is set\n");
+ isa_level = 6;
+#endif
+
+#ifdef HAS_ISA_2_07
+ if (debug) printf("HAS_ISA_2_07 is set\n");
+ isa_level = 7;
+#endif
+
+ /* return 0 for supported (success), 1 for not supported (failure) */
+ if (strcmp (min_isa, "2.05") == 0) {
+ return !(isa_level >= 5);
+
+ } else if (strcmp (min_isa, "2.06") == 0) {
+ return !(isa_level >= 6);
+
+ } else if (strcmp (min_isa, "2.07") == 0) {
+ return !(isa_level >= 7);
+
+ } else {
+ fprintf(stderr, "ERROR: invalid ISA version. Valid versions numbers are:\n" );
+ fprintf(stderr, " 2.05, 2.06, 2.07\n" );
+ exit(2);
+ }
+
+ return 1;
+}
|
|
From: <sv...@va...> - 2015-09-16 23:01:12
|
Author: carll
Date: Thu Sep 17 00:01:04 2015
New Revision: 3190
Log:
Add support for the Power PC mbar instruction.
This patch fixes bugzilla 352768.
Modified:
trunk/priv/guest_ppc_toIR.c
Modified: trunk/priv/guest_ppc_toIR.c
==============================================================================
--- trunk/priv/guest_ppc_toIR.c (original)
+++ trunk/priv/guest_ppc_toIR.c Thu Sep 17 00:01:04 2015
@@ -6369,6 +6369,7 @@
UInt b11to25 = IFIELD(theInstr, 11, 15);
UChar flag_L = ifieldRegDS(theInstr);
UInt b11to20 = IFIELD(theInstr, 11, 10);
+ UInt M0 = IFIELD(theInstr, 11, 5);
UChar rD_addr = ifieldRegDS(theInstr);
UChar rS_addr = rD_addr;
UChar rA_addr = ifieldRegA(theInstr);
@@ -6399,12 +6400,20 @@
/* X-Form */
case 0x1F:
switch (opc2) {
- case 0x356: // eieio (Enforce In-Order Exec of I/O, PPC32 p394)
- if (b11to25 != 0 || b0 != 0) {
- vex_printf("dis_memsync(ppc)(eiei0,b11to25|b0)\n");
- return False;
+ case 0x356: // eieio or mbar (Enforce In-Order Exec of I/O, PPC32 p394)
+ if (M0 == 0) {
+ if (b11to20 != 0 || b0 != 0) {
+ vex_printf("dis_memsync(ppc)(eieio,b11to20|b0)\n");
+ return False;
+ }
+ DIP("eieio\n");
+ } else {
+ if (b11to20 != 0 || b0 != 0) {
+ vex_printf("dis_memsync(ppc)(mbar,b11to20|b0)\n");
+ return False;
+ }
+ DIP("mbar %d\n", M0);
}
- DIP("eieio\n");
/* Insert a memory fence, just to be on the safe side. */
stmt( IRStmt_MBE(Imbe_Fence) );
break;
|
|
From: <sv...@va...> - 2015-09-16 22:27:07
|
Author: carll
Date: Wed Sep 16 23:26:59 2015
New Revision: 3189
Log:
Add support for the Power PC Program Priority Register
Added the Program Priority Register (PPR), support to read and write it
via the mfspr and mtspr instructions as well as the special OR instruction
No Op instructions. The setting of the PPR is dependent on the value in
the Problem State Priority Boost register. Basic support for this register
was added. Not all of the PSPB register functionality was added.
This patch fixes bugzilla 352769.
Modified:
trunk/priv/guest_ppc_helpers.c
trunk/priv/guest_ppc_toIR.c
trunk/pub/libvex_guest_ppc32.h
trunk/pub/libvex_guest_ppc64.h
Modified: trunk/priv/guest_ppc_helpers.c
==============================================================================
--- trunk/priv/guest_ppc_helpers.c (original)
+++ trunk/priv/guest_ppc_helpers.c Wed Sep 16 23:26:59 2015
@@ -521,6 +521,8 @@
vex_state->guest_IP_AT_SYSCALL = 0;
vex_state->guest_SPRG3_RO = 0;
+ vex_state->guest_PPR = 0x4ULL << 50; // medium priority
+ vex_state->guest_PSPB = 0x100; // an arbitrary non-zero value to start with
vex_state->padding1 = 0;
vex_state->padding2 = 0;
@@ -691,6 +693,8 @@
vex_state->guest_TFHAR = 0;
vex_state->guest_TFIAR = 0;
vex_state->guest_TEXASR = 0;
+ vex_state->guest_PPR = 0x4ULL << 50; // medium priority
+ vex_state->guest_PSPB = 0x00; // an arbitrary non-zero value to start with
}
Modified: trunk/priv/guest_ppc_toIR.c
==============================================================================
--- trunk/priv/guest_ppc_toIR.c (original)
+++ trunk/priv/guest_ppc_toIR.c Wed Sep 16 23:26:59 2015
@@ -288,6 +288,8 @@
#define OFFB_TEXASR offsetofPPCGuestState(guest_TEXASR)
#define OFFB_TEXASRU offsetofPPCGuestState(guest_TEXASRU)
#define OFFB_TFIAR offsetofPPCGuestState(guest_TFIAR)
+#define OFFB_PPR offsetofPPCGuestState(guest_PPR)
+#define OFFB_PSPB offsetofPPCGuestState(guest_PSPB)
/*------------------------------------------------------------*/
@@ -438,6 +440,14 @@
PPC_GST_TFIAR, // Transactional Failure Instruction Address Register
PPC_GST_TEXASR, // Transactional EXception And Summary Register
PPC_GST_TEXASRU, // Transactional EXception And Summary Register Upper
+ PPC_GST_PPR, // Program Priority register
+ PPC_GST_PPR32, // Upper 32-bits of Program Priority register
+ PPC_GST_PSPB, /* Problem State Priority Boost register, Note, the
+ * register is initialized to a non-zero value. Currently
+ * Valgrind is not supporting the register value to
+ * automatically decrement. Could be added later if
+ * needed.
+ */
PPC_GST_MAX
} PPC_GST;
@@ -2747,6 +2757,15 @@
case PPC_GST_TFIAR:
return IRExpr_Get( OFFB_TFIAR, ty );
+ case PPC_GST_PPR:
+ return IRExpr_Get( OFFB_PPR, ty );
+
+ case PPC_GST_PPR32:
+ return unop( Iop_64HIto32, IRExpr_Get( OFFB_PPR, ty ) );
+
+ case PPC_GST_PSPB:
+ return IRExpr_Get( OFFB_PSPB, ty );
+
default:
vex_printf("getGST(ppc): reg = %u", reg);
vpanic("getGST(ppc)");
@@ -2926,6 +2945,95 @@
vassert( ty_src == Ity_I64 );
stmt( IRStmt_Put( OFFB_TFHAR, src ) );
break;
+
+ case PPC_GST_PPR32:
+ case PPC_GST_PPR:
+ {
+ /* The Program Priority Register (PPR) stores the priority in
+ * bits [52:50]. The user setable priorities are:
+ *
+ * 001 very low
+ * 010 low
+ * 011 medium low
+ * 100 medium
+ * 101 medium high
+ *
+ * If the argument is not between 0b001 and 0b100 the priority is set
+ * to 0b100. The priority can only be set to 0b101 if the the Problem
+ * State Boost Register is non-zero. The value of the PPR is not
+ * changed if the input is not valid.
+ */
+
+ IRTemp not_valid = newTemp(Ity_I64);
+ IRTemp has_perm = newTemp(Ity_I64);
+ IRTemp new_src = newTemp(Ity_I64);
+ IRTemp PSPB_val = newTemp(Ity_I64);
+ IRTemp value = newTemp(Ity_I64);
+
+ vassert(( ty_src == Ity_I64 ) || ( ty_src == Ity_I32 ));
+ assign( PSPB_val, binop( Iop_32HLto64,
+ mkU32( 0 ),
+ IRExpr_Get( OFFB_PSPB, Ity_I32 ) ) );
+ if( reg == PPC_GST_PPR32 ) {
+ vassert( ty_src == Ity_I32 );
+ assign( value, binop( Iop_32HLto64,
+ mkU32(0),
+ binop( Iop_And32,
+ binop( Iop_Shr32, src, mkU8( 18 ) ),
+ mkU32( 0x7 ) ) ) );
+ } else {
+ vassert( ty_src == Ity_I64 );
+ assign( value, binop( Iop_And64,
+ binop( Iop_Shr64, src, mkU8( 50 ) ),
+ mkU64( 0x7 ) ) );
+ }
+ assign( has_perm,
+ binop( Iop_And64,
+ unop( Iop_1Sto64,
+ binop( Iop_CmpEQ64,
+ mkexpr( PSPB_val ),
+ mkU64( 0 ) ) ),
+ unop( Iop_1Sto64,
+ binop( Iop_CmpEQ64,
+ mkU64( 0x5 ),
+ mkexpr( value ) ) ) ) );
+ assign( not_valid,
+ binop( Iop_Or64,
+ unop( Iop_1Sto64,
+ binop( Iop_CmpEQ64,
+ mkexpr( value ),
+ mkU64( 0 ) ) ),
+ unop( Iop_1Sto64,
+ binop( Iop_CmpLT64U,
+ mkU64( 0x5 ),
+ mkexpr( value ) ) ) ) );
+ assign( new_src,
+ binop( Iop_Or64,
+ binop( Iop_And64,
+ unop( Iop_Not64,
+ mkexpr( not_valid ) ),
+ src ),
+ binop( Iop_And64,
+ mkexpr( not_valid ),
+ binop( Iop_Or64,
+ binop( Iop_And64,
+ mkexpr( has_perm),
+ binop( Iop_Shl64,
+ mkexpr( value ),
+ mkU8( 50 ) ) ),
+ binop( Iop_And64,
+ IRExpr_Get( OFFB_PPR, ty ),
+ unop( Iop_Not64,
+ mkexpr( has_perm )
+ ) ) ) ) ) );
+
+ /* make sure we only set the valid bit field [52:50] */
+ stmt( IRStmt_Put( OFFB_PPR,
+ binop( Iop_And64,
+ mkexpr( new_src ),
+ mkU64( 0x1C000000000000) ) ) );
+ break;
+ }
default:
vex_printf("putGST(ppc): reg = %u", reg);
vpanic("putGST(ppc)");
@@ -7131,6 +7239,18 @@
DIP("mfspr r%u (TEXASRU)\n", rD_addr);
putIReg( rD_addr, getGST( PPC_GST_TEXASRU) );
break;
+ case 0x9F: // 159
+ DIP("mfspr r%u (PSPB)\n", rD_addr);
+ putIReg( rD_addr, getGST( PPC_GST_PSPB) );
+ break;
+ case 0x380: // 896
+ DIP("mfspr r%u (PPR)\n", rD_addr);
+ putIReg( rD_addr, getGST( PPC_GST_PPR) );
+ break;
+ case 0x382: // 898
+ DIP("mfspr r%u (PPR)32\n", rD_addr);
+ putIReg( rD_addr, getGST( PPC_GST_PPR32) );
+ break;
case 0x100:
DIP("mfvrsave r%u\n", rD_addr);
putIReg( rD_addr, mkWidenFrom32(ty, getGST( PPC_GST_VRSAVE ),
@@ -7287,6 +7407,18 @@
DIP("mtspr r%u (TEXASR)\n", rS_addr);
putGST( PPC_GST_TEXASR, mkexpr(rS) );
break;
+ case 0x9F: // 159
+ DIP("mtspr r%u (PSPB)\n", rS_addr);
+ putGST( PPC_GST_PSPB, mkexpr(rS) );
+ break;
+ case 0x380: // 896
+ DIP("mtspr r%u (PPR)\n", rS_addr);
+ putGST( PPC_GST_PPR, mkexpr(rS) );
+ break;
+ case 0x382: // 898
+ DIP("mtspr r%u (PPR32)\n", rS_addr);
+ putGST( PPC_GST_PPR32, mkexpr(rS) );
+ break;
default:
vex_printf("dis_proc_ctl(ppc)(mtspr,SPR)(%u)\n", SPR);
return False;
Modified: trunk/pub/libvex_guest_ppc32.h
==============================================================================
--- trunk/pub/libvex_guest_ppc32.h (original)
+++ trunk/pub/libvex_guest_ppc32.h Wed Sep 16 23:26:59 2015
@@ -241,11 +241,12 @@
/* 1360 */ ULong guest_TFHAR; // Transaction Failure Handler Address Register
/* 1368 */ ULong guest_TEXASR; // Transaction EXception And Summary Register
/* 1376 */ ULong guest_TFIAR; // Transaction Failure Instruction Address Register
- /* 1384 */ UInt guest_TEXASRU; // Transaction EXception And Summary Register Upper
-
+ /* 1384 */ ULong guest_PPR; // Program Priority register
+ /* 1392 */ UInt guest_TEXASRU; // Transaction EXception And Summary Register Upper
+ /* 1396 */ UInt guest_PSPB; // Problem State Priority Boost register
/* Padding to make it have an 16-aligned size */
- /* 1388 */ UInt padding2;
-
+ /* 1400 */ UInt padding2;
+ /* 1404 */ UInt padding3;
}
VexGuestPPC32State;
Modified: trunk/pub/libvex_guest_ppc64.h
==============================================================================
--- trunk/pub/libvex_guest_ppc64.h (original)
+++ trunk/pub/libvex_guest_ppc64.h Wed Sep 16 23:26:59 2015
@@ -282,12 +282,14 @@
/* 1656 */ ULong guest_TFHAR; // Transaction Failure Handler Address Register
/* 1664 */ ULong guest_TEXASR; // Transaction EXception And Summary Register
/* 1672 */ ULong guest_TFIAR; // Transaction Failure Instruction Address Register
- /* 1680 */ UInt guest_TEXASRU; // Transaction EXception And Summary Register Upper
+ /* 1680 */ ULong guest_PPR; // Program Priority register
+ /* 1688 */ UInt guest_TEXASRU; // Transaction EXception And Summary Register Upper
+ /* 1692 */ UInt guest_PSPB; // Problem State Priority Boost register
/* Padding to make it have an 16-aligned size */
- /* 1684 */ UInt padding1;
- /* 1688 */ UInt padding2;
- /* 1692 */ UInt padding3;
+ /* 1696 UInt padding1; currently not needed */
+ /* 1700 UInt padding2; currently not needed */
+ /* 1708 UInt padding3; currently not needed */
}
VexGuestPPC64State;
|
|
From: Philippe W. <phi...@sk...> - 2015-09-16 21:39:48
|
On Tue, 2015-09-15 at 23:23 -0400, Yue Chen wrote:
> Under x86_64 Linux, I change
> VG_(printf)("I %08lx,%lu\n", addr, size);
> to
> VG_(printf)("I %16lx,%lu\n", addr, size);
This is not needed. If the address would exceed 8 digits,
%08lx will in any case print all the digits.
> in lackey, but the result seems not correct too.
> The output is something like
> I 4ca3292,2
> But the real code address is around 400xxx (6 digits, not 7), which
> differs from the lackey output.
I do not know. I have checked on linux, where there is a correct
matching between what lackey reports, and e.g. what gdb disass tells.
What I suggest is:
1. try the same on a linux box, to exclude any misunderstanding
or manipulation error.
2. if valgrind on freeBSD has a working gdbserver, you might
run your program under lackey, activating gdbserver.
Then put a breakpoint at a certain address,
Run, and double check which address lackey has just reported
(which should be the address just before your breakpoint).
Philippe
|
|
From: Carl E. L. <ce...@us...> - 2015-09-16 20:22:02
|
On Wed, 2015-09-16 at 21:48 +0200, Matthias Schwarzott wrote:
> > + case Iop_I64StoD64: {
> > + int rc;
> > + /* IROps require a processor that supports ISA 2.06 or
> newer */
> > + rc = system(MIN_POWER_ISA " 2.06 ");
> > + rc /= 256;
>
> I have an additional finding: Is dividing here really correct?
Matthias:
Actually yes. The system call return value consists of the return
value, the signal that ended the process and if a core dump was saved.
rc[6:0] is the signal id
rc[7] indicates if a core dump was saved
rc[31:8] return value.
That is my understanding of the bit fields. I did check that an exit
value of 1 from the program resulted in rc being set to 256.
Carl Love
|
|
From: Matthias S. <zz...@ge...> - 2015-09-16 19:48:34
|
Am 16.09.2015 um 21:35 schrieb Carl E. Love:
>
> diff --git a/memcheck/tests/vbit-test/irops.c b/memcheck/tests/vbit-test/irops.c
> index d0e3b58..9e9f017 100644
> --- a/memcheck/tests/vbit-test/irops.c
> +++ b/memcheck/tests/vbit-test/irops.c
> @@ -1143,6 +1143,38 @@ get_irop(IROp op)
> return p->amd64 ? p : NULL;
> #endif
> #ifdef __powerpc__
> +#define MIN_POWER_ISA "../../../tests/min_power_isa"
> +
> + switch (op) {
> + case Iop_DivS64E:
> + case Iop_DivU64E:
> + case Iop_DivU32E:
> + case Iop_DivS32E:
> + case Iop_F64toI64U:
> + case Iop_F64toI32U:
> + case Iop_I64UtoF64:
> + case Iop_I64UtoF32:
> + case Iop_I64StoD64: {
> + int rc;
> + /* IROps require a processor that supports ISA 2.06 or newer */
> + rc = system(MIN_POWER_ISA " 2.06 ");
> + rc /= 256;
I have an additional finding: Is dividing here really correct?
> + /* MIN_POWER_ISA returns 0 if underlying HW supports the
> + * specified ISA or newer. Returns 1 if the HW does not support
> + * the specified ISA. Returns 2 on error.
> + */
> + if (rc == 1) return NULL;
> + if (rc > 2) {
> + panic(" ERROR, min_power_isa() return code is invalid.\n");
> + }
> + }
> + break;
> +
> + /* Other */
> + default:
> + break;
> + }
> +
> #ifdef __powerpc64__
> return p->ppc64 ? p : NULL;
> #else
|
|
From: Carl E. L. <ce...@us...> - 2015-09-16 19:35:24
|
> I cannot check all this, but just from looking at the code, the
> exit-code of min_power_isa is not respecting the normal conventions.
> Normally a success-value is represented by an exit-code of 0.
>
> Then min_power_isa could then be used with normal shell-logic, e.g. as
> precondition for vgtest etc. or in command-lines like this:
>
> # min_power_isa 2.06 && echo "isa 2.06 is supported"
OK, I reversed the return values and corresponding comments to match to
match the shell-logic.
> The exit(1) isn't needed. The panic function already does that.
Removed the exit.
> stdbool.h isn't needed. But you need to include <string.h> for strcmp.
Changed.
I retested to make sure it all still works. Here is the updated patch.
Please let me know if I missed anything especially in the comments.
Carl Love
-------------------------------------------------------------------------------
Add Power PC ISA check to the vbit-test
The support for the Valgrind Iops is dependent on the Power processor
support for various instructions. The instructions supported by a
given Power processor is based on the version of the ISA. The patch
add a check to the vbit-test to ensure it does not try to test an Iop
that generates an instruction on the host that is not supported.
Signed-off-by: Carl Love <ca...@us...>
---
memcheck/tests/vbit-test/irops.c | 32 ++++++++++++++++++++
tests/Makefile.am | 24 ++++++++++++++-
tests/min_power_isa.c | 65 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 120 insertions(+), 1 deletion(-)
create mode 100644 tests/min_power_isa.c
diff --git a/memcheck/tests/vbit-test/irops.c b/memcheck/tests/vbit-test/irops.c
index d0e3b58..9e9f017 100644
--- a/memcheck/tests/vbit-test/irops.c
+++ b/memcheck/tests/vbit-test/irops.c
@@ -1143,6 +1143,38 @@ get_irop(IROp op)
return p->amd64 ? p : NULL;
#endif
#ifdef __powerpc__
+#define MIN_POWER_ISA "../../../tests/min_power_isa"
+
+ switch (op) {
+ case Iop_DivS64E:
+ case Iop_DivU64E:
+ case Iop_DivU32E:
+ case Iop_DivS32E:
+ case Iop_F64toI64U:
+ case Iop_F64toI32U:
+ case Iop_I64UtoF64:
+ case Iop_I64UtoF32:
+ case Iop_I64StoD64: {
+ int rc;
+ /* IROps require a processor that supports ISA 2.06 or newer */
+ rc = system(MIN_POWER_ISA " 2.06 ");
+ rc /= 256;
+ /* MIN_POWER_ISA returns 0 if underlying HW supports the
+ * specified ISA or newer. Returns 1 if the HW does not support
+ * the specified ISA. Returns 2 on error.
+ */
+ if (rc == 1) return NULL;
+ if (rc > 2) {
+ panic(" ERROR, min_power_isa() return code is invalid.\n");
+ }
+ }
+ break;
+
+ /* Other */
+ default:
+ break;
+ }
+
#ifdef __powerpc64__
return p->ppc64 ? p : NULL;
#else
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 708c28e..9c0cc3a 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -1,6 +1,26 @@
include $(top_srcdir)/Makefile.tool-tests.am
+if HAS_ISA_2_05
+ISA_2_05_FLAG = -DHAS_ISA_2_05
+else
+ISA_2_05_FLAG =
+endif
+
+if HAS_ISA_2_06
+ISA_2_06_FLAG = -DHAS_ISA_2_06
+else
+ISA_2_06_FLAG =
+endif
+
+if HAS_ISA_2_07
+ISA_2_07_FLAG = -DHAS_ISA_2_07
+else
+ISA_2_07_FLAG =
+endif
+
+min_power_isa_FLAGS = $(ISA_2_05_FLAG) $(ISA_2_06_FLAG) $(ISA_2_07_FLAG)
+
dist_noinst_SCRIPTS = \
check_headers_and_includes \
check_makefile_consistency \
@@ -29,7 +49,8 @@ check_PROGRAMS = \
s390x_features \
mips_features \
power_insn_available \
- is_ppc64_BE
+ is_ppc64_BE \
+ min_power_isa
AM_CFLAGS += $(AM_FLAG_M3264_PRI)
AM_CXXFLAGS += $(AM_FLAG_M3264_PRI)
@@ -40,3 +61,4 @@ else
x86_amd64_features_CFLAGS = $(AM_CFLAGS)
endif
+min_power_isa_CFLAGS = $(min_power_isa_FLAGS)
diff --git a/tests/min_power_isa.c b/tests/min_power_isa.c
new file mode 100644
index 0000000..73062de
--- /dev/null
+++ b/tests/min_power_isa.c
@@ -0,0 +1,65 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+/* main() */
+int main(int argc, char **argv)
+{
+ /* This program is passed in a minimum ISA that the underlying hardwre
+ * needs to support. If the HW supports this ISA or newer, return 0
+ * for supported. Otherwise, return 1 for not supported. Return 2 for
+ * usage error.
+ *
+ * First argument is required, it must be an ISA version number.
+ * Second argument "-debug" is optional. If passed, then the defined ISA
+ * values are printed.
+ */
+ char *min_isa;
+ int isa_level = 0;
+ int debug = 0;
+
+ /* set the isa_level set by the Make */
+
+ if ((argc == 3) && (strcmp(argv[2], "-debug") == 0)) {
+ debug = 1;
+
+ } else if (argc != 2) {
+ fprintf(stderr, "usage: min_power_ISA <ISA> [-debug]\n" );
+ exit(2);
+ }
+
+ min_isa = argv[1];
+
+#ifdef HAS_ISA_2_05
+ if (debug) printf("HAS_ISA_2_05 is set\n");
+ isa_level = 5;
+#endif
+
+#ifdef HAS_ISA_2_06
+ if (debug) printf("HAS_ISA_2_06 is set\n");
+ isa_level = 6;
+#endif
+
+#ifdef HAS_ISA_2_07
+ if (debug) printf("HAS_ISA_2_07 is set\n");
+ isa_level = 7;
+#endif
+
+ /* return 0 for supported (success), 1 for not supported (failure) */
+ if (strcmp (min_isa, "2.05") == 0) {
+ return !(isa_level >= 5);
+
+ } else if (strcmp (min_isa, "2.06") == 0) {
+ return !(isa_level >= 6);
+
+ } else if (strcmp (min_isa, "2.07") == 0) {
+ return !(isa_level >= 7);
+
+ } else {
+ fprintf(stderr, "ERROR: invalid ISA version. Valid versions numbers are:\n" );
+ fprintf(stderr, " 2.05, 2.06, 2.07\n" );
+ exit(2);
+ }
+
+ return 1;
+}
--
2.1.0
|
|
From: Florian K. <fl...@ei...> - 2015-09-16 18:08:52
|
On 16.09.2015 19:42, Matthias Schwarzott wrote: > I cannot check all this, but just from looking at the code, the > exit-code of min_power_isa is not respecting the normal conventions. > Normally a success-value is represented by an exit-code of 0. > > Then min_power_isa could then be used with normal shell-logic, e.g. as > precondition for vgtest etc. or in command-lines like this: > > # min_power_isa 2.06 && echo "isa 2.06 is supported" > Good point! Florian |