You can subscribe to this list here.
| 2002 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
(1) |
Oct
(122) |
Nov
(152) |
Dec
(69) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2003 |
Jan
(6) |
Feb
(25) |
Mar
(73) |
Apr
(82) |
May
(24) |
Jun
(25) |
Jul
(10) |
Aug
(11) |
Sep
(10) |
Oct
(54) |
Nov
(203) |
Dec
(182) |
| 2004 |
Jan
(307) |
Feb
(305) |
Mar
(430) |
Apr
(312) |
May
(187) |
Jun
(342) |
Jul
(487) |
Aug
(637) |
Sep
(336) |
Oct
(373) |
Nov
(441) |
Dec
(210) |
| 2005 |
Jan
(385) |
Feb
(480) |
Mar
(636) |
Apr
(544) |
May
(679) |
Jun
(625) |
Jul
(810) |
Aug
(838) |
Sep
(634) |
Oct
(521) |
Nov
(965) |
Dec
(543) |
| 2006 |
Jan
(494) |
Feb
(431) |
Mar
(546) |
Apr
(411) |
May
(406) |
Jun
(322) |
Jul
(256) |
Aug
(401) |
Sep
(345) |
Oct
(542) |
Nov
(308) |
Dec
(481) |
| 2007 |
Jan
(427) |
Feb
(326) |
Mar
(367) |
Apr
(255) |
May
(244) |
Jun
(204) |
Jul
(223) |
Aug
(231) |
Sep
(354) |
Oct
(374) |
Nov
(497) |
Dec
(362) |
| 2008 |
Jan
(322) |
Feb
(482) |
Mar
(658) |
Apr
(422) |
May
(476) |
Jun
(396) |
Jul
(455) |
Aug
(267) |
Sep
(280) |
Oct
(253) |
Nov
(232) |
Dec
(304) |
| 2009 |
Jan
(486) |
Feb
(470) |
Mar
(458) |
Apr
(423) |
May
(696) |
Jun
(461) |
Jul
(551) |
Aug
(575) |
Sep
(134) |
Oct
(110) |
Nov
(157) |
Dec
(102) |
| 2010 |
Jan
(226) |
Feb
(86) |
Mar
(147) |
Apr
(117) |
May
(107) |
Jun
(203) |
Jul
(193) |
Aug
(238) |
Sep
(300) |
Oct
(246) |
Nov
(23) |
Dec
(75) |
| 2011 |
Jan
(133) |
Feb
(195) |
Mar
(315) |
Apr
(200) |
May
(267) |
Jun
(293) |
Jul
(353) |
Aug
(237) |
Sep
(278) |
Oct
(611) |
Nov
(274) |
Dec
(260) |
| 2012 |
Jan
(303) |
Feb
(391) |
Mar
(417) |
Apr
(441) |
May
(488) |
Jun
(655) |
Jul
(590) |
Aug
(610) |
Sep
(526) |
Oct
(478) |
Nov
(359) |
Dec
(372) |
| 2013 |
Jan
(467) |
Feb
(226) |
Mar
(391) |
Apr
(281) |
May
(299) |
Jun
(252) |
Jul
(311) |
Aug
(352) |
Sep
(481) |
Oct
(571) |
Nov
(222) |
Dec
(231) |
| 2014 |
Jan
(185) |
Feb
(329) |
Mar
(245) |
Apr
(238) |
May
(281) |
Jun
(399) |
Jul
(382) |
Aug
(500) |
Sep
(579) |
Oct
(435) |
Nov
(487) |
Dec
(256) |
| 2015 |
Jan
(338) |
Feb
(357) |
Mar
(330) |
Apr
(294) |
May
(191) |
Jun
(108) |
Jul
(142) |
Aug
(261) |
Sep
(190) |
Oct
(54) |
Nov
(83) |
Dec
(22) |
| 2016 |
Jan
(49) |
Feb
(89) |
Mar
(33) |
Apr
(50) |
May
(27) |
Jun
(34) |
Jul
(53) |
Aug
(53) |
Sep
(98) |
Oct
(206) |
Nov
(93) |
Dec
(53) |
| 2017 |
Jan
(65) |
Feb
(82) |
Mar
(102) |
Apr
(86) |
May
(187) |
Jun
(67) |
Jul
(23) |
Aug
(93) |
Sep
(65) |
Oct
(45) |
Nov
(35) |
Dec
(17) |
| 2018 |
Jan
(26) |
Feb
(35) |
Mar
(38) |
Apr
(32) |
May
(8) |
Jun
(43) |
Jul
(27) |
Aug
(30) |
Sep
(43) |
Oct
(42) |
Nov
(38) |
Dec
(67) |
| 2019 |
Jan
(32) |
Feb
(37) |
Mar
(53) |
Apr
(64) |
May
(49) |
Jun
(18) |
Jul
(14) |
Aug
(53) |
Sep
(25) |
Oct
(30) |
Nov
(49) |
Dec
(31) |
| 2020 |
Jan
(87) |
Feb
(45) |
Mar
(37) |
Apr
(51) |
May
(99) |
Jun
(36) |
Jul
(11) |
Aug
(14) |
Sep
(20) |
Oct
(24) |
Nov
(40) |
Dec
(23) |
| 2021 |
Jan
(14) |
Feb
(53) |
Mar
(85) |
Apr
(15) |
May
(19) |
Jun
(3) |
Jul
(14) |
Aug
(1) |
Sep
(57) |
Oct
(73) |
Nov
(56) |
Dec
(22) |
| 2022 |
Jan
(3) |
Feb
(22) |
Mar
(6) |
Apr
(55) |
May
(46) |
Jun
(39) |
Jul
(15) |
Aug
(9) |
Sep
(11) |
Oct
(34) |
Nov
(20) |
Dec
(36) |
| 2023 |
Jan
(79) |
Feb
(41) |
Mar
(99) |
Apr
(169) |
May
(48) |
Jun
(16) |
Jul
(16) |
Aug
(57) |
Sep
(19) |
Oct
|
Nov
|
Dec
|
| S | M | T | W | T | F | S |
|---|---|---|---|---|---|---|
|
|
1
(34) |
2
(28) |
3
(22) |
4
(24) |
5
(32) |
6
(26) |
|
7
(21) |
8
(30) |
9
(15) |
10
(20) |
11
(23) |
12
(27) |
13
(17) |
|
14
(16) |
15
(16) |
16
(15) |
17
(14) |
18
(20) |
19
(18) |
20
(11) |
|
21
(1) |
22
(18) |
23
(12) |
24
(17) |
25
(16) |
26
(15) |
27
(18) |
|
28
(19) |
29
(17) |
30
(17) |
|
|
|
|
|
From: <sv...@va...> - 2014-09-01 22:38:04
|
Author: sewardj
Date: Mon Sep 1 22:37:57 2014
New Revision: 14424
Log:
Add a ( that was missed in r14419 (Prepare to change the default for
--read-inline-info from =no to =yes)
Modified:
trunk/coregrind/m_replacemalloc/vg_replace_malloc.c
Modified: trunk/coregrind/m_replacemalloc/vg_replace_malloc.c
==============================================================================
--- trunk/coregrind/m_replacemalloc/vg_replace_malloc.c (original)
+++ trunk/coregrind/m_replacemalloc/vg_replace_malloc.c Mon Sep 1 22:37:57 2014
@@ -793,7 +793,7 @@
static int pszB = 0; \
if (pszB == 0) \
pszB = my_getpagesize(); \
- TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(UWord) zone); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED((UWord) zone); \
return VG_REPLACE_FUNCTION_EZU(10110,VG_Z_LIBC_SONAME,memalign) \
((SizeT)pszB, size); \
}
|
|
From: <sv...@va...> - 2014-09-01 22:32:59
|
Author: sewardj
Date: Mon Sep 1 22:32:52 2014
New Revision: 14423
Log:
Make --read-inline-info=yes be the default on Memcheck and Helgrind
(just temporarily).
Modified:
trunk/coregrind/m_main.c
Modified: trunk/coregrind/m_main.c
==============================================================================
--- trunk/coregrind/m_main.c (original)
+++ trunk/coregrind/m_main.c Mon Sep 1 22:32:52 2014
@@ -1801,6 +1801,19 @@
"(early_) Process Valgrind's command line options\n");
early_process_cmd_line_options(&need_help, &toolname);
+ // BEGIN HACK
+ vg_assert(toolname != NULL);
+ vg_assert(VG_(clo_read_inline_info) == False);
+ if (0 == VG_(strcmp)(toolname, "memcheck")
+ || 0 == VG_(strcmp)(toolname, "helgrind")) {
+ /* Change the default setting. Later on (just below)
+ main_process_cmd_line_options should pick up any
+ user-supplied setting for it and will override the default
+ set here. */
+ VG_(clo_read_inline_info) = True;
+ }
+ // END HACK
+
// Set default vex control params
LibVEX_default_VexControl(& VG_(clo_vex_control));
|
|
From: <sv...@va...> - 2014-09-01 22:31:16
|
Author: sewardj
Date: Mon Sep 1 22:31:07 2014
New Revision: 14422
Log:
Followup to r14392 (fix up of stack bounds semantics) needed to keep
the darwin port from asserting at startup. Patch from PhilippeW.
Modified:
trunk/coregrind/m_ume/macho.c
Modified: trunk/coregrind/m_ume/macho.c
==============================================================================
--- trunk/coregrind/m_ume/macho.c (original)
+++ trunk/coregrind/m_ume/macho.c Mon Sep 1 22:31:07 2014
@@ -405,7 +405,7 @@
check_mmap_float(res, requested_size, "handle_lcmain");
vg_assert(!sr_isError(res));
*out_stack_start = (vki_uint8_t*)sr_Res(res);
- *out_stack_end = *out_stack_start + requested_size;
+ *out_stack_end = *out_stack_start + requested_size - 1;
Bool need_discard = False;
res = VG_(am_munmap_client)(&need_discard, (Addr)*out_stack_start, HACK);
|
|
From: <sv...@va...> - 2014-09-01 22:26:27
|
Author: sewardj
Date: Mon Sep 1 22:26:18 2014
New Revision: 14421
Log:
VG_(getdents64) is only needed on Linux, and causes build problems
on Darwin, so make it exist only on Linux.
Modified:
trunk/coregrind/m_libcfile.c
trunk/include/pub_tool_libcfile.h
Modified: trunk/coregrind/m_libcfile.c
==============================================================================
--- trunk/coregrind/m_libcfile.c (original)
+++ trunk/coregrind/m_libcfile.c Mon Sep 1 22:26:18 2014
@@ -522,19 +522,15 @@
return sr_isError(res) ? -1 : sr_Res(res);
}
+#if defined(VGO_linux)
Int VG_(getdents64) (Int fd, struct vki_dirent64 *dirp, UInt count)
{
-# if defined(VGO_linux)
SysRes res;
/* res = getdents( fd, dirp, count ); */
res = VG_(do_syscall3)(__NR_getdents64, fd, (UWord)dirp, count);
return sr_isError(res) ? -1 : sr_Res(res);
-# elif defined(VGO_darwin)
- I_die_here;
-# else
-# error "Unknown OS"
-# endif
}
+#endif
/* Check accessibility of a file. Returns zero for access granted,
nonzero otherwise. */
Modified: trunk/include/pub_tool_libcfile.h
==============================================================================
--- trunk/include/pub_tool_libcfile.h (original)
+++ trunk/include/pub_tool_libcfile.h Mon Sep 1 22:26:18 2014
@@ -92,7 +92,10 @@
extern SysRes VG_(poll) (struct vki_pollfd *fds, Int nfds, Int timeout);
extern Int VG_(readlink)( const HChar* path, HChar* buf, UInt bufsize );
+
+#if defined(VGO_linux)
extern Int VG_(getdents64)( Int fd, struct vki_dirent64 *dirp, UInt count );
+#endif
extern const HChar* VG_(basename)( const HChar* path );
extern const HChar* VG_(dirname) ( const HChar* path );
|
|
From: <sv...@va...> - 2014-09-01 21:52:53
|
Author: philippe
Date: Mon Sep 1 21:52:47 2014
New Revision: 14420
Log:
prepare for changing the default of --read-inline-info
suppvarinfo5 is using suppression entries that explicitely checks
for a stack trace without inline info.
So, indicate to not read the inline info.
This also means we will have (and keep) at least one test testing the
behaviour of --read-inline-info=no
Modified:
trunk/memcheck/tests/suppvarinfo5.vgtest
Modified: trunk/memcheck/tests/suppvarinfo5.vgtest
==============================================================================
--- trunk/memcheck/tests/suppvarinfo5.vgtest (original)
+++ trunk/memcheck/tests/suppvarinfo5.vgtest Mon Sep 1 21:52:47 2014
@@ -1,3 +1,3 @@
prog: varinfo5
-vgopts: -q --suppressions=suppvarinfo5.supp
+vgopts: -q --read-inline-info=no --suppressions=suppvarinfo5.supp
|
|
From: <sv...@va...> - 2014-09-01 21:47:00
|
Author: philippe
Date: Mon Sep 1 21:46:52 2014
New Revision: 14419
Log:
Prepare to change the default for --read-inline-info from =no to =yes
The interception/replacements functions should preferrably not
depend on the value of --read-inline-info.
The idea is to change the default from no to yes.
Depending on the no or yes, some intercept/replacement functions
that are inlined will be shown or not shown in stacktraces.
To have such stack traces not depending on the value of --read-inline-info,
such functions should either be marked as
noinline
or be defined as macros.
Modified:
trunk/coregrind/m_replacemalloc/vg_replace_malloc.c
Modified: trunk/coregrind/m_replacemalloc/vg_replace_malloc.c
==============================================================================
--- trunk/coregrind/m_replacemalloc/vg_replace_malloc.c (original)
+++ trunk/coregrind/m_replacemalloc/vg_replace_malloc.c Mon Sep 1 21:46:52 2014
@@ -208,16 +208,14 @@
to a NON SIMD call.
The definedness of such 'unused' arguments will not be verified
by memcheck.
- A call to 'trigger_memcheck_error_if_undefined' allows
+ The macro 'TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED' allows
memcheck to detect such errors for the otherwise unused args.
- Apart of allowing memcheck to detect an error, the function
- trigger_memcheck_error_if_undefined has no effect and
+ Apart of allowing memcheck to detect an error, the macro
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED has no effect and
has a minimal cost for other tools replacing malloc functions.
*/
-static inline void trigger_memcheck_error_if_undefined ( ULong x )
-{
- if (x == 0) __asm__ __volatile__( "" ::: "memory" );
-}
+#define TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(x) \
+ if ((ULong)x == 0) __asm__ __volatile__( "" ::: "memory" )
/*---------------------- malloc ----------------------*/
@@ -232,7 +230,7 @@
void* v; \
\
DO_INIT; \
- trigger_memcheck_error_if_undefined((ULong)n ); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(n); \
MALLOC_TRACE(#fnname "(%llu)", (ULong)n ); \
\
v = (void*)VALGRIND_NON_SIMD_CALL1( info.tl_##vg_replacement, n ); \
@@ -248,8 +246,8 @@
void* v; \
\
DO_INIT; \
- trigger_memcheck_error_if_undefined((ULong)(UWord) zone); \
- trigger_memcheck_error_if_undefined((ULong) n); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED((UWord) zone); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(n); \
MALLOC_TRACE(#fnname "(%p, %llu)", zone, (ULong)n ); \
\
v = (void*)VALGRIND_NON_SIMD_CALL1( info.tl_##vg_replacement, n ); \
@@ -270,7 +268,7 @@
void* v; \
\
DO_INIT; \
- trigger_memcheck_error_if_undefined((ULong) n); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(n); \
MALLOC_TRACE(#fnname "(%llu)", (ULong)n ); \
\
v = (void*)VALGRIND_NON_SIMD_CALL1( info.tl_##vg_replacement, n ); \
@@ -450,7 +448,7 @@
void VG_REPLACE_FUNCTION_EZU(10040,soname,fnname) (void *zone, void *p) \
{ \
DO_INIT; \
- trigger_memcheck_error_if_undefined((ULong)(UWord) zone); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED((UWord) zone); \
MALLOC_TRACE(#fnname "(%p, %p)\n", zone, p ); \
if (p == NULL) \
return; \
@@ -584,9 +582,9 @@
void* v; \
\
DO_INIT; \
- trigger_memcheck_error_if_undefined((ULong)(UWord) zone); \
- trigger_memcheck_error_if_undefined((ULong) nmemb); \
- trigger_memcheck_error_if_undefined((ULong) size); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED((UWord) zone); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(nmemb); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(size); \
MALLOC_TRACE("zone_calloc(%p, %llu,%llu)", zone, (ULong)nmemb, (ULong)size ); \
\
v = (void*)VALGRIND_NON_SIMD_CALL2( info.tl_calloc, nmemb, size ); \
@@ -715,8 +713,8 @@
void* v; \
\
DO_INIT; \
- trigger_memcheck_error_if_undefined((ULong)(UWord) zone); \
- trigger_memcheck_error_if_undefined((ULong) n); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED((UWord) zone); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(n); \
MALLOC_TRACE("zone_memalign(%p, al %llu, size %llu)", \
zone, (ULong)alignment, (ULong)n ); \
\
@@ -742,7 +740,7 @@
void* v; \
\
DO_INIT; \
- trigger_memcheck_error_if_undefined((ULong) n); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(n); \
MALLOC_TRACE("memalign(al %llu, size %llu)", \
(ULong)alignment, (ULong)n ); \
\
@@ -795,7 +793,7 @@
static int pszB = 0; \
if (pszB == 0) \
pszB = my_getpagesize(); \
- trigger_memcheck_error_if_undefined((ULong)(UWord) zone); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(UWord) zone); \
return VG_REPLACE_FUNCTION_EZU(10110,VG_Z_LIBC_SONAME,memalign) \
((SizeT)pszB, size); \
}
@@ -824,8 +822,8 @@
{ \
/* In glibc-2.2.4, 1 denotes a successful return value for \
mallopt */ \
- trigger_memcheck_error_if_undefined((ULong) cmd); \
- trigger_memcheck_error_if_undefined((ULong) value); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(cmd); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(value); \
return 1; \
}
@@ -869,7 +867,7 @@
{ \
/* 0 denotes that malloc_trim() either wasn't able \
to do anything, or was not implemented */ \
- trigger_memcheck_error_if_undefined((ULong) pad); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(pad); \
return 0; \
}
@@ -1046,8 +1044,8 @@
/* Implement "malloc_size" by handing the request through to the
tool's .tl_usable_size method. */
DO_INIT;
- trigger_memcheck_error_if_undefined((ULong)(UWord) zone);
- trigger_memcheck_error_if_undefined((ULong)(UWord) ptr);
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED((UWord) zone);
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED((UWord) ptr);
size_t res = (size_t)VALGRIND_NON_SIMD_CALL1(
info.tl_malloc_usable_size, ptr);
return res;
@@ -1119,7 +1117,7 @@
int VG_REPLACE_FUNCTION_EZU(10240,soname,fnname)(void* zone); \
int VG_REPLACE_FUNCTION_EZU(10240,soname,fnname)(void* zone) \
{ \
- trigger_memcheck_error_if_undefined((ULong) zone); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(zone); \
panic(#fnname); \
return 1; \
}
@@ -1133,7 +1131,7 @@
void VG_REPLACE_FUNCTION_EZU(10250,soname,fnname)(void* zone); \
void VG_REPLACE_FUNCTION_EZU(10250,soname,fnname)(void* zone) \
{ \
- trigger_memcheck_error_if_undefined((ULong) zone); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(zone); \
}
ZONE_REGISTER(VG_Z_LIBC_SONAME, malloc_zone_register);
@@ -1145,7 +1143,7 @@
void VG_REPLACE_FUNCTION_EZU(10260,soname,fnname)(void* zone); \
void VG_REPLACE_FUNCTION_EZU(10260,soname,fnname)(void* zone) \
{ \
- trigger_memcheck_error_if_undefined((ULong) zone); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(zone); \
}
ZONE_UNREGISTER(VG_Z_LIBC_SONAME, malloc_zone_unregister);
@@ -1157,7 +1155,7 @@
void VG_REPLACE_FUNCTION_EZU(10270,soname,fnname)(void* zone, char* nm); \
void VG_REPLACE_FUNCTION_EZU(10270,soname,fnname)(void* zone, char* nm) \
{ \
- trigger_memcheck_error_if_undefined((ULong) zone); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(zone); \
}
ZONE_SET_NAME(VG_Z_LIBC_SONAME, malloc_set_zone_name);
@@ -1169,7 +1167,7 @@
char* VG_REPLACE_FUNCTION_EZU(10280,soname,fnname)(void* zone); \
char* VG_REPLACE_FUNCTION_EZU(10280,soname,fnname)(void* zone) \
{ \
- trigger_memcheck_error_if_undefined((ULong) zone); \
+ TRIGGER_MEMCHECK_ERROR_IF_UNDEFINED(zone); \
return vg_default_zone.zone_name; \
}
|
|
From: <sv...@va...> - 2014-09-01 21:27:14
|
Author: florian
Date: Mon Sep 1 21:27:06 2014
New Revision: 14418
Log:
Update list of ignored files.
Modified:
trunk/memcheck/tests/ (props changed)
|
|
From: <sv...@va...> - 2014-09-01 21:25:15
|
Author: sewardj
Date: Mon Sep 1 21:25:03 2014
New Revision: 14417
Log:
Add a missing VKI_ prefix. No functional change.
Modified:
trunk/include/vki/vki-linux.h
Modified: trunk/include/vki/vki-linux.h
==============================================================================
--- trunk/include/vki/vki-linux.h (original)
+++ trunk/include/vki/vki-linux.h Mon Sep 1 21:25:03 2014
@@ -3470,13 +3470,14 @@
// From drivers/staging/lustre/lustre/include/linux/lustre_lib.h
//----------------------------------------------------------------------
-#define OBD_IOC_DATA_TYPE long
+#define VKI_OBD_IOC_DATA_TYPE long
//----------------------------------------------------------------------
// From drivers/staging/lustre/lustre/include/lustre_lib.h
//----------------------------------------------------------------------
-#define VKI_OBD_IOC_FID2PATH _VKI_IOWR ('f', 150, OBD_IOC_DATA_TYPE)
+#define VKI_OBD_IOC_FID2PATH \
+ _VKI_IOWR ('f', 150, VKI_OBD_IOC_DATA_TYPE)
#endif // __VKI_LINUX_H
|
|
From: <sv...@va...> - 2014-09-01 21:17:08
|
Author: sewardj
Date: Mon Sep 1 21:17:01 2014
New Revision: 14416
Log:
EM_PPC64 isn't defined by some older Android NDKs. Define it
if necessary.
Modified:
trunk/coregrind/launcher-linux.c
Modified: trunk/coregrind/launcher-linux.c
==============================================================================
--- trunk/coregrind/launcher-linux.c (original)
+++ trunk/coregrind/launcher-linux.c Mon Sep 1 21:17:01 2014
@@ -61,6 +61,10 @@
#define EM_AARCH64 183 // ditto
#endif
+#ifndef EM_PPC64
+#define EM_PPC64 21 // ditto
+#endif
+
/* Report fatal errors */
__attribute__((noreturn))
static void barf ( const char *format, ... )
|
|
From: <sv...@va...> - 2014-09-01 21:16:10
|
Author: sewardj
Date: Mon Sep 1 21:16:02 2014
New Revision: 14415
Log:
Tidying up (no functional change)
* add indentation to functions AC_GCC_WARNING_SUBST_NO and
AC_GCC_WARNING_COND
* remove an extraneous (I hope) "-CFLAGS=$safe_CFLAGS"
Modified:
trunk/configure.ac
Modified: trunk/configure.ac
==============================================================================
--- trunk/configure.ac (original)
+++ trunk/configure.ac Mon Sep 1 21:16:02 2014
@@ -1732,17 +1732,17 @@
# to check (without -W), then the conditional name to set if that
# warning flag is supported.
AC_DEFUN([AC_GCC_WARNING_COND],[
-AC_MSG_CHECKING([if gcc accepts -W$1])
-safe_CFLAGS=$CFLAGS
-CFLAGS="-W$1"
-AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[;]])], [
-has_warning_flag=yes
-AC_MSG_RESULT([yes])], [
-has_warning_flag=no
-AC_MSG_RESULT([no])])
-CFLAGS=$safe_CFLAGS
-AM_CONDITIONAL([$2], test x$has_warning_flag = xyes)]
-)
+ AC_MSG_CHECKING([if gcc accepts -W$1])
+ safe_CFLAGS=$CFLAGS
+ CFLAGS="-W$1"
+ AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[;]])], [
+ has_warning_flag=yes
+ AC_MSG_RESULT([yes])], [
+ has_warning_flag=no
+ AC_MSG_RESULT([no])])
+ CFLAGS=$safe_CFLAGS
+ AM_CONDITIONAL([$2], test x$has_warning_flag = xyes)
+])
AC_GCC_WARNING_COND([pointer-sign], [HAS_POINTER_SIGN_WARNING])
AC_GCC_WARNING_COND([write-strings], [HAS_WRITE_STRINGS_WARNING])
@@ -1756,15 +1756,15 @@
# that checking is done against the warning flag itself, but the
# substitution is then done to cancel the warning flag.
AC_DEFUN([AC_GCC_WARNING_SUBST_NO],[
-AC_MSG_CHECKING([if gcc accepts -W$1])
-safe_CFLAGS=$CFLAGS
-CFLAGS="-W$1"
-AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[;]])], [
-AC_SUBST([$2], [-Wno-$1])
-AC_MSG_RESULT([yes])], [
-AC_SUBST([$2], [])
-AC_MSG_RESULT([no])])
-CFLAGS=$safe_CFLAGS
+ AC_MSG_CHECKING([if gcc accepts -W$1])
+ safe_CFLAGS=$CFLAGS
+ CFLAGS="-W$1"
+ AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[;]])], [
+ AC_SUBST([$2], [-Wno-$1])
+ AC_MSG_RESULT([yes])], [
+ AC_SUBST([$2], [])
+ AC_MSG_RESULT([no])])
+ CFLAGS=$safe_CFLAGS
])
AC_GCC_WARNING_SUBST_NO([empty-body], [FLAG_W_NO_EMPTY_BODY])
@@ -1774,6 +1774,7 @@
AC_GCC_WARNING_SUBST_NO([overflow], [FLAG_W_NO_OVERFLOW])
AC_GCC_WARNING_SUBST_NO([uninitialized], [FLAG_W_NO_UNINITIALIZED])
+
# does this compiler support -Wextra or the older -W ?
AC_MSG_CHECKING([if gcc accepts -Wextra or -W])
@@ -2024,7 +2025,6 @@
AC_DEFINE(HAVE_AS_PPC_FPPO, 1, [Define to 1 if as supports floating point phased out category.])
fi
-CFLAGS=$safe_CFLAGS
# does the x86/amd64 assembler understand SSE3 instructions?
# Note, this doesn't generate a C-level symbol. It generates a
|
|
From: <sv...@va...> - 2014-09-01 21:12:51
|
Author: sewardj
Date: Mon Sep 1 21:12:44 2014
New Revision: 14414
Log:
Fix bogus bracketing. No functional change.
Modified:
trunk/coregrind/m_scheduler/scheduler.c
Modified: trunk/coregrind/m_scheduler/scheduler.c
==============================================================================
--- trunk/coregrind/m_scheduler/scheduler.c (original)
+++ trunk/coregrind/m_scheduler/scheduler.c Mon Sep 1 21:12:44 2014
@@ -1093,7 +1093,7 @@
runnable again. We could take a signal while the
syscall runs. */
- if (VG_(clo_sanity_level >= 3)) {
+ if (VG_(clo_sanity_level) >= 3) {
HChar buf[50];
VG_(sprintf)(buf, "(BEFORE SYSCALL, tid %d)", tid);
Bool ok = VG_(am_do_sync_check)(buf, __FILE__, __LINE__);
@@ -1102,7 +1102,7 @@
SCHEDSETJMP(tid, jumped, VG_(client_syscall)(tid, trc));
- if (VG_(clo_sanity_level >= 3)) {
+ if (VG_(clo_sanity_level) >= 3) {
HChar buf[50];
VG_(sprintf)(buf, "(AFTER SYSCALL, tid %d)", tid);
Bool ok = VG_(am_do_sync_check)(buf, __FILE__, __LINE__);
|
|
From: <sv...@va...> - 2014-09-01 21:04:03
|
Author: florian
Date: Mon Sep 1 21:03:54 2014
New Revision: 14413
Log:
Followup to r13469. lineno has already been asserted to be != NULL.
No need to check it again.
Modified:
trunk/coregrind/m_errormgr.c
trunk/include/pub_tool_errormgr.h
Modified: trunk/coregrind/m_errormgr.c
==============================================================================
--- trunk/coregrind/m_errormgr.c (original)
+++ trunk/coregrind/m_errormgr.c Mon Sep 1 21:03:54 2014
@@ -1119,7 +1119,7 @@
while (True) {
n = get_char(fd, &ch);
if (n == 1 && !VG_(isspace)(ch)) break;
- if (n == 1 && ch == '\n' && lineno)
+ if (n == 1 && ch == '\n')
(*lineno)++;
if (n <= 0) return True;
}
@@ -1130,7 +1130,7 @@
while (True) {
n = get_char(fd, &ch);
if (n <= 0) return False; /* the next call will return True */
- if (ch == '\n' && lineno)
+ if (ch == '\n')
(*lineno)++;
if (ch == '\n') break;
if (i > 0 && i == nBuf-1) {
Modified: trunk/include/pub_tool_errormgr.h
==============================================================================
--- trunk/include/pub_tool_errormgr.h (original)
+++ trunk/include/pub_tool_errormgr.h Mon Sep 1 21:03:54 2014
@@ -101,8 +101,8 @@
small for the line, it will be realloc'd until big enough (updating
*bufpp and *nBufp in the process). (It will bomb out if the size
gets ridiculous). Skips leading spaces on the line. Increments
- *lineno with the number of lines read if lineno is non-NULL. Returns
- True if no extra information line could be read. */
+ *lineno with the number of lines read. Returns True if no extra
+ information line could be read. */
extern Bool VG_(get_line) ( Int fd, HChar** bufpp, SizeT* nBufp, Int* lineno );
|
|
From: <sv...@va...> - 2014-09-01 20:51:04
|
Author: sewardj
Date: Mon Sep 1 20:50:56 2014
New Revision: 14412
Log:
Rename a bunch of __unused fields to __unused0, since some Android
NDK's appear to #define __unused to __attribute__((__unused__)),
causing the build to fail in bizarre ways.
Modified:
trunk/include/vki/vki-amd64-linux.h
trunk/include/vki/vki-arm-linux.h
trunk/include/vki/vki-arm64-linux.h
trunk/include/vki/vki-linux.h
trunk/include/vki/vki-ppc64-linux.h
trunk/include/vki/vki-s390x-linux.h
Modified: trunk/include/vki/vki-amd64-linux.h
==============================================================================
--- trunk/include/vki/vki-amd64-linux.h (original)
+++ trunk/include/vki/vki-amd64-linux.h Mon Sep 1 20:50:56 2014
@@ -343,7 +343,7 @@
unsigned long st_mtime_nsec;
unsigned long st_ctime;
unsigned long st_ctime_nsec;
- long __unused[3];
+ long __unused0[3];
};
//----------------------------------------------------------------------
Modified: trunk/include/vki/vki-arm-linux.h
==============================================================================
--- trunk/include/vki/vki-arm-linux.h (original)
+++ trunk/include/vki/vki-arm-linux.h Mon Sep 1 20:50:56 2014
@@ -621,7 +621,7 @@
vki_stack_t uc_stack;
struct vki_sigcontext uc_mcontext;
vki_sigset_t uc_sigmask; /* mask last for extensibility */
- int __unused[32 - (sizeof (vki_sigset_t) / sizeof (int))];
+ int __unused0[32 - (sizeof (vki_sigset_t) / sizeof (int))];
unsigned long uc_regspace[128] __attribute__((__aligned__(8)));
};
Modified: trunk/include/vki/vki-arm64-linux.h
==============================================================================
--- trunk/include/vki/vki-arm64-linux.h (original)
+++ trunk/include/vki/vki-arm64-linux.h Mon Sep 1 20:50:56 2014
@@ -530,7 +530,7 @@
vki_stack_t uc_stack;
vki_sigset_t uc_sigmask;
/* glibc uses a 1024-bit sigset_t */
- __vki_u8 __unused[1024 / 8 - sizeof(vki_sigset_t)];
+ __vki_u8 __unused0[1024 / 8 - sizeof(vki_sigset_t)];
/* last for future expansion */
struct vki_sigcontext uc_mcontext;
};
Modified: trunk/include/vki/vki-linux.h
==============================================================================
--- trunk/include/vki/vki-linux.h (original)
+++ trunk/include/vki/vki-linux.h Mon Sep 1 20:50:56 2014
@@ -1417,7 +1417,7 @@
vki_size_t __user *oldlenp;
void __user *newval;
vki_size_t newlen;
- unsigned long __unused[4];
+ unsigned long __unused0[4];
};
//----------------------------------------------------------------------
Modified: trunk/include/vki/vki-ppc64-linux.h
==============================================================================
--- trunk/include/vki/vki-ppc64-linux.h (original)
+++ trunk/include/vki/vki-ppc64-linux.h Mon Sep 1 20:50:56 2014
@@ -681,7 +681,7 @@
struct vki_ucontext *uc_link;
vki_stack_t uc_stack;
vki_sigset_t uc_sigmask;
- vki_sigset_t __unused[15]; /* Allow for uc_sigmask growth */
+ vki_sigset_t __unused0[15]; /* Allow for uc_sigmask growth */
struct vki_sigcontext uc_mcontext; /* last for extensibility */
};
Modified: trunk/include/vki/vki-s390x-linux.h
==============================================================================
--- trunk/include/vki/vki-s390x-linux.h (original)
+++ trunk/include/vki/vki-s390x-linux.h Mon Sep 1 20:50:56 2014
@@ -462,7 +462,7 @@
unsigned long st_ctime_nsec;
unsigned long st_blksize;
long st_blocks;
- unsigned long __unused[3];
+ unsigned long __unused0[3];
};
#endif /* VGA_s390x */
|
|
From: <sv...@va...> - 2014-09-01 20:48:04
|
Author: philippe
Date: Mon Sep 1 20:47:55 2014
New Revision: 14411
Log:
Fix typo in deprecate msg + reformat to 80 char max
Modified:
trunk/coregrind/m_main.c
Modified: trunk/coregrind/m_main.c
==============================================================================
--- trunk/coregrind/m_main.c (original)
+++ trunk/coregrind/m_main.c Mon Sep 1 20:47:55 2014
@@ -818,8 +818,9 @@
/* Notify about deprecated features */
if (VG_(clo_db_attach))
- VG_(umsg)("\nWarning: --db-attach is a deprecated feature which will be removed\n"
- " in the next release. Use --vgdb-errors=1 instead\n\n");
+ VG_(umsg)
+ ("\nWarning: --db-attach is a deprecated feature which will be\n"
+ " removed in the next release. Use --vgdb-error=1 instead\n\n");
/* Determine the path prefix for vgdb */
if (VG_(clo_vgdb_prefix) == NULL)
|
|
From: <sv...@va...> - 2014-09-01 19:32:18
|
Author: sewardj
Date: Mon Sep 1 19:32:07 2014
New Revision: 14410
Log:
Remove two extraneous Ls introduced by mistake in r14319, which had
the effect of causing CFLAGS environment variable settings to be
ignored for certain parts of the build (genoffsets.c, for one).
Modified:
trunk/configure.ac
Modified: trunk/configure.ac
==============================================================================
--- trunk/configure.ac (original)
+++ trunk/configure.ac Mon Sep 1 19:32:07 2014
@@ -1733,7 +1733,7 @@
# warning flag is supported.
AC_DEFUN([AC_GCC_WARNING_COND],[
AC_MSG_CHECKING([if gcc accepts -W$1])
-safe_CFLAGS=$CLFLAGS
+safe_CFLAGS=$CFLAGS
CFLAGS="-W$1"
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[;]])], [
has_warning_flag=yes
@@ -1757,7 +1757,7 @@
# substitution is then done to cancel the warning flag.
AC_DEFUN([AC_GCC_WARNING_SUBST_NO],[
AC_MSG_CHECKING([if gcc accepts -W$1])
-safe_CFLAGS=$CLFLAGS
+safe_CFLAGS=$CFLAGS
CFLAGS="-W$1"
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[;]])], [
AC_SUBST([$2], [-Wno-$1])
|
|
From: <sv...@va...> - 2014-09-01 16:47:41
|
Author: petarj
Date: Mon Sep 1 16:47:34 2014
New Revision: 14409
Log:
mips64: add missing system call numbers
r14384 introduced use of getdents64 syscall and we missed a system call
value for MIPS64, so it broke the build for it. Add missing values now.
Modified:
trunk/include/vki/vki-scnums-mips64-linux.h
Modified: trunk/include/vki/vki-scnums-mips64-linux.h
==============================================================================
--- trunk/include/vki/vki-scnums-mips64-linux.h (original)
+++ trunk/include/vki/vki-scnums-mips64-linux.h Mon Sep 1 16:47:34 2014
@@ -342,6 +342,12 @@
#define __NR_setns (__NR_Linux + 303)
#define __NR_process_vm_readv (__NR_Linux + 304)
#define __NR_process_vm_writev (__NR_Linux + 305)
+#define __NR_kcmp (__NR_Linux + 306)
+#define __NR_finit_module (__NR_Linux + 307)
+#define __NR_getdents64 (__NR_Linux + 308)
+#define __NR_sched_setattr (__NR_Linux + 309)
+#define __NR_sched_getattr (__NR_Linux + 310)
+#define __NR_renameat2 (__NR_Linux + 311)
#endif /* __VKI_SCNUMS_MIPS64_LINUX_H */
|
|
From: <sv...@va...> - 2014-09-01 16:18:06
|
Author: florian
Date: Mon Sep 1 15:56:05 2014
New Revision: 14408
Log:
Fix a comment. No functional change.
Modified:
trunk/include/pub_tool_errormgr.h
Modified: trunk/include/pub_tool_errormgr.h
==============================================================================
--- trunk/include/pub_tool_errormgr.h (original)
+++ trunk/include/pub_tool_errormgr.h Mon Sep 1 15:56:05 2014
@@ -96,12 +96,12 @@
/* Gets from fd (an opened suppression file) a non-blank, non-comment
line containing suppression extra information (e.g. the syscall
line for the Param memcheck suppression kind. bufpp is a pointer
- to a pointer to a buffer that must be allocated with VG_(malloc);
+ to a buffer that must be allocated with VG_(malloc);
nBufp is a pointer to size_t holding its size; if the buffer is too
small for the line, it will be realloc'd until big enough (updating
*bufpp and *nBufp in the process). (It will bomb out if the size
gets ridiculous). Skips leading spaces on the line. Increments
- lineno with the number of lines read if lineno is non-NULL. Returns
+ *lineno with the number of lines read if lineno is non-NULL. Returns
True if no extra information line could be read. */
extern Bool VG_(get_line) ( Int fd, HChar** bufpp, SizeT* nBufp, Int* lineno );
|
|
From: <sv...@va...> - 2014-09-01 14:16:57
|
Author: mjw
Date: Mon Sep 1 14:16:49 2014
New Revision: 14405
Log:
Adjust cmdline expected test output after r14401 BZ#337871.
Modified:
trunk/none/tests/cmdline1.stdout.exp
trunk/none/tests/cmdline2.stdout.exp
Modified: trunk/none/tests/cmdline1.stdout.exp
==============================================================================
--- trunk/none/tests/cmdline1.stdout.exp (original)
+++ trunk/none/tests/cmdline1.stdout.exp Mon Sep 1 14:16:49 2014
@@ -45,6 +45,7 @@
--suppressions=<filename> suppress errors described in <filename>
--gen-suppressions=no|yes|all print suppressions for errors? [no]
--db-attach=no|yes start debugger when errors detected? [no]
+ Note: deprecated feature
--db-command=<command> command to start debugger [... -nw %f %p]
--input-fd=<number> file descriptor for input [0=stdin]
--dsymutil=no|yes run dsymutil on Mac OS X when helpful? [no]
Modified: trunk/none/tests/cmdline2.stdout.exp
==============================================================================
--- trunk/none/tests/cmdline2.stdout.exp (original)
+++ trunk/none/tests/cmdline2.stdout.exp Mon Sep 1 14:16:49 2014
@@ -45,6 +45,7 @@
--suppressions=<filename> suppress errors described in <filename>
--gen-suppressions=no|yes|all print suppressions for errors? [no]
--db-attach=no|yes start debugger when errors detected? [no]
+ Note: deprecated feature
--db-command=<command> command to start debugger [... -nw %f %p]
--input-fd=<number> file descriptor for input [0=stdin]
--dsymutil=no|yes run dsymutil on Mac OS X when helpful? [no]
|
|
From: <sv...@va...> - 2014-09-01 14:13:28
|
Author: sewardj
Date: Mon Sep 1 14:13:15 2014
New Revision: 2940
Log:
arm64: route all whole-vector shift/rotate/slice operations
through Iop_SliceV128, so as to give it some testing. Implement
Iop_SliceV128 in the back end.
Modified:
trunk/priv/guest_arm64_toIR.c
trunk/priv/host_arm64_isel.c
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Mon Sep 1 14:13:15 2014
@@ -6844,11 +6844,9 @@
if (imm4 == 0) {
assign(res, mkexpr(sLo));
} else {
- vassert(imm4 <= 15);
- assign(res,
- binop(Iop_OrV128,
- binop(Iop_ShlV128, mkexpr(sHi), mkU8(8 * (16-imm4))),
- binop(Iop_ShrV128, mkexpr(sLo), mkU8(8 * imm4))));
+ vassert(imm4 >= 1 && imm4 <= 15);
+ assign(res, triop(Iop_SliceV128,
+ mkexpr(sHi), mkexpr(sLo), mkU8(imm4)));
}
putQReg128(dd, mkexpr(res));
DIP("ext v%u.16b, v%u.16b, v%u.16b, #%u\n", dd, nn, mm, imm4);
@@ -6857,10 +6855,12 @@
if (imm4 == 0) {
assign(res, mkexpr(sLo));
} else {
- assign(res,
- binop(Iop_ShrV128,
- binop(Iop_InterleaveLO64x2, mkexpr(sHi), mkexpr(sLo)),
- mkU8(8 * imm4)));
+ vassert(imm4 >= 1 && imm4 <= 7);
+ IRTemp hi64lo64 = newTempV128();
+ assign(hi64lo64, binop(Iop_InterleaveLO64x2,
+ mkexpr(sHi), mkexpr(sLo)));
+ assign(res, triop(Iop_SliceV128,
+ mkexpr(hi64lo64), mkexpr(hi64lo64), mkU8(imm4)));
}
putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
DIP("ext v%u.8b, v%u.8b, v%u.8b, #%u\n", dd, nn, mm, imm4);
@@ -7015,8 +7015,15 @@
IRTemp preR = newTempV128();
IRTemp res = newTempV128();
if (bitQ == 0 && !isZIP1) {
- assign(preL, binop(Iop_ShlV128, getQReg128(mm), mkU8(32)));
- assign(preR, binop(Iop_ShlV128, getQReg128(nn), mkU8(32)));
+ IRTemp z128 = newTempV128();
+ assign(z128, mkV128(0x0000));
+ // preL = Vm shifted left 32 bits
+ // preR = Vn shifted left 32 bits
+ assign(preL, triop(Iop_SliceV128,
+ getQReg128(mm), mkexpr(z128), mkU8(12)));
+ assign(preR, triop(Iop_SliceV128,
+ getQReg128(nn), mkexpr(z128), mkU8(12)));
+
} else {
assign(preL, getQReg128(mm));
assign(preR, getQReg128(nn));
Modified: trunk/priv/host_arm64_isel.c
==============================================================================
--- trunk/priv/host_arm64_isel.c (original)
+++ trunk/priv/host_arm64_isel.c Mon Sep 1 14:13:15 2014
@@ -2753,47 +2753,51 @@
break;
}
- case Iop_ShlV128:
- case Iop_ShrV128: {
- Bool isSHR = e->Iex.Binop.op == Iop_ShrV128;
- /* This is tricky. Generate an EXT instruction with zeroes in
- the high operand (shift right) or low operand (shift left).
- Note that we can only slice in the EXT instruction at a byte
- level of granularity, so the shift amount needs careful
- checking. */
- IRExpr* argL = e->Iex.Binop.arg1;
- IRExpr* argR = e->Iex.Binop.arg2;
- if (argR->tag == Iex_Const && argR->Iex.Const.con->tag == Ico_U8) {
- UInt amt = argR->Iex.Const.con->Ico.U8;
- Bool amtOK = False;
- switch (amt) {
- case 0x08: case 0x10: case 0x18: case 0x20: case 0x28:
- case 0x30: case 0x38: case 0x40: case 0x48: case 0x50:
- case 0x58: case 0x60: case 0x68: case 0x70: case 0x78:
- amtOK = True; break;
- }
- /* We could also deal with amt==0 by copying the source to
- the destination, but there's no need for that so far. */
- if (amtOK) {
- HReg src = iselV128Expr(env, argL);
- HReg srcZ = newVRegV(env);
- addInstr(env, ARM64Instr_VImmQ(srcZ, 0x0000));
- UInt immB = amt / 8;
- vassert(immB >= 1 && immB <= 15);
- HReg dst = newVRegV(env);
- if (isSHR) {
- addInstr(env, ARM64Instr_VExtV(dst, src/*lo*/, srcZ/*hi*/,
- immB));
- } else {
- addInstr(env, ARM64Instr_VExtV(dst, srcZ/*lo*/, src/*hi*/,
- 16 - immB));
- }
- return dst;
- }
- }
- /* else fall out; this is unhandled */
- break;
- }
+ // JRS 01 Sept 2014: these are tested and believed to be correct,
+ // but they are no longer used by the front end, hence commented
+ // out. They are replaced by Iop_SliceV128, which is more general
+ // and in many cases leads to better code overall.
+ //case Iop_ShlV128:
+ //case Iop_ShrV128: {
+ // Bool isSHR = e->Iex.Binop.op == Iop_ShrV128;
+ // /* This is tricky. Generate an EXT instruction with zeroes in
+ // the high operand (shift right) or low operand (shift left).
+ // Note that we can only slice in the EXT instruction at a byte
+ // level of granularity, so the shift amount needs careful
+ // checking. */
+ // IRExpr* argL = e->Iex.Binop.arg1;
+ // IRExpr* argR = e->Iex.Binop.arg2;
+ // if (argR->tag == Iex_Const && argR->Iex.Const.con->tag == Ico_U8) {
+ // UInt amt = argR->Iex.Const.con->Ico.U8;
+ // Bool amtOK = False;
+ // switch (amt) {
+ // case 0x08: case 0x10: case 0x18: case 0x20: case 0x28:
+ // case 0x30: case 0x38: case 0x40: case 0x48: case 0x50:
+ // case 0x58: case 0x60: case 0x68: case 0x70: case 0x78:
+ // amtOK = True; break;
+ // }
+ // /* We could also deal with amt==0 by copying the source to
+ // the destination, but there's no need for that so far. */
+ // if (amtOK) {
+ // HReg src = iselV128Expr(env, argL);
+ // HReg srcZ = newVRegV(env);
+ // addInstr(env, ARM64Instr_VImmQ(srcZ, 0x0000));
+ // UInt immB = amt / 8;
+ // vassert(immB >= 1 && immB <= 15);
+ // HReg dst = newVRegV(env);
+ // if (isSHR) {
+ // addInstr(env, ARM64Instr_VExtV(dst, src/*lo*/, srcZ/*hi*/,
+ // immB));
+ // } else {
+ // addInstr(env, ARM64Instr_VExtV(dst, srcZ/*lo*/, src/*hi*/,
+ // 16 - immB));
+ // }
+ // return dst;
+ // }
+ // }
+ // /* else fall out; this is unhandled */
+ // break;
+ //}
case Iop_PolynomialMull8x8:
case Iop_Mull32Ux2:
@@ -2857,7 +2861,30 @@
addInstr(env, ARM64Instr_VBinV(vecbop, dst, argL, argR));
return dst;
}
- }
+
+ if (triop->op == Iop_SliceV128) {
+ /* Note that, compared to ShlV128/ShrV128 just above, the shift
+ amount here is in bytes, not bits. */
+ IRExpr* argHi = triop->arg1;
+ IRExpr* argLo = triop->arg2;
+ IRExpr* argAmt = triop->arg3;
+ if (argAmt->tag == Iex_Const && argAmt->Iex.Const.con->tag == Ico_U8) {
+ UInt amt = argAmt->Iex.Const.con->Ico.U8;
+ Bool amtOK = amt >= 1 && amt <= 15;
+ /* We could also deal with amt==0 by copying argLO to
+ the destination, but there's no need for that so far. */
+ if (amtOK) {
+ HReg srcHi = iselV128Expr(env, argHi);
+ HReg srcLo = iselV128Expr(env, argLo);
+ HReg dst = newVRegV(env);
+ addInstr(env, ARM64Instr_VExtV(dst, srcLo, srcHi, amt));
+ return dst;
+ }
+ }
+ /* else fall out; this is unhandled */
+ }
+
+ } /* if (e->tag == Iex_Triop) */
v128_expr_bad:
ppIRExpr(e);
|
|
From: <sv...@va...> - 2014-09-01 11:34:41
|
Author: sewardj
Date: Mon Sep 1 11:34:32 2014
New Revision: 14404
Log:
Track vex r2939 (renaming and arg-order change for Iop_Extract{64,V128}).
Modified:
trunk/memcheck/mc_translate.c
trunk/memcheck/tests/vbit-test/irops.c
trunk/memcheck/tests/vbit-test/util.c
Modified: trunk/memcheck/mc_translate.c
==============================================================================
--- trunk/memcheck/mc_translate.c (original)
+++ trunk/memcheck/mc_translate.c Mon Sep 1 11:34:32 2014
@@ -2845,10 +2845,12 @@
case Iop_SignificanceRoundD128:
/* IRRoundingMode(I32) x I8 x D128 -> D128 */
return mkLazy3(mce, Ity_I128, vatom1, vatom2, vatom3);
- case Iop_ExtractV128:
+ case Iop_SliceV128:
+ /* (V128, V128, I8) -> V128 */
complainIfUndefined(mce, atom3, NULL);
return assignNew('V', mce, Ity_V128, triop(op, vatom1, vatom2, atom3));
- case Iop_Extract64:
+ case Iop_Slice64:
+ /* (I64, I64, I8) -> I64 */
complainIfUndefined(mce, atom3, NULL);
return assignNew('V', mce, Ity_I64, triop(op, vatom1, vatom2, atom3));
case Iop_SetElem8x8:
Modified: trunk/memcheck/tests/vbit-test/irops.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/irops.c (original)
+++ trunk/memcheck/tests/vbit-test/irops.c Mon Sep 1 11:34:32 2014
@@ -465,7 +465,7 @@
{ DEFOP(Iop_Dup8x8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Dup16x4, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Dup32x2, UNDEF_UNKNOWN), },
- { DEFOP(Iop_Extract64, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_Slice64, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Reverse8sIn16_x4, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Reverse8sIn32_x2, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Reverse16sIn32_x2, UNDEF_UNKNOWN), },
@@ -927,7 +927,7 @@
{ DEFOP(Iop_Dup8x16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Dup16x8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Dup32x4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_ExtractV128, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_SliceV128, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Reverse8sIn16_x8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Reverse8sIn32_x4, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Reverse16sIn32_x4, UNDEF_UNKNOWN), },
Modified: trunk/memcheck/tests/vbit-test/util.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/util.c (original)
+++ trunk/memcheck/tests/vbit-test/util.c Mon Sep 1 11:34:32 2014
@@ -772,9 +772,9 @@
case Iop_SetElem32x2:
TERNARY(Ity_I64, Ity_I8, Ity_I32, Ity_I64);
- case Iop_Extract64:
+ case Iop_Slice64:
TERNARY(Ity_I64, Ity_I64, Ity_I8, Ity_I64);
- case Iop_ExtractV128:
+ case Iop_SliceV128:
TERNARY(Ity_V128, Ity_V128, Ity_I8, Ity_V128);
case Iop_QDMull16Sx4: case Iop_QDMull32Sx2:
|
|
From: <sv...@va...> - 2014-09-01 11:33:12
|
Author: sewardj
Date: Mon Sep 1 11:32:47 2014
New Revision: 2939
Log:
Rename Iop_Extract{64,V128} to Iop_Slice{64,V128}, improve their
documentation, and swap the sense of the first and second args
so as to be more in keeping with the rest of the ops here, so
that the more significant arg is arg1 rather than arg2.
Modified:
trunk/priv/guest_arm_toIR.c
trunk/priv/host_arm_isel.c
trunk/priv/ir_defs.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/guest_arm_toIR.c
==============================================================================
--- trunk/priv/guest_arm_toIR.c (original)
+++ trunk/priv/guest_arm_toIR.c Mon Sep 1 11:32:47 2014
@@ -2864,11 +2864,11 @@
HChar reg_t = Q ? 'q' : 'd';
if (Q) {
- putQReg(dreg, triop(Iop_ExtractV128, getQReg(nreg),
- getQReg(mreg), mkU8(imm4)), condT);
+ putQReg(dreg, triop(Iop_SliceV128, /*hiV128*/getQReg(mreg),
+ /*loV128*/getQReg(nreg), mkU8(imm4)), condT);
} else {
- putDRegI64(dreg, triop(Iop_Extract64, getDRegI64(nreg),
- getDRegI64(mreg), mkU8(imm4)), condT);
+ putDRegI64(dreg, triop(Iop_Slice64, /*hiI64*/getDRegI64(mreg),
+ /*loI64*/getDRegI64(nreg), mkU8(imm4)), condT);
}
DIP("vext.8 %c%d, %c%d, %c%d, #%d\n", reg_t, dreg, reg_t, nreg,
reg_t, mreg, imm4);
Modified: trunk/priv/host_arm_isel.c
==============================================================================
--- trunk/priv/host_arm_isel.c (original)
+++ trunk/priv/host_arm_isel.c Mon Sep 1 11:32:47 2014
@@ -3710,10 +3710,10 @@
IRTriop *triop = e->Iex.Triop.details;
switch (triop->op) {
- case Iop_Extract64: {
+ case Iop_Slice64: {
HReg res = newVRegD(env);
- HReg argL = iselNeon64Expr(env, triop->arg1);
- HReg argR = iselNeon64Expr(env, triop->arg2);
+ HReg argL = iselNeon64Expr(env, triop->arg2);
+ HReg argR = iselNeon64Expr(env, triop->arg1);
UInt imm4;
if (triop->arg3->tag != Iex_Const ||
typeOfIRExpr(env->type_env, triop->arg3) != Ity_I8) {
@@ -5291,10 +5291,10 @@
IRTriop *triop = e->Iex.Triop.details;
switch (triop->op) {
- case Iop_ExtractV128: {
+ case Iop_SliceV128: {
HReg res = newVRegV(env);
- HReg argL = iselNeonExpr(env, triop->arg1);
- HReg argR = iselNeonExpr(env, triop->arg2);
+ HReg argL = iselNeonExpr(env, triop->arg2);
+ HReg argR = iselNeonExpr(env, triop->arg1);
UInt imm4;
if (triop->arg3->tag != Iex_Const ||
typeOfIRExpr(env->type_env, triop->arg3) != Ity_I8) {
Modified: trunk/priv/ir_defs.c
==============================================================================
--- trunk/priv/ir_defs.c (original)
+++ trunk/priv/ir_defs.c Mon Sep 1 11:32:47 2014
@@ -1041,8 +1041,8 @@
case Iop_SetElem16x4: vex_printf("SetElem16x4"); return;
case Iop_SetElem32x2: vex_printf("SetElem32x2"); return;
- case Iop_Extract64: vex_printf("Extract64"); return;
- case Iop_ExtractV128: vex_printf("ExtractV128"); return;
+ case Iop_Slice64: vex_printf("Slice64"); return;
+ case Iop_SliceV128: vex_printf("SliceV128"); return;
case Iop_Perm8x16: vex_printf("Perm8x16"); return;
case Iop_Perm32x4: vex_printf("Perm32x4"); return;
@@ -3075,9 +3075,9 @@
case Iop_SetElem32x2:
TERNARY(Ity_I64, Ity_I8, Ity_I32, Ity_I64);
- case Iop_Extract64:
+ case Iop_Slice64:
TERNARY(Ity_I64, Ity_I64, Ity_I8, Ity_I64);
- case Iop_ExtractV128:
+ case Iop_SliceV128:
TERNARY(Ity_V128, Ity_V128, Ity_I8, Ity_V128);
case Iop_BCDAdd:
Modified: trunk/pub/libvex_ir.h
==============================================================================
--- trunk/pub/libvex_ir.h (original)
+++ trunk/pub/libvex_ir.h Mon Sep 1 11:32:47 2014
@@ -980,12 +980,12 @@
/* DUPLICATING -- copy value to all lanes */
Iop_Dup8x8, Iop_Dup16x4, Iop_Dup32x2,
- /* EXTRACT -- copy 8-arg3 highest bytes from arg1 to 8-arg3 lowest bytes
- of result and arg3 lowest bytes of arg2 to arg3 highest bytes of
- result.
- It is a triop: (I64, I64, I8) -> I64 */
- /* Note: the arm back-end handles only constant third argumnet. */
- Iop_Extract64,
+ /* SLICE -- produces the lowest 64 bits of (arg1:arg2) >> (8 * arg3).
+ arg3 is a shift amount in bytes and may be between 0 and 8
+ inclusive. When 0, the result is arg2; when 8, the result is arg1.
+ Not all back ends handle all values. The arm32 and arm64 back
+ ends handle only immediate arg3 values. */
+ Iop_Slice64, // (I64, I64, I8) -> I64
/* REVERSE the order of chunks in vector lanes. Chunks must be
smaller than the vector lanes (obviously) and so may be 8-,
@@ -1711,12 +1711,12 @@
/* DUPLICATING -- copy value to all lanes */
Iop_Dup8x16, Iop_Dup16x8, Iop_Dup32x4,
- /* EXTRACT -- copy 16-arg3 highest bytes from arg1 to 16-arg3 lowest bytes
- of result and arg3 lowest bytes of arg2 to arg3 highest bytes of
- result.
- It is a triop: (V128, V128, I8) -> V128 */
- /* Note: the ARM back end handles only constant arg3 in this operation. */
- Iop_ExtractV128,
+ /* SLICE -- produces the lowest 128 bits of (arg1:arg2) >> (8 * arg3).
+ arg3 is a shift amount in bytes and may be between 0 and 16
+ inclusive. When 0, the result is arg2; when 16, the result is arg1.
+ Not all back ends handle all values. The arm64 back
+ end handles only immediate arg3 values. */
+ Iop_SliceV128, // (V128, V128, I8) -> V128
/* REVERSE the order of chunks in vector lanes. Chunks must be
smaller than the vector lanes (obviously) and so may be 8-,
|
|
From: <sv...@va...> - 2014-09-01 09:36:00
|
Author: sewardj
Date: Mon Sep 1 09:35:42 2014
New Revision: 14403
Log:
Remove memory (load/store) tests from integer.c and move them
into their own file, memory.c.
Added:
trunk/none/tests/arm64/memory.c
trunk/none/tests/arm64/memory.stderr.exp
trunk/none/tests/arm64/memory.stdout.exp
trunk/none/tests/arm64/memory.vgtest
Modified:
trunk/none/tests/arm64/Makefile.am
trunk/none/tests/arm64/integer.c
trunk/none/tests/arm64/integer.stdout.exp
Modified: trunk/none/tests/arm64/Makefile.am
==============================================================================
--- trunk/none/tests/arm64/Makefile.am (original)
+++ trunk/none/tests/arm64/Makefile.am Mon Sep 1 09:35:42 2014
@@ -4,13 +4,15 @@
dist_noinst_SCRIPTS = filter_stderr
EXTRA_DIST = \
+ fp_and_simd.stdout.exp fp_and_simd.stderr.exp fp_and_simd.vgtest \
integer.stdout.exp integer.stderr.exp integer.vgtest \
- fp_and_simd.stdout.exp fp_and_simd.stderr.exp fp_and_simd.vgtest
+ memory.stdout.exp memory.stderr.exp memory.vgtest
check_PROGRAMS = \
allexec \
+ fp_and_simd \
integer \
- fp_and_simd
+ memory
AM_CFLAGS += @FLAG_M64@
AM_CXXFLAGS += @FLAG_M64@
Modified: trunk/none/tests/arm64/integer.c
==============================================================================
--- trunk/none/tests/arm64/integer.c (original)
+++ trunk/none/tests/arm64/integer.c Mon Sep 1 09:35:42 2014
@@ -26,15 +26,6 @@
#define False ((Bool)0)
#define True ((Bool)1)
-__attribute__((noinline))
-static void* memalign16(size_t szB)
-{
- void* x;
- x = memalign(16, szB);
- assert(x);
- assert(0 == ((16-1) & (unsigned long)x));
- return x;
-}
static inline UChar randUChar ( void )
{
@@ -43,17 +34,6 @@
return (seed >> 17) & 0xFF;
}
-static ULong randULong ( void )
-{
- Int i;
- ULong r = 0;
- for (i = 0; i < 8; i++) {
- r = (r << 8) | (ULong)(0xFF & randUChar());
- }
- return r;
-}
-
-
#define TESTINST1(instruction, RD, carryin) \
{ \
@@ -165,70 +145,10 @@
); \
}
-// Same as TESTINST2 except it doesn't print the RN value, since
-// that may differ between runs (it's a stack address). Also,
-// claim it trashes x28 so that can be used as scratch if needed.
-#define TESTINST2_hide2(instruction, RNval, RD, RN, carryin) \
-{ \
- ULong out; \
- ULong nzcv_out; \
- ULong nzcv_in = (carryin ? (1<<29) : 0); \
- __asm__ __volatile__( \
- "msr nzcv,%3;" \
- "mov " #RN ",%2;" \
- instruction ";" \
- "mov %0," #RD ";" \
- "mrs %1,nzcv;" \
- : "=&r" (out), "=&r" (nzcv_out) \
- : "r" (RNval), "r" (nzcv_in) \
- : #RD, #RN, "cc", "memory", "x28" \
- ); \
- printf("%s :: rd %016llx rn (hidden), " \
- "cin %d, nzcv %08llx %c%c%c%c\n", \
- instruction, out, \
- carryin ? 1 : 0, \
- nzcv_out & 0xffff0000, \
- ((1<<31) & nzcv_out) ? 'N' : ' ', \
- ((1<<30) & nzcv_out) ? 'Z' : ' ', \
- ((1<<29) & nzcv_out) ? 'C' : ' ', \
- ((1<<28) & nzcv_out) ? 'V' : ' ' \
- ); \
-}
-
-#define TESTINST3_hide2and3(instruction, RMval, RNval, RD, RM, RN, carryin) \
-{ \
- ULong out; \
- ULong nzcv_out; \
- ULong nzcv_in = (carryin ? (1<<29) : 0); \
- __asm__ __volatile__( \
- "msr nzcv,%4;" \
- "mov " #RM ",%2;" \
- "mov " #RN ",%3;" \
- instruction ";" \
- "mov %0," #RD ";" \
- "mrs %1,nzcv;" \
- : "=&r" (out), "=&r" (nzcv_out) \
- : "r" (RMval), "r" (RNval), "r" (nzcv_in) \
- : #RD, #RM, #RN, "cc", "memory" \
- ); \
- printf("%s :: rd %016llx rm (hidden), rn (hidden), " \
- "cin %d, nzcv %08llx %c%c%c%c\n", \
- instruction, out, \
- carryin ? 1 : 0, \
- nzcv_out & 0xffff0000, \
- ((1<<31) & nzcv_out) ? 'N' : ' ', \
- ((1<<30) & nzcv_out) ? 'Z' : ' ', \
- ((1<<29) & nzcv_out) ? 'C' : ' ', \
- ((1<<28) & nzcv_out) ? 'V' : ' ' \
- ); \
-}
-
-
#define ALL5s 0x5555555555555555ULL
#define ALLas 0xAAAAAAAAAAAAAAAAULL
#define ALLfs 0xFFFFFFFFFFFFFFFFULL
-
////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////
@@ -10743,727 +10663,8 @@
////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////
-static __attribute((noinline)) void test_memory ( void )
-{
-printf("Integer loads\n");
-
-unsigned char area[512];
-
-#define RESET \
- do { int i; for (i = 0; i < sizeof(area); i++) \
- area[i] = i | 0x80; \
- } while (0)
-
-#define AREA_MID (((ULong)(&area[(sizeof(area)/2)-1])) & (~(ULong)0xF))
-
-RESET;
-
-////////////////////////////////////////////////////////////////
-printf("LDR,STR (immediate, uimm12) (STR cases are MISSING)");
-TESTINST2_hide2("ldr x21, [x22, #24]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldr w21, [x22, #20]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrh w21, [x22, #44]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrb w21, [x22, #56]", AREA_MID, x21,x22,0);
-
-////////////////////////////////////////////////////////////////
-printf("LDUR,STUR (immediate, simm9) (STR cases and wb check are MISSING)\n");
-TESTINST2_hide2("ldr x21, [x22], #-24", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldr x21, [x22, #-40]!", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldr x21, [x22, #-48]", AREA_MID, x21,x22,0);
-printf("LDUR,STUR (immediate, simm9): STR cases are MISSING");
-
-////////////////////////////////////////////////////////////////
-// TESTINST2_hide2 allows use of x28 as scratch
-printf("LDP,STP (immediate, simm7) (STR cases and wb check is MISSING)\n");
-
-TESTINST2_hide2("ldp x21, x28, [x22], #-24 ; add x21,x21,x28", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldp x21, x28, [x22], #-24 ; eor x21,x21,x28", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldp x21, x28, [x22, #-40]! ; add x21,x21,x28", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldp x21, x28, [x22, #-40]! ; eor x21,x21,x28", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldp x21, x28, [x22, #-40] ; add x21,x21,x28", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldp x21, x28, [x22, #-40] ; eor x21,x21,x28", AREA_MID, x21,x22,0);
-
-TESTINST2_hide2("ldp w21, w28, [x22], #-24 ; add x21,x21,x28", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldp w21, w28, [x22], #-24 ; eor x21,x21,x28", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldp w21, w28, [x22, #-40]! ; add x21,x21,x28", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldp w21, w28, [x22, #-40]! ; eor x21,x21,x28", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldp w21, w28, [x22, #-40] ; add x21,x21,x28", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldp w21, w28, [x22, #-40] ; eor x21,x21,x28", AREA_MID, x21,x22,0);
-
-////////////////////////////////////////////////////////////////
-// This is a bit tricky. We load the value from just before and
-// just after the actual instruction. Because TESTINSN2_hide2
-// generates two fixed insns either side of the test insn, these
-// should be constant and hence "safe" to check.
-
-printf("LDR (literal, int reg)\n");
-TESTINST2_hide2("xyzzy00: ldr x21, xyzzy00 - 8", AREA_MID, x21,x22,0);
-TESTINST2_hide2("xyzzy01: ldr x21, xyzzy01 + 0", AREA_MID, x21,x22,0);
-TESTINST2_hide2("xyzzy02: ldr x21, xyzzy02 + 8", AREA_MID, x21,x22,0);
-
-TESTINST2_hide2("xyzzy03: ldr x21, xyzzy03 - 4", AREA_MID, x21,x22,0);
-TESTINST2_hide2("xyzzy04: ldr x21, xyzzy04 + 0", AREA_MID, x21,x22,0);
-TESTINST2_hide2("xyzzy05: ldr x21, xyzzy05 + 4", AREA_MID, x21,x22,0);
-
-////////////////////////////////////////////////////////////////
-printf("{LD,ST}R (integer register) (entirely MISSING)\n");
-
-////////////////////////////////////////////////////////////////
-printf("LDRS{B,H,W} (uimm12)\n");
-TESTINST2_hide2("ldrsw x21, [x22, #24]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsh x21, [x22, #20]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsh w21, [x22, #44]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsb x21, [x22, #88]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsb w21, [x22, #56]", AREA_MID, x21,x22,0);
-
-////////////////////////////////////////////////////////////////
-printf("LDRS{B,H,W} (simm9, upd) (upd check is MISSING)\n");
-TESTINST2_hide2("ldrsw x21, [x22, #-24]!", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsh x21, [x22, #-20]!", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsh w21, [x22, #-44]!", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsb x21, [x22, #-88]!", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsb w21, [x22, #-56]!", AREA_MID, x21,x22,0);
-
-TESTINST2_hide2("ldrsw x21, [x22], #-24", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsh x21, [x22], #-20", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsh w21, [x22], #-44", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsb x21, [x22], #-88", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsb w21, [x22], #-56", AREA_MID, x21,x22,0);
-
-////////////////////////////////////////////////////////////////
-printf("LDRS{B,H,W} (simm9, noUpd)\n");
-TESTINST2_hide2("ldrsw x21, [x22, #-24]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsh x21, [x22, #-20]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsh w21, [x22, #-44]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsb x21, [x22, #-88]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldrsb w21, [x22, #-56]", AREA_MID, x21,x22,0);
-
-////////////////////////////////////////////////////////////////
-printf("LDP,STP (immediate, simm7) (FP&VEC) (entirely MISSING)\n");
-
-////////////////////////////////////////////////////////////////
-printf("{LD,ST}R (vector register) (entirely MISSING)\n");
-
-////////////////////////////////////////////////////////////////
-printf("LDRS{B,H,W} (integer register, SX)\n");
-
-TESTINST3_hide2and3("ldrsw x21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsw x21, [x22,x23, lsl #2]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsw x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsw x21, [x22,w23,uxtw #2]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsw x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsw x21, [x22,w23,sxtw #2]", AREA_MID, -5ULL, x21,x22,x23,0);
-
-TESTINST3_hide2and3("ldrsh x21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsh x21, [x22,x23, lsl #1]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsh x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsh x21, [x22,w23,uxtw #1]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsh x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsh x21, [x22,w23,sxtw #1]", AREA_MID, -5ULL, x21,x22,x23,0);
-
-TESTINST3_hide2and3("ldrsh w21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsh w21, [x22,x23, lsl #1]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsh w21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsh w21, [x22,w23,uxtw #1]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsh w21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsh w21, [x22,w23,sxtw #1]", AREA_MID, -5ULL, x21,x22,x23,0);
-
-TESTINST3_hide2and3("ldrsb x21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsb x21, [x22,x23, lsl #0]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsb x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsb x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsb x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsb x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
-
-TESTINST3_hide2and3("ldrsb w21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsb w21, [x22,x23, lsl #0]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsb w21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsb w21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsb w21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
-TESTINST3_hide2and3("ldrsb w21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
-
-////////////////////////////////////////////////////////////////
-printf("LDR/STR (immediate, SIMD&FP, unsigned offset) (entirely MISSING)\n");
-
-////////////////////////////////////////////////////////////////
-printf("LDR/STR (immediate, SIMD&FP, pre/post index) (entirely MISSING)\n");
-
-////////////////////////////////////////////////////////////////
-printf("LDUR/STUR (unscaled offset, SIMD&FP) (entirely MISSING)\n");
-
-////////////////////////////////////////////////////////////////
-printf("LDR (literal, SIMD&FP) (entirely MISSING)\n");
-
-////////////////////////////////////////////////////////////////
-printf("LD1/ST1 (single structure, no offset) (entirely MISSING)\n");
-
-////////////////////////////////////////////////////////////////
-printf("LD1/ST1 (single structure, post index) (entirely MISSING)\n");
-
-////////////////////////////////////////////////////////////////
-printf("LD{,A}X{R,RH,RB} (entirely MISSING)\n");
-
-////////////////////////////////////////////////////////////////
-printf("ST{,L}X{R,RH,RB} (entirely MISSING)\n");
-
-////////////////////////////////////////////////////////////////
-printf("LDA{R,RH,RB}\n");
-TESTINST2_hide2("ldar x21, [x22]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldar w21, [x22]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldarh w21, [x22]", AREA_MID, x21,x22,0);
-TESTINST2_hide2("ldarb w21, [x22]", AREA_MID, x21,x22,0);
-
-////////////////////////////////////////////////////////////////
-printf("STL{R,RH,RB} (entirely MISSING)\n");
-
-} /* end of test_memory() */
-
-////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////
-
-static void show_block_xor ( UChar* block1, UChar* block2, Int n )
-{
- Int i;
- printf(" ");
- for (i = 0; i < n; i++) {
- if (i > 0 && 0 == (i & 15)) printf("\n ");
- if (0 == (i & 15)) printf("[%3d] ", i);
- UInt diff = 0xFF & (UInt)(block1[i] - block2[i]);
- if (diff == 0)
- printf(".. ");
- else
- printf("%02x ", diff);
- }
- printf("\n");
-}
-
-
-// In: rand:
-// memory area, xferred vec regs, xferred int regs,
-// caller spec:
-// addr reg1, addr reg2
-//
-// Out: memory area, xferred vec regs, xferred int regs, addr reg1, addr reg2
-//
-// INSN may mention the following regs as containing load/store data:
-// x13 x23 v17 v18 v19 v20
-// and
-// x5 as containing the base address
-// x6 as containing an offset, if required
-// A memory area is filled with random data, and x13, x23, v17, v18, v19, v20
-// are loaded with random data too. INSN is then executed, with
-// x5 set to the middle of the memory area + AREG1OFF, and x6 set to AREG2VAL.
-//
-// What is printed out: the XOR of the new and old versions of the
-// following:
-// the memory area
-// x13 x23 v17 v18 v19 v20
-// and the SUB of the new and old values of the following:
-// x5 x6
-// If the insn modifies its base register then (obviously) the x5 "new - old"
-// value will be nonzero.
-
-#define MEM_TEST(INSN, AREG1OFF, AREG2VAL) { \
- int i; \
- const int N = 256; \
- UChar* area = memalign16(N); \
- UChar area2[N]; \
- for (i = 0; i < N; i++) area[i] = area2[i] = randUChar(); \
- ULong block[12]; \
- /* 0:x13 1:x23 2:v17.d[0] 3:v17.d[1] 4:v18.d[0] 5:v18.d[1] */ \
- /* 6:v19.d[0] 7:v19.d[1] 8:v20.d[0] 9:v20.d[1] 10:x5 11:x6 */ \
- for (i = 0; i < 12; i++) block[i] = randULong(); \
- block[10] = (ULong)(&area[128]) + (Long)(Int)AREG1OFF; \
- block[11] = (Long)AREG2VAL; \
- ULong block2[12]; \
- for (i = 0; i < 12; i++) block2[i] = block[i]; \
- __asm__ __volatile__( \
- "ldr x13, [%0, #0] ; " \
- "ldr x23, [%0, #8] ; " \
- "ldr q17, [%0, #16] ; " \
- "ldr q18, [%0, #32] ; " \
- "ldr q19, [%0, #48] ; " \
- "ldr q20, [%0, #64] ; " \
- "ldr x5, [%0, #80] ; " \
- "ldr x6, [%0, #88] ; " \
- INSN " ; " \
- "str x13, [%0, #0] ; " \
- "str x23, [%0, #8] ; " \
- "str q17, [%0, #16] ; " \
- "str q18, [%0, #32] ; " \
- "str q19, [%0, #48] ; " \
- "str q20, [%0, #64] ; " \
- "str x5, [%0, #80] ; " \
- "str x6, [%0, #88] ; " \
- : : "r"(&block[0]) : "x5", "x6", "x13", "x23", \
- "v17", "v18", "v19", "v20", "memory", "cc" \
- ); \
- printf("%s with x5 = middle_of_block+%lld, x6=%lld\n", \
- INSN, (Long)AREG1OFF, (Long)AREG2VAL); \
- show_block_xor(&area2[0], area, 256); \
- printf(" %016llx x13 (xor, xfer intreg #1)\n", block[0] ^ block2[0]); \
- printf(" %016llx x23 (xor, xfer intreg #2)\n", block[1] ^ block2[1]); \
- printf(" %016llx v17.d[0] (xor, xfer vecreg #1)\n", block[2] ^ block2[2]); \
- printf(" %016llx v17.d[1] (xor, xfer vecreg #1)\n", block[3] ^ block2[3]); \
- printf(" %016llx v18.d[0] (xor, xfer vecreg #2)\n", block[4] ^ block2[4]); \
- printf(" %016llx v18.d[1] (xor, xfer vecreg #2)\n", block[5] ^ block2[5]); \
- printf(" %016llx v19.d[0] (xor, xfer vecreg #3)\n", block[6] ^ block2[6]); \
- printf(" %016llx v19.d[1] (xor, xfer vecreg #3)\n", block[7] ^ block2[7]); \
- printf(" %016llx v20.d[0] (xor, xfer vecreg #3)\n", block[8] ^ block2[8]); \
- printf(" %016llx v20.d[1] (xor, xfer vecreg #3)\n", block[9] ^ block2[9]); \
- printf(" %16lld x5 (sub, base reg)\n", block[10] - block2[10]); \
- printf(" %16lld x6 (sub, index reg)\n", block[11] - block2[11]); \
- printf("\n"); \
- free(area); \
- }
-
-static __attribute__((noinline)) void test_memory2 ( void )
-{
-////////////////////////////////////////////////////////////////
-printf("LDR,STR (immediate, uimm12)");
-MEM_TEST("ldr x13, [x5, #24]", -1, 0);
-MEM_TEST("ldr w13, [x5, #20]", 1, 0);
-MEM_TEST("ldrh w13, [x5, #44]", 2, 0);
-MEM_TEST("ldrb w13, [x5, #56]", 3, 0);
-MEM_TEST("str x13, [x5, #24]", -3, 0);
-MEM_TEST("str w13, [x5, #20]", 5, 0);
-MEM_TEST("strh w13, [x5, #44]", 6, 0);
-MEM_TEST("strb w13, [x5, #56]", 7, 0);
-
-////////////////////////////////////////////////////////////////
-printf("LDUR,STUR (immediate, simm9)\n");
-MEM_TEST("ldr x13, [x5], #-24", 0, 0);
-MEM_TEST("ldr x13, [x5, #-40]!", 0, 0);
-MEM_TEST("ldr x13, [x5, #-48]", 0, 0);
-MEM_TEST("str x13, [x5], #-24", 0, 0);
-MEM_TEST("str x13, [x5, #-40]!", 0, 0);
-MEM_TEST("str x13, [x5, #-48]", 0, 0);
-
-////////////////////////////////////////////////////////////////
-printf("LDP,STP (immediate, simm7)\n");
-MEM_TEST("ldp x13, x23, [x5], #-24", 0, 0);
-MEM_TEST("ldp x13, x23, [x5, #-40]!", 0, 0);
-MEM_TEST("ldp x13, x23, [x5, #-40]", 0, 0);
-MEM_TEST("stp x13, x23, [x5], #-24", 0, 0);
-MEM_TEST("stp x13, x23, [x5, #-40]!", 0, 0);
-MEM_TEST("stp x13, x23, [x5, #-40]", 0, 0);
-
-MEM_TEST("ldp w13, w23, [x5], #-24", 0, 0);
-MEM_TEST("ldp w13, w23, [x5, #-40]!", 0, 0);
-MEM_TEST("ldp w13, w23, [x5, #-40]", 0, 0);
-MEM_TEST("stp w13, w23, [x5], #-24", 0, 0);
-MEM_TEST("stp w13, w23, [x5, #-40]!", 0, 0);
-MEM_TEST("stp w13, w23, [x5, #-40]", 0, 0);
-
-////////////////////////////////////////////////////////////////
-printf("LDR (literal, int reg) (DONE ABOVE)\n");
-
-////////////////////////////////////////////////////////////////
-printf("{LD,ST}R (integer register) (entirely MISSING)\n");
-MEM_TEST("str x13, [x5, x6]", 12, -4);
-MEM_TEST("str x13, [x5, x6, lsl #3]", 12, -4);
-MEM_TEST("str x13, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("str x13, [x5, w6, uxtw #3]", 12, 4);
-MEM_TEST("str x13, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("str x13, [x5, w6, sxtw #3]", 12, -4);
-MEM_TEST("ldr x13, [x5, x6]", 12, -4);
-MEM_TEST("ldr x13, [x5, x6, lsl #3]", 12, -4);
-MEM_TEST("ldr x13, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("ldr x13, [x5, w6, uxtw #3]", 12, 4);
-MEM_TEST("ldr x13, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("ldr x13, [x5, w6, sxtw #3]", 12, -4);
-
-MEM_TEST("str w13, [x5, x6]", 12, -4);
-MEM_TEST("str w13, [x5, x6, lsl #2]", 12, -4);
-MEM_TEST("str w13, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("str w13, [x5, w6, uxtw #2]", 12, 4);
-MEM_TEST("str w13, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("str w13, [x5, w6, sxtw #2]", 12, -4);
-MEM_TEST("ldr w13, [x5, x6]", 12, -4);
-MEM_TEST("ldr w13, [x5, x6, lsl #2]", 12, -4);
-MEM_TEST("ldr w13, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("ldr w13, [x5, w6, uxtw #2]", 12, 4);
-MEM_TEST("ldr w13, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("ldr w13, [x5, w6, sxtw #2]", 12, -4);
-
-MEM_TEST("strh w13, [x5, x6]", 12, -4);
-MEM_TEST("strh w13, [x5, x6, lsl #1]", 12, -4);
-MEM_TEST("strh w13, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("strh w13, [x5, w6, uxtw #1]", 12, 4);
-MEM_TEST("strh w13, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("strh w13, [x5, w6, sxtw #1]", 12, -4);
-MEM_TEST("ldrh w13, [x5, x6]", 12, -4);
-MEM_TEST("ldrh w13, [x5, x6, lsl #1]", 12, -4);
-MEM_TEST("ldrh w13, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("ldrh w13, [x5, w6, uxtw #1]", 12, 4);
-MEM_TEST("ldrh w13, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("ldrh w13, [x5, w6, sxtw #1]", 12, -4);
-
-MEM_TEST("strb w13, [x5, x6]", 12, -4);
-MEM_TEST("strb w13, [x5, x6, lsl #0]", 12, -4);
-MEM_TEST("strb w13, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("strb w13, [x5, w6, uxtw #0]", 12, 4);
-MEM_TEST("strb w13, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("strb w13, [x5, w6, sxtw #0]", 12, -4);
-MEM_TEST("ldrb w13, [x5, x6]", 12, -4);
-MEM_TEST("ldrb w13, [x5, x6, lsl #0]", 12, -4);
-MEM_TEST("ldrb w13, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("ldrb w13, [x5, w6, uxtw #0]", 12, 4);
-MEM_TEST("ldrb w13, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("ldrb w13, [x5, w6, sxtw #0]", 12, -4);
-
-////////////////////////////////////////////////////////////////
-printf("LDRS{B,H,W} (uimm12)\n");
-MEM_TEST("ldrsw x13, [x5, #24]", -16, 4);
-MEM_TEST("ldrsh x13, [x5, #20]", -16, 4);
-MEM_TEST("ldrsh w13, [x5, #44]", -16, 4);
-MEM_TEST("ldrsb x13, [x5, #72]", -16, 4);
-MEM_TEST("ldrsb w13, [x5, #56]", -16, 4);
-
-////////////////////////////////////////////////////////////////
-printf("LDRS{B,H,W} (simm9, upd) (upd check is MISSING)\n");
-MEM_TEST("ldrsw x13, [x5, #-24]!", -16, 4);
-MEM_TEST("ldrsh x13, [x5, #-20]!", -16, 4);
-MEM_TEST("ldrsh w13, [x5, #-44]!", -16, 4);
-MEM_TEST("ldrsb x13, [x5, #-72]!", -16, 4);
-MEM_TEST("ldrsb w13, [x5, #-56]!", -16, 4);
-
-MEM_TEST("ldrsw x13, [x5], #-24", -16, 4);
-MEM_TEST("ldrsh x13, [x5], #-20", -16, 4);
-MEM_TEST("ldrsh w13, [x5], #-44", -16, 4);
-MEM_TEST("ldrsb x13, [x5], #-72", -16, 4);
-MEM_TEST("ldrsb w13, [x5], #-56", -16, 4);
-
-////////////////////////////////////////////////////////////////
-printf("LDRS{B,H,W} (simm9, noUpd)\n");
-MEM_TEST("ldrsw x13, [x5, #-24]", -16, 4);
-MEM_TEST("ldrsh x13, [x5, #-20]", -16, 4);
-MEM_TEST("ldrsh w13, [x5, #-44]", -16, 4);
-MEM_TEST("ldrsb x13, [x5, #-72]", -16, 4);
-MEM_TEST("ldrsb w13, [x5, #-56]", -16, 4);
-
-////////////////////////////////////////////////////////////////
-printf("LDP,STP (immediate, simm7) (FP&VEC)\n");
-
-MEM_TEST("stp q17, q18, [x5, 32]", -16, 4);
-MEM_TEST("stp q17, q18, [x5, 32]!", -16, 4);
-MEM_TEST("stp q17, q18, [x5], 32", -16, 4);
-
-MEM_TEST("stp d17, d18, [x5, 32]", -16, 4);
-MEM_TEST("stp d17, d18, [x5, 32]!", -16, 4);
-MEM_TEST("stp d17, d18, [x5], 32", -16, 4);
-
-//MEM_TEST("stp s17, s18, [x5, 32]", -16, 4);
-//MEM_TEST("stp s17, s18, [x5, 32]!", -16, 4);
-//MEM_TEST("stp s17, s18, [x5], 32", -16, 4);
-
-MEM_TEST("ldp q17, q18, [x5, 32]", -16, 4);
-MEM_TEST("ldp q17, q18, [x5, 32]!", -16, 4);
-MEM_TEST("ldp q17, q18, [x5], 32", -16, 4);
-
-MEM_TEST("ldp d17, d18, [x5, 32]", -16, 4);
-MEM_TEST("ldp d17, d18, [x5, 32]!", -16, 4);
-MEM_TEST("ldp d17, d18, [x5], 32", -16, 4);
-
-//MEM_TEST("ldp s17, s18, [x5, 32]", -16, 4);
-//MEM_TEST("ldp s17, s18, [x5, 32]!", -16, 4);
-//MEM_TEST("ldp s17, s18, [x5], 32", -16, 4);
-
-////////////////////////////////////////////////////////////////
-printf("{LD,ST}R (vector register)\n");
-
-#if 0
-MEM_TEST("str q17, [x5, x6]", 12, -4);
-MEM_TEST("str q17, [x5, x6, lsl #4]", 12, -4);
-MEM_TEST("str q17, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("str q17, [x5, w6, uxtw #4]", 12, 4);
-MEM_TEST("str q17, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("str q17, [x5, w6, sxtw #4]", 12, -4);
-MEM_TEST("ldr q17, [x5, x6]", 12, -4);
-MEM_TEST("ldr q17, [x5, x6, lsl #4]", 12, -4);
-MEM_TEST("ldr q17, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("ldr q17, [x5, w6, uxtw #4]", 12, 4);
-MEM_TEST("ldr q17, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("ldr q17, [x5, w6, sxtw #4]", 12, -4);
-#endif
-
-MEM_TEST("str d17, [x5, x6]", 12, -4);
-MEM_TEST("str d17, [x5, x6, lsl #3]", 12, -4);
-MEM_TEST("str d17, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("str d17, [x5, w6, uxtw #3]", 12, 4);
-MEM_TEST("str d17, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("str d17, [x5, w6, sxtw #3]", 12, -4);
-MEM_TEST("ldr d17, [x5, x6]", 12, -4);
-MEM_TEST("ldr d17, [x5, x6, lsl #3]", 12, -4);
-MEM_TEST("ldr d17, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("ldr d17, [x5, w6, uxtw #3]", 12, 4);
-MEM_TEST("ldr d17, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("ldr d17, [x5, w6, sxtw #3]", 12, -4);
-
-MEM_TEST("str s17, [x5, x6]", 12, -4);
-MEM_TEST("str s17, [x5, x6, lsl #2]", 12, -4);
-MEM_TEST("str s17, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("str s17, [x5, w6, uxtw #2]", 12, 4);
-MEM_TEST("str s17, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("str s17, [x5, w6, sxtw #2]", 12, -4);
-MEM_TEST("ldr s17, [x5, x6]", 12, -4);
-MEM_TEST("ldr s17, [x5, x6, lsl #2]", 12, -4);
-MEM_TEST("ldr s17, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("ldr s17, [x5, w6, uxtw #2]", 12, 4);
-MEM_TEST("ldr s17, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("ldr s17, [x5, w6, sxtw #2]", 12, -4);
-
-#if 0
-MEM_TEST("str h17, [x5, x6]", 12, -4);
-MEM_TEST("str h17, [x5, x6, lsl #1]", 12, -4);
-MEM_TEST("str h17, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("str h17, [x5, w6, uxtw #1]", 12, 4);
-MEM_TEST("str h17, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("str h17, [x5, w6, sxtw #1]", 12, -4);
-MEM_TEST("ldr h17, [x5, x6]", 12, -4);
-MEM_TEST("ldr h17, [x5, x6, lsl #1]", 12, -4);
-MEM_TEST("ldr h17, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("ldr h17, [x5, w6, uxtw #1]", 12, 4);
-MEM_TEST("ldr h17, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("ldr h17, [x5, w6, sxtw #1]", 12, -4);
-
-MEM_TEST("str b17, [x5, x6]", 12, -4);
-MEM_TEST("str b17, [x5, x6, lsl #0]", 12, -4);
-MEM_TEST("str b17, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("str b17, [x5, w6, uxtw #0]", 12, 4);
-MEM_TEST("str b17, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("str b17, [x5, w6, sxtw #0]", 12, -4);
-MEM_TEST("ldr b17, [x5, x6]", 12, -4);
-MEM_TEST("ldr b17, [x5, x6, lsl #0]", 12, -4);
-MEM_TEST("ldr b17, [x5, w6, uxtw]", 12, 4);
-MEM_TEST("ldr b17, [x5, w6, uxtw #0]", 12, 4);
-MEM_TEST("ldr b17, [x5, w6, sxtw]", 12, 4);
-MEM_TEST("ldr b17, [x5, w6, sxtw #0]", 12, -4);
-#endif
-
-////////////////////////////////////////////////////////////////
-printf("LDRS{B,H,W} (integer register, SX)\n");
-
-MEM_TEST("ldrsw x13, [x5,x6]", 12, -4);
-MEM_TEST("ldrsw x13, [x5,x6, lsl #2]", 12, -4);
-MEM_TEST("ldrsw x13, [x5,w6,uxtw #0]", 12, 4);
-MEM_TEST("ldrsw x13, [x5,w6,uxtw #2]", 12, 4);
-MEM_TEST("ldrsw x13, [x5,w6,sxtw #0]", 12, 4);
-MEM_TEST("ldrsw x13, [x5,w6,sxtw #2]", 12, -4);
-
-MEM_TEST("ldrsh x13, [x5,x6]", 12, -4);
-MEM_TEST("ldrsh x13, [x5,x6, lsl #1]", 12, -4);
-MEM_TEST("ldrsh x13, [x5,w6,uxtw #0]", 12, 4);
-MEM_TEST("ldrsh x13, [x5,w6,uxtw #1]", 12, 4);
-MEM_TEST("ldrsh x13, [x5,w6,sxtw #0]", 12, 4);
-MEM_TEST("ldrsh x13, [x5,w6,sxtw #1]", 12, -4);
-
-MEM_TEST("ldrsh w13, [x5,x6]", 12, -4);
-MEM_TEST("ldrsh w13, [x5,x6, lsl #1]", 12, -4);
-MEM_TEST("ldrsh w13, [x5,w6,uxtw #0]", 12, 4);
-MEM_TEST("ldrsh w13, [x5,w6,uxtw #1]", 12, 4);
-MEM_TEST("ldrsh w13, [x5,w6,sxtw #0]", 12, 4);
-MEM_TEST("ldrsh w13, [x5,w6,sxtw #1]", 12, -4);
-
-MEM_TEST("ldrsb x13, [x5,x6]", 12, -4);
-MEM_TEST("ldrsb x13, [x5,x6, lsl #0]", 12, -4);
-MEM_TEST("ldrsb x13, [x5,w6,uxtw #0]", 12, 4);
-MEM_TEST("ldrsb x13, [x5,w6,uxtw #0]", 12, 4);
-MEM_TEST("ldrsb x13, [x5,w6,sxtw #0]", 12, 4);
-MEM_TEST("ldrsb x13, [x5,w6,sxtw #0]", 12, -4);
-
-MEM_TEST("ldrsb w13, [x5,x6]", 12, -4);
-MEM_TEST("ldrsb w13, [x5,x6, lsl #0]", 12, -4);
-MEM_TEST("ldrsb w13, [x5,w6,uxtw #0]", 12, 4);
-MEM_TEST("ldrsb w13, [x5,w6,uxtw #0]", 12, 4);
-MEM_TEST("ldrsb w13, [x5,w6,sxtw #0]", 12, 4);
-MEM_TEST("ldrsb w13, [x5,w6,sxtw #0]", 12, -4);
-
-
-////////////////////////////////////////////////////////////////
-printf("LDR/STR (immediate, SIMD&FP, unsigned offset)\n");
-MEM_TEST("str q17, [x5, #-32]", 16, 0);
-MEM_TEST("str d17, [x5, #-32]", 16, 0);
-MEM_TEST("str s17, [x5, #-32]", 16, 0);
-//MEM_TEST("str h17, [x5, #-32]", 16, 0);
-//MEM_TEST("str b17, [x5, #-32]", 16, 0);
-MEM_TEST("ldr q17, [x5, #-32]", 16, 0);
-MEM_TEST("ldr d17, [x5, #-32]", 16, 0);
-MEM_TEST("ldr s17, [x5, #-32]", 16, 0);
-//MEM_TEST("ldr h17, [x5, #-32]", 16, 0);
-//MEM_TEST("ldr b17, [x5, #-32]", 16, 0);
-
-////////////////////////////////////////////////////////////////
-printf("LDR/STR (immediate, SIMD&FP, pre/post index)\n");
-MEM_TEST("str q17, [x5], #-32", 16, 0);
-MEM_TEST("str d17, [x5], #-32", 16, 0);
-MEM_TEST("str s17, [x5], #-32", 16, 0);
-//MEM_TEST("str h17, [x5], #-32", 16, 0);
-//MEM_TEST("str b17, [x5], #-32", 16, 0);
-MEM_TEST("ldr q17, [x5], #-32", 16, 0);
-MEM_TEST("ldr d17, [x5], #-32", 16, 0);
-MEM_TEST("ldr s17, [x5], #-32", 16, 0);
-//MEM_TEST("ldr h17, [x5], #-32", 16, 0);
-//MEM_TEST("ldr b17, [x5], #-32", 16, 0);
-
-MEM_TEST("str q17, [x5, #-32]!", 16, 0);
-MEM_TEST("str d17, [x5, #-32]!", 16, 0);
-MEM_TEST("str s17, [x5, #-32]!", 16, 0);
-//MEM_TEST("str h17, [x5, #-32]!", 16, 0);
-//MEM_TEST("str b17, [x5, #-32]!", 16, 0);
-MEM_TEST("ldr q17, [x5, #-32]!", 16, 0);
-MEM_TEST("ldr d17, [x5, #-32]!", 16, 0);
-MEM_TEST("ldr s17, [x5, #-32]!", 16, 0);
-//MEM_TEST("ldr h17, [x5, #-32]!", 16, 0);
-//MEM_TEST("ldr b17, [x5, #-32]!", 16, 0);
-
-
-////////////////////////////////////////////////////////////////
-printf("LDUR/STUR (unscaled offset, SIMD&FP)\n");
-MEM_TEST("str q17, [x5, #-13]", 16, 0);
-MEM_TEST("str d17, [x5, #-13]", 16, 0);
-MEM_TEST("str s17, [x5, #-13]", 16, 0);
-//MEM_TEST("str h17, [x5, #-13]", 16, 0);
-//MEM_TEST("str b17, [x5, #-13]", 16, 0);
-MEM_TEST("ldr q17, [x5, #-13]", 16, 0);
-MEM_TEST("ldr d17, [x5, #-13]", 16, 0);
-MEM_TEST("ldr s17, [x5, #-13]", 16, 0);
-//MEM_TEST("ldr h17, [x5, #-13]", 16, 0);
-//MEM_TEST("ldr b17, [x5, #-13]", 16, 0);
-
-////////////////////////////////////////////////////////////////
-printf("LDR (literal, SIMD&FP) (entirely MISSING)\n");
-
-////////////////////////////////////////////////////////////////
-printf("LD1/ST1 (single structure, no offset)\n");
-MEM_TEST("st1 {v17.2d}, [x5]", 3, 0)
-MEM_TEST("st1 {v17.4s}, [x5]", 5, 0)
-MEM_TEST("st1 {v17.8h}, [x5]", 7, 0)
-MEM_TEST("st1 {v17.16b}, [x5]", 13, 0)
-MEM_TEST("st1 {v17.1d}, [x5]", 3, 0)
-MEM_TEST("st1 {v17.2s}, [x5]", 5, 0)
-MEM_TEST("st1 {v17.4h}, [x5]", 7, 0)
-MEM_TEST("st1 {v17.8b}, [x5]", 13, 0)
-
-MEM_TEST("ld1 {v17.2d}, [x5]", 3, 0)
-MEM_TEST("ld1 {v17.4s}, [x5]", 5, 0)
-MEM_TEST("ld1 {v17.8h}, [x5]", 7, 0)
-MEM_TEST("ld1 {v17.16b}, [x5]", 13, 0)
-MEM_TEST("ld1 {v17.1d}, [x5]", 3, 0)
-MEM_TEST("ld1 {v17.2s}, [x5]", 5, 0)
-MEM_TEST("ld1 {v17.4h}, [x5]", 7, 0)
-MEM_TEST("ld1 {v17.8b}, [x5]", 13, 0)
-
-////////////////////////////////////////////////////////////////
-printf("LD1/ST1 (single structure, post index)\n");
-MEM_TEST("st1 {v17.2d}, [x5], #16", 3, 0)
-MEM_TEST("st1 {v17.4s}, [x5], #16", 5, 0)
-MEM_TEST("st1 {v17.8h}, [x5], #16", 7, 0)
-MEM_TEST("st1 {v17.16b}, [x5], #16", 13, 0)
-MEM_TEST("st1 {v17.1d}, [x5], #8", 3, 0)
-MEM_TEST("st1 {v17.2s}, [x5], #8", 5, 0)
-MEM_TEST("st1 {v17.4h}, [x5], #8", 7, 0)
-MEM_TEST("st1 {v17.8b}, [x5], #8", 13, 0)
-
-MEM_TEST("ld1 {v17.2d}, [x5], #16", 3, 0)
-MEM_TEST("ld1 {v17.4s}, [x5], #16", 5, 0)
-MEM_TEST("ld1 {v17.8h}, [x5], #16", 7, 0)
-MEM_TEST("ld1 {v17.16b}, [x5], #16", 13, 0)
-MEM_TEST("ld1 {v17.1d}, [x5], #8", 3, 0)
-MEM_TEST("ld1 {v17.2s}, [x5], #8", 5, 0)
-MEM_TEST("ld1 {v17.4h}, [x5], #8", 7, 0)
-MEM_TEST("ld1 {v17.8b}, [x5], #8", 13, 0)
-
-////////////////////////////////////////////////////////////////
-printf("LD1R (single structure, replicate)\n");
-MEM_TEST("ld1r {v17.2d}, [x5]", 3, -5)
-MEM_TEST("ld1r {v17.1d}, [x5]", 3, -4)
-MEM_TEST("ld1r {v17.4s}, [x5]", 3, -3)
-MEM_TEST("ld1r {v17.2s}, [x5]", 3, -2)
-MEM_TEST("ld1r {v17.8h}, [x5]", 3, -1)
-MEM_TEST("ld1r {v17.4h}, [x5]", 3, 1)
-MEM_TEST("ld1r {v17.16b}, [x5]", 3, 2)
-MEM_TEST("ld1r {v17.8b}, [x5]", 3, 3)
-
-MEM_TEST("ld1r {v17.2d}, [x5], #8", 3, -5)
-MEM_TEST("ld1r {v17.1d}, [x5], #8", 3, -4)
-MEM_TEST("ld1r {v17.4s}, [x5], #4", 3, -3)
-MEM_TEST("ld1r {v17.2s}, [x5], #4", 3, -2)
-MEM_TEST("ld1r {v17.8h}, [x5], #2", 3, -1)
-MEM_TEST("ld1r {v17.4h}, [x5], #2", 3, 1)
-MEM_TEST("ld1r {v17.16b}, [x5], #1", 3, 2)
-MEM_TEST("ld1r {v17.8b}, [x5], #1", 3, 3)
-
-MEM_TEST("ld1r {v17.2d}, [x5], x6", 3, -5)
-MEM_TEST("ld1r {v17.1d}, [x5], x6", 3, -4)
-MEM_TEST("ld1r {v17.4s}, [x5], x6", 3, -3)
-MEM_TEST("ld1r {v17.2s}, [x5], x6", 3, -2)
-MEM_TEST("ld1r {v17.8h}, [x5], x6", 3, -1)
-MEM_TEST("ld1r {v17.4h}, [x5], x6", 3, 1)
-MEM_TEST("ld1r {v17.16b}, [x5], x6", 3, 2)
-MEM_TEST("ld1r {v17.8b}, [x5], x6", 3, 3)
-
-////////////////////////////////////////////////////////////////
-printf("LD2/ST2 (multiple 2-elem structs to/from 2/regs, post index)"
- " (VERY INCOMPLETE)\n");
-
-MEM_TEST("ld2 {v17.2d, v18.2d}, [x5], #32", 3, 0)
-MEM_TEST("st2 {v17.2d, v18.2d}, [x5], #32", 7, 0)
-
-MEM_TEST("ld2 {v17.4s, v18.4s}, [x5], #32", 13, 0)
-MEM_TEST("st2 {v17.4s, v18.4s}, [x5], #32", 17, 0)
-
-
-////////////////////////////////////////////////////////////////
-printf("LD1/ST1 (multiple 1-elem structs to/from 2 regs, no offset)"
- " (VERY INCOMPLETE)\n");
-
-MEM_TEST("ld1 {v17.16b, v18.16b}, [x5]", 3, 0)
-MEM_TEST("st1 {v17.16b, v18.16b}, [x5]", 7, 0)
-
-
-////////////////////////////////////////////////////////////////
-printf("LD1/ST1 (multiple 1-elem structs to/from 2 regs, post index)"
- " (VERY INCOMPLETE)\n");
-
-MEM_TEST("ld1 {v17.16b, v18.16b}, [x5], #32", 3, 0)
-MEM_TEST("st1 {v17.16b, v18.16b}, [x5], #32", 7, 0)
-
-
-////////////////////////////////////////////////////////////////
-printf("LD1/ST1 (multiple 1-elem structs to/from 3 regs, no offset)"
- " (VERY INCOMPLETE)\n");
-
-MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b}, [x5]", 3, 0)
-MEM_TEST("st1 {v17.16b, v18.16b, v19.16b}, [x5]", 7, 0)
-
-
-////////////////////////////////////////////////////////////////
-printf("LD3/ST3 (multiple 3-elem structs to/from 3/regs, post index)"
- " (VERY INCOMPLETE)\n");
-
-MEM_TEST("ld3 {v17.2d, v18.2d, v19.2d}, [x5], #48", 13, 0)
-MEM_TEST("st3 {v17.2d, v18.2d, v19.2d}, [x5], #48", 17, 0)
-
-
-
-} /* end of test_memory2() */
-
-////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////
-
int main ( void )
{
if (1) test_arith();
- if (1) test_memory();
- if (1) test_memory2();
return 0;
}
Modified: trunk/none/tests/arm64/integer.stdout.exp
==============================================================================
--- trunk/none/tests/arm64/integer.stdout.exp (original)
+++ trunk/none/tests/arm64/integer.stdout.exp Mon Sep 1 09:35:42 2014
@@ -2000,7685 +2000,3 @@
smsubl x14,w15,w16,x17 :: rd 728a1d8a96c26c68 rm a6325ae016fbd710, rn f0211fade82d1008, ra 70668d1659e224e8, cin 0, nzcv 00000000
smsubl x14,w15,w16,x17 :: rd 5399710b490151b6 rm 1f1dd8017f191501, rn f69aef71040bfeab, ra 559bc9e2fca45761, cin 0, nzcv 00000000
smsubl x14,w15,w16,x17 :: rd a6de96c8aaae46b7 rm 389ce2f3140cec0c, rn 7a3ab866f2dcd171, ra a5d72d6243684403, cin 0, nzcv 00000000
-Integer loads
-LDR,STR (immediate, uimm12) (STR cases are MISSING)ldr x21, [x22, #24] :: rd 8f8e8d8c8b8a8988 rn (hidden), cin 0, nzcv 00000000
-ldr w21, [x22, #20] :: rd 0000000087868584 rn (hidden), cin 0, nzcv 00000000
-ldrh w21, [x22, #44] :: rd 0000000000009d9c rn (hidden), cin 0, nzcv 00000000
-ldrb w21, [x22, #56] :: rd 00000000000000a8 rn (hidden), cin 0, nzcv 00000000
-LDUR,STUR (immediate, simm9) (STR cases and wb check are MISSING)
-ldr x21, [x22], #-24 :: rd f7f6f5f4f3f2f1f0 rn (hidden), cin 0, nzcv 00000000
-ldr x21, [x22, #-40]! :: rd cfcecdcccbcac9c8 rn (hidden), cin 0, nzcv 00000000
-ldr x21, [x22, #-48] :: rd c7c6c5c4c3c2c1c0 rn (hidden), cin 0, nzcv 00000000
-LDUR,STUR (immediate, simm9): STR cases are MISSINGLDP,STP (immediate, simm7) (STR cases and wb check is MISSING)
-ldp x21, x28, [x22], #-24 ; add x21,x21,x28 :: rd f7f5f3f1efedebe8 rn (hidden), cin 0, nzcv 00000000
-ldp x21, x28, [x22], #-24 ; eor x21,x21,x28 :: rd 0808080808080808 rn (hidden), cin 0, nzcv 00000000
-ldp x21, x28, [x22, #-40]! ; add x21,x21,x28 :: rd a7a5a3a19f9d9b98 rn (hidden), cin 0, nzcv 00000000
-ldp x21, x28, [x22, #-40]! ; eor x21,x21,x28 :: rd 1818181818181818 rn (hidden), cin 0, nzcv 00000000
-ldp x21, x28, [x22, #-40] ; add x21,x21,x28 :: rd a7a5a3a19f9d9b98 rn (hidden), cin 0, nzcv 00000000
-ldp x21, x28, [x22, #-40] ; eor x21,x21,x28 :: rd 1818181818181818 rn (hidden), cin 0, nzcv 00000000
-ldp w21, w28, [x22], #-24 ; add x21,x21,x28 :: rd 00000001ebe9e7e4 rn (hidden), cin 0, nzcv 00000000
-ldp w21, w28, [x22], #-24 ; eor x21,x21,x28 :: rd 0000000004040404 rn (hidden), cin 0, nzcv 00000000
-ldp w21, w28, [x22, #-40]! ; add x21,x21,x28 :: rd 000000019b999794 rn (hidden), cin 0, nzcv 00000000
-ldp w21, w28, [x22, #-40]! ; eor x21,x21,x28 :: rd 0000000004040404 rn (hidden), cin 0, nzcv 00000000
-ldp w21, w28, [x22, #-40] ; add x21,x21,x28 :: rd 000000019b999794 rn (hidden), cin 0, nzcv 00000000
-ldp w21, w28, [x22, #-40] ; eor x21,x21,x28 :: rd 0000000004040404 rn (hidden), cin 0, nzcv 00000000
-LDR (literal, int reg)
-xyzzy00: ldr x21, xyzzy00 - 8 :: rd aa0003f6d51b4203 rn (hidden), cin 0, nzcv 00000000
-xyzzy01: ldr x21, xyzzy01 + 0 :: rd aa1503e258000015 rn (hidden), cin 0, nzcv 00000000
-xyzzy02: ldr x21, xyzzy02 + 8 :: rd 911e43a0d53b4201 rn (hidden), cin 0, nzcv 00000000
-xyzzy03: ldr x21, xyzzy03 - 4 :: rd 58fffff5aa0003f6 rn (hidden), cin 0, nzcv 00000000
-xyzzy04: ldr x21, xyzzy04 + 0 :: rd aa1503e258000015 rn (hidden), cin 0, nzcv 00000000
-xyzzy05: ldr x21, xyzzy05 + 4 :: rd d53b4201aa1503e2 rn (hidden), cin 0, nzcv 00000000
-{LD,ST}R (integer register) (entirely MISSING)
-LDRS{B,H,W} (uimm12)
-ldrsw x21, [x22, #24] :: rd ffffffff8b8a8988 rn (hidden), cin 0, nzcv 00000000
-ldrsh x21, [x22, #20] :: rd ffffffffffff8584 rn (hidden), cin 0, nzcv 00000000
-ldrsh w21, [x22, #44] :: rd 00000000ffff9d9c rn (hidden), cin 0, nzcv 00000000
-ldrsb x21, [x22, #88] :: rd ffffffffffffffc8 rn (hidden), cin 0, nzcv 00000000
-ldrsb w21, [x22, #56] :: rd 00000000ffffffa8 rn (hidden), cin 0, nzcv 00000000
-LDRS{B,H,W} (simm9, upd) (upd check is MISSING)
-ldrsw x21, [x22, #-24]! :: rd ffffffffdbdad9d8 rn (hidden), cin 0, nzcv 00000000
-ldrsh x21, [x22, #-20]! :: rd ffffffffffffdddc rn (hidden), cin 0, nzcv 00000000
-ldrsh w21, [x22, #-44]! :: rd 00000000ffffc5c4 rn (hidden), cin 0, nzcv 00000000
-ldrsb x21, [x22, #-88]! :: rd ffffffffffffff98 rn (hidden), cin 0, nzcv 00000000
-ldrsb w21, [x22, #-56]! :: rd 00000000ffffffb8 rn (hidden), cin 0, nzcv 00000000
-ldrsw x21, [x22], #-24 :: rd fffffffff3f2f1f0 rn (hidden), cin 0, nzcv 00000000
-ldrsh x21, [x22], #-20 :: rd fffffffffffff1f0 rn (hidden), cin 0, nzcv 00000000
-ldrsh w21, [x22], #-44 :: rd 00000000fffff1f0 rn (hidden), cin 0, nzcv 00000000
-ldrsb x21, [x22], #-88 :: rd fffffffffffffff0 rn (hidden), cin 0, nzcv 00000000
-ldrsb w21, [x22], #-56 :: rd 00000000fffffff0 rn (hidden), cin 0, nzcv 00000000
-LDRS{B,H,W} (simm9, noUpd)
-ldrsw x21, [x22, #-24] :: rd ffffffffdbdad9d8 rn (hidden), cin 0, nzcv 00000000
-ldrsh x21, [x22, #-20] :: rd ffffffffffffdddc rn (hidden), cin 0, nzcv 00000000
-ldrsh w21, [x22, #-44] :: rd 00000000ffffc5c4 rn (hidden), cin 0, nzcv 00000000
-ldrsb x21, [x22, #-88] :: rd ffffffffffffff98 rn (hidden), cin 0, nzcv 00000000
-ldrsb w21, [x22, #-56] :: rd 00000000ffffffb8 rn (hidden), cin 0, nzcv 00000000
-LDP,STP (immediate, simm7) (FP&VEC) (entirely MISSING)
-{LD,ST}R (vector register) (entirely MISSING)
-LDRS{B,H,W} (integer register, SX)
-ldrsw x21, [x22,x23] :: rd fffffffff8f7f6f5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsw x21, [x22,x23, lsl #2] :: rd ffffffff87868584 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsw x21, [x22,w23,uxtw #0] :: rd fffffffff8f7f6f5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsw x21, [x22,w23,uxtw #2] :: rd ffffffff87868584 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsw x21, [x22,w23,sxtw #0] :: rd ffffffffeeedeceb rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsw x21, [x22,w23,sxtw #2] :: rd ffffffffdfdedddc rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsh x21, [x22,x23] :: rd fffffffffffff6f5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsh x21, [x22,x23, lsl #1] :: rd fffffffffffffbfa rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsh x21, [x22,w23,uxtw #0] :: rd fffffffffffff6f5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsh x21, [x22,w23,uxtw #1] :: rd fffffffffffffbfa rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsh x21, [x22,w23,sxtw #0] :: rd ffffffffffffeceb rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsh x21, [x22,w23,sxtw #1] :: rd ffffffffffffe7e6 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsh w21, [x22,x23] :: rd 00000000fffff6f5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsh w21, [x22,x23, lsl #1] :: rd 00000000fffffbfa rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsh w21, [x22,w23,uxtw #0] :: rd 00000000fffff6f5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsh w21, [x22,w23,uxtw #1] :: rd 00000000fffffbfa rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsh w21, [x22,w23,sxtw #0] :: rd 00000000ffffeceb rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsh w21, [x22,w23,sxtw #1] :: rd 00000000ffffe7e6 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsb x21, [x22,x23] :: rd fffffffffffffff5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsb x21, [x22,x23, lsl #0] :: rd fffffffffffffff5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsb x21, [x22,w23,uxtw #0] :: rd fffffffffffffff5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsb x21, [x22,w23,uxtw #0] :: rd fffffffffffffff5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsb x21, [x22,w23,sxtw #0] :: rd ffffffffffffffeb rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsb x21, [x22,w23,sxtw #0] :: rd ffffffffffffffeb rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsb w21, [x22,x23] :: rd 00000000fffffff5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsb w21, [x22,x23, lsl #0] :: rd 00000000fffffff5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsb w21, [x22,w23,uxtw #0] :: rd 00000000fffffff5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsb w21, [x22,w23,uxtw #0] :: rd 00000000fffffff5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsb w21, [x22,w23,sxtw #0] :: rd 00000000ffffffeb rm (hidden), rn (hidden), cin 0, nzcv 00000000
-ldrsb w21, [x22,w23,sxtw #0] :: rd 00000000ffffffeb rm (hidden), rn (hidden), cin 0, nzcv 00000000
-LDR/STR (immediate, SIMD&FP, unsigned offset) (entirely MISSING)
-LDR/STR (immediate, SIMD&FP, pre/post index) (entirely MISSING)
-LDUR/STUR (unscaled offset, SIMD&FP) (entirely MISSING)
-LDR (literal, SIMD&FP) (entirely MISSING)
-LD1/ST1 (single structure, no offset) (entirely MISSING)
-LD1/ST1 (single structure, post index) (entirely MISSING)
-LD{,A}X{R,RH,RB} (entirely MISSING)
-ST{,L}X{R,RH,RB} (entirely MISSING)
-LDA{R,RH,RB}
-ldar x21, [x22] :: rd f7f6f5f4f3f2f1f0 rn (hidden), cin 0, nzcv 00000000
-ldar w21, [x22] :: rd 00000000f3f2f1f0 rn (hidden), cin 0, nzcv 00000000
-ldarh w21, [x22] :: rd 000000000000f1f0 rn (hidden), cin 0, nzcv 00000000
-ldarb w21, [x22] :: rd 00000000000000f0 rn (hidden), cin 0, nzcv 00000000
-STL{R,RH,RB} (entirely MISSING)
-LDR,STR (immediate, uimm12)ldr x13, [x5, #24] with x5 = middle_of_block+-1, x6=0
- [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [128] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [144] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [160] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [176] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [192] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [208] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [224] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [240] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- 37c6ea00e0f4f257 x13 (xor, xfer intreg #1)
- 0000000000000000 x23 (xor, xfer intreg #2)
- 0000000000000000 v17.d[0] (xor, xfer vecreg #1)
- 0000000000000000 v17.d[1] (xor, xfer vecreg #1)
- 0000000000000000 v18.d[0] (xor, xfer vecreg #2)
- 0000000000000000 v18.d[1] (xor, xfer vecreg #2)
- 0000000000000000 v19.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v19.d[1] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[1] (xor, xfer vecreg #3)
- 0 x5 (sub, base reg)
- 0 x6 (sub, index reg)
-
-ldr w13, [x5, #20] with x5 = middle_of_block+1, x6=0
- [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [128] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [144] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [160] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [176] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [192] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [208] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [224] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [240] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- 663cba29f1fe102a x13 (xor, xfer intreg #1)
- 0000000000000000 x23 (xor, xfer intreg #2)
- 0000000000000000 v17.d[0] (xor, xfer vecreg #1)
- 0000000000000000 v17.d[1] (xor, xfer vecreg #1)
- 0000000000000000 v18.d[0] (xor, xfer vecreg #2)
- 0000000000000000 v18.d[1] (xor, xfer vecreg #2)
- 0000000000000000 v19.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v19.d[1] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[1] (xor, xfer vecreg #3)
- 0 x5 (sub, base reg)
- 0 x6 (sub, index reg)
-
-ldrh w13, [x5, #44] with x5 = middle_of_block+2, x6=0
- [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [128] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [144] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [160] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [176] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [192] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [208] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [224] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [240] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- 74b2685cb1630837 x13 (xor, xfer intreg #1)
- 0000000000000000 x23 (xor, xfer intreg #2)
- 0000000000000000 v17.d[0] (xor, xfer vecreg #1)
- 0000000000000000 v17.d[1] (xor, xfer vecreg #1)
- 0000000000000000 v18.d[0] (xor, xfer vecreg #2)
- 0000000000000000 v18.d[1] (xor, xfer vecreg #2)
- 0000000000000000 v19.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v19.d[1] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[1] (xor, xfer vecreg #3)
- 0 x5 (sub, base reg)
- 0 x6 (sub, index reg)
-
-ldrb w13, [x5, #56] with x5 = middle_of_block+3, x6=0
- [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [128] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [144] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [160] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [176] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [192] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [208] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [224] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [240] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- bf73927edcc8e3a7 x13 (xor, xfer intreg #1)
- 0000000000000000 x23 (xor, xfer intreg #2)
- 0000000000000000 v17.d[0] (xor, xfer vecreg #1)
- 0000000000000000 v17.d[1] (xor, xfer vecreg #1)
- 0000000000000000 v18.d[0] (xor, xfer vecreg #2)
- 0000000000000000 v18.d[1] (xor, xfer vecreg #2)
- 0000000000000000 v19.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v19.d[1] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[1] (xor, xfer vecreg #3)
- 0 x5 (sub, base reg)
- 0 x6 (sub, index reg)
-
-str x13, [x5, #24] with x5 = middle_of_block+-3, x6=0
- [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [128] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [144] .. .. .. .. .. 3d b5 fe cd 8f 1e a7 32 .. .. ..
- [160] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [176] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [192] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [208] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [224] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [240] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- 0000000000000000 x13 (xor, xfer intreg #1)
- 0000000000000000 x23 (xor, xfer intreg #2)
- 0000000000000000 v17.d[0] (xor, xfer vecreg #1)
- 0000000000000000 v17.d[1] (xor, xfer vecreg #1)
- 0000000000000000 v18.d[0] (xor, xfer vecreg #2)
- 0000000000000000 v18.d[1] (xor, xfer vecreg #2)
- 0000000000000000 v19.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v19.d[1] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[1] (xor, xfer vecreg #3)
- 0 x5 (sub, base reg)
- 0 x6 (sub, index reg)
-
-str w13, [x5, #20] with x5 = middle_of_block+5, x6=0
- [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [128] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [144] .. .. .. .. .. .. .. .. .. fb 48 5c 15 .. .. ..
- [160] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [176] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [192] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [208] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [224] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [240] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- 0000000000000000 x13 (xor, xfer intreg #1)
- 0000000000000000 x23 (xor, xfer intreg #2)
- 0000000000000000 v17.d[0] (xor, xfer vecreg #1)
- 0000000000000000 v17.d[1] (xor, xfer vecreg #1)
- 0000000000000000 v18.d[0] (xor, xfer vecreg #2)
- 0000000000000000 v18.d[1] (xor, xfer vecreg #2)
- 0000000000000000 v19.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v19.d[1] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[1] (xor, xfer vecreg #3)
- 0 x5 (sub, base reg)
- 0 x6 (sub, index reg)
-
-strh w13, [x5, #44] with x5 = middle_of_block+6, x6=0
- [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [128] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [144] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [160] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [176] .. .. .. 43 .. .. .. .. .. .. .. .. .. .. .. ..
- [192] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [208] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [224] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [240] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- 0000000000000000 x13 (xor, xfer intreg #1)
- 0000000000000000 x23 (xor, xfer intreg #2)
- 0000000000000000 v17.d[0] (xor, xfer vecreg #1)
- 0000000000000000 v17.d[1] (xor, xfer vecreg #1)
- 0000000000000000 v18.d[0] (xor, xfer vecreg #2)
- 0000000000000000 v18.d[1] (xor, xfer vecreg #2)
- 0000000000000000 v19.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v19.d[1] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[1] (xor, xfer vecreg #3)
- 0 x5 (sub, base reg)
- 0 x6 (sub, index reg)
-
-strb w13, [x5, #56] with x5 = middle_of_block+7, x6=0
- [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [128] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [144] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [160] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [176] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. bd
- [192] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [208] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [224] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [240] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- 0000000000000000 x13 (xor, xfer intreg #1)
- 0000000000000000 x23 (xor, xfer intreg #2)
- 0000000000000000 v17.d[0] (xor, xfer vecreg #1)
- 0000000000000000 v17.d[1] (xor, xfer vecreg #1)
- 0000000000000000 v18.d[0] (xor, xfer vecreg #2)
- 0000000000000000 v18.d[1] (xor, xfer vecreg #2)
- 0000000000000000 v19.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v19.d[1] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[1] (xor, xfer vecreg #3)
- 0 x5 (sub, base reg)
- 0 x6 (sub, index reg)
-
-LDUR,STUR (immediate, simm9)
-ldr x13, [x5], #-24 with x5 = middle_of_block+0, x6=0
- [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [128] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [144] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [160] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [176] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [192] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [208] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [224] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [240] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- 5e602f48b53d6e42 x13 (xor, xfer intreg #1)
- 0000000000000000 x23 (xor, xfer intreg #2)
- 0000000000000000 v17.d[0] (xor, xfer vecreg #1)
- 0000000000000000 v17.d[1] (xor, xfer vecreg #1)
- 0000000000000000 v18.d[0] (xor, xfer vecreg #2)
- 0000000000000000 v18.d[1] (xor, xfer vecreg #2)
- 0000000000000000 v19.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v19.d[1] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[0] (xor, xfer vecreg #3)
- 0000000000000000 v20.d[1] (xor, xfer vecreg #3)
- -24 x5 (sub, base reg)
- 0 x6 (sub, index reg)
-
-ldr x13, [x5, #-40]! with x5 = middle_of_block+0, x6=0
- [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [128] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [144] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [160] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [176] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [192] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [208] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. ..
- [224] .. .. .. .. .. ....
[truncated message content] |
|
From: <sv...@va...> - 2014-09-01 08:41:51
|
Author: sewardj
Date: Mon Sep 1 08:41:43 2014
New Revision: 14402
Log:
Remove unused variable.
Modified:
trunk/coregrind/m_syswrap/syswrap-arm64-linux.c
Modified: trunk/coregrind/m_syswrap/syswrap-arm64-linux.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-arm64-linux.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-arm64-linux.c Mon Sep 1 08:41:43 2014
@@ -220,8 +220,6 @@
Int* child_tidptr,
Addr child_tls )
{
- const Bool debug = False;
-
ThreadId ctid = VG_(alloc_ThreadState)();
ThreadState* ptst = VG_(get_ThreadState)(ptid);
ThreadState* ctst = VG_(get_ThreadState)(ctid);
|
|
From: <sv...@va...> - 2014-09-01 06:37:19
|
Author: florian
Date: Mon Sep 1 06:37:07 2014
New Revision: 14401
Log:
Deprecate --db-attach Fixes BZ #337871
Modified:
trunk/NEWS
trunk/coregrind/m_main.c
trunk/docs/internals/3_9_BUGSTATUS.txt
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Mon Sep 1 06:37:07 2014
@@ -2,6 +2,13 @@
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3.10.0 is not yet released.
+* ================== DEPRECATED FEATURES =================
+
+* --db-attach is now a deprecated feature which will be removed in the
+ next valgrind release (not counting bug-fix releases). The vgdb
+ capabilities are superior and should be used instead. Learn more here:
+ http://valgrind.org/docs/manual/manual-core-adv.html#manual-core-adv.gdbserver
+
* ================== PLATFORM CHANGES =================
* Support for Android on MIPS32.
@@ -231,6 +238,7 @@
337094 ifunc wrapper is broken on ppc64
337285 fcntl commands F_OFD_SETLK, F_OFD_SETLKW, and F_OFD_GETLK not supported
337528 leak check heuristic for block prefixed by length as 64bit number
+337871 deprecate --db-attach
338024 inlined functions are not shown if DW_AT_ranges is used
338115 DRD: computed conflict set differs from actual after fork
338160 implement display of thread local storage in gdbsrv
Modified: trunk/coregrind/m_main.c
==============================================================================
--- trunk/coregrind/m_main.c (original)
+++ trunk/coregrind/m_main.c Mon Sep 1 06:37:07 2014
@@ -132,6 +132,7 @@
" --suppressions=<filename> suppress errors described in <filename>\n"
" --gen-suppressions=no|yes|all print suppressions for errors? [no]\n"
" --db-attach=no|yes start debugger when errors detected? [no]\n"
+" Note: deprecated feature\n"
" --db-command=<command> command to start debugger [%s -nw %%f %%p]\n"
" --input-fd=<number> file descriptor for input [0=stdin]\n"
" --dsymutil=no|yes run dsymutil on Mac OS X when helpful? [no]\n"
@@ -815,6 +816,11 @@
/* END command-line processing loop */
+ /* Notify about deprecated features */
+ if (VG_(clo_db_attach))
+ VG_(umsg)("\nWarning: --db-attach is a deprecated feature which will be removed\n"
+ " in the next release. Use --vgdb-errors=1 instead\n\n");
+
/* Determine the path prefix for vgdb */
if (VG_(clo_vgdb_prefix) == NULL)
VG_(clo_vgdb_prefix) = VG_(vgdb_prefix_default)();
Modified: trunk/docs/internals/3_9_BUGSTATUS.txt
==============================================================================
--- trunk/docs/internals/3_9_BUGSTATUS.txt (original)
+++ trunk/docs/internals/3_9_BUGSTATUS.txt Mon Sep 1 06:37:07 2014
@@ -171,7 +171,6 @@
=== GDB server =========================================================
328081 embedded gdbserver and non-stop mode (wishlist)
-337871 deprecate --db-attach=yes in favor of --vgdb-debug=1
338633 gdbserver_tests/nlcontrolc.vgtest hangs on arm64
=== Output =============================================================
|
|
From: <sv...@va...> - 2014-09-01 06:31:05
|
Author: florian
Date: Mon Sep 1 06:30:34 2014
New Revision: 14400
Log:
Update list of ignored files.
Modified:
trunk/none/tests/arm64/ (props changed)
|