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From: <sv...@va...> - 2014-08-17 20:07:43
|
Author: philippe
Date: Sun Aug 17 20:07:36 2014
New Revision: 14302
Log:
Announce in NEWS the change of behaviour (i.e. validity checking)
for the clo options --kernel-variant and --sim-hints
Modified:
trunk/NEWS
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Sun Aug 17 20:07:36 2014
@@ -96,6 +96,9 @@
If an object contains both CFI and EXIDX unwind information, Valgrind
will prefer the CFI over the EXIDX.
+* Typos or unknown values in --sim-hints and --kernel-variant command
+ line options are now detected and reported to the user as a usage error.
+
* ==================== FIXED BUGS ====================
The following bugs have been fixed or resolved. Note that "n-i-bz"
|
|
From: <sv...@va...> - 2014-08-17 20:04:05
|
Author: philippe
Date: Sun Aug 17 20:03:51 2014
New Revision: 14301
Log:
The attached patch cleanups the clo processing
of clo which are (or should be) 'enum set'.
* pub_tool_options.h : add new macrox VG_USET_CLO and VG_USETX_CLO to
parse an 'enum set' command line option (with or without "all" keyword).
* use VG_USET_CLO for existing enum set clo options:
memcheck --errors-for-leak-kinds, --show-leak-kinds, --leak-check-heuristics
coregrind --vgdb-stop-at
* change --sim-hints and --kernel-variants to enum set
(this allows to detect user typos: currently, a typo in a sim-hint
or kernel variant is silently ignored. Now, an error will be given
to the user)
* The 2 new sets (--sim-hints and --kernel-variants) should not make
use of the 'all' keyword => VG_(parse_enum_set) has a new argument
to enable/disable the use of the "all" keyword.
* The macros defining an 'all enum' set definition was duplicating
all enum values (so addition of a new enum value could easily
give a bug). Removing these macros as they are unused
(to the exception of the leak-kind set).
For this set, the 'all macro' has been replaced by an 'all function',
coded using parse_enum_set parsing the "all" keyword.
Modified:
trunk/coregrind/m_libcbase.c
trunk/coregrind/m_libcprint.c
trunk/coregrind/m_main.c
trunk/coregrind/m_options.c
trunk/coregrind/m_syswrap/priv_types_n_macros.h
trunk/coregrind/m_syswrap/syswrap-amd64-linux.c
trunk/coregrind/m_syswrap/syswrap-generic.c
trunk/coregrind/m_syswrap/syswrap-x86-linux.c
trunk/coregrind/pub_core_options.h
trunk/include/pub_tool_libcbase.h
trunk/include/pub_tool_options.h
trunk/memcheck/mc_errors.c
trunk/memcheck/mc_include.h
trunk/memcheck/mc_main.c
trunk/none/tests/cmdline1.stdout.exp
trunk/none/tests/cmdline2.stdout.exp
Modified: trunk/coregrind/m_libcbase.c
==============================================================================
--- trunk/coregrind/m_libcbase.c (original)
+++ trunk/coregrind/m_libcbase.c Sun Aug 17 20:03:51 2014
@@ -521,6 +521,7 @@
}
Bool VG_(parse_enum_set) ( const HChar *tokens,
+ Bool allow_all,
const HChar *input,
UInt *enum_set)
{
@@ -549,7 +550,7 @@
input_word;
input_word = VG_(strtok_r)(NULL, ",", &input_saveptr)) {
word_nr++;
- if (0 == VG_(strcmp)(input_word, "all")) {
+ if (allow_all && 0 == VG_(strcmp)(input_word, "all")) {
seen_all_kw = True;
known_words++;
} else if (0 == VG_(strcmp)(input_word, "none")) {
Modified: trunk/coregrind/m_libcprint.c
==============================================================================
--- trunk/coregrind/m_libcprint.c (original)
+++ trunk/coregrind/m_libcprint.c Sun Aug 17 20:03:51 2014
@@ -422,7 +422,8 @@
// (useful to run regression tests in an outer/inner setup
// and avoid the diff failing due to these unexpected '>').
depth = RUNNING_ON_VALGRIND;
- if (depth > 0 && !VG_(strstr)(VG_(clo_sim_hints), "no-inner-prefix")) {
+ if (depth > 0
+ && !SimHintiS(SimHint_no_inner_prefix, VG_(clo_sim_hints))) {
if (depth > 10)
depth = 10; // ?!?!
for (i = 0; i < depth; i++) {
Modified: trunk/coregrind/m_main.c
==============================================================================
--- trunk/coregrind/m_main.c (original)
+++ trunk/coregrind/m_main.c Sun Aug 17 20:03:51 2014
@@ -174,11 +174,13 @@
" --vgdb-shadow-registers=no|yes let gdb see the shadow registers [no]\n"
" --vgdb-prefix=<prefix> prefix for vgdb FIFOs [%s]\n"
" --run-libc-freeres=no|yes free up glibc memory at exit on Linux? [yes]\n"
-" --sim-hints=hint1,hint2,... known hints:\n"
-" lax-ioctls, enable-outer, fuse-compatible [none]\n"
+" --sim-hints=hint1,hint2,... activate unusual sim behaviours [none] \n"
+" where hint is one of no-inner-prefix lax-ioctls enable-outer\n"
+" fuse-compatible none\n"
" --fair-sched=no|yes|try schedule threads fairly on multicore systems [no]\n"
-" --kernel-variant=variant1,variant2,... known variants: bproc [none]\n"
-" handle non-standard kernel variants\n"
+" --kernel-variant=variant1,variant2,... handle non-standard kernel"
+ " variants [none]\n"
+" where variant is one of bproc none\n"
" --merge-recursive-frames=<number> merge frames between identical\n"
" program counters in max <number> frames) [0]\n"
" --num-transtab-sectors=<number> size of translated code cache [%d]\n"
@@ -376,7 +378,10 @@
// Set up VG_(clo_sim_hints). This is needed a.o. for an inner
// running in an outer, to have "no-inner-prefix" enabled
// as early as possible.
- else if VG_STR_CLO (str, "--sim-hints", VG_(clo_sim_hints)) {}
+ else if VG_USETX_CLO (str, "--sim-hints",
+ "no-inner-prefix,fuse-compatible,"
+ "lax-ioctls,enable-outer",
+ VG_(clo_sim_hints)) {}
}
}
@@ -545,11 +550,9 @@
}
else if VG_INT_CLO (arg, "--vgdb-poll", VG_(clo_vgdb_poll)) {}
else if VG_INT_CLO (arg, "--vgdb-error", VG_(clo_vgdb_error)) {}
- else if VG_STR_CLO (arg, "--vgdb-stop-at", tmp_str) {
- if (!VG_(parse_enum_set)("startup,exit,valgrindabexit", tmp_str,
- &VG_(clo_vgdb_stop_at)))
- VG_(fmsg_bad_option)(arg, "");
- }
+ else if VG_USET_CLO (arg, "--vgdb-stop-at",
+ "startup,exit,valgrindabexit",
+ VG_(clo_vgdb_stop_at)) {}
else if VG_STR_CLO (arg, "--vgdb-prefix", VG_(clo_vgdb_prefix)) {
VG_(arg_vgdb_prefix) = arg;
}
@@ -622,7 +625,8 @@
VG_(clo_smc_check),
Vg_SmcAllNonFile);
- else if VG_STR_CLO (arg, "--kernel-variant", VG_(clo_kernel_variant)) {}
+ else if VG_USETX_CLO (arg, "--kernel-variant", "bproc",
+ VG_(clo_kernel_variant)) {}
else if VG_BOOL_CLO(arg, "--dsymutil", VG_(clo_dsymutil)) {}
Modified: trunk/coregrind/m_options.c
==============================================================================
--- trunk/coregrind/m_options.c (original)
+++ trunk/coregrind/m_options.c Sun Aug 17 20:03:51 2014
@@ -112,7 +112,7 @@
Int VG_(clo_dump_error) = 0;
Int VG_(clo_backtrace_size) = 12;
Int VG_(clo_merge_recursive_frames) = 0; // default value: no merge
-const HChar* VG_(clo_sim_hints) = NULL;
+UInt VG_(clo_sim_hints) = 0;
Bool VG_(clo_sym_offsets) = False;
Bool VG_(clo_read_inline_info) = False; // Or should be put it to True by default ???
Bool VG_(clo_read_var_info) = False;
@@ -127,7 +127,7 @@
Word VG_(clo_main_stacksize) = 0; /* use client's rlimit.stack */
Bool VG_(clo_wait_for_gdb) = False;
VgSmc VG_(clo_smc_check) = Vg_SmcStack;
-const HChar* VG_(clo_kernel_variant) = NULL;
+UInt VG_(clo_kernel_variant) = 0;
Bool VG_(clo_dsymutil) = False;
Bool VG_(clo_sigill_diag) = True;
UInt VG_(clo_unw_stack_scan_thresh) = 0; /* disabled by default */
Modified: trunk/coregrind/m_syswrap/priv_types_n_macros.h
==============================================================================
--- trunk/coregrind/m_syswrap/priv_types_n_macros.h (original)
+++ trunk/coregrind/m_syswrap/priv_types_n_macros.h Sun Aug 17 20:03:51 2014
@@ -368,8 +368,8 @@
if (VG_(clo_trace_syscalls)) \
VG_(printf)(format, ## args)
-#define FUSE_COMPATIBLE_MAY_BLOCK() \
- if (VG_(strstr)(VG_(clo_sim_hints),"fuse-compatible")) \
+#define FUSE_COMPATIBLE_MAY_BLOCK() \
+ if (SimHintiS(SimHint_fuse_compatible, VG_(clo_sim_hints))) \
*flags |= SfMayBlock
Modified: trunk/coregrind/m_syswrap/syswrap-amd64-linux.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-amd64-linux.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-amd64-linux.c Sun Aug 17 20:03:51 2014
@@ -664,7 +664,7 @@
/* 184 is used by sys_bproc. If we're not on a declared bproc
variant, fail in the usual way, since it is otherwise unused. */
- if (!VG_(strstr)(VG_(clo_kernel_variant), "bproc")) {
+ if (!KernelVariantiS(KernelVariant_bproc, VG_(clo_kernel_variant))) {
PRINT("non-existent syscall! (syscall 184)");
PRE_REG_READ0(long, "ni_syscall(184)");
SET_STATUS_Failure( VKI_ENOSYS );
Modified: trunk/coregrind/m_syswrap/syswrap-generic.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-generic.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-generic.c Sun Aug 17 20:03:51 2014
@@ -3434,7 +3434,7 @@
UInt dir = _VKI_IOC_DIR(request);
UInt size = _VKI_IOC_SIZE(request);
- if (VG_(strstr)(VG_(clo_sim_hints), "lax-ioctls") != NULL) {
+ if (SimHintiS(SimHint_lax_ioctls, VG_(clo_sim_hints))) {
/*
* Be very lax about ioctl handling; the only
* assumption is that the size is correct. Doesn't
@@ -3844,7 +3844,7 @@
--sim-hints=enable-outer (used for self hosting). */
ok = ML_(fd_allowed)(ARG1, "write", tid, False);
if (!ok && ARG1 == 2/*stderr*/
- && VG_(strstr)(VG_(clo_sim_hints),"enable-outer"))
+ && SimHintiS(SimHint_enable_outer, VG_(clo_sim_hints)))
ok = True;
if (!ok)
SET_STATUS_Failure( VKI_EBADF );
Modified: trunk/coregrind/m_syswrap/syswrap-x86-linux.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-x86-linux.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-x86-linux.c Sun Aug 17 20:03:51 2014
@@ -1368,7 +1368,7 @@
/* 223 is used by sys_bproc. If we're not on a declared bproc
variant, fail in the usual way. */
- if (!VG_(strstr)(VG_(clo_kernel_variant), "bproc")) {
+ if (!KernelVariantiS(KernelVariant_bproc, VG_(clo_kernel_variant))) {
PRINT("non-existent syscall! (syscall 223)");
PRE_REG_READ0(long, "ni_syscall(223)");
SET_STATUS_Failure( VKI_ENOSYS );
Modified: trunk/coregrind/pub_core_options.h
==============================================================================
--- trunk/coregrind/pub_core_options.h (original)
+++ trunk/coregrind/pub_core_options.h Sun Aug 17 20:03:51 2014
@@ -36,7 +36,6 @@
// plus some functions and macros for manipulating them. Almost every
// other module imports this one, if only for VG_(clo_verbosity).
//--------------------------------------------------------------------
-
#include "pub_tool_options.h"
/* The max number of suppression files. */
@@ -82,11 +81,6 @@
#define VgdbStopAt2S(a) (1 << (a))
// VgdbStopAt a is member of the Set s ?
#define VgdbStopAtiS(a,s) ((s) & VgdbStopAt2S(a))
-// A set with all VgdbStopAt:
-#define VgdbStopAtallS \
- (VgdbStopAt2S(VgdbStopAt_Startup) \
- | VgdbStopAt2S(VgdbStopAt_Exit) \
- | VgdbStopAt2S(VgdbStopAt_ValgrindAbExit)
extern UInt VG_(clo_vgdb_stop_at); // A set of VgdbStopAt reasons.
/* prefix for the named pipes (FIFOs) used by vgdb/gdb to communicate with valgrind */
@@ -225,8 +219,23 @@
/* DEBUG: display gory details for the k'th most popular error.
default: Infinity. */
extern Int VG_(clo_dump_error);
+
/* Engage miscellaneous weird hacks needed for some progs. */
-extern const HChar* VG_(clo_sim_hints);
+typedef
+ enum {
+ SimHint_no_inner_prefix,
+ SimHint_fuse_compatible,
+ SimHint_lax_ioctls,
+ SimHint_enable_outer
+ }
+ SimHint;
+
+// Build mask to check or set SimHint a membership
+#define SimHint2S(a) (1 << (a))
+// SimHint h is member of the Set s ?
+#define SimHintiS(h,s) ((s) & SimHint2S(h))
+extern UInt VG_(clo_sim_hints);
+
/* Show symbols in the form 'name+offset' ? Default: NO */
extern Bool VG_(clo_sym_offsets);
/* Read DWARF3 inline info ? */
@@ -326,9 +335,17 @@
auto-detected. */
extern VgSmc VG_(clo_smc_check);
-/* String containing comma-separated names of minor kernel variants,
+/* A set of minor kernel variants,
so they can be properly handled by m_syswrap. */
-extern const HChar* VG_(clo_kernel_variant);
+typedef enum {
+ KernelVariant_bproc
+ }
+ KernelVariant;
+// Build mask to check or set KernelVariant a membership
+#define KernelVariant2S(v) (1 << (v))
+// KernelVariant v is member of the Set s ?
+#define KernelVariantiS(v,s) ((s) & KernelVariant2S(v))
+extern UInt VG_(clo_kernel_variant);
/* Darwin-specific: automatically run /usr/bin/dsymutil to update
.dSYM directories as necessary? */
Modified: trunk/include/pub_tool_libcbase.h
==============================================================================
--- trunk/include/pub_tool_libcbase.h (original)
+++ trunk/include/pub_tool_libcbase.h Sun Aug 17 20:03:51 2014
@@ -118,14 +118,16 @@
Using in 'tokens' the special token "-" (a minus character) indicates that
the corresponding bit position cannot be set.
In addition to the words specified in 'tokens', VG_(parse_enum_set)
- automatically accept the words "none" and "all" to indicate respectively
- an empty enum_set (0) or an enum_set with all bits corresponding
- to the words in tokens set.
+ automatically accept the word "none" to indicate an empty enum_set (0).
+ If allow_all, VG_(parse_enum_set) automatically accept the word "all"
+ to indicate an enum_set with all bits corresponding to the words in tokens
+ set.
If "none" or "all" is present in 'input', no other word can be given
in 'input'.
If parsing is successful, returns True and sets *enum_set.
If parsing fails, returns False. */
extern Bool VG_(parse_enum_set) ( const HChar *tokens,
+ Bool allow_all,
const HChar *input,
UInt *enum_set);
Modified: trunk/include/pub_tool_options.h
==============================================================================
--- trunk/include/pub_tool_options.h (original)
+++ trunk/include/pub_tool_options.h Sun Aug 17 20:03:51 2014
@@ -71,6 +71,31 @@
}) \
)
+// UInt enum set arg, eg. --foo=fubar,bar,baz or --foo=none
+// or --foo=all (if qq_all is True)
+#define VG_USETGEN_CLO(qq_arg, qq_option, qq_vals, qq_var, qq_all) \
+ (VG_STREQN(VG_(strlen)(qq_option)+1, qq_arg, qq_option"=") && \
+ ({ \
+ const HChar* val = &(qq_arg)[ VG_(strlen)(qq_option)+1 ]; \
+ if (!VG_(parse_enum_set)(qq_vals, \
+ qq_all,/*allow_all*/ \
+ val, \
+ &(qq_var))) \
+ VG_(fmsg_bad_option)(qq_arg, "%s is an invalid %s set\n", \
+ val, qq_option+2); \
+ True; \
+ }) \
+ )
+
+// UInt enum set arg, eg. --foo=fubar,bar,baz or --foo=none or --foo=all
+#define VG_USET_CLO(qq_arg, qq_option, qq_vals, qq_var) \
+ VG_USETGEN_CLO((qq_arg), qq_option, (qq_vals), (qq_var), True)
+
+/* Same as VG_USET_CLO but not allowing --foo=all.
+ To be used when some or all of the enum set are mutually eXclusive. */
+#define VG_USETX_CLO(qq_arg, qq_option, qq_vals, qq_var) \
+ VG_USETGEN_CLO((qq_arg), qq_option, (qq_vals), (qq_var), False)
+
// Unbounded integer arg, eg. --foo=10
#define VG_INT_CLO(qq_arg, qq_option, qq_var) \
(VG_STREQN(VG_(strlen)(qq_option)+1, qq_arg, qq_option"=") && \
Modified: trunk/memcheck/mc_errors.c
==============================================================================
--- trunk/memcheck/mc_errors.c (original)
+++ trunk/memcheck/mc_errors.c Sun Aug 17 20:03:51 2014
@@ -248,10 +248,23 @@
return loss;
}
-Bool MC_(parse_leak_kinds) ( const HChar* str0, UInt* lks )
+const HChar* MC_(parse_leak_kinds_tokens) =
+ "reachable,possible,indirect,definite";
+
+UInt MC_(all_Reachedness)(void)
{
- return VG_(parse_enum_set)("reachable,possible,indirect,definite",
- str0, lks);
+ static UInt all;
+
+ if (all == 0) {
+ // Compute a set with all values by doing a parsing of the "all" keyword.
+ Bool parseok = VG_(parse_enum_set)(MC_(parse_leak_kinds_tokens),
+ True,/*allow_all*/
+ "all",
+ &all);
+ tl_assert (parseok && all);
+ }
+
+ return all;
}
static const HChar* pp_Reachedness_for_leak_kinds(Reachedness r)
@@ -1317,7 +1330,7 @@
// We might have the optional match-leak-kinds line
MC_LeakSuppExtra* lse;
lse = VG_(malloc)("mc.resi.2", sizeof(MC_LeakSuppExtra));
- lse->match_leak_kinds = RallS;
+ lse->match_leak_kinds = MC_(all_Reachedness)();
lse->blocks_suppressed = 0;
lse->bytes_suppressed = 0;
lse->leak_search_gen = 0;
@@ -1328,7 +1341,9 @@
i = 17;
while ((*bufpp)[i] && VG_(isspace((*bufpp)[i])))
i++;
- if (!MC_(parse_leak_kinds)((*bufpp)+i, &lse->match_leak_kinds)) {
+ if (!VG_(parse_enum_set)(MC_(parse_leak_kinds_tokens),
+ True/*allow_all*/,
+ (*bufpp)+i, &lse->match_leak_kinds)) {
return False;
}
} else {
Modified: trunk/memcheck/mc_include.h
==============================================================================
--- trunk/memcheck/mc_include.h (original)
+++ trunk/memcheck/mc_include.h Sun Aug 17 20:03:51 2014
@@ -279,9 +279,8 @@
#define R2S(r) (1 << (r))
// Reachedness r is member of the Set s ?
#define RiS(r,s) ((s) & R2S(r))
-// A set with all Reachedness:
-#define RallS \
- (R2S(Reachable) | R2S(Possible) | R2S(IndirectLeak) | R2S(Unreached))
+// Returns a set containing all Reachedness
+UInt MC_(all_Reachedness)(void);
/* For VALGRIND_COUNT_LEAKS client request */
extern SizeT MC_(bytes_leaked);
@@ -444,11 +443,8 @@
Bool MC_(record_fishy_value_error) ( ThreadId tid, const HChar* function,
const HChar *argument_name, SizeT value );
-/* Parses a set of leak kinds (separated by ,).
- and give the resulting set in *lks.
- If parsing is succesful, returns True and *lks contains the resulting set.
- else return False. */
-extern Bool MC_(parse_leak_kinds) ( const HChar* str0, UInt* lks );
+/* Leak kinds tokens to call VG_(parse_enum_set). */
+extern const HChar* MC_(parse_leak_kinds_tokens);
/* prints a description of address a */
void MC_(pp_describe_addr) (Addr a);
@@ -533,12 +529,8 @@
// Build mask to check or set Heuristic h membership
#define H2S(h) (1 << (h))
-// CppHeuristic h is member of the Set s ?
-#define HiS(h,s) ((s) & R2S(h))
-// A set with all Heuristics:
-#define HallS \
- (H2S(LchStdString) | H2S(LchLength64) | H2S(LchNewArray) | \
- H2S(LchMultipleInheritance))
+// Heuristic h is member of the Set s ?
+#define HiS(h,s) ((s) & H2S(h))
/* Heuristics set to use for the leak search.
Default : no heuristic. */
Modified: trunk/memcheck/mc_main.c
==============================================================================
--- trunk/memcheck/mc_main.c (original)
+++ trunk/memcheck/mc_main.c Sun Aug 17 20:03:51 2014
@@ -5195,13 +5195,11 @@
KeepStacktraces MC_(clo_keep_stacktraces) = KS_alloc_then_free;
Int MC_(clo_mc_level) = 2;
-static Bool MC_(parse_leak_heuristics) ( const HChar *str0, UInt *lhs )
-{
- return
- VG_(parse_enum_set) ("-,stdstring,length64,newarray,multipleinheritance",
- str0, lhs);
-}
-
+static const HChar * MC_(parse_leak_heuristics_tokens) =
+ "-,stdstring,length64,newarray,multipleinheritance";
+/* The first heuristic value (LchNone) has no keyword, as this is
+ a fake heuristic used to collect the blocks found without any
+ heuristic. */
static Bool mc_process_cmd_line_options(const HChar* arg)
{
@@ -5247,21 +5245,18 @@
}
if VG_BOOL_CLO(arg, "--partial-loads-ok", MC_(clo_partial_loads_ok)) {}
- else if VG_STR_CLO(arg, "--errors-for-leak-kinds" , tmp_str) {
- if (!MC_(parse_leak_kinds)(tmp_str, &MC_(clo_error_for_leak_kinds)))
- return False;
- }
- else if VG_STR_CLO(arg, "--show-leak-kinds", tmp_str) {
- if (!MC_(parse_leak_kinds)(tmp_str, &MC_(clo_show_leak_kinds)))
- return False;
- }
- else if VG_STR_CLO(arg, "--leak-check-heuristics", tmp_str) {
- if (!MC_(parse_leak_heuristics)(tmp_str, &MC_(clo_leak_check_heuristics)))
- return False;
- }
+ else if VG_USET_CLO(arg, "--errors-for-leak-kinds",
+ MC_(parse_leak_kinds_tokens),
+ MC_(clo_error_for_leak_kinds)) {}
+ else if VG_USET_CLO(arg, "--show-leak-kinds",
+ MC_(parse_leak_kinds_tokens),
+ MC_(clo_show_leak_kinds)) {}
+ else if VG_USET_CLO(arg, "--leak-check-heuristics",
+ MC_(parse_leak_heuristics_tokens),
+ MC_(clo_leak_check_heuristics)) {}
else if (VG_BOOL_CLO(arg, "--show-reachable", tmp_show)) {
if (tmp_show) {
- MC_(clo_show_leak_kinds) = RallS;
+ MC_(clo_show_leak_kinds) = MC_(all_Reachedness)();
} else {
MC_(clo_show_leak_kinds) &= ~R2S(Reachable);
}
@@ -5615,15 +5610,18 @@
lcp.mode = LC_Summary; break;
case 2: { /* kinds */
wcmd = VG_(strtok_r) (NULL, " ", &ssaveptr);
- if (wcmd == NULL || !MC_(parse_leak_kinds)(wcmd,
- &lcp.show_leak_kinds)) {
+ if (wcmd == NULL
+ || !VG_(parse_enum_set)(MC_(parse_leak_kinds_tokens),
+ True/*allow_all*/,
+ wcmd,
+ &lcp.show_leak_kinds)) {
VG_(gdb_printf) ("missing or malformed leak kinds set\n");
err++;
}
break;
}
case 3: /* reachable */
- lcp.show_leak_kinds = RallS;
+ lcp.show_leak_kinds = MC_(all_Reachedness)();
break;
case 4: /* possibleleak */
lcp.show_leak_kinds
@@ -5634,8 +5632,11 @@
break;
case 6: { /* heuristics */
wcmd = VG_(strtok_r) (NULL, " ", &ssaveptr);
- if (wcmd == NULL || !MC_(parse_leak_heuristics)(wcmd,
- &lcp.heuristics)) {
+ if (wcmd == NULL
+ || !VG_(parse_enum_set)(MC_(parse_leak_heuristics_tokens),
+ True,/*allow_all*/
+ wcmd,
+ &lcp.heuristics)) {
VG_(gdb_printf) ("missing or malformed heuristics set\n");
err++;
}
Modified: trunk/none/tests/cmdline1.stdout.exp
==============================================================================
--- trunk/none/tests/cmdline1.stdout.exp (original)
+++ trunk/none/tests/cmdline1.stdout.exp Sun Aug 17 20:03:51 2014
@@ -87,11 +87,12 @@
--vgdb-shadow-registers=no|yes let gdb see the shadow registers [no]
--vgdb-prefix=<prefix> prefix for vgdb FIFOs [/tmp/vgdb-pipe]
--run-libc-freeres=no|yes free up glibc memory at exit on Linux? [yes]
- --sim-hints=hint1,hint2,... known hints:
- lax-ioctls, enable-outer, fuse-compatible [none]
+ --sim-hints=hint1,hint2,... activate unusual sim behaviours [none]
+ where hint is one of no-inner-prefix lax-ioctls enable-outer
+ fuse-compatible none
--fair-sched=no|yes|try schedule threads fairly on multicore systems [no]
- --kernel-variant=variant1,variant2,... known variants: bproc [none]
- handle non-standard kernel variants
+ --kernel-variant=variant1,variant2,... handle non-standard kernel variants [none]
+ where variant is one of bproc none
--merge-recursive-frames=<number> merge frames between identical
program counters in max <number> frames) [0]
--num-transtab-sectors=<number> size of translated code cache [16]
Modified: trunk/none/tests/cmdline2.stdout.exp
==============================================================================
--- trunk/none/tests/cmdline2.stdout.exp (original)
+++ trunk/none/tests/cmdline2.stdout.exp Sun Aug 17 20:03:51 2014
@@ -87,11 +87,12 @@
--vgdb-shadow-registers=no|yes let gdb see the shadow registers [no]
--vgdb-prefix=<prefix> prefix for vgdb FIFOs [/tmp/vgdb-pipe]
--run-libc-freeres=no|yes free up glibc memory at exit on Linux? [yes]
- --sim-hints=hint1,hint2,... known hints:
- lax-ioctls, enable-outer, fuse-compatible [none]
+ --sim-hints=hint1,hint2,... activate unusual sim behaviours [none]
+ where hint is one of no-inner-prefix lax-ioctls enable-outer
+ fuse-compatible none
--fair-sched=no|yes|try schedule threads fairly on multicore systems [no]
- --kernel-variant=variant1,variant2,... known variants: bproc [none]
- handle non-standard kernel variants
+ --kernel-variant=variant1,variant2,... handle non-standard kernel variants [none]
+ where variant is one of bproc none
--merge-recursive-frames=<number> merge frames between identical
program counters in max <number> frames) [0]
--num-transtab-sectors=<number> size of translated code cache [16]
|
|
From: <sv...@va...> - 2014-08-17 19:59:16
|
Author: sewardj
Date: Sun Aug 17 19:59:09 2014
New Revision: 2927
Log:
arm64: implement srhadd, urhadd (vector)
Modified:
trunk/priv/guest_arm64_toIR.c
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Sun Aug 17 19:59:09 2014
@@ -6711,6 +6711,51 @@
}
+/* Generate IR to do SRHADD and URHADD. */
+static
+IRTemp math_RHADD ( UInt size, Bool isU, IRTemp aa, IRTemp bb )
+{
+ /* Generate this:
+ (A >> 1) + (B >> 1) + (((A & 1) + (B & 1) + 1) >> 1)
+ */
+ vassert(size <= 3);
+ IROp opSHR = isU ? mkVecSHRN(size) : mkVecSARN(size);
+ IROp opADD = mkVecADD(size);
+ /* The only tricky bit is to generate the correct vector 1 constant. */
+ const ULong ones64[4]
+ = { 0x0101010101010101ULL, 0x0001000100010001ULL,
+ 0x0000000100000001ULL, 0x0000000000000001ULL };
+ IRTemp imm64 = newTemp(Ity_I64);
+ assign(imm64, mkU64(ones64[size]));
+ IRTemp vecOne = newTempV128();
+ assign(vecOne, binop(Iop_64HLtoV128, mkexpr(imm64), mkexpr(imm64)));
+ IRTemp scaOne = newTemp(Ity_I8);
+ assign(scaOne, mkU8(1));
+ IRTemp res = newTempV128();
+ assign(res,
+ binop(opADD,
+ binop(opSHR, mkexpr(aa), mkexpr(scaOne)),
+ binop(opADD,
+ binop(opSHR, mkexpr(bb), mkexpr(scaOne)),
+ binop(opSHR,
+ binop(opADD,
+ binop(opADD,
+ binop(Iop_AndV128, mkexpr(aa),
+ mkexpr(vecOne)),
+ binop(Iop_AndV128, mkexpr(bb),
+ mkexpr(vecOne))
+ ),
+ mkexpr(vecOne)
+ ),
+ mkexpr(scaOne)
+ )
+ )
+ )
+ );
+ return res;
+}
+
+
/* QCFLAG tracks the SIMD sticky saturation status. Update the status
thusly: if, after application of |opZHI| to both |qres| and |nres|,
they have the same value, leave QCFLAG unchanged. Otherwise, set it
@@ -9034,6 +9079,23 @@
return True;
}
+ if (opcode == BITS5(0,0,0,1,0)) {
+ /* -------- 0,xx,00010 SRHADD std7_std7_std7 -------- */
+ /* -------- 1,xx,00010 URHADD std7_std7_std7 -------- */
+ if (bitQ == 0 && size == X11) return False; // implied 1d case
+ Bool isU = bitU == 1;
+ IRTemp argL = newTempV128();
+ IRTemp argR = newTempV128();
+ assign(argL, getQReg128(nn));
+ assign(argR, getQReg128(mm));
+ IRTemp res = math_RHADD(size, isU, argL, argR);
+ putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
+ const HChar* arr = nameArr_Q_SZ(bitQ, size);
+ DIP("%s %s.%s, %s.%s, %s.%s\n", isU ? "urhadd" : "srhadd",
+ nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
+ return True;
+ }
+
if (opcode == BITS5(0,0,0,0,1) || opcode == BITS5(0,0,1,0,1)) {
/* -------- 0,xx,00001 SQADD std7_std7_std7 -------- */
/* -------- 1,xx,00001 UQADD std7_std7_std7 -------- */
|
|
From: <sv...@va...> - 2014-08-17 18:34:15
|
Author: sewardj
Date: Sun Aug 17 18:34:08 2014
New Revision: 14300
Log:
arm64: enable test cases for
sshr, ushr, ssra, usra (scalar, imm)
srshr, urshr, srsra, ursra (scalar, imm)
srshr, urshr, srsra, ursra (vector, imm)
sshl, srshl, ushl, urshl (scalar, imm)
sshl, srshl, ushl, urshl (vector, vector)
ssra, usra (vector, imm)
Modified:
trunk/none/tests/arm64/fp_and_simd.c
Modified: trunk/none/tests/arm64/fp_and_simd.c
==============================================================================
--- trunk/none/tests/arm64/fp_and_simd.c (original)
+++ trunk/none/tests/arm64/fp_and_simd.c Sun Aug 17 18:34:08 2014
@@ -17,7 +17,7 @@
#define True ((Bool)1)
-#define ITERS 1
+#define ITERS 20
typedef
enum { TySF=1234, TyDF, TyB, TyH, TyS, TyD, TyNONE }
@@ -4876,25 +4876,25 @@
// sshl (reg) d
// ushl (reg) d
- if (0) test_sshl_d_d_d(TyD);
- if (0) test_ushl_d_d_d(TyD);
+ if (1) test_sshl_d_d_d(TyD);
+ if (1) test_ushl_d_d_d(TyD);
// sshl (reg) 2d,4s,2s,8h,4h,16b,8b
// ushl (reg) 2d,4s,2s,8h,4h,16b,8b
- if (0) test_sshl_2d_2d_2d(TyD);
- if (0) test_sshl_4s_4s_4s(TyS);
- if (0) test_sshl_2s_2s_2s(TyS);
- if (0) test_sshl_8h_8h_8h(TyH);
- if (0) test_sshl_4h_4h_4h(TyH);
- if (0) test_sshl_16b_16b_16b(TyB);
- if (0) test_sshl_8b_8b_8b(TyB);
- if (0) test_ushl_2d_2d_2d(TyD);
- if (0) test_ushl_4s_4s_4s(TyS);
- if (0) test_ushl_2s_2s_2s(TyS);
- if (0) test_ushl_8h_8h_8h(TyH);
- if (0) test_ushl_4h_4h_4h(TyH);
- if (0) test_ushl_16b_16b_16b(TyB);
- if (0) test_ushl_8b_8b_8b(TyB);
+ if (1) test_sshl_2d_2d_2d(TyD);
+ if (1) test_sshl_4s_4s_4s(TyS);
+ if (1) test_sshl_2s_2s_2s(TyS);
+ if (1) test_sshl_8h_8h_8h(TyH);
+ if (1) test_sshl_4h_4h_4h(TyH);
+ if (1) test_sshl_16b_16b_16b(TyB);
+ if (1) test_sshl_8b_8b_8b(TyB);
+ if (1) test_ushl_2d_2d_2d(TyD);
+ if (1) test_ushl_4s_4s_4s(TyS);
+ if (1) test_ushl_2s_2s_2s(TyS);
+ if (1) test_ushl_8h_8h_8h(TyH);
+ if (1) test_ushl_4h_4h_4h(TyH);
+ if (1) test_ushl_16b_16b_16b(TyB);
+ if (1) test_ushl_8b_8b_8b(TyB);
// shl (imm) d
// sshr (imm) d
@@ -4902,9 +4902,9 @@
if (1) test_shl_d_d_0(TyD);
if (1) test_shl_d_d_32(TyD);
if (1) test_shl_d_d_63(TyD);
- if (0) test_sshr_d_d_1(TyD);
- if (0) test_sshr_d_d_32(TyD);
- if (0) test_sshr_d_d_64(TyD);
+ if (1) test_sshr_d_d_1(TyD);
+ if (1) test_sshr_d_d_32(TyD);
+ if (1) test_sshr_d_d_64(TyD);
if (1) test_ushr_d_d_1(TyD);
if (1) test_ushr_d_d_32(TyD);
if (1) test_ushr_d_d_64(TyD);
@@ -4972,187 +4972,187 @@
// ssra (imm) d
// usra (imm) d
- if (0) test_ssra_d_d_1(TyD);
- if (0) test_ssra_d_d_32(TyD);
- if (0) test_ssra_d_d_64(TyD);
- if (0) test_usra_d_d_1(TyD);
- if (0) test_usra_d_d_32(TyD);
- if (0) test_usra_d_d_64(TyD);
+ if (1) test_ssra_d_d_1(TyD);
+ if (1) test_ssra_d_d_32(TyD);
+ if (1) test_ssra_d_d_64(TyD);
+ if (1) test_usra_d_d_1(TyD);
+ if (1) test_usra_d_d_32(TyD);
+ if (1) test_usra_d_d_64(TyD);
// ssra (imm) 2d,4s,2s,8h,4h,16b,8b
// usra (imm) 2d,4s,2s,8h,4h,16b,8b
- if (0) test_ssra_2d_2d_1(TyD);
- if (0) test_ssra_2d_2d_32(TyD);
- if (0) test_ssra_2d_2d_64(TyD);
- if (0) test_ssra_4s_4s_1(TyS);
- if (0) test_ssra_4s_4s_16(TyS);
- if (0) test_ssra_4s_4s_32(TyS);
- if (0) test_ssra_2s_2s_1(TyS);
- if (0) test_ssra_2s_2s_16(TyS);
- if (0) test_ssra_2s_2s_32(TyS);
- if (0) test_ssra_8h_8h_1(TyH);
- if (0) test_ssra_8h_8h_8(TyH);
- if (0) test_ssra_8h_8h_16(TyH);
- if (0) test_ssra_4h_4h_1(TyH);
- if (0) test_ssra_4h_4h_8(TyH);
- if (0) test_ssra_4h_4h_16(TyH);
- if (0) test_ssra_16b_16b_1(TyB);
- if (0) test_ssra_16b_16b_3(TyB);
- if (0) test_ssra_16b_16b_8(TyB);
- if (0) test_ssra_8b_8b_1(TyB);
- if (0) test_ssra_8b_8b_3(TyB);
- if (0) test_ssra_8b_8b_8(TyB);
- if (0) test_usra_2d_2d_1(TyD);
- if (0) test_usra_2d_2d_32(TyD);
- if (0) test_usra_2d_2d_64(TyD);
- if (0) test_usra_4s_4s_1(TyS);
- if (0) test_usra_4s_4s_16(TyS);
- if (0) test_usra_4s_4s_32(TyS);
- if (0) test_usra_2s_2s_1(TyS);
- if (0) test_usra_2s_2s_16(TyS);
- if (0) test_usra_2s_2s_32(TyS);
- if (0) test_usra_8h_8h_1(TyH);
- if (0) test_usra_8h_8h_8(TyH);
- if (0) test_usra_8h_8h_16(TyH);
- if (0) test_usra_4h_4h_1(TyH);
- if (0) test_usra_4h_4h_8(TyH);
- if (0) test_usra_4h_4h_16(TyH);
- if (0) test_usra_16b_16b_1(TyB);
- if (0) test_usra_16b_16b_3(TyB);
- if (0) test_usra_16b_16b_8(TyB);
- if (0) test_usra_8b_8b_1(TyB);
- if (0) test_usra_8b_8b_3(TyB);
- if (0) test_usra_8b_8b_8(TyB);
+ if (1) test_ssra_2d_2d_1(TyD);
+ if (1) test_ssra_2d_2d_32(TyD);
+ if (1) test_ssra_2d_2d_64(TyD);
+ if (1) test_ssra_4s_4s_1(TyS);
+ if (1) test_ssra_4s_4s_16(TyS);
+ if (1) test_ssra_4s_4s_32(TyS);
+ if (1) test_ssra_2s_2s_1(TyS);
+ if (1) test_ssra_2s_2s_16(TyS);
+ if (1) test_ssra_2s_2s_32(TyS);
+ if (1) test_ssra_8h_8h_1(TyH);
+ if (1) test_ssra_8h_8h_8(TyH);
+ if (1) test_ssra_8h_8h_16(TyH);
+ if (1) test_ssra_4h_4h_1(TyH);
+ if (1) test_ssra_4h_4h_8(TyH);
+ if (1) test_ssra_4h_4h_16(TyH);
+ if (1) test_ssra_16b_16b_1(TyB);
+ if (1) test_ssra_16b_16b_3(TyB);
+ if (1) test_ssra_16b_16b_8(TyB);
+ if (1) test_ssra_8b_8b_1(TyB);
+ if (1) test_ssra_8b_8b_3(TyB);
+ if (1) test_ssra_8b_8b_8(TyB);
+ if (1) test_usra_2d_2d_1(TyD);
+ if (1) test_usra_2d_2d_32(TyD);
+ if (1) test_usra_2d_2d_64(TyD);
+ if (1) test_usra_4s_4s_1(TyS);
+ if (1) test_usra_4s_4s_16(TyS);
+ if (1) test_usra_4s_4s_32(TyS);
+ if (1) test_usra_2s_2s_1(TyS);
+ if (1) test_usra_2s_2s_16(TyS);
+ if (1) test_usra_2s_2s_32(TyS);
+ if (1) test_usra_8h_8h_1(TyH);
+ if (1) test_usra_8h_8h_8(TyH);
+ if (1) test_usra_8h_8h_16(TyH);
+ if (1) test_usra_4h_4h_1(TyH);
+ if (1) test_usra_4h_4h_8(TyH);
+ if (1) test_usra_4h_4h_16(TyH);
+ if (1) test_usra_16b_16b_1(TyB);
+ if (1) test_usra_16b_16b_3(TyB);
+ if (1) test_usra_16b_16b_8(TyB);
+ if (1) test_usra_8b_8b_1(TyB);
+ if (1) test_usra_8b_8b_3(TyB);
+ if (1) test_usra_8b_8b_8(TyB);
// srshl (reg) d
// urshl (reg) d
- if (0) test_srshl_d_d_d(TyD);
- if (0) test_urshl_d_d_d(TyD);
+ if (1) test_srshl_d_d_d(TyD);
+ if (1) test_urshl_d_d_d(TyD);
// srshl (reg) 2d,4s,2s,8h,4h,16b,8b
// urshl (reg) 2d,4s,2s,8h,4h,16b,8b
- if (0) test_srshl_2d_2d_2d(TyD);
- if (0) test_srshl_4s_4s_4s(TyS);
- if (0) test_srshl_2s_2s_2s(TyS);
- if (0) test_srshl_8h_8h_8h(TyH);
- if (0) test_srshl_4h_4h_4h(TyH);
- if (0) test_srshl_16b_16b_16b(TyB);
- if (0) test_srshl_8b_8b_8b(TyB);
- if (0) test_urshl_2d_2d_2d(TyD);
- if (0) test_urshl_4s_4s_4s(TyS);
- if (0) test_urshl_2s_2s_2s(TyS);
- if (0) test_urshl_8h_8h_8h(TyH);
- if (0) test_urshl_4h_4h_4h(TyH);
- if (0) test_urshl_16b_16b_16b(TyB);
- if (0) test_urshl_8b_8b_8b(TyB);
+ if (1) test_srshl_2d_2d_2d(TyD);
+ if (1) test_srshl_4s_4s_4s(TyS);
+ if (1) test_srshl_2s_2s_2s(TyS);
+ if (1) test_srshl_8h_8h_8h(TyH);
+ if (1) test_srshl_4h_4h_4h(TyH);
+ if (1) test_srshl_16b_16b_16b(TyB);
+ if (1) test_srshl_8b_8b_8b(TyB);
+ if (1) test_urshl_2d_2d_2d(TyD);
+ if (1) test_urshl_4s_4s_4s(TyS);
+ if (1) test_urshl_2s_2s_2s(TyS);
+ if (1) test_urshl_8h_8h_8h(TyH);
+ if (1) test_urshl_4h_4h_4h(TyH);
+ if (1) test_urshl_16b_16b_16b(TyB);
+ if (1) test_urshl_8b_8b_8b(TyB);
// srshr (imm) d
// urshr (imm) d
- if (0) test_srshr_d_d_1(TyD);
- if (0) test_srshr_d_d_32(TyD);
- if (0) test_srshr_d_d_64(TyD);
- if (0) test_urshr_d_d_1(TyD);
- if (0) test_urshr_d_d_32(TyD);
- if (0) test_urshr_d_d_64(TyD);
+ if (1) test_srshr_d_d_1(TyD);
+ if (1) test_srshr_d_d_32(TyD);
+ if (1) test_srshr_d_d_64(TyD);
+ if (1) test_urshr_d_d_1(TyD);
+ if (1) test_urshr_d_d_32(TyD);
+ if (1) test_urshr_d_d_64(TyD);
// srshr (imm) 2d,4s,2s,8h,4h,16b,8b
// urshr (imm) 2d,4s,2s,8h,4h,16b,8b
- if (0) test_srshr_2d_2d_1(TyD);
- if (0) test_srshr_2d_2d_32(TyD);
- if (0) test_srshr_2d_2d_64(TyD);
- if (0) test_srshr_4s_4s_1(TyS);
- if (0) test_srshr_4s_4s_16(TyS);
- if (0) test_srshr_4s_4s_32(TyS);
- if (0) test_srshr_2s_2s_1(TyS);
- if (0) test_srshr_2s_2s_16(TyS);
- if (0) test_srshr_2s_2s_32(TyS);
- if (0) test_srshr_8h_8h_1(TyH);
- if (0) test_srshr_8h_8h_8(TyH);
- if (0) test_srshr_8h_8h_16(TyH);
- if (0) test_srshr_4h_4h_1(TyH);
- if (0) test_srshr_4h_4h_8(TyH);
- if (0) test_srshr_4h_4h_16(TyH);
- if (0) test_srshr_16b_16b_1(TyB);
- if (0) test_srshr_16b_16b_3(TyB);
- if (0) test_srshr_16b_16b_8(TyB);
- if (0) test_srshr_8b_8b_1(TyB);
- if (0) test_srshr_8b_8b_3(TyB);
- if (0) test_srshr_8b_8b_8(TyB);
- if (0) test_urshr_2d_2d_1(TyD);
- if (0) test_urshr_2d_2d_32(TyD);
- if (0) test_urshr_2d_2d_64(TyD);
- if (0) test_urshr_4s_4s_1(TyS);
- if (0) test_urshr_4s_4s_16(TyS);
- if (0) test_urshr_4s_4s_32(TyS);
- if (0) test_urshr_2s_2s_1(TyS);
- if (0) test_urshr_2s_2s_16(TyS);
- if (0) test_urshr_2s_2s_32(TyS);
- if (0) test_urshr_8h_8h_1(TyH);
- if (0) test_urshr_8h_8h_8(TyH);
- if (0) test_urshr_8h_8h_16(TyH);
- if (0) test_urshr_4h_4h_1(TyH);
- if (0) test_urshr_4h_4h_8(TyH);
- if (0) test_urshr_4h_4h_16(TyH);
- if (0) test_urshr_16b_16b_1(TyB);
- if (0) test_urshr_16b_16b_3(TyB);
- if (0) test_urshr_16b_16b_8(TyB);
- if (0) test_urshr_8b_8b_1(TyB);
- if (0) test_urshr_8b_8b_3(TyB);
- if (0) test_urshr_8b_8b_8(TyB);
+ if (1) test_srshr_2d_2d_1(TyD);
+ if (1) test_srshr_2d_2d_32(TyD);
+ if (1) test_srshr_2d_2d_64(TyD);
+ if (1) test_srshr_4s_4s_1(TyS);
+ if (1) test_srshr_4s_4s_16(TyS);
+ if (1) test_srshr_4s_4s_32(TyS);
+ if (1) test_srshr_2s_2s_1(TyS);
+ if (1) test_srshr_2s_2s_16(TyS);
+ if (1) test_srshr_2s_2s_32(TyS);
+ if (1) test_srshr_8h_8h_1(TyH);
+ if (1) test_srshr_8h_8h_8(TyH);
+ if (1) test_srshr_8h_8h_16(TyH);
+ if (1) test_srshr_4h_4h_1(TyH);
+ if (1) test_srshr_4h_4h_8(TyH);
+ if (1) test_srshr_4h_4h_16(TyH);
+ if (1) test_srshr_16b_16b_1(TyB);
+ if (1) test_srshr_16b_16b_3(TyB);
+ if (1) test_srshr_16b_16b_8(TyB);
+ if (1) test_srshr_8b_8b_1(TyB);
+ if (1) test_srshr_8b_8b_3(TyB);
+ if (1) test_srshr_8b_8b_8(TyB);
+ if (1) test_urshr_2d_2d_1(TyD);
+ if (1) test_urshr_2d_2d_32(TyD);
+ if (1) test_urshr_2d_2d_64(TyD);
+ if (1) test_urshr_4s_4s_1(TyS);
+ if (1) test_urshr_4s_4s_16(TyS);
+ if (1) test_urshr_4s_4s_32(TyS);
+ if (1) test_urshr_2s_2s_1(TyS);
+ if (1) test_urshr_2s_2s_16(TyS);
+ if (1) test_urshr_2s_2s_32(TyS);
+ if (1) test_urshr_8h_8h_1(TyH);
+ if (1) test_urshr_8h_8h_8(TyH);
+ if (1) test_urshr_8h_8h_16(TyH);
+ if (1) test_urshr_4h_4h_1(TyH);
+ if (1) test_urshr_4h_4h_8(TyH);
+ if (1) test_urshr_4h_4h_16(TyH);
+ if (1) test_urshr_16b_16b_1(TyB);
+ if (1) test_urshr_16b_16b_3(TyB);
+ if (1) test_urshr_16b_16b_8(TyB);
+ if (1) test_urshr_8b_8b_1(TyB);
+ if (1) test_urshr_8b_8b_3(TyB);
+ if (1) test_urshr_8b_8b_8(TyB);
// srsra (imm) d
// ursra (imm) d
- if (0) test_srsra_d_d_1(TyD);
- if (0) test_srsra_d_d_32(TyD);
- if (0) test_srsra_d_d_64(TyD);
- if (0) test_ursra_d_d_1(TyD);
- if (0) test_ursra_d_d_32(TyD);
- if (0) test_ursra_d_d_64(TyD);
+ if (1) test_srsra_d_d_1(TyD);
+ if (1) test_srsra_d_d_32(TyD);
+ if (1) test_srsra_d_d_64(TyD);
+ if (1) test_ursra_d_d_1(TyD);
+ if (1) test_ursra_d_d_32(TyD);
+ if (1) test_ursra_d_d_64(TyD);
// srsra (imm) 2d,4s,2s,8h,4h,16b,8b
// ursra (imm) 2d,4s,2s,8h,4h,16b,8b
- if (0) test_srsra_2d_2d_1(TyD);
- if (0) test_srsra_2d_2d_32(TyD);
- if (0) test_srsra_2d_2d_64(TyD);
- if (0) test_srsra_4s_4s_1(TyS);
- if (0) test_srsra_4s_4s_16(TyS);
- if (0) test_srsra_4s_4s_32(TyS);
- if (0) test_srsra_2s_2s_1(TyS);
- if (0) test_srsra_2s_2s_16(TyS);
- if (0) test_srsra_2s_2s_32(TyS);
- if (0) test_srsra_8h_8h_1(TyH);
- if (0) test_srsra_8h_8h_8(TyH);
- if (0) test_srsra_8h_8h_16(TyH);
- if (0) test_srsra_4h_4h_1(TyH);
- if (0) test_srsra_4h_4h_8(TyH);
- if (0) test_srsra_4h_4h_16(TyH);
- if (0) test_srsra_16b_16b_1(TyB);
- if (0) test_srsra_16b_16b_3(TyB);
- if (0) test_srsra_16b_16b_8(TyB);
- if (0) test_srsra_8b_8b_1(TyB);
- if (0) test_srsra_8b_8b_3(TyB);
- if (0) test_srsra_8b_8b_8(TyB);
- if (0) test_ursra_2d_2d_1(TyD);
- if (0) test_ursra_2d_2d_32(TyD);
- if (0) test_ursra_2d_2d_64(TyD);
- if (0) test_ursra_4s_4s_1(TyS);
- if (0) test_ursra_4s_4s_16(TyS);
- if (0) test_ursra_4s_4s_32(TyS);
- if (0) test_ursra_2s_2s_1(TyS);
- if (0) test_ursra_2s_2s_16(TyS);
- if (0) test_ursra_2s_2s_32(TyS);
- if (0) test_ursra_8h_8h_1(TyH);
- if (0) test_ursra_8h_8h_8(TyH);
- if (0) test_ursra_8h_8h_16(TyH);
- if (0) test_ursra_4h_4h_1(TyH);
- if (0) test_ursra_4h_4h_8(TyH);
- if (0) test_ursra_4h_4h_16(TyH);
- if (0) test_ursra_16b_16b_1(TyB);
- if (0) test_ursra_16b_16b_3(TyB);
- if (0) test_ursra_16b_16b_8(TyB);
- if (0) test_ursra_8b_8b_1(TyB);
- if (0) test_ursra_8b_8b_3(TyB);
- if (0) test_ursra_8b_8b_8(TyB);
+ if (1) test_srsra_2d_2d_1(TyD);
+ if (1) test_srsra_2d_2d_32(TyD);
+ if (1) test_srsra_2d_2d_64(TyD);
+ if (1) test_srsra_4s_4s_1(TyS);
+ if (1) test_srsra_4s_4s_16(TyS);
+ if (1) test_srsra_4s_4s_32(TyS);
+ if (1) test_srsra_2s_2s_1(TyS);
+ if (1) test_srsra_2s_2s_16(TyS);
+ if (1) test_srsra_2s_2s_32(TyS);
+ if (1) test_srsra_8h_8h_1(TyH);
+ if (1) test_srsra_8h_8h_8(TyH);
+ if (1) test_srsra_8h_8h_16(TyH);
+ if (1) test_srsra_4h_4h_1(TyH);
+ if (1) test_srsra_4h_4h_8(TyH);
+ if (1) test_srsra_4h_4h_16(TyH);
+ if (1) test_srsra_16b_16b_1(TyB);
+ if (1) test_srsra_16b_16b_3(TyB);
+ if (1) test_srsra_16b_16b_8(TyB);
+ if (1) test_srsra_8b_8b_1(TyB);
+ if (1) test_srsra_8b_8b_3(TyB);
+ if (1) test_srsra_8b_8b_8(TyB);
+ if (1) test_ursra_2d_2d_1(TyD);
+ if (1) test_ursra_2d_2d_32(TyD);
+ if (1) test_ursra_2d_2d_64(TyD);
+ if (1) test_ursra_4s_4s_1(TyS);
+ if (1) test_ursra_4s_4s_16(TyS);
+ if (1) test_ursra_4s_4s_32(TyS);
+ if (1) test_ursra_2s_2s_1(TyS);
+ if (1) test_ursra_2s_2s_16(TyS);
+ if (1) test_ursra_2s_2s_32(TyS);
+ if (1) test_ursra_8h_8h_1(TyH);
+ if (1) test_ursra_8h_8h_8(TyH);
+ if (1) test_ursra_8h_8h_16(TyH);
+ if (1) test_ursra_4h_4h_1(TyH);
+ if (1) test_ursra_4h_4h_8(TyH);
+ if (1) test_ursra_4h_4h_16(TyH);
+ if (1) test_ursra_16b_16b_1(TyB);
+ if (1) test_ursra_16b_16b_3(TyB);
+ if (1) test_ursra_16b_16b_8(TyB);
+ if (1) test_ursra_8b_8b_1(TyB);
+ if (1) test_ursra_8b_8b_3(TyB);
+ if (1) test_ursra_8b_8b_8(TyB);
// sshll{2} (imm) 2d_2s/4s, 4s_4h/8h, 8h_8b/16b
// ushll{2} (imm) 2d_2s/4s, 4s_4h/8h, 8h_8b/16b
|
Author: sewardj
Date: Sun Aug 17 18:32:14 2014
New Revision: 2926
Log:
arm64: implement
sshr, ushr, ssra, usra (scalar, imm)
srshr, urshr, srsra, ursra (scalar, imm)
srshr, urshr, srsra, ursra (vector, imm)
sshl, srshl, ushl, urshl (scalar, imm)
sshl, srshl, ushl, urshl (vector, vector)
ssra, usra (vector, imm)
Modified:
trunk/priv/guest_arm64_toIR.c
trunk/priv/host_arm64_defs.c
trunk/priv/host_arm64_defs.h
trunk/priv/host_arm64_isel.c
trunk/priv/ir_defs.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Sun Aug 17 18:32:14 2014
@@ -841,6 +841,34 @@
return ops[size];
}
+static IROp mkVecSHU ( UInt size ) {
+ const IROp ops[4]
+ = { Iop_Sh8Ux16, Iop_Sh16Ux8, Iop_Sh32Ux4, Iop_Sh64Ux2 };
+ vassert(size < 4);
+ return ops[size];
+}
+
+static IROp mkVecSHS ( UInt size ) {
+ const IROp ops[4]
+ = { Iop_Sh8Sx16, Iop_Sh16Sx8, Iop_Sh32Sx4, Iop_Sh64Sx2 };
+ vassert(size < 4);
+ return ops[size];
+}
+
+static IROp mkVecRSHU ( UInt size ) {
+ const IROp ops[4]
+ = { Iop_Rsh8Ux16, Iop_Rsh16Ux8, Iop_Rsh32Ux4, Iop_Rsh64Ux2 };
+ vassert(size < 4);
+ return ops[size];
+}
+
+static IROp mkVecRSHS ( UInt size ) {
+ const IROp ops[4]
+ = { Iop_Rsh8Sx16, Iop_Rsh16Sx8, Iop_Rsh32Sx4, Iop_Rsh64Sx2 };
+ vassert(size < 4);
+ return ops[size];
+}
+
static IROp mkVecNARROWUN ( UInt sizeNarrow ) {
const IROp ops[4]
= { Iop_NarrowUn16to8x8, Iop_NarrowUn32to16x4,
@@ -7538,16 +7566,64 @@
UInt dd = INSN(4,0);
UInt immhb = (immh << 3) | immb;
- if (bitU == 1 && (immh & 8) == 8 && opcode == BITS5(0,0,0,0,0)) {
- /* -------- 1,1xxx,00000 SHR d_d_#imm -------- */
- UInt sh = 128 - immhb;
+ if ((immh & 8) == 8
+ && (opcode == BITS5(0,0,0,0,0) || opcode == BITS5(0,0,0,1,0))) {
+ /* -------- 0,1xxx,00000 SSHR d_d_#imm -------- */
+ /* -------- 1,1xxx,00000 USHR d_d_#imm -------- */
+ /* -------- 0,1xxx,00010 SSRA d_d_#imm -------- */
+ /* -------- 1,1xxx,00010 USRA d_d_#imm -------- */
+ Bool isU = bitU == 1;
+ Bool isAcc = opcode == BITS5(0,0,0,1,0);
+ UInt sh = 128 - immhb;
vassert(sh >= 1 && sh <= 64);
- /* Don't generate an out of range IR shift */
- putQReg128(dd, sh == 64
- ? mkV128(0x0000)
- : unop(Iop_ZeroHI64ofV128,
- binop(Iop_ShrN64x2, getQReg128(nn), mkU8(sh))));
- DIP("shr d%u, d%u, #%u\n", dd, nn, sh);
+ IROp op = isU ? Iop_ShrN64x2 : Iop_SarN64x2;
+ IRExpr* src = getQReg128(nn);
+ IRTemp shf = newTempV128();
+ IRTemp res = newTempV128();
+ if (sh == 64 && isU) {
+ assign(shf, mkV128(0x0000));
+ } else {
+ UInt nudge = 0;
+ if (sh == 64) {
+ vassert(!isU);
+ nudge = 1;
+ }
+ assign(shf, binop(op, src, mkU8(sh - nudge)));
+ }
+ assign(res, isAcc ? binop(Iop_Add64x2, getQReg128(dd), mkexpr(shf))
+ : mkexpr(shf));
+ putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
+ const HChar* nm = isAcc ? (isU ? "usra" : "ssra")
+ : (isU ? "ushr" : "sshr");
+ DIP("%s d%u, d%u, #%u\n", nm, dd, nn, sh);
+ return True;
+ }
+
+ if ((immh & 8) == 8
+ && (opcode == BITS5(0,0,1,0,0) || opcode == BITS5(0,0,1,1,0))) {
+ /* -------- 0,1xxx,00100 SRSHR d_d_#imm -------- */
+ /* -------- 1,1xxx,00100 URSHR d_d_#imm -------- */
+ /* -------- 0,1xxx,00110 SRSRA d_d_#imm -------- */
+ /* -------- 1,1xxx,00110 URSRA d_d_#imm -------- */
+ Bool isU = bitU == 1;
+ Bool isAcc = opcode == BITS5(0,0,1,1,0);
+ UInt sh = 128 - immhb;
+ vassert(sh >= 1 && sh <= 64);
+ IROp op = isU ? Iop_Rsh64Ux2 : Iop_Rsh64Sx2;
+ vassert(sh >= 1 && sh <= 64);
+ IRExpr* src = getQReg128(nn);
+ IRTemp imm8 = newTemp(Ity_I8);
+ assign(imm8, mkU8((UChar)(-sh)));
+ IRExpr* amt = mkexpr(math_DUP_TO_V128(imm8, Ity_I8));
+ IRTemp shf = newTempV128();
+ IRTemp res = newTempV128();
+ assign(shf, binop(op, src, amt));
+ assign(res, isAcc ? binop(Iop_Add64x2, getQReg128(dd), mkexpr(shf))
+ : mkexpr(shf));
+ putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
+ const HChar* nm = isAcc ? (isU ? "ursra" : "srsra")
+ : (isU ? "urshr" : "srshr");
+ DIP("%s d%u, d%u, #%u\n", nm, dd, nn, sh);
return True;
}
@@ -7862,6 +7938,27 @@
return True;
}
+ if (size == X11 && (opcode == BITS5(0,1,0,0,0)
+ || opcode == BITS5(0,1,0,1,0))) {
+ /* -------- 0,xx,01000 SSHL d_d_d -------- */
+ /* -------- 0,xx,01010 SRSHL d_d_d -------- */
+ /* -------- 1,xx,01000 USHL d_d_d -------- */
+ /* -------- 1,xx,01010 URSHL d_d_d -------- */
+ Bool isU = bitU == 1;
+ Bool isR = opcode == BITS5(0,1,0,1,0);
+ IROp op = isR ? (isU ? mkVecRSHU(size) : mkVecRSHS(size))
+ : (isU ? mkVecSHU(size) : mkVecSHS(size));
+ IRTemp res = newTempV128();
+ assign(res, binop(op, getQReg128(nn), getQReg128(mm)));
+ putQReg128(dd, unop(Iop_ZeroHI64ofV128, mkexpr(res)));
+ const HChar* nm = isR ? (isU ? "urshl" : "srshl")
+ : (isU ? "ushl" : "sshl");
+ DIP("%s %s, %s, %s\n", nm,
+ nameQRegLO(dd, Ity_I64),
+ nameQRegLO(nn, Ity_I64), nameQRegLO(mm, Ity_I64));
+ return True;
+ }
+
if (opcode == BITS5(0,1,0,0,1) || opcode == BITS5(0,1,0,1,1)) {
/* -------- 0,xx,01001 SQSHL std4_std4_std4 -------- */
/* -------- 0,xx,01011 SQRSHL std4_std4_std4 -------- */
@@ -8248,9 +8345,11 @@
UInt nn = INSN(9,5);
UInt dd = INSN(4,0);
- if (opcode == BITS5(0,0,0,0,0)) {
+ if (opcode == BITS5(0,0,0,0,0) || opcode == BITS5(0,0,0,1,0)) {
/* -------- 0,00000 SSHR std7_std7_#imm -------- */
/* -------- 1,00000 USHR std7_std7_#imm -------- */
+ /* -------- 0,00010 SSRA std7_std7_#imm -------- */
+ /* -------- 1,00010 USRA std7_std7_#imm -------- */
/* laneTy, shift = case immh:immb of
0001:xxx -> B, SHR:8-xxx
001x:xxx -> H, SHR:16-xxxx
@@ -8262,6 +8361,7 @@
UInt shift = 0;
Bool isQ = bitQ == 1;
Bool isU = bitU == 1;
+ Bool isAcc = opcode == BITS5(0,0,0,1,0);
Bool ok = getLaneInfo_IMMH_IMMB(&shift, &size, immh, immb);
if (!ok || (bitQ == 0 && size == X11)) return False;
vassert(size >= 0 && size <= 3);
@@ -8269,21 +8369,68 @@
vassert(shift >= 1 && shift <= lanebits);
IROp op = isU ? mkVecSHRN(size) : mkVecSARN(size);
IRExpr* src = getQReg128(nn);
+ IRTemp shf = newTempV128();
IRTemp res = newTempV128();
if (shift == lanebits && isU) {
- assign(res, mkV128(0x0000));
+ assign(shf, mkV128(0x0000));
} else {
UInt nudge = 0;
if (shift == lanebits) {
vassert(!isU);
nudge = 1;
}
- assign(res, binop(op, src, mkU8(shift - nudge)));
+ assign(shf, binop(op, src, mkU8(shift - nudge)));
}
+ assign(res, isAcc ? binop(mkVecADD(size), getQReg128(dd), mkexpr(shf))
+ : mkexpr(shf));
putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
HChar laneCh = "bhsd"[size];
UInt nLanes = (isQ ? 128 : 64) / lanebits;
- const HChar* nm = isU ? "ushr" : "sshr";
+ const HChar* nm = isAcc ? (isU ? "usra" : "ssra")
+ : (isU ? "ushr" : "sshr");
+ DIP("%s %s.%u%c, %s.%u%c, #%u\n", nm,
+ nameQReg128(dd), nLanes, laneCh,
+ nameQReg128(nn), nLanes, laneCh, shift);
+ return True;
+ }
+
+ if (opcode == BITS5(0,0,1,0,0) || opcode == BITS5(0,0,1,1,0)) {
+ /* -------- 0,00100 SRSHR std7_std7_#imm -------- */
+ /* -------- 1,00100 URSHR std7_std7_#imm -------- */
+ /* -------- 0,00110 SRSRA std7_std7_#imm -------- */
+ /* -------- 1,00110 URSRA std7_std7_#imm -------- */
+ /* laneTy, shift = case immh:immb of
+ 0001:xxx -> B, SHR:8-xxx
+ 001x:xxx -> H, SHR:16-xxxx
+ 01xx:xxx -> S, SHR:32-xxxxx
+ 1xxx:xxx -> D, SHR:64-xxxxxx
+ other -> invalid
+ */
+ UInt size = 0;
+ UInt shift = 0;
+ Bool isQ = bitQ == 1;
+ Bool isU = bitU == 1;
+ Bool isAcc = opcode == BITS5(0,0,1,1,0);
+ Bool ok = getLaneInfo_IMMH_IMMB(&shift, &size, immh, immb);
+ if (!ok || (bitQ == 0 && size == X11)) return False;
+ vassert(size >= 0 && size <= 3);
+ UInt lanebits = 8 << size;
+ vassert(shift >= 1 && shift <= lanebits);
+ IROp op = isU ? mkVecRSHU(size) : mkVecRSHS(size);
+ IRExpr* src = getQReg128(nn);
+ IRTemp imm8 = newTemp(Ity_I8);
+ assign(imm8, mkU8((UChar)(-shift)));
+ IRExpr* amt = mkexpr(math_DUP_TO_V128(imm8, Ity_I8));
+ IRTemp shf = newTempV128();
+ IRTemp res = newTempV128();
+ assign(shf, binop(op, src, amt));
+ assign(res, isAcc ? binop(mkVecADD(size), getQReg128(dd), mkexpr(shf))
+ : mkexpr(shf));
+ putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
+ HChar laneCh = "bhsd"[size];
+ UInt nLanes = (isQ ? 128 : 64) / lanebits;
+ const HChar* nm = isAcc ? (isU ? "ursra" : "srsra")
+ : (isU ? "urshr" : "srshr");
DIP("%s %s.%u%c, %s.%u%c, #%u\n", nm,
nameQReg128(dd), nLanes, laneCh,
nameQReg128(nn), nLanes, laneCh, shift);
@@ -9030,6 +9177,27 @@
return True;
}
+ if (opcode == BITS5(0,1,0,0,0) || opcode == BITS5(0,1,0,1,0)) {
+ /* -------- 0,xx,01000 SSHL std7_std7_std7 -------- */
+ /* -------- 0,xx,01010 SRSHL std7_std7_std7 -------- */
+ /* -------- 1,xx,01000 USHL std7_std7_std7 -------- */
+ /* -------- 1,xx,01010 URSHL std7_std7_std7 -------- */
+ if (bitQ == 0 && size == X11) return False; // implied 1d case
+ Bool isU = bitU == 1;
+ Bool isR = opcode == BITS5(0,1,0,1,0);
+ IROp op = isR ? (isU ? mkVecRSHU(size) : mkVecRSHS(size))
+ : (isU ? mkVecSHU(size) : mkVecSHS(size));
+ IRTemp res = newTempV128();
+ assign(res, binop(op, getQReg128(nn), getQReg128(mm)));
+ putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
+ const HChar* nm = isR ? (isU ? "urshl" : "srshl")
+ : (isU ? "ushl" : "sshl");
+ const HChar* arr = nameArr_Q_SZ(bitQ, size);
+ DIP("%s %s.%s, %s.%s, %s.%s\n", nm,
+ nameQReg128(dd), arr, nameQReg128(nn), arr, nameQReg128(mm), arr);
+ return True;
+ }
+
if (opcode == BITS5(0,1,0,0,1) || opcode == BITS5(0,1,0,1,1)) {
/* -------- 0,xx,01001 SQSHL std7_std7_std7 -------- */
/* -------- 0,xx,01011 SQRSHL std7_std7_std7 -------- */
Modified: trunk/priv/host_arm64_defs.c
==============================================================================
--- trunk/priv/host_arm64_defs.c (original)
+++ trunk/priv/host_arm64_defs.c Sun Aug 17 18:32:14 2014
@@ -682,6 +682,22 @@
case ARM64vecb_UQRSHL32x4: *nm = "uqrshl"; *ar = "4s"; return;
case ARM64vecb_UQRSHL16x8: *nm = "uqrshl"; *ar = "8h"; return;
case ARM64vecb_UQRSHL8x16: *nm = "uqrshl"; *ar = "16b"; return;
+ case ARM64vecb_SSHL64x2: *nm = "sshl"; *ar = "2d"; return;
+ case ARM64vecb_SSHL32x4: *nm = "sshl"; *ar = "4s"; return;
+ case ARM64vecb_SSHL16x8: *nm = "sshl"; *ar = "8h"; return;
+ case ARM64vecb_SSHL8x16: *nm = "sshl"; *ar = "16b"; return;
+ case ARM64vecb_USHL64x2: *nm = "ushl"; *ar = "2d"; return;
+ case ARM64vecb_USHL32x4: *nm = "ushl"; *ar = "4s"; return;
+ case ARM64vecb_USHL16x8: *nm = "ushl"; *ar = "8h"; return;
+ case ARM64vecb_USHL8x16: *nm = "ushl"; *ar = "16b"; return;
+ case ARM64vecb_SRSHL64x2: *nm = "srshl"; *ar = "2d"; return;
+ case ARM64vecb_SRSHL32x4: *nm = "srshl"; *ar = "4s"; return;
+ case ARM64vecb_SRSHL16x8: *nm = "srshl"; *ar = "8h"; return;
+ case ARM64vecb_SRSHL8x16: *nm = "srshl"; *ar = "16b"; return;
+ case ARM64vecb_URSHL64x2: *nm = "urshl"; *ar = "2d"; return;
+ case ARM64vecb_URSHL32x4: *nm = "urshl"; *ar = "4s"; return;
+ case ARM64vecb_URSHL16x8: *nm = "urshl"; *ar = "8h"; return;
+ case ARM64vecb_URSHL8x16: *nm = "urshl"; *ar = "16b"; return;
default: vpanic("showARM64VecBinOp");
}
}
@@ -717,54 +733,54 @@
}
}
-static void showARM64VecShiftOp(/*OUT*/const HChar** nm,
- /*OUT*/const HChar** ar,
- ARM64VecShiftOp op )
+static void showARM64VecShiftImmOp(/*OUT*/const HChar** nm,
+ /*OUT*/const HChar** ar,
+ ARM64VecShiftImmOp op )
{
switch (op) {
- case ARM64vecsh_USHR64x2: *nm = "ushr "; *ar = "2d"; return;
- case ARM64vecsh_USHR32x4: *nm = "ushr "; *ar = "4s"; return;
- case ARM64vecsh_USHR16x8: *nm = "ushr "; *ar = "8h"; return;
- case ARM64vecsh_USHR8x16: *nm = "ushr "; *ar = "16b"; return;
- case ARM64vecsh_SSHR64x2: *nm = "sshr "; *ar = "2d"; return;
- case ARM64vecsh_SSHR32x4: *nm = "sshr "; *ar = "4s"; return;
- case ARM64vecsh_SSHR16x8: *nm = "sshr "; *ar = "8h"; return;
- case ARM64vecsh_SSHR8x16: *nm = "sshr "; *ar = "16b"; return;
- case ARM64vecsh_SHL64x2: *nm = "shl "; *ar = "2d"; return;
- case ARM64vecsh_SHL32x4: *nm = "shl "; *ar = "4s"; return;
- case ARM64vecsh_SHL16x8: *nm = "shl "; *ar = "8h"; return;
- case ARM64vecsh_SHL8x16: *nm = "shl "; *ar = "16b"; return;
- case ARM64vecsh_SQSHRN2SD: *nm = "sqshrn"; *ar = "2sd"; return;
- case ARM64vecsh_SQSHRN4HS: *nm = "sqshrn"; *ar = "4hs"; return;
- case ARM64vecsh_SQSHRN8BH: *nm = "sqshrn"; *ar = "8bh"; return;
- case ARM64vecsh_UQSHRN2SD: *nm = "uqshrn"; *ar = "2sd"; return;
- case ARM64vecsh_UQSHRN4HS: *nm = "uqshrn"; *ar = "4hs"; return;
- case ARM64vecsh_UQSHRN8BH: *nm = "uqshrn"; *ar = "8bh"; return;
- case ARM64vecsh_SQSHRUN2SD: *nm = "sqshrun"; *ar = "2sd"; return;
- case ARM64vecsh_SQSHRUN4HS: *nm = "sqshrun"; *ar = "4hs"; return;
- case ARM64vecsh_SQSHRUN8BH: *nm = "sqshrun"; *ar = "8bh"; return;
- case ARM64vecsh_SQRSHRN2SD: *nm = "sqrshrn"; *ar = "2sd"; return;
- case ARM64vecsh_SQRSHRN4HS: *nm = "sqrshrn"; *ar = "4hs"; return;
- case ARM64vecsh_SQRSHRN8BH: *nm = "sqrshrn"; *ar = "8bh"; return;
- case ARM64vecsh_UQRSHRN2SD: *nm = "uqrshrn"; *ar = "2sd"; return;
- case ARM64vecsh_UQRSHRN4HS: *nm = "uqrshrn"; *ar = "4hs"; return;
- case ARM64vecsh_UQRSHRN8BH: *nm = "uqrshrn"; *ar = "8bh"; return;
- case ARM64vecsh_SQRSHRUN2SD: *nm = "sqrshrun"; *ar = "2sd"; return;
- case ARM64vecsh_SQRSHRUN4HS: *nm = "sqrshrun"; *ar = "4hs"; return;
- case ARM64vecsh_SQRSHRUN8BH: *nm = "sqrshrun"; *ar = "8bh"; return;
- case ARM64vecsh_UQSHL64x2: *nm = "uqshl "; *ar = "2d"; return;
- case ARM64vecsh_UQSHL32x4: *nm = "uqshl "; *ar = "4s"; return;
- case ARM64vecsh_UQSHL16x8: *nm = "uqshl "; *ar = "8h"; return;
- case ARM64vecsh_UQSHL8x16: *nm = "uqshl "; *ar = "16b"; return;
- case ARM64vecsh_SQSHL64x2: *nm = "sqshl "; *ar = "2d"; return;
- case ARM64vecsh_SQSHL32x4: *nm = "sqshl "; *ar = "4s"; return;
- case ARM64vecsh_SQSHL16x8: *nm = "sqshl "; *ar = "8h"; return;
- case ARM64vecsh_SQSHL8x16: *nm = "sqshl "; *ar = "16b"; return;
- case ARM64vecsh_SQSHLU64x2: *nm = "sqshlu"; *ar = "2d"; return;
- case ARM64vecsh_SQSHLU32x4: *nm = "sqshlu"; *ar = "4s"; return;
- case ARM64vecsh_SQSHLU16x8: *nm = "sqshlu"; *ar = "8h"; return;
- case ARM64vecsh_SQSHLU8x16: *nm = "sqshlu"; *ar = "16b"; return;
- default: vpanic("showARM64VecShiftOp");
+ case ARM64vecshi_USHR64x2: *nm = "ushr "; *ar = "2d"; return;
+ case ARM64vecshi_USHR32x4: *nm = "ushr "; *ar = "4s"; return;
+ case ARM64vecshi_USHR16x8: *nm = "ushr "; *ar = "8h"; return;
+ case ARM64vecshi_USHR8x16: *nm = "ushr "; *ar = "16b"; return;
+ case ARM64vecshi_SSHR64x2: *nm = "sshr "; *ar = "2d"; return;
+ case ARM64vecshi_SSHR32x4: *nm = "sshr "; *ar = "4s"; return;
+ case ARM64vecshi_SSHR16x8: *nm = "sshr "; *ar = "8h"; return;
+ case ARM64vecshi_SSHR8x16: *nm = "sshr "; *ar = "16b"; return;
+ case ARM64vecshi_SHL64x2: *nm = "shl "; *ar = "2d"; return;
+ case ARM64vecshi_SHL32x4: *nm = "shl "; *ar = "4s"; return;
+ case ARM64vecshi_SHL16x8: *nm = "shl "; *ar = "8h"; return;
+ case ARM64vecshi_SHL8x16: *nm = "shl "; *ar = "16b"; return;
+ case ARM64vecshi_SQSHRN2SD: *nm = "sqshrn"; *ar = "2sd"; return;
+ case ARM64vecshi_SQSHRN4HS: *nm = "sqshrn"; *ar = "4hs"; return;
+ case ARM64vecshi_SQSHRN8BH: *nm = "sqshrn"; *ar = "8bh"; return;
+ case ARM64vecshi_UQSHRN2SD: *nm = "uqshrn"; *ar = "2sd"; return;
+ case ARM64vecshi_UQSHRN4HS: *nm = "uqshrn"; *ar = "4hs"; return;
+ case ARM64vecshi_UQSHRN8BH: *nm = "uqshrn"; *ar = "8bh"; return;
+ case ARM64vecshi_SQSHRUN2SD: *nm = "sqshrun"; *ar = "2sd"; return;
+ case ARM64vecshi_SQSHRUN4HS: *nm = "sqshrun"; *ar = "4hs"; return;
+ case ARM64vecshi_SQSHRUN8BH: *nm = "sqshrun"; *ar = "8bh"; return;
+ case ARM64vecshi_SQRSHRN2SD: *nm = "sqrshrn"; *ar = "2sd"; return;
+ case ARM64vecshi_SQRSHRN4HS: *nm = "sqrshrn"; *ar = "4hs"; return;
+ case ARM64vecshi_SQRSHRN8BH: *nm = "sqrshrn"; *ar = "8bh"; return;
+ case ARM64vecshi_UQRSHRN2SD: *nm = "uqrshrn"; *ar = "2sd"; return;
+ case ARM64vecshi_UQRSHRN4HS: *nm = "uqrshrn"; *ar = "4hs"; return;
+ case ARM64vecshi_UQRSHRN8BH: *nm = "uqrshrn"; *ar = "8bh"; return;
+ case ARM64vecshi_SQRSHRUN2SD: *nm = "sqrshrun"; *ar = "2sd"; return;
+ case ARM64vecshi_SQRSHRUN4HS: *nm = "sqrshrun"; *ar = "4hs"; return;
+ case ARM64vecshi_SQRSHRUN8BH: *nm = "sqrshrun"; *ar = "8bh"; return;
+ case ARM64vecshi_UQSHL64x2: *nm = "uqshl "; *ar = "2d"; return;
+ case ARM64vecshi_UQSHL32x4: *nm = "uqshl "; *ar = "4s"; return;
+ case ARM64vecshi_UQSHL16x8: *nm = "uqshl "; *ar = "8h"; return;
+ case ARM64vecshi_UQSHL8x16: *nm = "uqshl "; *ar = "16b"; return;
+ case ARM64vecshi_SQSHL64x2: *nm = "sqshl "; *ar = "2d"; return;
+ case ARM64vecshi_SQSHL32x4: *nm = "sqshl "; *ar = "4s"; return;
+ case ARM64vecshi_SQSHL16x8: *nm = "sqshl "; *ar = "8h"; return;
+ case ARM64vecshi_SQSHL8x16: *nm = "sqshl "; *ar = "16b"; return;
+ case ARM64vecshi_SQSHLU64x2: *nm = "sqshlu"; *ar = "2d"; return;
+ case ARM64vecshi_SQSHLU32x4: *nm = "sqshlu"; *ar = "4s"; return;
+ case ARM64vecshi_SQSHLU16x8: *nm = "sqshlu"; *ar = "8h"; return;
+ case ARM64vecshi_SQSHLU8x16: *nm = "sqshlu"; *ar = "16b"; return;
+ default: vpanic("showARM64VecShiftImmOp");
}
}
@@ -1120,7 +1136,7 @@
vassert(dszBlg2 == 0 || dszBlg2 == 1 || dszBlg2 == 2);
return i;
}
-ARM64Instr* ARM64Instr_VShiftImmV ( ARM64VecShiftOp op,
+ARM64Instr* ARM64Instr_VShiftImmV ( ARM64VecShiftImmOp op,
HReg dst, HReg src, UInt amt ) {
ARM64Instr* i = LibVEX_Alloc(sizeof(ARM64Instr));
i->tag = ARM64in_VShiftImmV;
@@ -1134,41 +1150,41 @@
/* For right shifts, the allowed shift amounts are 1 .. lane_size.
For left shifts, the allowed shift amounts are 0 .. lane_size-1.
*/
- case ARM64vecsh_USHR64x2: case ARM64vecsh_SSHR64x2:
- case ARM64vecsh_UQSHRN2SD: case ARM64vecsh_SQSHRN2SD:
- case ARM64vecsh_SQSHRUN2SD:
- case ARM64vecsh_UQRSHRN2SD: case ARM64vecsh_SQRSHRN2SD:
- case ARM64vecsh_SQRSHRUN2SD:
+ case ARM64vecshi_USHR64x2: case ARM64vecshi_SSHR64x2:
+ case ARM64vecshi_UQSHRN2SD: case ARM64vecshi_SQSHRN2SD:
+ case ARM64vecshi_SQSHRUN2SD:
+ case ARM64vecshi_UQRSHRN2SD: case ARM64vecshi_SQRSHRN2SD:
+ case ARM64vecshi_SQRSHRUN2SD:
minSh = 1; maxSh = 64; break;
- case ARM64vecsh_SHL64x2:
- case ARM64vecsh_UQSHL64x2: case ARM64vecsh_SQSHL64x2:
- case ARM64vecsh_SQSHLU64x2:
+ case ARM64vecshi_SHL64x2:
+ case ARM64vecshi_UQSHL64x2: case ARM64vecshi_SQSHL64x2:
+ case ARM64vecshi_SQSHLU64x2:
minSh = 0; maxSh = 63; break;
- case ARM64vecsh_USHR32x4: case ARM64vecsh_SSHR32x4:
- case ARM64vecsh_UQSHRN4HS: case ARM64vecsh_SQSHRN4HS:
- case ARM64vecsh_SQSHRUN4HS:
- case ARM64vecsh_UQRSHRN4HS: case ARM64vecsh_SQRSHRN4HS:
- case ARM64vecsh_SQRSHRUN4HS:
+ case ARM64vecshi_USHR32x4: case ARM64vecshi_SSHR32x4:
+ case ARM64vecshi_UQSHRN4HS: case ARM64vecshi_SQSHRN4HS:
+ case ARM64vecshi_SQSHRUN4HS:
+ case ARM64vecshi_UQRSHRN4HS: case ARM64vecshi_SQRSHRN4HS:
+ case ARM64vecshi_SQRSHRUN4HS:
minSh = 1; maxSh = 32; break;
- case ARM64vecsh_SHL32x4:
- case ARM64vecsh_UQSHL32x4: case ARM64vecsh_SQSHL32x4:
- case ARM64vecsh_SQSHLU32x4:
+ case ARM64vecshi_SHL32x4:
+ case ARM64vecshi_UQSHL32x4: case ARM64vecshi_SQSHL32x4:
+ case ARM64vecshi_SQSHLU32x4:
minSh = 0; maxSh = 31; break;
- case ARM64vecsh_USHR16x8: case ARM64vecsh_SSHR16x8:
- case ARM64vecsh_UQSHRN8BH: case ARM64vecsh_SQSHRN8BH:
- case ARM64vecsh_SQSHRUN8BH:
- case ARM64vecsh_UQRSHRN8BH: case ARM64vecsh_SQRSHRN8BH:
- case ARM64vecsh_SQRSHRUN8BH:
+ case ARM64vecshi_USHR16x8: case ARM64vecshi_SSHR16x8:
+ case ARM64vecshi_UQSHRN8BH: case ARM64vecshi_SQSHRN8BH:
+ case ARM64vecshi_SQSHRUN8BH:
+ case ARM64vecshi_UQRSHRN8BH: case ARM64vecshi_SQRSHRN8BH:
+ case ARM64vecshi_SQRSHRUN8BH:
minSh = 1; maxSh = 16; break;
- case ARM64vecsh_SHL16x8:
- case ARM64vecsh_UQSHL16x8: case ARM64vecsh_SQSHL16x8:
- case ARM64vecsh_SQSHLU16x8:
+ case ARM64vecshi_SHL16x8:
+ case ARM64vecshi_UQSHL16x8: case ARM64vecshi_SQSHL16x8:
+ case ARM64vecshi_SQSHLU16x8:
minSh = 0; maxSh = 15; break;
- case ARM64vecsh_USHR8x16: case ARM64vecsh_SSHR8x16:
+ case ARM64vecshi_USHR8x16: case ARM64vecshi_SSHR8x16:
minSh = 1; maxSh = 8; break;
- case ARM64vecsh_SHL8x16:
- case ARM64vecsh_UQSHL8x16: case ARM64vecsh_SQSHL8x16:
- case ARM64vecsh_SQSHLU8x16:
+ case ARM64vecshi_SHL8x16:
+ case ARM64vecshi_UQSHL8x16: case ARM64vecshi_SQSHL8x16:
+ case ARM64vecshi_SQSHLU8x16:
minSh = 0; maxSh = 7; break;
default:
vassert(0);
@@ -1649,7 +1665,7 @@
case ARM64in_VShiftImmV: {
const HChar* nm = "??";
const HChar* ar = "??";
- showARM64VecShiftOp(&nm, &ar, i->ARM64in.VShiftImmV.op);
+ showARM64VecShiftImmOp(&nm, &ar, i->ARM64in.VShiftImmV.op);
vex_printf("%s ", nm);
ppHRegARM64(i->ARM64in.VShiftImmV.dst);
vex_printf(".%s, ", ar);
@@ -4040,6 +4056,11 @@
010 01110 sz 1 m 010111 n d SQRSHL@sz Vd, Vn, Vm
011 01110 sz 1 m 010011 n d UQSHL@sz Vd, Vn, Vm
011 01110 sz 1 m 010111 n d URQSHL@sz Vd, Vn, Vm
+
+ 010 01110 sz 1 m 010001 n d SSHL@sz Vd, Vn, Vm
+ 010 01110 sz 1 m 010101 n d SRSHL@sz Vd, Vn, Vm
+ 011 01110 sz 1 m 010001 n d USHL@sz Vd, Vn, Vm
+ 011 01110 sz 1 m 010101 n d URSHL@sz Vd, Vn, Vm
*/
UInt vD = qregNo(i->ARM64in.VBinV.dst);
UInt vN = qregNo(i->ARM64in.VBinV.argL);
@@ -4415,6 +4436,58 @@
*p++ = X_3_8_5_6_5_5(X011, X01110001, vM, X010111, vN, vD);
break;
+ case ARM64vecb_SSHL64x2:
+ *p++ = X_3_8_5_6_5_5(X010, X01110111, vM, X010001, vN, vD);
+ break;
+ case ARM64vecb_SSHL32x4:
+ *p++ = X_3_8_5_6_5_5(X010, X01110101, vM, X010001, vN, vD);
+ break;
+ case ARM64vecb_SSHL16x8:
+ *p++ = X_3_8_5_6_5_5(X010, X01110011, vM, X010001, vN, vD);
+ break;
+ case ARM64vecb_SSHL8x16:
+ *p++ = X_3_8_5_6_5_5(X010, X01110001, vM, X010001, vN, vD);
+ break;
+
+ case ARM64vecb_SRSHL64x2:
+ *p++ = X_3_8_5_6_5_5(X010, X01110111, vM, X010101, vN, vD);
+ break;
+ case ARM64vecb_SRSHL32x4:
+ *p++ = X_3_8_5_6_5_5(X010, X01110101, vM, X010101, vN, vD);
+ break;
+ case ARM64vecb_SRSHL16x8:
+ *p++ = X_3_8_5_6_5_5(X010, X01110011, vM, X010101, vN, vD);
+ break;
+ case ARM64vecb_SRSHL8x16:
+ *p++ = X_3_8_5_6_5_5(X010, X01110001, vM, X010101, vN, vD);
+ break;
+
+ case ARM64vecb_USHL64x2:
+ *p++ = X_3_8_5_6_5_5(X011, X01110111, vM, X010001, vN, vD);
+ break;
+ case ARM64vecb_USHL32x4:
+ *p++ = X_3_8_5_6_5_5(X011, X01110101, vM, X010001, vN, vD);
+ break;
+ case ARM64vecb_USHL16x8:
+ *p++ = X_3_8_5_6_5_5(X011, X01110011, vM, X010001, vN, vD);
+ break;
+ case ARM64vecb_USHL8x16:
+ *p++ = X_3_8_5_6_5_5(X011, X01110001, vM, X010001, vN, vD);
+ break;
+
+ case ARM64vecb_URSHL64x2:
+ *p++ = X_3_8_5_6_5_5(X011, X01110111, vM, X010101, vN, vD);
+ break;
+ case ARM64vecb_URSHL32x4:
+ *p++ = X_3_8_5_6_5_5(X011, X01110101, vM, X010101, vN, vD);
+ break;
+ case ARM64vecb_URSHL16x8:
+ *p++ = X_3_8_5_6_5_5(X011, X01110011, vM, X010101, vN, vD);
+ break;
+ case ARM64vecb_URSHL8x16:
+ *p++ = X_3_8_5_6_5_5(X011, X01110001, vM, X010101, vN, vD);
+ break;
+
default:
goto bad;
}
@@ -4641,48 +4714,48 @@
= X_3_6_7_6_5_5(X011, X011110, 0, X011001, vN, vD);
switch (i->ARM64in.VShiftImmV.op) {
- case ARM64vecsh_SSHR64x2: tmpl = tmpl_SSHR; goto right64x2;
- case ARM64vecsh_USHR64x2: tmpl = tmpl_USHR; goto right64x2;
- case ARM64vecsh_SHL64x2: tmpl = tmpl_SHL; goto left64x2;
- case ARM64vecsh_UQSHL64x2: tmpl = tmpl_UQSHL; goto left64x2;
- case ARM64vecsh_SQSHL64x2: tmpl = tmpl_SQSHL; goto left64x2;
- case ARM64vecsh_SQSHLU64x2: tmpl = tmpl_SQSHLU; goto left64x2;
- case ARM64vecsh_SSHR32x4: tmpl = tmpl_SSHR; goto right32x4;
- case ARM64vecsh_USHR32x4: tmpl = tmpl_USHR; goto right32x4;
- case ARM64vecsh_UQSHRN2SD: tmpl = tmpl_UQSHRN; goto right32x4;
- case ARM64vecsh_SQSHRN2SD: tmpl = tmpl_SQSHRN; goto right32x4;
- case ARM64vecsh_SQSHRUN2SD: tmpl = tmpl_SQSHRUN; goto right32x4;
- case ARM64vecsh_UQRSHRN2SD: tmpl = tmpl_UQRSHRN; goto right32x4;
- case ARM64vecsh_SQRSHRN2SD: tmpl = tmpl_SQRSHRN; goto right32x4;
- case ARM64vecsh_SQRSHRUN2SD: tmpl = tmpl_SQRSHRUN; goto right32x4;
- case ARM64vecsh_SHL32x4: tmpl = tmpl_SHL; goto left32x4;
- case ARM64vecsh_UQSHL32x4: tmpl = tmpl_UQSHL; goto left32x4;
- case ARM64vecsh_SQSHL32x4: tmpl = tmpl_SQSHL; goto left32x4;
- case ARM64vecsh_SQSHLU32x4: tmpl = tmpl_SQSHLU; goto left32x4;
- case ARM64vecsh_SSHR16x8: tmpl = tmpl_SSHR; goto right16x8;
- case ARM64vecsh_USHR16x8: tmpl = tmpl_USHR; goto right16x8;
- case ARM64vecsh_UQSHRN4HS: tmpl = tmpl_UQSHRN; goto right16x8;
- case ARM64vecsh_SQSHRN4HS: tmpl = tmpl_SQSHRN; goto right16x8;
- case ARM64vecsh_SQSHRUN4HS: tmpl = tmpl_SQSHRUN; goto right16x8;
- case ARM64vecsh_UQRSHRN4HS: tmpl = tmpl_UQRSHRN; goto right16x8;
- case ARM64vecsh_SQRSHRN4HS: tmpl = tmpl_SQRSHRN; goto right16x8;
- case ARM64vecsh_SQRSHRUN4HS: tmpl = tmpl_SQRSHRUN; goto right16x8;
- case ARM64vecsh_SHL16x8: tmpl = tmpl_SHL; goto left16x8;
- case ARM64vecsh_UQSHL16x8: tmpl = tmpl_UQSHL; goto left16x8;
- case ARM64vecsh_SQSHL16x8: tmpl = tmpl_SQSHL; goto left16x8;
- case ARM64vecsh_SQSHLU16x8: tmpl = tmpl_SQSHLU; goto left16x8;
- case ARM64vecsh_SSHR8x16: tmpl = tmpl_SSHR; goto right8x16;
- case ARM64vecsh_USHR8x16: tmpl = tmpl_USHR; goto right8x16;
- case ARM64vecsh_UQSHRN8BH: tmpl = tmpl_UQSHRN; goto right8x16;
- case ARM64vecsh_SQSHRN8BH: tmpl = tmpl_SQSHRN; goto right8x16;
- case ARM64vecsh_SQSHRUN8BH: tmpl = tmpl_SQSHRUN; goto right8x16;
- case ARM64vecsh_UQRSHRN8BH: tmpl = tmpl_UQRSHRN; goto right8x16;
- case ARM64vecsh_SQRSHRN8BH: tmpl = tmpl_SQRSHRN; goto right8x16;
- case ARM64vecsh_SQRSHRUN8BH: tmpl = tmpl_SQRSHRUN; goto right8x16;
- case ARM64vecsh_SHL8x16: tmpl = tmpl_SHL; goto left8x16;
- case ARM64vecsh_UQSHL8x16: tmpl = tmpl_UQSHL; goto left8x16;
- case ARM64vecsh_SQSHL8x16: tmpl = tmpl_SQSHL; goto left8x16;
- case ARM64vecsh_SQSHLU8x16: tmpl = tmpl_SQSHLU; goto left8x16;
+ case ARM64vecshi_SSHR64x2: tmpl = tmpl_SSHR; goto right64x2;
+ case ARM64vecshi_USHR64x2: tmpl = tmpl_USHR; goto right64x2;
+ case ARM64vecshi_SHL64x2: tmpl = tmpl_SHL; goto left64x2;
+ case ARM64vecshi_UQSHL64x2: tmpl = tmpl_UQSHL; goto left64x2;
+ case ARM64vecshi_SQSHL64x2: tmpl = tmpl_SQSHL; goto left64x2;
+ case ARM64vecshi_SQSHLU64x2: tmpl = tmpl_SQSHLU; goto left64x2;
+ case ARM64vecshi_SSHR32x4: tmpl = tmpl_SSHR; goto right32x4;
+ case ARM64vecshi_USHR32x4: tmpl = tmpl_USHR; goto right32x4;
+ case ARM64vecshi_UQSHRN2SD: tmpl = tmpl_UQSHRN; goto right32x4;
+ case ARM64vecshi_SQSHRN2SD: tmpl = tmpl_SQSHRN; goto right32x4;
+ case ARM64vecshi_SQSHRUN2SD: tmpl = tmpl_SQSHRUN; goto right32x4;
+ case ARM64vecshi_UQRSHRN2SD: tmpl = tmpl_UQRSHRN; goto right32x4;
+ case ARM64vecshi_SQRSHRN2SD: tmpl = tmpl_SQRSHRN; goto right32x4;
+ case ARM64vecshi_SQRSHRUN2SD: tmpl = tmpl_SQRSHRUN; goto right32x4;
+ case ARM64vecshi_SHL32x4: tmpl = tmpl_SHL; goto left32x4;
+ case ARM64vecshi_UQSHL32x4: tmpl = tmpl_UQSHL; goto left32x4;
+ case ARM64vecshi_SQSHL32x4: tmpl = tmpl_SQSHL; goto left32x4;
+ case ARM64vecshi_SQSHLU32x4: tmpl = tmpl_SQSHLU; goto left32x4;
+ case ARM64vecshi_SSHR16x8: tmpl = tmpl_SSHR; goto right16x8;
+ case ARM64vecshi_USHR16x8: tmpl = tmpl_USHR; goto right16x8;
+ case ARM64vecshi_UQSHRN4HS: tmpl = tmpl_UQSHRN; goto right16x8;
+ case ARM64vecshi_SQSHRN4HS: tmpl = tmpl_SQSHRN; goto right16x8;
+ case ARM64vecshi_SQSHRUN4HS: tmpl = tmpl_SQSHRUN; goto right16x8;
+ case ARM64vecshi_UQRSHRN4HS: tmpl = tmpl_UQRSHRN; goto right16x8;
+ case ARM64vecshi_SQRSHRN4HS: tmpl = tmpl_SQRSHRN; goto right16x8;
+ case ARM64vecshi_SQRSHRUN4HS: tmpl = tmpl_SQRSHRUN; goto right16x8;
+ case ARM64vecshi_SHL16x8: tmpl = tmpl_SHL; goto left16x8;
+ case ARM64vecshi_UQSHL16x8: tmpl = tmpl_UQSHL; goto left16x8;
+ case ARM64vecshi_SQSHL16x8: tmpl = tmpl_SQSHL; goto left16x8;
+ case ARM64vecshi_SQSHLU16x8: tmpl = tmpl_SQSHLU; goto left16x8;
+ case ARM64vecshi_SSHR8x16: tmpl = tmpl_SSHR; goto right8x16;
+ case ARM64vecshi_USHR8x16: tmpl = tmpl_USHR; goto right8x16;
+ case ARM64vecshi_UQSHRN8BH: tmpl = tmpl_UQSHRN; goto right8x16;
+ case ARM64vecshi_SQSHRN8BH: tmpl = tmpl_SQSHRN; goto right8x16;
+ case ARM64vecshi_SQSHRUN8BH: tmpl = tmpl_SQSHRUN; goto right8x16;
+ case ARM64vecshi_UQRSHRN8BH: tmpl = tmpl_UQRSHRN; goto right8x16;
+ case ARM64vecshi_SQRSHRN8BH: tmpl = tmpl_SQRSHRN; goto right8x16;
+ case ARM64vecshi_SQRSHRUN8BH: tmpl = tmpl_SQRSHRUN; goto right8x16;
+ case ARM64vecshi_SHL8x16: tmpl = tmpl_SHL; goto left8x16;
+ case ARM64vecshi_UQSHL8x16: tmpl = tmpl_UQSHL; goto left8x16;
+ case ARM64vecshi_SQSHL8x16: tmpl = tmpl_SQSHL; goto left8x16;
+ case ARM64vecshi_SQSHLU8x16: tmpl = tmpl_SQSHLU; goto left8x16;
default: break;
Modified: trunk/priv/host_arm64_defs.h
==============================================================================
--- trunk/priv/host_arm64_defs.h (original)
+++ trunk/priv/host_arm64_defs.h Sun Aug 17 18:32:14 2014
@@ -372,6 +372,14 @@
ARM64vecb_SQRSHL16x8, ARM64vecb_SQRSHL8x16,
ARM64vecb_UQRSHL64x2, ARM64vecb_UQRSHL32x4,
ARM64vecb_UQRSHL16x8, ARM64vecb_UQRSHL8x16,
+ ARM64vecb_SSHL64x2, ARM64vecb_SSHL32x4,
+ ARM64vecb_SSHL16x8, ARM64vecb_SSHL8x16,
+ ARM64vecb_USHL64x2, ARM64vecb_USHL32x4,
+ ARM64vecb_USHL16x8, ARM64vecb_USHL8x16,
+ ARM64vecb_SRSHL64x2, ARM64vecb_SRSHL32x4,
+ ARM64vecb_SRSHL16x8, ARM64vecb_SRSHL8x16,
+ ARM64vecb_URSHL64x2, ARM64vecb_URSHL32x4,
+ ARM64vecb_URSHL16x8, ARM64vecb_URSHL8x16,
ARM64vecb_INVALID
}
ARM64VecBinOp;
@@ -396,30 +404,30 @@
typedef
enum {
- ARM64vecsh_USHR64x2=350, ARM64vecsh_USHR32x4,
- ARM64vecsh_USHR16x8, ARM64vecsh_USHR8x16,
- ARM64vecsh_SSHR64x2, ARM64vecsh_SSHR32x4,
- ARM64vecsh_SSHR16x8, ARM64vecsh_SSHR8x16,
- ARM64vecsh_SHL64x2, ARM64vecsh_SHL32x4,
- ARM64vecsh_SHL16x8, ARM64vecsh_SHL8x16,
+ ARM64vecshi_USHR64x2=350, ARM64vecshi_USHR32x4,
+ ARM64vecshi_USHR16x8, ARM64vecshi_USHR8x16,
+ ARM64vecshi_SSHR64x2, ARM64vecshi_SSHR32x4,
+ ARM64vecshi_SSHR16x8, ARM64vecshi_SSHR8x16,
+ ARM64vecshi_SHL64x2, ARM64vecshi_SHL32x4,
+ ARM64vecshi_SHL16x8, ARM64vecshi_SHL8x16,
/* These narrowing shifts zero out the top half of the destination
register. */
- ARM64vecsh_SQSHRN2SD, ARM64vecsh_SQSHRN4HS, ARM64vecsh_SQSHRN8BH,
- ARM64vecsh_UQSHRN2SD, ARM64vecsh_UQSHRN4HS, ARM64vecsh_UQSHRN8BH,
- ARM64vecsh_SQSHRUN2SD, ARM64vecsh_SQSHRUN4HS, ARM64vecsh_SQSHRUN8BH,
- ARM64vecsh_SQRSHRN2SD, ARM64vecsh_SQRSHRN4HS, ARM64vecsh_SQRSHRN8BH,
- ARM64vecsh_UQRSHRN2SD, ARM64vecsh_UQRSHRN4HS, ARM64vecsh_UQRSHRN8BH,
- ARM64vecsh_SQRSHRUN2SD, ARM64vecsh_SQRSHRUN4HS, ARM64vecsh_SQRSHRUN8BH,
+ ARM64vecshi_SQSHRN2SD, ARM64vecshi_SQSHRN4HS, ARM64vecshi_SQSHRN8BH,
+ ARM64vecshi_UQSHRN2SD, ARM64vecshi_UQSHRN4HS, ARM64vecshi_UQSHRN8BH,
+ ARM64vecshi_SQSHRUN2SD, ARM64vecshi_SQSHRUN4HS, ARM64vecshi_SQSHRUN8BH,
+ ARM64vecshi_SQRSHRN2SD, ARM64vecshi_SQRSHRN4HS, ARM64vecshi_SQRSHRN8BH,
+ ARM64vecshi_UQRSHRN2SD, ARM64vecshi_UQRSHRN4HS, ARM64vecshi_UQRSHRN8BH,
+ ARM64vecshi_SQRSHRUN2SD, ARM64vecshi_SQRSHRUN4HS, ARM64vecshi_SQRSHRUN8BH,
/* Saturating left shifts, of various flavours. */
- ARM64vecsh_UQSHL64x2, ARM64vecsh_UQSHL32x4,
- ARM64vecsh_UQSHL16x8, ARM64vecsh_UQSHL8x16,
- ARM64vecsh_SQSHL64x2, ARM64vecsh_SQSHL32x4,
- ARM64vecsh_SQSHL16x8, ARM64vecsh_SQSHL8x16,
- ARM64vecsh_SQSHLU64x2, ARM64vecsh_SQSHLU32x4,
- ARM64vecsh_SQSHLU16x8, ARM64vecsh_SQSHLU8x16,
- ARM64vecsh_INVALID
+ ARM64vecshi_UQSHL64x2, ARM64vecshi_UQSHL32x4,
+ ARM64vecshi_UQSHL16x8, ARM64vecshi_UQSHL8x16,
+ ARM64vecshi_SQSHL64x2, ARM64vecshi_SQSHL32x4,
+ ARM64vecshi_SQSHL16x8, ARM64vecshi_SQSHL8x16,
+ ARM64vecshi_SQSHLU64x2, ARM64vecshi_SQSHLU32x4,
+ ARM64vecshi_SQSHLU16x8, ARM64vecshi_SQSHLU8x16,
+ ARM64vecshi_INVALID
}
- ARM64VecShiftOp;
+ ARM64VecShiftImmOp;
typedef
enum {
@@ -758,10 +766,10 @@
|amt| must be > 0 and <= implied lane size of |op|. Shifts
beyond these ranges are not allowed. */
struct {
- ARM64VecShiftOp op;
- HReg dst;
- HReg src;
- UInt amt;
+ ARM64VecShiftImmOp op;
+ HReg dst;
+ HReg src;
+ UInt amt;
} VShiftImmV;
struct {
HReg dst;
@@ -866,7 +874,7 @@
extern ARM64Instr* ARM64Instr_VUnaryV ( ARM64VecUnaryOp op, HReg, HReg );
extern ARM64Instr* ARM64Instr_VNarrowV ( ARM64VecNarrowOp op, UInt dszBlg2,
HReg dst, HReg src );
-extern ARM64Instr* ARM64Instr_VShiftImmV ( ARM64VecShiftOp op,
+extern ARM64Instr* ARM64Instr_VShiftImmV ( ARM64VecShiftImmOp op,
HReg dst, HReg src, UInt amt );
extern ARM64Instr* ARM64Instr_VExtV ( HReg dst,
HReg srcLo, HReg srcHi, UInt amtB );
Modified: trunk/priv/host_arm64_isel.c
==============================================================================
--- trunk/priv/host_arm64_isel.c (original)
+++ trunk/priv/host_arm64_isel.c Sun Aug 17 18:32:14 2014
@@ -2335,8 +2335,16 @@
case Iop_QSub16Sx8: case Iop_QSub8Sx16:
case Iop_QSub64Ux2: case Iop_QSub32Ux4:
case Iop_QSub16Ux8: case Iop_QSub8Ux16:
- case Iop_QDMulHi32Sx4: case Iop_QDMulHi16Sx8:
- case Iop_QRDMulHi32Sx4: case Iop_QRDMulHi16Sx8:
+ case Iop_QDMulHi32Sx4: case Iop_QDMulHi16Sx8:
+ case Iop_QRDMulHi32Sx4: case Iop_QRDMulHi16Sx8:
+ case Iop_Sh8Sx16: case Iop_Sh16Sx8:
+ case Iop_Sh32Sx4: case Iop_Sh64Sx2:
+ case Iop_Sh8Ux16: case Iop_Sh16Ux8:
+ case Iop_Sh32Ux4: case Iop_Sh64Ux2:
+ case Iop_Rsh8Sx16: case Iop_Rsh16Sx8:
+ case Iop_Rsh32Sx4: case Iop_Rsh64Sx2:
+ case Iop_Rsh8Ux16: case Iop_Rsh16Ux8:
+ case Iop_Rsh32Ux4: case Iop_Rsh64Ux2:
{
HReg res = newVRegV(env);
HReg argL = iselV128Expr(env, e->Iex.Binop.arg1);
@@ -2438,6 +2446,22 @@
case Iop_QDMulHi16Sx8: op = ARM64vecb_SQDMULH16x8; break;
case Iop_QRDMulHi32Sx4: op = ARM64vecb_SQRDMULH32x4; break;
case Iop_QRDMulHi16Sx8: op = ARM64vecb_SQRDMULH16x8; break;
+ case Iop_Sh8Sx16: op = ARM64vecb_SSHL8x16; break;
+ case Iop_Sh16Sx8: op = ARM64vecb_SSHL16x8; break;
+ case Iop_Sh32Sx4: op = ARM64vecb_SSHL32x4; break;
+ case Iop_Sh64Sx2: op = ARM64vecb_SSHL64x2; break;
+ case Iop_Sh8Ux16: op = ARM64vecb_USHL8x16; break;
+ case Iop_Sh16Ux8: op = ARM64vecb_USHL16x8; break;
+ case Iop_Sh32Ux4: op = ARM64vecb_USHL32x4; break;
+ case Iop_Sh64Ux2: op = ARM64vecb_USHL64x2; break;
+ case Iop_Rsh8Sx16: op = ARM64vecb_SRSHL8x16; break;
+ case Iop_Rsh16Sx8: op = ARM64vecb_SRSHL16x8; break;
+ case Iop_Rsh32Sx4: op = ARM64vecb_SRSHL32x4; break;
+ case Iop_Rsh64Sx2: op = ARM64vecb_SRSHL64x2; break;
+ case Iop_Rsh8Ux16: op = ARM64vecb_URSHL8x16; break;
+ case Iop_Rsh16Ux8: op = ARM64vecb_URSHL16x8; break;
+ case Iop_Rsh32Ux4: op = ARM64vecb_URSHL32x4; break;
+ case Iop_Rsh64Ux2: op = ARM64vecb_URSHL64x2; break;
default: vassert(0);
}
if (sw) {
@@ -2466,33 +2490,33 @@
UInt amt = argR->Iex.Const.con->Ico.U8;
UInt limLo = 0;
UInt limHi = 0;
- ARM64VecShiftOp op = ARM64vecsh_INVALID;
+ ARM64VecShiftImmOp op = ARM64vecshi_INVALID;
/* Establish the instruction to use. */
switch (e->Iex.Binop.op) {
- case Iop_ShrN64x2: op = ARM64vecsh_USHR64x2; break;
- case Iop_ShrN32x4: op = ARM64vecsh_USHR32x4; break;
- case Iop_ShrN16x8: op = ARM64vecsh_USHR16x8; break;
- case Iop_ShrN8x16: op = ARM64vecsh_USHR8x16; break;
- case Iop_SarN64x2: op = ARM64vecsh_SSHR64x2; break;
- case Iop_SarN32x4: op = ARM64vecsh_SSHR32x4; break;
- case Iop_SarN16x8: op = ARM64vecsh_SSHR16x8; break;
- case Iop_SarN8x16: op = ARM64vecsh_SSHR8x16; break;
- case Iop_ShlN64x2: op = ARM64vecsh_SHL64x2; break;
- case Iop_ShlN32x4: op = ARM64vecsh_SHL32x4; break;
- case Iop_ShlN16x8: op = ARM64vecsh_SHL16x8; break;
- case Iop_ShlN8x16: op = ARM64vecsh_SHL8x16; break;
- case Iop_QShlNsatUU64x2: op = ARM64vecsh_UQSHL64x2; break;
- case Iop_QShlNsatUU32x4: op = ARM64vecsh_UQSHL32x4; break;
- case Iop_QShlNsatUU16x8: op = ARM64vecsh_UQSHL16x8; break;
- case Iop_QShlNsatUU8x16: op = ARM64vecsh_UQSHL8x16; break;
- case Iop_QShlNsatSS64x2: op = ARM64vecsh_SQSHL64x2; break;
- case Iop_QShlNsatSS32x4: op = ARM64vecsh_SQSHL32x4; break;
- case Iop_QShlNsatSS16x8: op = ARM64vecsh_SQSHL16x8; break;
- case Iop_QShlNsatSS8x16: op = ARM64vecsh_SQSHL8x16; break;
- case Iop_QShlNsatSU64x2: op = ARM64vecsh_SQSHLU64x2; break;
- case Iop_QShlNsatSU32x4: op = ARM64vecsh_SQSHLU32x4; break;
- case Iop_QShlNsatSU16x8: op = ARM64vecsh_SQSHLU16x8; break;
- case Iop_QShlNsatSU8x16: op = ARM64vecsh_SQSHLU8x16; break;
+ case Iop_ShrN64x2: op = ARM64vecshi_USHR64x2; break;
+ case Iop_ShrN32x4: op = ARM64vecshi_USHR32x4; break;
+ case Iop_ShrN16x8: op = ARM64vecshi_USHR16x8; break;
+ case Iop_ShrN8x16: op = ARM64vecshi_USHR8x16; break;
+ case Iop_SarN64x2: op = ARM64vecshi_SSHR64x2; break;
+ case Iop_SarN32x4: op = ARM64vecshi_SSHR32x4; break;
+ case Iop_SarN16x8: op = ARM64vecshi_SSHR16x8; break;
+ case Iop_SarN8x16: op = ARM64vecshi_SSHR8x16; break;
+ case Iop_ShlN64x2: op = ARM64vecshi_SHL64x2; break;
+ case Iop_ShlN32x4: op = ARM64vecshi_SHL32x4; break;
+ case Iop_ShlN16x8: op = ARM64vecshi_SHL16x8; break;
+ case Iop_ShlN8x16: op = ARM64vecshi_SHL8x16; break;
+ case Iop_QShlNsatUU64x2: op = ARM64vecshi_UQSHL64x2; break;
+ case Iop_QShlNsatUU32x4: op = ARM64vecshi_UQSHL32x4; break;
+ case Iop_QShlNsatUU16x8: op = ARM64vecshi_UQSHL16x8; break;
+ case Iop_QShlNsatUU8x16: op = ARM64vecshi_UQSHL8x16; break;
+ case Iop_QShlNsatSS64x2: op = ARM64vecshi_SQSHL64x2; break;
+ case Iop_QShlNsatSS32x4: op = ARM64vecshi_SQSHL32x4; break;
+ case Iop_QShlNsatSS16x8: op = ARM64vecshi_SQSHL16x8; break;
+ case Iop_QShlNsatSS8x16: op = ARM64vecshi_SQSHL8x16; break;
+ case Iop_QShlNsatSU64x2: op = ARM64vecshi_SQSHLU64x2; break;
+ case Iop_QShlNsatSU32x4: op = ARM64vecshi_SQSHLU32x4; break;
+ case Iop_QShlNsatSU16x8: op = ARM64vecshi_SQSHLU16x8; break;
+ case Iop_QShlNsatSU8x16: op = ARM64vecshi_SQSHLU8x16; break;
default: vassert(0);
}
/* Establish the shift limits, for sanity check purposes only. */
@@ -2526,7 +2550,7 @@
/* For left shifts, the allowable amt values are
0 .. lane_bits-1. For right shifts the allowable
values are 1 .. lane_bits. */
- if (op != ARM64vecsh_INVALID && amt >= limLo && amt <= limHi) {
+ if (op != ARM64vecshi_INVALID && amt >= limLo && amt <= limHi) {
HReg src = iselV128Expr(env, argL);
HReg dst = newVRegV(env);
addInstr(env, ARM64Instr_VShiftImmV(op, dst, src, amt));
@@ -2581,55 +2605,55 @@
if (argR->tag == Iex_Const && argR->Iex.Const.con->tag == Ico_U8) {
UInt amt = argR->Iex.Const.con->Ico.U8;
UInt limit = 0;
- ARM64VecShiftOp op = ARM64vecsh_INVALID;
+ ARM64VecShiftImmOp op = ARM64vecshi_INVALID;
switch (e->Iex.Binop.op) {
/* uu */
case Iop_QandQShrNnarrow64Uto32Ux2:
- op = ARM64vecsh_UQSHRN2SD; limit = 64; break;
+ op = ARM64vecshi_UQSHRN2SD; limit = 64; break;
case Iop_QandQShrNnarrow32Uto16Ux4:
- op = ARM64vecsh_UQSHRN4HS; limit = 32; break;
+ op = ARM64vecshi_UQSHRN4HS; limit = 32; break;
case Iop_QandQShrNnarrow16Uto8Ux8:
- op = ARM64vecsh_UQSHRN8BH; limit = 16; break;
+ op = ARM64vecshi_UQSHRN8BH; limit = 16; break;
/* ss */
case Iop_QandQSarNnarrow64Sto32Sx2:
- op = ARM64vecsh_SQSHRN2SD; limit = 64; break;
+ op = ARM64vecshi_SQSHRN2SD; limit = 64; break;
case Iop_QandQSarNnarrow32Sto16Sx4:
- op = ARM64vecsh_SQSHRN4HS; limit = 32; break;
+ op = ARM64vecshi_SQSHRN4HS; limit = 32; break;
case Iop_QandQSarNnarrow16Sto8Sx8:
- op = ARM64vecsh_SQSHRN8BH; limit = 16; break;
+ op = ARM64vecshi_SQSHRN8BH; limit = 16; break;
/* su */
case Iop_QandQSarNnarrow64Sto32Ux2:
- op = ARM64vecsh_SQSHRUN2SD; limit = 64; break;
+ op = ARM64vecshi_SQSHRUN2SD; limit = 64; break;
case Iop_QandQSarNnarrow32Sto16Ux4:
- op = ARM64vecsh_SQSHRUN4HS; limit = 32; break;
+ op = ARM64vecshi_SQSHRUN4HS; limit = 32; break;
case Iop_QandQSarNnarrow16Sto8Ux8:
- op = ARM64vecsh_SQSHRUN8BH; limit = 16; break;
+ op = ARM64vecshi_SQSHRUN8BH; limit = 16; break;
/* ruu */
case Iop_QandQRShrNnarrow64Uto32Ux2:
- op = ARM64vecsh_UQRSHRN2SD; limit = 64; break;
+ op = ARM64vecshi_UQRSHRN2SD; limit = 64; break;
case Iop_QandQRShrNnarrow32Uto16Ux4:
- op = ARM64vecsh_UQRSHRN4HS; limit = 32; break;
+ op = ARM64vecshi_UQRSHRN4HS; limit = 32; break;
case Iop_QandQRShrNnarrow16Uto8Ux8:
- op = ARM64vecsh_UQRSHRN8BH; limit = 16; break;
+ op = ARM64vecshi_UQRSHRN8BH; limit = 16; break;
/* rss */
case Iop_QandQRSarNnarrow64Sto32Sx2:
- op = ARM64vecsh_SQRSHRN2SD; limit = 64; break;
+ op = ARM64vecshi_SQRSHRN2SD; limit = 64; break;
case Iop_QandQRSarNnarrow32Sto16Sx4:
- op = ARM64vecsh_SQRSHRN4HS; limit = 32; break;
+ op = ARM64vecshi_SQRSHRN4HS; limit = 32; break;
case Iop_QandQRSarNnarrow16Sto8Sx8:
- op = ARM64vecsh_SQRSHRN8BH; limit = 16; break;
+ op = ARM64vecshi_SQRSHRN8BH; limit = 16; break;
/* rsu */
case Iop_QandQRSarNnarrow64Sto32Ux2:
- op = ARM64vecsh_SQRSHRUN2SD; limit = 64; break;
+ op = ARM64vecshi_SQRSHRUN2SD; limit = 64; break;
case Iop_QandQRSarNnarrow32Sto16Ux4:
- op = ARM64vecsh_SQRSHRUN4HS; limit = 32; break;
+ op = ARM64vecshi_SQRSHRUN4HS; limit = 32; break;
case Iop_QandQRSarNnarrow16Sto8Ux8:
- op = ARM64vecsh_SQRSHRUN8BH; limit = 16; break;
+ op = ARM64vecshi_SQRSHRUN8BH; limit = 16; break;
/**/
default:
vassert(0);
}
- if (op != ARM64vecsh_INVALID && amt >= 1 && amt <= limit) {
+ if (op != ARM64vecshi_INVALID && amt >= 1 && amt <= limit) {
HReg src = iselV128Expr(env, argL);
HReg dst = newVRegV(env);
HReg fpsr = newVRegI(env);
Modified: trunk/priv/ir_defs.c
==============================================================================
--- trunk/priv/ir_defs.c (original)
+++ trunk/priv/ir_defs.c Sun Aug 17 18:32:14 2014
@@ -920,6 +920,23 @@
case Iop_QandSQRsh32x4: vex_printf("QandSQRsh32x4"); return;
case Iop_QandSQRsh64x2: vex_printf("QandSQRsh64x2"); return;
+ case Iop_Sh8Sx16: vex_printf("Sh8Sx16"); return;
+ case Iop_Sh16Sx8: vex_printf("Sh16Sx8"); return;
+ case Iop_Sh32Sx4: vex_printf("Sh32Sx4"); return;
+ case Iop_Sh64Sx2: vex_printf("Sh64Sx2"); return;
+ case Iop_Sh8Ux16: vex_printf("Sh8Ux16"); return;
+ case Iop_Sh16Ux8: vex_printf("Sh16Ux8"); return;
+ case Iop_Sh32Ux4: vex_printf("Sh32Ux4"); return;
+ case Iop_Sh64Ux2: vex_printf("Sh64Ux2"); return;
+ case Iop_Rsh8Sx16: vex_printf("Rsh8Sx16"); return;
+ case Iop_Rsh16Sx8: vex_printf("Rsh16Sx8"); return;
+ case Iop_Rsh32Sx4: vex_printf("Rsh32Sx4"); return;
+ case Iop_Rsh64Sx2: vex_printf("Rsh64Sx2"); return;
+ case Iop_Rsh8Ux16: vex_printf("Rsh8Ux16"); return;
+ case Iop_Rsh16Ux8: vex_printf("Rsh16Ux8"); return;
+ case Iop_Rsh32Ux4: vex_printf("Rsh32Ux4"); return;
+ case Iop_Rsh64Ux2: vex_printf("Rsh64Ux2"); return;
+
case Iop_QandQShrNnarrow16Uto8Ux8:
vex_printf("QandQShrNnarrow16Uto8Ux8"); return;
case Iop_QandQShrNnarrow32Uto16Ux4:
@@ -2940,6 +2957,14 @@
case Iop_CipherLV128:
case Iop_NCipherV128:
case Iop_NCipherLV128:
+ case Iop_Sh8Sx16: case Iop_Sh16Sx8:
+ case Iop_Sh32Sx4: case Iop_Sh64Sx2:
+ case Iop_Sh8Ux16: case Iop_Sh16Ux8:
+ case Iop_Sh32Ux4: case Iop_Sh64Ux2:
+ case Iop_Rsh8Sx16: case Iop_Rsh16Sx8:
+ case Iop_Rsh32Sx4: case Iop_Rsh64Sx2:
+ case Iop_Rsh8Ux16: case Iop_Rsh16Ux8:
+ case Iop_Rsh32Ux4: case Iop_Rsh64Ux2:
BINARY(Ity_V128,Ity_V128, Ity_V128);
case Iop_PolynomialMull8x8:
Modified: trunk/pub/libvex_ir.h
==============================================================================
--- trunk/pub/libvex_ir.h (original)
+++ trunk/pub/libvex_ir.h Sun Aug 17 18:32:14 2014
@@ -1545,6 +1545,7 @@
Iop_QShlNsatSS32x4, Iop_QShlNsatSS64x2,
/* VECTOR x VECTOR BIDIRECTIONAL SATURATING (& MAYBE ROUNDING) SHIFT */
+ /* All of type (V128, V128) -> V256. */
/* The least significant 8 bits of each lane of the second
operand are used as the shift amount, and interpreted signedly.
Positive values mean a shift left, negative a shift right. The
@@ -1572,6 +1573,34 @@
Iop_QandSQRsh8x16, Iop_QandSQRsh16x8,
Iop_QandSQRsh32x4, Iop_QandSQRsh64x2,
+ /* VECTOR x VECTOR BIDIRECTIONAL (& MAYBE ROUNDING) SHIFT */
+ /* All of type (V128, V128) -> V128 */
+ /* The least significant 8 bits of each lane of the second
+ operand are used as the shift amount, and interpreted signedly.
+ Positive values mean a shift left, negative a shift right.
+ There are also rounding variants, which add 2^(shift_amount-1)
+ to the value before shifting, but only in the shift-right case.
+
+ For left shifts, the vacated places are filled with zeroes.
+ For right shifts, the vacated places are filled with zeroes
+ for the U variants and sign bits for the S variants. */
+ // Signed and unsigned, non-rounding
+ Iop_Sh8Sx16, Iop_Sh16Sx8, Iop_Sh32Sx4, Iop_Sh64Sx2,
+ Iop_Sh8Ux16, Iop_Sh16Ux8, Iop_Sh32Ux4, Iop_Sh64Ux2,
+
+ // Signed and unsigned, rounding
+ Iop_Rsh8Sx16, Iop_Rsh16Sx8, Iop_Rsh32Sx4, Iop_Rsh64Sx2,
+ Iop_Rsh8Ux16, Iop_Rsh16Ux8, Iop_Rsh32Ux4, Iop_Rsh64Ux2,
+
+ /* The least significant 8 bits of each lane of the second
+ operand are used as the shift amount, and interpreted signedly.
+ Positive values mean a shift left, negative a shift right. The
+ result is signedly or unsignedly saturated. There are also
+ rounding variants, which add 2^(shift_amount-1) to the value before
+ shifting, but only in the shift-right case. Vacated positions
+ are filled with zeroes. IOW, it's either SHR or SHL, but not SAR.
+ */
+
/* VECTOR x SCALAR SATURATING (& MAYBE ROUNDING) NARROWING SHIFT RIGHT */
/* All of type (V128, I8) -> V128 */
/* The first argument is shifted right, then narrowed to half the width
|
|
From: <sv...@va...> - 2014-08-17 13:34:05
|
Author: philippe
Date: Sun Aug 17 13:33:57 2014
New Revision: 14299
Log:
Add comments in getoff.c to clarify its intended usage.
Modified:
trunk/auxprogs/getoff.c
Modified: trunk/auxprogs/getoff.c
==============================================================================
--- trunk/auxprogs/getoff.c (original)
+++ trunk/auxprogs/getoff.c Sun Aug 17 13:33:57 2014
@@ -22,6 +22,28 @@
The GNU General Public License is contained in the file COPYING.
*/
+/* This file is used to generate target executable(s) getoff-<platform>
+ In a bi-arch setup, this is used to build 2 executables
+ (for the primary and secondary platforms).
+
+ This program uses user space libraries to retrieve some platform
+ dependent offsets needed for Valgrind core, but that cannot (easily)
+ be retrieved by Valgrind core.
+
+ This is currently used only for handling the gdbsrv QGetTlsAddr query :
+ it only computes and outputs lm_modid_offset in struct link_map
+ of the dynamic linker. In theory, we should also compute the offset needed
+ to get the dtv from the thread register/pointer/...
+ Currently, the various valgrind-low-xxxxxx.c files are hardcoding this
+ offset as it is deemed (?) stable, and there is no clear way how to
+ compute this dtv offset.
+
+ The getoff-<platform> executable will be launched automatically by
+ Valgrind gdbserver when the first QGetTlsAddr query is retrieved.
+
+ On plaforms that do not support __thread and/or that do not provide
+ dlinfo RTLD_DI_TLS_MODID, this executable produces no output. */
+
#ifndef _GNU_SOURCE
#define _GNU_SOURCE
#endif
@@ -63,13 +85,7 @@
progname);
}
-/* Currently, only computes and output lm_modid_offset in struct link_map
- of the dynamic linker. In theory, we should also compute the offset needed
- to get the dtv from the thread register/pointer/...
- Currently, the various valgrind-low-xxxxxx.c files are hardcoding this
- offset as it is deemed (?) stable, and there is no clear way how to
- compute this dtv offset.
-*/
+
int main (int argc, char** argv)
{
int i;
|
|
From: <sv...@va...> - 2014-08-17 12:24:05
|
Author: sewardj
Date: Sun Aug 17 12:23:56 2014
New Revision: 14298
Log:
Fix build problems on MacOSX pertaining to r14283.
Modified:
trunk/auxprogs/Makefile.am
Modified: trunk/auxprogs/Makefile.am
==============================================================================
--- trunk/auxprogs/Makefile.am (original)
+++ trunk/auxprogs/Makefile.am Sun Aug 17 12:23:56 2014
@@ -56,11 +56,18 @@
# getoff-<platform>
# Used to retrieve user space various offsets, using user space libraries.
#----------------------------------------------------------------------------
+
noinst_PROGRAMS = getoff-@VGCONF_ARCH_PRI@-@VGCONF_OS@
if VGCONF_HAVE_PLATFORM_SEC
noinst_PROGRAMS += getoff-@VGCONF_ARCH_SEC@-@VGCONF_OS@
endif
+# The link flags for this are tricky, because we want to build it for
+# both the primary and secondary platforms, and add
+# "-Wl,-read_only_relocs -Wl,suppress" to whichever of those is x86-darwin,
+# if any. Hence there's a double-nested conditional that adds to the
+# LDFLAGS in both cases.
+
getoff_@VGCONF_ARCH_PRI@_@VGCONF_OS@_SOURCES = getoff.c
getoff_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CPPFLAGS = $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
getoff_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CFLAGS = $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
@@ -69,6 +76,13 @@
if HAVE_DLINFO_RTLD_DI_TLS_MODID
getoff_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LDADD = $(LDADD) -ldl
endif
+# If there is no secondary platform, and the platforms include x86-darwin,
+# then the primary platform must be x86-darwin. Hence:
+if ! VGCONF_HAVE_PLATFORM_SEC
+if VGCONF_PLATFORMS_INCLUDE_X86_DARWIN
+getoff_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LDFLAGS += -Wl,-read_only_relocs -Wl,suppress
+endif
+endif
if VGCONF_HAVE_PLATFORM_SEC
getoff_@VGCONF_ARCH_SEC@_@VGCONF_OS@_SOURCES = getoff.c
@@ -80,6 +94,14 @@
getoff_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LDADD = $(LDADD) -ldl
endif
endif
+# If there is a secondary platform, and the platforms include x86-darwin,
+# then the primary platform must be amd64-darwin and the secondary platform
+# must be x86-darwin. Hence:
+if VGCONF_HAVE_PLATFORM_SEC
+if VGCONF_PLATFORMS_INCLUDE_X86_DARWIN
+getoff_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LDFLAGS += -Wl,-read_only_relocs -Wl,suppress
+endif
+endif
#----------------------------------------------------------------------------
# General stuff
|
|
From: Rich C. <rc...@wi...> - 2014-08-17 05:05:33
|
valgrind revision: 14297
VEX revision: 2925
C compiler: gcc (SUSE Linux) 4.8.1 20130909 [gcc-4_8-branch revision 202388]
GDB: GNU gdb (GDB; openSUSE Factory) 7.6.50.20130731-cvs
Assembler: GNU assembler (GNU Binutils; openSUSE Factory) 2.23.2
C library: GNU C Library (GNU libc) stable release version 2.18 (git )
uname -mrs: Linux 3.11.4-3-desktop x86_64
Vendor version: Welcome to openSUSE 13.1 "Bottle" Beta 1 - Kernel %r (%t).
Nightly build on rodan ( Linux 3.11.4-3-desktop x86_64 )
Started at 2014-08-16 19:22:01 CDT
Ended at 2014-08-17 00:05:22 CDT
Results unchanged from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 609 tests, 6 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
memcheck/tests/err_disable3 (stderr)
memcheck/tests/err_disable4 (stderr)
memcheck/tests/threadname (stderr)
memcheck/tests/threadname_xml (stderr)
memcheck/tests/vbit-test/vbit-test (stderr)
exp-sgcheck/tests/hackedbz2 (stderr)
--tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old
+ perl perf/vg_perf --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old perf
-- Running tests in perf ----------------------------------------------
-- bigcode1 --
bigcode1 valgrind-new:0.48s no: 7.8s (16.4x, -----) me:15.0s (31.2x, -----) ca:62.0s (129.1x, -----) he: 9.0s (18.7x, -----) ca:25.6s (53.4x, -----) dr: 8.8s (18.3x, -----) ma: 9.1s (19.0x, -----)
bigcode1 valgrind-old:0.48s no: 7.8s (16.4x, 0.0%) me:15.0s (31.2x, 0.0%) ca:61.7s (128.6x, 0.4%) he: 8.9s (18.6x, 0.1%) ca:25.6s (53.3x, 0.0%) dr: 8.8s (18.3x, 0.0%) ma: 9.1s (19.0x, 0.1%)
-- bigcode2 --
bigcode2 valgrind-new:0.49s no:18.8s (38.4x, -----) me:38.4s (78.3x, -----) ca:104.8s (213.9x, -----) he:22.5s (45.9x, -----) ca:41.2s (84.1x, -----) dr:21.4s (43.6x, -----) ma:21.5s (43.8x, -----)
bigcode2 valgrind-old:0.49s no:18.9s (38.5x, -0.1%) me:38.4s (78.4x, -0.1%) ca:104.8s (213.9x, 0.0%) he:22.5s (46.0x, -0.0%) ca:41.2s (84.1x, 0.0%) dr:21.4s (43.6x, -0.1%) ma:21.5s (43.8x, 0.0%)
-- bz2 --
bz2 valgrind-new:2.32s no:10.3s ( 4.4x, -----) me:27.1s (11.7x, -----) ca:59.7s (25.7x, -----) he:39.9s (17.2x, -----) ca:76.9s (33.1x, -----) dr:56.3s (24.3x, -----) ma: 9.7s ( 4.2x, -----)
bz2 valgrind-old:2.32s no:10.3s ( 4.4x, 0.0%) me:27.1s (11.7x, 0.0%) ca:59.7s (25.7x, 0.0%) he:39.9s (17.2x, 0.0%) ca:76.9s (33.1x, -0.0%) dr:56.3s (24.3x, 0.0%) ma: 9.7s ( 4.2x, 0.0%)
-- fbench --
fbench valgrind-new:1.44s no: 5.4s ( 3.8x, -----) me:18.1s (12.6x, -----) ca:27.1s (18.8x, -----) he:12.7s ( 8.8x, -----) ca:21.7s (15.0x, -----) dr:12.8s ( 8.9x, -----) ma: 5.6s ( 3.9x, -----)
fbench valgrind-old:1.44s no: 5.4s ( 3.8x, 0.2%) me:18.1s (12.6x, -0.1%) ca:27.1s (18.8x, 0.0%) he:12.7s ( 8.8x, 0.0%) ca:21.7s (15.0x, 0.0%) dr:12.8s ( 8.9x, 0.0%) ma: 5.6s ( 3.9x, 0.4%)
-- ffbench --
ffbench valgrind-new:1.00s no: 3.7s ( 3.7x, -----) me:12.1s (12.1x, -----) ca: 8.2s ( 8.2x, -----) he:21.2s (21.2x, -----) ca:27.6s (27.6x, -----) dr:17.1s (17.1x, -----) ma: 3.7s ( 3.7x, -----)
ffbench valgrind-old:1.00s no: 3.7s ( 3.7x, -0.3%) me:12.1s (12.1x, 0.0%) ca: 8.2s ( 8.2x, 0.0%) he:21.2s (21.2x, 0.0%) ca:27.7s (27.7x, -0.1%) dr:17.1s (17.1x, 0.0%) ma: 3.7s ( 3.7x, 0.3%)
-- heap --
heap valgrind-new:0.41s no: 3.3s ( 8.1x, -----) me:22.1s (53.9x, -----) ca:31.0s (75.7x, -----) he:31.2s (76.2x, -----) ca:22.8s (55.7x, -----) dr:20.0s (48.8x, -----) ma:21.9s (53.4x, -----)
heap valgrind-old:0.41s no: 3.3s ( 8.1x, -0.3%) me:22.1s (53.9x, -0.1%) ca:31.1s (75.7x, -0.1%) he:31.2s (76.1x, 0.0%) ca:22.8s (55.7x, 0.0%) dr:20.0s (48.8x, -0.1%) ma:21.9s (53.4x, -0.0%)
-- heap_pdb4 --
heap_pdb4 valgrind-new:0.55s no: 3.6s ( 6.6x, -----) me:41.9s (76.2x, -----) ca:33.8s (61.5x, -----) he:36.3s (65.9x, -----) ca:24.9s (45.3x, -----) dr:22.5s (40.9x, -----) ma:23.6s (43.0x, -----)
heap_pdb4 valgrind-old:0.55s no: 3.7s ( 6.7x, -0.3%) me:41.9s (76.1x, 0.0%) ca:33.8s (61.5x, 0.0%) he:36.3s (66.0x, -0.1%) ca:24.9s (45.3x, 0.0%) dr:22.5s (40.9x, -0.1%) ma:23.6s (43.0x, -0.0%)
-- many-loss-records --
many-loss-records valgrind-new:0.05s no: 1.3s (25.2x, -----) me: 6.0s (119.0x, -----) ca: 5.1s (101.8x, -----) he: 5.3s (106.6x, -----) ca: 4.1s (81.8x, -----) dr: 4.7s (93.2x, -----) ma: 4.7s (93.6x, -----)
many-loss-records valgrind-old:0.05s no: 1.3s (25.4x, -0.8%) me: 6.0s (119.2x, -0.2%) ca: 5.1s (101.8x, 0.0%) he: 5.3s (106.4x, 0.2%) ca: 4.1s (81.8x, 0.0%) dr: 4.7s (93.4x, -0.2%) ma: 4.7s (93.8x, -0.2%)
-- many-xpts --
many-xpts valgrind-new:0.15s no: 1.6s (10.3x, -----) me: 6.9s (46.2x, -----) ca:13.1s (87.5x, -----) he: 9.9s (65.9x, -----) ca: 5.8s (38.8x, -----) dr: 6.1s (40.7x, -----) ma: 7.4s (49.6x, -----)
many-xpts valgrind-old:0.15s no: 1.5s (10.3x, 0.6%) me: 6.9s (46.1x, 0.1%) ca:13.1s (87.5x, 0.0%) he: 9.9s (65.8x, 0.1%) ca: 5.8s (38.7x, 0.3%) dr: 6.1s (40.8x, -0.2%) ma: 7.4s (49.6x, 0.0%)
-- sarp --
sarp valgrind-new:0.10s no: 1.5s (14.8x, -----) me: 8.9s (89.1x, -----) ca: 8.4s (84.0x, -----) he:30.8s (308.1x, -----) ca: 5.6s (56.1x, -----) dr: 4.0s (40.5x, -----) ma: 1.5s (15.2x, -----)
sarp valgrind-old:0.10s no: 1.5s (14.8x, 0.0%) me: 8.9s (88.8x, 0.3%) ca: 8.4s (83.9x, 0.1%) he:30.9s (308.6x, -0.2%) ca: 5.6s (56.1x, 0.0%) dr: 4.0s (40.5x, 0.0%) ma: 1.5s (15.2x, 0.0%)
-- tinycc --
tinycc valgrind-new:0.75s no: 7.6s (10.2x, -----) me:38.0s (50.6x, -----) ca:47.7s (63.6x, -----) he:45.8s (61.1x, -----) ca:44.9s (59.9x, -----) dr:38.0s (50.6x, -----) ma:12.0s (16.0x, -----)
tinycc valgrind-old:0.75s no: 7.6s (10.1x, 0.1%) me:38.0s (50.6x, 0.0%) ca:47.7s (63.7x, -0.0%) he:45.8s (61.0x, 0.0%) ca:45.0s (60.0x, -0.2%) dr:38.0s (50.6x, 0.0%) ma:12.0s (16.0x, -0.1%)
-- Finished tests in perf ----------------------------------------------
== 11 programs, 154 timings =================
real 162m20.820s
user 160m26.107s
sys 1m47.864s
=================================================
./valgrind-new/exp-sgcheck/tests/hackedbz2.stderr.diff-glibc28-amd64
=================================================
--- hackedbz2.stderr.exp-glibc28-amd64 2014-08-16 20:22:35.262659850 -0500
+++ hackedbz2.stderr.out 2014-08-16 21:21:52.305010472 -0500
@@ -1,7 +1,6 @@
Invalid read of size 1
- at 0x........: vex_strlen (hackedbz2.c:1006)
- by 0x........: add_to_myprintf_buf (hackedbz2.c:1284)
+ at 0x........: add_to_myprintf_buf (hackedbz2.c:1006)
by 0x........: vex_printf (hackedbz2.c:1155)
by 0x........: BZ2_compressBlock (hackedbz2.c:4039)
by 0x........: handle_compress (hackedbz2.c:4761)
=================================================
./valgrind-new/memcheck/tests/err_disable3.stderr.diff
=================================================
--- err_disable3.stderr.exp 2014-08-16 20:22:45.311766307 -0500
+++ err_disable3.stderr.out 2014-08-16 20:42:43.962388155 -0500
@@ -10,8 +10,6 @@
Thread 2:
Invalid read of size 1
at 0x........: err (err_disable3.c:25)
- by 0x........: child_fn (err_disable3.c:31)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable3.c:42)
=================================================
./valgrind-new/memcheck/tests/err_disable4.stderr.diff
=================================================
--- err_disable4.stderr.exp 2014-08-16 20:22:47.393788364 -0500
+++ err_disable4.stderr.out 2014-08-16 20:42:47.937429965 -0500
@@ -1501,8 +1501,6 @@
Thread x:
Invalid read of size 1
at 0x........: err (err_disable4.c:41)
- by 0x........: child_fn_2 (err_disable4.c:55)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable4.c:68)
=================================================
./valgrind-new/memcheck/tests/threadname.stderr.diff
=================================================
--- threadname.stderr.exp 2014-08-16 20:22:43.987752280 -0500
+++ threadname.stderr.out 2014-08-16 20:48:54.867281830 -0500
@@ -9,36 +9,12 @@
Thread 2:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_0 (threadname.c:53)
- ...
Address 0x........ is 0 bytes after a block of size 2 alloc'd
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: bad_things (threadname.c:15)
by 0x........: child_fn_0 (threadname.c:53)
...
-Thread 3 try1:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
- Address 0x........ is 0 bytes after a block of size 3 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
-
-Thread 4 012345678901234:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
- Address 0x........ is 0 bytes after a block of size 4 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
-
Thread 1:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
=================================================
./valgrind-new/memcheck/tests/threadname_xml.stderr.diff
=================================================
--- threadname_xml.stderr.exp 2014-08-16 20:22:41.696728009 -0500
+++ threadname_xml.stderr.out 2014-08-16 20:48:56.915303141 -0500
@@ -94,14 +94,6 @@
<file>threadname.c</file>
<line>...</line>
</frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_0</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
</stack>
<auxwhat>Address 0x........ is 0 bytes after a block of size 2 alloc'd</auxwhat>
<stack>
@@ -135,112 +127,6 @@
<error>
<unique>0x........</unique>
<tid>...</tid>
- <threadname>try1</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 3 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>malloc</fn>
- <dir>...</dir>
- <file>vg_replace_malloc.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
-</error>
-
-<error>
- <unique>0x........</unique>
- <tid>...</tid>
- <threadname>012345678901234</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_2</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 4 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
<truncated beyond 100 lines>
=================================================
./valgrind-new/memcheck/tests/vbit-test/vbit-test.stderr.diff
=================================================
--- vbit-test.stderr.exp 2014-08-16 20:22:46.248776234 -0500
+++ vbit-test.stderr.out 2014-08-16 20:51:05.172638799 -0500
@@ -0,0 +1 @@
+unknown opcode 5918
=================================================
./valgrind-old/exp-sgcheck/tests/hackedbz2.stderr.diff-glibc28-amd64
=================================================
--- hackedbz2.stderr.exp-glibc28-amd64 2014-08-16 19:22:37.160333636 -0500
+++ hackedbz2.stderr.out 2014-08-16 20:20:13.243156233 -0500
@@ -1,7 +1,6 @@
Invalid read of size 1
- at 0x........: vex_strlen (hackedbz2.c:1006)
- by 0x........: add_to_myprintf_buf (hackedbz2.c:1284)
+ at 0x........: add_to_myprintf_buf (hackedbz2.c:1006)
by 0x........: vex_printf (hackedbz2.c:1155)
by 0x........: BZ2_compressBlock (hackedbz2.c:4039)
by 0x........: handle_compress (hackedbz2.c:4761)
=================================================
./valgrind-old/memcheck/tests/err_disable3.stderr.diff
=================================================
--- err_disable3.stderr.exp 2014-08-16 19:22:40.780373440 -0500
+++ err_disable3.stderr.out 2014-08-16 19:41:10.262580686 -0500
@@ -10,8 +10,6 @@
Thread 2:
Invalid read of size 1
at 0x........: err (err_disable3.c:25)
- by 0x........: child_fn (err_disable3.c:31)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable3.c:42)
=================================================
./valgrind-old/memcheck/tests/err_disable4.stderr.diff
=================================================
--- err_disable4.stderr.exp 2014-08-16 19:22:39.600360465 -0500
+++ err_disable4.stderr.out 2014-08-16 19:41:14.638628725 -0500
@@ -1501,8 +1501,6 @@
Thread x:
Invalid read of size 1
at 0x........: err (err_disable4.c:41)
- by 0x........: child_fn_2 (err_disable4.c:55)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable4.c:68)
=================================================
./valgrind-old/memcheck/tests/threadname.stderr.diff
=================================================
--- threadname.stderr.exp 2014-08-16 19:22:40.214367217 -0500
+++ threadname.stderr.out 2014-08-16 19:47:22.409668561 -0500
@@ -9,36 +9,12 @@
Thread 2:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_0 (threadname.c:53)
- ...
Address 0x........ is 0 bytes after a block of size 2 alloc'd
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: bad_things (threadname.c:15)
by 0x........: child_fn_0 (threadname.c:53)
...
-Thread 3 try1:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
- Address 0x........ is 0 bytes after a block of size 3 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
-
-Thread 4 012345678901234:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
- Address 0x........ is 0 bytes after a block of size 4 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
-
Thread 1:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
=================================================
./valgrind-old/memcheck/tests/threadname_xml.stderr.diff
=================================================
--- threadname_xml.stderr.exp 2014-08-16 19:22:40.310368272 -0500
+++ threadname_xml.stderr.out 2014-08-16 19:47:24.439690873 -0500
@@ -94,14 +94,6 @@
<file>threadname.c</file>
<line>...</line>
</frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_0</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
</stack>
<auxwhat>Address 0x........ is 0 bytes after a block of size 2 alloc'd</auxwhat>
<stack>
@@ -135,112 +127,6 @@
<error>
<unique>0x........</unique>
<tid>...</tid>
- <threadname>try1</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 3 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>malloc</fn>
- <dir>...</dir>
- <file>vg_replace_malloc.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
-</error>
-
-<error>
- <unique>0x........</unique>
- <tid>...</tid>
- <threadname>012345678901234</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_2</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 4 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
<truncated beyond 100 lines>
=================================================
./valgrind-old/memcheck/tests/vbit-test/vbit-test.stderr.diff
=================================================
--- vbit-test.stderr.exp 2014-08-16 19:22:40.685372396 -0500
+++ vbit-test.stderr.out 2014-08-16 19:49:31.999093183 -0500
@@ -0,0 +1 @@
+unknown opcode 5918
|
|
From: Christian B. <bor...@de...> - 2014-08-17 04:10:02
|
valgrind revision: 14297 VEX revision: 2925 C compiler: gcc (SUSE Linux) 4.3.4 [gcc-4_3-branch revision 152973] GDB: GNU gdb (GDB) SUSE (7.5.1-0.7.29) Assembler: GNU assembler (GNU Binutils; SUSE Linux Enterprise 11) 2.23.1 C library: GNU C Library stable release version 2.11.3 (20110527) uname -mrs: Linux 3.0.101-0.31-default s390x Vendor version: Welcome to SUSE Linux Enterprise Server 11 SP3 (s390x) - Kernel %r (%t). Nightly build on sless390 ( SUSE Linux Enterprise Server 11 SP3 gcc 4.3.4 on z196 (s390x) ) Started at 2014-08-17 03:45:01 CEST Ended at 2014-08-17 06:09:46 CEST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 659 tests, 4 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/origin5-bz2 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) helgrind/tests/pth_cond_destroy_busy (stderr) helgrind/tests/tc20_verifywrap (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.22s no: 4.7s (21.4x, -----) me: 6.6s (30.1x, -----) ca:26.6s (121.0x, -----) he: 5.6s (25.4x, -----) ca: 9.1s (41.5x, -----) dr: 4.8s (21.8x, -----) ma: 4.8s (21.6x, -----) bigcode1 valgrind-old:0.22s no: 4.7s (21.4x, 0.0%) me: 6.6s (30.1x, -0.2%) ca:26.6s (121.1x, -0.0%) he: 5.6s (25.5x, -0.4%) ca: 9.1s (41.5x, 0.0%) dr: 4.8s (21.8x, 0.2%) ma: 4.7s (21.4x, 1.1%) -- bigcode2 -- bigcode2 valgrind-new:0.24s no: 7.7s (32.2x, -----) me:13.5s (56.2x, -----) ca:39.4s (164.3x, -----) he:10.6s (44.0x, -----) ca:14.2s (59.2x, -----) dr: 9.0s (37.5x, -----) ma: 8.2s (34.1x, -----) bigcode2 valgrind-old:0.24s no: 7.7s (32.2x, 0.3%) me:13.5s (56.3x, -0.1%) ca:39.6s (164.9x, -0.4%) he:10.6s (44.2x, -0.4%) ca:14.2s (59.2x, -0.1%) dr: 9.0s (37.5x, -0.1%) ma: 8.2s (34.2x, -0.4%) -- bz2 -- bz2 valgrind-new:0.69s no: 6.5s ( 9.4x, -----) me:12.7s (18.3x, -----) ca:30.9s (44.8x, -----) he:19.6s (28.3x, -----) ca:34.3s (49.7x, -----) dr:30.4s (44.1x, -----) ma: 3.8s ( 5.5x, -----) bz2 valgrind-old:0.69s no: 6.5s ( 9.5x, -1.1%) me:12.7s (18.3x, 0.0%) ca:30.9s (44.8x, -0.1%) he:19.6s (28.3x, 0.0%) ca:34.3s (49.7x, -0.0%) dr:30.4s (44.0x, 0.1%) ma: 3.8s ( 5.4x, 1.8%) -- fbench -- fbench valgrind-new:0.40s no: 1.6s ( 4.0x, -----) me: 4.2s (10.6x, -----) ca: 9.3s (23.3x, -----) he: 6.2s (15.5x, -----) ca: 7.2s (18.0x, -----) dr: 5.5s (13.8x, -----) ma: 1.6s ( 4.1x, -----) fbench valgrind-old:0.40s no: 1.6s ( 4.0x, 0.0%) me: 4.2s (10.6x, 0.0%) ca: 9.3s (23.3x, -0.2%) he: 6.2s (15.5x, 0.0%) ca: 7.2s (18.0x, 0.0%) dr: 5.5s (13.9x, -0.5%) ma: 1.6s ( 4.1x, 0.0%) -- ffbench -- ffbench valgrind-new:0.21s no: 1.2s ( 5.6x, -----) me: 3.0s (14.1x, -----) ca: 3.0s (14.5x, -----) he:44.1s (210.1x, -----) ca: 9.6s (45.9x, -----) dr: 7.0s (33.3x, -----) ma: 1.0s ( 4.6x, -----) ffbench valgrind-old:0.21s no: 1.2s ( 5.6x, 0.0%) me: 3.0s (14.1x, -0.3%) ca: 3.0s (14.4x, 0.3%) he:44.1s (210.1x, 0.0%) ca: 9.6s (45.9x, 0.0%) dr: 7.0s (33.3x, 0.1%) ma: 1.0s ( 4.6x, 0.0%) -- heap -- heap valgrind-new:0.23s no: 2.2s ( 9.7x, -----) me: 8.8s (38.2x, -----) ca:13.2s (57.6x, -----) he:12.7s (55.2x, -----) ca:11.3s (49.2x, -----) dr: 7.5s (32.4x, -----) ma: 7.9s (34.5x, -----) heap valgrind-old:0.23s no: 2.3s ( 9.8x, -0.9%) me: 8.8s (38.1x, 0.1%) ca:13.2s (57.6x, -0.1%) he:12.8s (55.7x, -0.9%) ca:11.3s (49.3x, -0.2%) dr: 7.6s (33.0x, -1.7%) ma: 8.0s (34.9x, -1.0%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.22s no: 2.5s (11.3x, -----) me:12.7s (57.8x, -----) ca:14.4s (65.5x, -----) he:13.9s (63.3x, -----) ca:12.4s (56.4x, -----) dr: 8.5s (38.7x, -----) ma: 8.0s (36.3x, -----) heap_pdb4 valgrind-old:0.22s no: 2.5s (11.3x, 0.0%) me:12.7s (57.7x, 0.1%) ca:14.4s (65.5x, 0.0%) he:14.0s (63.7x, -0.7%) ca:12.4s (56.3x, 0.1%) dr: 8.6s (39.2x, -1.3%) ma: 8.0s (36.4x, -0.3%) -- many-loss-records -- many-loss-records valgrind-new:0.03s no: 0.5s (17.7x, -----) me: 2.1s (69.7x, -----) ca: 1.9s (65.0x, -----) he: 2.1s (70.7x, -----) ca: 1.9s (64.0x, -----) dr: 1.7s (56.3x, -----) ma: 1.6s (55.0x, -----) many-loss-records valgrind-old:0.03s no: 0.5s (17.7x, 0.0%) me: 2.1s (69.7x, 0.0%) ca: 2.0s (65.3x, -0.5%) he: 2.1s (71.3x, -0.9%) ca: 1.9s (64.0x, 0.0%) dr: 1.7s (56.3x, 0.0%) ma: 1.7s (55.3x, -0.6%) -- many-xpts -- many-xpts valgrind-new:0.07s no: 0.7s ( 9.6x, -----) me: 3.2s (45.3x, -----) ca:370.8s (5296.4x, -----) he: 6.4s (92.0x, -----) ca: 2.8s (40.1x, -----) dr: 2.4s (34.9x, -----) ma: 2.5s (36.1x, -----) many-xpts valgrind-old:0.07s no: 0.7s ( 9.6x, 0.0%) me: 3.2s (45.1x, 0.3%) ca:371.6s (5309.0x, -0.2%) he: 6.4s (91.9x, 0.2%) ca: 2.8s (40.1x, 0.0%) dr: 2.4s (34.9x, 0.0%) ma: 2.5s (36.3x, -0.4%) -- sarp -- sarp valgrind-new:0.03s no: 0.6s (19.7x, -----) me: 3.5s (116.0x, -----) ca: 3.2s (107.3x, -----) he:16.4s (546.0x, -----) ca: 2.0s (68.0x, -----) dr: 1.3s (44.7x, -----) ma: 0.5s (16.0x, -----) sarp valgrind-old:0.03s no: 0.6s (19.7x, 0.0%) me: 3.5s (115.3x, 0.6%) ca: 3.2s (108.0x, -0.6%) he:16.3s (544.7x, 0.2%) ca: 2.0s (68.0x, 0.0%) dr: 1.4s (45.0x, -0.7%) ma: 0.5s (16.0x, 0.0%) -- tinycc -- tinycc valgrind-new:0.22s no: 3.1s (14.0x, -----) me:14.5s (65.8x, -----) ca:30.2s (137.5x, -----) he:27.4s (124.8x, -----) ca:21.3s (96.6x, -----) dr:21.2s (96.2x, -----) ma: 3.9s (17.7x, -----) tinycc valgrind-old:0.22s no: 3.1s (13.9x, 0.3%) me:14.5s (66.0x, -0.2%) ca:30.1s (137.0x, 0.3%) he:27.5s (124.9x, -0.1%) ca:21.2s (96.5x, 0.2%) dr:21.1s (95.8x, 0.4%) ma: 3.9s (17.6x, 0.5%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 111m55.180s user 111m7.839s sys 0m39.884s |
|
From: Tom H. <to...@co...> - 2014-08-17 03:23:28
|
valgrind revision: 14297 VEX revision: 2925 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) GDB: GNU gdb (GDB) Fedora (7.3.1-48.fc15) Assembler: GNU assembler version 2.21.51.0.6-6.fc15 20110118 C library: GNU C Library stable release version 2.14.1 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 15 (Lovelock) Nightly build on bristol ( x86_64, Fedora 15 ) Started at 2014-08-17 03:12:36 BST Ended at 2014-08-17 04:23:16 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 694 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 1 stdoutB failure, 0 post failures == gdbserver_tests/hgtls (stdoutB) memcheck/tests/vbit-test/vbit-test (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 1.6s (14.8x, -----) me: 3.2s (29.2x, -----) ca:14.4s (130.7x, -----) he: 1.9s (17.3x, -----) ca: 3.8s (34.6x, -----) dr: 1.9s (17.0x, -----) ma: 1.9s (17.5x, -----) bigcode1 valgrind-old:0.11s no: 1.6s (14.9x, -0.6%) me: 3.2s (29.4x, -0.6%) ca:14.4s (130.6x, 0.1%) he: 1.9s (17.3x, 0.0%) ca: 3.8s (34.9x, -0.8%) dr: 1.9s (16.9x, 0.5%) ma: 1.9s (17.5x, 0.0%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 3.9s (35.7x, -----) me: 8.2s (74.8x, -----) ca:26.0s (236.5x, -----) he: 4.8s (43.5x, -----) ca: 7.2s (65.0x, -----) dr: 4.5s (41.4x, -----) ma: 4.5s (40.5x, -----) bigcode2 valgrind-old:0.11s no: 3.9s (35.2x, 1.5%) me: 8.2s (74.9x, -0.1%) ca:25.7s (233.4x, 1.3%) he: 4.8s (43.7x, -0.6%) ca: 7.1s (64.9x, 0.1%) dr: 4.5s (40.5x, 2.2%) ma: 4.5s (41.0x, -1.1%) -- bz2 -- bz2 valgrind-new:0.51s no: 2.1s ( 4.1x, -----) me: 6.1s (12.0x, -----) ca:13.8s (27.0x, -----) he: 8.8s (17.3x, -----) ca:11.6s (22.7x, -----) dr:11.0s (21.5x, -----) ma: 2.1s ( 4.1x, -----) bz2 valgrind-old:0.51s no: 2.1s ( 4.1x, -0.5%) me: 6.1s (11.9x, 0.7%) ca:13.7s (26.8x, 0.5%) he: 8.8s (17.2x, 0.5%) ca:11.7s (22.8x, -0.5%) dr:11.0s (21.6x, -0.2%) ma: 2.1s ( 4.1x, 0.0%) -- fbench -- fbench valgrind-new:0.22s no: 1.0s ( 4.5x, -----) me: 3.6s (16.3x, -----) ca: 5.5s (25.1x, -----) he: 2.6s (12.0x, -----) ca: 3.1s (14.1x, -----) dr: 2.4s (11.0x, -----) ma: 1.0s ( 4.7x, -----) fbench valgrind-old:0.22s no: 1.0s ( 4.5x, 2.0%) me: 3.5s (15.9x, 2.5%) ca: 5.4s (24.7x, 1.8%) he: 2.6s (12.0x, 0.0%) ca: 3.1s (14.2x, -0.3%) dr: 2.4s (11.0x, 0.0%) ma: 1.0s ( 4.7x, 0.0%) -- ffbench -- ffbench valgrind-new:0.22s no: 0.9s ( 4.3x, -----) me: 2.7s (12.1x, -----) ca: 1.8s ( 8.3x, -----) he: 5.8s (26.2x, -----) ca: 4.1s (18.7x, -----) dr: 3.1s (14.2x, -----) ma: 0.9s ( 3.9x, -----) ffbench valgrind-old:0.22s no: 0.9s ( 4.1x, 4.3%) me: 2.7s (12.3x, -1.5%) ca: 1.8s ( 8.4x, -0.5%) he: 5.5s (25.0x, 4.9%) ca: 4.1s (18.8x, -0.5%) dr: 3.1s (14.3x, -0.3%) ma: 0.8s ( 3.9x, 1.2%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 7.6x, -----) me: 5.0s (62.0x, -----) ca: 6.3s (79.1x, -----) he: 6.8s (85.1x, -----) ca: 3.2s (40.4x, -----) dr: 4.3s (53.4x, -----) ma: 5.0s (62.5x, -----) heap valgrind-old:0.08s no: 0.6s ( 7.4x, 3.3%) me: 5.0s (61.9x, 0.2%) ca: 6.3s (78.5x, 0.8%) he: 6.7s (83.9x, 1.5%) ca: 3.2s (39.9x, 1.2%) dr: 4.2s (53.1x, 0.5%) ma: 4.7s (58.9x, 5.8%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.10s no: 0.7s ( 6.6x, -----) me: 8.4s (83.6x, -----) ca: 6.8s (68.3x, -----) he: 7.5s (75.0x, -----) ca: 3.5s (34.9x, -----) dr: 4.7s (47.3x, -----) ma: 4.9s (48.6x, -----) heap_pdb4 valgrind-old:0.10s no: 0.7s ( 6.5x, 1.5%) me: 8.3s (83.5x, 0.1%) ca: 6.8s (68.2x, 0.1%) he: 7.5s (75.4x, -0.5%) ca: 3.5s (35.1x, -0.6%) dr: 4.8s (48.5x, -2.5%) ma: 5.0s (50.4x, -3.7%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.2s (25.0x, -----) me: 1.3s (128.0x, -----) ca: 1.1s (107.0x, -----) he: 1.1s (108.0x, -----) ca: 0.7s (69.0x, -----) dr: 1.0s (98.0x, -----) ma: 1.0s (100.0x, -----) many-loss-records valgrind-old:0.01s no: 0.2s (25.0x, 0.0%) me: 1.3s (129.0x, -0.8%) ca: 1.1s (107.0x, 0.0%) he: 1.1s (109.0x, -0.9%) ca: 0.7s (70.0x, -1.4%) dr: 1.0s (98.0x, 0.0%) ma: 1.0s (101.0x, -1.0%) -- many-xpts -- many-xpts valgrind-new:0.04s no: 0.3s ( 7.8x, -----) me: 1.9s (46.5x, -----) ca: 2.8s (68.8x, -----) he: 2.2s (54.2x, -----) ca: 1.0s (24.8x, -----) dr: 1.4s (35.8x, -----) ma: 1.5s (37.0x, -----) many-xpts valgrind-old:0.04s no: 0.3s ( 7.8x, 0.0%) me: 1.9s (46.2x, 0.5%) ca: 2.8s (68.8x, 0.0%) he: 2.2s (54.2x, 0.0%) ca: 1.0s (24.5x, 1.0%) dr: 1.4s (35.5x, 0.7%) ma: 1.5s (36.5x, 1.4%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (14.0x, -----) me: 2.4s (120.0x, -----) ca: 1.8s (89.5x, -----) he: 6.4s (319.0x, -----) ca: 1.0s (48.5x, -----) dr: 0.9s (44.5x, -----) ma: 0.3s (15.0x, -----) sarp valgrind-old:0.02s no: 0.3s (14.0x, 0.0%) me: 2.4s (118.0x, 1.7%) ca: 1.8s (89.0x, 0.6%) he: 6.4s (321.5x, -0.8%) ca: 1.0s (48.5x, 0.0%) dr: 0.9s (44.0x, 1.1%) ma: 0.3s (14.5x, 3.3%) -- tinycc -- tinycc valgrind-new:0.16s no: 1.4s ( 8.9x, -----) me: 9.2s (57.6x, -----) ca:11.3s (70.6x, -----) he: 9.8s (61.2x, -----) ca: 8.3s (52.0x, -----) dr: 8.1s (50.6x, -----) ma: 2.5s (15.4x, -----) tinycc valgrind-old:0.16s no: 1.4s ( 9.0x, -0.7%) me: 9.2s (57.3x, 0.4%) ca:11.2s (70.2x, 0.5%) he: 9.8s (61.4x, -0.3%) ca: 8.3s (51.6x, 0.7%) dr: 8.1s (50.7x, -0.4%) ma: 2.5s (15.6x, -0.8%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 34m54.569s user 33m43.849s sys 0m23.581s |
|
From: Tom H. <to...@co...> - 2014-08-17 03:14:00
|
valgrind revision: 14297 VEX revision: 2925 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) GDB: GNU gdb (GDB) Fedora (7.3.50.20110722-16.fc16) Assembler: GNU assembler version 2.21.53.0.1-6.fc16 20110716 C library: GNU C Library development release version 2.14.90 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 16 (Verne) Nightly build on bristol ( x86_64, Fedora 16 ) Started at 2014-08-17 03:01:44 BST Ended at 2014-08-17 04:13:46 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 694 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 1 stdoutB failure, 0 post failures == gdbserver_tests/hgtls (stdoutB) memcheck/tests/vbit-test/vbit-test (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 1.6s (14.7x, -----) me: 3.2s (29.3x, -----) ca:14.3s (130.5x, -----) he: 1.9s (17.3x, -----) ca: 3.9s (35.1x, -----) dr: 1.9s (17.1x, -----) ma: 1.9s (17.5x, -----) bigcode1 valgrind-old:0.11s no: 1.6s (14.8x, -0.6%) me: 3.2s (29.2x, 0.3%) ca:14.5s (131.7x, -1.0%) he: 1.9s (17.5x, -1.1%) ca: 3.9s (35.0x, 0.3%) dr: 1.9s (17.1x, 0.0%) ma: 1.9s (17.6x, -0.5%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 3.9s (35.2x, -----) me: 8.4s (76.0x, -----) ca:26.6s (241.5x, -----) he: 4.9s (44.2x, -----) ca: 7.2s (65.5x, -----) dr: 4.5s (40.9x, -----) ma: 4.5s (40.8x, -----) bigcode2 valgrind-old:0.11s no: 3.9s (35.3x, -0.3%) me: 8.3s (75.7x, 0.4%) ca:26.3s (239.2x, 1.0%) he: 4.8s (43.6x, 1.2%) ca: 7.2s (65.9x, -0.7%) dr: 4.5s (41.1x, -0.4%) ma: 4.5s (41.0x, -0.4%) -- bz2 -- bz2 valgrind-new:0.52s no: 2.1s ( 4.1x, -----) me: 6.1s (11.8x, -----) ca:13.8s (26.6x, -----) he: 9.0s (17.4x, -----) ca:11.7s (22.4x, -----) dr:11.1s (21.3x, -----) ma: 2.1s ( 4.0x, -----) bz2 valgrind-old:0.52s no: 2.1s ( 4.1x, 0.5%) me: 6.1s (11.8x, -0.2%) ca:13.8s (26.5x, 0.6%) he: 9.0s (17.4x, 0.1%) ca:11.7s (22.4x, 0.0%) dr:11.1s (21.3x, 0.1%) ma: 2.1s ( 4.0x, 0.0%) -- fbench -- fbench valgrind-new:0.22s no: 1.0s ( 4.6x, -----) me: 3.6s (16.4x, -----) ca: 5.5s (25.1x, -----) he: 2.7s (12.1x, -----) ca: 3.3s (15.0x, -----) dr: 2.5s (11.3x, -----) ma: 1.1s ( 4.8x, -----) fbench valgrind-old:0.22s no: 1.0s ( 4.6x, 1.0%) me: 3.6s (16.4x, 0.3%) ca: 5.5s (25.2x, -0.4%) he: 2.7s (12.1x, 0.4%) ca: 3.2s (14.6x, 2.7%) dr: 2.5s (11.3x, 0.0%) ma: 1.1s ( 4.8x, 0.0%) -- ffbench -- ffbench valgrind-new:0.22s no: 0.9s ( 4.3x, -----) me: 2.7s (12.5x, -----) ca: 1.9s ( 8.5x, -----) he: 6.1s (27.6x, -----) ca: 4.1s (18.8x, -----) dr: 3.2s (14.6x, -----) ma: 0.9s ( 4.0x, -----) ffbench valgrind-old:0.22s no: 0.9s ( 4.2x, 2.1%) me: 2.8s (12.5x, -0.4%) ca: 1.9s ( 8.6x, -0.5%) he: 5.7s (26.0x, 5.8%) ca: 4.2s (19.0x, -1.0%) dr: 3.2s (14.6x, 0.0%) ma: 0.9s ( 4.0x, 0.0%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 8.0x, -----) me: 4.9s (61.1x, -----) ca: 6.6s (82.6x, -----) he: 6.8s (85.1x, -----) ca: 3.3s (41.4x, -----) dr: 4.2s (53.0x, -----) ma: 4.8s (59.4x, -----) heap valgrind-old:0.08s no: 0.6s ( 8.0x, 0.0%) me: 4.9s (61.1x, 0.0%) ca: 6.6s (82.8x, -0.2%) he: 6.8s (85.1x, 0.0%) ca: 3.4s (41.9x, -1.2%) dr: 4.2s (52.9x, 0.2%) ma: 4.8s (59.4x, 0.0%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.11s no: 0.7s ( 6.3x, -----) me: 8.4s (76.4x, -----) ca: 7.2s (65.5x, -----) he: 7.5s (68.2x, -----) ca: 3.6s (33.2x, -----) dr: 4.9s (44.2x, -----) ma: 4.9s (44.3x, -----) heap_pdb4 valgrind-old:0.11s no: 0.7s ( 6.4x, -1.4%) me: 8.4s (76.1x, 0.4%) ca: 7.1s (64.5x, 1.4%) he: 7.5s (68.4x, -0.3%) ca: 3.6s (33.2x, 0.0%) dr: 4.8s (43.5x, 1.4%) ma: 4.9s (44.3x, 0.0%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.3s (26.0x, -----) me: 1.3s (129.0x, -----) ca: 1.1s (105.0x, -----) he: 1.0s (103.0x, -----) ca: 0.7s (67.0x, -----) dr: 0.9s (94.0x, -----) ma: 1.0s (99.0x, -----) many-loss-records valgrind-old:0.01s no: 0.2s (25.0x, 3.8%) me: 1.3s (127.0x, 1.6%) ca: 1.1s (105.0x, 0.0%) he: 1.0s (104.0x, -1.0%) ca: 0.7s (68.0x, -1.5%) dr: 0.9s (90.0x, 4.3%) ma: 1.0s (96.0x, 3.0%) -- many-xpts -- many-xpts valgrind-new:0.03s no: 0.3s (10.3x, -----) me: 1.8s (59.0x, -----) ca: 2.8s (91.7x, -----) he: 2.0s (67.3x, -----) ca: 1.0s (32.0x, -----) dr: 1.3s (43.7x, -----) ma: 1.4s (47.0x, -----) many-xpts valgrind-old:0.03s no: 0.3s (10.0x, 3.2%) me: 1.8s (59.0x, 0.0%) ca: 2.8s (92.7x, -1.1%) he: 2.0s (67.7x, -0.5%) ca: 1.0s (32.3x, -1.0%) dr: 1.3s (44.3x, -1.5%) ma: 1.4s (46.3x, 1.4%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (13.5x, -----) me: 2.5s (122.5x, -----) ca: 1.7s (84.5x, -----) he: 6.5s (326.5x, -----) ca: 0.9s (45.0x, -----) dr: 0.8s (41.0x, -----) ma: 0.3s (14.5x, -----) sarp valgrind-old:0.02s no: 0.3s (14.0x, -3.7%) me: 2.4s (122.0x, 0.4%) ca: 1.7s (85.5x, -1.2%) he: 6.5s (327.5x, -0.3%) ca: 0.9s (45.5x, -1.1%) dr: 0.8s (41.5x, -1.2%) ma: 0.3s (14.5x, 0.0%) -- tinycc -- tinycc valgrind-new:0.16s no: 1.4s ( 8.7x, -----) me: 9.7s (60.9x, -----) ca:10.7s (67.1x, -----) he: 9.3s (57.9x, -----) ca: 7.9s (49.4x, -----) dr: 7.8s (48.8x, -----) ma: 2.4s (14.9x, -----) tinycc valgrind-old:0.16s no: 1.4s ( 8.6x, 1.4%) me: 8.6s (53.9x, 11.5%) ca:10.8s (67.4x, -0.4%) he: 9.2s (57.8x, 0.2%) ca: 7.9s (49.1x, 0.5%) dr: 7.6s (47.6x, 2.4%) ma: 2.4s (15.1x, -0.8%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 34m53.428s user 33m47.958s sys 0m22.822s |
|
From: Tom H. <to...@co...> - 2014-08-17 03:03:42
|
valgrind revision: 14297 VEX revision: 2925 C compiler: gcc (GCC) 4.7.2 20120921 (Red Hat 4.7.2-2) GDB: GNU gdb (GDB) Fedora (7.4.50.20120120-54.fc17) Assembler: GNU assembler version 2.22.52.0.1-10.fc17 20120131 C library: GNU C Library stable release version 2.15 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 17 (Beefy Miracle) Nightly build on bristol ( x86_64, Fedora 17 (Beefy Miracle) ) Started at 2014-08-17 02:51:05 BST Ended at 2014-08-17 04:03:28 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 694 tests, 5 stderr failures, 1 stdout failure, 0 stderrB failures, 1 stdoutB failure, 0 post failures == gdbserver_tests/hgtls (stdoutB) gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcmain_pic (stderr) memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 694 tests, 6 stderr failures, 2 stdout failures, 0 stderrB failures, 1 stdoutB failure, 0 post failures == gdbserver_tests/hgtls (stdoutB) gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcmain_pic (stderr) memcheck/tests/vbit-test/vbit-test (stderr) none/tests/fdleak_ipv4 (stdout) none/tests/fdleak_ipv4 (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short 2014-08-17 03:09:43.381176989 +0100 --- new.short 2014-08-17 03:28:52.275184344 +0100 *************** *** 8,10 **** ! == 694 tests, 6 stderr failures, 2 stdout failures, 0 stderrB failures, 1 stdoutB failure, 0 post failures == gdbserver_tests/hgtls (stdoutB) --- 8,10 ---- ! == 694 tests, 5 stderr failures, 1 stdout failure, 0 stderrB failures, 1 stdoutB failure, 0 post failures == gdbserver_tests/hgtls (stdoutB) *************** *** 14,17 **** memcheck/tests/vbit-test/vbit-test (stderr) - none/tests/fdleak_ipv4 (stdout) - none/tests/fdleak_ipv4 (stderr) exp-sgcheck/tests/preen_invars (stdout) --- 14,15 ---- --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 1.6s (14.7x, -----) me: 3.3s (29.7x, -----) ca:13.3s (120.5x, -----) he: 1.9s (17.4x, -----) ca: 3.7s (33.7x, -----) dr: 1.9s (16.9x, -----) ma: 2.0s (17.8x, -----) bigcode1 valgrind-old:0.11s no: 1.6s (14.8x, -0.6%) me: 3.2s (29.5x, 0.6%) ca:13.2s (120.3x, 0.2%) he: 1.9s (17.3x, 0.5%) ca: 3.7s (33.7x, 0.0%) dr: 1.8s (16.7x, 1.1%) ma: 1.9s (17.7x, 0.5%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 3.9s (35.2x, -----) me: 8.3s (75.3x, -----) ca:26.3s (238.9x, -----) he: 4.8s (44.1x, -----) ca: 7.1s (64.7x, -----) dr: 4.5s (41.1x, -----) ma: 4.5s (41.2x, -----) bigcode2 valgrind-old:0.11s no: 3.9s (35.6x, -1.3%) me: 8.4s (76.0x, -1.0%) ca:26.3s (239.1x, -0.1%) he: 4.8s (43.4x, 1.6%) ca: 7.0s (63.6x, 1.7%) dr: 4.5s (40.7x, 0.9%) ma: 4.5s (40.6x, 1.3%) -- bz2 -- bz2 valgrind-new:0.52s no: 2.1s ( 4.0x, -----) me: 6.3s (12.1x, -----) ca:12.7s (24.4x, -----) he: 8.8s (16.9x, -----) ca:10.8s (20.8x, -----) dr:11.5s (22.1x, -----) ma: 2.1s ( 4.1x, -----) bz2 valgrind-old:0.52s no: 2.1s ( 4.1x, -1.0%) me: 6.2s (12.0x, 1.0%) ca:12.7s (24.4x, 0.2%) he: 8.8s (16.9x, 0.0%) ca:10.8s (20.8x, 0.2%) dr:11.5s (22.1x, 0.0%) ma: 2.1s ( 4.1x, -1.4%) -- fbench -- fbench valgrind-new:0.22s no: 1.0s ( 4.6x, -----) me: 3.5s (15.7x, -----) ca: 5.5s (24.9x, -----) he: 2.5s (11.4x, -----) ca: 3.0s (13.7x, -----) dr: 2.4s (10.9x, -----) ma: 1.1s ( 4.9x, -----) fbench valgrind-old:0.22s no: 1.0s ( 4.6x, 1.0%) me: 3.4s (15.6x, 0.6%) ca: 5.5s (24.9x, 0.2%) he: 2.5s (11.4x, 0.0%) ca: 3.0s (13.6x, 0.7%) dr: 2.4s (11.0x, -1.3%) ma: 1.1s ( 4.8x, 0.9%) -- ffbench -- ffbench valgrind-new:0.22s no: 0.9s ( 4.3x, -----) me: 2.8s (12.8x, -----) ca: 1.8s ( 8.4x, -----) he: 7.2s (32.9x, -----) ca: 4.0s (18.2x, -----) dr: 3.3s (14.9x, -----) ma: 0.9s ( 4.0x, -----) ffbench valgrind-old:0.22s no: 0.9s ( 4.3x, 0.0%) me: 2.8s (12.6x, 1.4%) ca: 1.8s ( 8.2x, 1.6%) he: 6.2s (28.0x, 14.8%) ca: 4.0s (18.0x, 1.0%) dr: 3.2s (14.6x, 1.8%) ma: 0.9s ( 4.0x, -1.1%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 7.9x, -----) me: 5.0s (63.1x, -----) ca: 6.0s (74.9x, -----) he: 6.8s (85.2x, -----) ca: 3.2s (39.8x, -----) dr: 4.2s (52.6x, -----) ma: 5.0s (62.4x, -----) heap valgrind-old:0.08s no: 0.6s ( 7.9x, 0.0%) me: 5.0s (62.5x, 1.0%) ca: 6.0s (75.1x, -0.3%) he: 6.8s (85.0x, 0.3%) ca: 3.2s (39.8x, 0.0%) dr: 4.2s (52.4x, 0.5%) ma: 5.0s (62.0x, 0.6%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.11s no: 0.7s ( 6.2x, -----) me: 8.6s (77.7x, -----) ca: 6.5s (58.6x, -----) he: 7.6s (68.7x, -----) ca: 3.5s (32.0x, -----) dr: 4.9s (44.7x, -----) ma: 5.0s (45.5x, -----) heap_pdb4 valgrind-old:0.11s no: 0.7s ( 6.2x, 0.0%) me: 8.5s (77.5x, 0.4%) ca: 6.5s (58.6x, 0.0%) he: 7.5s (68.2x, 0.8%) ca: 3.5s (31.7x, 0.9%) dr: 4.9s (44.7x, 0.0%) ma: 5.0s (45.3x, 0.4%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.2s (24.0x, -----) me: 1.3s (126.0x, -----) ca: 1.0s (101.0x, -----) he: 1.1s (110.0x, -----) ca: 0.7s (65.0x, -----) dr: 1.0s (98.0x, -----) ma: 1.0s (104.0x, -----) many-loss-records valgrind-old:0.01s no: 0.2s (25.0x, -4.2%) me: 1.3s (127.0x, -0.8%) ca: 1.0s (100.0x, 1.0%) he: 1.1s (109.0x, 0.9%) ca: 0.6s (64.0x, 1.5%) dr: 1.0s (98.0x, 0.0%) ma: 1.0s (104.0x, 0.0%) -- many-xpts -- many-xpts valgrind-new:0.03s no: 0.3s (10.7x, -----) me: 1.7s (57.3x, -----) ca: 2.6s (86.3x, -----) he: 2.2s (73.0x, -----) ca: 0.9s (30.3x, -----) dr: 1.4s (47.7x, -----) ma: 1.5s (51.0x, -----) many-xpts valgrind-old:0.03s no: 0.3s (10.7x, 0.0%) me: 1.8s (58.7x, -2.3%) ca: 2.6s (86.7x, -0.4%) he: 2.2s (73.3x, -0.5%) ca: 0.9s (30.3x, 0.0%) dr: 1.4s (47.3x, 0.7%) ma: 1.5s (50.7x, 0.7%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (13.5x, -----) me: 2.3s (113.5x, -----) ca: 1.7s (84.5x, -----) he: 7.3s (363.0x, -----) ca: 0.9s (43.5x, -----) dr: 0.9s (45.0x, -----) ma: 0.3s (15.0x, -----) sarp valgrind-old:0.02s no: 0.3s (13.5x, 0.0%) me: 2.3s (113.0x, 0.4%) ca: 1.7s (84.5x, 0.0%) he: 7.2s (362.5x, 0.1%) ca: 0.9s (43.5x, 0.0%) dr: 0.9s (45.5x, -1.1%) ma: 0.3s (15.0x, 0.0%) -- tinycc -- tinycc valgrind-new:0.16s no: 1.3s ( 8.4x, -----) me: 8.3s (52.2x, -----) ca:10.6s (66.4x, -----) he: 9.8s (61.2x, -----) ca: 7.5s (46.6x, -----) dr: 7.5s (47.1x, -----) ma: 2.4s (14.9x, -----) tinycc valgrind-old:0.16s no: 1.4s ( 8.4x, -0.7%) me: 8.3s (52.1x, 0.2%) ca:10.6s (66.1x, 0.6%) he: 9.8s (61.5x, -0.4%) ca: 7.5s (46.6x, 0.0%) dr: 7.6s (47.2x, -0.3%) ma: 2.4s (14.9x, 0.0%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 34m35.706s user 33m25.909s sys 0m23.285s |
|
From: Tom H. <to...@co...> - 2014-08-17 02:53:20
|
valgrind revision: 14297 VEX revision: 2925 C compiler: gcc (GCC) 4.7.2 20121109 (Red Hat 4.7.2-8) GDB: GNU gdb (GDB) Fedora 7.5.1-42.fc18 Assembler: GNU assembler version 2.23.51.0.1-10.fc18 20120806 C library: GNU C Library stable release version 2.16 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 18 (Spherical Cow) Nightly build on bristol ( x86_64, Fedora 18 (Spherical Cow) ) Started at 2014-08-17 02:41:12 BST Ended at 2014-08-17 03:53:07 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 694 tests, 2 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 1.6s (14.9x, -----) me: 3.2s (29.0x, -----) ca:13.3s (120.5x, -----) he: 1.9s (17.4x, -----) ca: 3.8s (34.1x, -----) dr: 1.9s (17.1x, -----) ma: 2.0s (17.9x, -----) bigcode1 valgrind-old:0.11s no: 1.6s (14.7x, 1.2%) me: 3.2s (29.5x, -1.9%) ca:13.0s (118.3x, 1.9%) he: 1.9s (17.4x, 0.0%) ca: 3.8s (34.3x, -0.5%) dr: 1.9s (17.1x, 0.0%) ma: 1.9s (17.7x, 1.0%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 3.9s (35.8x, -----) me: 8.1s (74.0x, -----) ca:26.4s (240.3x, -----) he: 4.8s (43.9x, -----) ca: 7.1s (64.8x, -----) dr: 4.7s (42.5x, -----) ma: 4.6s (41.7x, -----) bigcode2 valgrind-old:0.11s no: 3.9s (35.6x, 0.5%) me: 8.2s (74.8x, -1.1%) ca:27.0s (245.6x, -2.2%) he: 4.8s (43.6x, 0.6%) ca: 7.1s (64.6x, 0.3%) dr: 4.6s (41.5x, 2.1%) ma: 4.5s (41.3x, 1.1%) -- bz2 -- bz2 valgrind-new:0.52s no: 2.1s ( 4.0x, -----) me: 6.4s (12.4x, -----) ca:12.9s (24.8x, -----) he: 9.0s (17.2x, -----) ca:10.7s (20.7x, -----) dr:11.6s (22.2x, -----) ma: 2.1s ( 4.1x, -----) bz2 valgrind-old:0.52s no: 2.1s ( 4.0x, -0.5%) me: 6.5s (12.5x, -0.9%) ca:12.7s (24.4x, 1.4%) he: 8.9s (17.2x, 0.2%) ca:10.9s (20.9x, -1.1%) dr:11.8s (22.8x, -2.4%) ma: 2.1s ( 4.1x, 0.5%) -- fbench -- fbench valgrind-new:0.22s no: 1.0s ( 4.6x, -----) me: 3.5s (15.7x, -----) ca: 5.5s (25.1x, -----) he: 2.5s (11.6x, -----) ca: 3.0s (13.8x, -----) dr: 2.5s (11.1x, -----) ma: 1.1s ( 5.0x, -----) fbench valgrind-old:0.22s no: 1.0s ( 4.6x, -1.0%) me: 3.4s (15.6x, 0.3%) ca: 5.5s (25.1x, 0.0%) he: 2.5s (11.5x, 1.2%) ca: 3.0s (13.8x, 0.0%) dr: 2.5s (11.2x, -0.8%) ma: 1.1s ( 4.9x, 1.8%) -- ffbench -- ffbench valgrind-new:0.26s no: 0.9s ( 3.7x, -----) me: 2.8s (10.8x, -----) ca: 1.9s ( 7.2x, -----) he: 7.5s (28.8x, -----) ca: 4.2s (16.0x, -----) dr: 3.4s (13.0x, -----) ma: 0.9s ( 3.5x, -----) ffbench valgrind-old:0.26s no: 0.9s ( 3.7x, 0.0%) me: 2.9s (11.0x, -1.4%) ca: 1.9s ( 7.2x, 1.1%) he: 7.5s (28.8x, -0.1%) ca: 4.0s (15.4x, 3.8%) dr: 3.3s (12.8x, 1.2%) ma: 0.9s ( 3.4x, 1.1%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 8.0x, -----) me: 5.2s (65.4x, -----) ca: 6.1s (76.8x, -----) he: 6.9s (86.1x, -----) ca: 3.2s (39.5x, -----) dr: 4.4s (54.6x, -----) ma: 4.9s (61.1x, -----) heap valgrind-old:0.08s no: 0.6s ( 8.0x, 0.0%) me: 5.2s (65.0x, 0.6%) ca: 6.1s (76.6x, 0.2%) he: 6.9s (86.5x, -0.4%) ca: 3.2s (39.5x, 0.0%) dr: 4.3s (53.6x, 1.8%) ma: 4.9s (61.0x, 0.2%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.10s no: 0.7s ( 6.9x, -----) me: 8.8s (88.0x, -----) ca: 6.8s (67.9x, -----) he: 7.6s (75.8x, -----) ca: 3.6s (35.6x, -----) dr: 5.0s (50.5x, -----) ma: 5.0s (50.5x, -----) heap_pdb4 valgrind-old:0.10s no: 0.7s ( 7.0x, -1.4%) me: 8.8s (88.4x, -0.5%) ca: 6.7s (67.2x, 1.0%) he: 7.6s (76.2x, -0.5%) ca: 3.6s (35.8x, -0.6%) dr: 5.0s (50.4x, 0.2%) ma: 5.0s (50.2x, 0.6%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.2s (25.0x, -----) me: 1.3s (130.0x, -----) ca: 1.0s (100.0x, -----) he: 1.1s (109.0x, -----) ca: 0.7s (65.0x, -----) dr: 1.0s (101.0x, -----) ma: 1.0s (103.0x, -----) many-loss-records valgrind-old:0.01s no: 0.3s (26.0x, -4.0%) me: 1.3s (128.0x, 1.5%) ca: 1.0s (101.0x, -1.0%) he: 1.1s (111.0x, -1.8%) ca: 0.7s (65.0x, 0.0%) dr: 1.0s (102.0x, -1.0%) ma: 1.0s (103.0x, 0.0%) -- many-xpts -- many-xpts valgrind-new:0.03s no: 0.3s (10.3x, -----) me: 1.7s (57.0x, -----) ca: 2.6s (87.7x, -----) he: 2.2s (72.7x, -----) ca: 0.9s (30.3x, -----) dr: 1.5s (49.0x, -----) ma: 1.5s (51.3x, -----) many-xpts valgrind-old:0.03s no: 0.3s (10.3x, 0.0%) me: 1.7s (58.0x, -1.8%) ca: 2.6s (88.3x, -0.8%) he: 2.2s (72.3x, 0.5%) ca: 0.9s (30.3x, 0.0%) dr: 1.5s (48.7x, 0.7%) ma: 1.5s (51.3x, 0.0%) -- sarp -- sarp valgrind-new:0.01s no: 0.3s (28.0x, -----) me: 2.0s (204.0x, -----) ca: 1.7s (169.0x, -----) he: 7.2s (717.0x, -----) ca: 0.9s (89.0x, -----) dr: 0.9s (91.0x, -----) ma: 0.3s (30.0x, -----) sarp valgrind-old:0.01s no: 0.3s (28.0x, 0.0%) me: 2.0s (204.0x, 0.0%) ca: 1.7s (171.0x, -1.2%) he: 7.2s (724.0x, -1.0%) ca: 0.9s (88.0x, 1.1%) dr: 0.9s (92.0x, -1.1%) ma: 0.3s (29.0x, 3.3%) -- tinycc -- tinycc valgrind-new:0.16s no: 1.4s ( 8.5x, -----) me: 8.4s (52.7x, -----) ca:10.6s (66.1x, -----) he: 9.5s (59.5x, -----) ca: 7.5s (47.1x, -----) dr: 7.7s (47.9x, -----) ma: 2.4s (14.9x, -----) tinycc valgrind-old:0.16s no: 1.4s ( 8.5x, -0.0%) me: 8.4s (52.8x, -0.1%) ca:10.6s (66.5x, -0.6%) he: 9.5s (59.2x, 0.4%) ca: 7.5s (46.8x, 0.7%) dr: 7.6s (47.6x, 0.8%) ma: 2.4s (15.0x, -0.4%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 34m47.131s user 33m35.342s sys 0m23.504s |
|
From: Tom H. <to...@co...> - 2014-08-17 02:44:54
|
valgrind revision: 14297 VEX revision: 2925 C compiler: gcc (GCC) 4.8.3 20140624 (Red Hat 4.8.3-1) GDB: GNU gdb (GDB) Fedora 7.6.1-46.fc19 Assembler: GNU assembler version 2.23.52.0.1-9.fc19 20130226 C library: GNU C Library (GNU libc) stable release version 2.17 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 19 (Schrödingerâs Cat) Nightly build on bristol ( x86_64, Fedora 19 (Schrödingerâs Cat) ) Started at 2014-08-17 02:31:32 BST Ended at 2014-08-17 03:44:32 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 694 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/vbit-test/vbit-test (stderr) none/tests/fdleak_ipv4 (stderr) exp-sgcheck/tests/hackedbz2 (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 694 tests, 2 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/hackedbz2 (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short 2014-08-17 02:50:50.214868568 +0100 --- new.short 2014-08-17 03:09:43.723170443 +0100 *************** *** 8,11 **** ! == 694 tests, 2 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/hackedbz2 (stderr) --- 8,12 ---- ! == 694 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/vbit-test/vbit-test (stderr) + none/tests/fdleak_ipv4 (stderr) exp-sgcheck/tests/hackedbz2 (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 1.6s (14.4x, -----) me: 3.2s (28.9x, -----) ca:13.2s (120.2x, -----) he: 1.9s (17.1x, -----) ca: 3.7s (33.9x, -----) dr: 1.8s (16.7x, -----) ma: 1.9s (17.5x, -----) bigcode1 valgrind-old:0.11s no: 1.7s (15.1x, -5.1%) me: 3.2s (29.4x, -1.6%) ca:13.3s (120.8x, -0.5%) he: 1.9s (17.2x, -0.5%) ca: 3.8s (34.1x, -0.5%) dr: 1.8s (16.7x, -0.0%) ma: 1.9s (17.4x, 0.5%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 3.9s (35.0x, -----) me: 8.2s (74.9x, -----) ca:26.8s (243.3x, -----) he: 4.7s (42.6x, -----) ca: 7.0s (63.9x, -----) dr: 4.4s (40.1x, -----) ma: 4.4s (40.1x, -----) bigcode2 valgrind-old:0.11s no: 3.9s (35.5x, -1.6%) me: 8.1s (74.0x, 1.2%) ca:26.0s (236.1x, 3.0%) he: 4.7s (42.5x, 0.4%) ca: 7.0s (64.0x, -0.1%) dr: 4.4s (40.1x, 0.0%) ma: 4.4s (40.3x, -0.5%) -- bz2 -- bz2 valgrind-new:0.49s no: 2.1s ( 4.2x, -----) me: 6.5s (13.4x, -----) ca:13.2s (26.9x, -----) he: 9.8s (20.1x, -----) ca:11.0s (22.4x, -----) dr:12.5s (25.5x, -----) ma: 2.1s ( 4.3x, -----) bz2 valgrind-old:0.49s no: 2.1s ( 4.2x, 1.0%) me: 6.5s (13.4x, 0.0%) ca:13.2s (27.0x, -0.5%) he: 9.7s (19.8x, 1.3%) ca:11.1s (22.6x, -0.9%) dr:12.6s (25.7x, -0.6%) ma: 2.1s ( 4.3x, 0.9%) -- fbench -- fbench valgrind-new:0.22s no: 1.0s ( 4.6x, -----) me: 3.3s (15.0x, -----) ca: 5.6s (25.4x, -----) he: 2.5s (11.4x, -----) ca: 3.1s (14.0x, -----) dr: 2.4s (10.7x, -----) ma: 1.1s ( 4.9x, -----) fbench valgrind-old:0.22s no: 1.0s ( 4.6x, 0.0%) me: 3.3s (15.0x, 0.6%) ca: 5.6s (25.4x, 0.0%) he: 2.5s (11.5x, -0.4%) ca: 3.1s (14.0x, -0.3%) dr: 2.4s (11.0x, -2.5%) ma: 1.1s ( 4.9x, -0.9%) -- ffbench -- ffbench valgrind-new:0.24s no: 1.0s ( 4.0x, -----) me: 2.8s (11.7x, -----) ca: 1.9s ( 8.0x, -----) he: 6.4s (26.5x, -----) ca: 4.7s (19.4x, -----) dr: 3.3s (13.6x, -----) ma: 0.9s ( 3.8x, -----) ffbench valgrind-old:0.24s no: 0.9s ( 4.0x, 1.0%) me: 2.8s (11.8x, -1.1%) ca: 1.9s ( 7.8x, 2.6%) he: 6.7s (27.9x, -5.0%) ca: 4.8s (19.9x, -2.8%) dr: 3.3s (13.8x, -1.5%) ma: 0.9s ( 3.8x, -1.1%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 8.0x, -----) me: 5.1s (63.2x, -----) ca: 6.0s (75.5x, -----) he: 6.7s (84.2x, -----) ca: 3.2s (40.6x, -----) dr: 4.3s (53.2x, -----) ma: 4.8s (59.9x, -----) heap valgrind-old:0.08s no: 0.7s ( 8.2x, -3.1%) me: 5.0s (63.0x, 0.4%) ca: 6.1s (75.8x, -0.3%) he: 6.7s (84.1x, 0.1%) ca: 3.3s (40.8x, -0.3%) dr: 4.2s (53.1x, 0.2%) ma: 4.8s (59.6x, 0.4%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.10s no: 0.7s ( 7.1x, -----) me: 9.7s (96.5x, -----) ca: 6.7s (66.6x, -----) he: 7.8s (77.8x, -----) ca: 3.5s (35.3x, -----) dr: 4.9s (48.8x, -----) ma: 5.2s (51.5x, -----) heap_pdb4 valgrind-old:0.10s no: 0.7s ( 7.0x, 1.4%) me: 9.6s (95.8x, 0.7%) ca: 6.6s (66.0x, 0.9%) he: 7.8s (78.0x, -0.3%) ca: 3.6s (36.0x, -2.0%) dr: 4.9s (49.2x, -0.8%) ma: 5.1s (51.4x, 0.2%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.3s (26.0x, -----) me: 1.3s (132.0x, -----) ca: 1.0s (100.0x, -----) he: 1.1s (110.0x, -----) ca: 0.7s (66.0x, -----) dr: 1.0s (98.0x, -----) ma: 1.1s (106.0x, -----) many-loss-records valgrind-old:0.01s no: 0.3s (26.0x, 0.0%) me: 1.3s (133.0x, -0.8%) ca: 1.0s (101.0x, -1.0%) he: 1.1s (111.0x, -0.9%) ca: 0.7s (66.0x, 0.0%) dr: 1.0s (99.0x, -1.0%) ma: 1.1s (108.0x, -1.9%) -- many-xpts -- many-xpts valgrind-new:0.03s no: 0.3s (10.7x, -----) me: 1.4s (48.3x, -----) ca: 2.5s (84.7x, -----) he: 2.1s (69.0x, -----) ca: 0.9s (31.7x, -----) dr: 1.4s (46.3x, -----) ma: 1.6s (52.0x, -----) many-xpts valgrind-old:0.03s no: 0.3s (10.3x, 3.1%) me: 1.5s (48.7x, -0.7%) ca: 2.5s (85.0x, -0.4%) he: 2.1s (68.7x, 0.5%) ca: 0.9s (31.3x, 1.1%) dr: 1.4s (46.7x, -0.7%) ma: 1.6s (52.3x, -0.6%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (14.0x, -----) me: 2.1s (107.0x, -----) ca: 1.7s (86.0x, -----) he: 6.0s (298.0x, -----) ca: 0.9s (46.0x, -----) dr: 0.9s (45.5x, -----) ma: 0.3s (15.5x, -----) sarp valgrind-old:0.02s no: 0.3s (14.5x, -3.6%) me: 2.2s (108.5x, -1.4%) ca: 1.7s (86.0x, 0.0%) he: 6.0s (297.5x, 0.2%) ca: 0.9s (45.5x, 1.1%) dr: 0.9s (46.0x, -1.1%) ma: 0.3s (15.5x, 0.0%) -- tinycc -- tinycc valgrind-new:0.15s no: 1.4s ( 9.3x, -----) me: 7.9s (52.5x, -----) ca:10.7s (71.2x, -----) he: 9.6s (64.3x, -----) ca: 7.9s (52.7x, -----) dr: 7.9s (52.5x, -----) ma: 2.4s (15.9x, -----) tinycc valgrind-old:0.15s no: 1.4s ( 9.3x, -0.7%) me: 7.9s (52.8x, -0.6%) ca:10.7s (71.5x, -0.4%) he: 9.6s (64.1x, 0.2%) ca: 8.1s (53.8x, -2.0%) dr: 8.0s (53.1x, -1.1%) ma: 2.4s (16.2x, -1.7%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 34m48.785s user 33m37.633s sys 0m24.185s |
|
From: Tom H. <to...@co...> - 2014-08-17 02:36:18
|
valgrind revision: 14297 VEX revision: 2925 C compiler: gcc (GCC) 4.8.3 20140624 (Red Hat 4.8.3-1) GDB: GNU gdb (GDB) Fedora 7.7.1-17.fc20 Assembler: GNU assembler version 2.23.2 C library: GNU C Library (GNU libc) stable release version 2.18 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 20 (Heisenbug) Nightly build on bristol ( x86_64, Fedora 20 ) Started at 2014-08-17 02:21:47 BST Ended at 2014-08-17 03:36:03 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 694 tests, 2 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/hackedbz2 (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 1.6s (14.7x, -----) me: 3.2s (29.1x, -----) ca:13.2s (119.6x, -----) he: 1.9s (17.1x, -----) ca: 3.7s (33.9x, -----) dr: 1.8s (16.5x, -----) ma: 1.9s (17.4x, -----) bigcode1 valgrind-old:0.11s no: 1.6s (14.6x, 0.6%) me: 3.2s (29.3x, -0.6%) ca:13.3s (120.7x, -0.9%) he: 1.9s (17.1x, 0.0%) ca: 3.7s (34.0x, -0.3%) dr: 1.8s (16.7x, -1.1%) ma: 1.9s (17.5x, -1.0%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 3.8s (34.7x, -----) me: 8.2s (74.5x, -----) ca:25.8s (234.4x, -----) he: 4.7s (42.3x, -----) ca: 7.0s (63.6x, -----) dr: 4.4s (40.0x, -----) ma: 4.4s (40.4x, -----) bigcode2 valgrind-old:0.11s no: 3.8s (34.6x, 0.3%) me: 8.1s (73.9x, 0.7%) ca:25.6s (233.0x, 0.6%) he: 4.6s (42.1x, 0.4%) ca: 7.0s (63.7x, -0.1%) dr: 4.4s (39.9x, 0.2%) ma: 4.5s (40.5x, -0.5%) -- bz2 -- bz2 valgrind-new:0.50s no: 2.1s ( 4.1x, -----) me: 6.1s (12.2x, -----) ca:12.9s (25.8x, -----) he:11.0s (22.0x, -----) ca:10.8s (21.6x, -----) dr:11.8s (23.6x, -----) ma: 2.1s ( 4.2x, -----) bz2 valgrind-old:0.50s no: 2.1s ( 4.2x, -1.9%) me: 6.1s (12.2x, 0.2%) ca:13.0s (26.0x, -0.8%) he:11.3s (22.5x, -2.4%) ca:11.1s (22.1x, -2.5%) dr:11.8s (23.6x, 0.1%) ma: 2.1s ( 4.2x, 0.5%) -- fbench -- fbench valgrind-new:0.22s no: 1.0s ( 4.6x, -----) me: 3.4s (15.4x, -----) ca: 5.5s (25.2x, -----) he: 2.5s (11.5x, -----) ca: 3.0s (13.7x, -----) dr: 2.4s (10.8x, -----) ma: 1.1s ( 4.8x, -----) fbench valgrind-old:0.22s no: 1.0s ( 4.6x, 1.0%) me: 3.4s (15.5x, -0.6%) ca: 5.6s (25.3x, -0.5%) he: 2.5s (11.3x, 1.2%) ca: 3.0s (13.7x, 0.0%) dr: 2.4s (10.9x, -0.8%) ma: 1.1s ( 4.8x, -1.0%) -- ffbench -- ffbench valgrind-new:0.21s no: 0.9s ( 4.5x, -----) me: 2.8s (13.5x, -----) ca: 1.9s ( 9.2x, -----) he: 6.0s (28.8x, -----) ca: 4.5s (21.2x, -----) dr: 3.2s (15.4x, -----) ma: 0.9s ( 4.3x, -----) ffbench valgrind-old:0.21s no: 0.9s ( 4.5x, 0.0%) me: 2.8s (13.4x, 0.7%) ca: 1.9s ( 9.0x, 2.6%) he: 6.1s (29.2x, -1.7%) ca: 4.4s (21.1x, 0.4%) dr: 3.3s (15.7x, -1.9%) ma: 0.9s ( 4.3x, -1.1%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 7.9x, -----) me: 5.1s (63.4x, -----) ca: 6.1s (76.5x, -----) he: 7.0s (86.9x, -----) ca: 3.2s (39.9x, -----) dr: 4.3s (53.9x, -----) ma: 4.9s (61.2x, -----) heap valgrind-old:0.08s no: 0.6s ( 7.9x, 0.0%) me: 5.1s (63.4x, 0.0%) ca: 6.2s (77.0x, -0.7%) he: 7.0s (87.2x, -0.4%) ca: 3.2s (40.0x, -0.3%) dr: 4.3s (54.0x, -0.2%) ma: 4.9s (61.4x, -0.2%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.10s no: 0.7s ( 6.9x, -----) me: 8.7s (86.6x, -----) ca: 6.9s (68.8x, -----) he: 7.8s (77.5x, -----) ca: 3.6s (35.6x, -----) dr: 5.2s (51.8x, -----) ma: 5.1s (51.4x, -----) heap_pdb4 valgrind-old:0.10s no: 0.7s ( 7.0x, -1.4%) me: 8.8s (87.7x, -1.3%) ca: 6.7s (66.7x, 3.1%) he: 7.7s (77.3x, 0.3%) ca: 3.6s (35.7x, -0.3%) dr: 5.2s (51.6x, 0.4%) ma: 5.2s (51.8x, -0.8%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.2s (25.0x, -----) me: 1.3s (126.0x, -----) ca: 1.0s (99.0x, -----) he: 1.1s (110.0x, -----) ca: 0.7s (66.0x, -----) dr: 1.0s (97.0x, -----) ma: 1.1s (105.0x, -----) many-loss-records valgrind-old:0.01s no: 0.3s (26.0x, -4.0%) me: 1.3s (126.0x, 0.0%) ca: 1.0s (99.0x, 0.0%) he: 1.1s (110.0x, 0.0%) ca: 0.7s (66.0x, 0.0%) dr: 1.0s (99.0x, -2.1%) ma: 1.1s (108.0x, -2.9%) -- many-xpts -- many-xpts valgrind-new:0.03s no: 0.3s (10.7x, -----) me: 1.5s (50.0x, -----) ca: 2.6s (85.3x, -----) he: 2.1s (69.0x, -----) ca: 0.9s (30.7x, -----) dr: 1.4s (46.0x, -----) ma: 1.6s (54.3x, -----) many-xpts valgrind-old:0.03s no: 0.3s (10.3x, 3.1%) me: 1.5s (49.7x, 0.7%) ca: 2.5s (85.0x, 0.4%) he: 2.1s (70.0x, -1.4%) ca: 0.9s (31.0x, -1.1%) dr: 1.4s (45.7x, 0.7%) ma: 1.6s (51.7x, 4.9%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (14.0x, -----) me: 2.1s (104.5x, -----) ca: 1.7s (86.0x, -----) he: 5.9s (296.0x, -----) ca: 0.9s (46.5x, -----) dr: 0.9s (47.5x, -----) ma: 0.3s (15.0x, -----) sarp valgrind-old:0.02s no: 0.3s (14.0x, 0.0%) me: 2.1s (104.5x, 0.0%) ca: 1.7s (87.0x, -1.2%) he: 6.0s (299.5x, -1.2%) ca: 0.9s (47.0x, -1.1%) dr: 0.9s (46.5x, 2.1%) ma: 0.3s (15.0x, 0.0%) -- tinycc -- tinycc valgrind-new:0.16s no: 1.4s ( 8.6x, -----) me: 8.0s (50.1x, -----) ca:11.0s (68.6x, -----) he: 9.6s (60.2x, -----) ca: 7.8s (48.6x, -----) dr: 8.1s (50.8x, -----) ma: 2.5s (15.3x, -----) tinycc valgrind-old:0.16s no: 1.4s ( 8.5x, 1.4%) me: 7.8s (48.9x, 2.4%) ca:10.9s (68.1x, 0.7%) he: 9.6s (60.1x, 0.3%) ca: 8.0s (50.1x, -3.0%) dr: 8.2s (51.2x, -0.7%) ma: 2.5s (15.6x, -2.0%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 34m58.284s user 33m39.621s sys 0m24.724s |