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From: <sv...@va...> - 2014-08-15 22:08:16
|
Author: florian
Date: Fri Aug 15 22:08:09 2014
New Revision: 14294
Log:
Remove VG_(strncpy_safely). It is no longer needed.
Modified:
branches/BUF_REMOVAL/coregrind/m_libcbase.c
branches/BUF_REMOVAL/include/pub_tool_libcbase.h
Modified: branches/BUF_REMOVAL/coregrind/m_libcbase.c
==============================================================================
--- branches/BUF_REMOVAL/coregrind/m_libcbase.c (original)
+++ branches/BUF_REMOVAL/coregrind/m_libcbase.c Fri Aug 15 22:08:09 2014
@@ -38,6 +38,8 @@
Assert machinery for use in this file. vg_assert cannot be called
here due to cyclic dependencies.
------------------------------------------------------------------ */
+#if 0 // currently unused
+
#define libcbase_assert(expr) \
((void) (LIKELY(expr) ? 0 : \
(ML_(libcbase_assert_fail)(#expr, \
@@ -57,6 +59,8 @@
VG_(exit_now)(1);
}
+#endif
+
/* ---------------------------------------------------------------------
HChar functions.
------------------------------------------------------------------ */
@@ -298,22 +302,6 @@
return dest_orig;
}
-/* Copy bytes, not overrunning the end of dest and always ensuring
- zero termination. */
-void VG_(strncpy_safely) ( HChar* dest, const HChar* src, SizeT ndest )
-{
- libcbase_assert(ndest > 0);
-
- SizeT i = 0;
- while (True) {
- dest[i] = 0;
- if (src[i] == 0) return;
- if (i >= ndest-1) return;
- dest[i] = src[i];
- i++;
- }
-}
-
HChar* VG_(strncpy) ( HChar* dest, const HChar* src, SizeT ndest )
{
SizeT i = 0;
Modified: branches/BUF_REMOVAL/include/pub_tool_libcbase.h
==============================================================================
--- branches/BUF_REMOVAL/include/pub_tool_libcbase.h (original)
+++ branches/BUF_REMOVAL/include/pub_tool_libcbase.h Fri Aug 15 22:08:09 2014
@@ -129,10 +129,6 @@
const HChar *input,
UInt *enum_set);
-/* Like strncpy(), but if 'src' is longer than 'ndest' inserts a '\0' as the
- last character. */
-extern void VG_(strncpy_safely) ( HChar* dest, const HChar* src, SizeT ndest );
-
/* ---------------------------------------------------------------------
mem* functions
------------------------------------------------------------------ */
|
Author: florian
Date: Fri Aug 15 22:01:13 2014
New Revision: 14293
Log:
Change VG_(get_filename_linenum) to return filename and directory
name in static buffers. Fix call sites.
Modified:
branches/BUF_REMOVAL/cachegrind/cg_main.c
branches/BUF_REMOVAL/callgrind/debug.c
branches/BUF_REMOVAL/callgrind/dump.c
branches/BUF_REMOVAL/callgrind/fn.c
branches/BUF_REMOVAL/callgrind/global.h
branches/BUF_REMOVAL/coregrind/m_debuginfo/debuginfo.c
branches/BUF_REMOVAL/coregrind/m_scheduler/scheduler.c
branches/BUF_REMOVAL/include/pub_tool_debuginfo.h
Modified: branches/BUF_REMOVAL/cachegrind/cg_main.c
==============================================================================
--- branches/BUF_REMOVAL/cachegrind/cg_main.c (original)
+++ branches/BUF_REMOVAL/cachegrind/cg_main.c Fri Aug 15 22:01:13 2014
@@ -30,14 +30,12 @@
*/
#include "pub_tool_basics.h"
-#include "pub_tool_vki.h"
#include "pub_tool_debuginfo.h"
#include "pub_tool_libcbase.h"
#include "pub_tool_libcassert.h"
#include "pub_tool_libcfile.h"
#include "pub_tool_libcprint.h"
#include "pub_tool_libcproc.h"
-#include "pub_tool_machine.h"
#include "pub_tool_mallocfree.h"
#include "pub_tool_options.h"
#include "pub_tool_oset.h"
@@ -58,7 +56,6 @@
#define DEBUG_CG 0
#define MIN_LINE_SIZE 16
-#define FILE_LEN VKI_PATH_MAX
/*------------------------------------------------------------*/
/*--- Options ---*/
@@ -212,21 +209,20 @@
/*--- CC table operations ---*/
/*------------------------------------------------------------*/
-static void get_debug_info(Addr instr_addr, HChar dir[FILE_LEN],
- HChar file[FILE_LEN],
+static void get_debug_info(Addr instr_addr, HChar **dir,
+ HChar **file,
HChar **fn, UInt* line)
{
Bool found_dirname;
Bool found_file_line = VG_(get_filename_linenum)(
instr_addr,
- file, FILE_LEN,
- dir, FILE_LEN, &found_dirname,
+ file, dir, &found_dirname,
line
);
Bool found_fn = VG_(get_fnname)(instr_addr, fn);
if (!found_file_line) {
- VG_(strcpy)(file, "???");
+ *file = (HChar *)"???"; // FIXME: constification
*line = 0;
}
if (!found_fn) {
@@ -250,12 +246,12 @@
// Returns a pointer to the line CC, creates a new one if necessary.
static LineCC* get_lineCC(Addr origAddr)
{
- HChar file[FILE_LEN], dir[FILE_LEN], *fn;
+ HChar *file, *dir, *fn;
UInt line;
CodeLoc loc;
LineCC* lineCC;
- get_debug_info(origAddr, dir, file, &fn, &line);
+ get_debug_info(origAddr, &dir, &file, &fn, &line);
// Form an absolute pathname if a directory is available
HChar absfile[VG_(strlen)(dir) + 1 + VG_(strlen)(file) + 1];
Modified: branches/BUF_REMOVAL/callgrind/debug.c
==============================================================================
--- branches/BUF_REMOVAL/callgrind/debug.c (original)
+++ branches/BUF_REMOVAL/callgrind/debug.c Fri Aug 15 22:01:13 2014
@@ -373,7 +373,7 @@
/* dump out an address with source info if available */
void CLG_(print_addr)(Addr addr)
{
- HChar fl_buf[FILENAME_LEN], dir_buf[FILENAME_LEN];
+ HChar *fl_buf, *dir_buf;
HChar *fn_buf;
const HChar* obj_name;
DebugInfo* di;
@@ -384,7 +384,7 @@
return;
}
- CLG_(get_debug_info)(addr, dir_buf, fl_buf, &fn_buf, &ln, &di);
+ CLG_(get_debug_info)(addr, &dir_buf, &fl_buf, &fn_buf, &ln, &di);
if (VG_(strcmp)(fn_buf,"???")==0)
VG_(printf)("%#lx", addr);
Modified: branches/BUF_REMOVAL/callgrind/dump.c
==============================================================================
--- branches/BUF_REMOVAL/callgrind/dump.c (original)
+++ branches/BUF_REMOVAL/callgrind/dump.c Fri Aug 15 22:01:13 2014
@@ -440,8 +440,8 @@
static /* __inline__ */
Bool get_debug_pos(BBCC* bbcc, Addr addr, AddrPos* p)
{
- HChar file[FILENAME_LEN];
- HChar dir[FILENAME_LEN];
+ HChar *file;
+ HChar *dir;
Bool found_file_line, found_dirname;
int cachepos = addr % DEBUG_CACHE_SIZE;
@@ -453,12 +453,12 @@
}
else {
found_file_line = VG_(get_filename_linenum)(addr,
- file, FILENAME_LEN,
- dir, FILENAME_LEN,
+ &file,
+ &dir,
&found_dirname,
&(p->line));
if (!found_file_line) {
- VG_(strcpy)(file, "???");
+ file = (HChar *)"???"; // FIXME: constification
p->line = 0;
}
if (! found_dirname) {
Modified: branches/BUF_REMOVAL/callgrind/fn.c
==============================================================================
--- branches/BUF_REMOVAL/callgrind/fn.c (original)
+++ branches/BUF_REMOVAL/callgrind/fn.c Fri Aug 15 22:01:13 2014
@@ -424,8 +424,8 @@
Bool CLG_(get_debug_info)(Addr instr_addr,
- HChar dir[FILENAME_LEN],
- HChar file[FILENAME_LEN],
+ HChar **dir,
+ HChar **file,
HChar **fn_name, UInt* line_num,
DebugInfo** pDebugInfo)
{
@@ -441,8 +441,8 @@
}
found_file_line = VG_(get_filename_linenum)(instr_addr,
- file, FILENAME_LEN,
- dir, FILENAME_LEN,
+ file,
+ dir,
&found_dirname,
&line);
found_fn = VG_(get_fnname)(instr_addr,
@@ -454,7 +454,7 @@
if (!found_file_line && !found_fn) {
CLG_(stat).no_debug_BBs++;
- VG_(strcpy)(file, "???");
+ *file = (HChar *)"???"; // FIXME: constification
*fn_name = (HChar *)"???"; // FIXME: constification
if (line_num) *line_num=0;
result = False;
@@ -470,7 +470,7 @@
} else /*(!found_file_line && found_fn)*/ {
CLG_(stat).fn_name_debug_BBs++;
- VG_(strcpy)(file, "???");
+ *file = (HChar *)"???"; // FIXME: constification
if (line_num) *line_num=0;
}
@@ -493,7 +493,7 @@
*/
fn_node* CLG_(get_fn_node)(BB* bb)
{
- HChar filename[FILENAME_LEN], dirname[FILENAME_LEN], *fnname;
+ HChar *filename, *dirname, *fnname;
DebugInfo* di;
UInt line_num;
fn_node* fn;
@@ -507,7 +507,7 @@
* the BB according to debug information
*/
CLG_(get_debug_info)(bb_addr(bb),
- dirname, filename, &fnname, &line_num, &di);
+ &dirname, &filename, &fnname, &line_num, &di);
if (0 == VG_(strcmp)(fnname, "???")) {
int p;
@@ -538,7 +538,7 @@
if (0 == VG_(strcmp)(fnname, "vgPlain___libc_freeres_wrapper")
&& exit_bb) {
CLG_(get_debug_info)(bb_addr(exit_bb),
- dirname, filename, &fnname, &line_num, &di);
+ &dirname, &filename, &fnname, &line_num, &di);
CLG_DEBUG(1, "__libc_freeres_wrapper renamed to _exit\n");
}
Modified: branches/BUF_REMOVAL/callgrind/global.h
==============================================================================
--- branches/BUF_REMOVAL/callgrind/global.h (original)
+++ branches/BUF_REMOVAL/callgrind/global.h Fri Aug 15 22:01:13 2014
@@ -721,8 +721,8 @@
void CLG_(init_eventsets)(void);
/* from main.c */
-Bool CLG_(get_debug_info)(Addr, HChar dirname[FILENAME_LEN],
- HChar filename[FILENAME_LEN],
+Bool CLG_(get_debug_info)(Addr, HChar **dirname,
+ HChar **filename,
HChar **fn_name, UInt*, DebugInfo**);
void CLG_(collectBlockInfo)(IRSB* bbIn, UInt*, UInt*, Bool*);
void CLG_(set_instrument_state)(const HChar*,Bool);
Modified: branches/BUF_REMOVAL/coregrind/m_debuginfo/debuginfo.c
==============================================================================
--- branches/BUF_REMOVAL/coregrind/m_debuginfo/debuginfo.c (original)
+++ branches/BUF_REMOVAL/coregrind/m_debuginfo/debuginfo.c Fri Aug 15 22:01:13 2014
@@ -1953,14 +1953,15 @@
See prototype for detailed description of behaviour.
*/
Bool VG_(get_filename_linenum) ( Addr a,
- /*OUT*/HChar* filename, Int n_filename,
- /*OUT*/HChar* dirname, Int n_dirname,
+ /*OUT*/HChar** filename,
+ /*OUT*/HChar** dirname,
/*OUT*/Bool* dirname_available,
/*OUT*/UInt* lineno )
{
DebugInfo* si;
Word locno;
UInt fndn_ix;
+ const HChar *fname, *dname;
vg_assert( (dirname == NULL && dirname_available == NULL)
||
@@ -1970,24 +1971,35 @@
if (si == NULL) {
if (dirname_available) {
*dirname_available = False;
- *dirname = 0;
+ *dirname[0] = 0;
}
+ // filename used to be an HChar [] and it was not initialised along
+ // this path. Not good.
+ // Nowadays, filename is a HChar ** and we initialise it to NULL here
+ // to find executions along which the filename array was read
+ // uninitialised or (even worse) expected to keep its value past this
+ // function invocation.
+ *filename = NULL;
return False;
}
+ static HChar *fbuf, *dbuf;
+ static SizeT fbuf_siz, dbuf_siz;
+
fndn_ix = ML_(fndn_ix)(si, locno);
- VG_(strncpy_safely)(filename,
- ML_(fndn_ix2filename) (si, fndn_ix),
- n_filename);
+
+ fname = ML_(fndn_ix2filename) (si, fndn_ix);
+ grow_buffer_for_string(&fbuf, &fbuf_siz, fname);
+ *filename = VG_(strcpy)(fbuf, fname);
+
*lineno = si->loctab[locno].lineno;
if (dirname) {
/* caller wants directory info too .. */
- vg_assert(n_dirname > 0);
- VG_(strncpy_safely)(dirname,
- ML_(fndn_ix2dirname) (si, fndn_ix),
- n_dirname);
- *dirname_available = *dirname != 0;
+ dname = ML_(fndn_ix2dirname) (si, fndn_ix);
+ grow_buffer_for_string(&dbuf, &dbuf_siz, dname);
+ *dirname = VG_(strcpy)(dbuf, dname);
+ *dirname_available = *dirname[0] != 0;
}
return True;
@@ -2124,9 +2136,8 @@
static HChar *buf_fn;
static HChar *buf_obj;
- static HChar buf_srcloc[BUF_LEN];
- static HChar buf_dirname[BUF_LEN];
- buf_srcloc[0] = buf_dirname[0] = 0;
+ static HChar *buf_srcloc;
+ static HChar *buf_dirname;
Bool know_dirinfo = False;
Bool know_fnname;
@@ -2161,8 +2172,8 @@
// The source for the highest level is in the loctab entry.
know_srcloc = VG_(get_filename_linenum)(
eip,
- buf_srcloc, BUF_LEN,
- buf_dirname, BUF_LEN, &know_dirinfo,
+ &buf_srcloc,
+ &buf_dirname, &know_dirinfo,
&lineno
);
} else {
@@ -2174,23 +2185,20 @@
know_dirinfo = False;
// The fndn_ix and lineno for the caller of the inlined fn is in cur_inl.
if (cur_inl->fndn_ix == 0) {
- VG_(snprintf) (buf_srcloc, BUF_LEN, "???");
+ buf_srcloc = (HChar *)"???"; // FIXME: constification
} else {
FnDn *fndn = VG_(indexEltNumber) (iipc->di->fndnpool,
cur_inl->fndn_ix);
if (fndn->dirname) {
- VG_(snprintf) (buf_dirname, BUF_LEN, "%s", fndn->dirname);
+ buf_dirname = (HChar *)fndn->dirname; // FIXME: constification
know_dirinfo = True;
}
- VG_(snprintf) (buf_srcloc, BUF_LEN, "%s", fndn->filename);
+ buf_srcloc = (HChar *)fndn->filename; // FIXME: constification
}
lineno = cur_inl->lineno;
know_srcloc = True;
}
- buf_srcloc [ sizeof(buf_srcloc)-1 ] = 0;
- buf_dirname[ sizeof(buf_dirname)-1 ] = 0;
-
if (VG_(clo_xml)) {
Bool human_readable = True;
Modified: branches/BUF_REMOVAL/coregrind/m_scheduler/scheduler.c
==============================================================================
--- branches/BUF_REMOVAL/coregrind/m_scheduler/scheduler.c (original)
+++ branches/BUF_REMOVAL/coregrind/m_scheduler/scheduler.c Fri Aug 15 22:01:13 2014
@@ -1949,24 +1949,29 @@
case VG_USERREQ__MAP_IP_TO_SRCLOC: {
Addr ip = arg[1];
HChar* buf64 = (HChar*)arg[2];
+ HChar* buf; // points to null-terminated string of unknown length
VG_(memset)(buf64, 0, 64);
UInt linenum = 0;
Bool ok = VG_(get_filename_linenum)(
- ip, &buf64[0], 50, NULL, 0, NULL, &linenum
+ ip, &buf, NULL, NULL, &linenum
);
if (ok) {
+ /* Backward compatibility */
+
/* Find the terminating zero in the first 50 bytes. */
UInt i;
for (i = 0; i < 50; i++) {
- if (buf64[i] == 0)
+ if (buf[i] == 0)
break;
}
- /* We must find a zero somewhere in 0 .. 49. Else
- VG_(get_filename_linenum) is not properly zero
- terminating. */
- vg_assert(i < 50);
- VG_(sprintf)(&buf64[i], ":%u", linenum);
+ if (i == 50) {
+ // The returned filename is too long. Truncate it just like
+ // the old implementation of VG_(get_filename_linenum)
+ // would have done.
+ buf[49] = 0;
+ }
+ VG_(sprintf)(buf64, "%s:%u", buf, linenum);
} else {
buf64[0] = 0;
}
Modified: branches/BUF_REMOVAL/include/pub_tool_debuginfo.h
==============================================================================
--- branches/BUF_REMOVAL/include/pub_tool_debuginfo.h (original)
+++ branches/BUF_REMOVAL/include/pub_tool_debuginfo.h Fri Aug 15 22:01:13 2014
@@ -53,17 +53,21 @@
optionally directory name. filename and linenum may not be NULL.
dirname may be NULL, meaning that the caller does not want
directory name info, in which case dirname_available must also be
- NULL. If dirname is non-null, directory info is written to it, if
+ NULL. If dirname is non-null, directory info is written to *dirname, if
it is available; if not available, '\0' is written to the first
byte. In either case *dirname_available is set to indicate whether
or not directory information was available.
+ filename and dirname are allocated in static strings and will be
+ overwritten in the next invocation. Callers need to copy the strings
+ if they are needed.
+
Returned value indicates whether any filename/line info could be
found. */
extern Bool VG_(get_filename_linenum)
( Addr a,
- /*OUT*/HChar* filename, Int n_filename,
- /*OUT*/HChar* dirname, Int n_dirname,
+ /*OUT*/HChar** filename,
+ /*OUT*/HChar** dirname,
/*OUT*/Bool* dirname_available,
/*OUT*/UInt* linenum );
|
|
From: <sv...@va...> - 2014-08-15 21:52:22
|
Author: florian
Date: Fri Aug 15 21:52:14 2014
New Revision: 14292
Log:
Add convenience functions to grow string buffers. Use them.
Modified:
branches/BUF_REMOVAL/coregrind/m_debuginfo/debuginfo.c
Modified: branches/BUF_REMOVAL/coregrind/m_debuginfo/debuginfo.c
==============================================================================
--- branches/BUF_REMOVAL/coregrind/m_debuginfo/debuginfo.c (original)
+++ branches/BUF_REMOVAL/coregrind/m_debuginfo/debuginfo.c Fri Aug 15 21:52:14 2014
@@ -109,6 +109,9 @@
static UInt CF_info_generation = 0;
static void cfsi_m_cache__invalidate ( void );
+static void grow_buffer(HChar **buf, SizeT *size, SizeT need);
+static void grow_buffer_for_string(HChar **buf, SizeT *size,
+ const HChar *string);
/*------------------------------------------------------------*/
@@ -1663,17 +1666,12 @@
if (show_offset && offset != 0) {
static HChar *bufwo; // buf with offset
static SizeT bufwo_szB;
- SizeT need, len;
+ SizeT need;
- len = VG_(strlen)(*buf);
- need = len + 20;
- if (need > bufwo_szB) {
- bufwo = ML_(dinfo_realloc)("get_sym_size", bufwo, need);
- bufwo_szB = need;
- }
+ need = VG_(strlen)(*buf) + 1 + 19 + 1;
+ grow_buffer(&bufwo, &bufwo_szB, need);
- VG_(strcpy)(bufwo, *buf);
- VG_(sprintf)(bufwo + len, "%c%ld",
+ VG_(sprintf)(bufwo, "%s%c%ld", *buf,
offset < 0 ? '-' : '+',
offset < 0 ? -offset : offset);
*buf = bufwo;
@@ -1848,15 +1846,19 @@
offset );
}
+
/* Map a code address to the name of a shared object file or the
executable. Returns False if no idea; otherwise True. Doesn't
require debug info. */
-Bool VG_(get_objname) ( Addr a, HChar** buf )
+Bool VG_(get_objname) ( Addr a, HChar** objname )
{
DebugInfo* di;
const NSegment *seg;
HChar* filename;
+ static SizeT bufsiz = 0;
+ static HChar *buf = NULL;
+
/* Look in the debugInfo_list to find the name. In most cases we
expect this to produce a result. */
for (di = debugInfo_list; di != NULL; di = di->next) {
@@ -1864,7 +1866,8 @@
&& di->text_size > 0
&& di->text_avma <= a
&& a < di->text_avma + di->text_size) {
- *buf = di->fsm.filename;
+ grow_buffer_for_string(&buf, &bufsiz, di->fsm.filename);
+ *objname = VG_(strcpy)(buf, di->fsm.filename);
return True;
}
}
@@ -1875,7 +1878,8 @@
when running programs under wine. */
if ( (seg = VG_(am_find_nsegment(a))) != NULL
&& (filename = VG_(am_get_filename)(seg)) != NULL ) {
- *buf = filename;
+ grow_buffer_for_string(&buf, &bufsiz, filename);
+ *objname = VG_(strcpy)(buf, filename);
return True;
}
return False;
@@ -1925,16 +1929,9 @@
static SizeT bufsiz = 0;
static HChar *buf = NULL;
- SizeT need;
- need = VG_(strlen)(fname) + 1;
- if (need > bufsiz) {
- if (need < 256) need = 256;
- bufsiz = need;
- buf = ML_(dinfo_realloc)("get_filename", buf, bufsiz);
- }
- VG_(strcpy)(buf, fname);
- *filename = buf;
+ grow_buffer_for_string(&buf, &bufsiz, fname);
+ *filename = VG_(strcpy)(buf, fname);
return True;
}
@@ -4304,6 +4301,27 @@
}
+
+/*------------------------------------------------------------*/
+/*--- Helper functions to grow a buffer ---*/
+/*------------------------------------------------------------*/
+
+static void grow_buffer(HChar **buf, SizeT *size, SizeT need)
+{
+ if (need > *size) {
+ if (need < 256) need = 256;
+ *size = need;
+ *buf = ML_(dinfo_realloc)("grow_buffer", *buf, *size);
+ }
+}
+
+// Convenience function
+static void grow_buffer_for_string(HChar **buf, SizeT *size,
+ const HChar *string)
+{
+ grow_buffer(buf, size, VG_(strlen)(string) + 1);
+}
+
/*--------------------------------------------------------------------*/
/*--- end ---*/
/*--------------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2014-08-15 16:44:39
|
Author: carll
Date: Fri Aug 15 16:44:32 2014
New Revision: 14291
Log:
creating the lind from none/tests/ppc64/round.c to none/tests/ppc32/round.c
Added:
trunk/none/tests/ppc64/round.c (with props)
Added: trunk/none/tests/ppc64/round.c
==============================================================================
--- trunk/none/tests/ppc64/round.c (added)
+++ trunk/none/tests/ppc64/round.c Fri Aug 15 16:44:32 2014
@@ -0,0 +1 @@
+link ../ppc32/round.c
\ No newline at end of file
|
|
From: <sv...@va...> - 2014-08-15 16:40:11
|
Author: carll
Date: Fri Aug 15 16:40:03 2014
New Revision: 14290
Log:
Removing the file none/tests/ppc64/round.c so I can change it to a link.
Modified:
trunk/none/tests/ppc64/round.c
|
|
From: <sv...@va...> - 2014-08-15 15:04:40
|
Author: florian
Date: Fri Aug 15 15:04:31 2014
New Revision: 14289
Log:
Change CLG_(get_debug_info) such that it does not build up an absolute
path name. Instead add a function parameter to hold the directory
name, if one was found. Build up the path name when it is needed.
That will come in handy soonish.
This change has some ripple and a few other functions need to be changed
and now take in an additional parameter for the directory as well.
For clarity, change some function parameter types from
HChar [FILENAME_LEN] to const HChar * if the parameter is an
input parameter.
Modified:
branches/BUF_REMOVAL/callgrind/debug.c
branches/BUF_REMOVAL/callgrind/dump.c
branches/BUF_REMOVAL/callgrind/fn.c
branches/BUF_REMOVAL/callgrind/global.h
Modified: branches/BUF_REMOVAL/callgrind/debug.c
==============================================================================
--- branches/BUF_REMOVAL/callgrind/debug.c (original)
+++ branches/BUF_REMOVAL/callgrind/debug.c Fri Aug 15 15:04:31 2014
@@ -373,7 +373,7 @@
/* dump out an address with source info if available */
void CLG_(print_addr)(Addr addr)
{
- HChar fl_buf[FILENAME_LEN];
+ HChar fl_buf[FILENAME_LEN], dir_buf[FILENAME_LEN];
HChar *fn_buf;
const HChar* obj_name;
DebugInfo* di;
@@ -384,7 +384,7 @@
return;
}
- CLG_(get_debug_info)(addr, fl_buf, &fn_buf, &ln, &di);
+ CLG_(get_debug_info)(addr, dir_buf, fl_buf, &fn_buf, &ln, &di);
if (VG_(strcmp)(fn_buf,"???")==0)
VG_(printf)("%#lx", addr);
@@ -403,8 +403,12 @@
}
}
- if (ln>0)
- VG_(printf)(" (%s:%u)", fl_buf,ln);
+ if (ln>0) {
+ if (dir_buf[0])
+ VG_(printf)(" (%s/%s:%u)", dir_buf, fl_buf, ln);
+ else
+ VG_(printf)(" (%s:%u)", fl_buf, ln);
+ }
}
void CLG_(print_addr_ln)(Addr addr)
Modified: branches/BUF_REMOVAL/callgrind/dump.c
==============================================================================
--- branches/BUF_REMOVAL/callgrind/dump.c (original)
+++ branches/BUF_REMOVAL/callgrind/dump.c Fri Aug 15 15:04:31 2014
@@ -461,14 +461,10 @@
VG_(strcpy)(file, "???");
p->line = 0;
}
- if (found_dirname) {
- // +1 for the '/'.
- CLG_ASSERT(VG_(strlen)(dir) + VG_(strlen)(file) + 1 < FILENAME_LEN);
- VG_(strcat)(dir, "/"); // Append '/'
- VG_(strcat)(dir, file); // Append file to dir
- VG_(strcpy)(file, dir); // Move dir+file to file
+ if (! found_dirname) {
+ dir[0] = '\0';
}
- p->file = CLG_(get_file_node)(bbcc->bb->obj, file);
+ p->file = CLG_(get_file_node)(bbcc->bb->obj, dir, file);
debug_cache_info[cachepos] = found_file_line;
debug_cache_addr[cachepos] = addr;
Modified: branches/BUF_REMOVAL/callgrind/fn.c
==============================================================================
--- branches/BUF_REMOVAL/callgrind/fn.c (original)
+++ branches/BUF_REMOVAL/callgrind/fn.c Fri Aug 15 15:04:31 2014
@@ -286,7 +286,7 @@
static __inline__
-file_node* new_file_node(HChar filename[FILENAME_LEN],
+file_node* new_file_node(const HChar *filename,
obj_node* obj, file_node* next)
{
Int i;
@@ -305,11 +305,19 @@
file_node* CLG_(get_file_node)(obj_node* curr_obj_node,
- HChar filename[FILENAME_LEN])
+ const HChar *dir, const HChar *file)
{
file_node* curr_file_node;
UInt filename_hash;
+ /* Build up an absolute pathname, if there is a directory available */
+ HChar filename[VG_(strlen)(dir) + 1 + VG_(strlen)(file) + 1];
+ VG_(strcpy)(filename, dir);
+ if (filename[0] != '\0') {
+ VG_(strcat)(filename, "/");
+ }
+ VG_(strcat)(filename, file);
+
/* lookup in file hash */
filename_hash = str_hash(filename, N_FILE_ENTRIES);
curr_file_node = curr_obj_node->files[filename_hash];
@@ -403,11 +411,12 @@
*/
static __inline__
fn_node* get_fn_node_inseg(DebugInfo* di,
- HChar filename[FILENAME_LEN],
+ const HChar *dirname,
+ const HChar *filename,
const HChar *fnname)
{
obj_node *obj = CLG_(get_obj_node)(di);
- file_node *file = CLG_(get_file_node)(obj, filename);
+ file_node *file = CLG_(get_file_node)(obj, dirname, filename);
fn_node *fn = get_fn_node_infile(file, fnname);
return fn;
@@ -415,12 +424,12 @@
Bool CLG_(get_debug_info)(Addr instr_addr,
+ HChar dir[FILENAME_LEN],
HChar file[FILENAME_LEN],
HChar **fn_name, UInt* line_num,
DebugInfo** pDebugInfo)
{
Bool found_file_line, found_fn, found_dirname, result = True;
- HChar dir[FILENAME_LEN];
UInt line;
CLG_DEBUG(6, " + get_debug_info(%#lx)\n", instr_addr);
@@ -439,12 +448,8 @@
found_fn = VG_(get_fnname)(instr_addr,
fn_name);
- if (found_dirname) {
- // +1 for the '/'.
- CLG_ASSERT(VG_(strlen)(dir) + VG_(strlen)(file) + 1 < FILENAME_LEN);
- VG_(strcat)(dir, "/"); // Append '/'
- VG_(strcat)(dir, file); // Append file to dir
- VG_(strcpy)(file, dir); // Move dir+file to file
+ if (!found_dirname) {
+ dir[0] = '\0';
}
if (!found_file_line && !found_fn) {
@@ -488,7 +493,7 @@
*/
fn_node* CLG_(get_fn_node)(BB* bb)
{
- HChar filename[FILENAME_LEN], *fnname;
+ HChar filename[FILENAME_LEN], dirname[FILENAME_LEN], *fnname;
DebugInfo* di;
UInt line_num;
fn_node* fn;
@@ -502,7 +507,7 @@
* the BB according to debug information
*/
CLG_(get_debug_info)(bb_addr(bb),
- filename, &fnname, &line_num, &di);
+ dirname, filename, &fnname, &line_num, &di);
if (0 == VG_(strcmp)(fnname, "???")) {
int p;
@@ -533,7 +538,7 @@
if (0 == VG_(strcmp)(fnname, "vgPlain___libc_freeres_wrapper")
&& exit_bb) {
CLG_(get_debug_info)(bb_addr(exit_bb),
- filename, &fnname, &line_num, &di);
+ dirname, filename, &fnname, &line_num, &di);
CLG_DEBUG(1, "__libc_freeres_wrapper renamed to _exit\n");
}
@@ -548,7 +553,7 @@
}
/* get fn_node struct for this function */
- fn = get_fn_node_inseg( di, filename, fnname);
+ fn = get_fn_node_inseg( di, dirname, filename, fnname);
/* if this is the 1st time the function is seen,
* some attributes are set */
@@ -589,9 +594,13 @@
bb->fn = fn;
bb->line = line_num;
- CLG_DEBUG(3,"- get_fn_node(BB %#lx): %s (in %s:%u)\n",
- bb_addr(bb), fnname, filename, line_num);
-
+ if (dirname[0]) {
+ CLG_DEBUG(3,"- get_fn_node(BB %#lx): %s (in %s/%s:%u)\n",
+ bb_addr(bb), fnname, dirname, filename, line_num);
+ } else {
+ CLG_DEBUG(3,"- get_fn_node(BB %#lx): %s (in %s:%u)\n",
+ bb_addr(bb), fnname, filename, line_num);
+ }
return fn;
}
Modified: branches/BUF_REMOVAL/callgrind/global.h
==============================================================================
--- branches/BUF_REMOVAL/callgrind/global.h (original)
+++ branches/BUF_REMOVAL/callgrind/global.h Fri Aug 15 15:04:31 2014
@@ -721,8 +721,9 @@
void CLG_(init_eventsets)(void);
/* from main.c */
-Bool CLG_(get_debug_info)(Addr, HChar filename[FILENAME_LEN],
- HChar **fn_name, UInt*, DebugInfo**);
+Bool CLG_(get_debug_info)(Addr, HChar dirname[FILENAME_LEN],
+ HChar filename[FILENAME_LEN],
+ HChar **fn_name, UInt*, DebugInfo**);
void CLG_(collectBlockInfo)(IRSB* bbIn, UInt*, UInt*, Bool*);
void CLG_(set_instrument_state)(const HChar*,Bool);
void CLG_(dump_profile)(const HChar* trigger,Bool only_current_thread);
@@ -751,7 +752,8 @@
void CLG_(init_obj_table)(void);
obj_node* CLG_(get_obj_node)(DebugInfo* si);
-file_node* CLG_(get_file_node)(obj_node*, HChar* filename);
+file_node* CLG_(get_file_node)(obj_node*, const HChar *dirname,
+ const HChar* filename);
fn_node* CLG_(get_fn_node)(BB* bb);
/* from bbcc.c */
|
|
From: <sv...@va...> - 2014-08-15 14:51:14
|
Author: florian
Date: Fri Aug 15 14:51:06 2014
New Revision: 14288
Log:
Change get_debug_info such that it does not build up an absolute
path name. Instead add a function parameter to hold the directory
name, if one was found. Build up the path name when it is needed.
That will come in handy soonish.
Modified:
branches/BUF_REMOVAL/cachegrind/cg_main.c
Modified: branches/BUF_REMOVAL/cachegrind/cg_main.c
==============================================================================
--- branches/BUF_REMOVAL/cachegrind/cg_main.c (original)
+++ branches/BUF_REMOVAL/cachegrind/cg_main.c Fri Aug 15 14:51:06 2014
@@ -212,10 +212,10 @@
/*--- CC table operations ---*/
/*------------------------------------------------------------*/
-static void get_debug_info(Addr instr_addr, HChar file[FILE_LEN],
+static void get_debug_info(Addr instr_addr, HChar dir[FILE_LEN],
+ HChar file[FILE_LEN],
HChar **fn, UInt* line)
{
- HChar dir[FILE_LEN];
Bool found_dirname;
Bool found_file_line = VG_(get_filename_linenum)(
instr_addr,
@@ -233,12 +233,8 @@
*fn = (HChar *)"???"; // FIXME: constification
}
- if (found_dirname) {
- // +1 for the '/'.
- tl_assert(VG_(strlen)(dir) + VG_(strlen)(file) + 1 < FILE_LEN);
- VG_(strcat)(dir, "/"); // Append '/'
- VG_(strcat)(dir, file); // Append file to dir
- VG_(strcpy)(file, dir); // Move dir+file to file
+ if (!found_dirname) {
+ dir[0] = '\0';
}
if (found_file_line) {
@@ -254,14 +250,22 @@
// Returns a pointer to the line CC, creates a new one if necessary.
static LineCC* get_lineCC(Addr origAddr)
{
- HChar file[FILE_LEN], *fn;
+ HChar file[FILE_LEN], dir[FILE_LEN], *fn;
UInt line;
CodeLoc loc;
LineCC* lineCC;
- get_debug_info(origAddr, file, &fn, &line);
+ get_debug_info(origAddr, dir, file, &fn, &line);
- loc.file = file;
+ // Form an absolute pathname if a directory is available
+ HChar absfile[VG_(strlen)(dir) + 1 + VG_(strlen)(file) + 1];
+
+ if (dir[0]) {
+ VG_(sprintf)(absfile, "%s/%s", dir, file);
+ } else {
+ VG_(sprintf)(absfile, "%s", file);
+ }
+ loc.file = absfile;
loc.fn = fn;
loc.line = line;
|
|
From: <sv...@va...> - 2014-08-15 13:03:38
|
Author: philippe
Date: Fri Aug 15 13:03:24 2014
New Revision: 14287
Log:
Some cleanup post QGetTlsAddr commit
* remove useless commented line in hgtls.vgtest
* avoid some #ifdef in arch specific code, hoping to discover more compile
time errors.
Modified:
trunk/coregrind/m_gdbserver/valgrind-low-amd64.c
trunk/coregrind/m_gdbserver/valgrind-low-arm.c
trunk/coregrind/m_gdbserver/valgrind-low-arm64.c
trunk/coregrind/m_gdbserver/valgrind-low-mips32.c
trunk/coregrind/m_gdbserver/valgrind-low-mips64.c
trunk/coregrind/m_gdbserver/valgrind-low-ppc32.c
trunk/coregrind/m_gdbserver/valgrind-low-ppc64.c
trunk/coregrind/m_gdbserver/valgrind-low-s390x.c
trunk/coregrind/m_gdbserver/valgrind-low-x86.c
trunk/gdbserver_tests/hgtls.vgtest
Modified: trunk/coregrind/m_gdbserver/valgrind-low-amd64.c
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind-low-amd64.c (original)
+++ trunk/coregrind/m_gdbserver/valgrind-low-amd64.c Fri Aug 15 13:03:24 2014
@@ -348,11 +348,8 @@
static CORE_ADDR** target_get_dtv (ThreadState *tst)
{
-#if defined(VGA_amd64)
- return (CORE_ADDR**)(tst->arch.vex.guest_FS_ZERO + 0x8);
-#else
- vg_assert(0);
-#endif
+ VexGuestAMD64State* amd64 = (VexGuestAMD64State*)&tst->arch.vex;
+ return (CORE_ADDR**)((CORE_ADDR)amd64->guest_FS_ZERO + 0x8);
}
static struct valgrind_target_ops low_target = {
Modified: trunk/coregrind/m_gdbserver/valgrind-low-arm.c
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind-low-arm.c (original)
+++ trunk/coregrind/m_gdbserver/valgrind-low-arm.c Fri Aug 15 13:03:24 2014
@@ -288,12 +288,9 @@
static CORE_ADDR** target_get_dtv (ThreadState *tst)
{
-#if defined(VGA_arm)
+ VexGuestARMState* arm = (VexGuestARMState*)&tst->arch.vex;
// arm dtv is pointed to by TPIDRURO
- return (CORE_ADDR**)(tst->arch.vex.guest_TPIDRURO);
-#else
- vg_assert(0);
-#endif
+ return (CORE_ADDR**)((CORE_ADDR)arm->guest_TPIDRURO);
}
static struct valgrind_target_ops low_target = {
Modified: trunk/coregrind/m_gdbserver/valgrind-low-arm64.c
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind-low-arm64.c (original)
+++ trunk/coregrind/m_gdbserver/valgrind-low-arm64.c Fri Aug 15 13:03:24 2014
@@ -263,12 +263,9 @@
static CORE_ADDR** target_get_dtv (ThreadState *tst)
{
-#if defined(VGA_arm64)
+ VexGuestARM64State* arm64 = (VexGuestARM64State*)&tst->arch.vex;
// arm64 dtv is pointed to by TPIDR_EL0.
- return (CORE_ADDR**)(tst->arch.vex.guest_TPIDR_EL0);
-#else
- vg_assert(0);
-#endif
+ return (CORE_ADDR**)((CORE_ADDR)arm64->guest_TPIDR_EL0);
}
static struct valgrind_target_ops low_target = {
Modified: trunk/coregrind/m_gdbserver/valgrind-low-mips32.c
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind-low-mips32.c (original)
+++ trunk/coregrind/m_gdbserver/valgrind-low-mips32.c Fri Aug 15 13:03:24 2014
@@ -356,12 +356,10 @@
static CORE_ADDR** target_get_dtv (ThreadState *tst)
{
-#if defined(VGA_mips32)
+ VexGuestMIPS32State* mips32 = (VexGuestMIPS32State*)&tst->arch.vex;
// mips32 dtv location similar to ppc64
- return (CORE_ADDR**)(tst->arch.vex.guest_ULR - 0x7000 - sizeof(CORE_ADDR));
-#else
- vg_assert(0);
-#endif
+ return (CORE_ADDR**)((CORE_ADDR)mips32->guest_ULR
+ - 0x7000 - sizeof(CORE_ADDR));
}
static struct valgrind_target_ops low_target = {
Modified: trunk/coregrind/m_gdbserver/valgrind-low-mips64.c
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind-low-mips64.c (original)
+++ trunk/coregrind/m_gdbserver/valgrind-low-mips64.c Fri Aug 15 13:03:24 2014
@@ -357,13 +357,10 @@
static CORE_ADDR** target_get_dtv (ThreadState *tst)
{
-#if defined(VGA_mips64)
+ VexGuestMIPS64State* mips64 = (VexGuestMIPS64State*)&tst->arch.vex;
// mips64 dtv location similar to ppc64
- return (CORE_ADDR**)(tst->arch.vex.guest_ULR - 0x7000 - sizeof(CORE_ADDR));
- return NULL;
-#else
- vg_assert(0);
-#endif
+ return (CORE_ADDR**)((CORE_ADDR)mips64->guest_ULR
+ - 0x7000 - sizeof(CORE_ADDR));
}
static struct valgrind_target_ops low_target = {
Modified: trunk/coregrind/m_gdbserver/valgrind-low-ppc32.c
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind-low-ppc32.c (original)
+++ trunk/coregrind/m_gdbserver/valgrind-low-ppc32.c Fri Aug 15 13:03:24 2014
@@ -334,13 +334,11 @@
static CORE_ADDR** target_get_dtv (ThreadState *tst)
{
-#if defined(VGA_ppc32)
+ VexGuestPPC32State* ppc32 = (VexGuestPPC32State*)&tst->arch.vex;
// ppc32 dtv is located just before the tcb, which is 0x7000 before
// the thread id (r2)
- return (CORE_ADDR**)(tst->arch.vex.guest_GPR2 - 0x7000 - sizeof(CORE_ADDR));
-#else
- vg_assert(0);
-#endif
+ return (CORE_ADDR**)((CORE_ADDR)ppc32->guest_GPR2
+ - 0x7000 - sizeof(CORE_ADDR));
}
static struct valgrind_target_ops low_target = {
Modified: trunk/coregrind/m_gdbserver/valgrind-low-ppc64.c
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind-low-ppc64.c (original)
+++ trunk/coregrind/m_gdbserver/valgrind-low-ppc64.c Fri Aug 15 13:03:24 2014
@@ -331,13 +331,11 @@
static CORE_ADDR** target_get_dtv (ThreadState *tst)
{
-#if defined(VGA_ppc64be) || defined(VGA_ppc64le)
+ VexGuestPPC64State* ppc64 = (VexGuestPPC64State*)&tst->arch.vex;
// ppc64 dtv is located just before the tcb, which is 0x7000 before
// the thread id (r13)
- return (CORE_ADDR**)(tst->arch.vex.guest_GPR13 - 0x7000 - sizeof(CORE_ADDR));
-#else
- vg_assert(0);
-#endif
+ return (CORE_ADDR**)((CORE_ADDR)ppc64->guest_GPR13
+ - 0x7000 - sizeof(CORE_ADDR));
}
static struct valgrind_target_ops low_target = {
Modified: trunk/coregrind/m_gdbserver/valgrind-low-s390x.c
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind-low-s390x.c (original)
+++ trunk/coregrind/m_gdbserver/valgrind-low-s390x.c Fri Aug 15 13:03:24 2014
@@ -199,14 +199,11 @@
static CORE_ADDR** target_get_dtv (ThreadState *tst)
{
-#if defined(VGA_s390x)
+ VexGuestS390XState* s390x = (VexGuestS390XState*)&tst->arch.vex;
// Thread pointer is in a0 (high 32 bits) and a1. Dtv is the second word.
- return (CORE_ADDR**)(((CORE_ADDR)tst->arch.vex.guest_a0 << 32
- | (CORE_ADDR)tst->arch.vex.guest_a1)
+ return (CORE_ADDR**)((Addr)((Addr64)s390x->guest_a0 << 32
+ | (Addr64)s390x->guest_a1)
+ sizeof(CORE_ADDR));
-#else
- vg_assert(0);
-#endif
}
static struct valgrind_target_ops low_target = {
Modified: trunk/coregrind/m_gdbserver/valgrind-low-x86.c
==============================================================================
--- trunk/coregrind/m_gdbserver/valgrind-low-x86.c (original)
+++ trunk/coregrind/m_gdbserver/valgrind-low-x86.c Fri Aug 15 13:03:24 2014
@@ -259,14 +259,14 @@
static CORE_ADDR** target_get_dtv (ThreadState *tst)
{
-#if defined(VGA_x86)
+ VexGuestX86State* x86 = (VexGuestX86State*)&tst->arch.vex;
// FIXME: should make the below formally visible from VEX.
extern ULong x86g_use_seg_selector ( HWord ldt, HWord gdt,
UInt seg_selector, UInt virtual_addr );
- ULong dtv_loc_g = x86g_use_seg_selector (tst->arch.vex.guest_LDT,
- tst->arch.vex.guest_GDT,
- tst->arch.vex.guest_GS,
+ ULong dtv_loc_g = x86g_use_seg_selector (x86->guest_LDT,
+ x86->guest_GDT,
+ x86->guest_GS,
0x4);
if (dtv_loc_g == 1ULL << 32) {
dlog(0, "Error getting x86 dtv\n");
@@ -275,9 +275,6 @@
CORE_ADDR dtv_loc = dtv_loc_g;
return (CORE_ADDR**)dtv_loc;
}
-#else
- vg_assert(0);
-#endif
}
static struct valgrind_target_ops low_target = {
Modified: trunk/gdbserver_tests/hgtls.vgtest
==============================================================================
--- trunk/gdbserver_tests/hgtls.vgtest (original)
+++ trunk/gdbserver_tests/hgtls.vgtest Fri Aug 15 13:03:24 2014
@@ -9,4 +9,3 @@
stdinB: hgtls.stdinB.gdb
stdoutB_filter: filter_gdb
stderrB_filter: filter_make_empty
-# stderrB_filter_args: hg01_all_ok.c
|
|
From: <sv...@va...> - 2014-08-15 11:59:58
|
Author: sewardj
Date: Fri Aug 15 11:59:50 2014
New Revision: 14286
Log:
bgq/cnk: improve accuracy of the argc/v/envp/auxv initial image,
so that the XLC runtime doesn't crash at startup.
Modified:
branches/VALGRIND_3_8_BRANCH_BGQ/coregrind/m_initimg/initimg-bgq.c
branches/VALGRIND_3_8_BRANCH_BGQ/include/pub_tool_libcbase.h
Modified: branches/VALGRIND_3_8_BRANCH_BGQ/coregrind/m_initimg/initimg-bgq.c
==============================================================================
--- branches/VALGRIND_3_8_BRANCH_BGQ/coregrind/m_initimg/initimg-bgq.c (original)
+++ branches/VALGRIND_3_8_BRANCH_BGQ/coregrind/m_initimg/initimg-bgq.c Fri Aug 15 11:59:50 2014
@@ -51,6 +51,10 @@
#include "pub_core_threadstate.h" /* ThreadArchState */
#include "pub_core_initimg.h" /* self */
+/* A 64-bit AUXV entry. */
+typedef struct { ULong a_type; ULong a_val; } Auxv64T;
+
+
/* Create the client's initial memory image. */
IIFinaliseImageInfo VG_(ii_create_image)( IICreateImageInfo iicii )
@@ -128,10 +132,11 @@
// for argc/argv debugging
if (0) {
- ULong* p = (ULong*)arch->vex.guest_GPR1;
- Long argc = p[0];
- UChar** argv = (UChar**)&p[1];
- UChar** envp = (UChar**)&p[1+argc+1];
+ ULong* p = (ULong*)arch->vex.guest_GPR3;
+ Long argc = p[0];
+ UChar** argv = (UChar**)&p[1];
+ UChar** envp = (UChar**)&p[1+argc+1];
+ Auxv64T* auxv;
Long i;
VG_(printf)("<<<< BEFORE\n");
VG_(printf)("ARGC %lld\n", argc);
@@ -140,7 +145,13 @@
vg_assert(envp[-1] == 0);
for (; *envp; envp++)
VG_(printf)("ENVP %s\n", *envp);
- VG_(printf)(">>>> BEFORE\n");
+ vg_assert(*envp == NULL);
+ envp++;
+ for (auxv = (Auxv64T*)envp; auxv->a_type != 0/*AT_NULL*/; auxv++) {
+ VG_(printf)("AUXV %2llu %016llx\n", auxv->a_type, auxv->a_val);
+ }
+ VG_(printf)("AUXV %2llu %016llx\n", auxv->a_type, auxv->a_val);
+ VG_(printf)(">>>> BEFORE\n\n");
}
{ /* Monkey around with argc/argv so the client doesn't see the
@@ -190,10 +201,9 @@
accordingly, as per comments above. */
t_argv[-1] = (HChar*)t_argc;
arch->vex.guest_GPR1 = (ULong)&t_argv[-1];
- arch->vex.guest_GPR3 = arch->vex.guest_GPR1;
// R3 = argc
- arch->vex.guest_GPR3 = t_argc;
+ arch->vex.guest_GPR3 = (ULong)&t_argv[-1];
// R4 = argv
arch->vex.guest_GPR4 = (ULong)&t_argv[0];
// R5 = envp
@@ -206,18 +216,82 @@
}
// R7 (term fn ptr) = 0
arch->vex.guest_GPR7 = 0;
- // R1 is 16-aligned and points to a zero
- arch->vex.guest_GPR1 -= 32;
- arch->vex.guest_GPR1 &= ~31ULL;
- *(ULong*)arch->vex.guest_GPR1 = 0;
+
+ /* The stack image, and R1/3/4/5/6/7 now correctly reflect the
+ removed command line args. However, doing so is likely to
+ have misaligned R1 (the stack pointer), which appears to
+ require to be 64-aligned. So we will have to slide the entire
+ argc/argv/envp/auxv section down between 0 and 7 words (0 to
+ 56 bytes) in order to reestablish R1 alignment. This is a
+ little tricky in that we will have to scan through auxv to
+ find out how large it is. */
+
+ /* Address of the first word after the end of auxv. This
+ is the first word that we don't have to copy. */
+ ULong* auxv_end1 = NULL;
+ {
+ Auxv64T* auxv = (Auxv64T*)(arch->vex.guest_GPR6);
+ for ( ; auxv->a_type != 0/*AT_NULL*/; auxv++)
+ ;
+ /* Now auxv is pointing at the last entry. We have to copy
+ that too. Hence: */
+ auxv_end1 = (ULong*)(&auxv[1]);
+ }
+
+ /* Now figure out how far we have to slide everything in order
+ to regain 64-alignment for R1(SP). */
+ ULong delta = 64; /*INVALID*/
+ {
+ ULong t1 = arch->vex.guest_GPR1;
+ ULong t2 = t1 & ~63ULL;
+ delta = t1 - t2;
+ }
+ vg_assert(delta == 0 || delta == 8 || delta == 16 || delta == 24
+ || delta == 32 || delta == 40 || delta == 48 || delta == 56);
+ vg_assert(sizeof(UWord) == 8);
+ ULong deltaW = delta / sizeof(UWord);
+ vg_assert(deltaW >= 0 && deltaW <= 7);
+ vg_assert(VG_IS_64_ALIGNED(arch->vex.guest_GPR1 - delta));
+
+ /* If there are hardwired args, then we do not expect to be
+ making any changes to the image or registers. So assert for
+ that. */
+ if (iifii.have_hardwired_args) {
+ vg_assert(delta == 0);
+ }
+
+ if (0) {
+ VG_(printf)("VG_(ii_finalise_image): "
+ "need to slide stack down by %llu words\n", deltaW);
+ VG_(printf)("VG_(ii_finalise_image): "
+ "first word to move is at %p\n",
+ (void*)arch->vex.guest_GPR1);
+ VG_(printf)("VG_(ii_finalise_image): "
+ "last+1 word to move is at %p\n",
+ (void*)auxv_end1);
+ }
+
+ {
+ ULong* q;
+ for (q = (ULong*)arch->vex.guest_GPR1; q < auxv_end1; q++) {
+ q[-deltaW] = q[0];
+ }
+ }
+
+ /* Now, finally, adjust pointers into the array: R1, R3, R4, R5, R5. */
+ arch->vex.guest_GPR1 -= delta;
+ arch->vex.guest_GPR3 -= delta;
+ arch->vex.guest_GPR4 -= delta;
+ arch->vex.guest_GPR5 -= delta;
+ arch->vex.guest_GPR6 -= delta;
}
- // for argc/argv debugging
if (0) {
- ULong* p = (ULong*)arch->vex.guest_GPR1;
- Long argc = p[0];
- UChar** argv = (UChar**)&p[1];
- UChar** envp = (UChar**)&p[1+argc+1];
+ ULong* p = (ULong*)arch->vex.guest_GPR3;
+ Long argc = p[0];
+ UChar** argv = (UChar**)&p[1];
+ UChar** envp = (UChar**)&p[1+argc+1];
+ Auxv64T* auxv;
Long i;
VG_(printf)("<<<< AFTER\n");
VG_(printf)("ARGC %lld\n", argc);
@@ -225,8 +299,14 @@
VG_(printf)("ARGV %lld %s\n", i, argv[i]);
vg_assert(envp[-1] == 0);
for (; *envp; envp++)
- VG_(printf)("iimg ENVP %s\n", *envp);
- VG_(printf)(">>>> AFTER\n");
+ VG_(printf)("ENVP %s\n", *envp);
+ vg_assert(*envp == NULL);
+ envp++;
+ for (auxv = (Auxv64T*)envp; auxv->a_type != 0/*AT_NULL*/; auxv++) {
+ VG_(printf)("AUXV %2llu %016llx\n", auxv->a_type, auxv->a_val);
+ }
+ VG_(printf)("AUXV %2llu %016llx\n", auxv->a_type, auxv->a_val);
+ VG_(printf)(">>>> AFTER\n\n");
}
/* Tell the tool that we just wrote to the registers. */
Modified: branches/VALGRIND_3_8_BRANCH_BGQ/include/pub_tool_libcbase.h
==============================================================================
--- branches/VALGRIND_3_8_BRANCH_BGQ/include/pub_tool_libcbase.h (original)
+++ branches/VALGRIND_3_8_BRANCH_BGQ/include/pub_tool_libcbase.h Fri Aug 15 11:59:50 2014
@@ -162,6 +162,7 @@
#define VG_IS_8_ALIGNED(aaa_p) (0 == (((Addr)(aaa_p)) & ((Addr)0x7)))
#define VG_IS_16_ALIGNED(aaa_p) (0 == (((Addr)(aaa_p)) & ((Addr)0xf)))
#define VG_IS_32_ALIGNED(aaa_p) (0 == (((Addr)(aaa_p)) & ((Addr)0x1f)))
+#define VG_IS_64_ALIGNED(aaa_p) (0 == (((Addr)(aaa_p)) & ((Addr)0x3f)))
#define VG_IS_WORD_ALIGNED(aaa_p) (0 == (((Addr)(aaa_p)) & ((Addr)(sizeof(Addr)-1))))
#define VG_IS_PAGE_ALIGNED(aaa_p) (0 == (((Addr)(aaa_p)) & ((Addr)(VKI_PAGE_SIZE-1))))
|
|
From: <sv...@va...> - 2014-08-15 11:58:24
|
Author: sewardj
Date: Fri Aug 15 11:58:17 2014
New Revision: 14285
Log:
bgq/cnk: double the size of the tracked segments array.
Modified:
branches/VALGRIND_3_8_BRANCH_BGQ/coregrind/m_aspacemgr/aspacemgr-bgq.c
Modified: branches/VALGRIND_3_8_BRANCH_BGQ/coregrind/m_aspacemgr/aspacemgr-bgq.c
==============================================================================
--- branches/VALGRIND_3_8_BRANCH_BGQ/coregrind/m_aspacemgr/aspacemgr-bgq.c (original)
+++ branches/VALGRIND_3_8_BRANCH_BGQ/coregrind/m_aspacemgr/aspacemgr-bgq.c Fri Aug 15 11:58:17 2014
@@ -122,7 +122,7 @@
/* ------ start of STATE for the address-space manager ------ */
-#define VG_N_BSEGMENTS 1000
+#define VG_N_BSEGMENTS 2000
static BSegment bsegs[VG_N_BSEGMENTS];
static Int bsegs_used = 0;
|
|
From: <sv...@va...> - 2014-08-15 11:57:40
|
Author: sewardj
Date: Fri Aug 15 11:57:30 2014
New Revision: 14284
Log:
bgq/cnk: Enable sys_access() and sys_readlink().
Modified:
branches/VALGRIND_3_8_BRANCH_BGQ/coregrind/m_syswrap/syswrap-ppc64-bgq.c
Modified: branches/VALGRIND_3_8_BRANCH_BGQ/coregrind/m_syswrap/syswrap-ppc64-bgq.c
==============================================================================
--- branches/VALGRIND_3_8_BRANCH_BGQ/coregrind/m_syswrap/syswrap-ppc64-bgq.c (original)
+++ branches/VALGRIND_3_8_BRANCH_BGQ/coregrind/m_syswrap/syswrap-ppc64-bgq.c Fri Aug 15 11:57:30 2014
@@ -1625,7 +1625,7 @@
//QQ LINX_(__NR_utime, sys_utime), // 30
//QQ// _____(__NR_stty, sys_stty), // 31
//QQ// _____(__NR_gtty, sys_gtty), // 32
-//QQ GENX_(__NR_access, sys_access), // 33
+ GENX_(__NR_access, sys_access), // 33
//QQ// _____(__NR_nice, sys_nice), // 34
//QQ
//QQ// _____(__NR_ftime, sys_ftime), // 35
@@ -1687,8 +1687,8 @@
//QQ// _____(__NR_select, sys_select), // 82
//QQ GENX_(__NR_symlink, sys_symlink), // 83
//QQ// _____(__NR_oldlstat, sys_oldlstat), // 84
-//QQ
-//QQ GENX_(__NR_readlink, sys_readlink), // 85
+
+ GENX_(__NR_readlink, sys_readlink), // 85
//QQ// _____(__NR_uselib, sys_uselib), // 86
//QQ// _____(__NR_swapon, sys_swapon), // 87
//QQ// _____(__NR_reboot, sys_reboot), // 88
|
|
From: <sv...@va...> - 2014-08-15 10:28:04
|
Author: philippe Date: Fri Aug 15 10:27:52 2014 New Revision: 14283 Log: fix 338160: Implement QGetTlsAddr query so that GDB+V gdbsrv can print __thread variables. To implement QGetTlsAddr, gdbsrv has to know how to get the glibc dtv address and the module id from the link_map. These 2 things are dependent on the internals of glibc. The dependency is mostly isolated in a few lines of arch dependent code or in an external utility that used a hack + -ldl lib to find the offset of the modid in the link_map structure. Tested on x86/amd64/ppc64/s390x. Somewhat tested on ppc32 and arm64. Untested/a few #ifdef-ed lines not compiled on arm/mips32/mips64 and darwin. For more background info about thread local storage handling, see 'ELF Handling For Thread-Local Storage' http://www.akkadia.org/drepper/tls.pdf Changes: * auxprogs/getoff.c new auxilliary program to get platform specific offsets (currently only the offset for the module id in struct link_map). * configure.ac : check for dlinfo(RTLD_DI_TLS_MODID) needed for getoff.c * new gdbserver_tests/hgtls, testing various types of __thread variables * various m_gdbserver files: - implement decoding of the QGetTlsAddr query - for each platform: platform specific code to get the dtv - call to external program getoff-<platform> the first time an __thread variable is printed. Added: trunk/auxprogs/getoff.c trunk/gdbserver_tests/hgtls.stderr.exp trunk/gdbserver_tests/hgtls.stderrB.exp trunk/gdbserver_tests/hgtls.stdinB.gdb trunk/gdbserver_tests/hgtls.stdoutB.exp trunk/gdbserver_tests/hgtls.vgtest Modified: trunk/NEWS trunk/auxprogs/Makefile.am trunk/configure.ac trunk/coregrind/m_gdbserver/server.c trunk/coregrind/m_gdbserver/target.c trunk/coregrind/m_gdbserver/target.h trunk/coregrind/m_gdbserver/valgrind-low-amd64.c trunk/coregrind/m_gdbserver/valgrind-low-arm.c trunk/coregrind/m_gdbserver/valgrind-low-arm64.c trunk/coregrind/m_gdbserver/valgrind-low-mips32.c trunk/coregrind/m_gdbserver/valgrind-low-mips64.c trunk/coregrind/m_gdbserver/valgrind-low-ppc32.c trunk/coregrind/m_gdbserver/valgrind-low-ppc64.c trunk/coregrind/m_gdbserver/valgrind-low-s390x.c trunk/coregrind/m_gdbserver/valgrind-low-x86.c trunk/coregrind/m_gdbserver/valgrind_low.h trunk/gdbserver_tests/Makefile.am trunk/none/tests/Makefile.am trunk/none/tests/tls.c Modified: trunk/NEWS ============================================================================== --- trunk/NEWS (original) +++ trunk/NEWS Fri Aug 15 10:27:52 2014 @@ -55,6 +55,8 @@ * New and modified GDB server monitor features: + - thread local variables/storage (__thread) can now be displayed. + - The GDB server monitor command 'v.info location <address>' outputs information about an address. The information produced depends on the tool and on the options given to valgrind. @@ -204,6 +206,7 @@ 337528 leak check heuristic for block prefixed by length as 64bit number 338024 inlined functions are not shown if DW_AT_ranges is used 338115 DRD: computed conflict set differs from actual after fork +338160 implement display of thread local storage in gdbsrv n-i-bz Fix KVM_CREATE_IRQCHIP ioctl handling n-i-bz s390x: Fix memory corruption for multithreaded applications n-i-bz vex arm->IR: allow PC as basereg in some LDRD cases Modified: trunk/auxprogs/Makefile.am ============================================================================== --- trunk/auxprogs/Makefile.am (original) +++ trunk/auxprogs/Makefile.am Fri Aug 15 10:27:52 2014 @@ -51,3 +51,44 @@ if VGCONF_PLATFORMS_INCLUDE_X86_DARWIN valgrind_di_server_LDFLAGS += -Wl,-read_only_relocs -Wl,suppress endif + +#---------------------------------------------------------------------------- +# getoff-<platform> +# Used to retrieve user space various offsets, using user space libraries. +#---------------------------------------------------------------------------- +noinst_PROGRAMS = getoff-@VGCONF_ARCH_PRI@-@VGCONF_OS@ +if VGCONF_HAVE_PLATFORM_SEC +noinst_PROGRAMS += getoff-@VGCONF_ARCH_SEC@-@VGCONF_OS@ +endif + +getoff_@VGCONF_ARCH_PRI@_@VGCONF_OS@_SOURCES = getoff.c +getoff_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CPPFLAGS = $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@) +getoff_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CFLAGS = $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@) +getoff_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CCASFLAGS = $(AM_CCASFLAGS_PRI) +getoff_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LDFLAGS = $(AM_CFLAGS_PRI) +if HAVE_DLINFO_RTLD_DI_TLS_MODID +getoff_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LDADD = $(LDADD) -ldl +endif + +if VGCONF_HAVE_PLATFORM_SEC +getoff_@VGCONF_ARCH_SEC@_@VGCONF_OS@_SOURCES = getoff.c +getoff_@VGCONF_ARCH_SEC@_@VGCONF_OS@_CPPFLAGS = $(AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@) +getoff_@VGCONF_ARCH_SEC@_@VGCONF_OS@_CFLAGS = $(AM_CFLAGS_@VGCONF_PLATFORM_SEC_CAPS@) +getoff_@VGCONF_ARCH_SEC@_@VGCONF_OS@_CCASFLAGS = $(AM_CCASFLAGS_SEC) +getoff_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LDFLAGS = $(AM_CFLAGS_SEC) +if HAVE_DLINFO_RTLD_DI_TLS_MODID +getoff_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LDADD = $(LDADD) -ldl +endif +endif + +#---------------------------------------------------------------------------- +# General stuff +#---------------------------------------------------------------------------- + +all-local: inplace-noinst_PROGRAMS inplace-noinst_DSYMS + +clean-local: clean-noinst_DSYMS + +install-exec-local: install-noinst_PROGRAMS install-noinst_DSYMS + +uninstall-local: uninstall-noinst_PROGRAMS uninstall-noinst_DSYMS Added: trunk/auxprogs/getoff.c ============================================================================== --- trunk/auxprogs/getoff.c (added) +++ trunk/auxprogs/getoff.c Fri Aug 15 10:27:52 2014 @@ -0,0 +1,139 @@ +#ifndef _GNU_SOURCE +#define _GNU_SOURCE +#endif +#include <config.h> + +#include <assert.h> +#include <errno.h> +#include <stdlib.h> +#include <stdio.h> +#include <string.h> + +#include <link.h> +#include <dlfcn.h> + +/* true if arg matches the provided option */ +static +int is_opt(char* arg, const char *option) +{ + int option_len = strlen(option); + if (option[option_len-1] == '=') + return (0 == strncmp(option, arg, option_len)); + else + return (0 == strcmp(option, arg)); +} + +static int verbose = 0; + +static +void usage (char* progname) +{ + fprintf(stderr, +"Usage: %s [--help] [-h] [-v] [-o <outputfile>]\n" +"Outputs various user space offsets\n" +"By default, outputs on stdout.\n" +"Use -o to output to <outputfile>\n" +"-v : be more verbose\n", +progname); + +} +/* Currently, only computes and output lm_modid_offset in struct link_map + of the dynamic linker. In theory, we should also compute the offset needed + to get the dtv from the thread register/pointer/... + Currently, the various valgrind-low-xxxxxx.c files are hardcoding this + offset as it is deemed (?) stable, and there is no clear way how to + compute this dtv offset. +*/ +int main (int argc, char** argv) +{ + int i; + FILE *outputfile; + int nr_errors = 0; + + outputfile = stdout; + + i = 1; + while (i < argc) { + if (is_opt(argv[i], "--help") || is_opt(argv[i], "-h")) { + usage(argv[0]); + exit(0); + } else if (is_opt(argv[i], "-v")) { + verbose++; + } else if (is_opt(argv[i], "-o")) { + if (i+1 == argc) { + fprintf(stderr, + "missing output file for -o option\n" + "Use --help for more information.\n"); + exit (1); + } + i++; + outputfile = fopen(argv[i], "w"); + if (outputfile == NULL) { + fprintf(stderr, "Could not fopen %s in write mode\n", argv[i]); + perror ("fopen output file failed"); + exit (1); + } + } else { + fprintf (stderr, + "unknown or invalid argument %s\n" + "Use --help for more information.\n", + argv[i]); + exit(1); + } + i++; + } + +#ifdef HAVE_DLINFO_RTLD_DI_TLS_MODID + /* Compute offset of lm_modid in struct link_map. + This is needed to support QGetTlsAddr gdbsrv query. + Computation is done using an ugly hack, but less ugly than + hardcoding the offset depending on the glibc version and + platform. + The below works, based the assumption that RTLD_DI_TLS_MODID + just access and returns directly the field in the dummy + link_map structure we have prepared. + + If glibc debug info is installed on your system, you can + also find this offset by doing in GDB: + p &((struct link_map*)0x0)->l_tls_modid + (see also coregrind/m_gdbserver/valgrind_low.h target_get_dtv + comments). + */ + { + #define MAX_LINKMAP_WORDS 10000 + size_t dummy_link_map[MAX_LINKMAP_WORDS]; + size_t off; + size_t modid_offset; + for (off = 0; off < MAX_LINKMAP_WORDS; off++) + dummy_link_map[off] = off; + if (dlinfo ((void*)dummy_link_map, RTLD_DI_TLS_MODID, + &modid_offset) == 0) { + assert(modid_offset >= 0 && modid_offset < MAX_LINKMAP_WORDS); + fprintf(outputfile, + "lm_modid_offset 0x%x\n", modid_offset*sizeof(size_t)); + } else { + fprintf(stderr, + "Error computing lm_modid_offset.\n" + "dlinfo error %s\n", dlerror()); + nr_errors++; + } + #undef MAX_LINKMAP_WORDS + } + + if (outputfile != stdout) + if (fclose (outputfile) != 0) { + perror ("fclose output file failed\n"); + nr_errors++; + } +#else + if (verbose) + fprintf(stderr, + "cannot compute lm_modid_offset.\n" + "configure did not define HAVE_DLINFO_RTLD_DI_TLS_MODID.\n"); +#endif + + if (nr_errors == 0) + exit(0); + else + exit(1); +} Modified: trunk/configure.ac ============================================================================== --- trunk/configure.ac (original) +++ trunk/configure.ac Fri Aug 15 10:27:52 2014 @@ -1449,6 +1449,37 @@ test x$ac_have_pthread_create_glibc_2_0 = xyes) +# Check for dlinfo RTLD_DI_TLS_MODID +AC_MSG_CHECKING([for dlinfo RTLD_DI_TLS_MODID]) + +safe_LIBS="$LIBS" +LIBS="-ldl" +AC_LINK_IFELSE([AC_LANG_PROGRAM([[ +#ifndef _GNU_SOURCE +#define _GNU_SOURCE +#endif +#include <link.h> +#include <dlfcn.h> +]], [[ + size_t sizes[10000]; + size_t modid_offset; + (void) dlinfo ((void*)sizes, RTLD_DI_TLS_MODID, &modid_offset); + return 0; +]])], [ +ac_have_dlinfo_rtld_di_tls_modid=yes +AC_MSG_RESULT([yes]) +AC_DEFINE([HAVE_DLINFO_RTLD_DI_TLS_MODID], 1, + [Define to 1 if you have a dlinfo that can do RTLD_DI_TLS_MODID.]) +], [ +ac_have_dlinfo_rtld_di_tls_modid=no +AC_MSG_RESULT([no]) +]) +LIBS=$safe_LIBS + +AM_CONDITIONAL(HAVE_DLINFO_RTLD_DI_TLS_MODID, + test x$ac_have_dlinfo_rtld_di_tls_modid = xyes) + + # Check for eventfd_t, eventfd() and eventfd_read() AC_MSG_CHECKING([for eventfd()]) Modified: trunk/coregrind/m_gdbserver/server.c ============================================================================== --- trunk/coregrind/m_gdbserver/server.c (original) +++ trunk/coregrind/m_gdbserver/server.c Fri Aug 15 10:27:52 2014 @@ -649,6 +649,45 @@ { static struct inferior_list_entry *thread_ptr; + /* thread local storage query */ + if (strncmp ("qGetTLSAddr:", arg_own_buf, 12) == 0) { + char *from, *to; + char *end = arg_own_buf + strlen(arg_own_buf); + unsigned long gdb_id; + CORE_ADDR lm; + CORE_ADDR offset; + struct thread_info *ti; + + from = arg_own_buf + 12; + to = strchr(from, ','); + *to = 0; + gdb_id = strtoul (from, NULL, 16); + from = to + 1; + to = strchr(from, ','); + decode_address (&offset, from, to - from); + from = to + 1; + to = end; + decode_address (&lm, from, to - from); + dlog(2, "qGetTLSAddr thread %lu offset %p lm %p\n", + gdb_id, (void*)offset, (void*)lm); + + ti = gdb_id_to_thread (gdb_id); + if (ti != NULL) { + ThreadState *tst; + Addr tls_addr; + + tst = (ThreadState *) inferior_target_data (ti); + if (valgrind_get_tls_addr(tst, offset, lm, &tls_addr)) { + VG_(sprintf) (arg_own_buf, "%lx", tls_addr); + return; + } + // else we will report we do not support qGetTLSAddr + } else { + write_enn (arg_own_buf); + return; + } + } + /* qRcmd, monitor command handling. */ if (strncmp ("qRcmd,", arg_own_buf, 6) == 0) { char *p = arg_own_buf + 6; @@ -706,7 +745,7 @@ return; } } - + if (strcmp ("qAttached", arg_own_buf) == 0) { /* tell gdb to always detach, never kill the process */ arg_own_buf[0] = '1'; Modified: trunk/coregrind/m_gdbserver/target.c ============================================================================== --- trunk/coregrind/m_gdbserver/target.c (original) +++ trunk/coregrind/m_gdbserver/target.c Fri Aug 15 10:27:52 2014 @@ -547,6 +547,144 @@ return valgrind_point (/* insert*/ False, type, addr, len); } +/* Returns the (platform specific) offset of lm_modid field in the link map + struct. + Stores the offset in *result and returns True if offset can be determined. + Returns False otherwise. *result is not to be used then. */ +static Bool getplatformoffset (SizeT *result) +{ + static Bool getplatformoffset_called = False; + + static Bool lm_modid_offset_found = False; + static SizeT lm_modid_offset = 1<<31; // Rubbish initial value. + // lm_modid_offset is a magic offset, retrieved using an external program. + + if (!getplatformoffset_called) { + const HChar *platform = VG_PLATFORM; + const HChar *cmdformat = "%s/%s-%s -o %s"; + const HChar *getoff = "getoff"; + HChar outfile[VG_(mkstemp_fullname_bufsz) (VG_(strlen)(getoff))]; + Int fd = VG_(mkstemp) (getoff, outfile); + HChar cmd[ VG_(strlen)(cmdformat) + + VG_(strlen)(VG_(libdir)) - 2 + + VG_(strlen)(getoff) - 2 + + VG_(strlen)(platform) - 2 + + VG_(strlen)(outfile) - 2 + + 1]; + UInt cmdlen; + struct vg_stat stat_buf; + Int ret; + + cmdlen = VG_(snprintf)(cmd, sizeof(cmd), + cmdformat, + VG_(libdir), getoff, platform, outfile); + vg_assert (cmdlen == sizeof(cmd) - 1); + ret = VG_(system) (cmd); + if (ret != 0 || VG_(debugLog_getLevel)() >= 1) + VG_(dmsg) ("command %s exit code %d\n", cmd, ret); + ret = VG_(fstat)( fd, &stat_buf ); + if (ret != 0) + VG_(dmsg) ("error VG_(fstat) %d %s\n", fd, outfile); + else { + HChar *w; + HChar *ssaveptr; + HChar *os; + HChar *str; + HChar *endptr; + + os = malloc (stat_buf.size+1); + vg_assert (os); + ret = VG_(read)(fd, os, stat_buf.size); + vg_assert(ret == stat_buf.size); + os[ret] = '\0'; + str = os; + while ((w = VG_(strtok_r)(str, " \n", &ssaveptr)) != NULL) { + if (VG_(strcmp) (w, "lm_modid_offset") == 0) { + w = VG_(strtok_r)(NULL, " \n", &ssaveptr); + lm_modid_offset = (SizeT) VG_(strtoull16) ( w, &endptr ); + if (endptr == w) + VG_(dmsg) ("%s lm_modid_offset unexpected hex value %s\n", + cmd, w); + else + lm_modid_offset_found = True; + } else { + VG_(dmsg) ("%s produced unexpected %s\n", cmd, w); + } + str = NULL; // ensure next VG_(strtok_r) continues the parsing. + } + VG_(free) (os); + } + + VG_(close)(fd); + ret = VG_(unlink)( outfile ); + if (ret != 0) + VG_(umsg) ("error: could not unlink %s\n", outfile); + getplatformoffset_called = True; + } + + *result = lm_modid_offset; + return lm_modid_offset_found; +} + +Bool valgrind_get_tls_addr (ThreadState *tst, + CORE_ADDR offset, + CORE_ADDR lm, + CORE_ADDR *tls_addr) +{ + CORE_ADDR **dtv_loc; + CORE_ADDR *dtv; + SizeT lm_modid_offset; + unsigned long int modid; + +#define CHECK_DEREF(addr, len, name) \ + if (!VG_(am_is_valid_for_client) ((Addr)(addr), (len), VKI_PROT_READ)) { \ + dlog(0, "get_tls_addr: %s at %p len %lu not addressable\n", \ + name, (void*)(addr), (unsigned long)(len)); \ + return False; \ + } + + *tls_addr = 0; + + if (the_low_target.target_get_dtv == NULL) { + dlog(1, "low level dtv support not available\n"); + return False; + } + + if (!getplatformoffset (&lm_modid_offset)) { + dlog(0, "link_map modid field offset not available\n"); + return False; + } + dlog (2, "link_map modid offset %p\n", (void*)lm_modid_offset); + vg_assert (lm_modid_offset < 0x10000); // let's say + + dtv_loc = (*the_low_target.target_get_dtv)(tst); + if (dtv_loc == NULL) { + dlog(0, "low level dtv support returned NULL\n"); + return False; + } + + CHECK_DEREF(dtv_loc, sizeof(CORE_ADDR), "dtv_loc"); + dtv = *dtv_loc; + + // Check we can read at least 2 address at the beginning of dtv. + CHECK_DEREF(dtv, 2*sizeof(CORE_ADDR), "dtv 2 first entries"); + dlog (2, "tid %d dtv %p\n", tst->tid, (void*)dtv); + + // Check we can read the modid + CHECK_DEREF(lm+lm_modid_offset, sizeof(unsigned long int), "link_map modid"); + modid = *(unsigned long int *)(lm+lm_modid_offset); + + // Check we can access the dtv entry for modid + CHECK_DEREF(dtv + 2 * modid, sizeof(CORE_ADDR), "dtv[2*modid]"); + + // And finally compute the address of the tls variable. + *tls_addr = *(dtv + 2 * modid) + offset; + + return True; + +#undef CHECK_DEREF +} + /* returns a pointer to the architecture state corresponding to the provided register set: 0 => normal guest registers, 1 => shadow1 Modified: trunk/coregrind/m_gdbserver/target.h ============================================================================== --- trunk/coregrind/m_gdbserver/target.h (original) +++ trunk/coregrind/m_gdbserver/target.h Fri Aug 15 10:27:52 2014 @@ -200,11 +200,29 @@ extern int valgrind_insert_watchpoint (char type, CORE_ADDR addr, int len); extern int valgrind_remove_watchpoint (char type, CORE_ADDR addr, int len); +/* Get the address of a thread local variable. + 'tst' is the thread for which thread local address is searched for. + 'offset' is the offset of the variable in the tls data of the load + module identified by 'lm'. + 'lm' is the link_map address of the loaded module : it is the address + of the data structure used by the dynamic linker to maintain various + information about a loaded object. + + Returns True if the address of the variable could be found. + *tls_addr is then set to this address. + Returns False if tls support is not available for this arch, or + if an error occured. *tls_addr is set to NULL. */ +extern Bool valgrind_get_tls_addr (ThreadState *tst, + CORE_ADDR offset, + CORE_ADDR lm, + CORE_ADDR *tls_addr); + /* -------------------------------------------------------------------------- */ /* ----------- Utils functions for low level arch specific files ------------ */ /* -------------------------------------------------------------------------- */ + /* returns a pointer to the architecture state corresponding to the provided register set: 0 => normal guest registers, 1 => shadow1 Modified: trunk/coregrind/m_gdbserver/valgrind-low-amd64.c ============================================================================== --- trunk/coregrind/m_gdbserver/valgrind-low-amd64.c (original) +++ trunk/coregrind/m_gdbserver/valgrind-low-amd64.c Fri Aug 15 10:27:52 2014 @@ -315,6 +315,7 @@ VG_(machine_get_VexArchInfo) (&va, &vai); return (vai.hwcaps & VEX_HWCAPS_AMD64_AVX ? True : False); } + static const char* target_xml (Bool shadow_mode) { @@ -345,6 +346,15 @@ } } +static CORE_ADDR** target_get_dtv (ThreadState *tst) +{ +#if defined(VGA_amd64) + return (CORE_ADDR**)(tst->arch.vex.guest_FS_ZERO + 0x8); +#else + vg_assert(0); +#endif +} + static struct valgrind_target_ops low_target = { -1, // Must be computed at init time. regs, @@ -353,7 +363,8 @@ get_pc, set_pc, "amd64", - target_xml + target_xml, + target_get_dtv }; void amd64_init_architecture (struct valgrind_target_ops *target) Modified: trunk/coregrind/m_gdbserver/valgrind-low-arm.c ============================================================================== --- trunk/coregrind/m_gdbserver/valgrind-low-arm.c (original) +++ trunk/coregrind/m_gdbserver/valgrind-low-arm.c Fri Aug 15 10:27:52 2014 @@ -286,6 +286,16 @@ } } +static CORE_ADDR** target_get_dtv (ThreadState *tst) +{ +#if defined(VGA_arm) + // arm dtv is pointed to by TPIDRURO + return (CORE_ADDR**)(tst->arch.vex.guest_TPIDRURO); +#else + vg_assert(0); +#endif +} + static struct valgrind_target_ops low_target = { num_regs, regs, @@ -294,7 +304,8 @@ get_pc, set_pc, "arm", - target_xml + target_xml, + target_get_dtv }; void arm_init_architecture (struct valgrind_target_ops *target) Modified: trunk/coregrind/m_gdbserver/valgrind-low-arm64.c ============================================================================== --- trunk/coregrind/m_gdbserver/valgrind-low-arm64.c (original) +++ trunk/coregrind/m_gdbserver/valgrind-low-arm64.c Fri Aug 15 10:27:52 2014 @@ -261,6 +261,16 @@ #endif } +static CORE_ADDR** target_get_dtv (ThreadState *tst) +{ +#if defined(VGA_arm64) + // arm64 dtv is pointed to by TPIDR_EL0. + return (CORE_ADDR**)(tst->arch.vex.guest_TPIDR_EL0); +#else + vg_assert(0); +#endif +} + static struct valgrind_target_ops low_target = { num_regs, regs, @@ -269,7 +279,8 @@ get_pc, set_pc, "arm64", - target_xml + target_xml, + target_get_dtv }; void arm64_init_architecture (struct valgrind_target_ops *target) Modified: trunk/coregrind/m_gdbserver/valgrind-low-mips32.c ============================================================================== --- trunk/coregrind/m_gdbserver/valgrind-low-mips32.c (original) +++ trunk/coregrind/m_gdbserver/valgrind-low-mips32.c Fri Aug 15 10:27:52 2014 @@ -354,6 +354,16 @@ } } +static CORE_ADDR** target_get_dtv (ThreadState *tst) +{ +#if defined(VGA_mips32) + // mips32 dtv location similar to ppc64 + return (CORE_ADDR**)(tst->arch.vex.guest_ULR - 0x7000 - sizeof(CORE_ADDR)); +#else + vg_assert(0); +#endif +} + static struct valgrind_target_ops low_target = { num_regs, regs, @@ -362,7 +372,8 @@ get_pc, set_pc, "mips", - target_xml + target_xml, + target_get_dtv }; void mips32_init_architecture (struct valgrind_target_ops *target) Modified: trunk/coregrind/m_gdbserver/valgrind-low-mips64.c ============================================================================== --- trunk/coregrind/m_gdbserver/valgrind-low-mips64.c (original) +++ trunk/coregrind/m_gdbserver/valgrind-low-mips64.c Fri Aug 15 10:27:52 2014 @@ -355,6 +355,17 @@ } } +static CORE_ADDR** target_get_dtv (ThreadState *tst) +{ +#if defined(VGA_mips64) + // mips64 dtv location similar to ppc64 + return (CORE_ADDR**)(tst->arch.vex.guest_ULR - 0x7000 - sizeof(CORE_ADDR)); + return NULL; +#else + vg_assert(0); +#endif +} + static struct valgrind_target_ops low_target = { num_regs, regs, @@ -363,7 +374,8 @@ get_pc, set_pc, "mips64", - target_xml + target_xml, + target_get_dtv }; void mips64_init_architecture (struct valgrind_target_ops *target) Modified: trunk/coregrind/m_gdbserver/valgrind-low-ppc32.c ============================================================================== --- trunk/coregrind/m_gdbserver/valgrind-low-ppc32.c (original) +++ trunk/coregrind/m_gdbserver/valgrind-low-ppc32.c Fri Aug 15 10:27:52 2014 @@ -332,6 +332,17 @@ } } +static CORE_ADDR** target_get_dtv (ThreadState *tst) +{ +#if defined(VGA_ppc32) + // ppc32 dtv is located just before the tcb, which is 0x7000 before + // the thread id (r2) + return (CORE_ADDR**)(tst->arch.vex.guest_GPR2 - 0x7000 - sizeof(CORE_ADDR)); +#else + vg_assert(0); +#endif +} + static struct valgrind_target_ops low_target = { num_regs, regs, @@ -340,7 +351,8 @@ get_pc, set_pc, "ppc32", - target_xml + target_xml, + target_get_dtv }; void ppc32_init_architecture (struct valgrind_target_ops *target) Modified: trunk/coregrind/m_gdbserver/valgrind-low-ppc64.c ============================================================================== --- trunk/coregrind/m_gdbserver/valgrind-low-ppc64.c (original) +++ trunk/coregrind/m_gdbserver/valgrind-low-ppc64.c Fri Aug 15 10:27:52 2014 @@ -329,6 +329,17 @@ } } +static CORE_ADDR** target_get_dtv (ThreadState *tst) +{ +#if defined(VGA_ppc64be) || defined(VGA_ppc64le) + // ppc64 dtv is located just before the tcb, which is 0x7000 before + // the thread id (r13) + return (CORE_ADDR**)(tst->arch.vex.guest_GPR13 - 0x7000 - sizeof(CORE_ADDR)); +#else + vg_assert(0); +#endif +} + static struct valgrind_target_ops low_target = { num_regs, regs, @@ -337,7 +348,8 @@ get_pc, set_pc, "ppc64", - target_xml + target_xml, + target_get_dtv }; void ppc64_init_architecture (struct valgrind_target_ops *target) Modified: trunk/coregrind/m_gdbserver/valgrind-low-s390x.c ============================================================================== --- trunk/coregrind/m_gdbserver/valgrind-low-s390x.c (original) +++ trunk/coregrind/m_gdbserver/valgrind-low-s390x.c Fri Aug 15 10:27:52 2014 @@ -197,6 +197,18 @@ } } +static CORE_ADDR** target_get_dtv (ThreadState *tst) +{ +#if defined(VGA_s390x) + // Thread pointer is in a0 (high 32 bits) and a1. Dtv is the second word. + return (CORE_ADDR**)(((CORE_ADDR)tst->arch.vex.guest_a0 << 32 + | (CORE_ADDR)tst->arch.vex.guest_a1) + + sizeof(CORE_ADDR)); +#else + vg_assert(0); +#endif +} + static struct valgrind_target_ops low_target = { num_regs, regs, @@ -205,7 +217,8 @@ get_pc, set_pc, "s390x", - target_xml + target_xml, + target_get_dtv }; void s390x_init_architecture (struct valgrind_target_ops *target) Modified: trunk/coregrind/m_gdbserver/valgrind-low-x86.c ============================================================================== --- trunk/coregrind/m_gdbserver/valgrind-low-x86.c (original) +++ trunk/coregrind/m_gdbserver/valgrind-low-x86.c Fri Aug 15 10:27:52 2014 @@ -257,6 +257,29 @@ } } +static CORE_ADDR** target_get_dtv (ThreadState *tst) +{ +#if defined(VGA_x86) + // FIXME: should make the below formally visible from VEX. + extern ULong x86g_use_seg_selector ( HWord ldt, HWord gdt, + UInt seg_selector, UInt virtual_addr ); + + ULong dtv_loc_g = x86g_use_seg_selector (tst->arch.vex.guest_LDT, + tst->arch.vex.guest_GDT, + tst->arch.vex.guest_GS, + 0x4); + if (dtv_loc_g == 1ULL << 32) { + dlog(0, "Error getting x86 dtv\n"); + return NULL; + } else { + CORE_ADDR dtv_loc = dtv_loc_g; + return (CORE_ADDR**)dtv_loc; + } +#else + vg_assert(0); +#endif +} + static struct valgrind_target_ops low_target = { num_regs, regs, @@ -265,7 +288,8 @@ get_pc, set_pc, "i386", - target_xml + target_xml, + target_get_dtv }; void x86_init_architecture (struct valgrind_target_ops *target) Modified: trunk/coregrind/m_gdbserver/valgrind_low.h ============================================================================== --- trunk/coregrind/m_gdbserver/valgrind_low.h (original) +++ trunk/coregrind/m_gdbserver/valgrind_low.h Fri Aug 15 10:27:52 2014 @@ -68,6 +68,34 @@ Returns NULL if there is no target xml file*/ const char* (*target_xml) (Bool shadow_mode); + /* Returns the address in the thread control block where dtv is found. + Return NULL if an error occurs or no support for tls/dtv is available. + Note that the addressability of the returned result has not been + verified. In other words, target_get_dtv just adds some magic + offset to the arch specific thread register or thread pointer or ... + + The implementation of this is of course depending on the arch + but also depends on the way pthread lib arranges its data. + For background info about tls handling, read + 'ELF Handling For Thread-Local Storage' + http://www.akkadia.org/drepper/tls.pdf + (slightly obsolete e.g. the size of a dtv entry is 2 words now). + The reference is the glibc source, in particular the arch specific + file tls.h. + + For platforms where the dtv is located in the tcb, the magic offset + to add to the thread pointer/register/... can be found by doing: + cd none/tests + gdb ./tls + set debug-file-directory /usr/lib/debug # or equivalent + start + p &((struct pthread*)0x0)->header.dtv + Currently the dtv offset is hardcoded, based on the assumption + that this is relatively stable. If that would be false, then + getoff-<platform> should be modified to output this offset e.g. + depending on the glibc version. */ + CORE_ADDR** (*target_get_dtv)(ThreadState *tst); + }; extern void x86_init_architecture (struct valgrind_target_ops *target); Modified: trunk/gdbserver_tests/Makefile.am ============================================================================== --- trunk/gdbserver_tests/Makefile.am (original) +++ trunk/gdbserver_tests/Makefile.am Fri Aug 15 10:27:52 2014 @@ -14,6 +14,11 @@ hginfo.stdinB.gdb \ hginfo.stdoutB.exp \ hginfo.vgtest \ + hgtls.stderrB.exp \ + hgtls.stderr.exp \ + hgtls.stdinB.gdb \ + hgtls.stdoutB.exp \ + hgtls.vgtest \ mcblocklistsearch.stderr.exp \ mcblocklistsearch.stdinB.gdb \ mcblocklistsearch.vgtest \ Added: trunk/gdbserver_tests/hgtls.stderr.exp ============================================================================== (empty) Added: trunk/gdbserver_tests/hgtls.stderrB.exp ============================================================================== (empty) Added: trunk/gdbserver_tests/hgtls.stdinB.gdb ============================================================================== --- trunk/gdbserver_tests/hgtls.stdinB.gdb (added) +++ trunk/gdbserver_tests/hgtls.stdinB.gdb Fri Aug 15 10:27:52 2014 @@ -0,0 +1,37 @@ +# connect gdb to Valgrind gdbserver: +target remote | ./vgdb --wait=60 --vgdb-prefix=./vgdb-prefix-hgtls +echo vgdb launched process attached\n +monitor v.set vgdb-error 999999 +# +# +# insert break: +break tls.c:55 +command +set $tls_ip = main +if test == &tests[0] + set $tls_ip = &race +end +if test == &tests[1] + set $tls_ip = &local +end +if test == &tests[2] + set $tls_ip = &global +end +if test == &tests[3] + set $tls_ip = &static_extern +end +if test == &tests[4] + set $tls_ip = &so_extern +end +if test == &tests[5] + set $tls_ip = &so_local +end +if test == &tests[6] + set $tls_ip = &global +end +printf "test %s tls_ip %p ip %p equal %d\n", test->name, $tls_ip, ip, $tls_ip == ip +continue +end +# continue till the end +continue +quit Added: trunk/gdbserver_tests/hgtls.stdoutB.exp ============================================================================== --- trunk/gdbserver_tests/hgtls.stdoutB.exp (added) +++ trunk/gdbserver_tests/hgtls.stdoutB.exp Fri Aug 15 10:27:52 2014 @@ -0,0 +1,59 @@ +Breakpoint 1 at 0x........: file tls.c, line 55. +Continuing. +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests>) at tls.c:55 +55 int here = 0; +test race tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests>) at tls.c:55 +55 int here = 0; +test race tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests+16>) at tls.c:55 +55 int here = 0; +test local tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests+16>) at tls.c:55 +55 int here = 0; +test local tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests+32>) at tls.c:55 +55 int here = 0; +test global tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests+32>) at tls.c:55 +55 int here = 0; +test global tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests+48>) at tls.c:55 +55 int here = 0; +test static_extern tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests+48>) at tls.c:55 +55 int here = 0; +test static_extern tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests+64>) at tls.c:55 +55 int here = 0; +test so_extern tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests+64>) at tls.c:55 +55 int here = 0; +test so_extern tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests+80>) at tls.c:55 +55 int here = 0; +test so_local tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests+80>) at tls.c:55 +55 int here = 0; +test so_local tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests+96>) at tls.c:55 +55 int here = 0; +test so_global tls_ip 0x........ ip 0x........ equal 1 +[New Thread ....] +Breakpoint 1, tls_ptr (p=0x........ <tests+96>) at tls.c:55 +55 int here = 0; +test so_global tls_ip 0x........ ip 0x........ equal 1 +Program exited normally. Added: trunk/gdbserver_tests/hgtls.vgtest ============================================================================== --- trunk/gdbserver_tests/hgtls.vgtest (added) +++ trunk/gdbserver_tests/hgtls.vgtest Fri Aug 15 10:27:52 2014 @@ -0,0 +1,12 @@ +# test tls addresses +prog: ../none/tests/tls +vgopts: --tool=helgrind --vgdb=yes --vgdb-error=0 --vgdb-prefix=./vgdb-prefix-hgtls -q +prereq: test -e ../none/tests/tls +stdout_filter: filter_make_empty +stderr_filter: filter_make_empty +progB: gdb +argsB: --quiet -l 60 --nx ../none/tests/tls +stdinB: hgtls.stdinB.gdb +stdoutB_filter: filter_gdb +stderrB_filter: filter_make_empty +# stderrB_filter_args: hg01_all_ok.c Modified: trunk/none/tests/Makefile.am ============================================================================== --- trunk/none/tests/Makefile.am (original) +++ trunk/none/tests/Makefile.am Fri Aug 15 10:27:52 2014 @@ -277,7 +277,7 @@ threadederrno_LDADD = -lpthread tls_SOURCES = tls.c tls2.c tls_DEPENDENCIES = tls.so tls2.so -tls_LDFLAGS = -Wl,-rpath,$(top_builddir)/none/tests +tls_LDFLAGS = -Wl,-rpath,$(abs_top_builddir)/none/tests tls_LDADD = tls.so tls2.so -lpthread tls_so_SOURCES = tls_so.c tls_so_DEPENDENCIES = tls2.so @@ -285,7 +285,7 @@ tls_so_LDFLAGS = -dynamic -dynamiclib -all_load -fpic tls_so_LDADD = `pwd`/tls2.so else - tls_so_LDFLAGS = -Wl,-rpath,$(top_builddir)/none/tests -shared -fPIC + tls_so_LDFLAGS = -Wl,-rpath,$(abs_top_builddir)/none/tests -shared -fPIC tls_so_LDADD = tls2.so endif tls_so_CFLAGS = $(AM_CFLAGS) -fPIC Modified: trunk/none/tests/tls.c ============================================================================== --- trunk/none/tests/tls.c (original) +++ trunk/none/tests/tls.c Fri Aug 15 10:27:52 2014 @@ -46,8 +46,8 @@ struct testcase { const char *name; func_t func; + char pad[2 * (8 - sizeof(void*))]; }; - static void *tls_ptr(void *p) { struct testcase *test = (struct testcase *)p; |
|
From: <sv...@va...> - 2014-08-15 09:29:48
|
Author: sewardj
Date: Fri Aug 15 09:29:36 2014
New Revision: 2925
Log:
No functional change. Remove commented out code copied from the
arm32 port, which is never going to get used.
Modified:
trunk/priv/host_arm64_defs.c
trunk/priv/host_arm64_isel.c
Modified: trunk/priv/host_arm64_defs.c
==============================================================================
--- trunk/priv/host_arm64_defs.c (original)
+++ trunk/priv/host_arm64_defs.c Fri Aug 15 09:29:36 2014
@@ -89,7 +89,6 @@
HReg hregARM64_X5 ( void ) { return mkHReg(5, HRcInt64, False); }
HReg hregARM64_X6 ( void ) { return mkHReg(6, HRcInt64, False); }
HReg hregARM64_X7 ( void ) { return mkHReg(7, HRcInt64, False); }
-//ZZ HReg hregARM_R8 ( void ) { return mkHReg(8, HRcInt32, False); }
HReg hregARM64_X9 ( void ) { return mkHReg(9, HRcInt64, False); }
HReg hregARM64_X10 ( void ) { return mkHReg(10, HRcInt64, False); }
HReg hregARM64_X11 ( void ) { return mkHReg(11, HRcInt64, False); }
@@ -114,21 +113,11 @@
HReg hregARM64_D11 ( void ) { return mkHReg(11, HRcFlt64, False); }
HReg hregARM64_D12 ( void ) { return mkHReg(12, HRcFlt64, False); }
HReg hregARM64_D13 ( void ) { return mkHReg(13, HRcFlt64, False); }
-//ZZ HReg hregARM_S26 ( void ) { return mkHReg(26, HRcFlt32, False); }
-//ZZ HReg hregARM_S27 ( void ) { return mkHReg(27, HRcFlt32, False); }
-//ZZ HReg hregARM_S28 ( void ) { return mkHReg(28, HRcFlt32, False); }
-//ZZ HReg hregARM_S29 ( void ) { return mkHReg(29, HRcFlt32, False); }
-//ZZ HReg hregARM_S30 ( void ) { return mkHReg(30, HRcFlt32, False); }
HReg hregARM64_Q16 ( void ) { return mkHReg(16, HRcVec128, False); }
HReg hregARM64_Q17 ( void ) { return mkHReg(17, HRcVec128, False); }
HReg hregARM64_Q18 ( void ) { return mkHReg(18, HRcVec128, False); }
HReg hregARM64_Q19 ( void ) { return mkHReg(19, HRcVec128, False); }
HReg hregARM64_Q20 ( void ) { return mkHReg(20, HRcVec128, False); }
-//ZZ HReg hregARM_Q11 ( void ) { return mkHReg(11, HRcVec128, False); }
-//ZZ HReg hregARM_Q12 ( void ) { return mkHReg(12, HRcVec128, False); }
-//ZZ HReg hregARM_Q13 ( void ) { return mkHReg(13, HRcVec128, False); }
-//ZZ HReg hregARM_Q14 ( void ) { return mkHReg(14, HRcVec128, False); }
-//ZZ HReg hregARM_Q15 ( void ) { return mkHReg(15, HRcVec128, False); }
void getAllocableRegs_ARM64 ( Int* nregs, HReg** arr )
{
@@ -322,148 +311,6 @@
}
-//ZZ /* --------- Mem AModes: Addressing Mode 2 --------- */
-//ZZ
-//ZZ ARMAMode2* ARMAMode2_RI ( HReg reg, Int simm9 ) {
-//ZZ ARMAMode2* am = LibVEX_Alloc(sizeof(ARMAMode2));
-//ZZ am->tag = ARMam2_RI;
-//ZZ am->ARMam2.RI.reg = reg;
-//ZZ am->ARMam2.RI.simm9 = simm9;
-//ZZ vassert(-255 <= simm9 && simm9 <= 255);
-//ZZ return am;
-//ZZ }
-//ZZ ARMAMode2* ARMAMode2_RR ( HReg base, HReg index ) {
-//ZZ ARMAMode2* am = LibVEX_Alloc(sizeof(ARMAMode2));
-//ZZ am->tag = ARMam2_RR;
-//ZZ am->ARMam2.RR.base = base;
-//ZZ am->ARMam2.RR.index = index;
-//ZZ return am;
-//ZZ }
-//ZZ
-//ZZ void ppARMAMode2 ( ARMAMode2* am ) {
-//ZZ switch (am->tag) {
-//ZZ case ARMam2_RI:
-//ZZ vex_printf("%d(", am->ARMam2.RI.simm9);
-//ZZ ppHRegARM(am->ARMam2.RI.reg);
-//ZZ vex_printf(")");
-//ZZ break;
-//ZZ case ARMam2_RR:
-//ZZ vex_printf("(");
-//ZZ ppHRegARM(am->ARMam2.RR.base);
-//ZZ vex_printf(",");
-//ZZ ppHRegARM(am->ARMam2.RR.index);
-//ZZ vex_printf(")");
-//ZZ break;
-//ZZ default:
-//ZZ vassert(0);
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ static void addRegUsage_ARMAMode2 ( HRegUsage* u, ARMAMode2* am ) {
-//ZZ switch (am->tag) {
-//ZZ case ARMam2_RI:
-//ZZ addHRegUse(u, HRmRead, am->ARMam2.RI.reg);
-//ZZ return;
-//ZZ case ARMam2_RR:
-//ZZ // addHRegUse(u, HRmRead, am->ARMam2.RR.base);
-//ZZ // addHRegUse(u, HRmRead, am->ARMam2.RR.index);
-//ZZ // return;
-//ZZ default:
-//ZZ vpanic("addRegUsage_ARMAmode2");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ static void mapRegs_ARMAMode2 ( HRegRemap* m, ARMAMode2* am ) {
-//ZZ switch (am->tag) {
-//ZZ case ARMam2_RI:
-//ZZ am->ARMam2.RI.reg = lookupHRegRemap(m, am->ARMam2.RI.reg);
-//ZZ return;
-//ZZ case ARMam2_RR:
-//ZZ //am->ARMam2.RR.base =lookupHRegRemap(m, am->ARMam2.RR.base);
-//ZZ //am->ARMam2.RR.index = lookupHRegRemap(m, am->ARMam2.RR.index);
-//ZZ //return;
-//ZZ default:
-//ZZ vpanic("mapRegs_ARMAmode2");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ
-//ZZ /* --------- Mem AModes: Addressing Mode VFP --------- */
-//ZZ
-//ZZ ARMAModeV* mkARMAModeV ( HReg reg, Int simm11 ) {
-//ZZ ARMAModeV* am = LibVEX_Alloc(sizeof(ARMAModeV));
-//ZZ vassert(simm11 >= -1020 && simm11 <= 1020);
-//ZZ vassert(0 == (simm11 & 3));
-//ZZ am->reg = reg;
-//ZZ am->simm11 = simm11;
-//ZZ return am;
-//ZZ }
-//ZZ
-//ZZ void ppARMAModeV ( ARMAModeV* am ) {
-//ZZ vex_printf("%d(", am->simm11);
-//ZZ ppHRegARM(am->reg);
-//ZZ vex_printf(")");
-//ZZ }
-//ZZ
-//ZZ static void addRegUsage_ARMAModeV ( HRegUsage* u, ARMAModeV* am ) {
-//ZZ addHRegUse(u, HRmRead, am->reg);
-//ZZ }
-//ZZ
-//ZZ static void mapRegs_ARMAModeV ( HRegRemap* m, ARMAModeV* am ) {
-//ZZ am->reg = lookupHRegRemap(m, am->reg);
-//ZZ }
-//ZZ
-//ZZ
-//ZZ /* --------- Mem AModes: Addressing Mode Neon ------- */
-//ZZ
-//ZZ ARMAModeN *mkARMAModeN_RR ( HReg rN, HReg rM ) {
-//ZZ ARMAModeN* am = LibVEX_Alloc(sizeof(ARMAModeN));
-//ZZ am->tag = ARMamN_RR;
-//ZZ am->ARMamN.RR.rN = rN;
-//ZZ am->ARMamN.RR.rM = rM;
-//ZZ return am;
-//ZZ }
-//ZZ
-//ZZ ARMAModeN *mkARMAModeN_R ( HReg rN ) {
-//ZZ ARMAModeN* am = LibVEX_Alloc(sizeof(ARMAModeN));
-//ZZ am->tag = ARMamN_R;
-//ZZ am->ARMamN.R.rN = rN;
-//ZZ return am;
-//ZZ }
-//ZZ
-//ZZ static void addRegUsage_ARMAModeN ( HRegUsage* u, ARMAModeN* am ) {
-//ZZ if (am->tag == ARMamN_R) {
-//ZZ addHRegUse(u, HRmRead, am->ARMamN.R.rN);
-//ZZ } else {
-//ZZ addHRegUse(u, HRmRead, am->ARMamN.RR.rN);
-//ZZ addHRegUse(u, HRmRead, am->ARMamN.RR.rM);
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ static void mapRegs_ARMAModeN ( HRegRemap* m, ARMAModeN* am ) {
-//ZZ if (am->tag == ARMamN_R) {
-//ZZ am->ARMamN.R.rN = lookupHRegRemap(m, am->ARMamN.R.rN);
-//ZZ } else {
-//ZZ am->ARMamN.RR.rN = lookupHRegRemap(m, am->ARMamN.RR.rN);
-//ZZ am->ARMamN.RR.rM = lookupHRegRemap(m, am->ARMamN.RR.rM);
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ void ppARMAModeN ( ARMAModeN* am ) {
-//ZZ vex_printf("[");
-//ZZ if (am->tag == ARMamN_R) {
-//ZZ ppHRegARM(am->ARMamN.R.rN);
-//ZZ } else {
-//ZZ ppHRegARM(am->ARMamN.RR.rN);
-//ZZ }
-//ZZ vex_printf("]");
-//ZZ if (am->tag == ARMamN_RR) {
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(am->ARMamN.RR.rM);
-//ZZ }
-//ZZ }
-
-
/* --------- Reg or uimm12<<{0,12} operands --------- */
ARM64RIA* ARM64RIA_I12 ( UShort imm12, UChar shift ) {
@@ -636,138 +483,6 @@
}
-//ZZ /* -------- Neon Immediate operatnd --------- */
-//ZZ
-//ZZ ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 ) {
-//ZZ ARMNImm* i = LibVEX_Alloc(sizeof(ARMNImm));
-//ZZ i->type = type;
-//ZZ i->imm8 = imm8;
-//ZZ return i;
-//ZZ }
-//ZZ
-//ZZ ULong ARMNImm_to_Imm64 ( ARMNImm* imm ) {
-//ZZ int i, j;
-//ZZ ULong y, x = imm->imm8;
-//ZZ switch (imm->type) {
-//ZZ case 3:
-//ZZ x = x << 8; /* fallthrough */
-//ZZ case 2:
-//ZZ x = x << 8; /* fallthrough */
-//ZZ case 1:
-//ZZ x = x << 8; /* fallthrough */
-//ZZ case 0:
-//ZZ return (x << 32) | x;
-//ZZ case 5:
-//ZZ case 6:
-//ZZ if (imm->type == 5)
-//ZZ x = x << 8;
-//ZZ else
-//ZZ x = (x << 8) | x;
-//ZZ /* fallthrough */
-//ZZ case 4:
-//ZZ x = (x << 16) | x;
-//ZZ return (x << 32) | x;
-//ZZ case 8:
-//ZZ x = (x << 8) | 0xFF;
-//ZZ /* fallthrough */
-//ZZ case 7:
-//ZZ x = (x << 8) | 0xFF;
-//ZZ return (x << 32) | x;
-//ZZ case 9:
-//ZZ x = 0;
-//ZZ for (i = 7; i >= 0; i--) {
-//ZZ y = ((ULong)imm->imm8 >> i) & 1;
-//ZZ for (j = 0; j < 8; j++) {
-//ZZ x = (x << 1) | y;
-//ZZ }
-//ZZ }
-//ZZ return x;
-//ZZ case 10:
-//ZZ x |= (x & 0x80) << 5;
-//ZZ x |= (~x & 0x40) << 5;
-//ZZ x &= 0x187F; /* 0001 1000 0111 1111 */
-//ZZ x |= (x & 0x40) << 4;
-//ZZ x |= (x & 0x40) << 3;
-//ZZ x |= (x & 0x40) << 2;
-//ZZ x |= (x & 0x40) << 1;
-//ZZ x = x << 19;
-//ZZ x = (x << 32) | x;
-//ZZ return x;
-//ZZ default:
-//ZZ vpanic("ARMNImm_to_Imm64");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ ARMNImm* Imm64_to_ARMNImm ( ULong x ) {
-//ZZ ARMNImm tmp;
-//ZZ if ((x & 0xFFFFFFFF) == (x >> 32)) {
-//ZZ if ((x & 0xFFFFFF00) == 0)
-//ZZ return ARMNImm_TI(0, x & 0xFF);
-//ZZ if ((x & 0xFFFF00FF) == 0)
-//ZZ return ARMNImm_TI(1, (x >> 8) & 0xFF);
-//ZZ if ((x & 0xFF00FFFF) == 0)
-//ZZ return ARMNImm_TI(2, (x >> 16) & 0xFF);
-//ZZ if ((x & 0x00FFFFFF) == 0)
-//ZZ return ARMNImm_TI(3, (x >> 24) & 0xFF);
-//ZZ if ((x & 0xFFFF00FF) == 0xFF)
-//ZZ return ARMNImm_TI(7, (x >> 8) & 0xFF);
-//ZZ if ((x & 0xFF00FFFF) == 0xFFFF)
-//ZZ return ARMNImm_TI(8, (x >> 16) & 0xFF);
-//ZZ if ((x & 0xFFFF) == ((x >> 16) & 0xFFFF)) {
-//ZZ if ((x & 0xFF00) == 0)
-//ZZ return ARMNImm_TI(4, x & 0xFF);
-//ZZ if ((x & 0x00FF) == 0)
-//ZZ return ARMNImm_TI(5, (x >> 8) & 0xFF);
-//ZZ if ((x & 0xFF) == ((x >> 8) & 0xFF))
-//ZZ return ARMNImm_TI(6, x & 0xFF);
-//ZZ }
-//ZZ if ((x & 0x7FFFF) == 0) {
-//ZZ tmp.type = 10;
-//ZZ tmp.imm8 = ((x >> 19) & 0x7F) | ((x >> 24) & 0x80);
-//ZZ if (ARMNImm_to_Imm64(&tmp) == x)
-//ZZ return ARMNImm_TI(tmp.type, tmp.imm8);
-//ZZ }
-//ZZ } else {
-//ZZ /* This can only be type 9. */
-//ZZ tmp.imm8 = (((x >> 56) & 1) << 7)
-//ZZ | (((x >> 48) & 1) << 6)
-//ZZ | (((x >> 40) & 1) << 5)
-//ZZ | (((x >> 32) & 1) << 4)
-//ZZ | (((x >> 24) & 1) << 3)
-//ZZ | (((x >> 16) & 1) << 2)
-//ZZ | (((x >> 8) & 1) << 1)
-//ZZ | (((x >> 0) & 1) << 0);
-//ZZ tmp.type = 9;
-//ZZ if (ARMNImm_to_Imm64 (&tmp) == x)
-//ZZ return ARMNImm_TI(tmp.type, tmp.imm8);
-//ZZ }
-//ZZ return NULL;
-//ZZ }
-//ZZ
-//ZZ void ppARMNImm (ARMNImm* i) {
-//ZZ ULong x = ARMNImm_to_Imm64(i);
-//ZZ vex_printf("0x%llX%llX", x, x);
-//ZZ }
-//ZZ
-//ZZ /* -- Register or scalar operand --- */
-//ZZ
-//ZZ ARMNRS* mkARMNRS(ARMNRS_tag tag, HReg reg, UInt index)
-//ZZ {
-//ZZ ARMNRS *p = LibVEX_Alloc(sizeof(ARMNRS));
-//ZZ p->tag = tag;
-//ZZ p->reg = reg;
-//ZZ p->index = index;
-//ZZ return p;
-//ZZ }
-//ZZ
-//ZZ void ppARMNRS(ARMNRS *p)
-//ZZ {
-//ZZ ppHRegARM(p->reg);
-//ZZ if (p->tag == ARMNRS_Scalar) {
-//ZZ vex_printf("[%d]", p->index);
-//ZZ }
-//ZZ }
-
/* --------- Instructions. --------- */
static const HChar* showARM64LogicOp ( ARM64LogicOp op ) {
@@ -1063,363 +778,6 @@
}
}
-//ZZ const HChar* showARMNeonBinOp ( ARMNeonBinOp op ) {
-//ZZ switch (op) {
-//ZZ case ARMneon_VAND: return "vand";
-//ZZ case ARMneon_VORR: return "vorr";
-//ZZ case ARMneon_VXOR: return "veor";
-//ZZ case ARMneon_VADD: return "vadd";
-//ZZ case ARMneon_VRHADDS: return "vrhadd";
-//ZZ case ARMneon_VRHADDU: return "vrhadd";
-//ZZ case ARMneon_VADDFP: return "vadd";
-//ZZ case ARMneon_VPADDFP: return "vpadd";
-//ZZ case ARMneon_VABDFP: return "vabd";
-//ZZ case ARMneon_VSUB: return "vsub";
-//ZZ case ARMneon_VSUBFP: return "vsub";
-//ZZ case ARMneon_VMINU: return "vmin";
-//ZZ case ARMneon_VMINS: return "vmin";
-//ZZ case ARMneon_VMINF: return "vmin";
-//ZZ case ARMneon_VMAXU: return "vmax";
-//ZZ case ARMneon_VMAXS: return "vmax";
-//ZZ case ARMneon_VMAXF: return "vmax";
-//ZZ case ARMneon_VQADDU: return "vqadd";
-//ZZ case ARMneon_VQADDS: return "vqadd";
-//ZZ case ARMneon_VQSUBU: return "vqsub";
-//ZZ case ARMneon_VQSUBS: return "vqsub";
-//ZZ case ARMneon_VCGTU: return "vcgt";
-//ZZ case ARMneon_VCGTS: return "vcgt";
-//ZZ case ARMneon_VCGTF: return "vcgt";
-//ZZ case ARMneon_VCGEF: return "vcgt";
-//ZZ case ARMneon_VCGEU: return "vcge";
-//ZZ case ARMneon_VCGES: return "vcge";
-//ZZ case ARMneon_VCEQ: return "vceq";
-//ZZ case ARMneon_VCEQF: return "vceq";
-//ZZ case ARMneon_VPADD: return "vpadd";
-//ZZ case ARMneon_VPMINU: return "vpmin";
-//ZZ case ARMneon_VPMINS: return "vpmin";
-//ZZ case ARMneon_VPMINF: return "vpmin";
-//ZZ case ARMneon_VPMAXU: return "vpmax";
-//ZZ case ARMneon_VPMAXS: return "vpmax";
-//ZZ case ARMneon_VPMAXF: return "vpmax";
-//ZZ case ARMneon_VEXT: return "vext";
-//ZZ case ARMneon_VMUL: return "vmuli";
-//ZZ case ARMneon_VMULLU: return "vmull";
-//ZZ case ARMneon_VMULLS: return "vmull";
-//ZZ case ARMneon_VMULP: return "vmul";
-//ZZ case ARMneon_VMULFP: return "vmul";
-//ZZ case ARMneon_VMULLP: return "vmul";
-//ZZ case ARMneon_VQDMULH: return "vqdmulh";
-//ZZ case ARMneon_VQRDMULH: return "vqrdmulh";
-//ZZ case ARMneon_VQDMULL: return "vqdmull";
-//ZZ case ARMneon_VTBL: return "vtbl";
-//ZZ case ARMneon_VRECPS: return "vrecps";
-//ZZ case ARMneon_VRSQRTS: return "vrecps";
-//ZZ /* ... */
-//ZZ default: vpanic("showARMNeonBinOp");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ const HChar* showARMNeonBinOpDataType ( ARMNeonBinOp op ) {
-//ZZ switch (op) {
-//ZZ case ARMneon_VAND:
-//ZZ case ARMneon_VORR:
-//ZZ case ARMneon_VXOR:
-//ZZ return "";
-//ZZ case ARMneon_VADD:
-//ZZ case ARMneon_VSUB:
-//ZZ case ARMneon_VEXT:
-//ZZ case ARMneon_VMUL:
-//ZZ case ARMneon_VPADD:
-//ZZ case ARMneon_VTBL:
-//ZZ case ARMneon_VCEQ:
-//ZZ return ".i";
-//ZZ case ARMneon_VRHADDU:
-//ZZ case ARMneon_VMINU:
-//ZZ case ARMneon_VMAXU:
-//ZZ case ARMneon_VQADDU:
-//ZZ case ARMneon_VQSUBU:
-//ZZ case ARMneon_VCGTU:
-//ZZ case ARMneon_VCGEU:
-//ZZ case ARMneon_VMULLU:
-//ZZ case ARMneon_VPMINU:
-//ZZ case ARMneon_VPMAXU:
-//ZZ return ".u";
-//ZZ case ARMneon_VRHADDS:
-//ZZ case ARMneon_VMINS:
-//ZZ case ARMneon_VMAXS:
-//ZZ case ARMneon_VQADDS:
-//ZZ case ARMneon_VQSUBS:
-//ZZ case ARMneon_VCGTS:
-//ZZ case ARMneon_VCGES:
-//ZZ case ARMneon_VQDMULL:
-//ZZ case ARMneon_VMULLS:
-//ZZ case ARMneon_VPMINS:
-//ZZ case ARMneon_VPMAXS:
-//ZZ case ARMneon_VQDMULH:
-//ZZ case ARMneon_VQRDMULH:
-//ZZ return ".s";
-//ZZ case ARMneon_VMULP:
-//ZZ case ARMneon_VMULLP:
-//ZZ return ".p";
-//ZZ case ARMneon_VADDFP:
-//ZZ case ARMneon_VABDFP:
-//ZZ case ARMneon_VPADDFP:
-//ZZ case ARMneon_VSUBFP:
-//ZZ case ARMneon_VMULFP:
-//ZZ case ARMneon_VMINF:
-//ZZ case ARMneon_VMAXF:
-//ZZ case ARMneon_VPMINF:
-//ZZ case ARMneon_VPMAXF:
-//ZZ case ARMneon_VCGTF:
-//ZZ case ARMneon_VCGEF:
-//ZZ case ARMneon_VCEQF:
-//ZZ case ARMneon_VRECPS:
-//ZZ case ARMneon_VRSQRTS:
-//ZZ return ".f";
-//ZZ /* ... */
-//ZZ default: vpanic("showARMNeonBinOpDataType");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ const HChar* showARMNeonUnOp ( ARMNeonUnOp op ) {
-//ZZ switch (op) {
-//ZZ case ARMneon_COPY: return "vmov";
-//ZZ case ARMneon_COPYLS: return "vmov";
-//ZZ case ARMneon_COPYLU: return "vmov";
-//ZZ case ARMneon_COPYN: return "vmov";
-//ZZ case ARMneon_COPYQNSS: return "vqmovn";
-//ZZ case ARMneon_COPYQNUS: return "vqmovun";
-//ZZ case ARMneon_COPYQNUU: return "vqmovn";
-//ZZ case ARMneon_NOT: return "vmvn";
-//ZZ case ARMneon_EQZ: return "vceq";
-//ZZ case ARMneon_CNT: return "vcnt";
-//ZZ case ARMneon_CLS: return "vcls";
-//ZZ case ARMneon_CLZ: return "vclz";
-//ZZ case ARMneon_DUP: return "vdup";
-//ZZ case ARMneon_PADDLS: return "vpaddl";
-//ZZ case ARMneon_PADDLU: return "vpaddl";
-//ZZ case ARMneon_VQSHLNSS: return "vqshl";
-//ZZ case ARMneon_VQSHLNUU: return "vqshl";
-//ZZ case ARMneon_VQSHLNUS: return "vqshlu";
-//ZZ case ARMneon_REV16: return "vrev16";
-//ZZ case ARMneon_REV32: return "vrev32";
-//ZZ case ARMneon_REV64: return "vrev64";
-//ZZ case ARMneon_VCVTFtoU: return "vcvt";
-//ZZ case ARMneon_VCVTFtoS: return "vcvt";
-//ZZ case ARMneon_VCVTUtoF: return "vcvt";
-//ZZ case ARMneon_VCVTStoF: return "vcvt";
-//ZZ case ARMneon_VCVTFtoFixedU: return "vcvt";
-//ZZ case ARMneon_VCVTFtoFixedS: return "vcvt";
-//ZZ case ARMneon_VCVTFixedUtoF: return "vcvt";
-//ZZ case ARMneon_VCVTFixedStoF: return "vcvt";
-//ZZ case ARMneon_VCVTF32toF16: return "vcvt";
-//ZZ case ARMneon_VCVTF16toF32: return "vcvt";
-//ZZ case ARMneon_VRECIP: return "vrecip";
-//ZZ case ARMneon_VRECIPF: return "vrecipf";
-//ZZ case ARMneon_VNEGF: return "vneg";
-//ZZ case ARMneon_ABS: return "vabs";
-//ZZ case ARMneon_VABSFP: return "vabsfp";
-//ZZ case ARMneon_VRSQRTEFP: return "vrsqrtefp";
-//ZZ case ARMneon_VRSQRTE: return "vrsqrte";
-//ZZ /* ... */
-//ZZ default: vpanic("showARMNeonUnOp");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ const HChar* showARMNeonUnOpDataType ( ARMNeonUnOp op ) {
-//ZZ switch (op) {
-//ZZ case ARMneon_COPY:
-//ZZ case ARMneon_NOT:
-//ZZ return "";
-//ZZ case ARMneon_COPYN:
-//ZZ case ARMneon_EQZ:
-//ZZ case ARMneon_CNT:
-//ZZ case ARMneon_DUP:
-//ZZ case ARMneon_REV16:
-//ZZ case ARMneon_REV32:
-//ZZ case ARMneon_REV64:
-//ZZ return ".i";
-//ZZ case ARMneon_COPYLU:
-//ZZ case ARMneon_PADDLU:
-//ZZ case ARMneon_COPYQNUU:
-//ZZ case ARMneon_VQSHLNUU:
-//ZZ case ARMneon_VRECIP:
-//ZZ case ARMneon_VRSQRTE:
-//ZZ return ".u";
-//ZZ case ARMneon_CLS:
-//ZZ case ARMneon_CLZ:
-//ZZ case ARMneon_COPYLS:
-//ZZ case ARMneon_PADDLS:
-//ZZ case ARMneon_COPYQNSS:
-//ZZ case ARMneon_COPYQNUS:
-//ZZ case ARMneon_VQSHLNSS:
-//ZZ case ARMneon_VQSHLNUS:
-//ZZ case ARMneon_ABS:
-//ZZ return ".s";
-//ZZ case ARMneon_VRECIPF:
-//ZZ case ARMneon_VNEGF:
-//ZZ case ARMneon_VABSFP:
-//ZZ case ARMneon_VRSQRTEFP:
-//ZZ return ".f";
-//ZZ case ARMneon_VCVTFtoU: return ".u32.f32";
-//ZZ case ARMneon_VCVTFtoS: return ".s32.f32";
-//ZZ case ARMneon_VCVTUtoF: return ".f32.u32";
-//ZZ case ARMneon_VCVTStoF: return ".f32.s32";
-//ZZ case ARMneon_VCVTF16toF32: return ".f32.f16";
-//ZZ case ARMneon_VCVTF32toF16: return ".f16.f32";
-//ZZ case ARMneon_VCVTFtoFixedU: return ".u32.f32";
-//ZZ case ARMneon_VCVTFtoFixedS: return ".s32.f32";
-//ZZ case ARMneon_VCVTFixedUtoF: return ".f32.u32";
-//ZZ case ARMneon_VCVTFixedStoF: return ".f32.s32";
-//ZZ /* ... */
-//ZZ default: vpanic("showARMNeonUnOpDataType");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ const HChar* showARMNeonUnOpS ( ARMNeonUnOpS op ) {
-//ZZ switch (op) {
-//ZZ case ARMneon_SETELEM: return "vmov";
-//ZZ case ARMneon_GETELEMU: return "vmov";
-//ZZ case ARMneon_GETELEMS: return "vmov";
-//ZZ case ARMneon_VDUP: return "vdup";
-//ZZ /* ... */
-//ZZ default: vpanic("showARMNeonUnarySOp");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ const HChar* showARMNeonUnOpSDataType ( ARMNeonUnOpS op ) {
-//ZZ switch (op) {
-//ZZ case ARMneon_SETELEM:
-//ZZ case ARMneon_VDUP:
-//ZZ return ".i";
-//ZZ case ARMneon_GETELEMS:
-//ZZ return ".s";
-//ZZ case ARMneon_GETELEMU:
-//ZZ return ".u";
-//ZZ /* ... */
-//ZZ default: vpanic("showARMNeonUnarySOp");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ const HChar* showARMNeonShiftOp ( ARMNeonShiftOp op ) {
-//ZZ switch (op) {
-//ZZ case ARMneon_VSHL: return "vshl";
-//ZZ case ARMneon_VSAL: return "vshl";
-//ZZ case ARMneon_VQSHL: return "vqshl";
-//ZZ case ARMneon_VQSAL: return "vqshl";
-//ZZ /* ... */
-//ZZ default: vpanic("showARMNeonShiftOp");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ const HChar* showARMNeonShiftOpDataType ( ARMNeonShiftOp op ) {
-//ZZ switch (op) {
-//ZZ case ARMneon_VSHL:
-//ZZ case ARMneon_VQSHL:
-//ZZ return ".u";
-//ZZ case ARMneon_VSAL:
-//ZZ case ARMneon_VQSAL:
-//ZZ return ".s";
-//ZZ /* ... */
-//ZZ default: vpanic("showARMNeonShiftOpDataType");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ const HChar* showARMNeonDualOp ( ARMNeonDualOp op ) {
-//ZZ switch (op) {
-//ZZ case ARMneon_TRN: return "vtrn";
-//ZZ case ARMneon_ZIP: return "vzip";
-//ZZ case ARMneon_UZP: return "vuzp";
-//ZZ /* ... */
-//ZZ default: vpanic("showARMNeonDualOp");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ const HChar* showARMNeonDualOpDataType ( ARMNeonDualOp op ) {
-//ZZ switch (op) {
-//ZZ case ARMneon_TRN:
-//ZZ case ARMneon_ZIP:
-//ZZ case ARMneon_UZP:
-//ZZ return "i";
-//ZZ /* ... */
-//ZZ default: vpanic("showARMNeonDualOp");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ static const HChar* showARMNeonDataSize_wrk ( UInt size )
-//ZZ {
-//ZZ switch (size) {
-//ZZ case 0: return "8";
-//ZZ case 1: return "16";
-//ZZ case 2: return "32";
-//ZZ case 3: return "64";
-//ZZ default: vpanic("showARMNeonDataSize");
-//ZZ }
-//ZZ }
-//ZZ
-//ZZ static const HChar* showARMNeonDataSize ( ARMInstr* i )
-//ZZ {
-//ZZ switch (i->tag) {
-//ZZ case ARMin_NBinary:
-//ZZ if (i->ARMin.NBinary.op == ARMneon_VEXT)
-//ZZ return "8";
-//ZZ if (i->ARMin.NBinary.op == ARMneon_VAND ||
-//ZZ i->ARMin.NBinary.op == ARMneon_VORR ||
-//ZZ i->ARMin.NBinary.op == ARMneon_VXOR)
-//ZZ return "";
-//ZZ return showARMNeonDataSize_wrk(i->ARMin.NBinary.size);
-//ZZ case ARMin_NUnary:
-//ZZ if (i->ARMin.NUnary.op == ARMneon_COPY ||
-//ZZ i->ARMin.NUnary.op == ARMneon_NOT ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTF32toF16||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTF16toF32||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTFtoFixedS ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTFtoFixedU ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTFixedStoF ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTFixedUtoF ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTFtoS ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTFtoU ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTStoF ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTUtoF)
-//ZZ return "";
-//ZZ if (i->ARMin.NUnary.op == ARMneon_VQSHLNSS ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VQSHLNUU ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VQSHLNUS) {
-//ZZ UInt size;
-//ZZ size = i->ARMin.NUnary.size;
-//ZZ if (size & 0x40)
-//ZZ return "64";
-//ZZ if (size & 0x20)
-//ZZ return "32";
-//ZZ if (size & 0x10)
-//ZZ return "16";
-//ZZ if (size & 0x08)
-//ZZ return "8";
-//ZZ vpanic("showARMNeonDataSize");
-//ZZ }
-//ZZ return showARMNeonDataSize_wrk(i->ARMin.NUnary.size);
-//ZZ case ARMin_NUnaryS:
-//ZZ if (i->ARMin.NUnaryS.op == ARMneon_VDUP) {
-//ZZ int size;
-//ZZ size = i->ARMin.NUnaryS.size;
-//ZZ if ((size & 1) == 1)
-//ZZ return "8";
-//ZZ if ((size & 3) == 2)
-//ZZ return "16";
-//ZZ if ((size & 7) == 4)
-//ZZ return "32";
-//ZZ vpanic("showARMNeonDataSize");
-//ZZ }
-//ZZ return showARMNeonDataSize_wrk(i->ARMin.NUnaryS.size);
-//ZZ case ARMin_NShift:
-//ZZ return showARMNeonDataSize_wrk(i->ARMin.NShift.size);
-//ZZ case ARMin_NDual:
-//ZZ return showARMNeonDataSize_wrk(i->ARMin.NDual.size);
-//ZZ default:
-//ZZ vpanic("showARMNeonDataSize");
-//ZZ }
-//ZZ }
-
ARM64Instr* ARM64Instr_Arith ( HReg dst,
HReg argL, ARM64RIA* argR, Bool isAdd ) {
ARM64Instr* i = LibVEX_Alloc(sizeof(ARM64Instr));
@@ -1614,11 +972,6 @@
i->tag = ARM64in_MFence;
return i;
}
-//ZZ ARM64Instr* ARM64Instr_CLREX( void ) {
-//ZZ ARM64Instr* i = LibVEX_Alloc(sizeof(ARM64Instr));
-//ZZ i->tag = ARM64in_CLREX;
-//ZZ return i;
-//ZZ }
ARM64Instr* ARM64Instr_VLdStS ( Bool isLoad, HReg sD, HReg rN, UInt uimm12 ) {
ARM64Instr* i = LibVEX_Alloc(sizeof(ARM64Instr));
i->tag = ARM64in_VLdStS;
@@ -1834,119 +1187,6 @@
vassert(amtB >= 1 && amtB <= 15);
return i;
}
-//ZZ ARMInstr* ARMInstr_VAluS ( ARMVfpOp op, HReg dst, HReg argL, HReg argR ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_VAluS;
-//ZZ i->ARMin.VAluS.op = op;
-//ZZ i->ARMin.VAluS.dst = dst;
-//ZZ i->ARMin.VAluS.argL = argL;
-//ZZ i->ARMin.VAluS.argR = argR;
-//ZZ return i;
-//ZZ }
-//ZZ ARMInstr* ARMInstr_VCMovD ( ARMCondCode cond, HReg dst, HReg src ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_VCMovD;
-//ZZ i->ARMin.VCMovD.cond = cond;
-//ZZ i->ARMin.VCMovD.dst = dst;
-//ZZ i->ARMin.VCMovD.src = src;
-//ZZ vassert(cond != ARMcc_AL);
-//ZZ return i;
-//ZZ }
-//ZZ ARMInstr* ARMInstr_VCMovS ( ARMCondCode cond, HReg dst, HReg src ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_VCMovS;
-//ZZ i->ARMin.VCMovS.cond = cond;
-//ZZ i->ARMin.VCMovS.dst = dst;
-//ZZ i->ARMin.VCMovS.src = src;
-//ZZ vassert(cond != ARMcc_AL);
-//ZZ return i;
-//ZZ }
-//ZZ ARMInstr* ARMInstr_VXferD ( Bool toD, HReg dD, HReg rHi, HReg rLo ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_VXferD;
-//ZZ i->ARMin.VXferD.toD = toD;
-//ZZ i->ARMin.VXferD.dD = dD;
-//ZZ i->ARMin.VXferD.rHi = rHi;
-//ZZ i->ARMin.VXferD.rLo = rLo;
-//ZZ return i;
-//ZZ }
-//ZZ ARMInstr* ARMInstr_VXferS ( Bool toS, HReg fD, HReg rLo ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_VXferS;
-//ZZ i->ARMin.VXferS.toS = toS;
-//ZZ i->ARMin.VXferS.fD = fD;
-//ZZ i->ARMin.VXferS.rLo = rLo;
-//ZZ return i;
-//ZZ }
-//ZZ ARMInstr* ARMInstr_VCvtID ( Bool iToD, Bool syned,
-//ZZ HReg dst, HReg src ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_VCvtID;
-//ZZ i->ARMin.VCvtID.iToD = iToD;
-//ZZ i->ARMin.VCvtID.syned = syned;
-//ZZ i->ARMin.VCvtID.dst = dst;
-//ZZ i->ARMin.VCvtID.src = src;
-//ZZ return i;
-//ZZ }
-//ZZ ARMInstr* ARMInstr_NLdStD ( Bool isLoad, HReg dD, ARMAModeN *amode ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_NLdStD;
-//ZZ i->ARMin.NLdStD.isLoad = isLoad;
-//ZZ i->ARMin.NLdStD.dD = dD;
-//ZZ i->ARMin.NLdStD.amode = amode;
-//ZZ return i;
-//ZZ }
-//ZZ
-//ZZ ARMInstr* ARMInstr_NUnary ( ARMNeonUnOp op, HReg dQ, HReg nQ,
-//ZZ UInt size, Bool Q ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_NUnary;
-//ZZ i->ARMin.NUnary.op = op;
-//ZZ i->ARMin.NUnary.src = nQ;
-//ZZ i->ARMin.NUnary.dst = dQ;
-//ZZ i->ARMin.NUnary.size = size;
-//ZZ i->ARMin.NUnary.Q = Q;
-//ZZ return i;
-//ZZ }
-//ZZ
-//ZZ ARMInstr* ARMInstr_NUnaryS ( ARMNeonUnOpS op, ARMNRS* dst, ARMNRS* src,
-//ZZ UInt size, Bool Q ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_NUnaryS;
-//ZZ i->ARMin.NUnaryS.op = op;
-//ZZ i->ARMin.NUnaryS.src = src;
-//ZZ i->ARMin.NUnaryS.dst = dst;
-//ZZ i->ARMin.NUnaryS.size = size;
-//ZZ i->ARMin.NUnaryS.Q = Q;
-//ZZ return i;
-//ZZ }
-//ZZ
-//ZZ ARMInstr* ARMInstr_NDual ( ARMNeonDualOp op, HReg nQ, HReg mQ,
-//ZZ UInt size, Bool Q ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_NDual;
-//ZZ i->ARMin.NDual.op = op;
-//ZZ i->ARMin.NDual.arg1 = nQ;
-//ZZ i->ARMin.NDual.arg2 = mQ;
-//ZZ i->ARMin.NDual.size = size;
-//ZZ i->ARMin.NDual.Q = Q;
-//ZZ return i;
-//ZZ }
-//ZZ
-//ZZ ARMInstr* ARMInstr_NBinary ( ARMNeonBinOp op,
-//ZZ HReg dst, HReg argL, HReg argR,
-//ZZ UInt size, Bool Q ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_NBinary;
-//ZZ i->ARMin.NBinary.op = op;
-//ZZ i->ARMin.NBinary.argL = argL;
-//ZZ i->ARMin.NBinary.argR = argR;
-//ZZ i->ARMin.NBinary.dst = dst;
-//ZZ i->ARMin.NBinary.size = size;
-//ZZ i->ARMin.NBinary.Q = Q;
-//ZZ return i;
-//ZZ }
-
ARM64Instr* ARM64Instr_VImmQ (HReg rQ, UShort imm) {
ARM64Instr* i = LibVEX_Alloc(sizeof(ARM64Instr));
i->tag = ARM64in_VImmQ;
@@ -2013,77 +1253,6 @@
}
return i;
}
-
-//ZZ ARMInstr* ARMInstr_NCMovQ ( ARMCondCode cond, HReg dst, HReg src ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_NCMovQ;
-//ZZ i->ARMin.NCMovQ.cond = cond;
-//ZZ i->ARMin.NCMovQ.dst = dst;
-//ZZ i->ARMin.NCMovQ.src = src;
-//ZZ vassert(cond != ARMcc_AL);
-//ZZ return i;
-//ZZ }
-//ZZ
-//ZZ ARMInstr* ARMInstr_NShift ( ARMNeonShiftOp op,
-//ZZ HReg dst, HReg argL, HReg argR,
-//ZZ UInt size, Bool Q ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_NShift;
-//ZZ i->ARMin.NShift.op = op;
-//ZZ i->ARMin.NShift.argL = argL;
-//ZZ i->ARMin.NShift.argR = argR;
-//ZZ i->ARMin.NShift.dst = dst;
-//ZZ i->ARMin.NShift.size = size;
-//ZZ i->ARMin.NShift.Q = Q;
-//ZZ return i;
-//ZZ }
-//ZZ
-//ZZ ARMInstr* ARMInstr_NShl64 ( HReg dst, HReg src, UInt amt )
-//ZZ {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_NShl64;
-//ZZ i->ARMin.NShl64.dst = dst;
-//ZZ i->ARMin.NShl64.src = src;
-//ZZ i->ARMin.NShl64.amt = amt;
-//ZZ vassert(amt >= 1 && amt <= 63);
-//ZZ return i;
-//ZZ }
-//ZZ
-//ZZ /* Helper copy-pasted from isel.c */
-//ZZ static Bool fitsIn8x4 ( UInt* u8, UInt* u4, UInt u )
-//ZZ {
-//ZZ UInt i;
-//ZZ for (i = 0; i < 16; i++) {
-//ZZ if (0 == (u & 0xFFFFFF00)) {
-//ZZ *u8 = u;
-//ZZ *u4 = i;
-//ZZ return True;
-//ZZ }
-//ZZ u = ROR32(u, 30);
-//ZZ }
-//ZZ vassert(i == 16);
-//ZZ return False;
-//ZZ }
-//ZZ
-//ZZ ARMInstr* ARMInstr_Add32 ( HReg rD, HReg rN, UInt imm32 ) {
-//ZZ UInt u8, u4;
-//ZZ ARMInstr *i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ /* Try to generate single ADD if possible */
-//ZZ if (fitsIn8x4(&u8, &u4, imm32)) {
-//ZZ i->tag = ARMin_Alu;
-//ZZ i->ARMin.Alu.op = ARMalu_ADD;
-//ZZ i->ARMin.Alu.dst = rD;
-//ZZ i->ARMin.Alu.argL = rN;
-//ZZ i->ARMin.Alu.argR = ARMRI84_I84(u8, u4);
-//ZZ } else {
-//ZZ i->tag = ARMin_Add32;
-//ZZ i->ARMin.Add32.rD = rD;
-//ZZ i->ARMin.Add32.rN = rN;
-//ZZ i->ARMin.Add32.imm32 = imm32;
-//ZZ }
-//ZZ return i;
-//ZZ }
-
ARM64Instr* ARM64Instr_EvCheck ( ARM64AMode* amCounter,
ARM64AMode* amFailAddr ) {
ARM64Instr* i = LibVEX_Alloc(sizeof(ARM64Instr));
@@ -2093,12 +1262,6 @@
return i;
}
-//ZZ ARMInstr* ARMInstr_ProfInc ( void ) {
-//ZZ ARMInstr* i = LibVEX_Alloc(sizeof(ARMInstr));
-//ZZ i->tag = ARMin_ProfInc;
-//ZZ return i;
-//ZZ }
-
/* ... */
void ppARM64Instr ( ARM64Instr* i ) {
@@ -2308,9 +1471,6 @@
case ARM64in_MFence:
vex_printf("(mfence) dsb sy; dmb sy; isb");
return;
-//ZZ case ARM64in_CLREX:
-//ZZ vex_printf("clrex");
-//ZZ return;
case ARM64in_VLdStS:
if (i->ARM64in.VLdStS.isLoad) {
vex_printf("ldr ");
@@ -2507,156 +1667,6 @@
vex_printf(".16b, #%u", i->ARM64in.VExtV.amtB);
return;
}
-//ZZ case ARMin_VAluS:
-//ZZ vex_printf("f%-3ss ", showARMVfpOp(i->ARMin.VAluS.op));
-//ZZ ppHRegARM(i->ARMin.VAluS.dst);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.VAluS.argL);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.VAluS.argR);
-//ZZ return;
-//ZZ case ARMin_VCMovD:
-//ZZ vex_printf("fcpyd%s ", showARMCondCode(i->ARMin.VCMovD.cond));
-//ZZ ppHRegARM(i->ARMin.VCMovD.dst);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.VCMovD.src);
-//ZZ return;
-//ZZ case ARMin_VCMovS:
-//ZZ vex_printf("fcpys%s ", showARMCondCode(i->ARMin.VCMovS.cond));
-//ZZ ppHRegARM(i->ARMin.VCMovS.dst);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.VCMovS.src);
-//ZZ return;
-//ZZ case ARMin_VXferD:
-//ZZ vex_printf("vmov ");
-//ZZ if (i->ARMin.VXferD.toD) {
-//ZZ ppHRegARM(i->ARMin.VXferD.dD);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.VXferD.rLo);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.VXferD.rHi);
-//ZZ } else {
-//ZZ ppHRegARM(i->ARMin.VXferD.rLo);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.VXferD.rHi);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.VXferD.dD);
-//ZZ }
-//ZZ return;
-//ZZ case ARMin_VXferS:
-//ZZ vex_printf("vmov ");
-//ZZ if (i->ARMin.VXferS.toS) {
-//ZZ ppHRegARM(i->ARMin.VXferS.fD);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.VXferS.rLo);
-//ZZ } else {
-//ZZ ppHRegARM(i->ARMin.VXferS.rLo);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.VXferS.fD);
-//ZZ }
-//ZZ return;
-//ZZ case ARMin_VCvtID: {
-//ZZ const HChar* nm = "?";
-//ZZ if (i->ARMin.VCvtID.iToD) {
-//ZZ nm = i->ARMin.VCvtID.syned ? "fsitod" : "fuitod";
-//ZZ } else {
-//ZZ nm = i->ARMin.VCvtID.syned ? "ftosid" : "ftouid";
-//ZZ }
-//ZZ vex_printf("%s ", nm);
-//ZZ ppHRegARM(i->ARMin.VCvtID.dst);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.VCvtID.src);
-//ZZ return;
-//ZZ }
-//ZZ case ARMin_NLdStD:
-//ZZ if (i->ARMin.NLdStD.isLoad)
-//ZZ vex_printf("vld1.32 {");
-//ZZ else
-//ZZ vex_printf("vst1.32 {");
-//ZZ ppHRegARM(i->ARMin.NLdStD.dD);
-//ZZ vex_printf("} ");
-//ZZ ppARMAModeN(i->ARMin.NLdStD.amode);
-//ZZ return;
-//ZZ case ARMin_NUnary:
-//ZZ vex_printf("%s%s%s ",
-//ZZ showARMNeonUnOp(i->ARMin.NUnary.op),
-//ZZ showARMNeonUnOpDataType(i->ARMin.NUnary.op),
-//ZZ showARMNeonDataSize(i));
-//ZZ ppHRegARM(i->ARMin.NUnary.dst);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.NUnary.src);
-//ZZ if (i->ARMin.NUnary.op == ARMneon_EQZ)
-//ZZ vex_printf(", #0");
-//ZZ if (i->ARMin.NUnary.op == ARMneon_VCVTFtoFixedS ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTFtoFixedU ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTFixedStoF ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VCVTFixedUtoF) {
-//ZZ vex_printf(", #%d", i->ARMin.NUnary.size);
-//ZZ }
-//ZZ if (i->ARMin.NUnary.op == ARMneon_VQSHLNSS ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VQSHLNUU ||
-//ZZ i->ARMin.NUnary.op == ARMneon_VQSHLNUS) {
-//ZZ UInt size;
-//ZZ size = i->ARMin.NUnary.size;
-//ZZ if (size & 0x40) {
-//ZZ vex_printf(", #%d", size - 64);
-//ZZ } else if (size & 0x20) {
-//ZZ vex_printf(", #%d", size - 32);
-//ZZ } else if (size & 0x10) {
-//ZZ vex_printf(", #%d", size - 16);
-//ZZ } else if (size & 0x08) {
-//ZZ vex_printf(", #%d", size - 8);
-//ZZ }
-//ZZ }
-//ZZ return;
-//ZZ case ARMin_NUnaryS:
-//ZZ vex_printf("%s%s%s ",
-//ZZ showARMNeonUnOpS(i->ARMin.NUnaryS.op),
-//ZZ showARMNeonUnOpSDataType(i->ARMin.NUnaryS.op),
-//ZZ showARMNeonDataSize(i));
-//ZZ ppARMNRS(i->ARMin.NUnaryS.dst);
-//ZZ vex_printf(", ");
-//ZZ ppARMNRS(i->ARMin.NUnaryS.src);
-//ZZ return;
-//ZZ case ARMin_NShift:
-//ZZ vex_printf("%s%s%s ",
-//ZZ showARMNeonShiftOp(i->ARMin.NShift.op),
-//ZZ showARMNeonShiftOpDataType(i->ARMin.NShift.op),
-//ZZ showARMNeonDataSize(i));
-//ZZ ppHRegARM(i->ARMin.NShift.dst);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.NShift.argL);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.NShift.argR);
-//ZZ return;
-//ZZ case ARMin_NShl64:
-//ZZ vex_printf("vshl.i64 ");
-//ZZ ppHRegARM(i->ARMin.NShl64.dst);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.NShl64.src);
-//ZZ vex_printf(", #%u", i->ARMin.NShl64.amt);
-//ZZ return;
-//ZZ case ARMin_NDual:
-//ZZ vex_printf("%s%s%s ",
-//ZZ showARMNeonDualOp(i->ARMin.NDual.op),
-//ZZ showARMNeonDualOpDataType(i->ARMin.NDual.op),
-//ZZ showARMNeonDataSize(i));
-//ZZ ppHRegARM(i->ARMin.NDual.arg1);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.NDual.arg2);
-//ZZ return;
-//ZZ case ARMin_NBinary:
-//ZZ vex_printf("%s%s%s",
-//ZZ showARMNeonBinOp(i->ARMin.NBinary.op),
-//ZZ showARMNeonBinOpDataType(i->ARMin.NBinary.op),
-//ZZ showARMNeonDataSize(i));
-//ZZ vex_printf(" ");
-//ZZ ppHRegARM(i->ARMin.NBinary.dst);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.NBinary.argL);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.NBinary.argR);
-//ZZ return;
case ARM64in_VImmQ:
vex_printf("qimm ");
ppHRegARM64(i->ARM64in.VImmQ.rQ);
@@ -2710,20 +1720,6 @@
ppHRegARM64(i->ARM64in.VMov.src);
return;
}
-//ZZ case ARMin_NCMovQ:
-//ZZ vex_printf("vmov%s ", showARMCondCode(i->ARMin.NCMovQ.cond));
-//ZZ ppHRegARM(i->ARMin.NCMovQ.dst);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.NCMovQ.src);
-//ZZ return;
-//ZZ case ARMin_Add32:
-//ZZ vex_printf("add32 ");
-//ZZ ppHRegARM(i->ARMin.Add32.rD);
-//ZZ vex_printf(", ");
-//ZZ ppHRegARM(i->ARMin.Add32.rN);
-//ZZ vex_printf(", ");
-//ZZ vex_printf("%d", i->ARMin.Add32.imm32);
-//ZZ return;
case ARM64in_EvCheck:
vex_printf("(evCheck) ldr w9,");
ppARM64AMode(i->ARM64in.EvCheck.amCounter);
@@ -2910,8 +1906,6 @@
return;
case ARM64in_MFence:
return;
-//ZZ case ARMin_CLREX:
-//ZZ return;
case ARM64in_VLdStS:
addHRegUse(u, HRmRead, i->ARM64in.VLdStS.rN);
if (i->ARM64in.VLdStS.isLoad) {
@@ -3006,79 +2000,6 @@
addHRegUse(u, HRmWrite, i->ARM64in.VExtV.dst);
addHRegUse(u, HRmRead, i->ARM64in.VExtV.srcLo);
addHRegUse(u, HRmRead, i->ARM64in.VExtV.srcHi);
-//ZZ case ARMin_VAluS:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.VAluS.dst);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VAluS.argL);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VAluS.argR);
-//ZZ return;
-//ZZ case ARMin_VUnaryS:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.VUnaryS.dst);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VUnaryS.src);
-//ZZ return;
-//ZZ case ARMin_VCMovD:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.VCMovD.dst);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VCMovD.dst);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VCMovD.src);
-//ZZ return;
-//ZZ case ARMin_VCMovS:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.VCMovS.dst);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VCMovS.dst);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VCMovS.src);
-//ZZ return;
-//ZZ case ARMin_VXferD:
-//ZZ if (i->ARMin.VXferD.toD) {
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.VXferD.dD);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VXferD.rHi);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VXferD.rLo);
-//ZZ } else {
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VXferD.dD);
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.VXferD.rHi);
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.VXferD.rLo);
-//ZZ }
-//ZZ return;
-//ZZ case ARMin_VXferS:
-//ZZ if (i->ARMin.VXferS.toS) {
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.VXferS.fD);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VXferS.rLo);
-//ZZ } else {
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VXferS.fD);
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.VXferS.rLo);
-//ZZ }
-//ZZ return;
-//ZZ case ARMin_VCvtID:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.VCvtID.dst);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.VCvtID.src);
-//ZZ return;
-//ZZ case ARMin_NLdStD:
-//ZZ if (i->ARMin.NLdStD.isLoad)
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.NLdStD.dD);
-//ZZ else
-//ZZ addHRegUse(u, HRmRead, i->ARMin.NLdStD.dD);
-//ZZ addRegUsage_ARMAModeN(u, i->ARMin.NLdStD.amode);
-//ZZ return;
-//ZZ case ARMin_NUnary:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.NUnary.dst);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.NUnary.src);
-//ZZ return;
-//ZZ case ARMin_NUnaryS:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.NUnaryS.dst->reg);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.NUnaryS.src->reg);
-//ZZ return;
-//ZZ case ARMin_NShift:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.NShift.dst);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.NShift.argL);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.NShift.argR);
-//ZZ return;
-//ZZ case ARMin_NShl64:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.NShl64.dst);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.NShl64.src);
-//ZZ return;
-//ZZ case ARMin_NDual:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.NDual.arg1);
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.NDual.arg2);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.NDual.arg1);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.NDual.arg2);
-//ZZ return;
case ARM64in_VImmQ:
addHRegUse(u, HRmWrite, i->ARM64in.VImmQ.rQ);
return;
@@ -3107,22 +2028,6 @@
addHRegUse(u, HRmWrite, i->ARM64in.VMov.dst);
addHRegUse(u, HRmRead, i->ARM64in.VMov.src);
return;
-//ZZ case ARMin_NBinary:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.NBinary.dst);
-//ZZ /* TODO: sometimes dst is also being read! */
-//ZZ // XXX fix this
-//ZZ addHRegUse(u, HRmRead, i->ARMin.NBinary.argL);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.NBinary.argR);
-//ZZ return;
-//ZZ case ARMin_NCMovQ:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.NCMovQ.dst);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.NCMovQ.dst);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.NCMovQ.src);
-//ZZ return;
-//ZZ case ARMin_Add32:
-//ZZ addHRegUse(u, HRmWrite, i->ARMin.Add32.rD);
-//ZZ addHRegUse(u, HRmRead, i->ARMin.Add32.rN);
-//ZZ return;
case ARM64in_EvCheck:
/* We expect both amodes only to mention x21, so this is in
fact pointless, since x21 isn't allocatable, but
@@ -3232,8 +2137,6 @@
return;
case ARM64in_MFence:
return;
-//ZZ case ARMin_CLREX:
-//ZZ return;
case ARM64in_VLdStS:
i->ARM64in.VLdStS.sD = lookupHRegRemap(m, i->ARM64in.VLdStS.sD);
i->ARM64in.VLdStS.rN = lookupHRegRemap(m, i->ARM64in.VLdStS.rN);
@@ -3314,60 +2217,6 @@
i->ARM64in.VExtV.srcLo = lookupHRegRemap(m, i->ARM64in.VExtV.srcLo);
i->ARM64in.VExtV.srcHi = lookupHRegRemap(m, i->ARM64in.VExtV.srcHi);
return;
-
-//ZZ case ARMin_VAluS:
-//ZZ i->ARMin.VAluS.dst = lookupHRegRemap(m, i->ARMin.VAluS.dst);
-//ZZ i->ARMin.VAluS.argL = lookupHRegRemap(m, i->ARMin.VAluS.argL);
-//ZZ i->ARMin.VAluS.argR = lookupHRegRemap(m, i->ARMin.VAluS.argR);
-//ZZ return;
-//ZZ case ARMin_VCMovD:
-//ZZ i->ARMin.VCMovD.dst = lookupHRegRemap(m, i->ARMin.VCMovD.dst);
-//ZZ i->ARMin.VCMovD.src = lookupHRegRemap(m, i->ARMin.VCMovD.src);
-//ZZ return;
-//ZZ case ARMin_VCMovS:
-//ZZ i->ARMin.VCMovS.dst = lookupHRegRemap(m, i->ARMin.VCMovS.dst);
-//ZZ i->ARMin.VCMovS.src = lookupHRegRemap(m, i->ARMin.VCMovS.src);
-//ZZ return;
-//ZZ case ARMin_VXferD:
-//ZZ i->ARMin.VXferD.dD = lookupHRegRemap(m, i->ARMin.VXferD.dD);
-//ZZ i->ARMin.VXferD.rHi = lookupHRegRemap(m, i->ARMin.VXferD.rHi);
-//ZZ i->ARMin.VXferD.rLo = lookupHRegRemap(m, i->ARMin.VXferD.rLo);
-//ZZ return;
-//ZZ case ARMin_VXferS:
-//ZZ i->ARMin.VXferS.fD = lookupHRegRemap(m, i->ARMin.VXferS.fD);
-//ZZ i->ARMin.VXferS.rLo = lookupHRegRemap(m, i->ARMin.VXferS.rLo);
-//ZZ return;
-//ZZ case ARMin_VCvtID:
-//ZZ i->ARMin.VCvtID.dst = lookupHRegRemap(m, i->ARMin.VCvtID.dst);
-//ZZ i->ARMin.VCvtID.src = lookupHRegRemap(m, i->ARMin.VCvtID.src);
-//ZZ return;
-//ZZ case ARMin_NLdStD:
-//ZZ i->ARMin.NLdStD.dD = lookupHRegRemap(m, i->ARMin.NLdStD.dD);
-//ZZ mapRegs_ARMAModeN(m, i->ARMin.NLdStD.amode);
-//ZZ return;
-//ZZ case ARMin_NUnary:
-//ZZ i->ARMin.NUnary.src = lookupHRegRemap(m, i->ARMin.NUnary.src);
-//ZZ i->ARMin.NUnary.dst = lookupHRegRemap(m, i->ARMin.NUnary.dst);
-//ZZ return;
-//ZZ case ARMin_NUnaryS:
-//ZZ i->ARMin.NUnaryS.src->reg
-//ZZ = lookupHRegRemap(m, i->ARMin.NUnaryS.src->reg);
-//ZZ i->ARMin.NUnaryS.dst->reg
-//ZZ = lookupHRegRemap(m, i->ARMin.NUnaryS.dst->reg);
-//ZZ return;
-//ZZ case ARMin_NShift:
-//ZZ i->ARMin.NShift.dst = lookupHRegRemap(m, i->ARMin.NShift.dst);
-//ZZ i->ARMin.NShift.argL = lookupHRegRemap(m, i->ARMin.NShift.argL);
-//ZZ i->ARMin.NShift.argR = lookupHRegRemap(m, i->ARMin.NShift.argR);
-//ZZ return;
-//ZZ case ARMin_NShl64:
-//ZZ i->ARMin.NShl64.dst = lookupHRegRemap(m, i->ARMin.NShl64.dst);
-//ZZ i->ARMin.NShl64.src = lookupHRegRemap(m, i->ARMin.NShl64.src);
-//ZZ return;
-//ZZ case ARMin_NDual:
-//ZZ i->ARMin.NDual.arg1 = lookupHRegRemap(m, i->ARMin.NDual.arg1);
-//ZZ i->ARMin.NDual.arg2 = lookupHRegRemap(m, i->ARMin.NDual.arg2);
-//ZZ return;
case ARM64in_VImmQ:
i->ARM64in.VImmQ.rQ = lookupHRegRemap(m, i->ARM64in.VImmQ.rQ);
return;
@@ -3407,20 +2256,6 @@
i->ARM64in.VMov.dst = lookupHRegRemap(m, i->ARM64in.VMov.dst);
i->ARM64in.VMov.src = lookupHRegRemap(m, i->ARM64in.VMov.src);
return;
-
-//ZZ case ARMin_NBinary:
-//ZZ i->ARMin.NBinary.argL = lookupHRegRemap(m, i->ARMin.NBinary.argL);
-//ZZ i->ARMin.NBinary.argR = lookupHRegRemap(m, i->ARMin.NBinary.argR);
-//ZZ i->ARMin.NBinary.dst = lookupHRegRemap(m, i->ARMin.NBinary.dst);
-//ZZ return;
-//ZZ case ARMin_NCMovQ:
-//ZZ i->ARMin.NCMovQ.dst = lookupHRegRemap(m, i->ARMin.NCMovQ.dst);
-//ZZ i->ARMin.NCMovQ.src = lookupHRegRemap(m, i->ARMin.NCMovQ.src);
-//ZZ return;
-//ZZ case ARMin_Add32:
-//ZZ i->ARMin.Add32.rD = lookupHRegRemap(m, i->ARMin.Add32.rD);
-//ZZ i->ARMin.Add32.rN = lookupHRegRemap(m, i->ARMin.Add32.rN);
-//ZZ return;
case ARM64in_EvCheck:
/* We expect both amodes only to mention x21, so this is in
fact pointless, since x21 isn't allocatable, but
@@ -3902,42 +2737,6 @@
#define XX______(zzx7,zzx6) \
((((zzx7) & 0xF) << 28) | (((zzx6) & 0xF) << 24))
*/
-//ZZ /* Generate a skeletal insn that involves an a RI84 shifter operand.
-//ZZ Returns a word which is all zeroes apart from bits 25 and 11..0,
-//ZZ since it is those that encode the shifter operand (at least to the
-//ZZ extent that we care about it.) */
-//ZZ static UInt skeletal_RI84 ( ARMRI84* ri )
-//ZZ {
-//ZZ UInt instr;
-//ZZ if (ri->tag == ARMri84_I84) {
-//ZZ vassert(0 == (ri->ARMri84.I84.imm4 & ~0x0F));
-//ZZ vassert(0 == (ri->ARMri84.I84.imm8 & ~0xFF));
-//ZZ instr = 1 << 25;
-//ZZ instr |= (ri->ARMri84.I84.imm4 << 8);
-//ZZ instr |= ri->ARMri84.I84.imm8;
-//ZZ } else {
-//ZZ instr = 0 << 25;
-//ZZ instr |= iregNo(ri->ARMri84.R.reg);
-//ZZ }
-//ZZ return instr;
-//ZZ }
-//ZZ
-//ZZ /* Ditto for RI5. Resulting word is zeroes apart from bit 4 and bits
-//ZZ 11..7. */
-//ZZ static UInt skeletal_RI5 ( ARMRI5* ri )
-//ZZ {
-//ZZ UInt instr;
-//ZZ if (ri->tag == ARMri5_I5) {
-//ZZ UInt imm5 = ri->ARMri5.I5.imm5;
-//ZZ vassert(imm5 >= 1 && imm5 <= 31);
-//ZZ instr = 0 << 4;
-//ZZ instr |= imm5 << 7;
-//ZZ } else {
-//ZZ instr = 1 << 4;
-//ZZ instr |= iregNo(ri->ARMri5.R.reg) << 8;
-//ZZ }
-//ZZ return instr;
-//ZZ }
/* Get an immediate into a register, using only that register. */
@@ -4483,126 +3282,6 @@
i->ARM64in.LdSt8.amode );
goto done;
}
-//ZZ case ARMin_LdSt32:
-//ZZ case ARMin_LdSt8U: {
-//ZZ UInt bL, bB;
-//ZZ HReg rD;
-//ZZ ARMAMode1* am;
-//ZZ ARMCondCode cc;
-//ZZ if (i->tag == ARMin_LdSt32) {
-//ZZ bB = 0;
-//ZZ bL = i->ARMin.LdSt32.isLoad ? 1 : 0;
-//ZZ am = i->ARMin.LdSt32.amode;
-//ZZ rD = i->ARMin.LdSt32.rD;
-//ZZ cc = i->ARMin.LdSt32.cc;
-//ZZ } else {
-//ZZ bB = 1;
-//ZZ bL = i->ARMin.LdSt8U.isLoad ? 1 : 0;
-//ZZ am = i->ARMin.LdSt8U.amode;
-//ZZ rD = i->ARMin.LdSt8U.rD;
-//ZZ cc = i->ARMin.LdSt8U.cc;
-//ZZ }
-//ZZ vassert(cc != ARMcc_NV);
-//ZZ if (am->tag == ARMam1_RI) {
-//ZZ Int simm12;
-//ZZ UInt instr, bP;
-//ZZ if (am->ARMam1.RI.simm13 < 0) {
-//ZZ bP = 0;
-//ZZ simm12 = -am->ARMam1.RI.simm13;
-//ZZ } else {
-//ZZ bP = 1;
-//ZZ simm12 = am->ARMam1.RI.simm13;
-//ZZ }
-//ZZ vassert(simm12 >= 0 && simm12 <= 4095);
-//ZZ instr = XXXXX___(cc,X0101,BITS4(bP,bB,0,bL),
-//ZZ iregNo(am->ARMam1.RI.reg),
-//ZZ iregNo(rD));
-//ZZ instr |= simm12;
-//ZZ *p++ = instr;
-//ZZ goto done;
-//ZZ } else {
-//ZZ // RR case
-//ZZ goto bad;
-//ZZ }
-//ZZ }
-//ZZ case ARMin_LdSt16: {
-//ZZ HReg rD = i->ARMin.LdSt16.rD;
-//ZZ UInt bS = i->ARMin.LdSt16.signedLoad ? 1 : 0;
-//ZZ UInt bL = i->ARMin.LdSt16.isLoad ? 1 : 0;
-//ZZ ARMAMode2* am = i->ARMin.LdSt16.amode;
-//ZZ ARMCondCode cc = i->ARMin.LdSt16.cc;
-//ZZ vassert(cc != ARMcc_NV);
-//ZZ if (am->tag == ARMam2_RI) {
-//ZZ HReg rN = am->ARMam2.RI.reg;
-//ZZ Int simm8;
-//ZZ UInt bP, imm8hi, imm8lo, instr;
-//ZZ if (am->ARMam2.RI.simm9 < 0) {
-//ZZ bP = 0;
-//ZZ simm8 = -am->ARMam2.RI.simm9;
-//ZZ } else {
-//ZZ bP = 1;
-//ZZ simm8 = am->ARMam2.RI.simm9;
-//ZZ }
-//ZZ vassert(simm8 >= 0 && simm8 <= 255);
-//ZZ imm8hi = (simm8 >> 4) & 0xF;
-//ZZ imm8lo = simm8 & 0xF;
-//ZZ vassert(!(bL == 0 && bS == 1)); // "! signed store"
-//ZZ /**/ if (bL == 0 && bS == 0) {
-//ZZ // strh
-//ZZ instr = XXXXXXXX(cc,X0001, BITS4(bP,1,0,0), iregNo(rN),
-//ZZ iregNo(rD), imm8hi, X1011, imm8lo);
-//ZZ *p++ = instr;
-//ZZ goto done;
-//ZZ }
-//ZZ else if (bL == 1 && bS == 0) {
-//ZZ // ldrh
-//ZZ instr = XXXXXXXX(cc,X0001, BITS4(bP,1,0,1), iregNo(rN),
-//ZZ iregNo(rD), imm8hi, X1011, imm8lo);
-//ZZ *p++ = instr;
-//ZZ goto done;
-//ZZ }
-//ZZ else if (bL == 1 && bS == 1) {
-//ZZ // ldrsh
-//ZZ instr = XXXXXXXX(cc,X0001, BITS4(bP,1,0,1), iregNo(rN),
-//ZZ iregNo(rD), imm8hi, X1111, imm8lo);
-//ZZ *p++ = instr;
-//ZZ goto done;
-//ZZ }
-//ZZ else vassert(0); // ill-constructed insn
-//ZZ } else {
-//ZZ // RR case
-//ZZ goto bad;
-//ZZ }
-//ZZ }
-//ZZ case ARMin_Ld8S: {
-//ZZ HReg rD = i->ARMin.Ld8S.rD;
-//ZZ ARMAMode2* am = i->ARMin.Ld8S.amode;
-//ZZ ARMCondCode cc = i->ARMin.Ld8S.cc;
-//ZZ vassert(cc != ARMcc_NV);
-//ZZ if (am->tag == ARMam2_RI) {
-//ZZ HReg rN = am->ARMam2.RI.reg;
-//ZZ Int simm8;
-//ZZ UInt bP, imm8hi, imm8lo, instr;
-//ZZ if (am->ARMam2.RI.simm9 < 0) {
-//ZZ bP = 0;
-//ZZ simm8 = -am->ARMam2.RI.simm9;
-//ZZ } else {
-//ZZ bP = 1;
-//ZZ simm8 = am->ARMam2.RI.simm9;
-//ZZ }
-//ZZ vassert(simm8 >= 0 && simm8 <= 255);
-//ZZ imm8hi = (simm8 >> 4) & 0xF;
-//ZZ imm8lo = simm8 & 0xF;
-//ZZ // ldrsb
-//ZZ instr = XXXXXXXX(cc,X0001, BITS4(bP,1,0,1), iregNo(rN),
-//ZZ iregNo(rD), imm8hi, X1101, imm8lo);
-//ZZ *p++ = instr;
-//ZZ goto done;
-//ZZ } else {
-//ZZ // RR case
-//ZZ goto bad;
-//ZZ }
-//ZZ }
case ARM64in_XDirect: {
/* NB: what goes on here has to be very closely coordinated
@@ -6074,878 +4753,6 @@
X000000 | (imm4 << 1), vN, vD);
goto done;
}
-//ZZ case ARMin_VAluS: {
-//ZZ UInt dN = fregNo(i->ARMin.VAluS.argL);
-//ZZ UInt dD = fregNo(i->ARMin.VAluS.dst);
-//ZZ UInt dM = fregNo(i->ARMin.VAluS.argR);
-//ZZ UInt bN = dN & 1;
-//ZZ UInt bD = dD & 1;
-//ZZ UInt bM = dM & 1;
-//ZZ UInt pqrs = X1111; /* undefined */
-//ZZ switch (i->ARMin.VAluS.op) {
-//ZZ case ARMvfp_ADD: pqrs = X0110; break;
-//ZZ case ARMvfp_SUB: pqrs = X0111; break;
-//ZZ case ARMvfp_MUL: pqrs = X0100; break;
-//ZZ case ARMvfp_DIV: pqrs = X1000; break;
-//ZZ default: goto bad;
-//ZZ }
-//ZZ vassert(pqrs != X1111);
-//ZZ UInt bP = (pqrs >> 3) & 1;
-//ZZ UInt bQ = (pqrs >> 2) & 1;
-//ZZ UInt bR = (pqrs >> 1) & 1;
-//ZZ UInt bS = (pqrs >> 0) & 1;
-//ZZ UInt insn = XXXXXXXX(0xE, X1110, BITS4(bP,bD,bQ,bR),
-//ZZ (dN >> 1), (dD >> 1),
-//ZZ X1010, BITS4(bN,bS,bM,0), (dM >> 1));
-//ZZ *p++ = insn;
-//ZZ goto done;
-//ZZ }
-//ZZ case ARMin_VUnaryS: {
-//ZZ UInt fD = fregNo(i->ARMin.VUnaryS.dst);
-//ZZ UInt fM = fregNo(i->ARMin.VUnaryS.src);
-//ZZ UInt insn = 0;
-//ZZ switch (i->ARMin.VUnaryS.op) {
-//ZZ case ARMvfpu_COPY:
-//ZZ insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0000,
-//ZZ (fD >> 1), X1010, BITS4(0,1,(fM & 1),0),
-//ZZ (fM >> 1));
-//ZZ break;
-//ZZ case ARMvfpu_ABS:
-//ZZ insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0000,
-//ZZ (fD >> 1), X1010, BITS4(1,1,(fM & 1),0),
-//ZZ (fM >> 1));
-//ZZ break;
-//ZZ case ARMvfpu_NEG:
-//ZZ insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0001,
-//ZZ (fD >> 1), X1010, BITS4(0,1,(fM & 1),0),
-//ZZ (fM >> 1));
-//ZZ break;
-//ZZ case ARMvfpu_SQRT:
-//ZZ insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0001,
-//ZZ (fD >> 1), X1010, BITS4(1,1,(fM & 1),0),
-//ZZ (fM >> 1));
-//ZZ break;
-//ZZ default:
-//ZZ goto bad;
-//ZZ }
-//ZZ *p++ = insn;
-//ZZ goto done;
-//ZZ }
-//ZZ case ARMin_VCMovD: {
-//ZZ UInt cc = (UInt)i->ARMin.VCMovD.cond;
-//ZZ UInt dD = dregNo(i->ARMin.VCMovD.dst);
-//ZZ UInt dM = dregNo(i->ARMin.VCMovD.src);
-//ZZ vassert(cc < 16 && cc != ARMcc_AL);
-//ZZ UInt insn = XXXXXXXX(cc, X1110,X1011,X0000,dD,X1011,X0100,dM);
-//ZZ *p++ = insn;
-//ZZ goto done;
-//ZZ }
-//ZZ case ARMin_VCMovS: {
-//ZZ UInt cc = (UInt)i->ARMin.VCMovS.cond;
-//ZZ UInt fD = fregNo(i->ARMin.VCMovS.dst);
-//ZZ UInt fM = fregNo(i->ARMin.VCMovS.src);
-//ZZ vassert(cc < 16 && cc != ARMcc_AL);
-//ZZ UInt insn = XXXXXXXX(cc, X1110, BITS4(1,(fD & 1),1,1),
-//ZZ X0000,(fD >> 1),X1010,
-//ZZ BITS4(0,1,(fM & 1),0), (fM >> 1));
-//ZZ *p++ = insn;
-//ZZ goto done;
-//ZZ }
-//ZZ case ARMin_VXferD: {
-//ZZ UInt dD = dregNo(i->ARMin.VXferD.dD);
-//ZZ UInt rHi = iregNo(i->ARMin.VXferD.rHi);
-//ZZ UInt rLo = iregNo(i->ARMin.VXferD.rLo);
-//ZZ /* vmov dD, rLo, rHi is
-//ZZ E C 4 rHi rLo B (0,0,dD[4],1) dD[3:0]
-//ZZ vmov rLo, rHi, dD is
-//ZZ ...
[truncated message content] |
|
From: <sv...@va...> - 2014-08-15 09:12:35
|
Author: sewardj
Date: Fri Aug 15 09:12:28 2014
New Revision: 14282
Log:
Track vex r2924 (Renaming of Iop_QSalN*, Iop_QShlN* and Iop_QShlN*S)
Modified:
trunk/memcheck/mc_translate.c
trunk/memcheck/tests/vbit-test/irops.c
trunk/memcheck/tests/vbit-test/util.c
Modified: trunk/memcheck/mc_translate.c
==============================================================================
--- trunk/memcheck/mc_translate.c (original)
+++ trunk/memcheck/mc_translate.c Fri Aug 15 09:12:28 2014
@@ -2965,27 +2965,27 @@
case Iop_Sal64x1:
return binary64Ix1(mce, vatom1, vatom2);
- case Iop_QShlN8Sx8:
- case Iop_QShlN8x8:
- case Iop_QSalN8x8:
+ case Iop_QShlNsatSU8x8:
+ case Iop_QShlNsatUU8x8:
+ case Iop_QShlNsatSS8x8:
complainIfUndefined(mce, atom2, NULL);
return mkPCast8x8(mce, vatom1);
- case Iop_QShlN16Sx4:
- case Iop_QShlN16x4:
- case Iop_QSalN16x4:
+ case Iop_QShlNsatSU16x4:
+ case Iop_QShlNsatUU16x4:
+ case Iop_QShlNsatSS16x4:
complainIfUndefined(mce, atom2, NULL);
return mkPCast16x4(mce, vatom1);
- case Iop_QShlN32Sx2:
- case Iop_QShlN32x2:
- case Iop_QSalN32x2:
+ case Iop_QShlNsatSU32x2:
+ case Iop_QShlNsatUU32x2:
+ case Iop_QShlNsatSS32x2:
complainIfUndefined(mce, atom2, NULL);
return mkPCast32x2(mce, vatom1);
- case Iop_QShlN64Sx1:
- case Iop_QShlN64x1:
- case Iop_QSalN64x1:
+ case Iop_QShlNsatSU64x1:
+ case Iop_QShlNsatUU64x1:
+ case Iop_QShlNsatSS64x1:
complainIfUndefined(mce, atom2, NULL);
return mkPCast32x2(mce, vatom1);
@@ -3335,27 +3335,27 @@
case Iop_Add32F0x4:
return binary32F0x4(mce, vatom1, vatom2);
- case Iop_QShlN8Sx16:
- case Iop_QShlN8x16:
- case Iop_QSalN8x16:
+ case Iop_QShlNsatSU8x16:
+ case Iop_QShlNsatUU8x16:
+ case Iop_QShlNsatSS8x16:
complainIfUndefined(mce, atom2, NULL);
return mkPCast8x16(mce, vatom1);
- case Iop_QShlN16Sx8:
- case Iop_QShlN16x8:
- case Iop_QSalN16x8:
+ case Iop_QShlNsatSU16x8:
+ case Iop_QShlNsatUU16x8:
+ case Iop_QShlNsatSS16x8:
complainIfUndefined(mce, atom2, NULL);
return mkPCast16x8(mce, vatom1);
- case Iop_QShlN32Sx4:
- case Iop_QShlN32x4:
- case Iop_QSalN32x4:
+ case Iop_QShlNsatSU32x4:
+ case Iop_QShlNsatUU32x4:
+ case Iop_QShlNsatSS32x4:
complainIfUndefined(mce, atom2, NULL);
return mkPCast32x4(mce, vatom1);
- case Iop_QShlN64Sx2:
- case Iop_QShlN64x2:
- case Iop_QSalN64x2:
+ case Iop_QShlNsatSU64x2:
+ case Iop_QShlNsatUU64x2:
+ case Iop_QShlNsatSS64x2:
complainIfUndefined(mce, atom2, NULL);
return mkPCast32x4(mce, vatom1);
Modified: trunk/memcheck/tests/vbit-test/irops.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/irops.c (original)
+++ trunk/memcheck/tests/vbit-test/irops.c Fri Aug 15 09:12:28 2014
@@ -425,18 +425,18 @@
{ DEFOP(Iop_QSal16x4, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QSal32x2, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QSal64x1, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN8Sx8, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN16Sx4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN32Sx2, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN64Sx1, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN8x8, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN16x4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN32x2, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN64x1, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QSalN8x8, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QSalN16x4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QSalN32x2, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QSalN64x1, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSU8x8, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSU16x4, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSU32x2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSU64x1, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatUU8x8, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatUU16x4, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatUU32x2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatUU64x1, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSS8x8, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSS16x4, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSS32x2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSS64x1, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowBin16Sto8Ux8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowBin16Sto8Sx8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowBin32Sto16Sx4, UNDEF_UNKNOWN), },
@@ -802,18 +802,18 @@
{ DEFOP(Iop_QSal16x8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QSal32x4, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QSal64x2, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN8Sx16, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN16Sx8, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN32Sx4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN64Sx2, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN8x16, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN16x8, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN32x4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QShlN64x2, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QSalN8x16, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QSalN16x8, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QSalN32x4, UNDEF_UNKNOWN), },
- { DEFOP(Iop_QSalN64x2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSU8x16, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSU16x8, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSU32x4, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSU64x2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatUU8x16, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatUU16x8, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatUU32x4, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatUU64x2, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSS8x16, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSS16x8, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSS32x4, UNDEF_UNKNOWN), },
+ { DEFOP(Iop_QShlNsatSS64x2, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowBin16Sto8Ux16, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowBin32Sto16Ux8, UNDEF_UNKNOWN), },
{ DEFOP(Iop_QNarrowBin16Sto8Sx16, UNDEF_UNKNOWN), },
Modified: trunk/memcheck/tests/vbit-test/util.c
==============================================================================
--- trunk/memcheck/tests/vbit-test/util.c (original)
+++ trunk/memcheck/tests/vbit-test/util.c Fri Aug 15 09:12:28 2014
@@ -316,12 +316,12 @@
case Iop_ShlN32x2: case Iop_ShlN16x4: case Iop_ShlN8x8:
case Iop_ShrN32x2: case Iop_ShrN16x4: case Iop_ShrN8x8:
case Iop_SarN32x2: case Iop_SarN16x4: case Iop_SarN8x8:
- case Iop_QShlN8x8: case Iop_QShlN16x4:
- case Iop_QShlN32x2: case Iop_QShlN64x1:
- case Iop_QShlN8Sx8: case Iop_QShlN16Sx4:
- case Iop_QShlN32Sx2: case Iop_QShlN64Sx1:
- case Iop_QSalN8x8: case Iop_QSalN16x4:
- case Iop_QSalN32x2: case Iop_QSalN64x1:
+ case Iop_QShlNsatUU8x8: case Iop_QShlNsatUU16x4:
+ case Iop_QShlNsatUU32x2: case Iop_QShlNsatUU64x1:
+ case Iop_QShlNsatSU8x8: case Iop_QShlNsatSU16x4:
+ case Iop_QShlNsatSU32x2: case Iop_QShlNsatSU64x1:
+ case Iop_QShlNsatSS8x8: case Iop_QShlNsatSS16x4:
+ case Iop_QShlNsatSS32x2: case Iop_QShlNsatSS64x1:
BINARY(Ity_I64,Ity_I8, Ity_I64);
case Iop_Shl8: case Iop_Shr8: case Iop_Sar8:
@@ -733,12 +733,12 @@
case Iop_ShrN32x4: case Iop_ShrN64x2:
case Iop_SarN8x16: case Iop_SarN16x8:
case Iop_SarN32x4: case Iop_SarN64x2:
- case Iop_QShlN8x16: case Iop_QShlN16x8:
- case Iop_QShlN32x4: case Iop_QShlN64x2:
- case Iop_QShlN8Sx16: case Iop_QShlN16Sx8:
- case Iop_QShlN32Sx4: case Iop_QShlN64Sx2:
- case Iop_QSalN8x16: case Iop_QSalN16x8:
- case Iop_QSalN32x4: case Iop_QSalN64x2:
+ case Iop_QShlNsatUU8x16: case Iop_QShlNsatUU16x8:
+ case Iop_QShlNsatUU32x4: case Iop_QShlNsatUU64x2:
+ case Iop_QShlNsatSU8x16: case Iop_QShlNsatSU16x8:
+ case Iop_QShlNsatSU32x4: case Iop_QShlNsatSU64x2:
+ case Iop_QShlNsatSS8x16: case Iop_QShlNsatSS16x8:
+ case Iop_QShlNsatSS32x4: case Iop_QShlNsatSS64x2:
BINARY(Ity_V128,Ity_I8, Ity_V128);
case Iop_F32ToFixed32Ux4_RZ:
|
|
From: <sv...@va...> - 2014-08-15 09:11:21
|
Author: sewardj
Date: Fri Aug 15 09:11:08 2014
New Revision: 2924
Log:
Rename Iop_QSalN*, Iop_QShlN* and Iop_QShlN*S so as to more accurately
reflect what they actually do, which is a zero-fill shift left followed
by one of three flavours of saturation (S->S, U->U or S->U).
Modified:
trunk/priv/guest_arm64_toIR.c
trunk/priv/guest_arm_toIR.c
trunk/priv/host_arm64_isel.c
trunk/priv/host_arm_isel.c
trunk/priv/ir_defs.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Fri Aug 15 09:11:08 2014
@@ -921,23 +921,26 @@
return ops[sizeNarrow];
}
-static IROp mkVecQSHLNSATU2U ( UInt size ) {
+static IROp mkVecQSHLNSATUU ( UInt size ) {
const IROp ops[4]
- = { Iop_QShlN8x16, Iop_QShlN16x8, Iop_QShlN32x4, Iop_QShlN64x2 };
+ = { Iop_QShlNsatUU8x16, Iop_QShlNsatUU16x8,
+ Iop_QShlNsatUU32x4, Iop_QShlNsatUU64x2 };
vassert(size < 4);
return ops[size];
}
-static IROp mkVecQSHLNSATS2S ( UInt size ) {
+static IROp mkVecQSHLNSATSS ( UInt size ) {
const IROp ops[4]
- = { Iop_QSalN8x16, Iop_QSalN16x8, Iop_QSalN32x4, Iop_QSalN64x2 };
+ = { Iop_QShlNsatSS8x16, Iop_QShlNsatSS16x8,
+ Iop_QShlNsatSS32x4, Iop_QShlNsatSS64x2 };
vassert(size < 4);
return ops[size];
}
-static IROp mkVecQSHLNSATS2U ( UInt size ) {
+static IROp mkVecQSHLNSATSU ( UInt size ) {
const IROp ops[4]
- = { Iop_QShlN8Sx16, Iop_QShlN16Sx8, Iop_QShlN32Sx4, Iop_QShlN64Sx2 };
+ = { Iop_QShlNsatSU8x16, Iop_QShlNsatSU16x8,
+ Iop_QShlNsatSU32x4, Iop_QShlNsatSU64x2 };
vassert(size < 4);
return ops[size];
}
@@ -6609,7 +6612,7 @@
/* UQSHL */
if (vex_streq(nm, "uqshl")) {
- IROp qop = mkVecQSHLNSATU2U(size);
+ IROp qop = mkVecQSHLNSATUU(size);
assign(*res, binop(qop, mkexpr(src), mkU8(shift)));
if (shift == 0) {
/* No shift means no saturation. */
@@ -6629,7 +6632,7 @@
/* SQSHL */
if (vex_streq(nm, "sqshl")) {
- IROp qop = mkVecQSHLNSATS2S(size);
+ IROp qop = mkVecQSHLNSATSS(size);
assign(*res, binop(qop, mkexpr(src), mkU8(shift)));
if (shift == 0) {
/* No shift means no saturation. */
@@ -6657,7 +6660,7 @@
/* SQSHLU */
if (vex_streq(nm, "sqshlu")) {
- IROp qop = mkVecQSHLNSATS2U(size);
+ IROp qop = mkVecQSHLNSATSU(size);
assign(*res, binop(qop, mkexpr(src), mkU8(shift)));
if (shift == 0) {
/* If there's no shift, saturation depends on the top bit
Modified: trunk/priv/guest_arm_toIR.c
==============================================================================
--- trunk/priv/guest_arm_toIR.c (original)
+++ trunk/priv/guest_arm_toIR.c Fri Aug 15 09:11:08 2014
@@ -6257,19 +6257,19 @@
if (A & 1) {
switch (size) {
case 0:
- op = Q ? Iop_QShlN8x16 : Iop_QShlN8x8;
+ op = Q ? Iop_QShlNsatUU8x16 : Iop_QShlNsatUU8x8;
op_rev = Q ? Iop_ShrN8x16 : Iop_ShrN8x8;
break;
case 1:
- op = Q ? Iop_QShlN16x8 : Iop_QShlN16x4;
+ op = Q ? Iop_QShlNsatUU16x8 : Iop_QShlNsatUU16x4;
op_rev = Q ? Iop_ShrN16x8 : Iop_ShrN16x4;
break;
case 2:
- op = Q ? Iop_QShlN32x4 : Iop_QShlN32x2;
+ op = Q ? Iop_QShlNsatUU32x4 : Iop_QShlNsatUU32x2;
op_rev = Q ? Iop_ShrN32x4 : Iop_ShrN32x2;
break;
case 3:
- op = Q ? Iop_QShlN64x2 : Iop_QShlN64x1;
+ op = Q ? Iop_QShlNsatUU64x2 : Iop_QShlNsatUU64x1;
op_rev = Q ? Iop_ShrN64x2 : Iop_Shr64;
break;
default:
@@ -6281,19 +6281,19 @@
} else {
switch (size) {
case 0:
- op = Q ? Iop_QShlN8Sx16 : Iop_QShlN8Sx8;
+ op = Q ? Iop_QShlNsatSU8x16 : Iop_QShlNsatSU8x8;
op_rev = Q ? Iop_ShrN8x16 : Iop_ShrN8x8;
break;
case 1:
- op = Q ? Iop_QShlN16Sx8 : Iop_QShlN16Sx4;
+ op = Q ? Iop_QShlNsatSU16x8 : Iop_QShlNsatSU16x4;
op_rev = Q ? Iop_ShrN16x8 : Iop_ShrN16x4;
break;
case 2:
- op = Q ? Iop_QShlN32Sx4 : Iop_QShlN32Sx2;
+ op = Q ? Iop_QShlNsatSU32x4 : Iop_QShlNsatSU32x2;
op_rev = Q ? Iop_ShrN32x4 : Iop_ShrN32x2;
break;
case 3:
- op = Q ? Iop_QShlN64Sx2 : Iop_QShlN64Sx1;
+ op = Q ? Iop_QShlNsatSU64x2 : Iop_QShlNsatSU64x1;
op_rev = Q ? Iop_ShrN64x2 : Iop_Shr64;
break;
default:
@@ -6308,19 +6308,19 @@
return False;
switch (size) {
case 0:
- op = Q ? Iop_QSalN8x16 : Iop_QSalN8x8;
+ op = Q ? Iop_QShlNsatSS8x16 : Iop_QShlNsatSS8x8;
op_rev = Q ? Iop_SarN8x16 : Iop_SarN8x8;
break;
case 1:
- op = Q ? Iop_QSalN16x8 : Iop_QSalN16x4;
+ op = Q ? Iop_QShlNsatSS16x8 : Iop_QShlNsatSS16x4;
op_rev = Q ? Iop_SarN16x8 : Iop_SarN16x4;
break;
case 2:
- op = Q ? Iop_QSalN32x4 : Iop_QSalN32x2;
+ op = Q ? Iop_QShlNsatSS32x4 : Iop_QShlNsatSS32x2;
op_rev = Q ? Iop_SarN32x4 : Iop_SarN32x2;
break;
case 3:
- op = Q ? Iop_QSalN64x2 : Iop_QSalN64x1;
+ op = Q ? Iop_QShlNsatSS64x2 : Iop_QShlNsatSS64x1;
op_rev = Q ? Iop_SarN64x2 : Iop_Sar64;
break;
default:
Modified: trunk/priv/host_arm64_isel.c
==============================================================================
--- trunk/priv/host_arm64_isel.c (original)
+++ trunk/priv/host_arm64_isel.c Fri Aug 15 09:11:08 2014
@@ -3316,10 +3316,10 @@
//ZZ res, argL, size, False));
//ZZ return res;
//ZZ }
-//ZZ case Iop_QSalN8x8:
-//ZZ case Iop_QSalN16x4:
-//ZZ case Iop_QSalN32x2:
-//ZZ case Iop_QSalN64x1: {
+//ZZ case Iop_QShlNsatSS8x8:
+//ZZ case Iop_QShlNsatSS16x4:
+//ZZ case Iop_QShlNsatSS32x2:
+//ZZ case Iop_QShlNsatSS64x1: {
//ZZ HReg res = newVRegD(env);
//ZZ HReg argL = iselNeon64Expr(env, e->Iex.Binop.arg1);
//ZZ UInt size, imm;
@@ -3330,10 +3330,10 @@
//ZZ }
//ZZ imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8;
//ZZ switch (e->Iex.Binop.op) {
-//ZZ case Iop_QSalN8x8: size = 8 | imm; break;
-//ZZ case Iop_QSalN16x4: size = 16 | imm; break;
-//ZZ case Iop_QSalN32x2: size = 32 | imm; break;
-//ZZ case Iop_QSalN64x1: size = 64 | imm; break;
+//ZZ case Iop_QShlNsatSS8x8: size = 8 | imm; break;
+//ZZ case Iop_QShlNsatSS16x4: size = 16 | imm; break;
+//ZZ case Iop_QShlNsatSS32x2: size = 32 | imm; break;
+//ZZ case Iop_QShlNsatSS64x1: size = 64 | imm; break;
//ZZ default: vassert(0);
//ZZ }
//ZZ addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNSS,
@@ -5580,10 +5580,10 @@
//ZZ res, argL, size, True));
//ZZ return res;
//ZZ }
-//ZZ case Iop_QSalN8x16:
-//ZZ case Iop_QSalN16x8:
-//ZZ case Iop_QSalN32x4:
-//ZZ case Iop_QSalN64x2: {
+//ZZ case Iop_QShlNsatSS8x16:
+//ZZ case Iop_QShlNsatSS16x8:
+//ZZ case Iop_QShlNsatSS32x4:
+//ZZ case Iop_QShlNsatSS64x2: {
//ZZ HReg res = newVRegV(env);
//ZZ HReg argL = iselNeonExpr(env, e->Iex.Binop.arg1);
//ZZ UInt size, imm;
@@ -5594,10 +5594,10 @@
//ZZ }
//ZZ imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8;
//ZZ switch (e->Iex.Binop.op) {
-//ZZ case Iop_QSalN8x16: size = 8 | imm; break;
-//ZZ case Iop_QSalN16x8: size = 16 | imm; break;
-//ZZ case Iop_QSalN32x4: size = 32 | imm; break;
-//ZZ case Iop_QSalN64x2: size = 64 | imm; break;
+//ZZ case Iop_QShlNsatSS8x16: size = 8 | imm; break;
+//ZZ case Iop_QShlNsatSS16x8: size = 16 | imm; break;
+//ZZ case Iop_QShlNsatSS32x4: size = 32 | imm; break;
+//ZZ case Iop_QShlNsatSS64x2: size = 64 | imm; break;
//ZZ default: vassert(0);
//ZZ }
//ZZ addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNSS,
@@ -5610,12 +5610,12 @@
case Iop_SarN16x8: case Iop_SarN8x16:
case Iop_ShlN64x2: case Iop_ShlN32x4:
case Iop_ShlN16x8: case Iop_ShlN8x16:
- case Iop_QShlN64x2: case Iop_QShlN32x4:
- case Iop_QShlN16x8: case Iop_QShlN8x16:
- case Iop_QSalN64x2: case Iop_QSalN32x4:
- case Iop_QSalN16x8: case Iop_QSalN8x16:
- case Iop_QShlN64Sx2: case Iop_QShlN32Sx4:
- case Iop_QShlN16Sx8: case Iop_QShlN8Sx16:
+ case Iop_QShlNsatUU64x2: case Iop_QShlNsatUU32x4:
+ case Iop_QShlNsatUU16x8: case Iop_QShlNsatUU8x16:
+ case Iop_QShlNsatSS64x2: case Iop_QShlNsatSS32x4:
+ case Iop_QShlNsatSS16x8: case Iop_QShlNsatSS8x16:
+ case Iop_QShlNsatSU64x2: case Iop_QShlNsatSU32x4:
+ case Iop_QShlNsatSU16x8: case Iop_QShlNsatSU8x16:
{
IRExpr* argL = e->Iex.Binop.arg1;
IRExpr* argR = e->Iex.Binop.arg2;
@@ -5626,58 +5626,58 @@
ARM64VecShiftOp op = ARM64vecsh_INVALID;
/* Establish the instruction to use. */
switch (e->Iex.Binop.op) {
- case Iop_ShrN64x2: op = ARM64vecsh_USHR64x2; break;
- case Iop_ShrN32x4: op = ARM64vecsh_USHR32x4; break;
- case Iop_ShrN16x8: op = ARM64vecsh_USHR16x8; break;
- case Iop_ShrN8x16: op = ARM64vecsh_USHR8x16; break;
- case Iop_SarN64x2: op = ARM64vecsh_SSHR64x2; break;
- case Iop_SarN32x4: op = ARM64vecsh_SSHR32x4; break;
- case Iop_SarN16x8: op = ARM64vecsh_SSHR16x8; break;
- case Iop_SarN8x16: op = ARM64vecsh_SSHR8x16; break;
- case Iop_ShlN64x2: op = ARM64vecsh_SHL64x2; break;
- case Iop_ShlN32x4: op = ARM64vecsh_SHL32x4; break;
- case Iop_ShlN16x8: op = ARM64vecsh_SHL16x8; break;
- case Iop_ShlN8x16: op = ARM64vecsh_SHL8x16; break;
- case Iop_QShlN64x2: op = ARM64vecsh_UQSHL64x2; break;
- case Iop_QShlN32x4: op = ARM64vecsh_UQSHL32x4; break;
- case Iop_QShlN16x8: op = ARM64vecsh_UQSHL16x8; break;
- case Iop_QShlN8x16: op = ARM64vecsh_UQSHL8x16; break;
- case Iop_QSalN64x2: op = ARM64vecsh_SQSHL64x2; break;
- case Iop_QSalN32x4: op = ARM64vecsh_SQSHL32x4; break;
- case Iop_QSalN16x8: op = ARM64vecsh_SQSHL16x8; break;
- case Iop_QSalN8x16: op = ARM64vecsh_SQSHL8x16; break;
- case Iop_QShlN64Sx2: op = ARM64vecsh_SQSHLU64x2; break;
- case Iop_QShlN32Sx4: op = ARM64vecsh_SQSHLU32x4; break;
- case Iop_QShlN16Sx8: op = ARM64vecsh_SQSHLU16x8; break;
- case Iop_QShlN8Sx16: op = ARM64vecsh_SQSHLU8x16; break;
+ case Iop_ShrN64x2: op = ARM64vecsh_USHR64x2; break;
+ case Iop_ShrN32x4: op = ARM64vecsh_USHR32x4; break;
+ case Iop_ShrN16x8: op = ARM64vecsh_USHR16x8; break;
+ case Iop_ShrN8x16: op = ARM64vecsh_USHR8x16; break;
+ case Iop_SarN64x2: op = ARM64vecsh_SSHR64x2; break;
+ case Iop_SarN32x4: op = ARM64vecsh_SSHR32x4; break;
+ case Iop_SarN16x8: op = ARM64vecsh_SSHR16x8; break;
+ case Iop_SarN8x16: op = ARM64vecsh_SSHR8x16; break;
+ case Iop_ShlN64x2: op = ARM64vecsh_SHL64x2; break;
+ case Iop_ShlN32x4: op = ARM64vecsh_SHL32x4; break;
+ case Iop_ShlN16x8: op = ARM64vecsh_SHL16x8; break;
+ case Iop_ShlN8x16: op = ARM64vecsh_SHL8x16; break;
+ case Iop_QShlNsatUU64x2: op = ARM64vecsh_UQSHL64x2; break;
+ case Iop_QShlNsatUU32x4: op = ARM64vecsh_UQSHL32x4; break;
+ case Iop_QShlNsatUU16x8: op = ARM64vecsh_UQSHL16x8; break;
+ case Iop_QShlNsatUU8x16: op = ARM64vecsh_UQSHL8x16; break;
+ case Iop_QShlNsatSS64x2: op = ARM64vecsh_SQSHL64x2; break;
+ case Iop_QShlNsatSS32x4: op = ARM64vecsh_SQSHL32x4; break;
+ case Iop_QShlNsatSS16x8: op = ARM64vecsh_SQSHL16x8; break;
+ case Iop_QShlNsatSS8x16: op = ARM64vecsh_SQSHL8x16; break;
+ case Iop_QShlNsatSU64x2: op = ARM64vecsh_SQSHLU64x2; break;
+ case Iop_QShlNsatSU32x4: op = ARM64vecsh_SQSHLU32x4; break;
+ case Iop_QShlNsatSU16x8: op = ARM64vecsh_SQSHLU16x8; break;
+ case Iop_QShlNsatSU8x16: op = ARM64vecsh_SQSHLU8x16; break;
default: vassert(0);
}
/* Establish the shift limits, for sanity check purposes only. */
switch (e->Iex.Binop.op) {
- case Iop_ShrN64x2: limLo = 1; limHi = 64; break;
- case Iop_ShrN32x4: limLo = 1; limHi = 32; break;
- case Iop_ShrN16x8: limLo = 1; limHi = 16; break;
- case Iop_ShrN8x16: limLo = 1; limHi = 8; break;
- case Iop_SarN64x2: limLo = 1; limHi = 64; break;
- case Iop_SarN32x4: limLo = 1; limHi = 32; break;
- case Iop_SarN16x8: limLo = 1; limHi = 16; break;
- case Iop_SarN8x16: limLo = 1; limHi = 8; break;
- case Iop_ShlN64x2: limLo = 0; limHi = 63; break;
- case Iop_ShlN32x4: limLo = 0; limHi = 31; break;
- case Iop_ShlN16x8: limLo = 0; limHi = 15; break;
- case Iop_ShlN8x16: limLo = 0; limHi = 7; break;
- case Iop_QShlN64x2: limLo = 0; limHi = 63; break;
- case Iop_QShlN32x4: limLo = 0; limHi = 31; break;
- case Iop_QShlN16x8: limLo = 0; limHi = 15; break;
- case Iop_QShlN8x16: limLo = 0; limHi = 7; break;
- case Iop_QSalN64x2: limLo = 0; limHi = 63; break;
- case Iop_QSalN32x4: limLo = 0; limHi = 31; break;
- case Iop_QSalN16x8: limLo = 0; limHi = 15; break;
- case Iop_QSalN8x16: limLo = 0; limHi = 7; break;
- case Iop_QShlN64Sx2: limLo = 0; limHi = 63; break;
- case Iop_QShlN32Sx4: limLo = 0; limHi = 31; break;
- case Iop_QShlN16Sx8: limLo = 0; limHi = 15; break;
- case Iop_QShlN8Sx16: limLo = 0; limHi = 7; break;
+ case Iop_ShrN64x2: limLo = 1; limHi = 64; break;
+ case Iop_ShrN32x4: limLo = 1; limHi = 32; break;
+ case Iop_ShrN16x8: limLo = 1; limHi = 16; break;
+ case Iop_ShrN8x16: limLo = 1; limHi = 8; break;
+ case Iop_SarN64x2: limLo = 1; limHi = 64; break;
+ case Iop_SarN32x4: limLo = 1; limHi = 32; break;
+ case Iop_SarN16x8: limLo = 1; limHi = 16; break;
+ case Iop_SarN8x16: limLo = 1; limHi = 8; break;
+ case Iop_ShlN64x2: limLo = 0; limHi = 63; break;
+ case Iop_ShlN32x4: limLo = 0; limHi = 31; break;
+ case Iop_ShlN16x8: limLo = 0; limHi = 15; break;
+ case Iop_ShlN8x16: limLo = 0; limHi = 7; break;
+ case Iop_QShlNsatUU64x2: limLo = 0; limHi = 63; break;
+ case Iop_QShlNsatUU32x4: limLo = 0; limHi = 31; break;
+ case Iop_QShlNsatUU16x8: limLo = 0; limHi = 15; break;
+ case Iop_QShlNsatUU8x16: limLo = 0; limHi = 7; break;
+ case Iop_QShlNsatSS64x2: limLo = 0; limHi = 63; break;
+ case Iop_QShlNsatSS32x4: limLo = 0; limHi = 31; break;
+ case Iop_QShlNsatSS16x8: limLo = 0; limHi = 15; break;
+ case Iop_QShlNsatSS8x16: limLo = 0; limHi = 7; break;
+ case Iop_QShlNsatSU64x2: limLo = 0; limHi = 63; break;
+ case Iop_QShlNsatSU32x4: limLo = 0; limHi = 31; break;
+ case Iop_QShlNsatSU16x8: limLo = 0; limHi = 15; break;
+ case Iop_QShlNsatSU8x16: limLo = 0; limHi = 7; break;
default: vassert(0);
}
/* For left shifts, the allowable amt values are
Modified: trunk/priv/host_arm_isel.c
==============================================================================
--- trunk/priv/host_arm_isel.c (original)
+++ trunk/priv/host_arm_isel.c Fri Aug 15 09:11:08 2014
@@ -2672,72 +2672,72 @@
res, argL, argR, size, False));
return res;
}
- case Iop_QShlN8x8:
- case Iop_QShlN16x4:
- case Iop_QShlN32x2:
- case Iop_QShlN64x1: {
+ case Iop_QShlNsatUU8x8:
+ case Iop_QShlNsatUU16x4:
+ case Iop_QShlNsatUU32x2:
+ case Iop_QShlNsatUU64x1: {
HReg res = newVRegD(env);
HReg argL = iselNeon64Expr(env, e->Iex.Binop.arg1);
UInt size, imm;
if (e->Iex.Binop.arg2->tag != Iex_Const ||
typeOfIRExpr(env->type_env, e->Iex.Binop.arg2) != Ity_I8) {
- vpanic("ARM taget supports Iop_QShlNAxB with constant "
+ vpanic("ARM target supports Iop_QShlNsatUUAxB with constant "
"second argument only\n");
}
imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8;
switch (e->Iex.Binop.op) {
- case Iop_QShlN8x8: size = 8 | imm; break;
- case Iop_QShlN16x4: size = 16 | imm; break;
- case Iop_QShlN32x2: size = 32 | imm; break;
- case Iop_QShlN64x1: size = 64 | imm; break;
+ case Iop_QShlNsatUU8x8: size = 8 | imm; break;
+ case Iop_QShlNsatUU16x4: size = 16 | imm; break;
+ case Iop_QShlNsatUU32x2: size = 32 | imm; break;
+ case Iop_QShlNsatUU64x1: size = 64 | imm; break;
default: vassert(0);
}
addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNUU,
res, argL, size, False));
return res;
}
- case Iop_QShlN8Sx8:
- case Iop_QShlN16Sx4:
- case Iop_QShlN32Sx2:
- case Iop_QShlN64Sx1: {
+ case Iop_QShlNsatSU8x8:
+ case Iop_QShlNsatSU16x4:
+ case Iop_QShlNsatSU32x2:
+ case Iop_QShlNsatSU64x1: {
HReg res = newVRegD(env);
HReg argL = iselNeon64Expr(env, e->Iex.Binop.arg1);
UInt size, imm;
if (e->Iex.Binop.arg2->tag != Iex_Const ||
typeOfIRExpr(env->type_env, e->Iex.Binop.arg2) != Ity_I8) {
- vpanic("ARM taget supports Iop_QShlNAxB with constant "
+ vpanic("ARM target supports Iop_QShlNsatSUAxB with constant "
"second argument only\n");
}
imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8;
switch (e->Iex.Binop.op) {
- case Iop_QShlN8Sx8: size = 8 | imm; break;
- case Iop_QShlN16Sx4: size = 16 | imm; break;
- case Iop_QShlN32Sx2: size = 32 | imm; break;
- case Iop_QShlN64Sx1: size = 64 | imm; break;
+ case Iop_QShlNsatSU8x8: size = 8 | imm; break;
+ case Iop_QShlNsatSU16x4: size = 16 | imm; break;
+ case Iop_QShlNsatSU32x2: size = 32 | imm; break;
+ case Iop_QShlNsatSU64x1: size = 64 | imm; break;
default: vassert(0);
}
addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNUS,
res, argL, size, False));
return res;
}
- case Iop_QSalN8x8:
- case Iop_QSalN16x4:
- case Iop_QSalN32x2:
- case Iop_QSalN64x1: {
+ case Iop_QShlNsatSS8x8:
+ case Iop_QShlNsatSS16x4:
+ case Iop_QShlNsatSS32x2:
+ case Iop_QShlNsatSS64x1: {
HReg res = newVRegD(env);
HReg argL = iselNeon64Expr(env, e->Iex.Binop.arg1);
UInt size, imm;
if (e->Iex.Binop.arg2->tag != Iex_Const ||
typeOfIRExpr(env->type_env, e->Iex.Binop.arg2) != Ity_I8) {
- vpanic("ARM taget supports Iop_QShlNAxB with constant "
+ vpanic("ARM target supports Iop_QShlNsatSSAxB with constant "
"second argument only\n");
}
imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8;
switch (e->Iex.Binop.op) {
- case Iop_QSalN8x8: size = 8 | imm; break;
- case Iop_QSalN16x4: size = 16 | imm; break;
- case Iop_QSalN32x2: size = 32 | imm; break;
- case Iop_QSalN64x1: size = 64 | imm; break;
+ case Iop_QShlNsatSS8x8: size = 8 | imm; break;
+ case Iop_QShlNsatSS16x4: size = 16 | imm; break;
+ case Iop_QShlNsatSS32x2: size = 32 | imm; break;
+ case Iop_QShlNsatSS64x1: size = 64 | imm; break;
default: vassert(0);
}
addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNSS,
@@ -4842,72 +4842,72 @@
res, argL, argR, size, True));
return res;
}
- case Iop_QShlN8x16:
- case Iop_QShlN16x8:
- case Iop_QShlN32x4:
- case Iop_QShlN64x2: {
+ case Iop_QShlNsatUU8x16:
+ case Iop_QShlNsatUU16x8:
+ case Iop_QShlNsatUU32x4:
+ case Iop_QShlNsatUU64x2: {
HReg res = newVRegV(env);
HReg argL = iselNeonExpr(env, e->Iex.Binop.arg1);
UInt size, imm;
if (e->Iex.Binop.arg2->tag != Iex_Const ||
typeOfIRExpr(env->type_env, e->Iex.Binop.arg2) != Ity_I8) {
- vpanic("ARM taget supports Iop_QShlNAxB with constant "
+ vpanic("ARM target supports Iop_QShlNsatUUAxB with constant "
"second argument only\n");
}
imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8;
switch (e->Iex.Binop.op) {
- case Iop_QShlN8x16: size = 8 | imm; break;
- case Iop_QShlN16x8: size = 16 | imm; break;
- case Iop_QShlN32x4: size = 32 | imm; break;
- case Iop_QShlN64x2: size = 64 | imm; break;
+ case Iop_QShlNsatUU8x16: size = 8 | imm; break;
+ case Iop_QShlNsatUU16x8: size = 16 | imm; break;
+ case Iop_QShlNsatUU32x4: size = 32 | imm; break;
+ case Iop_QShlNsatUU64x2: size = 64 | imm; break;
default: vassert(0);
}
addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNUU,
res, argL, size, True));
return res;
}
- case Iop_QShlN8Sx16:
- case Iop_QShlN16Sx8:
- case Iop_QShlN32Sx4:
- case Iop_QShlN64Sx2: {
+ case Iop_QShlNsatSU8x16:
+ case Iop_QShlNsatSU16x8:
+ case Iop_QShlNsatSU32x4:
+ case Iop_QShlNsatSU64x2: {
HReg res = newVRegV(env);
HReg argL = iselNeonExpr(env, e->Iex.Binop.arg1);
UInt size, imm;
if (e->Iex.Binop.arg2->tag != Iex_Const ||
typeOfIRExpr(env->type_env, e->Iex.Binop.arg2) != Ity_I8) {
- vpanic("ARM taget supports Iop_QShlNASxB with constant "
+ vpanic("ARM target supports Iop_QShlNsatSUAxB with constant "
"second argument only\n");
}
imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8;
switch (e->Iex.Binop.op) {
- case Iop_QShlN8Sx16: size = 8 | imm; break;
- case Iop_QShlN16Sx8: size = 16 | imm; break;
- case Iop_QShlN32Sx4: size = 32 | imm; break;
- case Iop_QShlN64Sx2: size = 64 | imm; break;
+ case Iop_QShlNsatSU8x16: size = 8 | imm; break;
+ case Iop_QShlNsatSU16x8: size = 16 | imm; break;
+ case Iop_QShlNsatSU32x4: size = 32 | imm; break;
+ case Iop_QShlNsatSU64x2: size = 64 | imm; break;
default: vassert(0);
}
addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNUS,
res, argL, size, True));
return res;
}
- case Iop_QSalN8x16:
- case Iop_QSalN16x8:
- case Iop_QSalN32x4:
- case Iop_QSalN64x2: {
+ case Iop_QShlNsatSS8x16:
+ case Iop_QShlNsatSS16x8:
+ case Iop_QShlNsatSS32x4:
+ case Iop_QShlNsatSS64x2: {
HReg res = newVRegV(env);
HReg argL = iselNeonExpr(env, e->Iex.Binop.arg1);
UInt size, imm;
if (e->Iex.Binop.arg2->tag != Iex_Const ||
typeOfIRExpr(env->type_env, e->Iex.Binop.arg2) != Ity_I8) {
- vpanic("ARM taget supports Iop_QShlNAxB with constant "
+ vpanic("ARM target supports Iop_QShlNsatSSAxB with constant "
"second argument only\n");
}
imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8;
switch (e->Iex.Binop.op) {
- case Iop_QSalN8x16: size = 8 | imm; break;
- case Iop_QSalN16x8: size = 16 | imm; break;
- case Iop_QSalN32x4: size = 32 | imm; break;
- case Iop_QSalN64x2: size = 64 | imm; break;
+ case Iop_QShlNsatSS8x16: size = 8 | imm; break;
+ case Iop_QShlNsatSS16x8: size = 16 | imm; break;
+ case Iop_QShlNsatSS32x4: size = 32 | imm; break;
+ case Iop_QShlNsatSS64x2: size = 64 | imm; break;
default: vassert(0);
}
addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNSS,
Modified: trunk/priv/ir_defs.c
==============================================================================
--- trunk/priv/ir_defs.c (original)
+++ trunk/priv/ir_defs.c Fri Aug 15 09:11:08 2014
@@ -559,18 +559,18 @@
case Iop_QSal16x4: vex_printf("QSal16x4"); return;
case Iop_QSal32x2: vex_printf("QSal32x2"); return;
case Iop_QSal64x1: vex_printf("QSal64x1"); return;
- case Iop_QShlN8x8: vex_printf("QShlN8x8"); return;
- case Iop_QShlN16x4: vex_printf("QShlN16x4"); return;
- case Iop_QShlN32x2: vex_printf("QShlN32x2"); return;
- case Iop_QShlN64x1: vex_printf("QShlN64x1"); return;
- case Iop_QShlN8Sx8: vex_printf("QShlN8Sx8"); return;
- case Iop_QShlN16Sx4: vex_printf("QShlN16Sx4"); return;
- case Iop_QShlN32Sx2: vex_printf("QShlN32Sx2"); return;
- case Iop_QShlN64Sx1: vex_printf("QShlN64Sx1"); return;
- case Iop_QSalN8x8: vex_printf("QSalN8x8"); return;
- case Iop_QSalN16x4: vex_printf("QSalN16x4"); return;
- case Iop_QSalN32x2: vex_printf("QSalN32x2"); return;
- case Iop_QSalN64x1: vex_printf("QSalN64x1"); return;
+ case Iop_QShlNsatUU8x8: vex_printf("QShlNsatUU8x8"); return;
+ case Iop_QShlNsatUU16x4: vex_printf("QShlNsatUU16x4"); return;
+ case Iop_QShlNsatUU32x2: vex_printf("QShlNsatUU32x2"); return;
+ case Iop_QShlNsatUU64x1: vex_printf("QShlNsatUU64x1"); return;
+ case Iop_QShlNsatSU8x8: vex_printf("QShlNsatSU8x8"); return;
+ case Iop_QShlNsatSU16x4: vex_printf("QShlNsatSU16x4"); return;
+ case Iop_QShlNsatSU32x2: vex_printf("QShlNsatSU32x2"); return;
+ case Iop_QShlNsatSU64x1: vex_printf("QShlNsatSU64x1"); return;
+ case Iop_QShlNsatSS8x8: vex_printf("QShlNsatSS8x8"); return;
+ case Iop_QShlNsatSS16x4: vex_printf("QShlNsatSS16x4"); return;
+ case Iop_QShlNsatSS32x2: vex_printf("QShlNsatSS32x2"); return;
+ case Iop_QShlNsatSS64x1: vex_printf("QShlNsatSS64x1"); return;
case Iop_Sar8x8: vex_printf("Sar8x8"); return;
case Iop_Sar16x4: vex_printf("Sar16x4"); return;
case Iop_Sar32x2: vex_printf("Sar32x2"); return;
@@ -874,18 +874,18 @@
case Iop_QShl16x8: vex_printf("QShl16x8"); return;
case Iop_QShl32x4: vex_printf("QShl32x4"); return;
case Iop_QShl64x2: vex_printf("QShl64x2"); return;
- case Iop_QSalN8x16: vex_printf("QSalN8x16"); return;
- case Iop_QSalN16x8: vex_printf("QSalN16x8"); return;
- case Iop_QSalN32x4: vex_printf("QSalN32x4"); return;
- case Iop_QSalN64x2: vex_printf("QSalN64x2"); return;
- case Iop_QShlN8x16: vex_printf("QShlN8x16"); return;
- case Iop_QShlN16x8: vex_printf("QShlN16x8"); return;
- case Iop_QShlN32x4: vex_printf("QShlN32x4"); return;
- case Iop_QShlN64x2: vex_printf("QShlN64x2"); return;
- case Iop_QShlN8Sx16: vex_printf("QShlN8Sx16"); return;
- case Iop_QShlN16Sx8: vex_printf("QShlN16Sx8"); return;
- case Iop_QShlN32Sx4: vex_printf("QShlN32Sx4"); return;
- case Iop_QShlN64Sx2: vex_printf("QShlN64Sx2"); return;
+ case Iop_QShlNsatSS8x16: vex_printf("QShlNsatSS8x16"); return;
+ case Iop_QShlNsatSS16x8: vex_printf("QShlNsatSS16x8"); return;
+ case Iop_QShlNsatSS32x4: vex_printf("QShlNsatSS32x4"); return;
+ case Iop_QShlNsatSS64x2: vex_printf("QShlNsatSS64x2"); return;
+ case Iop_QShlNsatUU8x16: vex_printf("QShlNsatUU8x16"); return;
+ case Iop_QShlNsatUU16x8: vex_printf("QShlNsatUU16x8"); return;
+ case Iop_QShlNsatUU32x4: vex_printf("QShlNsatUU32x4"); return;
+ case Iop_QShlNsatUU64x2: vex_printf("QShlNsatUU64x2"); return;
+ case Iop_QShlNsatSU8x16: vex_printf("QShlNsatSU8x16"); return;
+ case Iop_QShlNsatSU16x8: vex_printf("QShlNsatSU16x8"); return;
+ case Iop_QShlNsatSU32x4: vex_printf("QShlNsatSU32x4"); return;
+ case Iop_QShlNsatSU64x2: vex_printf("QShlNsatSU64x2"); return;
case Iop_Shr8x16: vex_printf("Shr8x16"); return;
case Iop_Shr16x8: vex_printf("Shr16x8"); return;
case Iop_Shr32x4: vex_printf("Shr32x4"); return;
@@ -2545,12 +2545,12 @@
case Iop_ShlN32x2: case Iop_ShlN16x4: case Iop_ShlN8x8:
case Iop_ShrN32x2: case Iop_ShrN16x4: case Iop_ShrN8x8:
case Iop_SarN32x2: case Iop_SarN16x4: case Iop_SarN8x8:
- case Iop_QShlN8x8: case Iop_QShlN16x4:
- case Iop_QShlN32x2: case Iop_QShlN64x1:
- case Iop_QShlN8Sx8: case Iop_QShlN16Sx4:
- case Iop_QShlN32Sx2: case Iop_QShlN64Sx1:
- case Iop_QSalN8x8: case Iop_QSalN16x4:
- case Iop_QSalN32x2: case Iop_QSalN64x1:
+ case Iop_QShlNsatUU8x8: case Iop_QShlNsatUU16x4:
+ case Iop_QShlNsatUU32x2: case Iop_QShlNsatUU64x1:
+ case Iop_QShlNsatSU8x8: case Iop_QShlNsatSU16x4:
+ case Iop_QShlNsatSU32x2: case Iop_QShlNsatSU64x1:
+ case Iop_QShlNsatSS8x8: case Iop_QShlNsatSS16x4:
+ case Iop_QShlNsatSS32x2: case Iop_QShlNsatSS64x1:
BINARY(Ity_I64,Ity_I8, Ity_I64);
case Iop_Shl8: case Iop_Shr8: case Iop_Sar8:
@@ -2983,12 +2983,12 @@
case Iop_ShrN32x4: case Iop_ShrN64x2:
case Iop_SarN8x16: case Iop_SarN16x8:
case Iop_SarN32x4: case Iop_SarN64x2:
- case Iop_QShlN8x16: case Iop_QShlN16x8:
- case Iop_QShlN32x4: case Iop_QShlN64x2:
- case Iop_QShlN8Sx16: case Iop_QShlN16Sx8:
- case Iop_QShlN32Sx4: case Iop_QShlN64Sx2:
- case Iop_QSalN8x16: case Iop_QSalN16x8:
- case Iop_QSalN32x4: case Iop_QSalN64x2:
+ case Iop_QShlNsatUU8x16: case Iop_QShlNsatUU16x8:
+ case Iop_QShlNsatUU32x4: case Iop_QShlNsatUU64x2:
+ case Iop_QShlNsatSU8x16: case Iop_QShlNsatSU16x8:
+ case Iop_QShlNsatSU32x4: case Iop_QShlNsatSU64x2:
+ case Iop_QShlNsatSS8x16: case Iop_QShlNsatSS16x8:
+ case Iop_QShlNsatSS32x4: case Iop_QShlNsatSS64x2:
case Iop_SHA256: case Iop_SHA512:
case Iop_QandQShrNnarrow16Uto8Ux8:
case Iop_QandQShrNnarrow32Uto16Ux4:
Modified: trunk/pub/libvex_ir.h
==============================================================================
--- trunk/pub/libvex_ir.h (original)
+++ trunk/pub/libvex_ir.h Fri Aug 15 09:11:08 2014
@@ -919,9 +919,12 @@
Iop_QShl8x8, Iop_QShl16x4, Iop_QShl32x2, Iop_QShl64x1,
Iop_QSal8x8, Iop_QSal16x4, Iop_QSal32x2, Iop_QSal64x1,
/* VECTOR x INTEGER SATURATING SHIFT */
- Iop_QShlN8Sx8, Iop_QShlN16Sx4, Iop_QShlN32Sx2, Iop_QShlN64Sx1,
- Iop_QShlN8x8, Iop_QShlN16x4, Iop_QShlN32x2, Iop_QShlN64x1,
- Iop_QSalN8x8, Iop_QSalN16x4, Iop_QSalN32x2, Iop_QSalN64x1,
+ Iop_QShlNsatSU8x8, Iop_QShlNsatSU16x4,
+ Iop_QShlNsatSU32x2, Iop_QShlNsatSU64x1,
+ Iop_QShlNsatUU8x8, Iop_QShlNsatUU16x4,
+ Iop_QShlNsatUU32x2, Iop_QShlNsatUU64x1,
+ Iop_QShlNsatSS8x8, Iop_QShlNsatSS16x4,
+ Iop_QShlNsatSS32x2, Iop_QShlNsatSS64x1,
/* NARROWING (binary)
-- narrow 2xI64 into 1xI64, hi half from left arg */
@@ -1534,9 +1537,12 @@
Iop_QShl8x16, Iop_QShl16x8, Iop_QShl32x4, Iop_QShl64x2,
Iop_QSal8x16, Iop_QSal16x8, Iop_QSal32x4, Iop_QSal64x2,
/* VECTOR x INTEGER SATURATING SHIFT */
- Iop_QShlN8Sx16, Iop_QShlN16Sx8, Iop_QShlN32Sx4, Iop_QShlN64Sx2,
- Iop_QShlN8x16, Iop_QShlN16x8, Iop_QShlN32x4, Iop_QShlN64x2,
- Iop_QSalN8x16, Iop_QSalN16x8, Iop_QSalN32x4, Iop_QSalN64x2,
+ Iop_QShlNsatSU8x16, Iop_QShlNsatSU16x8,
+ Iop_QShlNsatSU32x4, Iop_QShlNsatSU64x2,
+ Iop_QShlNsatUU8x16, Iop_QShlNsatUU16x8,
+ Iop_QShlNsatUU32x4, Iop_QShlNsatUU64x2,
+ Iop_QShlNsatSS8x16, Iop_QShlNsatSS16x8,
+ Iop_QShlNsatSS32x4, Iop_QShlNsatSS64x2,
/* VECTOR x VECTOR BIDIRECTIONAL SATURATING (& MAYBE ROUNDING) SHIFT */
/* The least significant 8 bits of each lane of the second
|
|
From: <sv...@va...> - 2014-08-15 05:40:04
|
Author: sewardj
Date: Fri Aug 15 05:39:42 2014
New Revision: 14281
Log:
arm64: enable test cases for:
{uqshl, sqshl, sqshlu} (vector, imm)
{uqshl, sqshl, sqshlu} (scalar, imm)
{uqshrn, sqrshrun, sqshrun} (scalar, imm)
Modified:
trunk/none/tests/arm64/fp_and_simd.c
Modified: trunk/none/tests/arm64/fp_and_simd.c
==============================================================================
--- trunk/none/tests/arm64/fp_and_simd.c (original)
+++ trunk/none/tests/arm64/fp_and_simd.c Fri Aug 15 05:39:42 2014
@@ -2540,7 +2540,9 @@
GEN_TWOVEC_TEST(sqshl_h_h_8, "sqshl h5, h28, #8", 5, 28)
GEN_TWOVEC_TEST(sqshl_h_h_15, "sqshl h5, h28, #15", 5, 28)
GEN_TWOVEC_TEST(sqshl_b_b_0, "sqshl b5, b28, #0", 5, 28)
+GEN_TWOVEC_TEST(sqshl_b_b_1, "sqshl b5, b28, #1", 5, 28)
GEN_TWOVEC_TEST(sqshl_b_b_4, "sqshl b5, b28, #4", 5, 28)
+GEN_TWOVEC_TEST(sqshl_b_b_6, "sqshl b5, b28, #6", 5, 28)
GEN_TWOVEC_TEST(sqshl_b_b_7, "sqshl b5, b28, #7", 5, 28)
GEN_TWOVEC_TEST(uqshl_d_d_0, "uqshl d5, d28, #0", 5, 28)
@@ -2553,7 +2555,9 @@
GEN_TWOVEC_TEST(uqshl_h_h_8, "uqshl h5, h28, #8", 5, 28)
GEN_TWOVEC_TEST(uqshl_h_h_15, "uqshl h5, h28, #15", 5, 28)
GEN_TWOVEC_TEST(uqshl_b_b_0, "uqshl b5, b28, #0", 5, 28)
+GEN_TWOVEC_TEST(uqshl_b_b_1, "uqshl b5, b28, #1", 5, 28)
GEN_TWOVEC_TEST(uqshl_b_b_4, "uqshl b5, b28, #4", 5, 28)
+GEN_TWOVEC_TEST(uqshl_b_b_6, "uqshl b5, b28, #6", 5, 28)
GEN_TWOVEC_TEST(uqshl_b_b_7, "uqshl b5, b28, #7", 5, 28)
GEN_TWOVEC_TEST(sqshlu_d_d_0, "sqshlu d5, d28, #0", 5, 28)
@@ -2566,7 +2570,12 @@
GEN_TWOVEC_TEST(sqshlu_h_h_8, "sqshlu h5, h28, #8", 5, 28)
GEN_TWOVEC_TEST(sqshlu_h_h_15, "sqshlu h5, h28, #15", 5, 28)
GEN_TWOVEC_TEST(sqshlu_b_b_0, "sqshlu b5, b28, #0", 5, 28)
+GEN_TWOVEC_TEST(sqshlu_b_b_1, "sqshlu b5, b28, #1", 5, 28)
+GEN_TWOVEC_TEST(sqshlu_b_b_2, "sqshlu b5, b28, #2", 5, 28)
+GEN_TWOVEC_TEST(sqshlu_b_b_3, "sqshlu b5, b28, #3", 5, 28)
GEN_TWOVEC_TEST(sqshlu_b_b_4, "sqshlu b5, b28, #4", 5, 28)
+GEN_TWOVEC_TEST(sqshlu_b_b_5, "sqshlu b5, b28, #5", 5, 28)
+GEN_TWOVEC_TEST(sqshlu_b_b_6, "sqshlu b5, b28, #6", 5, 28)
GEN_TWOVEC_TEST(sqshlu_b_b_7, "sqshlu b5, b28, #7", 5, 28)
GEN_TWOVEC_TEST(sqshl_2d_2d_0, "sqshl v6.2d, v27.2d, #0", 6, 27)
@@ -4529,60 +4538,60 @@
// uqshrn s_d, h_s, b_h #imm
// sqrshrun s_d, h_s, b_h #imm
// sqshrun s_d, h_s, b_h #imm
- if (0) test_sqrshrn_s_d_1(TyD);
- if (0) test_sqrshrn_s_d_17(TyD);
- if (0) test_sqrshrn_s_d_32(TyD);
- if (0) test_sqrshrn_h_s_1(TyS);
- if (0) test_sqrshrn_h_s_9(TyS);
- if (0) test_sqrshrn_h_s_16(TyS);
- if (0) test_sqrshrn_b_h_1(TyH);
- if (0) test_sqrshrn_b_h_4(TyH);
- if (0) test_sqrshrn_b_h_8(TyH);
- if (0) test_uqrshrn_s_d_1(TyD);
- if (0) test_uqrshrn_s_d_17(TyD);
- if (0) test_uqrshrn_s_d_32(TyD);
- if (0) test_uqrshrn_h_s_1(TyS);
- if (0) test_uqrshrn_h_s_9(TyS);
- if (0) test_uqrshrn_h_s_16(TyS);
- if (0) test_uqrshrn_b_h_1(TyH);
- if (0) test_uqrshrn_b_h_4(TyH);
- if (0) test_uqrshrn_b_h_8(TyH);
- if (0) test_sqshrn_s_d_1(TyD);
- if (0) test_sqshrn_s_d_17(TyD);
- if (0) test_sqshrn_s_d_32(TyD);
- if (0) test_sqshrn_h_s_1(TyS);
- if (0) test_sqshrn_h_s_9(TyS);
- if (0) test_sqshrn_h_s_16(TyS);
- if (0) test_sqshrn_b_h_1(TyH);
- if (0) test_sqshrn_b_h_4(TyH);
- if (0) test_sqshrn_b_h_8(TyH);
- if (0) test_uqshrn_s_d_1(TyD);
- if (0) test_uqshrn_s_d_17(TyD);
- if (0) test_uqshrn_s_d_32(TyD);
- if (0) test_uqshrn_h_s_1(TyS);
- if (0) test_uqshrn_h_s_9(TyS);
- if (0) test_uqshrn_h_s_16(TyS);
- if (0) test_uqshrn_b_h_1(TyH);
- if (0) test_uqshrn_b_h_4(TyH);
- if (0) test_uqshrn_b_h_8(TyH);
- if (0) test_sqrshrun_s_d_1(TyD);
- if (0) test_sqrshrun_s_d_17(TyD);
- if (0) test_sqrshrun_s_d_32(TyD);
- if (0) test_sqrshrun_h_s_1(TyS);
- if (0) test_sqrshrun_h_s_9(TyS);
- if (0) test_sqrshrun_h_s_16(TyS);
- if (0) test_sqrshrun_b_h_1(TyH);
- if (0) test_sqrshrun_b_h_4(TyH);
- if (0) test_sqrshrun_b_h_8(TyH);
- if (0) test_sqshrun_s_d_1(TyD);
- if (0) test_sqshrun_s_d_17(TyD);
- if (0) test_sqshrun_s_d_32(TyD);
- if (0) test_sqshrun_h_s_1(TyS);
- if (0) test_sqshrun_h_s_9(TyS);
- if (0) test_sqshrun_h_s_16(TyS);
- if (0) test_sqshrun_b_h_1(TyH);
- if (0) test_sqshrun_b_h_4(TyH);
- if (0) test_sqshrun_b_h_8(TyH);
+ if (1) test_sqrshrn_s_d_1(TyD);
+ if (1) test_sqrshrn_s_d_17(TyD);
+ if (1) test_sqrshrn_s_d_32(TyD);
+ if (1) test_sqrshrn_h_s_1(TyS);
+ if (1) test_sqrshrn_h_s_9(TyS);
+ if (1) test_sqrshrn_h_s_16(TyS);
+ if (1) test_sqrshrn_b_h_1(TyH);
+ if (1) test_sqrshrn_b_h_4(TyH);
+ if (1) test_sqrshrn_b_h_8(TyH);
+ if (1) test_uqrshrn_s_d_1(TyD);
+ if (1) test_uqrshrn_s_d_17(TyD);
+ if (1) test_uqrshrn_s_d_32(TyD);
+ if (1) test_uqrshrn_h_s_1(TyS);
+ if (1) test_uqrshrn_h_s_9(TyS);
+ if (1) test_uqrshrn_h_s_16(TyS);
+ if (1) test_uqrshrn_b_h_1(TyH);
+ if (1) test_uqrshrn_b_h_4(TyH);
+ if (1) test_uqrshrn_b_h_8(TyH);
+ if (1) test_sqshrn_s_d_1(TyD);
+ if (1) test_sqshrn_s_d_17(TyD);
+ if (1) test_sqshrn_s_d_32(TyD);
+ if (1) test_sqshrn_h_s_1(TyS);
+ if (1) test_sqshrn_h_s_9(TyS);
+ if (1) test_sqshrn_h_s_16(TyS);
+ if (1) test_sqshrn_b_h_1(TyH);
+ if (1) test_sqshrn_b_h_4(TyH);
+ if (1) test_sqshrn_b_h_8(TyH);
+ if (1) test_uqshrn_s_d_1(TyD);
+ if (1) test_uqshrn_s_d_17(TyD);
+ if (1) test_uqshrn_s_d_32(TyD);
+ if (1) test_uqshrn_h_s_1(TyS);
+ if (1) test_uqshrn_h_s_9(TyS);
+ if (1) test_uqshrn_h_s_16(TyS);
+ if (1) test_uqshrn_b_h_1(TyH);
+ if (1) test_uqshrn_b_h_4(TyH);
+ if (1) test_uqshrn_b_h_8(TyH);
+ if (1) test_sqrshrun_s_d_1(TyD);
+ if (1) test_sqrshrun_s_d_17(TyD);
+ if (1) test_sqrshrun_s_d_32(TyD);
+ if (1) test_sqrshrun_h_s_1(TyS);
+ if (1) test_sqrshrun_h_s_9(TyS);
+ if (1) test_sqrshrun_h_s_16(TyS);
+ if (1) test_sqrshrun_b_h_1(TyH);
+ if (1) test_sqrshrun_b_h_4(TyH);
+ if (1) test_sqrshrun_b_h_8(TyH);
+ if (1) test_sqshrun_s_d_1(TyD);
+ if (1) test_sqshrun_s_d_17(TyD);
+ if (1) test_sqshrun_s_d_32(TyD);
+ if (1) test_sqshrun_h_s_1(TyS);
+ if (1) test_sqshrun_h_s_9(TyS);
+ if (1) test_sqshrun_h_s_16(TyS);
+ if (1) test_sqshrun_b_h_1(TyH);
+ if (1) test_sqshrun_b_h_4(TyH);
+ if (1) test_sqshrun_b_h_8(TyH);
// sqrshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm
// uqrshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm
@@ -4702,109 +4711,118 @@
// sqshl (imm) d,s,h,b _#imm
// uqshl (imm) d,s,h,b _#imm
// sqshlu (imm) d,s,h,b _#imm
- if (0) test_sqshl_d_d_0(TyD);
- if (0) test_sqshl_d_d_32(TyD);
- if (0) test_sqshl_d_d_63(TyD);
- if (0) test_sqshl_s_s_0(TyS);
- if (0) test_sqshl_s_s_16(TyS);
- if (0) test_sqshl_s_s_31(TyS);
- if (0) test_sqshl_h_h_0(TyH);
- if (0) test_sqshl_h_h_8(TyH);
- if (0) test_sqshl_h_h_15(TyH);
- if (0) test_sqshl_b_b_0(TyB);
- if (0) test_sqshl_b_b_4(TyB);
- if (0) test_sqshl_b_b_7(TyB);
- if (0) test_uqshl_d_d_0(TyD);
- if (0) test_uqshl_d_d_32(TyD);
- if (0) test_uqshl_d_d_63(TyD);
- if (0) test_uqshl_s_s_0(TyS);
- if (0) test_uqshl_s_s_16(TyS);
- if (0) test_uqshl_s_s_31(TyS);
- if (0) test_uqshl_h_h_0(TyH);
- if (0) test_uqshl_h_h_8(TyH);
- if (0) test_uqshl_h_h_15(TyH);
- if (0) test_uqshl_b_b_0(TyB);
- if (0) test_uqshl_b_b_4(TyB);
- if (0) test_uqshl_b_b_7(TyB);
- if (0) test_sqshlu_d_d_0(TyD);
- if (0) test_sqshlu_d_d_32(TyD);
- if (0) test_sqshlu_d_d_63(TyD);
- if (0) test_sqshlu_s_s_0(TyS);
- if (0) test_sqshlu_s_s_16(TyS);
- if (0) test_sqshlu_s_s_31(TyS);
- if (0) test_sqshlu_h_h_0(TyH);
- if (0) test_sqshlu_h_h_8(TyH);
- if (0) test_sqshlu_h_h_15(TyH);
- if (0) test_sqshlu_b_b_0(TyB);
- if (0) test_sqshlu_b_b_4(TyB);
- if (0) test_sqshlu_b_b_7(TyB);
+ if (1) test_sqshl_d_d_0(TyD);
+ if (1) test_sqshl_d_d_32(TyD);
+ if (1) test_sqshl_d_d_63(TyD);
+ if (1) test_sqshl_s_s_0(TyS);
+ if (1) test_sqshl_s_s_16(TyS);
+ if (1) test_sqshl_s_s_31(TyS);
+ if (1) test_sqshl_h_h_0(TyH);
+ if (1) test_sqshl_h_h_8(TyH);
+ if (1) test_sqshl_h_h_15(TyH);
+ if (1) test_sqshl_b_b_0(TyB);
+ if (1) test_sqshl_b_b_1(TyB);
+ if (1) test_sqshl_b_b_4(TyB);
+ if (1) test_sqshl_b_b_6(TyB);
+ if (1) test_sqshl_b_b_7(TyB);
+ if (1) test_uqshl_d_d_0(TyD);
+ if (1) test_uqshl_d_d_32(TyD);
+ if (1) test_uqshl_d_d_63(TyD);
+ if (1) test_uqshl_s_s_0(TyS);
+ if (1) test_uqshl_s_s_16(TyS);
+ if (1) test_uqshl_s_s_31(TyS);
+ if (1) test_uqshl_h_h_0(TyH);
+ if (1) test_uqshl_h_h_8(TyH);
+ if (1) test_uqshl_h_h_15(TyH);
+ if (1) test_uqshl_b_b_0(TyB);
+ if (1) test_uqshl_b_b_1(TyB);
+ if (1) test_uqshl_b_b_4(TyB);
+ if (1) test_uqshl_b_b_6(TyB);
+ if (1) test_uqshl_b_b_7(TyB);
+ if (1) test_sqshlu_d_d_0(TyD);
+ if (1) test_sqshlu_d_d_32(TyD);
+ if (1) test_sqshlu_d_d_63(TyD);
+ if (1) test_sqshlu_s_s_0(TyS);
+ if (1) test_sqshlu_s_s_16(TyS);
+ if (1) test_sqshlu_s_s_31(TyS);
+ if (1) test_sqshlu_h_h_0(TyH);
+ if (1) test_sqshlu_h_h_8(TyH);
+ if (1) test_sqshlu_h_h_15(TyH);
+ if (1) test_sqshlu_b_b_0(TyB);
+ if (1) test_sqshlu_b_b_1(TyB);
+ if (1) test_sqshlu_b_b_2(TyB);
+ if (1) test_sqshlu_b_b_3(TyB);
+ if (1) test_sqshlu_b_b_4(TyB);
+ if (1) test_sqshlu_b_b_5(TyB);
+ if (1) test_sqshlu_b_b_6(TyB);
+ if (1) test_sqshlu_b_b_7(TyB);
// sqshl (imm) 2d,4s,2s,8h,4h,16b,8b _#imm
// uqshl (imm) 2d,4s,2s,8h,4h,16b,8b _#imm
// sqshlu (imm) 2d,4s,2s,8h,4h,16b,8b _#imm
- if (0) test_sqshl_2d_2d_0(TyD);
- if (0) test_sqshl_2d_2d_32(TyD);
- if (0) test_sqshl_2d_2d_63(TyD);
- if (0) test_sqshl_4s_4s_0(TyS);
- if (0) test_sqshl_4s_4s_16(TyS);
- if (0) test_sqshl_4s_4s_31(TyS);
- if (0) test_sqshl_2s_2s_0(TyS);
- if (0) test_sqshl_2s_2s_16(TyS);
- if (0) test_sqshl_2s_2s_31(TyS);
- if (0) test_sqshl_8h_8h_0(TyH);
- if (0) test_sqshl_8h_8h_8(TyH);
- if (0) test_sqshl_8h_8h_15(TyH);
- if (0) test_sqshl_4h_4h_0(TyH);
- if (0) test_sqshl_4h_4h_8(TyH);
- if (0) test_sqshl_4h_4h_15(TyH);
- if (0) test_sqshl_16b_16b_0(TyB);
- if (0) test_sqshl_16b_16b_3(TyB);
- if (0) test_sqshl_16b_16b_7(TyB);
- if (0) test_sqshl_8b_8b_0(TyB);
- if (0) test_sqshl_8b_8b_3(TyB);
- if (0) test_sqshl_8b_8b_7(TyB);
- if (0) test_uqshl_2d_2d_0(TyD);
- if (0) test_uqshl_2d_2d_32(TyD);
- if (0) test_uqshl_2d_2d_63(TyD);
- if (0) test_uqshl_4s_4s_0(TyS);
- if (0) test_uqshl_4s_4s_16(TyS);
- if (0) test_uqshl_4s_4s_31(TyS);
- if (0) test_uqshl_2s_2s_0(TyS);
- if (0) test_uqshl_2s_2s_16(TyS);
- if (0) test_uqshl_2s_2s_31(TyS);
- if (0) test_uqshl_8h_8h_0(TyH);
- if (0) test_uqshl_8h_8h_8(TyH);
- if (0) test_uqshl_8h_8h_15(TyH);
- if (0) test_uqshl_4h_4h_0(TyH);
- if (0) test_uqshl_4h_4h_8(TyH);
- if (0) test_uqshl_4h_4h_15(TyH);
- if (0) test_uqshl_16b_16b_0(TyB);
- if (0) test_uqshl_16b_16b_3(TyB);
- if (0) test_uqshl_16b_16b_7(TyB);
- if (0) test_uqshl_8b_8b_0(TyB);
- if (0) test_uqshl_8b_8b_3(TyB);
- if (0) test_uqshl_8b_8b_7(TyB);
- if (0) test_sqshlu_2d_2d_0(TyD);
- if (0) test_sqshlu_2d_2d_32(TyD);
- if (0) test_sqshlu_2d_2d_63(TyD);
- if (0) test_sqshlu_4s_4s_0(TyS);
- if (0) test_sqshlu_4s_4s_16(TyS);
- if (0) test_sqshlu_4s_4s_31(TyS);
- if (0) test_sqshlu_2s_2s_0(TyS);
- if (0) test_sqshlu_2s_2s_16(TyS);
- if (0) test_sqshlu_2s_2s_31(TyS);
- if (0) test_sqshlu_8h_8h_0(TyH);
- if (0) test_sqshlu_8h_8h_8(TyH);
- if (0) test_sqshlu_8h_8h_15(TyH);
- if (0) test_sqshlu_4h_4h_0(TyH);
- if (0) test_sqshlu_4h_4h_8(TyH);
- if (0) test_sqshlu_4h_4h_15(TyH);
- if (0) test_sqshlu_16b_16b_0(TyB);
- if (0) test_sqshlu_16b_16b_3(TyB);
- if (0) test_sqshlu_16b_16b_7(TyB);
- if (0) test_sqshlu_8b_8b_0(TyB);
- if (0) test_sqshlu_8b_8b_3(TyB);
- if (0) test_sqshlu_8b_8b_7(TyB);
+ if (1) test_sqshl_2d_2d_0(TyD);
+ if (1) test_sqshl_2d_2d_32(TyD);
+ if (1) test_sqshl_2d_2d_63(TyD);
+ if (1) test_sqshl_4s_4s_0(TyS);
+ if (1) test_sqshl_4s_4s_16(TyS);
+ if (1) test_sqshl_4s_4s_31(TyS);
+ if (1) test_sqshl_2s_2s_0(TyS);
+ if (1) test_sqshl_2s_2s_16(TyS);
+ if (1) test_sqshl_2s_2s_31(TyS);
+ if (1) test_sqshl_8h_8h_0(TyH);
+ if (1) test_sqshl_8h_8h_8(TyH);
+ if (1) test_sqshl_8h_8h_15(TyH);
+ if (1) test_sqshl_4h_4h_0(TyH);
+ if (1) test_sqshl_4h_4h_8(TyH);
+ if (1) test_sqshl_4h_4h_15(TyH);
+ if (1) test_sqshl_16b_16b_0(TyB);
+ if (1) test_sqshl_16b_16b_3(TyB);
+ if (1) test_sqshl_16b_16b_7(TyB);
+ if (1) test_sqshl_8b_8b_0(TyB);
+ if (1) test_sqshl_8b_8b_3(TyB);
+ if (1) test_sqshl_8b_8b_7(TyB);
+ if (1) test_uqshl_2d_2d_0(TyD);
+ if (1) test_uqshl_2d_2d_32(TyD);
+ if (1) test_uqshl_2d_2d_63(TyD);
+ if (1) test_uqshl_4s_4s_0(TyS);
+ if (1) test_uqshl_4s_4s_16(TyS);
+ if (1) test_uqshl_4s_4s_31(TyS);
+ if (1) test_uqshl_2s_2s_0(TyS);
+ if (1) test_uqshl_2s_2s_16(TyS);
+ if (1) test_uqshl_2s_2s_31(TyS);
+ if (1) test_uqshl_8h_8h_0(TyH);
+ if (1) test_uqshl_8h_8h_8(TyH);
+ if (1) test_uqshl_8h_8h_15(TyH);
+ if (1) test_uqshl_4h_4h_0(TyH);
+ if (1) test_uqshl_4h_4h_8(TyH);
+ if (1) test_uqshl_4h_4h_15(TyH);
+ if (1) test_uqshl_16b_16b_0(TyB);
+ if (1) test_uqshl_16b_16b_3(TyB);
+ if (1) test_uqshl_16b_16b_7(TyB);
+ if (1) test_uqshl_8b_8b_0(TyB);
+ if (1) test_uqshl_8b_8b_3(TyB);
+ if (1) test_uqshl_8b_8b_7(TyB);
+ if (1) test_sqshlu_2d_2d_0(TyD);
+ if (1) test_sqshlu_2d_2d_32(TyD);
+ if (1) test_sqshlu_2d_2d_63(TyD);
+ if (1) test_sqshlu_4s_4s_0(TyS);
+ if (1) test_sqshlu_4s_4s_16(TyS);
+ if (1) test_sqshlu_4s_4s_31(TyS);
+ if (1) test_sqshlu_2s_2s_0(TyS);
+ if (1) test_sqshlu_2s_2s_16(TyS);
+ if (1) test_sqshlu_2s_2s_31(TyS);
+ if (1) test_sqshlu_8h_8h_0(TyH);
+ if (1) test_sqshlu_8h_8h_8(TyH);
+ if (1) test_sqshlu_8h_8h_15(TyH);
+ if (1) test_sqshlu_4h_4h_0(TyH);
+ if (1) test_sqshlu_4h_4h_8(TyH);
+ if (1) test_sqshlu_4h_4h_15(TyH);
+ if (1) test_sqshlu_16b_16b_0(TyB);
+ if (1) test_sqshlu_16b_16b_3(TyB);
+ if (1) test_sqshlu_16b_16b_7(TyB);
+ if (1) test_sqshlu_8b_8b_0(TyB);
+ if (1) test_sqshlu_8b_8b_3(TyB);
+ if (1) test_sqshlu_8b_8b_7(TyB);
// sqxtn s_d,h_s,b_h
// uqxtn s_d,h_s,b_h
|
|
From: <sv...@va...> - 2014-08-15 05:35:54
|
Author: sewardj
Date: Fri Aug 15 05:35:35 2014
New Revision: 2923
Log:
arm64: implement: {uqshl, sqshl, sqshlu} (scalar, imm) and fix two
bugs in the implementation of the (vector, imm) variants.
Modified:
trunk/priv/guest_arm64_toIR.c
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Fri Aug 15 05:35:35 2014
@@ -6659,16 +6659,20 @@
if (vex_streq(nm, "sqshlu")) {
IROp qop = mkVecQSHLNSATS2U(size);
assign(*res, binop(qop, mkexpr(src), mkU8(shift)));
- /* This is different from the other two cases, in that
- saturation can occur even if there is no shift. */
- /* Saturation has occurred if any of the shifted-out bits, or
- the top bit of the original value, are nonzero. */
- UInt rshift = laneBits - 1 - shift;
- vassert(rshift >= 0 && rshift < laneBits);
- /* qDiff1 is the shifted out bits, and the top bit of the original
- value, preceded by zeroes. */
- assign(*qDiff1, binop(mkVecSHRN(size), mkexpr(src), mkU8(rshift)));
- assign(*qDiff2, mkexpr(z128));
+ if (shift == 0) {
+ /* If there's no shift, saturation depends on the top bit
+ of the source. */
+ assign(*qDiff1, binop(mkVecSHRN(size), mkexpr(src), mkU8(laneBits-1)));
+ assign(*qDiff2, mkexpr(z128));
+ } else {
+ /* Saturation has occurred if any of the shifted-out bits are
+ nonzero. We get the shifted-out bits by right-shifting the
+ original value. */
+ UInt rshift = laneBits - shift;
+ vassert(rshift >= 1 && rshift < laneBits);
+ assign(*qDiff1, binop(mkVecSHRN(size), mkexpr(src), mkU8(rshift)));
+ assign(*qDiff2, mkexpr(z128));
+ }
return;
}
@@ -7544,18 +7548,6 @@
return True;
}
- if (bitU == 0 && (immh & 8) == 8 && opcode == BITS5(0,1,0,1,0)) {
- /* -------- 0,1xxx,01010 SHL d_d_#imm -------- */
- UInt sh = immhb - 64;
- vassert(sh >= 0 && sh < 64);
- putQReg128(dd,
- unop(Iop_ZeroHI64ofV128,
- sh == 0 ? getQReg128(nn)
- : binop(Iop_ShlN64x2, getQReg128(nn), mkU8(sh))));
- DIP("shl d%u, d%u, #%u\n", dd, nn, sh);
- return True;
- }
-
if (bitU == 1 && (immh & 8) == 8 && opcode == BITS5(0,1,0,0,0)) {
/* -------- 1,1xxx,01000 SRI d_d_#imm -------- */
UInt sh = 128 - immhb;
@@ -7576,6 +7568,18 @@
return True;
}
+ if (bitU == 0 && (immh & 8) == 8 && opcode == BITS5(0,1,0,1,0)) {
+ /* -------- 0,1xxx,01010 SHL d_d_#imm -------- */
+ UInt sh = immhb - 64;
+ vassert(sh >= 0 && sh < 64);
+ putQReg128(dd,
+ unop(Iop_ZeroHI64ofV128,
+ sh == 0 ? getQReg128(nn)
+ : binop(Iop_ShlN64x2, getQReg128(nn), mkU8(sh))));
+ DIP("shl d%u, d%u, #%u\n", dd, nn, sh);
+ return True;
+ }
+
if (bitU == 1 && (immh & 8) == 8 && opcode == BITS5(0,1,0,1,0)) {
/* -------- 1,1xxx,01010 SLI d_d_#imm -------- */
UInt sh = immhb - 64;
@@ -7596,6 +7600,41 @@
return True;
}
+ if (opcode == BITS5(0,1,1,1,0)
+ || (bitU == 1 && opcode == BITS5(0,1,1,0,0))) {
+ /* -------- 0,01110 SQSHL #imm -------- */
+ /* -------- 1,01110 UQSHL #imm -------- */
+ /* -------- 1,01100 SQSHLU #imm -------- */
+ UInt size = 0;
+ UInt shift = 0;
+ Bool ok = getLaneInfo_IMMH_IMMB(&shift, &size, immh, immb);
+ if (!ok) return False;
+ vassert(size >= 0 && size <= 3);
+ /* The shift encoding has opposite sign for the leftwards case.
+ Adjust shift to compensate. */
+ UInt lanebits = 8 << size;
+ shift = lanebits - shift;
+ vassert(shift >= 0 && shift < lanebits);
+ const HChar* nm = NULL;
+ /**/ if (bitU == 0 && opcode == BITS5(0,1,1,1,0)) nm = "sqshl";
+ else if (bitU == 1 && opcode == BITS5(0,1,1,1,0)) nm = "uqshl";
+ else if (bitU == 1 && opcode == BITS5(0,1,1,0,0)) nm = "sqshlu";
+ else vassert(0);
+ IRTemp qDiff1 = IRTemp_INVALID;
+ IRTemp qDiff2 = IRTemp_INVALID;
+ IRTemp res = IRTemp_INVALID;
+ IRTemp src = math_ZERO_ALL_EXCEPT_LOWEST_LANE(size, getQReg128(nn));
+ /* This relies on the fact that the zeroed out lanes generate zeroed
+ result lanes and don't saturate, so there's no point in trimming
+ the resulting res, qDiff1 or qDiff2 values. */
+ math_QSHL_IMM(&res, &qDiff1, &qDiff2, src, size, shift, nm);
+ putQReg128(dd, mkexpr(res));
+ updateQCFLAGwithDifference(qDiff1, qDiff2);
+ const HChar arr = "bhsd"[size];
+ DIP("%s %c%u, %c%u, #%u\n", nm, arr, dd, arr, nn, shift);
+ return True;
+ }
+
if (opcode == BITS5(1,0,0,1,0) || opcode == BITS5(1,0,0,1,1)
|| (bitU == 1
&& (opcode == BITS5(1,0,0,0,0) || opcode == BITS5(1,0,0,0,1)))) {
@@ -8366,7 +8405,7 @@
math_QSHL_IMM(&res, &qDiff1, &qDiff2, src, size, shift, nm);
putQReg128(dd, math_MAYBE_ZERO_HI64(bitQ, res));
updateQCFLAGwithDifferenceZHI(qDiff1, qDiff2,
- isQ ? Iop_ZeroHI64ofV128 : Iop_INVALID);
+ isQ ? Iop_INVALID : Iop_ZeroHI64ofV128);
const HChar* arr = nameArr_Q_SZ(bitQ, size);
DIP("%s %s.%s, %s.%s, #%u\n", nm,
nameQReg128(dd), arr, nameQReg128(nn), arr, shift);
|
|
From: Rich C. <rc...@wi...> - 2014-08-15 05:05:03
|
valgrind revision: 14280
VEX revision: 2922
C compiler: gcc (SUSE Linux) 4.8.1 20130909 [gcc-4_8-branch revision 202388]
GDB: GNU gdb (GDB; openSUSE Factory) 7.6.50.20130731-cvs
Assembler: GNU assembler (GNU Binutils; openSUSE Factory) 2.23.2
C library: GNU C Library (GNU libc) stable release version 2.18 (git )
uname -mrs: Linux 3.11.4-3-desktop x86_64
Vendor version: Welcome to openSUSE 13.1 "Bottle" Beta 1 - Kernel %r (%t).
Nightly build on rodan ( Linux 3.11.4-3-desktop x86_64 )
Started at 2014-08-14 19:22:02 CDT
Ended at 2014-08-15 00:04:52 CDT
Results unchanged from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 608 tests, 6 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
memcheck/tests/err_disable3 (stderr)
memcheck/tests/err_disable4 (stderr)
memcheck/tests/threadname (stderr)
memcheck/tests/threadname_xml (stderr)
memcheck/tests/vbit-test/vbit-test (stderr)
exp-sgcheck/tests/hackedbz2 (stderr)
--tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old
+ perl perf/vg_perf --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old perf
-- Running tests in perf ----------------------------------------------
-- bigcode1 --
bigcode1 valgrind-new:0.48s no: 7.8s (16.2x, -----) me:14.9s (31.1x, -----) ca:61.5s (128.2x, -----) he: 8.9s (18.6x, -----) ca:25.5s (53.2x, -----) dr: 8.8s (18.3x, -----) ma: 9.1s (18.9x, -----)
bigcode1 valgrind-old:0.48s no: 7.8s (16.3x, -0.5%) me:15.0s (31.2x, -0.3%) ca:61.5s (128.2x, -0.0%) he: 8.9s (18.5x, 0.1%) ca:25.5s (53.2x, 0.0%) dr: 8.8s (18.2x, 0.3%) ma: 9.1s (18.9x, -0.4%)
-- bigcode2 --
bigcode2 valgrind-new:0.49s no:18.6s (38.0x, -----) me:38.2s (78.0x, -----) ca:105.5s (215.3x, -----) he:22.3s (45.6x, -----) ca:40.8s (83.3x, -----) dr:21.4s (43.7x, -----) ma:21.3s (43.5x, -----)
bigcode2 valgrind-old:0.49s no:18.8s (38.3x, -0.9%) me:38.4s (78.4x, -0.5%) ca:105.7s (215.7x, -0.2%) he:22.3s (45.6x, -0.0%) ca:41.0s (83.7x, -0.6%) dr:21.3s (43.5x, 0.4%) ma:21.4s (43.7x, -0.4%)
-- bz2 --
bz2 valgrind-new:2.32s no:10.3s ( 4.5x, -----) me:27.3s (11.8x, -----) ca:59.5s (25.7x, -----) he:39.8s (17.1x, -----) ca:76.8s (33.1x, -----) dr:55.0s (23.7x, -----) ma: 9.7s ( 4.2x, -----)
bz2 valgrind-old:2.32s no:10.3s ( 4.5x, 0.0%) me:27.3s (11.8x, 0.0%) ca:58.6s (25.3x, 1.6%) he:39.8s (17.1x, -0.1%) ca:77.5s (33.4x, -0.8%) dr:55.9s (24.1x, -1.6%) ma: 9.8s ( 4.2x, -0.7%)
-- fbench --
fbench valgrind-new:1.44s no: 5.5s ( 3.8x, -----) me:17.8s (12.4x, -----) ca:27.1s (18.8x, -----) he:12.8s ( 8.9x, -----) ca:21.7s (15.1x, -----) dr:13.1s ( 9.1x, -----) ma: 5.6s ( 3.9x, -----)
fbench valgrind-old:1.44s no: 5.4s ( 3.8x, 0.2%) me:17.9s (12.4x, -0.4%) ca:26.9s (18.7x, 0.5%) he:12.8s ( 8.9x, -0.1%) ca:21.7s (15.0x, 0.1%) dr:13.1s ( 9.1x, 0.1%) ma: 5.6s ( 3.9x, 0.0%)
-- ffbench --
ffbench valgrind-new:1.00s no: 3.7s ( 3.7x, -----) me:12.1s (12.1x, -----) ca: 8.2s ( 8.2x, -----) he:21.6s (21.6x, -----) ca:27.6s (27.6x, -----) dr:17.2s (17.2x, -----) ma: 3.7s ( 3.7x, -----)
ffbench valgrind-old:1.00s no: 3.7s ( 3.7x, 0.0%) me:12.1s (12.1x, 0.3%) ca: 8.1s ( 8.1x, 0.4%) he:21.2s (21.2x, 1.8%) ca:27.5s (27.5x, 0.1%) dr:17.1s (17.1x, 0.2%) ma: 3.7s ( 3.7x, 0.0%)
-- heap --
heap valgrind-new:0.40s no: 3.3s ( 8.2x, -----) me:22.6s (56.5x, -----) ca:31.5s (78.7x, -----) he:30.3s (75.8x, -----) ca:22.9s (57.4x, -----) dr:19.4s (48.5x, -----) ma:21.8s (54.5x, -----)
heap valgrind-old:0.40s no: 3.3s ( 8.2x, 0.0%) me:22.3s (55.7x, 1.5%) ca:31.7s (79.2x, -0.7%) he:30.4s (76.1x, -0.4%) ca:23.1s (57.6x, -0.5%) dr:19.6s (48.9x, -0.8%) ma:22.7s (56.7x, -3.9%)
-- heap_pdb4 --
heap_pdb4 valgrind-new:0.55s no: 3.6s ( 6.6x, -----) me:42.0s (76.3x, -----) ca:33.7s (61.3x, -----) he:35.6s (64.8x, -----) ca:25.0s (45.4x, -----) dr:22.1s (40.3x, -----) ma:23.0s (41.9x, -----)
heap_pdb4 valgrind-old:0.55s no: 3.7s ( 6.7x, -0.5%) me:41.2s (75.0x, 1.8%) ca:34.3s (62.3x, -1.5%) he:35.5s (64.6x, 0.4%) ca:24.9s (45.2x, 0.4%) dr:21.9s (39.9x, 1.0%) ma:24.0s (43.7x, -4.3%)
-- many-loss-records --
many-loss-records valgrind-new:0.05s no: 1.3s (25.2x, -----) me: 5.9s (117.2x, -----) ca: 5.1s (101.8x, -----) he: 5.2s (104.8x, -----) ca: 4.1s (81.6x, -----) dr: 4.6s (91.6x, -----) ma: 4.7s (93.8x, -----)
many-loss-records valgrind-old:0.05s no: 1.3s (25.2x, 0.0%) me: 5.9s (117.4x, -0.2%) ca: 5.1s (102.4x, -0.6%) he: 5.3s (105.2x, -0.4%) ca: 4.1s (81.6x, 0.0%) dr: 4.6s (91.2x, 0.4%) ma: 4.7s (93.8x, 0.0%)
-- many-xpts --
many-xpts valgrind-new:0.15s no: 1.5s (10.2x, -----) me: 7.0s (46.7x, -----) ca:13.0s (86.9x, -----) he: 9.7s (64.6x, -----) ca: 5.8s (38.8x, -----) dr: 6.0s (40.0x, -----) ma: 7.4s (49.3x, -----)
many-xpts valgrind-old:0.15s no: 1.5s (10.2x, 0.0%) me: 6.9s (46.1x, 1.4%) ca:13.1s (87.2x, -0.3%) he: 9.6s (64.2x, 0.6%) ca: 5.9s (39.1x, -0.7%) dr: 6.0s (40.3x, -0.7%) ma: 7.3s (48.8x, 0.9%)
-- sarp --
sarp valgrind-new:0.10s no: 1.5s (14.8x, -----) me: 8.9s (88.8x, -----) ca: 8.3s (83.3x, -----) he:30.9s (309.3x, -----) ca: 5.6s (56.0x, -----) dr: 4.1s (41.1x, -----) ma: 1.5s (15.1x, -----)
sarp valgrind-old:0.10s no: 1.5s (14.8x, 0.0%) me: 8.8s (87.6x, 1.4%) ca: 8.5s (84.9x, -1.9%) he:31.1s (311.0x, -0.5%) ca: 5.6s (56.0x, 0.0%) dr: 4.1s (40.7x, 1.0%) ma: 1.5s (15.2x, -0.7%)
-- tinycc --
tinycc valgrind-new:0.75s no: 7.6s (10.1x, -----) me:38.1s (50.8x, -----) ca:48.2s (64.3x, -----) he:46.6s (62.1x, -----) ca:45.0s (60.0x, -----) dr:37.9s (50.6x, -----) ma:12.0s (16.0x, -----)
tinycc valgrind-old:0.75s no: 7.6s (10.1x, 0.0%) me:38.1s (50.7x, 0.1%) ca:48.7s (64.9x, -1.0%) he:45.7s (60.9x, 1.9%) ca:45.0s (60.1x, -0.0%) dr:38.9s (51.9x, -2.7%) ma:12.0s (16.0x, -0.3%)
-- Finished tests in perf ----------------------------------------------
== 11 programs, 154 timings =================
real 162m8.473s
user 160m14.778s
sys 1m46.499s
=================================================
./valgrind-new/exp-sgcheck/tests/hackedbz2.stderr.diff-glibc28-amd64
=================================================
--- hackedbz2.stderr.exp-glibc28-amd64 2014-08-14 20:21:58.525033019 -0500
+++ hackedbz2.stderr.out 2014-08-14 21:21:32.850359472 -0500
@@ -1,7 +1,6 @@
Invalid read of size 1
- at 0x........: vex_strlen (hackedbz2.c:1006)
- by 0x........: add_to_myprintf_buf (hackedbz2.c:1284)
+ at 0x........: add_to_myprintf_buf (hackedbz2.c:1006)
by 0x........: vex_printf (hackedbz2.c:1155)
by 0x........: BZ2_compressBlock (hackedbz2.c:4039)
by 0x........: handle_compress (hackedbz2.c:4761)
=================================================
./valgrind-new/memcheck/tests/err_disable3.stderr.diff
=================================================
--- err_disable3.stderr.exp 2014-08-14 20:21:38.481817290 -0500
+++ err_disable3.stderr.out 2014-08-14 20:42:30.852327060 -0500
@@ -10,8 +10,6 @@
Thread 2:
Invalid read of size 1
at 0x........: err (err_disable3.c:25)
- by 0x........: child_fn (err_disable3.c:31)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable3.c:42)
=================================================
./valgrind-new/memcheck/tests/err_disable4.stderr.diff
=================================================
--- err_disable4.stderr.exp 2014-08-14 20:21:45.890897033 -0500
+++ err_disable4.stderr.out 2014-08-14 20:42:34.896370775 -0500
@@ -1501,8 +1501,6 @@
Thread x:
Invalid read of size 1
at 0x........: err (err_disable4.c:41)
- by 0x........: child_fn_2 (err_disable4.c:55)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable4.c:68)
=================================================
./valgrind-new/memcheck/tests/threadname.stderr.diff
=================================================
--- threadname.stderr.exp 2014-08-14 20:21:33.382762410 -0500
+++ threadname.stderr.out 2014-08-14 20:48:41.090321601 -0500
@@ -9,36 +9,12 @@
Thread 2:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_0 (threadname.c:53)
- ...
Address 0x........ is 0 bytes after a block of size 2 alloc'd
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: bad_things (threadname.c:15)
by 0x........: child_fn_0 (threadname.c:53)
...
-Thread 3 try1:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
- Address 0x........ is 0 bytes after a block of size 3 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
-
-Thread 4 012345678901234:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
- Address 0x........ is 0 bytes after a block of size 4 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
-
Thread 1:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
=================================================
./valgrind-new/memcheck/tests/threadname_xml.stderr.diff
=================================================
--- threadname_xml.stderr.exp 2014-08-14 20:21:33.308761614 -0500
+++ threadname_xml.stderr.out 2014-08-14 20:48:43.125343335 -0500
@@ -94,14 +94,6 @@
<file>threadname.c</file>
<line>...</line>
</frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_0</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
</stack>
<auxwhat>Address 0x........ is 0 bytes after a block of size 2 alloc'd</auxwhat>
<stack>
@@ -135,112 +127,6 @@
<error>
<unique>0x........</unique>
<tid>...</tid>
- <threadname>try1</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 3 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>malloc</fn>
- <dir>...</dir>
- <file>vg_replace_malloc.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
-</error>
-
-<error>
- <unique>0x........</unique>
- <tid>...</tid>
- <threadname>012345678901234</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_2</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 4 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
<truncated beyond 100 lines>
=================================================
./valgrind-new/memcheck/tests/vbit-test/vbit-test.stderr.diff
=================================================
--- vbit-test.stderr.exp 2014-08-14 20:21:42.659862258 -0500
+++ vbit-test.stderr.out 2014-08-14 20:50:51.186711508 -0500
@@ -0,0 +1 @@
+unknown opcode 5918
=================================================
./valgrind-old/exp-sgcheck/tests/hackedbz2.stderr.diff-glibc28-amd64
=================================================
--- hackedbz2.stderr.exp-glibc28-amd64 2014-08-14 19:22:37.266163102 -0500
+++ hackedbz2.stderr.out 2014-08-14 20:20:11.242878522 -0500
@@ -1,7 +1,6 @@
Invalid read of size 1
- at 0x........: vex_strlen (hackedbz2.c:1006)
- by 0x........: add_to_myprintf_buf (hackedbz2.c:1284)
+ at 0x........: add_to_myprintf_buf (hackedbz2.c:1006)
by 0x........: vex_printf (hackedbz2.c:1155)
by 0x........: BZ2_compressBlock (hackedbz2.c:4039)
by 0x........: handle_compress (hackedbz2.c:4761)
=================================================
./valgrind-old/memcheck/tests/err_disable3.stderr.diff
=================================================
--- err_disable3.stderr.exp 2014-08-14 19:22:15.140920299 -0500
+++ err_disable3.stderr.out 2014-08-14 19:41:05.217255536 -0500
@@ -10,8 +10,6 @@
Thread 2:
Invalid read of size 1
at 0x........: err (err_disable3.c:25)
- by 0x........: child_fn (err_disable3.c:31)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable3.c:42)
=================================================
./valgrind-old/memcheck/tests/err_disable4.stderr.diff
=================================================
--- err_disable4.stderr.exp 2014-08-14 19:22:16.322933270 -0500
+++ err_disable4.stderr.out 2014-08-14 19:41:09.234299728 -0500
@@ -1501,8 +1501,6 @@
Thread x:
Invalid read of size 1
at 0x........: err (err_disable4.c:41)
- by 0x........: child_fn_2 (err_disable4.c:55)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable4.c:68)
=================================================
./valgrind-old/memcheck/tests/threadname.stderr.diff
=================================================
--- threadname.stderr.exp 2014-08-14 19:22:16.828938823 -0500
+++ threadname.stderr.out 2014-08-14 19:47:16.990344520 -0500
@@ -9,36 +9,12 @@
Thread 2:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_0 (threadname.c:53)
- ...
Address 0x........ is 0 bytes after a block of size 2 alloc'd
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: bad_things (threadname.c:15)
by 0x........: child_fn_0 (threadname.c:53)
...
-Thread 3 try1:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
- Address 0x........ is 0 bytes after a block of size 3 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
-
-Thread 4 012345678901234:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
- Address 0x........ is 0 bytes after a block of size 4 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
-
Thread 1:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
=================================================
./valgrind-old/memcheck/tests/threadname_xml.stderr.diff
=================================================
--- threadname_xml.stderr.exp 2014-08-14 19:22:16.751937978 -0500
+++ threadname_xml.stderr.out 2014-08-14 19:47:19.036367018 -0500
@@ -94,14 +94,6 @@
<file>threadname.c</file>
<line>...</line>
</frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_0</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
</stack>
<auxwhat>Address 0x........ is 0 bytes after a block of size 2 alloc'd</auxwhat>
<stack>
@@ -135,112 +127,6 @@
<error>
<unique>0x........</unique>
<tid>...</tid>
- <threadname>try1</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 3 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>malloc</fn>
- <dir>...</dir>
- <file>vg_replace_malloc.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
-</error>
-
-<error>
- <unique>0x........</unique>
- <tid>...</tid>
- <threadname>012345678901234</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_2</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 4 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
<truncated beyond 100 lines>
=================================================
./valgrind-old/memcheck/tests/vbit-test/vbit-test.stderr.diff
=================================================
--- vbit-test.stderr.exp 2014-08-14 19:22:15.804927585 -0500
+++ vbit-test.stderr.out 2014-08-14 19:49:27.040774490 -0500
@@ -0,0 +1 @@
+unknown opcode 5918
|
|
From: Christian B. <bor...@de...> - 2014-08-15 04:08:31
|
valgrind revision: 14280 VEX revision: 2922 C compiler: gcc (SUSE Linux) 4.3.4 [gcc-4_3-branch revision 152973] GDB: GNU gdb (GDB) SUSE (7.5.1-0.7.29) Assembler: GNU assembler (GNU Binutils; SUSE Linux Enterprise 11) 2.23.1 C library: GNU C Library stable release version 2.11.3 (20110527) uname -mrs: Linux 3.0.101-0.31-default s390x Vendor version: Welcome to SUSE Linux Enterprise Server 11 SP3 (s390x) - Kernel %r (%t). Nightly build on sless390 ( SUSE Linux Enterprise Server 11 SP3 gcc 4.3.4 on z196 (s390x) ) Started at 2014-08-15 03:45:01 CEST Ended at 2014-08-15 06:08:18 CEST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 658 tests, 4 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/origin5-bz2 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) helgrind/tests/pth_cond_destroy_busy (stderr) helgrind/tests/tc20_verifywrap (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.23s no: 4.7s (20.4x, -----) me: 6.6s (28.9x, -----) ca:26.6s (115.8x, -----) he: 5.5s (24.1x, -----) ca: 9.1s (39.7x, -----) dr: 4.8s (20.7x, -----) ma: 4.7s (20.3x, -----) bigcode1 valgrind-old:0.23s no: 4.7s (20.4x, 0.2%) me: 6.7s (28.9x, -0.2%) ca:26.7s (116.0x, -0.2%) he: 5.5s (24.1x, 0.0%) ca: 9.1s (39.7x, -0.2%) dr: 4.8s (20.8x, -0.4%) ma: 4.7s (20.3x, -0.2%) -- bigcode2 -- bigcode2 valgrind-new:0.24s no: 7.8s (32.3x, -----) me:13.6s (56.8x, -----) ca:40.0s (166.7x, -----) he:10.6s (44.1x, -----) ca:14.2s (59.2x, -----) dr: 8.9s (37.1x, -----) ma: 8.2s (34.0x, -----) bigcode2 valgrind-old:0.24s no: 7.6s (31.8x, 1.7%) me:13.5s (56.3x, 1.0%) ca:39.3s (163.9x, 1.7%) he:10.7s (44.7x, -1.2%) ca:14.3s (59.6x, -0.7%) dr: 8.9s (37.0x, 0.3%) ma: 8.2s (34.1x, -0.4%) -- bz2 -- bz2 valgrind-new:0.70s no: 6.5s ( 9.3x, -----) me:12.8s (18.3x, -----) ca:30.9s (44.1x, -----) he:19.6s (28.0x, -----) ca:34.3s (49.0x, -----) dr:30.1s (43.0x, -----) ma: 3.8s ( 5.4x, -----) bz2 valgrind-old:0.70s no: 6.7s ( 9.6x, -3.7%) me:12.7s (18.1x, 1.1%) ca:30.9s (44.1x, 0.0%) he:19.6s (28.0x, -0.2%) ca:34.3s (49.0x, -0.1%) dr:29.5s (42.2x, 1.9%) ma: 3.8s ( 5.4x, 0.8%) -- fbench -- fbench valgrind-new:0.41s no: 1.6s ( 3.9x, -----) me: 4.2s (10.3x, -----) ca: 9.3s (22.7x, -----) he: 6.2s (15.1x, -----) ca: 7.2s (17.6x, -----) dr: 5.5s (13.4x, -----) ma: 1.6s ( 4.0x, -----) fbench valgrind-old:0.41s no: 1.6s ( 3.9x, 0.0%) me: 4.3s (10.5x, -1.2%) ca: 9.3s (22.8x, -0.5%) he: 6.2s (15.1x, 0.0%) ca: 7.2s (17.6x, -0.1%) dr: 5.5s (13.5x, -0.5%) ma: 1.6s ( 4.0x, -0.6%) -- ffbench -- ffbench valgrind-new:0.21s no: 1.2s ( 5.5x, -----) me: 3.0s (14.1x, -----) ca: 3.0s (14.4x, -----) he:44.1s (209.9x, -----) ca: 9.6s (45.7x, -----) dr: 7.0s (33.3x, -----) ma: 0.9s ( 4.5x, -----) ffbench valgrind-old:0.21s no: 1.2s ( 5.8x, -4.3%) me: 3.0s (14.3x, -1.4%) ca: 3.0s (14.4x, 0.0%) he:44.1s (210.0x, -0.0%) ca: 9.6s (45.7x, 0.0%) dr: 7.0s (33.3x, 0.1%) ma: 1.0s ( 4.6x, -1.1%) -- heap -- heap valgrind-new:0.23s no: 2.3s (10.1x, -----) me: 8.7s (37.7x, -----) ca:13.2s (57.6x, -----) he:12.9s (56.0x, -----) ca:11.3s (49.2x, -----) dr: 7.5s (32.7x, -----) ma: 8.1s (35.0x, -----) heap valgrind-old:0.23s no: 2.3s ( 9.8x, 2.6%) me: 8.8s (38.0x, -0.9%) ca:13.2s (57.4x, 0.3%) he:12.8s (55.5x, 0.9%) ca:11.3s (49.3x, -0.1%) dr: 7.5s (32.8x, -0.4%) ma: 8.0s (34.8x, 0.6%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.22s no: 2.5s (11.3x, -----) me:12.8s (58.0x, -----) ca:14.4s (65.6x, -----) he:14.0s (63.8x, -----) ca:12.4s (56.5x, -----) dr: 8.6s (38.9x, -----) ma: 8.1s (36.8x, -----) heap_pdb4 valgrind-old:0.22s no: 2.5s (11.2x, 0.8%) me:12.8s (58.2x, -0.4%) ca:14.3s (64.9x, 1.0%) he:14.1s (64.0x, -0.3%) ca:12.4s (56.3x, 0.3%) dr: 8.5s (38.5x, 1.1%) ma: 8.2s (37.1x, -0.9%) -- many-loss-records -- many-loss-records valgrind-new:0.02s no: 0.5s (26.5x, -----) me: 2.1s (104.5x, -----) ca: 1.9s (97.5x, -----) he: 2.1s (106.0x, -----) ca: 1.9s (96.0x, -----) dr: 1.7s (85.5x, -----) ma: 1.7s (83.5x, -----) many-loss-records valgrind-old:0.02s no: 0.5s (26.5x, 0.0%) me: 2.1s (104.0x, 0.5%) ca: 1.9s (97.5x, 0.0%) he: 2.1s (106.0x, 0.0%) ca: 1.9s (96.0x, 0.0%) dr: 1.7s (85.5x, 0.0%) ma: 1.7s (84.0x, -0.6%) -- many-xpts -- many-xpts valgrind-new:0.07s no: 0.7s ( 9.6x, -----) me: 3.1s (45.0x, -----) ca:362.6s (5180.4x, -----) he: 6.5s (92.1x, -----) ca: 2.8s (40.1x, -----) dr: 2.5s (35.0x, -----) ma: 2.6s (36.6x, -----) many-xpts valgrind-old:0.07s no: 0.7s ( 9.6x, 0.0%) me: 3.1s (44.9x, 0.3%) ca:369.0s (5272.0x, -1.8%) he: 6.4s (91.9x, 0.3%) ca: 2.8s (40.1x, 0.0%) dr: 2.5s (35.0x, 0.0%) ma: 2.6s (36.6x, 0.0%) -- sarp -- sarp valgrind-new:0.03s no: 0.6s (19.3x, -----) me: 3.5s (115.3x, -----) ca: 3.2s (106.3x, -----) he:16.5s (550.0x, -----) ca: 2.0s (68.0x, -----) dr: 1.4s (45.0x, -----) ma: 0.5s (15.7x, -----) sarp valgrind-old:0.03s no: 0.6s (19.7x, -1.7%) me: 3.5s (115.3x, 0.0%) ca: 3.2s (107.0x, -0.6%) he:16.4s (545.0x, 0.9%) ca: 2.0s (68.0x, 0.0%) dr: 1.3s (44.7x, 0.7%) ma: 0.5s (16.0x, -2.1%) -- tinycc -- tinycc valgrind-new:0.22s no: 3.0s (13.7x, -----) me:14.5s (65.9x, -----) ca:30.3s (137.7x, -----) he:27.4s (124.6x, -----) ca:21.2s (96.5x, -----) dr:20.6s (93.5x, -----) ma: 3.9s (17.7x, -----) tinycc valgrind-old:0.22s no: 3.0s (13.7x, -0.3%) me:14.5s (66.0x, -0.3%) ca:30.2s (137.4x, 0.2%) he:27.5s (125.2x, -0.4%) ca:21.2s (96.4x, 0.0%) dr:20.4s (92.9x, 0.7%) ma: 3.9s (17.8x, -0.5%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 110m34.226s user 109m55.102s sys 0m30.763s |
|
From: Tom H. <to...@co...> - 2014-08-15 03:26:10
|
valgrind revision: 14280 VEX revision: 2922 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) GDB: GNU gdb (GDB) Fedora (7.3.1-48.fc15) Assembler: GNU assembler version 2.21.51.0.6-6.fc15 20110118 C library: GNU C Library stable release version 2.14.1 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 15 (Lovelock) Nightly build on bristol ( x86_64, Fedora 15 ) Started at 2014-08-15 03:13:03 BST Ended at 2014-08-15 04:25:58 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 2 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 3 stderr failures, 0 stdout failures, 1 stderrB failure, 0 stdoutB failures, 0 post failures == gdbserver_tests/nlsigvgdb (stderrB) memcheck/tests/err_disable4 (stderr) memcheck/tests/thread_alloca (stderr) memcheck/tests/vbit-test/vbit-test (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short 2014-08-15 03:32:17.686068939 +0100 --- new.short 2014-08-15 03:51:11.966356036 +0100 *************** *** 8,13 **** ! == 693 tests, 3 stderr failures, 0 stdout failures, 1 stderrB failure, 0 stdoutB failures, 0 post failures == ! gdbserver_tests/nlsigvgdb (stderrB) memcheck/tests/err_disable4 (stderr) - memcheck/tests/thread_alloca (stderr) memcheck/tests/vbit-test/vbit-test (stderr) --- 8,11 ---- ! == 693 tests, 2 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.10s no: 1.6s (16.3x, -----) me: 3.2s (32.4x, -----) ca:14.3s (142.7x, -----) he: 1.9s (18.8x, -----) ca: 3.8s (38.2x, -----) dr: 1.9s (18.6x, -----) ma: 1.9s (19.3x, -----) bigcode1 valgrind-old:0.10s no: 1.6s (16.3x, 0.0%) me: 3.2s (32.5x, -0.3%) ca:13.8s (137.6x, 3.6%) he: 1.9s (19.0x, -1.1%) ca: 3.8s (38.3x, -0.3%) dr: 1.9s (18.7x, -0.5%) ma: 1.9s (19.3x, 0.0%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 3.9s (35.5x, -----) me: 8.2s (74.5x, -----) ca:25.4s (231.0x, -----) he: 4.8s (43.2x, -----) ca: 7.2s (65.5x, -----) dr: 4.6s (41.7x, -----) ma: 4.5s (41.0x, -----) bigcode2 valgrind-old:0.11s no: 3.9s (35.5x, -0.3%) me: 8.2s (75.0x, -0.6%) ca:25.5s (231.7x, -0.3%) he: 4.8s (43.5x, -0.8%) ca: 7.1s (64.9x, 0.8%) dr: 4.5s (41.0x, 1.7%) ma: 4.5s (41.4x, -0.9%) -- bz2 -- bz2 valgrind-new:0.52s no: 2.1s ( 4.0x, -----) me: 6.1s (11.7x, -----) ca:13.8s (26.5x, -----) he: 8.9s (17.1x, -----) ca:11.6s (22.2x, -----) dr:10.9s (21.0x, -----) ma: 2.1s ( 4.0x, -----) bz2 valgrind-old:0.52s no: 2.1s ( 4.1x, -1.0%) me: 6.1s (11.8x, -0.7%) ca:13.3s (25.7x, 3.1%) he: 9.3s (18.0x, -4.8%) ca:11.6s (22.4x, -0.6%) dr:11.2s (21.6x, -2.8%) ma: 2.1s ( 4.0x, -1.0%) -- fbench -- fbench valgrind-new:0.22s no: 1.0s ( 4.6x, -----) me: 3.6s (16.3x, -----) ca: 5.6s (25.6x, -----) he: 2.6s (12.0x, -----) ca: 3.2s (14.4x, -----) dr: 2.5s (11.4x, -----) ma: 1.1s ( 4.8x, -----) fbench valgrind-old:0.22s no: 1.0s ( 4.6x, 0.0%) me: 3.6s (16.5x, -1.1%) ca: 5.4s (24.7x, 3.4%) he: 2.7s (12.4x, -3.0%) ca: 3.1s (14.3x, 0.9%) dr: 2.5s (11.5x, -0.8%) ma: 1.1s ( 4.8x, 0.0%) -- ffbench -- ffbench valgrind-new:0.21s no: 0.9s ( 4.4x, -----) me: 2.7s (13.0x, -----) ca: 1.9s ( 8.9x, -----) he: 5.7s (27.1x, -----) ca: 4.2s (19.9x, -----) dr: 3.2s (15.2x, -----) ma: 0.9s ( 4.1x, -----) ffbench valgrind-old:0.21s no: 0.9s ( 4.4x, 1.1%) me: 2.7s (13.0x, 0.0%) ca: 1.9s ( 8.8x, 0.5%) he: 5.0s (23.9x, 11.9%) ca: 4.2s (20.0x, -0.5%) dr: 3.4s (16.0x, -5.6%) ma: 0.9s ( 4.1x, 0.0%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 7.6x, -----) me: 5.0s (62.4x, -----) ca: 6.3s (79.1x, -----) he: 6.8s (85.2x, -----) ca: 3.3s (40.8x, -----) dr: 4.3s (54.4x, -----) ma: 4.7s (58.4x, -----) heap valgrind-old:0.08s no: 0.6s ( 7.6x, 0.0%) me: 4.9s (61.2x, 1.8%) ca: 6.3s (78.9x, 0.3%) he: 6.6s (82.6x, 3.1%) ca: 3.3s (40.9x, -0.3%) dr: 4.3s (53.5x, 1.6%) ma: 4.8s (59.4x, -1.7%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.11s no: 0.7s ( 6.0x, -----) me: 8.3s (75.8x, -----) ca: 7.0s (63.7x, -----) he: 7.6s (69.1x, -----) ca: 3.6s (33.0x, -----) dr: 5.0s (45.2x, -----) ma: 4.9s (44.3x, -----) heap_pdb4 valgrind-old:0.11s no: 0.7s ( 6.0x, 0.0%) me: 8.4s (76.2x, -0.5%) ca: 6.7s (61.1x, 4.1%) he: 7.8s (71.3x, -3.2%) ca: 3.7s (33.4x, -1.1%) dr: 4.9s (44.9x, 0.6%) ma: 5.0s (45.6x, -3.1%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.2s (24.0x, -----) me: 1.2s (125.0x, -----) ca: 1.0s (102.0x, -----) he: 1.1s (105.0x, -----) ca: 0.7s (68.0x, -----) dr: 0.9s (94.0x, -----) ma: 0.9s (95.0x, -----) many-loss-records valgrind-old:0.01s no: 0.2s (25.0x, -4.2%) me: 1.2s (124.0x, 0.8%) ca: 1.0s (100.0x, 2.0%) he: 1.1s (105.0x, 0.0%) ca: 0.7s (67.0x, 1.5%) dr: 0.9s (94.0x, 0.0%) ma: 1.0s (97.0x, -2.1%) -- many-xpts -- many-xpts valgrind-new:0.03s no: 0.3s (10.0x, -----) me: 1.8s (59.3x, -----) ca: 2.7s (90.0x, -----) he: 2.1s (71.0x, -----) ca: 1.0s (32.0x, -----) dr: 1.4s (45.0x, -----) ma: 1.4s (47.3x, -----) many-xpts valgrind-old:0.03s no: 0.3s (10.0x, 0.0%) me: 1.8s (58.7x, 1.1%) ca: 2.6s (88.3x, 1.9%) he: 2.1s (71.0x, 0.0%) ca: 1.0s (32.0x, 0.0%) dr: 1.4s (45.3x, -0.7%) ma: 1.4s (47.0x, 0.7%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (13.5x, -----) me: 2.3s (116.0x, -----) ca: 1.7s (85.5x, -----) he: 6.6s (331.0x, -----) ca: 1.0s (50.5x, -----) dr: 0.8s (42.0x, -----) ma: 0.3s (14.5x, -----) sarp valgrind-old:0.02s no: 0.3s (13.5x, 0.0%) me: 2.4s (119.0x, -2.6%) ca: 1.7s (85.0x, 0.6%) he: 6.5s (326.5x, 1.4%) ca: 1.0s (50.5x, 0.0%) dr: 0.8s (41.5x, 1.2%) ma: 0.3s (14.0x, 3.4%) -- tinycc -- tinycc valgrind-new:0.16s no: 1.4s ( 8.7x, -----) me: 9.5s (59.3x, -----) ca:10.9s (68.2x, -----) he: 9.3s (58.4x, -----) ca: 8.5s (53.1x, -----) dr: 7.8s (48.6x, -----) ma: 2.4s (15.0x, -----) tinycc valgrind-old:0.16s no: 1.4s ( 8.6x, 0.7%) me: 8.7s (54.6x, 7.9%) ca:10.8s (67.8x, 0.5%) he: 9.3s (58.1x, 0.6%) ca: 8.3s (51.8x, 2.4%) dr: 7.7s (47.9x, 1.4%) ma: 2.4s (15.2x, -1.3%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 34m46.661s user 33m49.721s sys 0m21.007s |
|
From: Tom H. <to...@co...> - 2014-08-15 03:09:51
|
valgrind revision: 14280 VEX revision: 2922 C compiler: gcc (GCC) 4.7.2 20120921 (Red Hat 4.7.2-2) GDB: GNU gdb (GDB) Fedora (7.4.50.20120120-54.fc17) Assembler: GNU assembler version 2.22.52.0.1-10.fc17 20120131 C library: GNU C Library stable release version 2.15 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 17 (Beefy Miracle) Nightly build on bristol ( x86_64, Fedora 17 (Beefy Miracle) ) Started at 2014-08-15 02:51:17 BST Ended at 2014-08-15 04:09:36 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 6 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcmain_pic (stderr) memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 7 stderr failures, 2 stdout failures, 2 stderrB failures, 6 stdoutB failures, 0 post failures == gdbserver_tests/mcblocklistsearch (stderrB) gdbserver_tests/mcbreak (stdout) gdbserver_tests/mcbreak (stdoutB) gdbserver_tests/mcclean_after_fork (stdoutB) gdbserver_tests/mcclean_after_fork (stderrB) gdbserver_tests/mchelp (stdoutB) gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcinvokeWS (stdoutB) gdbserver_tests/mcmain_pic (stderr) gdbserver_tests/nlcontrolc (stdoutB) gdbserver_tests/nlgone_abrt (stdoutB) memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) drd/tests/sem_as_mutex2 (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short 2014-08-15 03:14:53.029066233 +0100 --- new.short 2014-08-15 03:34:46.275224579 +0100 *************** *** 8,25 **** ! == 693 tests, 7 stderr failures, 2 stdout failures, 2 stderrB failures, 6 stdoutB failures, 0 post failures == ! gdbserver_tests/mcblocklistsearch (stderrB) ! gdbserver_tests/mcbreak (stdout) ! gdbserver_tests/mcbreak (stdoutB) ! gdbserver_tests/mcclean_after_fork (stdoutB) ! gdbserver_tests/mcclean_after_fork (stderrB) ! gdbserver_tests/mchelp (stdoutB) gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) - gdbserver_tests/mcinvokeWS (stdoutB) gdbserver_tests/mcmain_pic (stderr) - gdbserver_tests/nlcontrolc (stdoutB) - gdbserver_tests/nlgone_abrt (stdoutB) memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) - drd/tests/sem_as_mutex2 (stderr) exp-sgcheck/tests/preen_invars (stdout) --- 8,15 ---- ! == 693 tests, 6 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcmain_pic (stderr) memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/preen_invars (stdout) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 1.7s (15.5x, -----) me: 3.5s (31.7x, -----) ca:13.6s (123.5x, -----) he: 1.9s (17.5x, -----) ca: 3.8s (34.7x, -----) dr: 1.9s (17.6x, -----) ma: 2.0s (17.9x, -----) bigcode1 valgrind-old:0.11s no: 1.6s (14.8x, 4.7%) me: 3.3s (29.6x, 6.6%) ca:13.4s (122.1x, 1.1%) he: 1.9s (17.7x, -1.6%) ca: 3.7s (34.0x, 2.1%) dr: 2.0s (18.0x, -2.1%) ma: 2.0s (18.1x, -1.0%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 3.9s (35.8x, -----) me: 8.6s (78.3x, -----) ca:24.7s (224.5x, -----) he: 4.9s (44.2x, -----) ca: 7.1s (64.7x, -----) dr: 4.5s (41.2x, -----) ma: 4.5s (41.2x, -----) bigcode2 valgrind-old:0.11s no: 3.9s (35.0x, 2.3%) me: 8.3s (75.5x, 3.6%) ca:24.8s (225.8x, -0.6%) he: 4.8s (43.7x, 1.0%) ca: 7.0s (63.7x, 1.5%) dr: 4.5s (41.4x, -0.4%) ma: 4.5s (40.5x, 1.8%) -- bz2 -- bz2 valgrind-new:0.52s no: 2.1s ( 4.1x, -----) me: 6.3s (12.2x, -----) ca:12.7s (24.5x, -----) he: 8.9s (17.1x, -----) ca:10.8s (20.8x, -----) dr:11.7s (22.6x, -----) ma: 2.1s ( 4.1x, -----) bz2 valgrind-old:0.52s no: 2.2s ( 4.2x, -4.2%) me: 6.3s (12.2x, 0.2%) ca:12.8s (24.7x, -0.7%) he: 8.7s (16.8x, 2.0%) ca:10.8s (20.8x, 0.3%) dr:11.6s (22.2x, 1.5%) ma: 2.1s ( 4.1x, -0.5%) -- fbench -- fbench valgrind-new:0.22s no: 1.0s ( 4.6x, -----) me: 3.4s (15.5x, -----) ca: 5.5s (25.1x, -----) he: 2.6s (11.7x, -----) ca: 3.0s (13.6x, -----) dr: 2.5s (11.4x, -----) ma: 1.1s ( 4.8x, -----) fbench valgrind-old:0.22s no: 1.0s ( 4.6x, 0.0%) me: 3.4s (15.5x, 0.0%) ca: 5.5s (25.0x, 0.4%) he: 2.5s (11.5x, 2.3%) ca: 2.9s (13.4x, 2.0%) dr: 2.4s (10.9x, 4.4%) ma: 1.1s ( 4.8x, 0.0%) -- ffbench -- ffbench valgrind-new:0.22s no: 0.9s ( 4.3x, -----) me: 2.8s (12.6x, -----) ca: 1.9s ( 8.4x, -----) he: 5.4s (24.7x, -----) ca: 4.0s (18.4x, -----) dr: 3.4s (15.6x, -----) ma: 0.9s ( 4.0x, -----) ffbench valgrind-old:0.22s no: 0.9s ( 4.3x, 1.1%) me: 2.8s (12.6x, 0.0%) ca: 1.8s ( 8.4x, 0.5%) he: 5.9s (26.9x, -9.0%) ca: 4.0s (18.1x, 1.2%) dr: 3.2s (14.7x, 5.5%) ma: 0.9s ( 4.0x, 0.0%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 7.8x, -----) me: 5.1s (64.2x, -----) ca: 6.0s (75.2x, -----) he: 6.8s (84.4x, -----) ca: 3.1s (38.9x, -----) dr: 4.3s (54.2x, -----) ma: 5.2s (64.8x, -----) heap valgrind-old:0.08s no: 0.6s ( 7.9x, -1.6%) me: 5.2s (65.4x, -1.8%) ca: 6.2s (77.9x, -3.5%) he: 6.7s (84.2x, 0.1%) ca: 3.1s (38.6x, 0.6%) dr: 4.4s (55.1x, -1.6%) ma: 5.0s (63.0x, 2.7%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.10s no: 0.7s ( 7.0x, -----) me: 9.1s (91.4x, -----) ca: 6.6s (66.2x, -----) he: 7.8s (78.4x, -----) ca: 3.5s (35.2x, -----) dr: 4.9s (49.2x, -----) ma: 5.2s (51.8x, -----) heap_pdb4 valgrind-old:0.10s no: 0.7s ( 7.2x, -2.9%) me: 9.2s (91.6x, -0.2%) ca: 6.8s (67.6x, -2.1%) he: 7.9s (79.4x, -1.3%) ca: 3.5s (35.4x, -0.6%) dr: 4.9s (48.9x, 0.6%) ma: 5.2s (52.2x, -0.8%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.2s (25.0x, -----) me: 1.3s (129.0x, -----) ca: 1.0s (100.0x, -----) he: 1.1s (111.0x, -----) ca: 0.7s (66.0x, -----) dr: 1.0s (99.0x, -----) ma: 1.0s (104.0x, -----) many-loss-records valgrind-old:0.01s no: 0.2s (25.0x, 0.0%) me: 1.3s (128.0x, 0.8%) ca: 1.0s (100.0x, 0.0%) he: 1.1s (110.0x, 0.9%) ca: 0.7s (65.0x, 1.5%) dr: 1.0s (97.0x, 2.0%) ma: 1.1s (106.0x, -1.9%) -- many-xpts -- many-xpts valgrind-new:0.03s no: 0.3s (10.3x, -----) me: 1.7s (57.3x, -----) ca: 2.6s (88.0x, -----) he: 2.2s (74.0x, -----) ca: 0.9s (30.3x, -----) dr: 1.4s (48.3x, -----) ma: 1.6s (52.0x, -----) many-xpts valgrind-old:0.03s no: 0.3s (10.3x, 0.0%) me: 1.7s (57.7x, -0.6%) ca: 2.6s (86.7x, 1.5%) he: 2.2s (73.7x, 0.5%) ca: 0.9s (29.7x, 2.2%) dr: 1.4s (48.0x, 0.7%) ma: 1.6s (53.3x, -2.6%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (14.0x, -----) me: 2.4s (121.0x, -----) ca: 1.7s (84.5x, -----) he: 7.2s (360.5x, -----) ca: 0.8s (42.5x, -----) dr: 0.9s (45.0x, -----) ma: 0.3s (15.0x, -----) sarp valgrind-old:0.02s no: 0.3s (13.5x, 3.6%) me: 2.3s (116.0x, 4.1%) ca: 1.7s (84.5x, 0.0%) he: 7.1s (356.5x, 1.1%) ca: 0.9s (43.0x, -1.2%) dr: 0.9s (44.0x, 2.2%) ma: 0.3s (14.5x, 3.3%) -- tinycc -- tinycc valgrind-new:0.16s no: 1.3s ( 8.4x, -----) me: 8.4s (52.6x, -----) ca:10.7s (67.1x, -----) he: 9.9s (62.1x, -----) ca: 8.0s (50.0x, -----) dr: 7.9s (49.1x, -----) ma: 2.5s (15.4x, -----) tinycc valgrind-old:0.16s no: 1.3s ( 8.2x, 1.5%) me: 8.6s (53.7x, -2.0%) ca:10.7s (66.7x, 0.7%) he: 9.7s (60.8x, 2.1%) ca: 7.6s (47.5x, 5.0%) dr: 7.8s (48.8x, 0.8%) ma: 2.4s (15.2x, 1.2%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 34m50.023s user 33m52.579s sys 0m22.601s |
|
From: Tom H. <to...@co...> - 2014-08-15 03:02:08
|
valgrind revision: 14280 VEX revision: 2922 C compiler: gcc (GCC) 4.7.2 20121109 (Red Hat 4.7.2-8) GDB: GNU gdb (GDB) Fedora 7.5.1-42.fc18 Assembler: GNU assembler version 2.23.51.0.1-10.fc18 20120806 C library: GNU C Library stable release version 2.16 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 18 (Spherical Cow) Nightly build on bristol ( x86_64, Fedora 18 (Spherical Cow) ) Started at 2014-08-15 02:41:12 BST Ended at 2014-08-15 04:01:49 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 4 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) helgrind/tests/hg05_race2 (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 692 tests, 11 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) none/tests/fdleak_ipv4 (stderr) drd/tests/hg05_race2 (stderr) drd/tests/hold_lock_2 (stderr) drd/tests/memory_allocation (stderr) drd/tests/pth_barrier (stderr) drd/tests/pth_barrier3 (stderr) drd/tests/pth_detached2 (stderr) drd/tests/read_and_free_race (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short 2014-08-15 03:04:19.488193757 +0100 --- new.short 2014-08-15 03:26:34.880631075 +0100 *************** *** 8,20 **** ! == 692 tests, 11 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) ! none/tests/fdleak_ipv4 (stderr) ! drd/tests/hg05_race2 (stderr) ! drd/tests/hold_lock_2 (stderr) ! drd/tests/memory_allocation (stderr) ! drd/tests/pth_barrier (stderr) ! drd/tests/pth_barrier3 (stderr) ! drd/tests/pth_detached2 (stderr) ! drd/tests/read_and_free_race (stderr) exp-sgcheck/tests/preen_invars (stdout) --- 8,13 ---- ! == 693 tests, 4 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) ! helgrind/tests/hg05_race2 (stderr) exp-sgcheck/tests/preen_invars (stdout) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 1.6s (14.6x, -----) me: 3.2s (29.3x, -----) ca:13.7s (124.3x, -----) he: 1.9s (17.7x, -----) ca: 3.9s (35.1x, -----) dr: 1.9s (17.6x, -----) ma: 2.0s (18.1x, -----) bigcode1 valgrind-old:0.11s no: 1.6s (14.8x, -1.2%) me: 3.3s (29.9x, -2.2%) ca:13.9s (126.8x, -2.0%) he: 2.0s (17.9x, -1.0%) ca: 3.9s (35.5x, -1.0%) dr: 1.9s (17.5x, 0.5%) ma: 2.1s (19.5x, -7.5%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 4.2s (37.8x, -----) me: 8.7s (79.3x, -----) ca:25.8s (234.5x, -----) he: 4.9s (44.8x, -----) ca: 7.2s (65.6x, -----) dr: 4.6s (41.5x, -----) ma: 4.6s (41.7x, -----) bigcode2 valgrind-old:0.11s no: 3.9s (35.4x, 6.5%) me: 8.3s (75.9x, 4.2%) ca:27.6s (251.2x, -7.1%) he: 5.1s (46.1x, -2.8%) ca: 7.0s (63.9x, 2.6%) dr: 4.5s (41.4x, 0.4%) ma: 4.5s (41.1x, 1.5%) -- bz2 -- bz2 valgrind-new:0.53s no: 2.1s ( 4.0x, -----) me: 6.5s (12.2x, -----) ca:13.3s (25.2x, -----) he: 9.1s (17.2x, -----) ca:10.9s (20.7x, -----) dr:11.8s (22.3x, -----) ma: 2.1s ( 4.0x, -----) bz2 valgrind-old:0.53s no: 2.1s ( 3.9x, 0.5%) me: 6.3s (11.9x, 2.6%) ca:12.6s (23.8x, 5.2%) he: 8.8s (16.7x, 2.9%) ca:10.7s (20.2x, 2.0%) dr:11.6s (21.9x, 1.5%) ma: 2.1s ( 4.0x, 1.4%) -- fbench -- fbench valgrind-new:0.22s no: 1.0s ( 4.6x, -----) me: 3.5s (15.8x, -----) ca: 5.5s (24.9x, -----) he: 2.5s (11.5x, -----) ca: 3.1s (14.2x, -----) dr: 2.4s (10.9x, -----) ma: 1.1s ( 4.9x, -----) fbench valgrind-old:0.22s no: 1.0s ( 4.7x, -1.0%) me: 3.4s (15.6x, 1.1%) ca: 5.5s (25.1x, -1.1%) he: 2.6s (11.6x, -0.8%) ca: 3.1s (14.0x, 1.6%) dr: 2.4s (10.8x, 0.8%) ma: 1.1s ( 4.8x, 0.9%) -- ffbench -- ffbench valgrind-new:0.22s no: 0.9s ( 4.3x, -----) me: 2.8s (12.6x, -----) ca: 1.8s ( 8.4x, -----) he: 5.7s (26.1x, -----) ca: 4.0s (18.4x, -----) dr: 3.3s (14.9x, -----) ma: 0.9s ( 4.0x, -----) ffbench valgrind-old:0.22s no: 0.9s ( 4.3x, 0.0%) me: 2.8s (12.7x, -1.1%) ca: 1.9s ( 8.4x, -0.5%) he: 6.9s (31.5x,-20.7%) ca: 4.0s (18.4x, 0.0%) dr: 3.3s (15.0x, -0.9%) ma: 0.9s ( 4.0x, 0.0%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 7.9x, -----) me: 5.3s (66.0x, -----) ca: 6.2s (76.9x, -----) he: 6.8s (85.5x, -----) ca: 3.1s (38.9x, -----) dr: 4.5s (56.0x, -----) ma: 5.0s (62.3x, -----) heap valgrind-old:0.08s no: 0.7s ( 8.1x, -3.2%) me: 5.3s (65.9x, 0.2%) ca: 6.2s (77.2x, -0.5%) he: 6.8s (84.6x, 1.0%) ca: 3.1s (38.8x, 0.3%) dr: 4.6s (57.0x, -1.8%) ma: 5.0s (62.7x, -0.8%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.11s no: 0.7s ( 6.5x, -----) me: 9.0s (81.5x, -----) ca: 6.7s (60.5x, -----) he: 7.9s (71.5x, -----) ca: 3.6s (32.5x, -----) dr: 5.0s (45.2x, -----) ma: 5.3s (47.9x, -----) heap_pdb4 valgrind-old:0.11s no: 0.7s ( 6.3x, 2.8%) me: 8.8s (80.1x, 1.8%) ca: 6.8s (62.0x, -2.6%) he: 7.8s (71.4x, 0.3%) ca: 3.5s (32.2x, 0.8%) dr: 5.0s (45.5x, -0.6%) ma: 5.1s (46.6x, 2.7%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.2s (25.0x, -----) me: 1.3s (129.0x, -----) ca: 1.0s (100.0x, -----) he: 1.1s (110.0x, -----) ca: 0.6s (64.0x, -----) dr: 1.0s (98.0x, -----) ma: 1.0s (104.0x, -----) many-loss-records valgrind-old:0.01s no: 0.3s (26.0x, -4.0%) me: 1.3s (128.0x, 0.8%) ca: 1.0s (100.0x, 0.0%) he: 1.1s (112.0x, -1.8%) ca: 0.7s (65.0x, -1.6%) dr: 1.0s (98.0x, 0.0%) ma: 1.1s (106.0x, -1.9%) -- many-xpts -- many-xpts valgrind-new:0.04s no: 0.3s ( 7.8x, -----) me: 1.7s (43.5x, -----) ca: 2.6s (65.0x, -----) he: 2.2s (55.0x, -----) ca: 0.9s (22.5x, -----) dr: 1.4s (36.0x, -----) ma: 1.6s (39.0x, -----) many-xpts valgrind-old:0.04s no: 0.3s ( 8.0x, -3.2%) me: 1.8s (43.8x, -0.6%) ca: 2.6s (65.2x, -0.4%) he: 2.2s (55.2x, -0.5%) ca: 0.9s (23.0x, -2.2%) dr: 1.4s (36.2x, -0.7%) ma: 1.6s (39.2x, -0.6%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (14.0x, -----) me: 2.3s (117.0x, -----) ca: 1.7s (85.0x, -----) he: 7.5s (372.5x, -----) ca: 0.9s (44.0x, -----) dr: 0.9s (44.5x, -----) ma: 0.3s (15.5x, -----) sarp valgrind-old:0.02s no: 0.3s (14.0x, 0.0%) me: 2.4s (121.0x, -3.4%) ca: 1.7s (85.0x, 0.0%) he: 7.3s (367.5x, 1.3%) ca: 0.9s (44.5x, -1.1%) dr: 0.9s (45.0x, -1.1%) ma: 0.3s (15.0x, 3.2%) -- tinycc -- tinycc valgrind-new:0.16s no: 1.4s ( 8.4x, -----) me: 8.5s (53.3x, -----) ca:10.8s (67.6x, -----) he: 9.6s (60.0x, -----) ca: 7.8s (49.1x, -----) dr: 7.5s (47.0x, -----) ma: 2.4s (15.1x, -----) tinycc valgrind-old:0.16s no: 1.4s ( 8.4x, 0.0%) me: 8.5s (53.3x, 0.0%) ca:11.0s (68.5x, -1.3%) he: 9.8s (60.9x, -1.6%) ca: 7.6s (47.8x, 2.7%) dr: 7.7s (47.9x, -2.0%) ma: 2.4s (14.8x, 1.7%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 35m14.662s user 34m11.827s sys 0m23.027s |
|
From: Tom H. <to...@co...> - 2014-08-15 02:51:00
|
valgrind revision: 14280 VEX revision: 2922 C compiler: gcc (GCC) 4.8.3 20140624 (Red Hat 4.8.3-1) GDB: GNU gdb (GDB) Fedora 7.6.1-46.fc19 Assembler: GNU assembler version 2.23.52.0.1-9.fc19 20130226 C library: GNU C Library (GNU libc) stable release version 2.17 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 19 (Schrödingerâs Cat) Nightly build on bristol ( x86_64, Fedora 19 (Schrödingerâs Cat) ) Started at 2014-08-15 02:31:34 BST Ended at 2014-08-15 03:50:43 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 6 stderr failures, 1 stdout failure, 1 stderrB failure, 5 stdoutB failures, 0 post failures == gdbserver_tests/hginfo (stdoutB) gdbserver_tests/mcmain_pic (stdout) gdbserver_tests/mcmain_pic (stderr) gdbserver_tests/mcmain_pic (stdoutB) gdbserver_tests/mcsignopass (stdoutB) gdbserver_tests/mcsigpass (stderr) gdbserver_tests/mcsigpass (stdoutB) gdbserver_tests/nlsigvgdb (stderrB) gdbserver_tests/nlvgdbsigqueue (stdoutB) memcheck/tests/addressable (stderr) memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/hackedbz2 (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/hackedbz2 (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short 2014-08-15 02:50:34.919978013 +0100 --- new.short 2014-08-15 03:14:31.928470150 +0100 *************** *** 8,10 **** ! == 693 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) --- 8,20 ---- ! == 693 tests, 6 stderr failures, 1 stdout failure, 1 stderrB failure, 5 stdoutB failures, 0 post failures == ! gdbserver_tests/hginfo (stdoutB) ! gdbserver_tests/mcmain_pic (stdout) ! gdbserver_tests/mcmain_pic (stderr) ! gdbserver_tests/mcmain_pic (stdoutB) ! gdbserver_tests/mcsignopass (stdoutB) ! gdbserver_tests/mcsigpass (stderr) ! gdbserver_tests/mcsigpass (stdoutB) ! gdbserver_tests/nlsigvgdb (stderrB) ! gdbserver_tests/nlvgdbsigqueue (stdoutB) ! memcheck/tests/addressable (stderr) memcheck/tests/err_disable4 (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 1.6s (14.9x, -----) me: 3.2s (28.9x, -----) ca:13.4s (121.5x, -----) he: 1.9s (17.2x, -----) ca: 3.8s (34.3x, -----) dr: 1.9s (17.3x, -----) ma: 1.9s (17.5x, -----) bigcode1 valgrind-old:0.11s no: 1.6s (15.0x, -0.6%) me: 3.2s (29.1x, -0.6%) ca:13.3s (121.1x, 0.4%) he: 1.9s (17.2x, 0.0%) ca: 3.8s (34.3x, 0.0%) dr: 1.9s (16.9x, 2.1%) ma: 1.9s (17.6x, -0.5%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 3.9s (35.3x, -----) me: 8.2s (74.5x, -----) ca:25.3s (229.9x, -----) he:sh: fork: retry: No child processes 4.6s (42.2x, -----) ca: 7.0s (63.7x, -----) dr: 4.5s (41.2x, -----) ma: 4.5s (40.7x, -----) bigcode2 valgrind-old:0.11s no: 3.8s (34.6x, 1.8%) me: 8.2s (74.5x, 0.0%) ca:25.6s (232.5x, -1.1%) he: 4.8s (43.6x, -3.4%) ca: 7.1s (64.5x, -1.1%) dr: 4.5s (41.0x, 0.4%) ma: 4.4s (40.0x, 1.8%) -- bz2 -- bz2 valgrind-new:0.49s no: 2.3s ( 4.6x, -----) me: 6.4s (13.1x, -----) ca:13.1s (26.8x, -----) he:10.0s (20.4x, -----) ca:11.2s (22.8x, -----) dr:12.4s (25.2x, -----) ma: 2.1s ( 4.3x, -----) bz2 valgrind-old:0.49s no: 2.1s ( 4.3x, 7.9%) me: 6.5s (13.2x, -0.5%) ca:13.2s (27.0x, -0.8%) he: 9.9s (20.1x, 1.5%) ca:11.6s (23.8x, -4.4%) dr:12.2s (24.8x, 1.6%) ma: 2.2s ( 4.4x, -3.3%) -- fbench -- fbench valgrind-new:0.22s no: 1.1s ( 4.8x, -----) me: 3.7s (16.8x, -----) ca: 6.3s (28.6x, -----) he: 2.5s (11.5x, -----) ca: 3.1s (14.1x, -----) dr: 2.4s (10.9x, -----) ma: 1.1s ( 4.9x, -----) fbench valgrind-old:0.22s no: 1.0s ( 4.7x, 2.8%) me: 3.3s (15.0x, 10.3%) ca: 5.7s (25.7x, 10.0%) he: 2.5s (11.4x, 1.2%) ca: 3.1s (14.3x, -1.6%) dr: 2.4s (10.9x, 0.0%) ma: 1.1s ( 5.0x, -3.7%) -- ffbench -- ffbench valgrind-new:0.25s no: 1.0s ( 3.9x, -----) me: 2.9s (11.5x, -----) ca: 1.9s ( 7.8x, -----) he: 6.4s (25.6x, -----) ca: 4.5s (17.8x, -----) dr: 3.2s (12.8x, -----) ma: 0.9s ( 3.6x, -----) ffbench valgrind-old:0.25s no: 1.0s ( 3.8x, 2.0%) me: 2.9s (11.4x, 0.7%) ca: 1.9s ( 7.7x, 1.5%) he: 6.3s (25.2x, 1.7%) ca: 4.7s (18.7x, -4.7%) dr: 3.3s (13.2x, -3.8%) ma: 0.9s ( 3.6x, -1.1%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 7.9x, -----) me: 5.0s (62.3x, -----) ca: 6.3s (78.5x, -----) he: 7.1s (88.5x, -----) ca: 3.4s (42.5x, -----) dr: 4.3s (54.4x, -----) ma: 4.9s (61.6x, -----) heap valgrind-old:0.08s no: 0.6s ( 8.0x, -1.6%) me: 5.0s (62.3x, 0.0%) ca: 6.0s (75.2x, 4.1%) he: 7.3s (90.9x, -2.7%) ca: 3.3s (41.6x, 2.1%) dr: 4.4s (55.1x, -1.4%) ma: 5.0s (62.4x, -1.2%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.10s no: 0.8s ( 7.5x, -----) me: 8.8s (88.5x, -----) ca: 6.9s (68.9x, -----) he: 8.0s (80.3x, -----) ca: 3.5s (35.2x, -----) dr: 5.0s (49.5x, -----) ma: 5.1s (51.0x, -----) heap_pdb4 valgrind-old:0.10s no: 0.7s ( 7.4x, 1.3%) me: 8.8s (87.8x, 0.8%) ca: 6.7s (67.4x, 2.2%) he: 7.7s (76.6x, 4.6%) ca: 3.5s (35.4x, -0.6%) dr: 4.9s (48.7x, 1.6%) ma: 5.0s (49.7x, 2.5%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.3s (26.0x, -----) me: 1.3s (126.0x, -----) ca: 1.0s (100.0x, -----) he: 1.1s (110.0x, -----) ca: 0.7s (67.0x, -----) dr: 1.0s (98.0x, -----) ma: 1.1s (105.0x, -----) many-loss-records valgrind-old:0.01s no: 0.3s (26.0x, 0.0%) me: 1.3s (129.0x, -2.4%) ca: 1.0s (99.0x, 1.0%) he: 1.1s (112.0x, -1.8%) ca: 0.7s (68.0x, -1.5%) dr: 1.0s (98.0x, 0.0%) ma: 1.1s (105.0x, 0.0%) -- many-xpts -- many-xpts valgrind-new:0.03s no: 0.3s (10.7x, -----) me: 1.4s (48.0x, -----) ca: 2.6s (85.7x, -----) he: 2.1s (68.7x, -----) ca: 1.0s (32.3x, -----) dr: 1.4s (46.3x, -----) ma: 1.6s (52.0x, -----) many-xpts valgrind-old:0.03s no: 0.3s (10.7x, 0.0%) me: 1.4s (48.0x, 0.0%) ca: 2.6s (85.3x, 0.4%) he: 2.1s (68.7x, 0.0%) ca: 1.0s (34.7x, -7.2%) dr: 1.4s (45.7x, 1.4%) ma: 1.5s (51.3x, 1.3%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (14.5x, -----) me: 2.1s (106.5x, -----) ca: 1.7s (86.0x, -----) he: 6.0s (299.5x, -----) ca: 0.9s (45.5x, -----) dr: 0.9s (47.0x, -----) ma: 0.3s (15.0x, -----) sarp valgrind-old:0.02s no: 0.3s (14.0x, 3.4%) me: 2.2s (109.5x, -2.8%) ca: 1.7s (86.0x, 0.0%) he: 6.1s (303.0x, -1.2%) ca: 0.9s (46.0x, -1.1%) dr: 0.9s (47.5x, -1.1%) ma: 0.3s (15.0x, 0.0%) -- tinycc -- tinycc valgrind-new:0.15s no: 1.4s ( 9.3x, -----) me: 8.2s (54.3x, -----) ca:11.1s (73.7x, -----) he:10.1s (67.1x, -----) ca: 8.3s (55.7x, -----) dr: 8.4s (56.3x, -----) ma: 2.5s (16.4x, -----) tinycc valgrind-old:0.15s no: 1.4s ( 9.3x, -0.7%) me: 8.1s (53.8x, 1.0%) ca:11.9s (79.3x, -7.5%) he:10.4s (69.1x, -3.1%) ca: 7.9s (52.7x, 5.3%) dr: 8.1s (54.3x, 3.7%) ma: 2.5s (16.7x, -1.6%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 36m11.067s user 34m26.416s sys 0m24.067s |
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From: Tom H. <to...@co...> - 2014-08-15 02:38:49
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valgrind revision: 14280
VEX revision: 2922
C compiler: gcc (GCC) 4.3.0 20080428 (Red Hat 4.3.0-8)
GDB:
Assembler: GNU assembler version 2.18.50.0.6-2 20080403
C library: GNU C Library stable release version 2.8
uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64
Vendor version: Fedora release 9 (Sulphur)
Nightly build on bristol ( x86_64, Fedora 9 )
Started at 2014-08-15 03:21:37 BST
Ended at 2014-08-15 03:38:37 BST
Results differ from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 661 tests, 4 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
memcheck/tests/amd64/insn-pcmpistri (stderr)
memcheck/tests/err_disable4 (stderr)
memcheck/tests/vbit-test/vbit-test (stderr)
none/tests/amd64/sse4-64 (stdout)
exp-sgcheck/tests/hsg (stderr)
=================================================
== Results from 24 hours ago ==
=================================================
Checking out valgrind source tree ... done
Configuring valgrind ... failed
Last 20 lines of verbose log follow echo
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
./configure: line 14301: echo: write error: Broken pipe
=================================================
== Difference between 24 hours ago and now ==
=================================================
*** old.short 2014-08-15 03:22:08.143737072 +0100
--- new.short 2014-08-15 03:38:36.594815697 +0100
***************
*** 2,25 ****
Checking out valgrind source tree ... done
! Configuring valgrind ... failed
- Last 20 lines of verbose log follow echo
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
- ./configure: line 14301: echo: write error: Broken pipe
--- 2,15 ----
Checking out valgrind source tree ... done
! Configuring valgrind ... done
! Building valgrind ... done
! Running regression tests ... failed
!
! Regression test results follow
!
! == 661 tests, 4 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
! memcheck/tests/amd64/insn-pcmpistri (stderr)
! memcheck/tests/err_disable4 (stderr)
! memcheck/tests/vbit-test/vbit-test (stderr)
! none/tests/amd64/sse4-64 (stdout)
! exp-sgcheck/tests/hsg (stderr)
--tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old
-- Running tests in perf ----------------------------------------------
-- bigcode1 --
vg_perf: '/tmp/vgtest-11013/2014-08-15/valgrind-new/../valgrind-old/./coregrind/valgrind' not found or not a file (/tmp/vgtest-11013/2014-08-15/valgrind-new/../valgrind-old)
real 0m0.653s
user 0m0.337s
sys 0m0.012s
|
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From: Tom H. <to...@co...> - 2014-08-15 02:12:59
|
valgrind revision: 14280
VEX revision: 2922
C compiler: gcc (GCC) 4.8.3 20140624 (Red Hat 4.8.3-1)
GDB: GNU gdb (GDB) Fedora 7.7.1-17.fc20
Assembler: GNU assembler version 2.23.2
C library: GNU C Library (GNU libc) stable release version 2.18
uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64
Vendor version: Fedora release 20 (Heisenbug)
Nightly build on bristol ( x86_64, Fedora 20 )
Started at 2014-08-15 02:21:32 BST
Ended at 2014-08-15 03:12:38 BST
Results differ from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 693 tests, 10 stderr failures, 1 stdout failure, 0 stderrB failures, 1 stdoutB failure, 0 post failures ==
gdbserver_tests/mcclean_after_fork (stdoutB)
memcheck/tests/err_disable4 (stderr)
memcheck/tests/vbit-test/vbit-test (stderr)
none/tests/fdleak_ipv4 (stdout)
none/tests/fdleak_ipv4 (stderr)
drd/tests/free_is_write (stderr)
drd/tests/hg03_inherit (stderr)
drd/tests/hg04_race (stderr)
drd/tests/hg05_race2 (stderr)
drd/tests/pth_detached3 (stderr)
drd/tests/pth_detached_sem (stderr)
exp-sgcheck/tests/hackedbz2 (stderr)
=================================================
== Results from 24 hours ago ==
=================================================
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 693 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
memcheck/tests/err_disable4 (stderr)
memcheck/tests/vbit-test/vbit-test (stderr)
exp-sgcheck/tests/hackedbz2 (stderr)
=================================================
== Difference between 24 hours ago and now ==
=================================================
*** old.short 2014-08-15 02:39:58.931152397 +0100
--- new.short 2014-08-15 03:04:43.355736874 +0100
***************
*** 8,12 ****
! == 693 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
memcheck/tests/err_disable4 (stderr)
memcheck/tests/vbit-test/vbit-test (stderr)
exp-sgcheck/tests/hackedbz2 (stderr)
--- 8,21 ----
! == 693 tests, 10 stderr failures, 1 stdout failure, 0 stderrB failures, 1 stdoutB failure, 0 post failures ==
! gdbserver_tests/mcclean_after_fork (stdoutB)
memcheck/tests/err_disable4 (stderr)
memcheck/tests/vbit-test/vbit-test (stderr)
+ none/tests/fdleak_ipv4 (stdout)
+ none/tests/fdleak_ipv4 (stderr)
+ drd/tests/free_is_write (stderr)
+ drd/tests/hg03_inherit (stderr)
+ drd/tests/hg04_race (stderr)
+ drd/tests/hg05_race2 (stderr)
+ drd/tests/pth_detached3 (stderr)
+ drd/tests/pth_detached_sem (stderr)
exp-sgcheck/tests/hackedbz2 (stderr)
--tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old
-- Running tests in perf ----------------------------------------------
-- bigcode1 --
bigcode1 valgrind-new:0.11s no: 1.7s (15.1x, -----) me: 3.1s (28.5x, -----) ca:13.0s (118.5x, -----) he: 1.9s (17.3x, -----) ca: 3.7s (34.0x, -----) dr: 1.8s (16.6x, -----) ma: 1.9s (17.5x, -----)
bigcode1 valgrind-old:0.11s no: 1.6s (14.8x, 1.8%) me: 3.1s (28.3x, 1.0%) ca:13.3s (120.7x, -1.8%) he: 1.9s (17.0x, 1.6%) ca: 3.8s (34.1x, -0.3%) dr: 1.9s (16.9x, -1.6%) ma: 1.9s (17.4x, 0.5%)
-- bigcode2 --
bigcode2 valgrind-new:0.11s no: 3.9s (35.6x, -----) me: 8.2s (74.8x, -----) ca:25.9s (235.6x, -----) he: 4.8s (43.5x, -----) ca: 7.1s (64.3x, -----) dr: 4.5s (41.1x, -----) ma: 4.4s (40.2x, -----)
bigcode2 valgrind-old:0.11s no: 3.8s (34.7x, 2.6%) me: 8.2s (74.5x, 0.5%) ca:25.8s (234.1x, 0.7%) he:
*** Command returned non-zero (256)
*** See perf.{cmd,stdout,stderr} to determine what went wrong.
real 7m55.201s
user 7m42.095s
sys 0m3.877s
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