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From: <sv...@va...> - 2014-08-11 22:45:58
|
Author: philippe
Date: Mon Aug 11 22:45:47 2014
New Revision: 2919
Log:
Small cleanups in VEX:
* rm unused arm64 function
* ijk_nodecode: always set the 4 components of the result
(avoid a compiler warning that a part is not initialised)
Modified:
trunk/priv/guest_arm64_toIR.c
trunk/priv/guest_arm_toIR.c
trunk/priv/guest_ppc_toIR.c
trunk/priv/guest_s390_toIR.c
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Mon Aug 11 22:45:47 2014
@@ -6213,22 +6213,6 @@
}
-/* Generate IR that takes an I64 and sign- or zero- widens each
- lane, giving a V128 value. */
-static
-IRTemp math_WIDEN_LANES ( Bool zWiden, UInt sizeNarrow, IRExpr* srcE )
-{
- IRTemp src = newTemp(Ity_I64);
- assign(src, srcE);
- return math_WIDEN_LO_OR_HI_LANES(
- zWiden,
- False/*!fromUpperHalf*/,
- sizeNarrow,
- binop(Iop_64HLtoV128, mkexpr(src), mkexpr(src))
- );
-}
-
-
/* Return a temp which holds the vector dup of the lane of width
(1 << size) obtained from src[laneNo]. */
static
@@ -10836,10 +10820,10 @@
start of each insn, but nevertheless be paranoid and update
it again right now. */
putPC( mkU64(guest_PC_curr_instr) );
- dres.whatNext = Dis_StopHere;
dres.len = 0;
- dres.continueAt = 0;
+ dres.whatNext = Dis_StopHere;
dres.jk_StopHere = Ijk_NoDecode;
+ dres.continueAt = 0;
}
return dres;
}
Modified: trunk/priv/guest_arm_toIR.c
==============================================================================
--- trunk/priv/guest_arm_toIR.c (original)
+++ trunk/priv/guest_arm_toIR.c Mon Aug 11 22:45:47 2014
@@ -17277,9 +17277,10 @@
now. */
vassert(0 == (guest_R15_curr_instr_notENC & 3));
llPutIReg( 15, mkU32(guest_R15_curr_instr_notENC) );
+ dres.len = 0;
dres.whatNext = Dis_StopHere;
dres.jk_StopHere = Ijk_NoDecode;
- dres.len = 0;
+ dres.continueAt = 0;
return dres;
decode_success:
@@ -21846,9 +21847,10 @@
now. */
vassert(0 == (guest_R15_curr_instr_notENC & 1));
llPutIReg( 15, mkU32(guest_R15_curr_instr_notENC | 1) );
+ dres.len = 0;
dres.whatNext = Dis_StopHere;
dres.jk_StopHere = Ijk_NoDecode;
- dres.len = 0;
+ dres.continueAt = 0;
return dres;
decode_success:
Modified: trunk/priv/guest_ppc_toIR.c
==============================================================================
--- trunk/priv/guest_ppc_toIR.c (original)
+++ trunk/priv/guest_ppc_toIR.c Mon Aug 11 22:45:47 2014
@@ -20086,11 +20086,11 @@
insn, but nevertheless be paranoid and update it again right
now. */
putGST( PPC_GST_CIA, mkSzImm(ty, guest_CIA_curr_instr) );
+ dres.len = 0;
dres.whatNext = Dis_StopHere;
dres.jk_StopHere = Ijk_NoDecode;
- dres.len = 0;
+ dres.continueAt = 0;
return dres;
-
} /* switch (opc) for the main (primary) opcode switch. */
decode_success:
@@ -20154,9 +20154,9 @@
ty = mode64 ? Ity_I64 : Ity_I32;
if (!mode64 && (host_endness_IN == VexEndnessLE)) {
vex_printf("disInstr(ppc): Little Endian 32-bit mode is not supported\n");
+ dres.len = 0;
dres.whatNext = Dis_StopHere;
dres.jk_StopHere = Ijk_NoDecode;
- dres.len = 0;
dres.continueAt = 0;
return dres;
}
Modified: trunk/priv/guest_s390_toIR.c
==============================================================================
--- trunk/priv/guest_s390_toIR.c (original)
+++ trunk/priv/guest_s390_toIR.c Mon Aug 11 22:45:47 2014
@@ -16515,10 +16515,10 @@
incorrect address. */
put_IA(mkaddr_expr(guest_IA_curr_instr));
+ dres.len = 0;
dres.whatNext = Dis_StopHere;
dres.jk_StopHere = Ijk_NoDecode;
dres.continueAt = 0;
- dres.len = 0;
} else {
/* Decode success */
switch (dres.whatNext) {
|
|
From: <sv...@va...> - 2014-08-11 15:48:59
|
Author: florian
Date: Mon Aug 11 15:48:51 2014
New Revision: 14262
Log:
Correct a comment. We really should not specify the default values
here. Double maintenance.
Modified:
trunk/include/pub_tool_options.h
Modified: trunk/include/pub_tool_options.h
==============================================================================
--- trunk/include/pub_tool_options.h (original)
+++ trunk/include/pub_tool_options.h Mon Aug 11 15:48:51 2014
@@ -176,7 +176,7 @@
less aggressively if that is needed (callgrind needs this). */
extern VexControl VG_(clo_vex_control);
-/* Number of parents of a backtrace. Default: 8. */
+/* Number of parents of a backtrace. Default: 12 */
extern Int VG_(clo_backtrace_size);
/* Continue stack traces below main()? Default: NO */
|
|
From: <sv...@va...> - 2014-08-11 15:27:18
|
Author: florian
Date: Mon Aug 11 15:27:11 2014
New Revision: 14261
Log:
Update a comment. Shuld have been done in r14206.
Modified:
branches/BUF_REMOVAL/include/pub_tool_libcfile.h
Modified: branches/BUF_REMOVAL/include/pub_tool_libcfile.h
==============================================================================
--- branches/BUF_REMOVAL/include/pub_tool_libcfile.h (original)
+++ branches/BUF_REMOVAL/include/pub_tool_libcfile.h Mon Aug 11 15:27:11 2014
@@ -100,8 +100,8 @@
/* Return the name of a directory for temporary files. */
extern const HChar* VG_(tmpdir)(void);
-/* Copy the working directory at startup into buf[0 .. size-1], or return
- False if buf is too small. */
+/* Return the working directory at startup. The returned string is
+ persistent. */
extern const HChar *VG_(get_startup_wd) ( void );
#endif // __PUB_TOOL_LIBCFILE_H
|
|
From: <sv...@va...> - 2014-08-11 15:21:51
|
Author: florian
Date: Mon Aug 11 15:21:44 2014
New Revision: 14260
Log:
Give static variable function scope.
Modified:
trunk/coregrind/m_libcbase.c
Modified: trunk/coregrind/m_libcbase.c
==============================================================================
--- trunk/coregrind/m_libcbase.c (original)
+++ trunk/coregrind/m_libcbase.c Mon Aug 11 15:21:44 2014
@@ -935,10 +935,10 @@
// is NULL, it uses its own seed, which starts at zero. If pSeed is
// non-NULL, it uses and updates whatever pSeed points at.
-static UInt seed = 0;
-
UInt VG_(random)( /*MOD*/UInt* pSeed )
{
+ static UInt seed = 0;
+
if (pSeed == NULL)
pSeed = &seed;
|
|
From: <sv...@va...> - 2014-08-11 15:21:19
|
Author: florian
Date: Mon Aug 11 15:21:11 2014
New Revision: 14259
Log:
Remove unused and possibly incorrectly defined macro.
Modified:
trunk/include/pub_tool_libcbase.h
Modified: trunk/include/pub_tool_libcbase.h
==============================================================================
--- trunk/include/pub_tool_libcbase.h (original)
+++ trunk/include/pub_tool_libcbase.h Mon Aug 11 15:21:11 2014
@@ -224,7 +224,6 @@
// is NULL, it uses its own seed, which starts at zero. If pSeed is
// non-NULL, it uses and updates whatever pSeed points at.
extern UInt VG_(random) ( /*MOD*/UInt* pSeed );
-#define VG_RAND_MAX (1ULL << 32)
/* Update a running Adler-32 checksum with the bytes buf[0..len-1] and
return the updated checksum. If buf is NULL, this function returns
|
|
From: <sv...@va...> - 2014-08-11 14:39:39
|
Author: florian
Date: Mon Aug 11 14:39:28 2014
New Revision: 14258
Log:
Remove unneeded include files.
Modified:
trunk/include/pub_tool_gdbserver.h
Modified: trunk/include/pub_tool_gdbserver.h
==============================================================================
--- trunk/include/pub_tool_gdbserver.h (original)
+++ trunk/include/pub_tool_gdbserver.h Mon Aug 11 14:39:28 2014
@@ -31,8 +31,6 @@
#define __PUB_TOOL_GDBSERVER_H
#include "pub_tool_basics.h" // VG_ macro
-#include "libvex.h"
-#include "libvex_ir.h"
//--------------------------------------------------------------------
// PURPOSE: This module provides the support to have a gdb
|
Author: sewardj
Date: Mon Aug 11 14:02:47 2014
New Revision: 2918
Log:
arm64: implement:
uqshrn{2}, sqrshrun{2}, sqshrun{2} (vector, imm)
sqxtn{2}, uqxtn{2}, sqxtun{2} (vector and scalar)
Modified:
trunk/priv/guest_arm64_toIR.c
trunk/priv/host_arm64_defs.c
trunk/priv/host_arm64_defs.h
trunk/priv/host_arm64_isel.c
trunk/priv/ir_defs.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Mon Aug 11 14:02:47 2014
@@ -809,8 +809,7 @@
return ops[size];
}
-static IROp mkVecQANDUQSH ( UInt size )
-{
+static IROp mkVecQANDUQSH ( UInt size ) {
const IROp ops[4]
= { Iop_QandUQsh8x16, Iop_QandUQsh16x8,
Iop_QandUQsh32x4, Iop_QandUQsh64x2 };
@@ -818,8 +817,7 @@
return ops[size];
}
-static IROp mkVecQANDSQSH ( UInt size )
-{
+static IROp mkVecQANDSQSH ( UInt size ) {
const IROp ops[4]
= { Iop_QandSQsh8x16, Iop_QandSQsh16x8,
Iop_QandSQsh32x4, Iop_QandSQsh64x2 };
@@ -827,8 +825,7 @@
return ops[size];
}
-static IROp mkVecQANDUQRSH ( UInt size )
-{
+static IROp mkVecQANDUQRSH ( UInt size ) {
const IROp ops[4]
= { Iop_QandUQRsh8x16, Iop_QandUQRsh16x8,
Iop_QandUQRsh32x4, Iop_QandUQRsh64x2 };
@@ -836,8 +833,7 @@
return ops[size];
}
-static IROp mkVecQANDSQRSH ( UInt size )
-{
+static IROp mkVecQANDSQRSH ( UInt size ) {
const IROp ops[4]
= { Iop_QandSQRsh8x16, Iop_QandSQRsh16x8,
Iop_QandSQRsh32x4, Iop_QandSQRsh64x2 };
@@ -845,6 +841,86 @@
return ops[size];
}
+static IROp mkVecNARROWUN ( UInt sizeNarrow ) {
+ const IROp ops[4]
+ = { Iop_NarrowUn16to8x8, Iop_NarrowUn32to16x4,
+ Iop_NarrowUn64to32x2, Iop_INVALID };
+ vassert(sizeNarrow < 4);
+ return ops[sizeNarrow];
+}
+
+static IROp mkVecQNARROWUNSU ( UInt sizeNarrow ) {
+ const IROp ops[4]
+ = { Iop_QNarrowUn16Sto8Ux8, Iop_QNarrowUn32Sto16Ux4,
+ Iop_QNarrowUn64Sto32Ux2, Iop_INVALID };
+ vassert(sizeNarrow < 4);
+ return ops[sizeNarrow];
+}
+
+static IROp mkVecQNARROWUNSS ( UInt sizeNarrow ) {
+ const IROp ops[4]
+ = { Iop_QNarrowUn16Sto8Sx8, Iop_QNarrowUn32Sto16Sx4,
+ Iop_QNarrowUn64Sto32Sx2, Iop_INVALID };
+ vassert(sizeNarrow < 4);
+ return ops[sizeNarrow];
+}
+
+static IROp mkVecQNARROWUNUU ( UInt sizeNarrow ) {
+ const IROp ops[4]
+ = { Iop_QNarrowUn16Uto8Ux8, Iop_QNarrowUn32Uto16Ux4,
+ Iop_QNarrowUn64Uto32Ux2, Iop_INVALID };
+ vassert(sizeNarrow < 4);
+ return ops[sizeNarrow];
+}
+
+static IROp mkVecQANDqshrNNARROWUU ( UInt sizeNarrow ) {
+ const IROp ops[4]
+ = { Iop_QandQShrNnarrow16Uto8Ux8, Iop_QandQShrNnarrow32Uto16Ux4,
+ Iop_QandQShrNnarrow64Uto32Ux2, Iop_INVALID };
+ vassert(sizeNarrow < 4);
+ return ops[sizeNarrow];
+}
+
+static IROp mkVecQANDqsarNNARROWSS ( UInt sizeNarrow ) {
+ const IROp ops[4]
+ = { Iop_QandQSarNnarrow16Sto8Sx8, Iop_QandQSarNnarrow32Sto16Sx4,
+ Iop_QandQSarNnarrow64Sto32Sx2, Iop_INVALID };
+ vassert(sizeNarrow < 4);
+ return ops[sizeNarrow];
+}
+
+static IROp mkVecQANDqsarNNARROWSU ( UInt sizeNarrow ) {
+ const IROp ops[4]
+ = { Iop_QandQSarNnarrow16Sto8Ux8, Iop_QandQSarNnarrow32Sto16Ux4,
+ Iop_QandQSarNnarrow64Sto32Ux2, Iop_INVALID };
+ vassert(sizeNarrow < 4);
+ return ops[sizeNarrow];
+}
+
+static IROp mkVecQANDqrshrNNARROWUU ( UInt sizeNarrow ) {
+ const IROp ops[4]
+ = { Iop_QandQRShrNnarrow16Uto8Ux8, Iop_QandQRShrNnarrow32Uto16Ux4,
+ Iop_QandQRShrNnarrow64Uto32Ux2, Iop_INVALID };
+ vassert(sizeNarrow < 4);
+ return ops[sizeNarrow];
+}
+
+static IROp mkVecQANDqrsarNNARROWSS ( UInt sizeNarrow ) {
+ const IROp ops[4]
+ = { Iop_QandQRSarNnarrow16Sto8Sx8, Iop_QandQRSarNnarrow32Sto16Sx4,
+ Iop_QandQRSarNnarrow64Sto32Sx2, Iop_INVALID };
+ vassert(sizeNarrow < 4);
+ return ops[sizeNarrow];
+}
+
+static IROp mkVecQANDqrsarNNARROWSU ( UInt sizeNarrow ) {
+ const IROp ops[4]
+ = { Iop_QandQRSarNnarrow16Sto8Ux8, Iop_QandQRSarNnarrow32Sto16Ux4,
+ Iop_QandQRSarNnarrow64Sto32Ux2, Iop_INVALID };
+ vassert(sizeNarrow < 4);
+ return ops[sizeNarrow];
+}
+
/* Generate IR to create 'arg rotated right by imm', for sane values
of 'ty' and 'imm'. */
static IRTemp mathROR ( IRType ty, IRTemp arg, UInt imm )
@@ -6137,6 +6213,22 @@
}
+/* Generate IR that takes an I64 and sign- or zero- widens each
+ lane, giving a V128 value. */
+static
+IRTemp math_WIDEN_LANES ( Bool zWiden, UInt sizeNarrow, IRExpr* srcE )
+{
+ IRTemp src = newTemp(Ity_I64);
+ assign(src, srcE);
+ return math_WIDEN_LO_OR_HI_LANES(
+ zWiden,
+ False/*!fromUpperHalf*/,
+ sizeNarrow,
+ binop(Iop_64HLtoV128, mkexpr(src), mkexpr(src))
+ );
+}
+
+
/* Return a temp which holds the vector dup of the lane of width
(1 << size) obtained from src[laneNo]. */
static
@@ -6328,6 +6420,8 @@
}
+/* Zero all except the least significant lane of |srcE|, where |size|
+ indicates the lane size in the usual way. */
static IRTemp math_ZERO_ALL_EXCEPT_LOWEST_LANE ( UInt size, IRExpr* srcE )
{
vassert(size < 4);
@@ -7780,6 +7874,43 @@
return True;
}
+ if (opcode == BITS5(1,0,1,0,0)
+ || (bitU == 1 && opcode == BITS5(1,0,0,1,0))) {
+ /* -------- 0,xx,10100: SQXTN -------- */
+ /* -------- 1,xx,10100: UQXTN -------- */
+ /* -------- 1,xx,10010: SQXTUN -------- */
+ if (size == X11) return False;
+ vassert(size < 3);
+ IROp opN = Iop_INVALID;
+ Bool zWiden = True;
+ const HChar* nm = "??";
+ /**/ if (bitU == 0 && opcode == BITS5(1,0,1,0,0)) {
+ opN = mkVecQNARROWUNSS(size); nm = "sqxtn"; zWiden = False;
+ }
+ else if (bitU == 1 && opcode == BITS5(1,0,1,0,0)) {
+ opN = mkVecQNARROWUNUU(size); nm = "uqxtn";
+ }
+ else if (bitU == 1 && opcode == BITS5(1,0,0,1,0)) {
+ opN = mkVecQNARROWUNSU(size); nm = "sqxtun";
+ }
+ else vassert(0);
+ IRTemp src = math_ZERO_ALL_EXCEPT_LOWEST_LANE(
+ size+1, getQReg128(nn));
+ IRTemp resN = math_ZERO_ALL_EXCEPT_LOWEST_LANE(
+ size, unop(Iop_64UtoV128, unop(opN, mkexpr(src))));
+ putQReg128(dd, mkexpr(resN));
+ /* This widens zero lanes to zero, and compares it against zero, so all
+ of the non-participating lanes make no contribution to the
+ Q flag state. */
+ IRTemp resW = math_WIDEN_LO_OR_HI_LANES(zWiden, False/*!fromUpperHalf*/,
+ size, mkexpr(resN));
+ updateQCFLAGwithDifference(src, resW);
+ const HChar arrNarrow = "bhsd"[size];
+ const HChar arrWide = "bhsd"[size+1];
+ DIP("%s %c%u, %c%u\n", nm, arrNarrow, dd, arrWide, nn);
+ return True;
+ }
+
# define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin))
return False;
# undef INSN
@@ -8087,6 +8218,66 @@
return True;
}
+ if (opcode == BITS5(1,0,0,1,0) || opcode == BITS5(1,0,0,1,1)
+ || (bitU == 1
+ && (opcode == BITS5(1,0,0,0,0) || opcode == BITS5(1,0,0,0,1)))) {
+ /* -------- 0,10010 SQSHRN{,2} #imm -------- */
+ /* -------- 1,10010 UQSHRN{,2} #imm -------- */
+ /* -------- 0,10011 SQRSHRN{,2} #imm -------- */
+ /* -------- 1,10011 UQRSHRN{,2} #imm -------- */
+ /* -------- 1,10000 SQSHRUN{,2} #imm -------- */
+ /* -------- 1,10001 SQRSHRUN{,2} #imm -------- */
+ UInt size = 0;
+ UInt shift = 0;
+ Bool is2 = bitQ == 1;
+ Bool ok = getLaneInfo_IMMH_IMMB(&shift, &size, immh, immb);
+ if (!ok || size == X11) return False;
+ vassert(shift >= 1 && shift <= (8 << size));
+ const HChar* nm = "??";
+ IROp op = Iop_INVALID;
+ /* Decide on the name and the operation. */
+ /**/ if (bitU == 0 && opcode == BITS5(1,0,0,1,0)) {
+ nm = "sqshrn"; op = mkVecQANDqsarNNARROWSS(size);
+ }
+ else if (bitU == 1 && opcode == BITS5(1,0,0,1,0)) {
+ nm = "uqshrn"; op = mkVecQANDqshrNNARROWUU(size);
+ }
+ else if (bitU == 0 && opcode == BITS5(1,0,0,1,1)) {
+ nm = "sqrshrn"; op = mkVecQANDqrsarNNARROWSS(size);
+ }
+ else if (bitU == 1 && opcode == BITS5(1,0,0,1,1)) {
+ nm = "uqrshrn"; op = mkVecQANDqrshrNNARROWUU(size);
+ }
+ else if (bitU == 1 && opcode == BITS5(1,0,0,0,0)) {
+ nm = "sqshrun"; op = mkVecQANDqsarNNARROWSU(size);
+ }
+ else if (bitU == 1 && opcode == BITS5(1,0,0,0,1)) {
+ nm = "sqrshrun"; op = mkVecQANDqrsarNNARROWSU(size);
+ }
+ else vassert(0);
+ /* Compute the result (Q, shifted value) pair. */
+ IRTemp src128 = newTempV128();
+ assign(src128, getQReg128(nn));
+ IRTemp pair = newTempV128();
+ assign(pair, binop(op, mkexpr(src128), mkU8(shift)));
+ /* Update the result reg */
+ IRTemp res64in128 = newTempV128();
+ assign(res64in128, unop(Iop_ZeroHI64ofV128, mkexpr(pair)));
+ putLO64andZUorPutHI64(is2, dd, res64in128);
+ /* Update the Q flag. */
+ IRTemp q64q64 = newTempV128();
+ assign(q64q64, binop(Iop_InterleaveHI64x2, mkexpr(pair), mkexpr(pair)));
+ IRTemp z128 = newTempV128();
+ assign(z128, mkV128(0x0000));
+ updateQCFLAGwithDifference(q64q64, z128);
+ /* */
+ const HChar* arrNarrow = nameArr_Q_SZ(bitQ, size);
+ const HChar* arrWide = nameArr_Q_SZ(1, size+1);
+ DIP("%s %s.%s, %s.%s, #%u\n", nm,
+ nameQReg128(dd), arrNarrow, nameQReg128(nn), arrWide, shift);
+ return True;
+ }
+
if (opcode == BITS5(1,0,1,0,0)) {
/* -------- 0,10100 SSHLL{,2} #imm -------- */
/* -------- 1,10100 USHLL{,2} #imm -------- */
@@ -9248,34 +9439,55 @@
if (bitU == 0 && opcode == BITS5(1,0,0,1,0)) {
/* -------- 0,xx,10010: XTN{,2} -------- */
- /* 31 28 23 21 15 9 4 XTN{,2} Vd.Tb, Vn.Ta
- 0q0 01110 size 100001 001010 n d
- */
- Bool isQ = bitQ == 1;
- IROp op = Iop_INVALID;
- const HChar* tb = NULL;
- const HChar* ta = NULL;
- switch ((size << 1) | (isQ ? 1 : 0)) {
- case 0: tb = "8b"; ta = "8h"; op = Iop_NarrowUn16to8x8; break;
- case 1: tb = "16b"; ta = "8h"; op = Iop_NarrowUn16to8x8; break;
- case 2: tb = "4h"; ta = "4s"; op = Iop_NarrowUn32to16x4; break;
- case 3: tb = "8h"; ta = "4s"; op = Iop_NarrowUn32to16x4; break;
- case 4: tb = "2s"; ta = "2d"; op = Iop_NarrowUn64to32x2; break;
- case 5: tb = "4s"; ta = "2d"; op = Iop_NarrowUn64to32x2; break;
- case 6: break;
- case 7: break;
- default: vassert(0);
+ if (size == X11) return False;
+ vassert(size < 3);
+ Bool is2 = bitQ == 1;
+ IROp opN = mkVecNARROWUN(size);
+ IRTemp resN = newTempV128();
+ assign(resN, unop(Iop_64UtoV128, unop(opN, getQReg128(nn))));
+ putLO64andZUorPutHI64(is2, dd, resN);
+ const HChar* nm = "xtn";
+ const HChar* arrNarrow = nameArr_Q_SZ(bitQ, size);
+ const HChar* arrWide = nameArr_Q_SZ(1, size+1);
+ DIP("%s%s %s.%s, %s.%s\n", is2 ? "2" : "", nm,
+ nameQReg128(dd), arrNarrow, nameQReg128(nn), arrWide);
+ return True;
+ }
+
+ if (opcode == BITS5(1,0,1,0,0)
+ || (bitU == 1 && opcode == BITS5(1,0,0,1,0))) {
+ /* -------- 0,xx,10100: SQXTN{,2} -------- */
+ /* -------- 1,xx,10100: UQXTN{,2} -------- */
+ /* -------- 1,xx,10010: SQXTUN{,2} -------- */
+ if (size == X11) return False;
+ vassert(size < 3);
+ Bool is2 = bitQ == 1;
+ IROp opN = Iop_INVALID;
+ Bool zWiden = True;
+ const HChar* nm = "??";
+ /**/ if (bitU == 0 && opcode == BITS5(1,0,1,0,0)) {
+ opN = mkVecQNARROWUNSS(size); nm = "sqxtn"; zWiden = False;
}
- if (op != Iop_INVALID) {
- if (!isQ) {
- putQRegLane(dd, 1, mkU64(0));
- }
- putQRegLane(dd, isQ ? 1 : 0, unop(op, getQReg128(nn)));
- DIP("xtn%s %s.%s, %s.%s\n", isQ ? "2" : "",
- nameQReg128(dd), tb, nameQReg128(nn), ta);
- return True;
+ else if (bitU == 1 && opcode == BITS5(1,0,1,0,0)) {
+ opN = mkVecQNARROWUNUU(size); nm = "uqxtn";
}
- return False;
+ else if (bitU == 1 && opcode == BITS5(1,0,0,1,0)) {
+ opN = mkVecQNARROWUNSU(size); nm = "sqxtun";
+ }
+ else vassert(0);
+ IRTemp src = newTempV128();
+ assign(src, getQReg128(nn));
+ IRTemp resN = newTempV128();
+ assign(resN, unop(Iop_64UtoV128, unop(opN, mkexpr(src))));
+ putLO64andZUorPutHI64(is2, dd, resN);
+ IRTemp resW = math_WIDEN_LO_OR_HI_LANES(zWiden, False/*!fromUpperHalf*/,
+ size, mkexpr(resN));
+ updateQCFLAGwithDifference(src, resW);
+ const HChar* arrNarrow = nameArr_Q_SZ(bitQ, size);
+ const HChar* arrWide = nameArr_Q_SZ(1, size+1);
+ DIP("%s%s %s.%s, %s.%s\n", is2 ? "2" : "", nm,
+ nameQReg128(dd), arrNarrow, nameQReg128(nn), arrWide);
+ return True;
}
if (bitU == 1 && opcode == BITS5(1,0,0,1,1)) {
Modified: trunk/priv/host_arm64_defs.c
==============================================================================
--- trunk/priv/host_arm64_defs.c (original)
+++ trunk/priv/host_arm64_defs.c Mon Aug 11 14:02:47 2014
@@ -1007,19 +1007,47 @@
ARM64VecShiftOp op )
{
switch (op) {
- case ARM64vecsh_USHR64x2: *nm = "ushr "; *ar = "2d"; return;
- case ARM64vecsh_USHR32x4: *nm = "ushr "; *ar = "4s"; return;
- case ARM64vecsh_USHR16x8: *nm = "ushr "; *ar = "8h"; return;
- case ARM64vecsh_USHR8x16: *nm = "ushr "; *ar = "16b"; return;
- case ARM64vecsh_SSHR64x2: *nm = "sshr "; *ar = "2d"; return;
- case ARM64vecsh_SSHR32x4: *nm = "sshr "; *ar = "4s"; return;
- case ARM64vecsh_SSHR16x8: *nm = "sshr "; *ar = "8h"; return;
- case ARM64vecsh_SSHR8x16: *nm = "sshr "; *ar = "16b"; return;
- case ARM64vecsh_SHL64x2: *nm = "shl "; *ar = "2d"; return;
- case ARM64vecsh_SHL32x4: *nm = "shl "; *ar = "4s"; return;
- case ARM64vecsh_SHL16x8: *nm = "shl "; *ar = "8h"; return;
- case ARM64vecsh_SHL8x16: *nm = "shl "; *ar = "16b"; return;
- default: vpanic("showARM64VecShiftImmOp");
+ case ARM64vecsh_USHR64x2: *nm = "ushr "; *ar = "2d"; return;
+ case ARM64vecsh_USHR32x4: *nm = "ushr "; *ar = "4s"; return;
+ case ARM64vecsh_USHR16x8: *nm = "ushr "; *ar = "8h"; return;
+ case ARM64vecsh_USHR8x16: *nm = "ushr "; *ar = "16b"; return;
+ case ARM64vecsh_SSHR64x2: *nm = "sshr "; *ar = "2d"; return;
+ case ARM64vecsh_SSHR32x4: *nm = "sshr "; *ar = "4s"; return;
+ case ARM64vecsh_SSHR16x8: *nm = "sshr "; *ar = "8h"; return;
+ case ARM64vecsh_SSHR8x16: *nm = "sshr "; *ar = "16b"; return;
+ case ARM64vecsh_SHL64x2: *nm = "shl "; *ar = "2d"; return;
+ case ARM64vecsh_SHL32x4: *nm = "shl "; *ar = "4s"; return;
+ case ARM64vecsh_SHL16x8: *nm = "shl "; *ar = "8h"; return;
+ case ARM64vecsh_SHL8x16: *nm = "shl "; *ar = "16b"; return;
+ case ARM64vecsh_SQSHRN2SD: *nm = "sqshrn"; *ar = "2sd"; return;
+ case ARM64vecsh_SQSHRN4HS: *nm = "sqshrn"; *ar = "4hs"; return;
+ case ARM64vecsh_SQSHRN8BH: *nm = "sqshrn"; *ar = "8bh"; return;
+ case ARM64vecsh_UQSHRN2SD: *nm = "uqshrn"; *ar = "2sd"; return;
+ case ARM64vecsh_UQSHRN4HS: *nm = "uqshrn"; *ar = "4hs"; return;
+ case ARM64vecsh_UQSHRN8BH: *nm = "uqshrn"; *ar = "8bh"; return;
+ case ARM64vecsh_SQSHRUN2SD: *nm = "sqshrun"; *ar = "2sd"; return;
+ case ARM64vecsh_SQSHRUN4HS: *nm = "sqshrun"; *ar = "4hs"; return;
+ case ARM64vecsh_SQSHRUN8BH: *nm = "sqshrun"; *ar = "8bh"; return;
+ case ARM64vecsh_SQRSHRN2SD: *nm = "sqrshrn"; *ar = "2sd"; return;
+ case ARM64vecsh_SQRSHRN4HS: *nm = "sqrshrn"; *ar = "4hs"; return;
+ case ARM64vecsh_SQRSHRN8BH: *nm = "sqrshrn"; *ar = "8bh"; return;
+ case ARM64vecsh_UQRSHRN2SD: *nm = "uqrshrn"; *ar = "2sd"; return;
+ case ARM64vecsh_UQRSHRN4HS: *nm = "uqrshrn"; *ar = "4hs"; return;
+ case ARM64vecsh_UQRSHRN8BH: *nm = "uqrshrn"; *ar = "8bh"; return;
+ case ARM64vecsh_SQRSHRUN2SD: *nm = "sqrshrun"; *ar = "2sd"; return;
+ case ARM64vecsh_SQRSHRUN4HS: *nm = "sqrshrun"; *ar = "4hs"; return;
+ case ARM64vecsh_SQRSHRUN8BH: *nm = "sqrshrun"; *ar = "8bh"; return;
+ default: vpanic("showARM64VecShiftOp");
+ }
+}
+
+static const HChar* showARM64VecNarrowOp(ARM64VecNarrowOp op) {
+ switch (op) {
+ case ARM64vecna_XTN: return "xtn ";
+ case ARM64vecna_SQXTN: return "sqxtn ";
+ case ARM64vecna_UQXTN: return "uqxtn ";
+ case ARM64vecna_SQXTUN: return "sqxtun";
+ default: vpanic("showARM64VecNarrowOp");
}
}
@@ -1716,9 +1744,11 @@
i->ARM64in.VUnaryV.arg = arg;
return i;
}
-ARM64Instr* ARM64Instr_VNarrowV ( UInt dszBlg2, HReg dst, HReg src ) {
+ARM64Instr* ARM64Instr_VNarrowV ( ARM64VecNarrowOp op,
+ UInt dszBlg2, HReg dst, HReg src ) {
ARM64Instr* i = LibVEX_Alloc(sizeof(ARM64Instr));
i->tag = ARM64in_VNarrowV;
+ i->ARM64in.VNarrowV.op = op;
i->ARM64in.VNarrowV.dszBlg2 = dszBlg2;
i->ARM64in.VNarrowV.dst = dst;
i->ARM64in.VNarrowV.src = src;
@@ -1735,6 +1765,12 @@
i->ARM64in.VShiftImmV.amt = amt;
UInt maxSh = 0;
switch (op) {
+ /* NB: the comments below are wrong. Correct is: for right shifts,
+ the allowed shift amounts are 1 .. lane_size. For left shifts,
+ the allowed shift amoutns are 0 .. lane_size-1. */
+ /* For these ordinary, non-saturating non-magical shifts,
+ the min shift value is actually zero, but we reject such cases
+ and instead only accept 1 as the minimum shift value. */
case ARM64vecsh_USHR64x2: case ARM64vecsh_SSHR64x2:
case ARM64vecsh_SHL64x2:
maxSh = 63; break;
@@ -1747,6 +1783,23 @@
case ARM64vecsh_USHR8x16: case ARM64vecsh_SSHR8x16:
case ARM64vecsh_SHL8x16:
maxSh = 7; break;
+ /* Whereas for these shift right and narrow set, the min shift
+ value really is 1. */
+ case ARM64vecsh_UQSHRN2SD: case ARM64vecsh_SQSHRN2SD:
+ case ARM64vecsh_SQSHRUN2SD:
+ case ARM64vecsh_UQRSHRN2SD: case ARM64vecsh_SQRSHRN2SD:
+ case ARM64vecsh_SQRSHRUN2SD:
+ maxSh = 64; break;
+ case ARM64vecsh_UQSHRN4HS: case ARM64vecsh_SQSHRN4HS:
+ case ARM64vecsh_SQSHRUN4HS:
+ case ARM64vecsh_UQRSHRN4HS: case ARM64vecsh_SQRSHRN4HS:
+ case ARM64vecsh_SQRSHRUN4HS:
+ maxSh = 32; break;
+ case ARM64vecsh_UQSHRN8BH: case ARM64vecsh_SQSHRN8BH:
+ case ARM64vecsh_SQSHRUN8BH:
+ case ARM64vecsh_UQRSHRN8BH: case ARM64vecsh_SQRSHRN8BH:
+ case ARM64vecsh_SQRSHRUN8BH:
+ maxSh = 16; break;
default:
vassert(0);
}
@@ -2408,7 +2461,8 @@
UInt dszBlg2 = i->ARM64in.VNarrowV.dszBlg2;
const HChar* darr[3] = { "8b", "4h", "2s" };
const HChar* sarr[3] = { "8h", "4s", "2d" };
- vex_printf("xtn ");
+ const HChar* nm = showARM64VecNarrowOp(i->ARM64in.VNarrowV.op);
+ vex_printf("%s ", nm);
ppHRegARM64(i->ARM64in.VNarrowV.dst);
vex_printf(".%s, ", dszBlg2 < 3 ? darr[dszBlg2] : "??");
ppHRegARM64(i->ARM64in.VNarrowV.src);
@@ -5783,114 +5837,185 @@
000 01110 00 1,00001 001010 n d XTN Vd.8b, Vn.8h
000 01110 01 1,00001 001010 n d XTN Vd.4h, Vn.4s
000 01110 10 1,00001 001010 n d XTN Vd.2s, Vn.2d
+
+ 001 01110 00 1,00001 001010 n d SQXTUN Vd.8b, Vn.8h
+ 001 01110 01 1,00001 001010 n d SQXTUN Vd.4h, Vn.4s
+ 001 01110 10 1,00001 001010 n d SQXTUN Vd.2s, Vn.2d
+
+ 000 01110 00 1,00001 010010 n d SQXTN Vd.8b, Vn.8h
+ 000 01110 01 1,00001 010010 n d SQXTN Vd.4h, Vn.4s
+ 000 01110 10 1,00001 010010 n d SQXTN Vd.2s, Vn.2d
+
+ 001 01110 00 1,00001 010010 n d UQXTN Vd.8b, Vn.8h
+ 001 01110 01 1,00001 010010 n d UQXTN Vd.4h, Vn.4s
+ 001 01110 10 1,00001 010010 n d UQXTN Vd.2s, Vn.2d
*/
UInt vD = qregNo(i->ARM64in.VNarrowV.dst);
UInt vN = qregNo(i->ARM64in.VNarrowV.src);
UInt dszBlg2 = i->ARM64in.VNarrowV.dszBlg2;
vassert(dszBlg2 >= 0 && dszBlg2 <= 2);
- *p++ = X_3_8_5_6_5_5(X000, X01110001 | (dszBlg2 << 1),
- X00001, X001010, vN, vD);
- goto done;
+ switch (i->ARM64in.VNarrowV.op) {
+ case ARM64vecna_XTN:
+ *p++ = X_3_8_5_6_5_5(X000, X01110001 | (dszBlg2 << 1),
+ X00001, X001010, vN, vD);
+ goto done;
+ case ARM64vecna_SQXTUN:
+ *p++ = X_3_8_5_6_5_5(X001, X01110001 | (dszBlg2 << 1),
+ X00001, X001010, vN, vD);
+ goto done;
+ case ARM64vecna_SQXTN:
+ *p++ = X_3_8_5_6_5_5(X000, X01110001 | (dszBlg2 << 1),
+ X00001, X010010, vN, vD);
+ goto done;
+ case ARM64vecna_UQXTN:
+ *p++ = X_3_8_5_6_5_5(X001, X01110001 | (dszBlg2 << 1),
+ X00001, X010010, vN, vD);
+ goto done;
+ default:
+ break;
+ }
+ goto bad;
}
case ARM64in_VShiftImmV: {
/*
- 011 011110 immh immb 000001 n d USHR Vd.T, Vn.T, #sh
- 010 011110 immh immb 000001 n d SSHR Vd.T, Vn.T, #sh
+ 011 011110 immh immb 000001 n d USHR Vd.T, Vn.T, #sh
+ 010 011110 immh immb 000001 n d SSHR Vd.T, Vn.T, #sh
+
+ 001 011110 immh immb 100101 n d UQSHRN ,,#sh
+ 000 011110 immh immb 100101 n d SQSHRN ,,#sh
+ 001 011110 immh immb 100001 n d SQSHRUN ,,#sh
+
+ 001 011110 immh immb 100111 n d UQRSHRN ,,#sh
+ 000 011110 immh immb 100111 n d SQRSHRN ,,#sh
+ 001 011110 immh immb 100011 n d SQRSHRUN ,,#sh
where immh:immb
= case T of
- 2d | sh in 1..63 -> let xxxxxx = 64-sh in 1xxx:xxx
- 4s | sh in 1..31 -> let xxxxx = 32-sh in 01xx:xxx
- 8h | sh in 1..15 -> let xxxx = 16-sh in 001x:xxx
- 16b | sh in 1..7 -> let xxx = 8-sh in 0001:xxx
+ 2d | sh in 1..64 -> let xxxxxx = 64-sh in 1xxx:xxx
+ 4s | sh in 1..32 -> let xxxxx = 32-sh in 01xx:xxx
+ 8h | sh in 1..16 -> let xxxx = 16-sh in 001x:xxx
+ 16b | sh in 1..8 -> let xxx = 8-sh in 0001:xxx
010 011110 immh immb 010101 n d SHL Vd.T, Vn.T, #sh
where immh:immb
= case T of
- 2d | sh in 1..63 -> let xxxxxx = sh in 1xxx:xxx
- 4s | sh in 1..31 -> let xxxxx = sh in 01xx:xxx
- 8h | sh in 1..15 -> let xxxx = sh in 001x:xxx
- 16b | sh in 1..7 -> let xxx = sh in 0001:xxx
+ 2d | sh in 0..63 -> let xxxxxx = sh in 1xxx:xxx
+ 4s | sh in 0..31 -> let xxxxx = sh in 01xx:xxx
+ 8h | sh in 0..15 -> let xxxx = sh in 001x:xxx
+ 16b | sh in 0..7 -> let xxx = sh in 0001:xxx
*/
- UInt vD = qregNo(i->ARM64in.VShiftImmV.dst);
- UInt vN = qregNo(i->ARM64in.VShiftImmV.src);
- UInt sh = i->ARM64in.VShiftImmV.amt;
- ARM64VecShiftOp op = i->ARM64in.VShiftImmV.op;
- Bool syned = False;
- switch (op) {
- /* 64x2 cases */
- case ARM64vecsh_SSHR64x2: syned = True;
- case ARM64vecsh_USHR64x2: /* fallthrough */
+ UInt vD = qregNo(i->ARM64in.VShiftImmV.dst);
+ UInt vN = qregNo(i->ARM64in.VShiftImmV.src);
+ UInt sh = i->ARM64in.VShiftImmV.amt;
+ UInt tmpl = 0; /* invalid */
+
+ const UInt tmpl_USHR
+ = X_3_6_7_6_5_5(X011, X011110, 0, X000001, vN, vD);
+ const UInt tmpl_SSHR
+ = X_3_6_7_6_5_5(X010, X011110, 0, X000001, vN, vD);
+
+ const UInt tmpl_UQSHRN
+ = X_3_6_7_6_5_5(X001, X011110, 0, X100101, vN, vD);
+ const UInt tmpl_SQSHRN
+ = X_3_6_7_6_5_5(X000, X011110, 0, X100101, vN, vD);
+ const UInt tmpl_SQSHRUN
+ = X_3_6_7_6_5_5(X001, X011110, 0, X100001, vN, vD);
+
+ const UInt tmpl_UQRSHRN
+ = X_3_6_7_6_5_5(X001, X011110, 0, X100111, vN, vD);
+ const UInt tmpl_SQRSHRN
+ = X_3_6_7_6_5_5(X000, X011110, 0, X100111, vN, vD);
+ const UInt tmpl_SQRSHRUN
+ = X_3_6_7_6_5_5(X001, X011110, 0, X100011, vN, vD);
+
+ const UInt tmpl_SHL
+ = X_3_6_7_6_5_5(X010, X011110, 0, X010101, vN, vD);
+
+ switch (i->ARM64in.VShiftImmV.op) {
+ case ARM64vecsh_SSHR64x2: tmpl = tmpl_SSHR; goto right64x2;
+ case ARM64vecsh_USHR64x2: tmpl = tmpl_USHR; goto right64x2;
+ case ARM64vecsh_SHL64x2: tmpl = tmpl_SHL; goto left64x2;
+
+ case ARM64vecsh_SSHR32x4: tmpl = tmpl_SSHR; goto right32x4;
+ case ARM64vecsh_USHR32x4: tmpl = tmpl_USHR; goto right32x4;
+ case ARM64vecsh_UQSHRN2SD: tmpl = tmpl_UQSHRN; goto right32x4;
+ case ARM64vecsh_SQSHRN2SD: tmpl = tmpl_SQSHRN; goto right32x4;
+ case ARM64vecsh_SQSHRUN2SD: tmpl = tmpl_SQSHRUN; goto right32x4;
+ case ARM64vecsh_UQRSHRN2SD: tmpl = tmpl_UQRSHRN; goto right32x4;
+ case ARM64vecsh_SQRSHRN2SD: tmpl = tmpl_SQRSHRN; goto right32x4;
+ case ARM64vecsh_SQRSHRUN2SD: tmpl = tmpl_SQRSHRUN; goto right32x4;
+ case ARM64vecsh_SHL32x4: tmpl = tmpl_SHL; goto left32x4;
+
+ case ARM64vecsh_SSHR16x8: tmpl = tmpl_SSHR; goto right16x8;
+ case ARM64vecsh_USHR16x8: tmpl = tmpl_USHR; goto right16x8;
+ case ARM64vecsh_UQSHRN4HS: tmpl = tmpl_UQSHRN; goto right16x8;
+ case ARM64vecsh_SQSHRN4HS: tmpl = tmpl_SQSHRN; goto right16x8;
+ case ARM64vecsh_SQSHRUN4HS: tmpl = tmpl_SQSHRUN; goto right16x8;
+ case ARM64vecsh_UQRSHRN4HS: tmpl = tmpl_UQRSHRN; goto right16x8;
+ case ARM64vecsh_SQRSHRN4HS: tmpl = tmpl_SQRSHRN; goto right16x8;
+ case ARM64vecsh_SQRSHRUN4HS: tmpl = tmpl_SQRSHRUN; goto right16x8;
+ case ARM64vecsh_SHL16x8: tmpl = tmpl_SHL; goto left16x8;
+
+ case ARM64vecsh_SSHR8x16: tmpl = tmpl_SSHR; goto right8x16;
+ case ARM64vecsh_USHR8x16: tmpl = tmpl_USHR; goto right8x16;
+ case ARM64vecsh_UQSHRN8BH: tmpl = tmpl_UQSHRN; goto right8x16;
+ case ARM64vecsh_SQSHRN8BH: tmpl = tmpl_SQSHRN; goto right8x16;
+ case ARM64vecsh_SQSHRUN8BH: tmpl = tmpl_SQSHRUN; goto right8x16;
+ case ARM64vecsh_UQRSHRN8BH: tmpl = tmpl_UQRSHRN; goto right8x16;
+ case ARM64vecsh_SQRSHRN8BH: tmpl = tmpl_SQRSHRN; goto right8x16;
+ case ARM64vecsh_SQRSHRUN8BH: tmpl = tmpl_SQRSHRUN; goto right8x16;
+ case ARM64vecsh_SHL8x16: tmpl = tmpl_SHL; goto left8x16;
+
+ default: break;
+
+ right64x2:
if (sh >= 1 && sh <= 63) {
- UInt xxxxxx = 64-sh;
- *p++ = X_3_6_7_6_5_5(syned ? X010 : X011, X011110,
- X1000000 | xxxxxx, X000001, vN, vD);
+ *p++ = tmpl | X_3_6_7_6_5_5(0,0, X1000000 | (64-sh), 0,0,0);
goto done;
}
break;
- case ARM64vecsh_SHL64x2:
- if (sh >= 1 && sh <= 63) {
- UInt xxxxxx = sh;
- *p++ = X_3_6_7_6_5_5(X010, X011110,
- X1000000 | xxxxxx, X010101, vN, vD);
+ right32x4:
+ if (sh >= 1 && sh <= 32) {
+ *p++ = tmpl | X_3_6_7_6_5_5(0,0, X0100000 | (32-sh), 0,0,0);
goto done;
}
break;
- /* 32x4 cases */
- case ARM64vecsh_SSHR32x4: syned = True;
- case ARM64vecsh_USHR32x4: /* fallthrough */
- if (sh >= 1 && sh <= 31) {
- UInt xxxxx = 32-sh;
- *p++ = X_3_6_7_6_5_5(syned ? X010 : X011, X011110,
- X0100000 | xxxxx, X000001, vN, vD);
+ right16x8:
+ if (sh >= 1 && sh <= 16) {
+ *p++ = tmpl | X_3_6_7_6_5_5(0,0, X0010000 | (16-sh), 0,0,0);
goto done;
}
break;
- case ARM64vecsh_SHL32x4:
- if (sh >= 1 && sh <= 31) {
- UInt xxxxx = sh;
- *p++ = X_3_6_7_6_5_5(X010, X011110,
- X0100000 | xxxxx, X010101, vN, vD);
+ right8x16:
+ if (sh >= 1 && sh <= 8) {
+ *p++ = tmpl | X_3_6_7_6_5_5(0,0, X0001000 | (8-sh), 0,0,0);
goto done;
}
break;
- /* 16x8 cases */
- case ARM64vecsh_SSHR16x8: syned = True;
- case ARM64vecsh_USHR16x8: /* fallthrough */
- if (sh >= 1 && sh <= 15) {
- UInt xxxx = 16-sh;
- *p++ = X_3_6_7_6_5_5(syned ? X010 : X011, X011110,
- X0010000 | xxxx, X000001, vN, vD);
+
+ left64x2:
+ if (sh >= 1 && sh <= 63) {
+ *p++ = tmpl | X_3_6_7_6_5_5(0,0, X1000000 | sh, 0,0,0);
goto done;
}
break;
- case ARM64vecsh_SHL16x8:
- if (sh >= 1 && sh <= 15) {
- UInt xxxx = sh;
- *p++ = X_3_6_7_6_5_5(X010, X011110,
- X0010000 | xxxx, X010101, vN, vD);
+ left32x4:
+ if (sh >= 1 && sh <= 31) {
+ *p++ = tmpl | X_3_6_7_6_5_5(0,0, X0100000 | sh, 0,0,0);
goto done;
}
break;
- /* 8x16 cases */
- case ARM64vecsh_SSHR8x16: syned = True;
- case ARM64vecsh_USHR8x16: /* fallthrough */
- if (sh >= 1 && sh <= 7) {
- UInt xxx = 8-sh;
- *p++ = X_3_6_7_6_5_5(syned ? X010 : X011, X011110,
- X0001000 | xxx, X000001, vN, vD);
+ left16x8:
+ if (sh >= 1 && sh <= 15) {
+ *p++ = tmpl | X_3_6_7_6_5_5(0,0, X0010000 | sh, 0,0,0);
goto done;
}
break;
- case ARM64vecsh_SHL8x16:
+ left8x16:
if (sh >= 1 && sh <= 7) {
- UInt xxx = sh;
- *p++ = X_3_6_7_6_5_5(X010, X011110,
- X0001000 | xxx, X010101, vN, vD);
+ *p++ = tmpl | X_3_6_7_6_5_5(0,0, X0001000 | sh, 0,0,0);
goto done;
}
break;
- default:
- break;
}
goto bad;
}
Modified: trunk/priv/host_arm64_defs.h
==============================================================================
--- trunk/priv/host_arm64_defs.h (original)
+++ trunk/priv/host_arm64_defs.h Mon Aug 11 14:02:47 2014
@@ -402,12 +402,30 @@
ARM64vecsh_SSHR16x8, ARM64vecsh_SSHR8x16,
ARM64vecsh_SHL64x2, ARM64vecsh_SHL32x4,
ARM64vecsh_SHL16x8, ARM64vecsh_SHL8x16,
+ /* These narrowing shifts zero out the top half of the destination
+ register. */
+ ARM64vecsh_SQSHRN2SD, ARM64vecsh_SQSHRN4HS, ARM64vecsh_SQSHRN8BH,
+ ARM64vecsh_UQSHRN2SD, ARM64vecsh_UQSHRN4HS, ARM64vecsh_UQSHRN8BH,
+ ARM64vecsh_SQSHRUN2SD, ARM64vecsh_SQSHRUN4HS, ARM64vecsh_SQSHRUN8BH,
+ ARM64vecsh_SQRSHRN2SD, ARM64vecsh_SQRSHRN4HS, ARM64vecsh_SQRSHRN8BH,
+ ARM64vecsh_UQRSHRN2SD, ARM64vecsh_UQRSHRN4HS, ARM64vecsh_UQRSHRN8BH,
+ ARM64vecsh_SQRSHRUN2SD, ARM64vecsh_SQRSHRUN4HS, ARM64vecsh_SQRSHRUN8BH,
ARM64vecsh_INVALID
}
ARM64VecShiftOp;
typedef
enum {
+ ARM64vecna_XTN=400,
+ ARM64vecna_SQXTN,
+ ARM64vecna_UQXTN,
+ ARM64vecna_SQXTUN,
+ ARM64vecna_INVALID
+ }
+ ARM64VecNarrowOp;
+
+typedef
+ enum {
/* baseline */
ARM64in_Arith=1220,
ARM64in_Cmp,
@@ -720,11 +738,13 @@
HReg arg;
} VUnaryV;
/* vector narrowing, Q -> Q. Result goes in the bottom half
- of dst and the top half is zeroed out. Iow is XTN. */
+ of dst and the top half is zeroed out. Iow one of the
+ XTN family. */
struct {
- UInt dszBlg2; // 0: 16to8_x8 1: 32to16_x4 2: 64to32_x2
- HReg dst; // Q reg
- HReg src; // Q reg
+ ARM64VecNarrowOp op;
+ UInt dszBlg2; // 0: 16to8_x8 1: 32to16_x4 2: 64to32_x2
+ HReg dst; // Q reg
+ HReg src; // Q reg
} VNarrowV;
/* Vector shift by immediate. |amt| needs to be > 0 and <
implied lane size of |op|. Zero shifts and out of range
@@ -836,7 +856,8 @@
extern ARM64Instr* ARM64Instr_FPSR ( Bool toFPSR, HReg iReg );
extern ARM64Instr* ARM64Instr_VBinV ( ARM64VecBinOp op, HReg, HReg, HReg );
extern ARM64Instr* ARM64Instr_VUnaryV ( ARM64VecUnaryOp op, HReg, HReg );
-extern ARM64Instr* ARM64Instr_VNarrowV ( UInt dszBlg2, HReg dst, HReg src );
+extern ARM64Instr* ARM64Instr_VNarrowV ( ARM64VecNarrowOp op, UInt dszBlg2,
+ HReg dst, HReg src );
extern ARM64Instr* ARM64Instr_VShiftImmV ( ARM64VecShiftOp op,
HReg dst, HReg src, UInt amt );
extern ARM64Instr* ARM64Instr_VExtV ( HReg dst,
Modified: trunk/priv/host_arm64_isel.c
==============================================================================
--- trunk/priv/host_arm64_isel.c (original)
+++ trunk/priv/host_arm64_isel.c Mon Aug 11 14:02:47 2014
@@ -2146,18 +2146,51 @@
}
case Iop_NarrowUn16to8x8:
case Iop_NarrowUn32to16x4:
- case Iop_NarrowUn64to32x2: {
+ case Iop_NarrowUn64to32x2:
+ case Iop_QNarrowUn16Sto8Sx8:
+ case Iop_QNarrowUn32Sto16Sx4:
+ case Iop_QNarrowUn64Sto32Sx2:
+ case Iop_QNarrowUn16Uto8Ux8:
+ case Iop_QNarrowUn32Uto16Ux4:
+ case Iop_QNarrowUn64Uto32Ux2:
+ case Iop_QNarrowUn16Sto8Ux8:
+ case Iop_QNarrowUn32Sto16Ux4:
+ case Iop_QNarrowUn64Sto32Ux2:
+ {
HReg src = iselV128Expr(env, e->Iex.Unop.arg);
HReg tmp = newVRegV(env);
HReg dst = newVRegI(env);
UInt dszBlg2 = 3; /* illegal */
+ ARM64VecNarrowOp op = ARM64vecna_INVALID;
switch (e->Iex.Unop.op) {
- case Iop_NarrowUn16to8x8: dszBlg2 = 0; break; // 16to8_x8
- case Iop_NarrowUn32to16x4: dszBlg2 = 1; break; // 32to16_x4
- case Iop_NarrowUn64to32x2: dszBlg2 = 2; break; // 64to32_x2
- default: vassert(0);
+ case Iop_NarrowUn16to8x8:
+ dszBlg2 = 0; op = ARM64vecna_XTN; break;
+ case Iop_NarrowUn32to16x4:
+ dszBlg2 = 1; op = ARM64vecna_XTN; break;
+ case Iop_NarrowUn64to32x2:
+ dszBlg2 = 2; op = ARM64vecna_XTN; break;
+ case Iop_QNarrowUn16Sto8Sx8:
+ dszBlg2 = 0; op = ARM64vecna_SQXTN; break;
+ case Iop_QNarrowUn32Sto16Sx4:
+ dszBlg2 = 1; op = ARM64vecna_SQXTN; break;
+ case Iop_QNarrowUn64Sto32Sx2:
+ dszBlg2 = 2; op = ARM64vecna_SQXTN; break;
+ case Iop_QNarrowUn16Uto8Ux8:
+ dszBlg2 = 0; op = ARM64vecna_UQXTN; break;
+ case Iop_QNarrowUn32Uto16Ux4:
+ dszBlg2 = 1; op = ARM64vecna_UQXTN; break;
+ case Iop_QNarrowUn64Uto32Ux2:
+ dszBlg2 = 2; op = ARM64vecna_UQXTN; break;
+ case Iop_QNarrowUn16Sto8Ux8:
+ dszBlg2 = 0; op = ARM64vecna_SQXTUN; break;
+ case Iop_QNarrowUn32Sto16Ux4:
+ dszBlg2 = 1; op = ARM64vecna_SQXTUN; break;
+ case Iop_QNarrowUn64Sto32Ux2:
+ dszBlg2 = 2; op = ARM64vecna_SQXTUN; break;
+ default:
+ vassert(0);
}
- addInstr(env, ARM64Instr_VNarrowV(dszBlg2, tmp, src));
+ addInstr(env, ARM64Instr_VNarrowV(op, dszBlg2, tmp, src));
addInstr(env, ARM64Instr_VXfromQ(dst, tmp, 0/*laneNo*/));
return dst;
}
@@ -4489,6 +4522,12 @@
iselV256Expr(&vHi, &vLo, env, e->Iex.Unop.arg);
return (e->Iex.Unop.op == Iop_V256toV128_1) ? vHi : vLo;
}
+ case Iop_64UtoV128: {
+ HReg res = newVRegV(env);
+ HReg arg = iselIntExpr_R(env, e->Iex.Unop.arg);
+ addInstr(env, ARM64Instr_VQfromX(res, arg));
+ return res;
+ }
//ZZ case Iop_NotV128: {
//ZZ DECLARE_PATTERN(p_veqz_8x16);
@@ -5616,6 +5655,11 @@
HReg src = iselV128Expr(env, argL);
HReg dst = newVRegV(env);
if (amt > 0) {
+ /* For left shifts, the allowable amt values are
+ 0 .. lane_bits-1. For right shifts the allowable
+ values are 1 .. lane_bits. By restricting it to
+ 1 .. lane_bits-1, we are guaranteed to create a
+ valid instruction. */
addInstr(env, ARM64Instr_VShiftImmV(op, dst, src, amt));
} else {
dst = src;
@@ -5627,6 +5671,118 @@
break;
}
+ /* uu */
+ case Iop_QandQShrNnarrow16Uto8Ux8:
+ case Iop_QandQShrNnarrow32Uto16Ux4:
+ case Iop_QandQShrNnarrow64Uto32Ux2:
+ /* ss */
+ case Iop_QandQSarNnarrow16Sto8Sx8:
+ case Iop_QandQSarNnarrow32Sto16Sx4:
+ case Iop_QandQSarNnarrow64Sto32Sx2:
+ /* su */
+ case Iop_QandQSarNnarrow16Sto8Ux8:
+ case Iop_QandQSarNnarrow32Sto16Ux4:
+ case Iop_QandQSarNnarrow64Sto32Ux2:
+ /* ruu */
+ case Iop_QandQRShrNnarrow16Uto8Ux8:
+ case Iop_QandQRShrNnarrow32Uto16Ux4:
+ case Iop_QandQRShrNnarrow64Uto32Ux2:
+ /* rss */
+ case Iop_QandQRSarNnarrow16Sto8Sx8:
+ case Iop_QandQRSarNnarrow32Sto16Sx4:
+ case Iop_QandQRSarNnarrow64Sto32Sx2:
+ /* rsu */
+ case Iop_QandQRSarNnarrow16Sto8Ux8:
+ case Iop_QandQRSarNnarrow32Sto16Ux4:
+ case Iop_QandQRSarNnarrow64Sto32Ux2:
+ {
+ IRExpr* argL = e->Iex.Binop.arg1;
+ IRExpr* argR = e->Iex.Binop.arg2;
+ if (argR->tag == Iex_Const && argR->Iex.Const.con->tag == Ico_U8) {
+ UInt amt = argR->Iex.Const.con->Ico.U8;
+ UInt limit = 0;
+ ARM64VecShiftOp op = ARM64vecsh_INVALID;
+ switch (e->Iex.Binop.op) {
+ /* uu */
+ case Iop_QandQShrNnarrow64Uto32Ux2:
+ op = ARM64vecsh_UQSHRN2SD; limit = 64; break;
+ case Iop_QandQShrNnarrow32Uto16Ux4:
+ op = ARM64vecsh_UQSHRN4HS; limit = 32; break;
+ case Iop_QandQShrNnarrow16Uto8Ux8:
+ op = ARM64vecsh_UQSHRN8BH; limit = 16; break;
+ /* ss */
+ case Iop_QandQSarNnarrow64Sto32Sx2:
+ op = ARM64vecsh_SQSHRN2SD; limit = 64; break;
+ case Iop_QandQSarNnarrow32Sto16Sx4:
+ op = ARM64vecsh_SQSHRN4HS; limit = 32; break;
+ case Iop_QandQSarNnarrow16Sto8Sx8:
+ op = ARM64vecsh_SQSHRN8BH; limit = 16; break;
+ /* su */
+ case Iop_QandQSarNnarrow64Sto32Ux2:
+ op = ARM64vecsh_SQSHRUN2SD; limit = 64; break;
+ case Iop_QandQSarNnarrow32Sto16Ux4:
+ op = ARM64vecsh_SQSHRUN4HS; limit = 32; break;
+ case Iop_QandQSarNnarrow16Sto8Ux8:
+ op = ARM64vecsh_SQSHRUN8BH; limit = 16; break;
+ /* ruu */
+ case Iop_QandQRShrNnarrow64Uto32Ux2:
+ op = ARM64vecsh_UQRSHRN2SD; limit = 64; break;
+ case Iop_QandQRShrNnarrow32Uto16Ux4:
+ op = ARM64vecsh_UQRSHRN4HS; limit = 32; break;
+ case Iop_QandQRShrNnarrow16Uto8Ux8:
+ op = ARM64vecsh_UQRSHRN8BH; limit = 16; break;
+ /* rss */
+ case Iop_QandQRSarNnarrow64Sto32Sx2:
+ op = ARM64vecsh_SQRSHRN2SD; limit = 64; break;
+ case Iop_QandQRSarNnarrow32Sto16Sx4:
+ op = ARM64vecsh_SQRSHRN4HS; limit = 32; break;
+ case Iop_QandQRSarNnarrow16Sto8Sx8:
+ op = ARM64vecsh_SQRSHRN8BH; limit = 16; break;
+ /* rsu */
+ case Iop_QandQRSarNnarrow64Sto32Ux2:
+ op = ARM64vecsh_SQRSHRUN2SD; limit = 64; break;
+ case Iop_QandQRSarNnarrow32Sto16Ux4:
+ op = ARM64vecsh_SQRSHRUN4HS; limit = 32; break;
+ case Iop_QandQRSarNnarrow16Sto8Ux8:
+ op = ARM64vecsh_SQRSHRUN8BH; limit = 16; break;
+ /**/
+ default:
+ vassert(0);
+ }
+ if (op != ARM64vecsh_INVALID && amt >= 1 && amt <= limit) {
+ HReg src = iselV128Expr(env, argL);
+ HReg dst = newVRegV(env);
+ HReg fpsr = newVRegI(env);
+ /* Clear FPSR.Q, do the operation, and return both its
+ result and the new value of FPSR.Q. We can simply
+ zero out FPSR since all the other bits have no relevance
+ in VEX generated code. */
+ addInstr(env, ARM64Instr_Imm64(fpsr, 0));
+ addInstr(env, ARM64Instr_FPSR(True/*toFPSR*/, fpsr));
+ addInstr(env, ARM64Instr_VShiftImmV(op, dst, src, amt));
+ addInstr(env, ARM64Instr_FPSR(False/*!toFPSR*/, fpsr));
+ addInstr(env, ARM64Instr_Shift(fpsr, fpsr, ARM64RI6_I6(27),
+ ARM64sh_SHR));
+ ARM64RIL* ril_one = mb_mkARM64RIL_I(1);
+ vassert(ril_one);
+ addInstr(env, ARM64Instr_Logic(fpsr,
+ fpsr, ril_one, ARM64lo_AND));
+ /* Now we have: the main (shift) result in the bottom half
+ of |dst|, and the Q bit at the bottom of |fpsr|.
+ Combining them with a "InterleaveLO64x2" style operation
+ produces a 128 bit value, dst[63:0]:fpsr[63:0],
+ which is what we want. */
+ HReg scratch = newVRegV(env);
+ addInstr(env, ARM64Instr_VQfromX(scratch, fpsr));
+ addInstr(env, ARM64Instr_VBinV(ARM64vecb_UZP164x2,
+ dst, dst, scratch));
+ return dst;
+ }
+ }
+ /* else fall out; this is unhandled */
+ break;
+ }
+
case Iop_ShlV128:
case Iop_ShrV128: {
Bool isSHR = e->Iex.Binop.op == Iop_ShrV128;
@@ -6510,9 +6666,9 @@
default: vassert(0);
}
/* Clear FPSR.Q, do the operation, and return both its result
- and the new value of FPSR.Q. We can simply zero the whole
- thing out since FPSR is essentially a scratch status register
- on the host. */
+ and the new value of FPSR.Q. We can simply zero out FPSR
+ since all the other bits have no relevance in VEX generated
+ code. */
addInstr(env, ARM64Instr_Imm64(fpsr, 0));
addInstr(env, ARM64Instr_FPSR(True/*toFPSR*/, fpsr));
addInstr(env, ARM64Instr_VBinV(op, resLo, argL, argR));
Modified: trunk/priv/ir_defs.c
==============================================================================
--- trunk/priv/ir_defs.c (original)
+++ trunk/priv/ir_defs.c Mon Aug 11 14:02:47 2014
@@ -920,6 +920,43 @@
case Iop_QandSQRsh32x4: vex_printf("QandSQRsh32x4"); return;
case Iop_QandSQRsh64x2: vex_printf("QandSQRsh64x2"); return;
+ case Iop_QandQShrNnarrow16Uto8Ux8:
+ vex_printf("QandQShrNnarrow16Uto8Ux8"); return;
+ case Iop_QandQShrNnarrow32Uto16Ux4:
+ vex_printf("QandQShrNnarrow32Uto16Ux4"); return;
+ case Iop_QandQShrNnarrow64Uto32Ux2:
+ vex_printf("QandQShrNnarrow64Uto32Ux2"); return;
+ case Iop_QandQSarNnarrow16Sto8Sx8:
+ vex_printf("QandQSarNnarrow16Sto8Sx8"); return;
+ case Iop_QandQSarNnarrow32Sto16Sx4:
+ vex_printf("QandQSarNnarrow32Sto16Sx4"); return;
+ case Iop_QandQSarNnarrow64Sto32Sx2:
+ vex_printf("QandQSarNnarrow64Sto32Sx2"); return;
+ case Iop_QandQSarNnarrow16Sto8Ux8:
+ vex_printf("QandQSarNnarrow16Sto8Ux8"); return;
+ case Iop_QandQSarNnarrow32Sto16Ux4:
+ vex_printf("QandQSarNnarrow32Sto16Ux4"); return;
+ case Iop_QandQSarNnarrow64Sto32Ux2:
+ vex_printf("QandQSarNnarrow64Sto32Ux2"); return;
+ case Iop_QandQRShrNnarrow16Uto8Ux8:
+ vex_printf("QandQRShrNnarrow16Uto8Ux8"); return;
+ case Iop_QandQRShrNnarrow32Uto16Ux4:
+ vex_printf("QandQRShrNnarrow32Uto16Ux4"); return;
+ case Iop_QandQRShrNnarrow64Uto32Ux2:
+ vex_printf("QandQRShrNnarrow64Uto32Ux2"); return;
+ case Iop_QandQRSarNnarrow16Sto8Sx8:
+ vex_printf("QandQRSarNnarrow16Sto8Sx8"); return;
+ case Iop_QandQRSarNnarrow32Sto16Sx4:
+ vex_printf("QandQRSarNnarrow32Sto16Sx4"); return;
+ case Iop_QandQRSarNnarrow64Sto32Sx2:
+ vex_printf("QandQRSarNnarrow64Sto32Sx2"); return;
+ case Iop_QandQRSarNnarrow16Sto8Ux8:
+ vex_printf("QandQRSarNnarrow16Sto8Ux8"); return;
+ case Iop_QandQRSarNnarrow32Sto16Ux4:
+ vex_printf("QandQRSarNnarrow32Sto16Ux4"); return;
+ case Iop_QandQRSarNnarrow64Sto32Ux2:
+ vex_printf("QandQRSarNnarrow64Sto32Ux2"); return;
+
case Iop_NarrowBin16to8x16: vex_printf("NarrowBin16to8x16"); return;
case Iop_NarrowBin32to16x8: vex_printf("NarrowBin32to16x8"); return;
case Iop_QNarrowBin16Uto8Ux16: vex_printf("QNarrowBin16Uto8Ux16"); return;
@@ -2953,6 +2990,24 @@
case Iop_QSalN8x16: case Iop_QSalN16x8:
case Iop_QSalN32x4: case Iop_QSalN64x2:
case Iop_SHA256: case Iop_SHA512:
+ case Iop_QandQShrNnarrow16Uto8Ux8:
+ case Iop_QandQShrNnarrow32Uto16Ux4:
+ case Iop_QandQShrNnarrow64Uto32Ux2:
+ case Iop_QandQSarNnarrow16Sto8Sx8:
+ case Iop_QandQSarNnarrow32Sto16Sx4:
+ case Iop_QandQSarNnarrow64Sto32Sx2:
+ case Iop_QandQSarNnarrow16Sto8Ux8:
+ case Iop_QandQSarNnarrow32Sto16Ux4:
+ case Iop_QandQSarNnarrow64Sto32Ux2:
+ case Iop_QandQRShrNnarrow16Uto8Ux8:
+ case Iop_QandQRShrNnarrow32Uto16Ux4:
+ case Iop_QandQRShrNnarrow64Uto32Ux2:
+ case Iop_QandQRSarNnarrow16Sto8Sx8:
+ case Iop_QandQRSarNnarrow32Sto16Sx4:
+ case Iop_QandQRSarNnarrow64Sto32Sx2:
+ case Iop_QandQRSarNnarrow16Sto8Ux8:
+ case Iop_QandQRSarNnarrow32Sto16Ux4:
+ case Iop_QandQRSarNnarrow64Sto32Ux2:
BINARY(Ity_V128,Ity_I8, Ity_V128);
case Iop_F32ToFixed32Ux4_RZ:
Modified: trunk/pub/libvex_ir.h
==============================================================================
--- trunk/pub/libvex_ir.h (original)
+++ trunk/pub/libvex_ir.h Mon Aug 11 14:02:47 2014
@@ -1566,6 +1566,43 @@
Iop_QandSQRsh8x16, Iop_QandSQRsh16x8,
Iop_QandSQRsh32x4, Iop_QandSQRsh64x2,
+ /* VECTOR x SCALAR SATURATING (& MAYBE ROUNDING) NARROWING SHIFT RIGHT */
+ /* All of type (V128, I8) -> V128 */
+ /* The first argument is shifted right, then narrowed to half the width
+ by saturating it. The second argument is a scalar shift amount that
+ applies to all lanes, and must be a value in the range 1 to lane_width.
+ The shift may be done signedly (Sar variants) or unsignedly (Shr
+ variants). The saturation is done according to the two signedness
+ indicators at the end of the name. For example 64Sto32U means a
+ signed 64 bit value is saturated into an unsigned 32 bit value.
+ Additionally, the QRS variants do rounding, that is, they add the
+ value (1 << (shift_amount-1)) to each source lane before shifting.
+
+ These operations return 65 bits: one bit ("Q") indicating whether
+ saturation occurred, and the shift result. The result type is V128,
+ of which the lower half is the shift result, and Q occupies the
+ least significant bit of the upper half. All other bits of the
+ upper half are zero. */
+ // No rounding, sat U->U
+ Iop_QandQShrNnarrow16Uto8Ux8,
+ Iop_QandQShrNnarrow32Uto16Ux4, Iop_QandQShrNnarrow64Uto32Ux2,
+ // No rounding, sat S->S
+ Iop_QandQSarNnarrow16Sto8Sx8,
+ Iop_QandQSarNnarrow32Sto16Sx4, Iop_QandQSarNnarrow64Sto32Sx2,
+ // No rounding, sat S->U
+ Iop_QandQSarNnarrow16Sto8Ux8,
+ Iop_QandQSarNnarrow32Sto16Ux4, Iop_QandQSarNnarrow64Sto32Ux2,
+
+ // Rounding, sat U->U
+ Iop_QandQRShrNnarrow16Uto8Ux8,
+ Iop_QandQRShrNnarrow32Uto16Ux4, Iop_QandQRShrNnarrow64Uto32Ux2,
+ // Rounding, sat S->S
+ Iop_QandQRSarNnarrow16Sto8Sx8,
+ Iop_QandQRSarNnarrow32Sto16Sx4, Iop_QandQRSarNnarrow64Sto32Sx2,
+ // Rounding, sat S->U
+ Iop_QandQRSarNnarrow16Sto8Ux8,
+ Iop_QandQRSarNnarrow32Sto16Ux4, Iop_QandQRSarNnarrow64Sto32Ux2,
+
/* NARROWING (binary)
-- narrow 2xV128 into 1xV128, hi half from left arg */
/* See comments above w.r.t. U vs S issues in saturated narrowing. */
|
|
From: <sv...@va...> - 2014-08-11 14:01:07
|
Author: sewardj
Date: Mon Aug 11 14:01:00 2014
New Revision: 2917
Log:
Add a new folding rule:
ZeroHI64ofV128( ZeroHI64ofV128(x) ) --> ZeroHI64ofV128(x)
Modified:
trunk/priv/ir_opt.c
Modified: trunk/priv/ir_opt.c
==============================================================================
--- trunk/priv/ir_opt.c (original)
+++ trunk/priv/ir_opt.c Mon Aug 11 14:01:00 2014
@@ -5232,6 +5232,11 @@
if (is_Unop(aa, Iop_Left64))
return IRExpr_Unop( Iop_Left64, aa->Iex.Unop.arg );
break;
+ case Iop_ZeroHI64ofV128:
+ /* ZeroHI64ofV128( ZeroHI64ofV128(x) ) --> ZeroHI64ofV128(x) */
+ if (is_Unop(aa, Iop_ZeroHI64ofV128))
+ return IRExpr_Unop( Iop_ZeroHI64ofV128, aa->Iex.Unop.arg );
+ break;
case Iop_32to1:
/* 32to1( 1Uto32 ( x ) ) --> x */
if (is_Unop(aa, Iop_1Uto32))
|
|
From: <sv...@va...> - 2014-08-11 13:59:59
|
Author: sewardj
Date: Mon Aug 11 13:59:49 2014
New Revision: 14257
Log:
arm64: enable test cases for:
uqshrn{2}, sqrshrun{2}, sqshrun{2} (vector, imm)
sqxtn{2}, uqxtn{2}, sqxtun{2} (vector and scalar)
Modified:
trunk/none/tests/arm64/fp_and_simd.c
Modified: trunk/none/tests/arm64/fp_and_simd.c
==============================================================================
--- trunk/none/tests/arm64/fp_and_simd.c (original)
+++ trunk/none/tests/arm64/fp_and_simd.c Mon Aug 11 13:59:49 2014
@@ -4590,114 +4590,114 @@
// uqshrn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm
// sqrshrun{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm
// sqshrun{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h, #imm
- if (0) test_sqrshrn_2s_2d_1(TyD);
- if (0) test_sqrshrn_2s_2d_17(TyD);
- if (0) test_sqrshrn_2s_2d_32(TyD);
- if (0) test_sqrshrn2_4s_2d_1(TyD);
- if (0) test_sqrshrn2_4s_2d_17(TyD);
- if (0) test_sqrshrn2_4s_2d_32(TyD);
- if (0) test_sqrshrn_4h_4s_1(TyS);
- if (0) test_sqrshrn_4h_4s_9(TyS);
- if (0) test_sqrshrn_4h_4s_16(TyS);
- if (0) test_sqrshrn2_8h_4s_1(TyS);
- if (0) test_sqrshrn2_8h_4s_9(TyS);
- if (0) test_sqrshrn2_8h_4s_16(TyS);
- if (0) test_sqrshrn_8b_8h_1(TyH);
- if (0) test_sqrshrn_8b_8h_4(TyH);
- if (0) test_sqrshrn_8b_8h_8(TyH);
- if (0) test_sqrshrn2_16b_8h_1(TyH);
- if (0) test_sqrshrn2_16b_8h_4(TyH);
- if (0) test_sqrshrn2_16b_8h_8(TyH);
- if (0) test_uqrshrn_2s_2d_1(TyD);
- if (0) test_uqrshrn_2s_2d_17(TyD);
- if (0) test_uqrshrn_2s_2d_32(TyD);
- if (0) test_uqrshrn2_4s_2d_1(TyD);
- if (0) test_uqrshrn2_4s_2d_17(TyD);
- if (0) test_uqrshrn2_4s_2d_32(TyD);
- if (0) test_uqrshrn_4h_4s_1(TyS);
- if (0) test_uqrshrn_4h_4s_9(TyS);
- if (0) test_uqrshrn_4h_4s_16(TyS);
- if (0) test_uqrshrn2_8h_4s_1(TyS);
- if (0) test_uqrshrn2_8h_4s_9(TyS);
- if (0) test_uqrshrn2_8h_4s_16(TyS);
- if (0) test_uqrshrn_8b_8h_1(TyH);
- if (0) test_uqrshrn_8b_8h_4(TyH);
- if (0) test_uqrshrn_8b_8h_8(TyH);
- if (0) test_uqrshrn2_16b_8h_1(TyH);
- if (0) test_uqrshrn2_16b_8h_4(TyH);
- if (0) test_uqrshrn2_16b_8h_8(TyH);
- if (0) test_sqshrn_2s_2d_1(TyD);
- if (0) test_sqshrn_2s_2d_17(TyD);
- if (0) test_sqshrn_2s_2d_32(TyD);
- if (0) test_sqshrn2_4s_2d_1(TyD);
- if (0) test_sqshrn2_4s_2d_17(TyD);
- if (0) test_sqshrn2_4s_2d_32(TyD);
- if (0) test_sqshrn_4h_4s_1(TyS);
- if (0) test_sqshrn_4h_4s_9(TyS);
- if (0) test_sqshrn_4h_4s_16(TyS);
- if (0) test_sqshrn2_8h_4s_1(TyS);
- if (0) test_sqshrn2_8h_4s_9(TyS);
- if (0) test_sqshrn2_8h_4s_16(TyS);
- if (0) test_sqshrn_8b_8h_1(TyH);
- if (0) test_sqshrn_8b_8h_4(TyH);
- if (0) test_sqshrn_8b_8h_8(TyH);
- if (0) test_sqshrn2_16b_8h_1(TyH);
- if (0) test_sqshrn2_16b_8h_4(TyH);
- if (0) test_sqshrn2_16b_8h_8(TyH);
- if (0) test_uqshrn_2s_2d_1(TyD);
- if (0) test_uqshrn_2s_2d_17(TyD);
- if (0) test_uqshrn_2s_2d_32(TyD);
- if (0) test_uqshrn2_4s_2d_1(TyD);
- if (0) test_uqshrn2_4s_2d_17(TyD);
- if (0) test_uqshrn2_4s_2d_32(TyD);
- if (0) test_uqshrn_4h_4s_1(TyS);
- if (0) test_uqshrn_4h_4s_9(TyS);
- if (0) test_uqshrn_4h_4s_16(TyS);
- if (0) test_uqshrn2_8h_4s_1(TyS);
- if (0) test_uqshrn2_8h_4s_9(TyS);
- if (0) test_uqshrn2_8h_4s_16(TyS);
- if (0) test_uqshrn_8b_8h_1(TyH);
- if (0) test_uqshrn_8b_8h_4(TyH);
- if (0) test_uqshrn_8b_8h_8(TyH);
- if (0) test_uqshrn2_16b_8h_1(TyH);
- if (0) test_uqshrn2_16b_8h_4(TyH);
- if (0) test_uqshrn2_16b_8h_8(TyH);
- if (0) test_sqrshrun_2s_2d_1(TyD);
- if (0) test_sqrshrun_2s_2d_17(TyD);
- if (0) test_sqrshrun_2s_2d_32(TyD);
- if (0) test_sqrshrun2_4s_2d_1(TyD);
- if (0) test_sqrshrun2_4s_2d_17(TyD);
- if (0) test_sqrshrun2_4s_2d_32(TyD);
- if (0) test_sqrshrun_4h_4s_1(TyS);
- if (0) test_sqrshrun_4h_4s_9(TyS);
- if (0) test_sqrshrun_4h_4s_16(TyS);
- if (0) test_sqrshrun2_8h_4s_1(TyS);
- if (0) test_sqrshrun2_8h_4s_9(TyS);
- if (0) test_sqrshrun2_8h_4s_16(TyS);
- if (0) test_sqrshrun_8b_8h_1(TyH);
- if (0) test_sqrshrun_8b_8h_4(TyH);
- if (0) test_sqrshrun_8b_8h_8(TyH);
- if (0) test_sqrshrun2_16b_8h_1(TyH);
- if (0) test_sqrshrun2_16b_8h_4(TyH);
- if (0) test_sqrshrun2_16b_8h_8(TyH);
- if (0) test_sqshrun_2s_2d_1(TyD);
- if (0) test_sqshrun_2s_2d_17(TyD);
- if (0) test_sqshrun_2s_2d_32(TyD);
- if (0) test_sqshrun2_4s_2d_1(TyD);
- if (0) test_sqshrun2_4s_2d_17(TyD);
- if (0) test_sqshrun2_4s_2d_32(TyD);
- if (0) test_sqshrun_4h_4s_1(TyS);
- if (0) test_sqshrun_4h_4s_9(TyS);
- if (0) test_sqshrun_4h_4s_16(TyS);
- if (0) test_sqshrun2_8h_4s_1(TyS);
- if (0) test_sqshrun2_8h_4s_9(TyS);
- if (0) test_sqshrun2_8h_4s_16(TyS);
- if (0) test_sqshrun_8b_8h_1(TyH);
- if (0) test_sqshrun_8b_8h_4(TyH);
- if (0) test_sqshrun_8b_8h_8(TyH);
- if (0) test_sqshrun2_16b_8h_1(TyH);
- if (0) test_sqshrun2_16b_8h_4(TyH);
- if (0) test_sqshrun2_16b_8h_8(TyH);
+ if (1) test_sqrshrn_2s_2d_1(TyD);
+ if (1) test_sqrshrn_2s_2d_17(TyD);
+ if (1) test_sqrshrn_2s_2d_32(TyD);
+ if (1) test_sqrshrn2_4s_2d_1(TyD);
+ if (1) test_sqrshrn2_4s_2d_17(TyD);
+ if (1) test_sqrshrn2_4s_2d_32(TyD);
+ if (1) test_sqrshrn_4h_4s_1(TyS);
+ if (1) test_sqrshrn_4h_4s_9(TyS);
+ if (1) test_sqrshrn_4h_4s_16(TyS);
+ if (1) test_sqrshrn2_8h_4s_1(TyS);
+ if (1) test_sqrshrn2_8h_4s_9(TyS);
+ if (1) test_sqrshrn2_8h_4s_16(TyS);
+ if (1) test_sqrshrn_8b_8h_1(TyH);
+ if (1) test_sqrshrn_8b_8h_4(TyH);
+ if (1) test_sqrshrn_8b_8h_8(TyH);
+ if (1) test_sqrshrn2_16b_8h_1(TyH);
+ if (1) test_sqrshrn2_16b_8h_4(TyH);
+ if (1) test_sqrshrn2_16b_8h_8(TyH);
+ if (1) test_uqrshrn_2s_2d_1(TyD);
+ if (1) test_uqrshrn_2s_2d_17(TyD);
+ if (1) test_uqrshrn_2s_2d_32(TyD);
+ if (1) test_uqrshrn2_4s_2d_1(TyD);
+ if (1) test_uqrshrn2_4s_2d_17(TyD);
+ if (1) test_uqrshrn2_4s_2d_32(TyD);
+ if (1) test_uqrshrn_4h_4s_1(TyS);
+ if (1) test_uqrshrn_4h_4s_9(TyS);
+ if (1) test_uqrshrn_4h_4s_16(TyS);
+ if (1) test_uqrshrn2_8h_4s_1(TyS);
+ if (1) test_uqrshrn2_8h_4s_9(TyS);
+ if (1) test_uqrshrn2_8h_4s_16(TyS);
+ if (1) test_uqrshrn_8b_8h_1(TyH);
+ if (1) test_uqrshrn_8b_8h_4(TyH);
+ if (1) test_uqrshrn_8b_8h_8(TyH);
+ if (1) test_uqrshrn2_16b_8h_1(TyH);
+ if (1) test_uqrshrn2_16b_8h_4(TyH);
+ if (1) test_uqrshrn2_16b_8h_8(TyH);
+ if (1) test_sqshrn_2s_2d_1(TyD);
+ if (1) test_sqshrn_2s_2d_17(TyD);
+ if (1) test_sqshrn_2s_2d_32(TyD);
+ if (1) test_sqshrn2_4s_2d_1(TyD);
+ if (1) test_sqshrn2_4s_2d_17(TyD);
+ if (1) test_sqshrn2_4s_2d_32(TyD);
+ if (1) test_sqshrn_4h_4s_1(TyS);
+ if (1) test_sqshrn_4h_4s_9(TyS);
+ if (1) test_sqshrn_4h_4s_16(TyS);
+ if (1) test_sqshrn2_8h_4s_1(TyS);
+ if (1) test_sqshrn2_8h_4s_9(TyS);
+ if (1) test_sqshrn2_8h_4s_16(TyS);
+ if (1) test_sqshrn_8b_8h_1(TyH);
+ if (1) test_sqshrn_8b_8h_4(TyH);
+ if (1) test_sqshrn_8b_8h_8(TyH);
+ if (1) test_sqshrn2_16b_8h_1(TyH);
+ if (1) test_sqshrn2_16b_8h_4(TyH);
+ if (1) test_sqshrn2_16b_8h_8(TyH);
+ if (1) test_uqshrn_2s_2d_1(TyD);
+ if (1) test_uqshrn_2s_2d_17(TyD);
+ if (1) test_uqshrn_2s_2d_32(TyD);
+ if (1) test_uqshrn2_4s_2d_1(TyD);
+ if (1) test_uqshrn2_4s_2d_17(TyD);
+ if (1) test_uqshrn2_4s_2d_32(TyD);
+ if (1) test_uqshrn_4h_4s_1(TyS);
+ if (1) test_uqshrn_4h_4s_9(TyS);
+ if (1) test_uqshrn_4h_4s_16(TyS);
+ if (1) test_uqshrn2_8h_4s_1(TyS);
+ if (1) test_uqshrn2_8h_4s_9(TyS);
+ if (1) test_uqshrn2_8h_4s_16(TyS);
+ if (1) test_uqshrn_8b_8h_1(TyH);
+ if (1) test_uqshrn_8b_8h_4(TyH);
+ if (1) test_uqshrn_8b_8h_8(TyH);
+ if (1) test_uqshrn2_16b_8h_1(TyH);
+ if (1) test_uqshrn2_16b_8h_4(TyH);
+ if (1) test_uqshrn2_16b_8h_8(TyH);
+ if (1) test_sqrshrun_2s_2d_1(TyD);
+ if (1) test_sqrshrun_2s_2d_17(TyD);
+ if (1) test_sqrshrun_2s_2d_32(TyD);
+ if (1) test_sqrshrun2_4s_2d_1(TyD);
+ if (1) test_sqrshrun2_4s_2d_17(TyD);
+ if (1) test_sqrshrun2_4s_2d_32(TyD);
+ if (1) test_sqrshrun_4h_4s_1(TyS);
+ if (1) test_sqrshrun_4h_4s_9(TyS);
+ if (1) test_sqrshrun_4h_4s_16(TyS);
+ if (1) test_sqrshrun2_8h_4s_1(TyS);
+ if (1) test_sqrshrun2_8h_4s_9(TyS);
+ if (1) test_sqrshrun2_8h_4s_16(TyS);
+ if (1) test_sqrshrun_8b_8h_1(TyH);
+ if (1) test_sqrshrun_8b_8h_4(TyH);
+ if (1) test_sqrshrun_8b_8h_8(TyH);
+ if (1) test_sqrshrun2_16b_8h_1(TyH);
+ if (1) test_sqrshrun2_16b_8h_4(TyH);
+ if (1) test_sqrshrun2_16b_8h_8(TyH);
+ if (1) test_sqshrun_2s_2d_1(TyD);
+ if (1) test_sqshrun_2s_2d_17(TyD);
+ if (1) test_sqshrun_2s_2d_32(TyD);
+ if (1) test_sqshrun2_4s_2d_1(TyD);
+ if (1) test_sqshrun2_4s_2d_17(TyD);
+ if (1) test_sqshrun2_4s_2d_32(TyD);
+ if (1) test_sqshrun_4h_4s_1(TyS);
+ if (1) test_sqshrun_4h_4s_9(TyS);
+ if (1) test_sqshrun_4h_4s_16(TyS);
+ if (1) test_sqshrun2_8h_4s_1(TyS);
+ if (1) test_sqshrun2_8h_4s_9(TyS);
+ if (1) test_sqshrun2_8h_4s_16(TyS);
+ if (1) test_sqshrun_8b_8h_1(TyH);
+ if (1) test_sqshrun_8b_8h_4(TyH);
+ if (1) test_sqshrun_8b_8h_8(TyH);
+ if (1) test_sqshrun2_16b_8h_1(TyH);
+ if (1) test_sqshrun2_16b_8h_4(TyH);
+ if (1) test_sqshrun2_16b_8h_8(TyH);
// sqshl (imm) d,s,h,b _#imm
// uqshl (imm) d,s,h,b _#imm
@@ -4809,37 +4809,37 @@
// sqxtn s_d,h_s,b_h
// uqxtn s_d,h_s,b_h
// sqxtun s_d,h_s,b_h
- if (0) test_sqxtn_s_d(TyD);
- if (0) test_sqxtn_h_s(TyS);
- if (0) test_sqxtn_b_h(TyH);
- if (0) test_uqxtn_s_d(TyD);
- if (0) test_uqxtn_h_s(TyS);
- if (0) test_uqxtn_b_h(TyH);
- if (0) test_sqxtun_s_d(TyD);
- if (0) test_sqxtun_h_s(TyS);
- if (0) test_sqxtun_b_h(TyH);
+ if (1) test_sqxtn_s_d(TyD);
+ if (1) test_sqxtn_h_s(TyS);
+ if (1) test_sqxtn_b_h(TyH);
+ if (1) test_uqxtn_s_d(TyD);
+ if (1) test_uqxtn_h_s(TyS);
+ if (1) test_uqxtn_b_h(TyH);
+ if (1) test_sqxtun_s_d(TyD);
+ if (1) test_sqxtun_h_s(TyS);
+ if (1) test_sqxtun_b_h(TyH);
// sqxtn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h
// uqxtn{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h
// sqxtun{2} 2s/4s_2d, 4h/8h_4s, 8b/16b_8h
- if (0) test_sqxtn_2s_2d(TyD);
- if (0) test_sqxtn2_4s_2d(TyD);
- if (0) test_sqxtn_4h_4s(TyS);
- if (0) test_sqxtn2_8h_4s(TyS);
- if (0) test_sqxtn_8b_8h(TyH);
- if (0) test_sqxtn2_16b_8h(TyH);
- if (0) test_uqxtn_2s_2d(TyD);
- if (0) test_uqxtn2_4s_2d(TyD);
- if (0) test_uqxtn_4h_4s(TyS);
- if (0) test_uqxtn2_8h_4s(TyS);
- if (0) test_uqxtn_8b_8h(TyH);
- if (0) test_uqxtn2_16b_8h(TyH);
- if (0) test_sqxtun_2s_2d(TyD);
- if (0) test_sqxtun2_4s_2d(TyD);
- if (0) test_sqxtun_4h_4s(TyS);
- if (0) test_sqxtun2_8h_4s(TyS);
- if (0) test_sqxtun_8b_8h(TyH);
- if (0) test_sqxtun2_16b_8h(TyH);
+ if (1) test_sqxtn_2s_2d(TyD);
+ if (1) test_sqxtn2_4s_2d(TyD);
+ if (1) test_sqxtn_4h_4s(TyS);
+ if (1) test_sqxtn2_8h_4s(TyS);
+ if (1) test_sqxtn_8b_8h(TyH);
+ if (1) test_sqxtn2_16b_8h(TyH);
+ if (1) test_uqxtn_2s_2d(TyD);
+ if (1) test_uqxtn2_4s_2d(TyD);
+ if (1) test_uqxtn_4h_4s(TyS);
+ if (1) test_uqxtn2_8h_4s(TyS);
+ if (1) test_uqxtn_8b_8h(TyH);
+ if (1) test_uqxtn2_16b_8h(TyH);
+ if (1) test_sqxtun_2s_2d(TyD);
+ if (1) test_sqxtun2_4s_2d(TyD);
+ if (1) test_sqxtun_4h_4s(TyS);
+ if (1) test_sqxtun2_8h_4s(TyS);
+ if (1) test_sqxtun_8b_8h(TyH);
+ if (1) test_sqxtun2_16b_8h(TyH);
// srhadd 4s,2s,8h,4h,16b,8b
// urhadd 4s,2s,8h,4h,16b,8b
|
|
From: Rich C. <rc...@wi...> - 2014-08-11 05:03:59
|
valgrind revision: 14256
VEX revision: 2916
C compiler: gcc (SUSE Linux) 4.8.1 20130909 [gcc-4_8-branch revision 202388]
GDB: GNU gdb (GDB; openSUSE Factory) 7.6.50.20130731-cvs
Assembler: GNU assembler (GNU Binutils; openSUSE Factory) 2.23.2
C library: GNU C Library (GNU libc) stable release version 2.18 (git )
uname -mrs: Linux 3.11.4-3-desktop x86_64
Vendor version: Welcome to openSUSE 13.1 "Bottle" Beta 1 - Kernel %r (%t).
Nightly build on rodan ( Linux 3.11.4-3-desktop x86_64 )
Started at 2014-08-10 19:22:01 CDT
Ended at 2014-08-11 00:03:48 CDT
Results unchanged from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 608 tests, 6 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
memcheck/tests/err_disable3 (stderr)
memcheck/tests/err_disable4 (stderr)
memcheck/tests/threadname (stderr)
memcheck/tests/threadname_xml (stderr)
memcheck/tests/vbit-test/vbit-test (stderr)
exp-sgcheck/tests/hackedbz2 (stderr)
--tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old
+ perl perf/vg_perf --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old perf
-- Running tests in perf ----------------------------------------------
-- bigcode1 --
bigcode1 valgrind-new:0.48s no: 7.8s (16.4x, -----) me:15.0s (31.2x, -----) ca:61.3s (127.8x, -----) he: 8.9s (18.6x, -----) ca:25.6s (53.3x, -----) dr: 8.8s (18.3x, -----) ma: 9.1s (18.9x, -----)
bigcode1 valgrind-old:0.48s no: 7.9s (16.4x, -0.3%) me:15.0s (31.2x, 0.0%) ca:61.4s (127.8x, -0.1%) he: 8.9s (18.6x, 0.0%) ca:25.6s (53.3x, 0.0%) dr: 8.8s (18.2x, 0.1%) ma: 9.1s (18.9x, 0.0%)
-- bigcode2 --
bigcode2 valgrind-new:0.49s no:18.8s (38.4x, -----) me:38.4s (78.3x, -----) ca:106.3s (216.9x, -----) he:22.4s (45.7x, -----) ca:41.1s (83.9x, -----) dr:21.4s (43.6x, -----) ma:21.4s (43.6x, -----)
bigcode2 valgrind-old:0.49s no:18.8s (38.4x, 0.1%) me:38.3s (78.2x, 0.1%) ca:106.3s (216.9x, 0.0%) he:22.4s (45.7x, 0.0%) ca:41.1s (83.9x, -0.0%) dr:21.4s (43.6x, 0.1%) ma:21.4s (43.7x, -0.0%)
-- bz2 --
bz2 valgrind-new:2.32s no:10.2s ( 4.4x, -----) me:27.2s (11.7x, -----) ca:59.0s (25.4x, -----) he:39.7s (17.1x, -----) ca:75.6s (32.6x, -----) dr:57.2s (24.7x, -----) ma: 9.8s ( 4.2x, -----)
bz2 valgrind-old:2.32s no:10.2s ( 4.4x, 0.1%) me:27.2s (11.7x, 0.0%) ca:59.0s (25.4x, 0.0%) he:39.7s (17.1x, -0.0%) ca:75.6s (32.6x, 0.0%) dr:57.0s (24.6x, 0.3%) ma: 9.8s ( 4.2x, 0.1%)
-- fbench --
fbench valgrind-new:1.44s no: 5.4s ( 3.8x, -----) me:17.9s (12.4x, -----) ca:27.1s (18.8x, -----) he:12.7s ( 8.8x, -----) ca:21.6s (15.0x, -----) dr:13.0s ( 9.0x, -----) ma: 5.6s ( 3.9x, -----)
fbench valgrind-old:1.44s no: 5.4s ( 3.8x, 0.0%) me:17.9s (12.4x, 0.0%) ca:27.1s (18.8x, 0.0%) he:12.7s ( 8.8x, -0.1%) ca:21.6s (15.0x, 0.0%) dr:13.0s ( 9.0x, 0.0%) ma: 5.6s ( 3.9x, 0.2%)
-- ffbench --
ffbench valgrind-new:0.99s no: 3.7s ( 3.8x, -----) me:12.1s (12.2x, -----) ca: 8.2s ( 8.2x, -----) he:21.5s (21.7x, -----) ca:27.5s (27.7x, -----) dr:17.1s (17.3x, -----) ma: 3.7s ( 3.7x, -----)
ffbench valgrind-old:0.99s no: 3.7s ( 3.8x, 0.0%) me:12.1s (12.2x, 0.0%) ca: 8.2s ( 8.2x, 0.0%) he:21.5s (21.7x, -0.0%) ca:27.5s (27.8x, -0.0%) dr:17.1s (17.3x, 0.1%) ma: 3.7s ( 3.7x, 0.0%)
-- heap --
heap valgrind-new:0.40s no: 3.3s ( 8.3x, -----) me:21.8s (54.4x, -----) ca:31.1s (77.8x, -----) he:30.7s (76.7x, -----) ca:22.9s (57.3x, -----) dr:20.1s (50.1x, -----) ma:22.1s (55.3x, -----)
heap valgrind-old:0.40s no: 3.3s ( 8.3x, 0.0%) me:21.8s (54.5x, -0.1%) ca:31.1s (77.7x, 0.0%) he:30.7s (76.7x, 0.0%) ca:22.9s (57.2x, 0.1%) dr:20.1s (50.2x, -0.0%) ma:22.1s (55.3x, 0.1%)
-- heap_pdb4 --
heap_pdb4 valgrind-new:0.55s no: 3.6s ( 6.6x, -----) me:42.5s (77.2x, -----) ca:33.6s (61.2x, -----) he:35.8s (65.1x, -----) ca:24.7s (44.9x, -----) dr:22.3s (40.6x, -----) ma:23.1s (42.1x, -----)
heap_pdb4 valgrind-old:0.55s no: 3.6s ( 6.6x, 0.0%) me:42.5s (77.2x, 0.0%) ca:33.6s (61.1x, 0.1%) he:35.8s (65.2x, -0.1%) ca:24.7s (44.9x, -0.1%) dr:22.3s (40.6x, -0.1%) ma:23.1s (42.0x, 0.0%)
-- many-loss-records --
many-loss-records valgrind-new:0.05s no: 1.3s (25.6x, -----) me: 5.8s (116.8x, -----) ca: 5.1s (101.4x, -----) he: 5.3s (106.2x, -----) ca: 4.1s (81.2x, -----) dr: 4.7s (94.2x, -----) ma: 4.6s (92.6x, -----)
many-loss-records valgrind-old:0.05s no: 1.3s (25.6x, 0.0%) me: 5.8s (116.8x, 0.0%) ca: 5.1s (101.4x, 0.0%) he: 5.3s (106.0x, 0.2%) ca: 4.1s (81.2x, 0.0%) dr: 4.7s (94.0x, 0.2%) ma: 4.6s (92.6x, 0.0%)
-- many-xpts --
many-xpts valgrind-new:0.15s no: 1.6s (10.3x, -----) me: 7.0s (46.4x, -----) ca:12.9s (86.3x, -----) he: 9.8s (65.7x, -----) ca: 5.8s (38.9x, -----) dr: 6.1s (40.9x, -----) ma: 7.3s (48.6x, -----)
many-xpts valgrind-old:0.15s no: 1.5s (10.2x, 1.3%) me: 6.9s (46.3x, 0.3%) ca:12.9s (86.3x, 0.1%) he: 9.9s (65.8x, -0.2%) ca: 5.8s (38.9x, -0.2%) dr: 6.1s (40.9x, 0.0%) ma: 7.3s (48.7x, -0.1%)
-- sarp --
sarp valgrind-new:0.10s no: 1.5s (14.7x, -----) me: 9.4s (93.7x, -----) ca: 8.3s (82.7x, -----) he:30.9s (309.0x, -----) ca: 5.6s (55.7x, -----) dr: 4.0s (40.4x, -----) ma: 1.6s (15.5x, -----)
sarp valgrind-old:0.10s no: 1.5s (14.8x, -0.7%) me: 9.4s (93.6x, 0.1%) ca: 8.3s (82.8x, -0.1%) he:30.9s (308.8x, 0.1%) ca: 5.6s (55.7x, 0.0%) dr: 4.0s (40.2x, 0.5%) ma: 1.6s (15.5x, 0.0%)
-- tinycc --
tinycc valgrind-new:0.76s no: 7.6s (10.1x, -----) me:37.3s (49.1x, -----) ca:52.3s (68.8x, -----) he:45.5s (59.9x, -----) ca:45.0s (59.1x, -----) dr:37.6s (49.4x, -----) ma:12.0s (15.8x, -----)
tinycc valgrind-old:0.76s no: 7.6s (10.1x, 0.0%) me:37.3s (49.1x, 0.1%) ca:52.2s (68.6x, 0.2%) he:45.5s (59.9x, 0.0%) ca:45.0s (59.2x, -0.0%) dr:37.6s (49.4x, 0.0%) ma:12.0s (15.8x, -0.1%)
-- Finished tests in perf ----------------------------------------------
== 11 programs, 154 timings =================
real 162m26.656s
user 160m32.709s
sys 1m47.054s
=================================================
./valgrind-new/exp-sgcheck/tests/hackedbz2.stderr.diff-glibc28-amd64
=================================================
--- hackedbz2.stderr.exp-glibc28-amd64 2014-08-10 20:22:24.797022628 -0500
+++ hackedbz2.stderr.out 2014-08-10 21:20:10.993576330 -0500
@@ -1,7 +1,6 @@
Invalid read of size 1
- at 0x........: vex_strlen (hackedbz2.c:1006)
- by 0x........: add_to_myprintf_buf (hackedbz2.c:1284)
+ at 0x........: add_to_myprintf_buf (hackedbz2.c:1006)
by 0x........: vex_printf (hackedbz2.c:1155)
by 0x........: BZ2_compressBlock (hackedbz2.c:4039)
by 0x........: handle_compress (hackedbz2.c:4761)
=================================================
./valgrind-new/memcheck/tests/err_disable3.stderr.diff
=================================================
--- err_disable3.stderr.exp 2014-08-10 20:22:19.938969396 -0500
+++ err_disable3.stderr.out 2014-08-10 20:41:02.699289682 -0500
@@ -10,8 +10,6 @@
Thread 2:
Invalid read of size 1
at 0x........: err (err_disable3.c:25)
- by 0x........: child_fn (err_disable3.c:31)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable3.c:42)
=================================================
./valgrind-new/memcheck/tests/err_disable4.stderr.diff
=================================================
--- err_disable4.stderr.exp 2014-08-10 20:22:20.793978765 -0500
+++ err_disable4.stderr.out 2014-08-10 20:41:07.003336974 -0500
@@ -1501,8 +1501,6 @@
Thread x:
Invalid read of size 1
at 0x........: err (err_disable4.c:41)
- by 0x........: child_fn_2 (err_disable4.c:55)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable4.c:68)
=================================================
./valgrind-new/memcheck/tests/threadname.stderr.diff
=================================================
--- threadname.stderr.exp 2014-08-10 20:22:21.157982753 -0500
+++ threadname.stderr.out 2014-08-10 20:47:16.089393988 -0500
@@ -9,36 +9,12 @@
Thread 2:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_0 (threadname.c:53)
- ...
Address 0x........ is 0 bytes after a block of size 2 alloc'd
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: bad_things (threadname.c:15)
by 0x........: child_fn_0 (threadname.c:53)
...
-Thread 3 try1:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
- Address 0x........ is 0 bytes after a block of size 3 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
-
-Thread 4 012345678901234:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
- Address 0x........ is 0 bytes after a block of size 4 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
-
Thread 1:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
=================================================
./valgrind-new/memcheck/tests/threadname_xml.stderr.diff
=================================================
--- threadname_xml.stderr.exp 2014-08-10 20:22:22.210994292 -0500
+++ threadname_xml.stderr.out 2014-08-10 20:47:18.161416772 -0500
@@ -94,14 +94,6 @@
<file>threadname.c</file>
<line>...</line>
</frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_0</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
</stack>
<auxwhat>Address 0x........ is 0 bytes after a block of size 2 alloc'd</auxwhat>
<stack>
@@ -135,112 +127,6 @@
<error>
<unique>0x........</unique>
<tid>...</tid>
- <threadname>try1</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 3 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>malloc</fn>
- <dir>...</dir>
- <file>vg_replace_malloc.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
-</error>
-
-<error>
- <unique>0x........</unique>
- <tid>...</tid>
- <threadname>012345678901234</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_2</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 4 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
<truncated beyond 100 lines>
=================================================
./valgrind-new/memcheck/tests/vbit-test/vbit-test.stderr.diff
=================================================
--- vbit-test.stderr.exp 2014-08-10 20:22:21.055981636 -0500
+++ vbit-test.stderr.out 2014-08-10 20:49:26.859803493 -0500
@@ -0,0 +1 @@
+unknown opcode 5918
=================================================
./valgrind-old/exp-sgcheck/tests/hackedbz2.stderr.diff-glibc28-amd64
=================================================
--- hackedbz2.stderr.exp-glibc28-amd64 2014-08-10 19:22:22.648521990 -0500
+++ hackedbz2.stderr.out 2014-08-10 20:20:47.650958252 -0500
@@ -1,7 +1,6 @@
Invalid read of size 1
- at 0x........: vex_strlen (hackedbz2.c:1006)
- by 0x........: add_to_myprintf_buf (hackedbz2.c:1284)
+ at 0x........: add_to_myprintf_buf (hackedbz2.c:1006)
by 0x........: vex_printf (hackedbz2.c:1155)
by 0x........: BZ2_compressBlock (hackedbz2.c:4039)
by 0x........: handle_compress (hackedbz2.c:4761)
=================================================
./valgrind-old/memcheck/tests/err_disable3.stderr.diff
=================================================
--- err_disable3.stderr.exp 2014-08-10 19:23:20.430155711 -0500
+++ err_disable3.stderr.out 2014-08-10 19:41:50.008322264 -0500
@@ -10,8 +10,6 @@
Thread 2:
Invalid read of size 1
at 0x........: err (err_disable3.c:25)
- by 0x........: child_fn (err_disable3.c:31)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable3.c:42)
=================================================
./valgrind-old/memcheck/tests/err_disable4.stderr.diff
=================================================
--- err_disable4.stderr.exp 2014-08-10 19:23:14.421089802 -0500
+++ err_disable4.stderr.out 2014-08-10 19:41:54.087367041 -0500
@@ -1501,8 +1501,6 @@
Thread x:
Invalid read of size 1
at 0x........: err (err_disable4.c:41)
- by 0x........: child_fn_2 (err_disable4.c:55)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable4.c:68)
=================================================
./valgrind-old/memcheck/tests/threadname.stderr.diff
=================================================
--- threadname.stderr.exp 2014-08-10 19:23:15.869105684 -0500
+++ threadname.stderr.out 2014-08-10 19:47:58.642370569 -0500
@@ -9,36 +9,12 @@
Thread 2:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_0 (threadname.c:53)
- ...
Address 0x........ is 0 bytes after a block of size 2 alloc'd
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: bad_things (threadname.c:15)
by 0x........: child_fn_0 (threadname.c:53)
...
-Thread 3 try1:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
- Address 0x........ is 0 bytes after a block of size 3 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
-
-Thread 4 012345678901234:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
- Address 0x........ is 0 bytes after a block of size 4 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
-
Thread 1:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
=================================================
./valgrind-old/memcheck/tests/threadname_xml.stderr.diff
=================================================
--- threadname_xml.stderr.exp 2014-08-10 19:23:20.399155371 -0500
+++ threadname_xml.stderr.out 2014-08-10 19:48:00.678392938 -0500
@@ -94,14 +94,6 @@
<file>threadname.c</file>
<line>...</line>
</frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_0</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
</stack>
<auxwhat>Address 0x........ is 0 bytes after a block of size 2 alloc'd</auxwhat>
<stack>
@@ -135,112 +127,6 @@
<error>
<unique>0x........</unique>
<tid>...</tid>
- <threadname>try1</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 3 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>malloc</fn>
- <dir>...</dir>
- <file>vg_replace_malloc.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
-</error>
-
-<error>
- <unique>0x........</unique>
- <tid>...</tid>
- <threadname>012345678901234</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_2</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 4 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
<truncated beyond 100 lines>
=================================================
./valgrind-old/memcheck/tests/vbit-test/vbit-test.stderr.diff
=================================================
--- vbit-test.stderr.exp 2014-08-10 19:23:15.494101571 -0500
+++ vbit-test.stderr.out 2014-08-10 19:50:08.504797556 -0500
@@ -0,0 +1 @@
+unknown opcode 5918
|
|
From: Christian B. <bor...@de...> - 2014-08-11 04:11:51
|
valgrind revision: 14256 VEX revision: 2916 C compiler: gcc (SUSE Linux) 4.3.4 [gcc-4_3-branch revision 152973] GDB: GNU gdb (GDB) SUSE (7.5.1-0.7.29) Assembler: GNU assembler (GNU Binutils; SUSE Linux Enterprise 11) 2.23.1 C library: GNU C Library stable release version 2.11.3 (20110527) uname -mrs: Linux 3.0.101-0.31-default s390x Vendor version: Welcome to SUSE Linux Enterprise Server 11 SP3 (s390x) - Kernel %r (%t). Nightly build on sless390 ( SUSE Linux Enterprise Server 11 SP3 gcc 4.3.4 on z196 (s390x) ) Started at 2014-08-11 03:45:01 CEST Ended at 2014-08-11 06:11:36 CEST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 658 tests, 4 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/origin5-bz2 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) helgrind/tests/pth_cond_destroy_busy (stderr) helgrind/tests/tc20_verifywrap (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.23s no: 4.8s (21.0x, -----) me: 6.2s (27.0x, -----) ca:26.4s (115.0x, -----) he: 5.5s (23.7x, -----) ca: 9.1s (39.6x, -----) dr: 4.8s (20.8x, -----) ma: 3.9s (17.0x, -----) bigcode1 valgrind-old:0.23s no: 4.9s (21.5x, -2.1%) me: 6.3s (27.3x, -1.0%) ca:26.4s (114.8x, 0.2%) he: 5.4s (23.6x, 0.5%) ca: 9.1s (39.6x, 0.0%) dr: 4.8s (20.8x, 0.2%) ma: 3.9s (17.0x, 0.0%) -- bigcode2 -- bigcode2 valgrind-new:0.25s no: 7.8s (31.0x, -----) me:13.0s (52.2x, -----) ca:39.1s (156.4x, -----) he:10.4s (41.7x, -----) ca:14.2s (56.8x, -----) dr: 8.9s (35.6x, -----) ma: 7.4s (29.4x, -----) bigcode2 valgrind-old:0.25s no: 7.8s (31.2x, -0.5%) me:13.1s (52.3x, -0.2%) ca:39.1s (156.3x, 0.0%) he:10.5s (42.0x, -0.8%) ca:14.2s (56.8x, 0.0%) dr: 8.9s (35.6x, 0.0%) ma: 7.4s (29.4x, 0.0%) -- bz2 -- bz2 valgrind-new:0.69s no: 6.7s ( 9.8x, -----) me:12.7s (18.4x, -----) ca:30.6s (44.4x, -----) he:19.6s (28.4x, -----) ca:34.3s (49.8x, -----) dr:30.6s (44.4x, -----) ma: 4.2s ( 6.0x, -----) bz2 valgrind-old:0.69s no: 6.7s ( 9.7x, 1.0%) me:12.7s (18.4x, 0.1%) ca:30.7s (44.5x, -0.2%) he:19.7s (28.6x, -0.6%) ca:34.3s (49.8x, 0.0%) dr:30.6s (44.4x, -0.0%) ma: 4.1s ( 6.0x, 0.7%) -- fbench -- fbench valgrind-new:0.40s no: 1.6s ( 4.0x, -----) me: 4.3s (10.7x, -----) ca: 9.3s (23.3x, -----) he: 6.2s (15.4x, -----) ca: 7.2s (18.1x, -----) dr: 5.6s (14.0x, -----) ma: 1.6s ( 4.1x, -----) fbench valgrind-old:0.40s no: 1.6s ( 4.0x, -0.0%) me: 4.3s (10.7x, -0.2%) ca: 9.3s (23.2x, 0.2%) he: 6.2s (15.4x, 0.0%) ca: 7.2s (18.1x, -0.1%) dr: 5.6s (14.0x, 0.0%) ma: 1.6s ( 4.1x, 0.0%) -- ffbench -- ffbench valgrind-new:0.21s no: 1.2s ( 5.6x, -----) me: 3.0s (14.1x, -----) ca: 3.0s (14.4x, -----) he:44.1s (210.1x, -----) ca: 9.6s (45.8x, -----) dr: 7.0s (33.3x, -----) ma: 1.0s ( 4.6x, -----) ffbench valgrind-old:0.21s no: 1.2s ( 5.6x, -0.9%) me: 3.0s (14.0x, 0.3%) ca: 3.0s (14.4x, 0.0%) he:44.1s (210.1x, 0.0%) ca: 9.6s (45.8x, -0.1%) dr: 7.0s (33.3x, 0.0%) ma: 1.0s ( 4.6x, 0.0%) -- heap -- heap valgrind-new:0.23s no: 2.3s (10.2x, -----) me: 8.7s (37.7x, -----) ca:13.3s (57.7x, -----) he:12.8s (55.7x, -----) ca:11.4s (49.5x, -----) dr: 7.5s (32.4x, -----) ma: 7.9s (34.4x, -----) heap valgrind-old:0.23s no: 2.3s (10.0x, 1.3%) me: 8.7s (37.7x, 0.1%) ca:13.2s (57.4x, 0.5%) he:12.8s (55.6x, 0.2%) ca:11.3s (49.3x, 0.4%) dr: 7.5s (32.4x, 0.0%) ma: 7.8s (34.1x, 1.0%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.22s no: 2.6s (11.6x, -----) me:12.7s (57.7x, -----) ca:14.3s (64.9x, -----) he:14.0s (63.7x, -----) ca:12.4s (56.2x, -----) dr: 8.5s (38.7x, -----) ma: 8.0s (36.4x, -----) heap_pdb4 valgrind-old:0.22s no: 2.6s (11.7x, -0.4%) me:12.7s (57.5x, 0.2%) ca:14.3s (64.9x, 0.0%) he:14.2s (64.5x, -1.1%) ca:12.3s (56.1x, 0.1%) dr: 8.5s (38.7x, 0.0%) ma: 8.0s (36.4x, 0.1%) -- many-loss-records -- many-loss-records valgrind-new:0.02s no: 0.5s (26.5x, -----) me: 2.0s (102.5x, -----) ca: 1.9s (97.5x, -----) he: 2.1s (106.0x, -----) ca: 1.9s (96.0x, -----) dr: 1.7s (85.0x, -----) ma: 1.7s (83.0x, -----) many-loss-records valgrind-old:0.02s no: 0.5s (26.5x, 0.0%) me: 2.0s (102.5x, 0.0%) ca: 1.9s (97.5x, 0.0%) he: 2.1s (106.5x, -0.5%) ca: 1.9s (96.0x, 0.0%) dr: 1.7s (85.0x, 0.0%) ma: 1.7s (83.0x, 0.0%) -- many-xpts -- many-xpts valgrind-new:0.07s no: 0.7s ( 9.9x, -----) me: 3.1s (44.7x, -----) ca:367.7s (5252.6x, -----) he: 6.5s (92.6x, -----) ca: 2.8s (40.0x, -----) dr: 2.5s (35.1x, -----) ma: 2.6s (37.1x, -----) many-xpts valgrind-old:0.07s no: 0.7s ( 9.7x, 1.4%) me: 3.1s (44.7x, 0.0%) ca:366.8s (5240.1x, 0.2%) he: 6.5s (92.6x, 0.0%) ca: 2.8s (40.0x, 0.0%) dr: 2.5s (35.1x, 0.0%) ma: 2.6s (37.1x, 0.0%) -- sarp -- sarp valgrind-new:0.03s no: 0.6s (20.3x, -----) me: 3.5s (115.3x, -----) ca: 3.1s (105.0x, -----) he:16.4s (547.3x, -----) ca: 2.0s (68.0x, -----) dr: 1.3s (44.7x, -----) ma: 0.5s (16.0x, -----) sarp valgrind-old:0.03s no: 0.6s (20.0x, 1.6%) me: 3.5s (115.3x, 0.0%) ca: 3.2s (105.3x, -0.3%) he:16.9s (565.0x, -3.2%) ca: 2.0s (68.0x, 0.0%) dr: 1.4s (45.0x, -0.7%) ma: 0.5s (16.0x, 0.0%) -- tinycc -- tinycc valgrind-new:0.22s no: 3.1s (14.3x, -----) me:14.4s (65.6x, -----) ca:30.0s (136.4x, -----) he:27.4s (124.5x, -----) ca:21.2s (96.3x, -----) dr:20.7s (94.2x, -----) ma: 3.9s (17.7x, -----) tinycc valgrind-old:0.22s no: 3.1s (14.3x, 0.0%) me:14.4s (65.6x, 0.0%) ca:30.0s (136.2x, 0.1%) he:27.4s (124.4x, 0.1%) ca:21.2s (96.3x, 0.0%) dr:20.7s (94.2x, 0.0%) ma: 3.9s (17.7x, -0.3%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 110m19.058s user 109m34.458s sys 0m30.563s |
|
From: Tom H. <to...@co...> - 2014-08-11 03:36:41
|
valgrind revision: 14256 VEX revision: 2916 C compiler: gcc (GCC) 4.3.0 20080428 (Red Hat 4.3.0-8) GDB: Assembler: GNU assembler version 2.18.50.0.6-2 20080403 C library: GNU C Library stable release version 2.8 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 9 (Sulphur) Nightly build on bristol ( x86_64, Fedora 9 ) Started at 2014-08-11 03:21:29 BST Ended at 2014-08-11 04:36:17 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 661 tests, 3 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/amd64/insn-pcmpistri (stderr) memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) none/tests/amd64/sse4-64 (stdout) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 1.8s (16.2x, -----) me: 3.8s (34.2x, -----) ca:14.6s (132.3x, -----) he: 2.2s (20.2x, -----) ca: 4.7s (42.4x, -----) dr: 2.0s (17.8x, -----) ma: 2.2s (20.3x, -----) bigcode1 valgrind-old:0.11s no: 1.9s (17.6x, -9.0%) me: 3.7s (33.3x, 2.7%) ca:13.8s (125.7x, 4.9%) he: 2.0s (18.1x, 10.4%) ca: 4.5s (40.5x, 4.3%) dr: 1.9s (17.5x, 1.5%) ma: 2.1s (18.8x, 7.2%) -- bigcode2 -- bigcode2 valgrind-new:0.18s no: 4.5s (25.1x, -----) me: 9.1s (50.7x, -----) ca:27.5s (152.7x, -----) he: 5.2s (28.9x, -----) ca: 8.3s (46.3x, -----) dr: 4.8s (26.9x, -----) ma: 5.0s (27.6x, -----) bigcode2 valgrind-old:0.18s no: 4.2s (23.5x, 6.2%) me: 8.9s (49.3x, 2.6%) ca:25.4s (140.9x, 7.7%) he: 5.2s (29.1x, -0.8%) ca: 8.1s (45.2x, 2.3%) dr: 4.8s (26.8x, 0.2%) ma: 4.8s (26.8x, 3.0%) -- bz2 -- bz2 valgrind-new:0.60s no: 1.8s ( 3.0x, -----) me: 5.8s ( 9.6x, -----) ca:17.5s (29.2x, -----) he: 8.5s (14.2x, -----) ca:12.3s (20.4x, -----) dr:13.1s (21.9x, -----) ma: 1.8s ( 2.9x, -----) bz2 valgrind-old:0.60s no: 1.8s ( 3.0x, 0.6%) me: 5.8s ( 9.6x, 0.2%) ca:17.2s (28.6x, 1.9%) he: 8.5s (14.1x, 0.4%) ca:12.2s (20.4x, 0.2%) dr:13.1s (21.8x, 0.4%) ma: 1.8s ( 2.9x, 0.0%) -- fbench -- fbench valgrind-new:0.22s no: 1.1s ( 4.8x, -----) me: 3.5s (16.1x, -----) ca: 5.7s (26.0x, -----) he: 3.0s (13.8x, -----) ca: 3.6s (16.2x, -----) dr: 2.8s (12.8x, -----) ma: 1.1s ( 5.0x, -----) fbench valgrind-old:0.22s no: 1.1s ( 4.8x, 0.9%) me: 3.6s (16.2x, -0.6%) ca: 5.7s (26.0x, 0.0%) he: 3.0s (13.8x, 0.3%) ca: 3.5s (16.1x, 0.6%) dr: 2.8s (12.8x, 0.0%) ma: 1.1s ( 5.0x, 0.0%) -- ffbench -- ffbench valgrind-new:0.22s no: 1.2s ( 5.5x, -----) me: 3.1s (14.2x, -----) ca: 2.1s ( 9.8x, -----) he: 6.1s (27.6x, -----) ca: 5.1s (23.2x, -----) dr: 3.7s (16.7x, -----) ma: 1.1s ( 5.2x, -----) ffbench valgrind-old:0.22s no: 1.2s ( 5.4x, 0.8%) me: 3.1s (14.2x, 0.0%) ca: 2.2s ( 9.8x, -0.5%) he: 5.3s (24.3x, 12.0%) ca: 5.1s (23.3x, -0.4%) dr: 3.7s (16.7x, 0.0%) ma: 1.1s ( 5.2x, 0.0%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 7.6x, -----) me: 5.3s (66.4x, -----) ca: 5.8s (73.0x, -----) he: 7.1s (89.1x, -----) ca: 3.5s (43.8x, -----) dr: 4.3s (53.4x, -----) ma: 4.8s (59.4x, -----) heap valgrind-old:0.08s no: 0.6s ( 7.6x, 0.0%) me: 5.3s (66.1x, 0.4%) ca: 5.9s (73.9x, -1.2%) he: 7.1s (88.2x, 1.0%) ca: 3.5s (43.2x, 1.1%) dr: 4.3s (53.5x, -0.2%) ma: 4.8s (59.4x, 0.0%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.10s no: 0.7s ( 6.7x, -----) me: 8.9s (89.1x, -----) ca: 6.6s (65.6x, -----) he: 8.1s (81.1x, -----) ca: 3.8s (38.2x, -----) dr: 4.9s (48.6x, -----) ma: 5.0s (49.5x, -----) heap_pdb4 valgrind-old:0.10s no: 0.7s ( 6.7x, 0.0%) me: 8.9s (88.7x, 0.4%) ca: 6.6s (65.6x, 0.0%) he: 8.2s (81.5x, -0.5%) ca: 3.8s (38.2x, 0.0%) dr: 4.8s (48.2x, 0.8%) ma: 4.9s (49.4x, 0.2%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.2s (23.0x, -----) me: 1.2s (125.0x, -----) ca: 0.9s (95.0x, -----) he: 1.1s (112.0x, -----) ca: 0.7s (65.0x, -----) dr: 0.9s (89.0x, -----) ma: 1.0s (96.0x, -----) many-loss-records valgrind-old:0.01s no: 0.2s (22.0x, 4.3%) me: 1.3s (126.0x, -0.8%) ca: 1.0s (96.0x, -1.1%) he: 1.1s (112.0x, 0.0%) ca: 0.6s (64.0x, 1.5%) dr: 0.9s (88.0x, 1.1%) ma: 1.0s (96.0x, 0.0%) -- many-xpts -- many-xpts valgrind-new:0.04s no: 0.3s ( 7.5x, -----) me: 1.8s (44.2x, -----) ca: 2.9s (73.5x, -----) he: 2.3s (56.8x, -----) ca: 1.1s (28.2x, -----) dr: 1.3s (32.5x, -----) ma: 1.4s (35.2x, -----) many-xpts valgrind-old:0.04s no: 0.3s ( 7.5x, 0.0%) me: 1.8s (44.5x, -0.6%) ca: 3.0s (73.8x, -0.3%) he: 2.2s (55.5x, 2.2%) ca: 1.1s (28.0x, 0.9%) dr: 1.3s (32.5x, 0.0%) ma: 1.4s (35.0x, 0.7%) -- sarp -- sarp valgrind-new:0.02s no: 0.2s (12.5x, -----) me: 2.1s (106.0x, -----) ca: 1.8s (88.5x, -----) he: 7.9s (393.0x, -----) ca: 0.9s (47.5x, -----) dr: 0.8s (41.5x, -----) ma: 0.3s (13.0x, -----) sarp valgrind-old:0.02s no: 0.2s (12.0x, 4.0%) me: 2.1s (106.5x, -0.5%) ca: 1.8s (88.5x, 0.0%) he: 7.9s (395.5x, -0.6%) ca: 0.9s (47.5x, 0.0%) dr: 0.8s (41.0x, 1.2%) ma: 0.3s (13.0x, 0.0%) -- tinycc -- tinycc valgrind-new:0.16s no: 1.4s ( 8.6x, -----) me: 9.0s (56.4x, -----) ca:11.0s (68.7x, -----) he:10.6s (66.0x, -----) ca: 9.2s (57.6x, -----) dr: 8.8s (55.1x, -----) ma: 2.4s (14.9x, -----) tinycc valgrind-old:0.16s no: 1.4s ( 8.9x, -3.6%) me: 9.1s (57.1x, -1.2%) ca:10.8s (67.8x, 1.3%) he:10.9s (68.0x, -3.0%) ca: 9.5s (59.6x, -3.6%) dr: 8.8s (54.7x, 0.8%) ma: 2.4s (14.8x, 0.8%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 37m25.455s user 36m27.063s sys 0m22.407s |
|
From: Tom H. <to...@co...> - 2014-08-11 03:31:34
|
valgrind revision: 14256 VEX revision: 2916 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) GDB: GNU gdb (GDB) Fedora (7.3.1-48.fc15) Assembler: GNU assembler version 2.21.51.0.6-6.fc15 20110118 C library: GNU C Library stable release version 2.14.1 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 15 (Lovelock) Nightly build on bristol ( x86_64, Fedora 15 ) Started at 2014-08-11 03:12:37 BST Ended at 2014-08-11 04:31:18 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 2 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 1.7s (15.3x, -----) me: 3.3s (29.9x, -----) ca:14.2s (129.5x, -----) he: 2.0s (17.8x, -----) ca: 3.9s (35.7x, -----) dr: 2.0s (18.1x, -----) ma: 1.9s (17.7x, -----) bigcode1 valgrind-old:0.11s no: 1.9s (16.8x,-10.1%) me: 3.5s (32.0x, -7.0%) ca:15.8s (143.4x,-10.7%) he: 1.9s (17.5x, 1.5%) ca: 4.0s (36.0x, -0.8%) dr: 2.0s (18.1x, 0.0%) ma: 2.0s (17.8x, -0.5%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 4.1s (37.2x, -----) me: 8.2s (74.9x, -----) ca:26.7s (243.0x, -----) he: 4.9s (44.6x, -----) ca: 7.5s (68.0x, -----) dr: 4.7s (43.0x, -----) ma: 4.6s (42.0x, -----) bigcode2 valgrind-old:0.11s no: 4.0s (36.6x, 1.5%) me: 8.8s (79.5x, -6.2%) ca:26.9s (244.4x, -0.6%) he: 4.8s (44.1x, 1.2%) ca: 7.5s (68.0x, 0.0%) dr: 4.6s (41.9x, 2.5%) ma: 4.5s (41.4x, 1.5%) -- bz2 -- bz2 valgrind-new:0.52s no: 2.1s ( 4.1x, -----) me: 6.2s (11.8x, -----) ca:13.6s (26.1x, -----) he: 9.0s (17.4x, -----) ca:11.8s (22.7x, -----) dr:11.1s (21.3x, -----) ma: 2.1s ( 4.0x, -----) bz2 valgrind-old:0.52s no: 2.1s ( 4.0x, 0.9%) me: 6.2s (11.8x, -0.2%) ca:13.4s (25.7x, 1.5%) he: 8.8s (16.8x, 3.0%) ca:11.8s (22.7x, 0.3%) dr:11.2s (21.5x, -0.9%) ma: 2.1s ( 4.0x, -0.5%) -- fbench -- fbench valgrind-new:0.22s no: 1.0s ( 4.6x, -----) me: 3.6s (16.5x, -----) ca: 5.4s (24.7x, -----) he: 2.7s (12.5x, -----) ca: 3.2s (14.5x, -----) dr: 2.6s (11.6x, -----) ma: 1.1s ( 4.9x, -----) fbench valgrind-old:0.22s no: 1.0s ( 4.6x, 0.0%) me: 3.6s (16.5x, 0.0%) ca: 5.4s (24.5x, 0.6%) he: 2.8s (12.8x, -2.9%) ca: 3.2s (14.5x, -0.3%) dr: 2.6s (11.7x, -0.8%) ma: 1.1s ( 4.9x, 0.9%) -- ffbench -- ffbench valgrind-new:0.24s no: 0.9s ( 3.9x, -----) me: 2.8s (11.5x, -----) ca: 1.9s ( 7.8x, -----) he: 6.1s (25.6x, -----) ca: 4.2s (17.6x, -----) dr: 3.4s (14.1x, -----) ma: 0.9s ( 3.7x, -----) ffbench valgrind-old:0.24s no: 0.9s ( 3.9x, 1.1%) me: 2.7s (11.4x, 0.4%) ca: 1.8s ( 7.6x, 1.6%) he: 5.9s (24.5x, 4.1%) ca: 4.2s (17.5x, 0.5%) dr: 3.4s (14.2x, -0.9%) ma: 0.9s ( 3.7x, 0.0%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 7.6x, -----) me: 5.0s (62.7x, -----) ca: 6.1s (76.5x, -----) he: 6.8s (85.5x, -----) ca: 3.3s (41.5x, -----) dr: 4.2s (52.2x, -----) ma: 4.9s (60.8x, -----) heap valgrind-old:0.08s no: 0.6s ( 7.6x, 0.0%) me: 5.0s (63.0x, -0.4%) ca: 6.1s (76.6x, -0.2%) he: 6.9s (86.0x, -0.6%) ca: 3.3s (41.6x, -0.3%) dr: 4.2s (52.2x, 0.0%) ma: 4.9s (60.9x, -0.2%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.10s no: 0.7s ( 7.2x, -----) me: 8.6s (86.4x, -----) ca: 6.8s (68.5x, -----) he: 8.0s (80.2x, -----) ca: 3.7s (37.2x, -----) dr: 4.9s (48.9x, -----) ma: 5.0s (50.3x, -----) heap_pdb4 valgrind-old:0.10s no: 0.7s ( 7.1x, 1.4%) me: 8.6s (85.7x, 0.8%) ca: 6.9s (68.6x, -0.1%) he: 8.0s (80.2x, 0.0%) ca: 3.7s (36.9x, 0.8%) dr: 4.9s (48.9x, 0.0%) ma: 5.0s (50.2x, 0.2%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.2s (24.0x, -----) me: 1.2s (125.0x, -----) ca: 1.0s (100.0x, -----) he: 1.0s (104.0x, -----) ca: 0.7s (67.0x, -----) dr: 0.9s (94.0x, -----) ma: 1.0s (99.0x, -----) many-loss-records valgrind-old:0.01s no: 0.2s (24.0x, 0.0%) me: 1.3s (126.0x, -0.8%) ca: 1.0s (100.0x, 0.0%) he: 1.1s (106.0x, -1.9%) ca: 0.7s (67.0x, 0.0%) dr: 0.9s (95.0x, -1.1%) ma: 1.0s (98.0x, 1.0%) -- many-xpts -- many-xpts valgrind-new:0.03s no: 0.3s (10.3x, -----) me: 1.8s (60.0x, -----) ca: 2.6s (88.0x, -----) he: 2.1s (71.0x, -----) ca: 1.0s (32.0x, -----) dr: 1.4s (45.7x, -----) ma: 1.5s (49.0x, -----) many-xpts valgrind-old:0.03s no: 0.3s (10.3x, 0.0%) me: 1.8s (60.3x, -0.6%) ca: 2.6s (88.0x, 0.0%) he: 2.1s (71.3x, -0.5%) ca: 1.0s (32.0x, 0.0%) dr: 1.4s (45.7x, 0.0%) ma: 1.4s (48.0x, 2.0%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (13.0x, -----) me: 2.2s (109.0x, -----) ca: 1.7s (84.5x, -----) he: 6.5s (326.0x, -----) ca: 0.9s (46.0x, -----) dr: 0.8s (42.5x, -----) ma: 0.3s (14.5x, -----) sarp valgrind-old:0.02s no: 0.3s (13.5x, -3.8%) me: 2.2s (109.0x, 0.0%) ca: 1.7s (85.5x, -1.2%) he: 6.5s (327.5x, -0.5%) ca: 0.9s (45.5x, 1.1%) dr: 0.8s (42.0x, 1.2%) ma: 0.3s (14.5x, 0.0%) -- tinycc -- tinycc valgrind-new:0.16s no: 1.4s ( 8.7x, -----) me: 8.8s (54.8x, -----) ca:10.9s (68.3x, -----) he: 9.5s (59.4x, -----) ca: 8.1s (50.4x, -----) dr: 8.0s (49.8x, -----) ma: 2.5s (15.4x, -----) tinycc valgrind-old:0.16s no: 1.4s ( 8.7x, 0.0%) me: 8.8s (55.0x, -0.5%) ca:10.7s (66.8x, 2.2%) he: 9.5s (59.6x, -0.3%) ca: 8.1s (50.3x, 0.1%) dr: 8.2s (51.4x, -3.3%) ma: 2.5s (15.4x, -0.4%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 35m37.778s user 34m42.031s sys 0m22.297s |
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From: Tom H. <to...@co...> - 2014-08-11 03:25:47
|
valgrind revision: 14256 VEX revision: 2916 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) GDB: GNU gdb (GDB) Fedora (7.3.50.20110722-16.fc16) Assembler: GNU assembler version 2.21.53.0.1-6.fc16 20110716 C library: GNU C Library development release version 2.14.90 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 16 (Verne) Nightly build on bristol ( x86_64, Fedora 16 ) Started at 2014-08-11 03:01:48 BST Ended at 2014-08-11 04:25:33 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 2 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 2.1s (19.0x, -----) me: 3.6s (32.5x, -----) ca:16.5s (149.6x, -----) he: 2.0s (18.5x, -----) ca: 4.6s (42.1x, -----) dr: 2.0s (18.5x, -----) ma: 2.2s (20.0x, -----) bigcode1 valgrind-old:0.11s no: 2.0s (17.8x, 6.2%) me: 3.8s (34.6x, -6.4%) ca:16.7s (151.5x, -1.2%) he: 2.1s (19.5x, -5.4%) ca: 4.1s (37.5x, 10.8%) dr: 1.9s (17.5x, 5.4%) ma: 2.0s (18.6x, 6.8%) -- bigcode2 -- bigcode2 valgrind-new:0.12s no: 4.5s (37.8x, -----) me: 8.8s (73.7x, -----) ca:32.3s (269.3x, -----) he: 5.8s (48.3x, -----) ca: 7.9s (66.1x, -----) dr: 5.6s (46.3x, -----) ma: 4.7s (39.5x, -----) bigcode2 valgrind-old:0.12s no: 4.2s (35.1x, 7.1%) me: 8.6s (71.8x, 2.6%) ca:26.8s (223.2x, 17.1%) he: 5.3s (44.1x, 8.8%) ca: 7.3s (60.6x, 8.3%) dr: 4.6s (38.4x, 17.1%) ma: 4.7s (38.8x, 1.7%) -- bz2 -- bz2 valgrind-new:0.56s no: 2.2s ( 3.9x, -----) me: 6.6s (11.7x, -----) ca:13.6s (24.4x, -----) he: 9.4s (16.9x, -----) ca:12.0s (21.5x, -----) dr:11.3s (20.2x, -----) ma: 2.1s ( 3.8x, -----) bz2 valgrind-old:0.56s no: 2.1s ( 3.8x, 2.3%) me: 6.3s (11.2x, 4.7%) ca:13.3s (23.8x, 2.2%) he: 9.3s (16.7x, 1.1%) ca:12.2s (21.8x, -1.6%) dr:11.8s (21.0x, -4.2%) ma: 2.2s ( 3.9x, -0.9%) -- fbench -- fbench valgrind-new:0.22s no: 1.1s ( 4.8x, -----) me: 3.6s (16.5x, -----) ca: 5.5s (25.0x, -----) he: 2.7s (12.3x, -----) ca: 3.2s (14.6x, -----) dr: 2.5s (11.6x, -----) ma: 1.1s ( 4.9x, -----) fbench valgrind-old:0.22s no: 1.0s ( 4.6x, 2.9%) me: 3.7s (16.7x, -1.1%) ca: 5.5s (25.0x, 0.0%) he: 2.7s (12.3x, 0.0%) ca: 3.3s (15.0x, -3.1%) dr: 2.5s (11.6x, 0.0%) ma: 1.1s ( 5.0x, -0.9%) -- ffbench -- ffbench valgrind-new:0.24s no: 1.0s ( 4.0x, -----) me: 2.8s (11.6x, -----) ca: 1.9s ( 7.9x, -----) he: 5.7s (23.7x, -----) ca: 4.2s (17.6x, -----) dr: 3.3s (13.8x, -----) ma: 0.9s ( 3.8x, -----) ffbench valgrind-old:0.24s no: 0.9s ( 4.0x, 1.0%) me: 2.8s (11.5x, 0.7%) ca: 1.9s ( 8.0x, -1.1%) he: 6.1s (25.3x, -6.9%) ca: 4.2s (17.6x, 0.0%) dr: 3.3s (13.9x, -0.3%) ma: 0.9s ( 3.8x, 0.0%) -- heap -- heap valgrind-new:0.08s no: 0.6s ( 8.0x, -----) me: 5.1s (64.1x, -----) ca: 6.5s (81.9x, -----) he: 7.0s (88.0x, -----) ca: 3.4s (42.0x, -----) dr: 4.3s (53.2x, -----) ma: 4.8s (59.9x, -----) heap valgrind-old:0.08s no: 0.6s ( 7.9x, 1.6%) me: 5.2s (65.5x, -2.1%) ca: 6.5s (81.5x, 0.5%) he: 7.2s (90.2x, -2.6%) ca: 3.4s (41.9x, 0.3%) dr: 4.3s (53.4x, -0.2%) ma: 4.8s (59.8x, 0.2%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.11s no: 0.7s ( 6.4x, -----) me: 8.8s (80.5x, -----) ca: 7.2s (65.3x, -----) he: 7.8s (70.7x, -----) ca: 3.8s (34.1x, -----) dr: 5.0s (45.9x, -----) ma: 5.0s (45.8x, -----) heap_pdb4 valgrind-old:0.11s no: 0.7s ( 6.5x, -1.4%) me: 8.8s (80.3x, 0.2%) ca: 7.1s (64.5x, 1.3%) he: 7.7s (70.1x, 0.9%) ca: 3.8s (34.1x, 0.0%) dr: 5.1s (46.2x, -0.6%) ma: 5.0s (45.5x, 0.6%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.3s (26.0x, -----) me: 1.3s (128.0x, -----) ca: 1.1s (106.0x, -----) he: 1.1s (106.0x, -----) ca: 0.7s (69.0x, -----) dr: 1.0s (96.0x, -----) ma: 1.0s (98.0x, -----) many-loss-records valgrind-old:0.01s no: 0.3s (26.0x, 0.0%) me: 1.3s (128.0x, 0.0%) ca: 1.1s (105.0x, 0.9%) he: 1.1s (106.0x, 0.0%) ca: 0.7s (68.0x, 1.4%) dr: 1.0s (97.0x, -1.0%) ma: 1.0s (99.0x, -1.0%) -- many-xpts -- many-xpts valgrind-new:0.03s no: 0.3s (10.3x, -----) me: 1.8s (61.3x, -----) ca: 2.8s (92.3x, -----) he: 2.1s (71.0x, -----) ca: 1.0s (33.7x, -----) dr: 1.4s (46.0x, -----) ma: 1.5s (48.7x, -----) many-xpts valgrind-old:0.03s no: 0.3s (10.7x, -3.2%) me: 1.8s (61.3x, -0.0%) ca: 2.8s (93.0x, -0.7%) he: 2.1s (69.7x, 1.9%) ca: 1.0s (32.7x, 3.0%) dr: 1.4s (46.0x, -0.0%) ma: 1.4s (48.3x, 0.7%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (14.0x, -----) me: 2.5s (124.5x, -----) ca: 1.7s (86.5x, -----) he: 6.5s (326.5x, -----) ca: 1.0s (50.0x, -----) dr: 0.9s (43.5x, -----) ma: 0.3s (15.0x, -----) sarp valgrind-old:0.02s no: 0.3s (14.0x, 0.0%) me: 2.4s (120.5x, 3.2%) ca: 1.7s (86.0x, 0.6%) he: 6.5s (324.5x, 0.6%) ca: 1.0s (50.0x, 0.0%) dr: 0.9s (43.0x, 1.1%) ma: 0.3s (15.0x, 0.0%) -- tinycc -- tinycc valgrind-new:0.16s no: 1.5s ( 9.2x, -----) me: 9.0s (56.3x, -----) ca:11.3s (70.6x, -----) he: 9.6s (59.9x, -----) ca: 8.5s (53.0x, -----) dr: 7.8s (48.7x, -----) ma: 2.5s (15.6x, -----) tinycc valgrind-old:0.16s no: 1.4s ( 8.8x, 4.1%) me: 9.0s (56.2x, 0.2%) ca:11.0s (68.7x, 2.7%) he:10.2s (63.8x, -6.5%) ca: 8.3s (51.7x, 2.4%) dr: 7.9s (49.4x, -1.4%) ma: 2.5s (15.8x, -1.6%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 37m19.016s user 36m17.988s sys 0m23.593s |
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From: Tom H. <to...@co...> - 2014-08-11 03:14:22
|
valgrind revision: 14256 VEX revision: 2916 C compiler: gcc (GCC) 4.7.2 20120921 (Red Hat 4.7.2-2) GDB: GNU gdb (GDB) Fedora (7.4.50.20120120-54.fc17) Assembler: GNU assembler version 2.22.52.0.1-10.fc17 20120131 C library: GNU C Library stable release version 2.15 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 17 (Beefy Miracle) Nightly build on bristol ( x86_64, Fedora 17 (Beefy Miracle) ) Started at 2014-08-11 02:51:05 BST Ended at 2014-08-11 04:14:06 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 6 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcmain_pic (stderr) memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 2.0s (18.1x, -----) me: 4.2s (38.6x, -----) ca:17.0s (154.5x, -----) he: 2.2s (20.4x, -----) ca: 5.2s (46.9x, -----) dr: 2.5s (22.5x, -----) ma: 2.3s (20.8x, -----) bigcode1 valgrind-old:0.11s no: 2.1s (19.2x, -6.0%) me: 4.0s (36.6x, 5.2%) ca:18.0s (163.7x, -5.9%) he: 2.5s (22.4x, -9.8%) ca: 5.1s (46.2x, 1.6%) dr: 2.6s (24.1x, -6.9%) ma: 2.6s (23.5x,-12.7%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 5.2s (47.5x, -----) me:10.0s (90.5x, -----) ca:27.8s (252.6x, -----) he: 4.9s (44.2x, -----) ca: 7.3s (66.0x, -----) dr: 4.8s (43.4x, -----) ma: 4.6s (41.7x, -----) bigcode2 valgrind-old:0.11s no: 4.4s (39.9x, 15.9%) me: 9.1s (82.9x, 8.4%) ca:31.9s (290.3x,-14.9%) he: 5.6s (50.5x,-14.4%) ca: 7.9s (71.8x, -8.8%) dr: 4.8s (43.9x, -1.3%) ma: 4.9s (44.2x, -5.9%) -- bz2 -- bz2 valgrind-new:0.54s no: 2.1s ( 3.9x, -----) me: 7.2s (13.4x, -----) ca:13.3s (24.6x, -----) he: 9.5s (17.6x, -----) ca:14.2s (26.4x, -----) dr:13.2s (24.5x, -----) ma: 2.6s ( 4.8x, -----) bz2 valgrind-old:0.54s no: 2.7s ( 4.9x,-26.7%) me: 6.8s (12.6x, 6.1%) ca:16.2s (30.1x,-22.5%) he:10.9s (20.1x,-14.6%) ca:12.7s (23.5x, 10.9%) dr:12.2s (22.6x, 8.0%) ma: 2.4s ( 4.4x, 7.4%) -- fbench -- fbench valgrind-new:0.23s no: 1.1s ( 4.8x, -----) me: 3.9s (17.0x, -----) ca: 6.9s (29.8x, -----) he: 3.0s (12.9x, -----) ca: 3.8s (16.6x, -----) dr: 2.5s (10.7x, -----) ma: 1.1s ( 4.7x, -----) fbench valgrind-old:0.23s no: 1.0s ( 4.5x, 6.4%) me: 3.6s (15.5x, 9.0%) ca: 5.5s (23.9x, 19.8%) he: 3.3s (14.2x, -9.8%) ca: 3.7s (16.1x, 2.9%) dr: 2.4s (10.5x, 1.6%) ma: 1.1s ( 4.7x, 0.0%) -- ffbench -- ffbench valgrind-new:0.26s no: 1.1s ( 4.4x, -----) me: 3.3s (12.7x, -----) ca: 2.2s ( 8.5x, -----) he: 7.5s (29.0x, -----) ca: 4.2s (16.3x, -----) dr: 3.3s (12.8x, -----) ma: 0.9s ( 3.5x, -----) ffbench valgrind-old:0.26s no: 0.9s ( 3.7x, 17.4%) me: 2.9s (11.0x, 13.4%) ca: 1.9s ( 7.2x, 14.5%) he: 7.7s (29.6x, -1.9%) ca: 4.3s (16.6x, -1.6%) dr: 3.6s (13.8x, -7.5%) ma: 0.9s ( 3.5x, -1.1%) -- heap -- heap valgrind-new:0.08s no: 0.7s ( 8.5x, -----) me: 5.6s (70.4x, -----) ca: 6.2s (77.4x, -----) he: 7.0s (87.4x, -----) ca: 3.3s (40.8x, -----) dr: 5.1s (63.4x, -----) ma: 5.3s (66.1x, -----) heap valgrind-old:0.08s no: 0.6s ( 7.9x, 7.4%) me: 5.4s (67.9x, 3.6%) ca: 6.3s (79.4x, -2.6%) he: 7.2s (90.2x, -3.3%) ca: 3.7s (45.8x,-12.3%) dr: 5.0s (62.5x, 1.4%) ma: 5.1s (63.4x, 4.2%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.14s no: 0.7s ( 5.0x, -----) me: 8.9s (63.7x, -----) ca: 6.7s (47.6x, -----) he: 8.0s (57.1x, -----) ca: 4.0s (28.8x, -----) dr: 4.9s (34.9x, -----) ma: 5.4s (38.4x, -----) heap_pdb4 valgrind-old:0.14s no: 0.7s ( 5.0x, 0.0%) me: 9.0s (64.2x, -0.8%) ca: 7.2s (51.5x, -8.3%) he: 8.0s (57.1x, 0.1%) ca: 3.6s (26.0x, 9.7%) dr: 4.8s (34.4x, 1.6%) ma: 5.4s (38.3x, 0.2%) -- many-loss-records -- many-loss-records valgrind-new:0.02s no: 0.2s (12.5x, -----) me: 1.3s (64.5x, -----) ca: 1.0s (51.5x, -----) he: 1.1s (56.0x, -----) ca: 0.7s (32.5x, -----) dr: 1.0s (49.5x, -----) ma: 1.0s (51.5x, -----) many-loss-records valgrind-old:0.02s no: 0.2s (12.5x, 0.0%) me: 1.3s (65.5x, -1.6%) ca: 1.0s (51.0x, 1.0%) he: 1.1s (56.0x, 0.0%) ca: 0.7s (32.5x, 0.0%) dr: 1.0s (49.5x, 0.0%) ma: 1.0s (52.0x, -1.0%) -- many-xpts -- many-xpts valgrind-new:0.03s no: 0.3s (10.3x, -----) me: 1.8s (58.7x, -----) ca: 2.6s (87.3x, -----) he: 2.2s (74.7x, -----) ca: 0.9s (30.0x, -----) dr: 1.4s (46.7x, -----) ma: 1.6s (53.7x, -----) many-xpts valgrind-old:0.03s no: 0.3s (10.3x, 0.0%) me: 1.8s (59.3x, -1.1%) ca: 2.6s (87.0x, 0.4%) he: 2.2s (74.3x, 0.4%) ca: 0.9s (30.3x, -1.1%) dr: 1.4s (47.3x, -1.4%) ma: 1.6s (54.0x, -0.6%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (14.0x, -----) me: 2.1s (103.5x, -----) ca: 1.7s (86.5x, -----) he: 6.9s (345.5x, -----) ca: 0.9s (43.5x, -----) dr: 0.8s (42.0x, -----) ma: 0.3s (15.0x, -----) sarp valgrind-old:0.02s no: 0.3s (14.0x, 0.0%) me: 2.1s (103.5x, 0.0%) ca: 1.7s (87.0x, -0.6%) he: 7.1s (353.5x, -2.3%) ca: 0.9s (43.0x, 1.1%) dr: 0.8s (41.5x, 1.2%) ma: 0.3s (15.0x, 0.0%) -- tinycc -- tinycc valgrind-new:0.16s no: 1.4s ( 8.7x, -----) me: 8.5s (53.1x, -----) ca:10.8s (67.3x, -----) he:10.8s (67.3x, -----) ca: 7.8s (48.8x, -----) dr: 7.7s (48.3x, -----) ma: 2.5s (15.3x, -----) tinycc valgrind-old:0.16s no: 1.4s ( 8.6x, 0.7%) me: 8.6s (54.0x, -1.8%) ca:10.8s (67.8x, -0.6%) he:10.2s (63.8x, 5.2%) ca: 7.9s (49.2x, -0.9%) dr: 7.6s (47.6x, 1.4%) ma: 2.5s (15.6x, -2.0%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 39m39.925s user 38m30.565s sys 0m24.892s |
|
From: Tom H. <to...@co...> - 2014-08-11 03:04:47
|
valgrind revision: 14256 VEX revision: 2916 C compiler: gcc (GCC) 4.7.2 20121109 (Red Hat 4.7.2-8) GDB: GNU gdb (GDB) Fedora 7.5.1-42.fc18 Assembler: GNU assembler version 2.23.51.0.1-10.fc18 20120806 C library: GNU C Library stable release version 2.16 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 18 (Spherical Cow) Nightly build on bristol ( x86_64, Fedora 18 (Spherical Cow) ) Started at 2014-08-11 02:41:13 BST Ended at 2014-08-11 04:04:31 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 3 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.13s no: 2.0s (15.3x, -----) me: 3.7s (28.4x, -----) ca:14.7s (113.4x, -----) he: 2.6s (20.2x, -----) ca: 5.0s (38.4x, -----) dr: 2.4s (18.2x, -----) ma: 2.2s (16.9x, -----) bigcode1 valgrind-old:0.13s no: 2.0s (15.3x, 0.0%) me: 4.2s (32.2x,-13.3%) ca:19.7s (151.8x,-33.9%) he: 2.4s (18.3x, 9.5%) ca: 4.2s (31.9x, 16.8%) dr: 2.1s (16.3x, 10.5%) ma: 2.3s (17.8x, -5.0%) -- bigcode2 -- bigcode2 valgrind-new:0.13s no: 4.5s (34.8x, -----) me:10.2s (78.2x, -----) ca:33.4s (256.9x, -----) he: 5.9s (45.2x, -----) ca: 7.4s (56.7x, -----) dr: 5.6s (42.9x, -----) ma: 5.8s (44.9x, -----) bigcode2 valgrind-old:0.13s no: 5.0s (38.8x,-11.3%) me:10.0s (77.2x, 1.4%) ca:33.6s (258.2x, -0.5%) he: 5.7s (43.9x, 2.7%) ca: 8.9s (68.2x,-20.4%) dr: 5.8s (44.8x, -4.5%) ma: 5.1s (39.2x, 12.8%) -- bz2 -- bz2 valgrind-new:0.56s no: 2.1s ( 3.8x, -----) me: 6.7s (12.0x, -----) ca:14.8s (26.4x, -----) he:11.3s (20.2x, -----) ca:14.6s (26.0x, -----) dr:16.4s (29.2x, -----) ma: 2.8s ( 5.0x, -----) bz2 valgrind-old:0.56s no: 2.8s ( 5.0x,-29.9%) me: 8.9s (16.0x,-33.2%) ca:16.8s (30.0x,-13.7%) he:11.6s (20.7x, -2.4%) ca:13.9s (24.8x, 4.6%) dr:12.4s (22.1x, 24.4%) ma: 2.4s ( 4.2x, 16.0%) -- fbench -- fbench valgrind-new:0.24s no: 1.2s ( 4.8x, -----) me: 3.7s (15.5x, -----) ca: 6.0s (24.8x, -----) he: 2.7s (11.2x, -----) ca: 3.2s (13.4x, -----) dr: 2.4s (10.0x, -----) ma: 1.1s ( 4.5x, -----) fbench valgrind-old:0.24s no: 1.0s ( 4.3x, 10.3%) me: 3.5s (14.5x, 6.5%) ca: 6.4s (26.5x, -6.9%) he: 3.1s (12.9x,-15.2%) ca: 3.4s (14.3x, -6.8%) dr: 2.8s (11.6x,-16.2%) ma: 1.2s ( 5.0x,-10.2%) -- ffbench -- ffbench valgrind-new:0.25s no: 1.1s ( 4.4x, -----) me: 3.2s (13.0x, -----) ca: 2.4s ( 9.6x, -----) he: 9.3s (37.2x, -----) ca: 4.5s (18.0x, -----) dr: 3.6s (14.3x, -----) ma: 1.0s ( 4.1x, -----) ffbench valgrind-old:0.25s no: 1.0s ( 3.9x, 10.1%) me: 3.0s (12.1x, 6.5%) ca: 2.2s ( 8.7x, 9.6%) he: 8.2s (32.9x, 11.5%) ca: 5.0s (19.8x, -9.8%) dr: 4.5s (18.0x,-26.3%) ma: 1.1s ( 4.6x,-11.7%) -- heap -- heap valgrind-new:0.09s no: 0.8s ( 9.2x, -----) me: 5.5s (61.7x, -----) ca: 6.1s (68.1x, -----) he: 9.2s (101.9x, -----) ca: 3.2s (36.0x, -----) dr: 4.8s (53.0x, -----) ma: 5.2s (57.3x, -----) heap valgrind-old:0.09s no: 0.7s ( 7.8x, 15.7%) me: 6.2s (68.3x,-10.8%) ca: 6.7s (74.6x, -9.5%) he: 7.3s (81.6x, 20.0%) ca: 3.6s (40.4x,-12.3%) dr: 6.2s (68.6x,-29.4%) ma: 6.5s (71.8x,-25.2%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.11s no: 0.7s ( 6.5x, -----) me:10.4s (94.9x, -----) ca: 7.8s (70.8x, -----) he:11.6s (105.5x, -----) ca: 4.8s (43.9x, -----) dr: 5.3s (48.4x, -----) ma: 6.0s (54.8x, -----) heap_pdb4 valgrind-old:0.11s no: 0.8s ( 6.8x, -5.6%) me: 9.8s (89.1x, 6.1%) ca: 8.4s (76.5x, -8.1%) he: 9.5s (86.3x, 18.3%) ca: 4.3s (39.3x, 10.6%) dr: 5.2s (46.9x, 3.0%) ma: 5.1s (46.0x, 16.1%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.3s (27.0x, -----) me: 1.4s (142.0x, -----) ca: 1.1s (108.0x, -----) he: 1.4s (135.0x, -----) ca: 0.7s (73.0x, -----) dr: 1.1s (115.0x, -----) ma: 1.1s (111.0x, -----) many-loss-records valgrind-old:0.01s no: 0.3s (26.0x, 3.7%) me: 1.3s (132.0x, 7.0%) ca: 1.1s (112.0x, -3.7%) he: 1.1s (115.0x, 14.8%) ca: 0.7s (70.0x, 4.1%) dr: 1.3s (126.0x, -9.6%) ma: 1.2s (118.0x, -6.3%) -- many-xpts -- many-xpts valgrind-new:0.05s no: 0.4s ( 8.8x, -----) me: 1.9s (37.2x, -----) ca: 2.8s (56.4x, -----) he: 2.4s (47.2x, -----) ca: 1.0s (19.8x, -----) dr: 1.4s (28.8x, -----) ma: 1.6s (31.2x, -----) many-xpts valgrind-old:0.05s no: 0.3s ( 6.4x, 27.3%) me: 1.9s (39.0x, -4.8%) ca: 2.8s (55.4x, 1.8%) he: 2.2s (44.6x, 5.5%) ca: 0.9s (18.8x, 5.1%) dr: 1.5s (29.2x, -1.4%) ma: 1.6s (31.8x, -1.9%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (14.0x, -----) me: 2.3s (117.0x, -----) ca: 1.8s (90.0x, -----) he: 7.8s (389.5x, -----) ca: 1.0s (50.0x, -----) dr: 0.9s (44.0x, -----) ma: 0.3s (15.5x, -----) sarp valgrind-old:0.02s no: 0.3s (14.5x, -3.6%) me: 2.4s (121.5x, -3.8%) ca: 1.8s (91.5x, -1.7%) he: 7.8s (392.5x, -0.8%) ca: 0.9s (45.0x, 10.0%) dr: 0.9s (43.0x, 2.3%) ma: 0.3s (15.0x, 3.2%) -- tinycc -- tinycc valgrind-new:0.27s no: 1.8s ( 6.8x, -----) me: 8.7s (32.2x, -----) ca:13.0s (48.2x, -----) he:11.2s (41.6x, -----) ca: 9.1s (33.9x, -----) dr: 8.6s (31.7x, -----) ma: 2.6s ( 9.5x, -----) tinycc valgrind-old:0.27s no: 1.6s ( 5.8x, 14.7%) me:11.2s (41.5x,-28.9%) ca:11.7s (43.5x, 9.8%) he:10.7s (39.6x, 4.9%) ca: 8.6s (31.7x, 6.2%) dr: 8.9s (33.1x, -4.7%) ma: 2.5s ( 9.4x, 0.8%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 43m47.790s user 42m24.266s sys 0m27.054s |
|
From: Tom H. <to...@co...> - 2014-08-11 02:55:41
|
valgrind revision: 14256 VEX revision: 2916 C compiler: gcc (GCC) 4.8.3 20140624 (Red Hat 4.8.3-1) GDB: GNU gdb (GDB) Fedora 7.6.1-46.fc19 Assembler: GNU assembler version 2.23.52.0.1-9.fc19 20130226 C library: GNU C Library (GNU libc) stable release version 2.17 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 19 (Schrödingerâs Cat) Nightly build on bristol ( x86_64, Fedora 19 (Schrödingerâs Cat) ) Started at 2014-08-11 02:31:32 BST Ended at 2014-08-11 03:55:23 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/hackedbz2 (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.11s no: 1.7s (15.5x, -----) me: 3.2s (29.1x, -----) ca:14.5s (132.1x, -----) he: 2.1s (18.9x, -----) ca: 4.5s (40.8x, -----) dr: 2.3s (20.5x, -----) ma: 2.4s (21.5x, -----) bigcode1 valgrind-old:0.11s no: 1.9s (17.6x,-14.1%) me: 3.4s (31.3x, -7.5%) ca:16.9s (153.3x,-16.0%) he: 2.1s (19.2x, -1.4%) ca: 4.2s (38.3x, 6.2%) dr: 1.9s (17.3x, 15.9%) ma: 2.4s (21.5x, 0.4%) -- bigcode2 -- bigcode2 valgrind-new:0.17s no: 4.0s (23.8x, -----) me: 9.1s (53.4x, -----) ca:28.3s (166.7x, -----) he: 4.9s (28.8x, -----) ca: 7.9s (46.2x, -----) dr: 4.7s (27.4x, -----) ma: 4.4s (26.0x, -----) bigcode2 valgrind-old:0.17s no: 4.0s (23.4x, 1.7%) me: 8.2s (48.3x, 9.5%) ca:29.2s (171.8x, -3.1%) he: 5.5s (32.5x,-13.1%) ca: 9.0s (53.1x,-14.9%) dr: 5.4s (31.9x,-16.8%) ma: 6.1s (35.6x,-37.1%) -- bz2 -- bz2 valgrind-new:0.57s no: 2.5s ( 4.4x, -----) me: 9.0s (15.9x, -----) ca:19.2s (33.8x, -----) he:11.5s (20.2x, -----) ca:13.8s (24.3x, -----) dr:14.5s (25.4x, -----) ma: 2.4s ( 4.3x, -----) bz2 valgrind-old:0.57s no: 2.8s ( 4.8x, -8.7%) me: 8.1s (14.3x, 10.1%) ca:15.9s (27.9x, 17.5%) he:12.7s (22.3x,-10.4%) ca:14.5s (25.5x, -4.8%) dr:16.6s (29.2x,-15.0%) ma: 2.3s ( 4.0x, 7.4%) -- fbench -- fbench valgrind-new:0.26s no: 1.2s ( 4.5x, -----) me: 4.1s (15.7x, -----) ca: 6.8s (26.3x, -----) he: 3.4s (12.9x, -----) ca: 4.6s (17.8x, -----) dr: 3.6s (13.7x, -----) ma: 1.3s ( 5.0x, -----) fbench valgrind-old:0.26s no: 1.2s ( 4.5x, 0.9%) me: 4.3s (16.4x, -4.7%) ca: 6.1s (23.3x, 11.3%) he: 2.8s (10.6x, 17.6%) ca: 4.0s (15.5x, 12.8%) dr: 2.5s ( 9.5x, 30.5%) ma: 1.1s ( 4.3x, 13.1%) -- ffbench -- ffbench valgrind-new:0.30s no: 1.1s ( 3.8x, -----) me: 3.0s (10.1x, -----) ca: 2.1s ( 6.9x, -----) he: 7.7s (25.5x, -----) ca: 6.0s (20.0x, -----) dr: 4.7s (15.6x, -----) ma: 1.2s ( 3.9x, -----) ffbench valgrind-old:0.30s no: 1.2s ( 3.9x, -2.7%) me: 3.3s (11.1x,-10.2%) ca: 2.1s ( 7.1x, -3.9%) he: 9.0s (30.1x,-18.0%) ca: 6.2s (20.5x, -2.5%) dr: 4.1s (13.6x, 12.6%) ma: 1.0s ( 3.4x, 12.1%) -- heap -- heap valgrind-new:0.11s no: 0.8s ( 7.5x, -----) me: 7.0s (63.6x, -----) ca: 8.3s (75.2x, -----) he: 9.1s (82.9x, -----) ca: 4.4s (39.7x, -----) dr: 5.3s (48.2x, -----) ma: 6.6s (59.9x, -----) heap valgrind-old:0.11s no: 0.9s ( 7.9x, -6.1%) me: 7.5s (68.3x, -7.3%) ca: 7.3s (66.3x, 11.9%) he: 7.6s (69.4x, 16.3%) ca: 3.2s (29.2x, 26.5%) dr: 4.8s (43.3x, 10.2%) ma: 5.5s (49.5x, 17.3%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.11s no: 0.8s ( 7.5x, -----) me: 9.1s (82.9x, -----) ca: 6.9s (62.5x, -----) he: 9.1s (83.0x, -----) ca: 4.3s (39.5x, -----) dr: 6.1s (55.5x, -----) ma: 6.3s (57.5x, -----) heap_pdb4 valgrind-old:0.11s no: 0.8s ( 6.9x, 8.4%) me:10.2s (92.3x,-11.3%) ca: 7.2s (65.9x, -5.4%) he: 9.3s (84.6x, -2.0%) ca: 4.1s (37.5x, 4.8%) dr: 6.1s (55.8x, -0.5%) ma: 6.3s (57.7x, -0.3%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.3s (35.0x, -----) me: 1.6s (163.0x, -----) ca: 1.3s (134.0x, -----) he: 1.6s (156.0x, -----) ca: 0.7s (69.0x, -----) dr: 1.0s (100.0x, -----) ma: 1.1s (105.0x, -----) many-loss-records valgrind-old:0.01s no: 0.3s (26.0x, 25.7%) me: 1.6s (156.0x, 4.3%) ca: 1.1s (106.0x, 20.9%) he: 1.1s (113.0x, 27.6%) ca: 0.7s (68.0x, 1.4%) dr: 1.1s (108.0x, -8.0%) ma: 1.2s (116.0x,-10.5%) -- many-xpts -- many-xpts valgrind-new:0.04s no: 0.4s ( 9.2x, -----) me: 1.6s (39.7x, -----) ca: 2.8s (69.0x, -----) he: 2.1s (52.7x, -----) ca: 0.9s (23.8x, -----) dr: 1.4s (36.0x, -----) ma: 1.9s (48.2x, -----) many-xpts valgrind-old:0.04s no: 0.3s ( 8.0x, 13.5%) me: 1.5s (36.5x, 8.2%) ca: 2.6s (64.5x, 6.5%) he: 2.4s (61.0x,-15.6%) ca: 1.0s (25.2x, -6.3%) dr: 1.6s (39.0x, -8.3%) ma: 1.6s (40.0x, 17.1%) -- sarp -- sarp valgrind-new:0.02s no: 0.3s (15.0x, -----) me: 2.4s (120.5x, -----) ca: 1.7s (87.0x, -----) he: 7.1s (355.0x, -----) ca: 1.0s (50.5x, -----) dr: 0.9s (46.5x, -----) ma: 0.3s (16.5x, -----) sarp valgrind-old:0.02s no: 0.3s (15.0x, 0.0%) me: 2.2s (110.5x, 8.3%) ca: 2.4s (117.5x,-35.1%) he: 7.1s (354.0x, 0.3%) ca: 1.0s (51.0x, -1.0%) dr: 1.1s (54.5x,-17.2%) ma: 0.3s (16.0x, 3.0%) -- tinycc -- tinycc valgrind-new:0.17s no: 1.6s ( 9.2x, -----) me: 9.8s (57.5x, -----) ca:12.7s (74.6x, -----) he:11.3s (66.6x, -----) ca: 9.3s (54.5x, -----) dr: 9.0s (53.1x, -----) ma: 2.5s (14.8x, -----) tinycc valgrind-old:0.17s no: 1.5s ( 9.0x, 2.5%) me: 9.2s (54.1x, 5.9%) ca:13.8s (81.2x, -8.9%) he:11.6s (68.5x, -2.8%) ca: 9.2s (54.0x, 0.9%) dr:10.7s (62.9x,-18.6%) ma: 2.9s (17.2x,-16.3%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 43m10.370s user 41m45.055s sys 0m28.342s |
|
From: Tom H. <to...@co...> - 2014-08-11 02:39:33
|
valgrind revision: 14256 VEX revision: 2916 C compiler: gcc (GCC) 4.8.3 20140624 (Red Hat 4.8.3-1) GDB: GNU gdb (GDB) Fedora 7.7.1-17.fc20 Assembler: GNU assembler version 2.23.2 C library: GNU C Library (GNU libc) stable release version 2.18 uname -mrs: Linux 3.15.3-200.fc20.x86_64 x86_64 Vendor version: Fedora release 20 (Heisenbug) Nightly build on bristol ( x86_64, Fedora 20 ) Started at 2014-08-11 02:21:33 BST Ended at 2014-08-11 03:39:09 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 5 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/thread_alloca (stderr) memcheck/tests/vbit-test/vbit-test (stderr) helgrind/tests/hg05_race2 (stderr) exp-sgcheck/tests/hackedbz2 (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 693 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/hackedbz2 (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short 2014-08-11 02:39:56.187838319 +0100 --- new.short 2014-08-11 02:58:45.493220647 +0100 *************** *** 8,12 **** ! == 693 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) exp-sgcheck/tests/hackedbz2 (stderr) --- 8,14 ---- ! == 693 tests, 5 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) + memcheck/tests/thread_alloca (stderr) memcheck/tests/vbit-test/vbit-test (stderr) + helgrind/tests/hg05_race2 (stderr) exp-sgcheck/tests/hackedbz2 (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.10s no: 1.6s (16.4x, -----) me: 3.1s (31.2x, -----) ca:13.3s (132.7x, -----) he: 1.9s (18.9x, -----) ca: 3.8s (37.7x, -----) dr: 1.9s (18.6x, -----) ma: 1.9s (19.1x, -----) bigcode1 valgrind-old:0.10s no: 1.6s (16.5x, -0.6%) me: 3.2s (31.7x, -1.6%) ca:13.2s (131.6x, 0.8%) he: 1.9s (19.1x, -1.1%) ca: 3.8s (37.7x, 0.0%) dr: 1.9s (18.5x, 0.5%) ma: 1.9s (19.2x, -0.5%) -- bigcode2 -- bigcode2 valgrind-new:0.11s no: 3.9s (35.2x, -----) me: 8.2s (74.5x, -----) ca:25.5s (231.9x, -----) he: 4.8s (43.2x, -----) ca: 7.1s (64.8x, -----) dr: 4.4s (40.4x, -----) ma: 4.4s (40.4x, -----) bigcode2 valgrind-old:0.11s no: 3.9s (35.2x, 0.0%) me: 8.2s (74.1x, 0.6%) ca:26.7s (242.8x, -4.7%) he: 4.7s (42.8x, 0.8%) ca: 7.5s (67.9x, -4.8%) dr: 4.7s (42.4x, -5.0%) ma: 4.5s (40.8x, -1.1%) -- bz2 -- bz2 valgrind-new:0.50s no: 2.1s ( 4.1x, -----) me: 6.3s (12.5x, -----) ca:13.2s (26.4x, -----) he: 9.0s (18.1x, -----) ca:11.4s (22.7x, -----) dr:12.0s (24.1x, -----) ma: 2.1s ( 4.2x, -----) bz2 valgrind-old:0.50s no: 2.1s ( 4.1x, 0.5%) me: 6.1s (12.2x, 2.7%) ca:12.9s (25.9x, 1.8%) he: 9.0s (17.9x, 0.9%) ca:11.4s (22.8x, -0.4%) dr:13.6s (27.2x,-13.1%) ma: 2.8s ( 5.6x,-34.0%) -- fbench -- fbench valgrind-new:0.23s no: 1.0s ( 4.4x, -----) me: 3.4s (14.9x, -----) ca: 6.3s (27.3x, -----) he: 3.0s (12.8x, -----) ca: 3.3s (14.2x, -----) dr: 2.7s (11.7x, -----) ma: 1.1s ( 4.9x, -----) fbench valgrind-old:0.23s no: 1.3s ( 5.5x,-24.8%) me: 3.7s (16.1x, -8.5%) ca: 6.3s (27.6x, -1.0%) he: 3.0s (13.1x, -2.0%) ca: 3.5s (15.2x, -7.0%) dr: 3.1s (13.7x,-17.5%) ma: 1.2s ( 5.1x, -3.5%) -- ffbench -- ffbench valgrind-new:0.25s no: 1.0s ( 4.2x, -----) me: 3.0s (12.2x, -----) ca: 2.0s ( 8.0x, -----) he: 6.8s (27.2x, -----) ca: 4.7s (18.7x, -----) dr: 3.3s (13.3x, -----) ma: 0.9s ( 3.7x, -----) ffbench valgrind-old:0.25s no: 1.0s ( 3.9x, 6.7%) me: 3.2s (13.0x, -6.2%) ca: 2.2s ( 8.8x,-10.1%) he: 7.2s (28.6x, -5.4%) ca: 4.8s (19.4x, -3.4%) dr: 3.5s (14.2x, -6.6%) ma: 0.9s ( 3.6x, 2.2%) -- heap -- heap valgrind-new:0.14s no: 0.7s ( 4.6x, -----) me: 4.9s (34.7x, -----) ca: 6.2s (44.1x, -----) he: 6.8s (48.6x, -----) ca: 4.0s (28.6x, -----) dr: 5.3s (38.2x, -----) ma: 5.2s (37.2x, -----) heap valgrind-old:0.14s no: 0.7s ( 5.2x,-12.3%) me: 5.8s (41.6x,-20.0%) ca: 6.7s (47.9x, -8.8%) he: 9.2s (65.8x,-35.2%) ca: 4.3s (30.7x, -7.5%) dr: 5.6s (39.9x, -4.3%) ma: 6.6s (47.1x,-26.5%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.12s no: 0.9s ( 7.8x, -----) me:12.0s (100.1x, -----) ca: 8.8s (73.2x, -----) he: 9.8s (82.0x, -----) ca: 4.3s (35.6x, -----) dr: 6.2s (51.6x, -----) ma: 6.0s (50.3x, -----) heap_pdb4 valgrind-old:0.12s no: 0.8s ( 6.7x, 14.9%) me:10.4s (86.7x, 13.4%) ca: 8.5s (70.5x, 3.8%) he:10.5s (87.2x, -6.3%) ca: 5.0s (41.6x,-16.9%) dr: 4.9s (41.1x, 20.4%) ma: 6.5s (54.6x, -8.4%) -- many-loss-records -- many-loss-records valgrind-new:0.01s no: 0.3s (29.0x, -----) me: 1.4s (143.0x, -----) ca: 1.2s (120.0x, -----) he: 1.4s (140.0x, -----) ca: 0.9s (93.0x, -----) dr: 1.3s (134.0x, -----) ma: 1.5s (148.0x, -----) many-loss-records valgrind-old:0.01s no: 0.3s (33.0x,-13.8%) me: 1.7s (171.0x,-19.6%) ca: 1.3s (130.0x, -8.3%) he: 1.2s (121.0x, 13.6%) ca: 0.7s (73.0x, 21.5%) dr: 1.2s (116.0x, 13.4%) ma: 1.2s (120.0x, 18.9%) -- many-xpts -- many-xpts valgrind-new:0.03s no: 0.3s (11.7x, -----) me: 1.9s (64.7x, -----) ca: 3.2s (107.3x, -----) he: 2.7s (89.3x, -----) ca: 1.3s (42.3x, -----) dr: 1.9s (63.3x, -----) ma: 2.0s (68.3x, -----) many-xpts valgrind-old:0.03s no: 0.4s (13.7x,-17.1%) me: 1.7s (55.7x, 13.9%) ca: 3.3s (109.0x, -1.6%) he: 2.4s (79.3x, 11.2%) ca: 1.1s (35.0x, 17.3%) dr: 1.8s (60.7x, 4.2%) ma: 1.8s (58.7x, 14.1%) -- sarp -- sarp valgrind-new:0.03s no: 0.3s (11.0x, -----) me: 2.7s (90.3x, -----) ca: 2.3s (78.0x, -----) he: 7.5s (250.7x, -----) ca: 1.0s (34.3x, -----) dr: 1.2s (40.3x, -----) ma: 0.5s (15.0x, -----) sarp valgrind-old:0.03s no: 0.4s (12.3x,-12.1%) me: 2.7s (91.3x, -1.1%) ca: 2.4s (79.7x, -2.1%) he: 7.8s (260.3x, -3.9%) ca: 1.1s (37.0x, -7.8%) dr: 1.0s (32.0x, 20.7%) ma: 0.4s (12.7x, 15.6%) -- tinycc -- tinycc valgrind-new:0.17s no: 1.7s ( 9.8x, -----) me: 8.0s (47.3x, -----) ca:12.5s (73.6x, -----) he:13.7s (80.5x, -----) ca:10.3s (60.5x, -----) dr: 9.8s (57.7x, -----) ma: 3.0s (17.6x, -----) tinycc valgrind-old:0.17s no: 1.5s ( 8.6x, 11.4%) me: 9.7s (57.1x,-20.8%) ca:14.4s (84.7x,-15.0%) he:12.7s (74.5x, 7.5%) ca:10.6s (62.4x, -3.2%) dr: 9.8s (57.9x, -0.4%) ma: 3.1s (18.1x, -2.3%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 40m24.267s user 38m55.344s sys 0m27.735s |