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From: <sv...@va...> - 2014-05-03 21:29:27
|
Author: sewardj
Date: Sat May 3 21:29:18 2014
New Revision: 13933
Log:
Update aarch64 fixes.
Modified:
trunk/NEWS
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Sat May 3 21:29:18 2014
@@ -91,6 +91,8 @@
332037 Valgrind cannot handle Thumb "add pc, reg"
332055 drd asserts on platforms with VG_STACK_REDZONE_SZB == 0 and
consistency checks enabled
+333230 AAarch64 missing instruction encodings: dc, ic, dsb.
+333228 AAarch64 Missing instruction encoding: mrs %[reg], ctr_el0
n-i-bz Fix KVM_CREATE_IRQCHIP ioctl handling
n-i-bz s390x: Fix memory corruption for multithreaded applications
n-i-bz vex arm->IR: allow PC as basereg in some LDRD cases
|
|
From: <sv...@va...> - 2014-05-03 21:28:07
|
Author: sewardj
Date: Sat May 3 21:28:00 2014
New Revision: 13932
Log:
VG_(invalidate_icache) for ARM64: fix incorrect computation of cache
line sizes.
Modified:
trunk/coregrind/m_libcproc.c
Modified: trunk/coregrind/m_libcproc.c
==============================================================================
--- trunk/coregrind/m_libcproc.c (original)
+++ trunk/coregrind/m_libcproc.c Sat May 3 21:28:00 2014
@@ -820,8 +820,8 @@
const UInt icache_line_size_power_of_two =
(cache_type_register & kICacheLineSizeMask) >> kICacheLineSizeShift;
- const UInt dcache_line_size_ = 1 << dcache_line_size_power_of_two;
- const UInt icache_line_size_ = 1 << icache_line_size_power_of_two;
+ const UInt dcache_line_size_ = 4 * (1 << dcache_line_size_power_of_two);
+ const UInt icache_line_size_ = 4 * (1 << icache_line_size_power_of_two);
Addr start = (Addr)ptr;
// Sizes will be used to generate a mask big enough to cover a pointer.
|
Author: sewardj
Date: Sat May 3 21:22:55 2014
New Revision: 13931
Log:
ARM64: add support for cache management instructions (Valgrind side):
dc cvau, regX
ic ivau, regX
mrs regX, ctr_el0
Fixes #333228 and #333230.
Modified:
trunk/coregrind/m_libcproc.c
trunk/coregrind/m_machine.c
trunk/coregrind/m_scheduler/scheduler.c
trunk/coregrind/pub_core_libcproc.h
trunk/memcheck/mc_machine.c
Modified: trunk/coregrind/m_libcproc.c
==============================================================================
--- trunk/coregrind/m_libcproc.c (original)
+++ trunk/coregrind/m_libcproc.c Sat May 3 21:22:55 2014
@@ -893,6 +893,34 @@
}
+/* ---------------------------------------------------------------------
+ dcache flushing
+ ------------------------------------------------------------------ */
+
+void VG_(flush_dcache) ( void *ptr, SizeT nbytes )
+{
+ /* Currently this is only required on ARM64. */
+# if defined(VGA_arm64)
+ Addr startaddr = (Addr) ptr;
+ Addr endaddr = startaddr + nbytes;
+ Addr cls;
+ Addr addr;
+
+ ULong ctr_el0;
+ __asm__ __volatile__ ("mrs %0, ctr_el0" : "=r"(ctr_el0));
+ cls = 4 * (1ULL << (0xF & (ctr_el0 >> 16)));
+
+ /* Stay sane .. */
+ vg_assert(cls == 64);
+
+ startaddr &= ~(cls - 1);
+ for (addr = startaddr; addr < endaddr; addr += cls) {
+ __asm__ __volatile__("dc cvau, %0" : : "r" (addr));
+ }
+ __asm__ __volatile__("dsb ish");
+# endif
+}
+
/*--------------------------------------------------------------------*/
/*--- end ---*/
/*--------------------------------------------------------------------*/
Modified: trunk/coregrind/m_machine.c
==============================================================================
--- trunk/coregrind/m_machine.c (original)
+++ trunk/coregrind/m_machine.c Sat May 3 21:22:55 2014
@@ -1454,6 +1454,19 @@
VG_(machine_get_cache_info)(&vai);
+ /* 0 denotes 'not set'. The range of legitimate values here,
+ after being set that is, is 2 though 17 inclusive. */
+ vg_assert(vai.arm64_dMinLine_lg2_szB == 0);
+ vg_assert(vai.arm64_iMinLine_lg2_szB == 0);
+ ULong ctr_el0;
+ __asm__ __volatile__("mrs %0, ctr_el0" : "=r"(ctr_el0));
+ vai.arm64_dMinLine_lg2_szB = ((ctr_el0 >> 16) & 0xF) + 2;
+ vai.arm64_iMinLine_lg2_szB = ((ctr_el0 >> 0) & 0xF) + 2;
+ VG_(debugLog)(1, "machine", "ARM64: ctr_el0.dMinLine_szB = %d, "
+ "ctr_el0.iMinLine_szB = %d\n",
+ 1 << vai.arm64_dMinLine_lg2_szB,
+ 1 << vai.arm64_iMinLine_lg2_szB);
+
return True;
}
Modified: trunk/coregrind/m_scheduler/scheduler.c
==============================================================================
--- trunk/coregrind/m_scheduler/scheduler.c (original)
+++ trunk/coregrind/m_scheduler/scheduler.c Sat May 3 21:22:55 2014
@@ -1466,21 +1466,20 @@
VG_(umsg)(
"valgrind: Unrecognised instruction at address %#lx.\n", addr);
VG_(get_and_pp_StackTrace)(tid, VG_(clo_backtrace_size));
-#define M(a) VG_(umsg)(a "\n");
- M("Your program just tried to execute an instruction that Valgrind" );
- M("did not recognise. There are two possible reasons for this." );
- M("1. Your program has a bug and erroneously jumped to a non-code" );
- M(" location. If you are running Memcheck and you just saw a" );
- M(" warning about a bad jump, it's probably your program's fault.");
- M("2. The instruction is legitimate but Valgrind doesn't handle it,");
- M(" i.e. it's Valgrind's fault. If you think this is the case or");
- M(" you are not sure, please let us know and we'll try to fix it.");
- M("Either way, Valgrind will now raise a SIGILL signal which will" );
- M("probably kill your program." );
-#undef M
+# define M(a) VG_(umsg)(a "\n");
+ M("Your program just tried to execute an instruction that Valgrind" );
+ M("did not recognise. There are two possible reasons for this." );
+ M("1. Your program has a bug and erroneously jumped to a non-code" );
+ M(" location. If you are running Memcheck and you just saw a" );
+ M(" warning about a bad jump, it's probably your program's fault.");
+ M("2. The instruction is legitimate but Valgrind doesn't handle it,");
+ M(" i.e. it's Valgrind's fault. If you think this is the case or");
+ M(" you are not sure, please let us know and we'll try to fix it.");
+ M("Either way, Valgrind will now raise a SIGILL signal which will" );
+ M("probably kill your program." );
+# undef M
}
-
-#if defined(VGA_s390x)
+# if defined(VGA_s390x)
/* Now that the complaint is out we need to adjust the guest_IA. The
reason is that -- after raising the exception -- execution will
continue with the insn that follows the invalid insn. As the first
@@ -1492,12 +1491,12 @@
UChar byte = ((UChar *)addr)[0];
UInt insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
Addr next_insn_addr = addr + insn_length;
-
VG_(set_IP)(tid, next_insn_addr);
-#endif
+# endif
VG_(synth_sigill)(tid, addr);
break;
}
+
case VEX_TRC_JMP_TINVAL:
VG_(discard_translations)(
(Addr64)VG_(threads)[tid].arch.vex.guest_TISTART,
@@ -1508,6 +1507,14 @@
VG_(printf)("dump translations done.\n");
break;
+ case VEX_TRC_JMP_FLUSHDCACHE: {
+ void* start = (void*)VG_(threads)[tid].arch.vex.guest_TISTART;
+ SizeT len = VG_(threads)[tid].arch.vex.guest_TILEN;
+ VG_(debugLog)(2, "sched", "flush_dcache(%p, %lu)\n", start, len);
+ VG_(flush_dcache)(start, len);
+ break;
+ }
+
case VG_TRC_INVARIANT_FAILED:
/* This typically happens if, after running generated code,
it is detected that host CPU settings (eg, FPU/Vector
Modified: trunk/coregrind/pub_core_libcproc.h
==============================================================================
--- trunk/coregrind/pub_core_libcproc.h (original)
+++ trunk/coregrind/pub_core_libcproc.h Sat May 3 21:22:55 2014
@@ -87,6 +87,8 @@
// icache invalidation
extern void VG_(invalidate_icache) ( void *ptr, SizeT nbytes );
+// dcache flushing
+extern void VG_(flush_dcache) ( void *ptr, SizeT nbytes );
#endif // __PUB_CORE_LIBCPROC_H
Modified: trunk/memcheck/mc_machine.c
==============================================================================
--- trunk/memcheck/mc_machine.c (original)
+++ trunk/memcheck/mc_machine.c Sat May 3 21:22:55 2014
@@ -1055,6 +1055,9 @@
if (o == GOF(FPCR) && sz == 4) return -1; // untracked
if (o == GOF(FPSR) && sz == 4) return -1; // untracked
+ if (o == GOF(TISTART) && sz == 8) return -1; // untracked
+ if (o == GOF(TILEN) && sz == 8) return -1; // untracked
+
VG_(printf)("MC_(get_otrack_shadow_offset)(arm64)(off=%d,sz=%d)\n",
offset,szB);
tl_assert(0);
|
Author: sewardj
Date: Sat May 3 21:20:56 2014
New Revision: 2851
Log:
ARM64: add support for cache management instructions (VEX side):
dc cvau, regX
ic ivau, regX
mrs regX, ctr_el0
Fixes #333228 and #333230.
Modified:
trunk/priv/guest_arm64_toIR.c
trunk/priv/host_arm64_defs.c
trunk/priv/host_arm64_isel.c
trunk/priv/ir_defs.c
trunk/priv/main_main.c
trunk/pub/libvex.h
trunk/pub/libvex_ir.h
trunk/pub/libvex_trc_values.h
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Sat May 3 21:20:56 2014
@@ -4386,7 +4386,8 @@
/*------------------------------------------------------------*/
static
-Bool dis_ARM64_branch_etc(/*MB_OUT*/DisResult* dres, UInt insn)
+Bool dis_ARM64_branch_etc(/*MB_OUT*/DisResult* dres, UInt insn,
+ VexArchInfo* archinfo)
{
# define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin))
@@ -4628,8 +4629,93 @@
DIP("mrs %s, dczid_el0 (FAKED)\n", nameIReg64orZR(tt));
return True;
}
+ /* Cases for CTR_EL0
+ We just handle reads, and make up a value from the D and I line
+ sizes in the VexArchInfo we are given, and patch in the following
+ fields that the Foundation model gives ("natively"):
+ CWG = 0b0100, ERG = 0b0100, L1Ip = 0b11
+ D5 3B 00 001 Rt MRS rT, dczid_el0
+ */
+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD53B0020) {
+ UInt tt = INSN(4,0);
+ /* Need to generate a value from dMinLine_lg2_szB and
+ dMinLine_lg2_szB. The value in the register is in 32-bit
+ units, so need to subtract 2 from the values in the
+ VexArchInfo. We can assume that the values here are valid --
+ disInstr_ARM64 checks them -- so there's no need to deal with
+ out-of-range cases. */
+ vassert(archinfo->arm64_dMinLine_lg2_szB >= 2
+ && archinfo->arm64_dMinLine_lg2_szB <= 17
+ && archinfo->arm64_iMinLine_lg2_szB >= 2
+ && archinfo->arm64_iMinLine_lg2_szB <= 17);
+ UInt val
+ = 0x8440c000 | ((0xF & (archinfo->arm64_dMinLine_lg2_szB - 2)) << 16)
+ | ((0xF & (archinfo->arm64_iMinLine_lg2_szB - 2)) << 0);
+ putIReg64orZR(tt, mkU64(val));
+ DIP("mrs %s, ctr_el0\n", nameIReg64orZR(tt));
+ return True;
+ }
- /* ------------------ ISB, DSB ------------------ */
+ /* ------------------ IC_IVAU ------------------ */
+ /* D5 0B 75 001 Rt ic ivau, rT
+ */
+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD50B7520) {
+ /* We will always be provided with a valid iMinLine value. */
+ vassert(archinfo->arm64_iMinLine_lg2_szB >= 2
+ && archinfo->arm64_iMinLine_lg2_szB <= 17);
+ /* Round the requested address, in rT, down to the start of the
+ containing block. */
+ UInt tt = INSN(4,0);
+ ULong lineszB = 1ULL << archinfo->arm64_iMinLine_lg2_szB;
+ IRTemp addr = newTemp(Ity_I64);
+ assign( addr, binop( Iop_And64,
+ getIReg64orZR(tt),
+ mkU64(~(lineszB - 1))) );
+ /* Set the invalidation range, request exit-and-invalidate, with
+ continuation at the next instruction. */
+ stmt(IRStmt_Put(OFFB_TISTART, mkexpr(addr)));
+ stmt(IRStmt_Put(OFFB_TILEN, mkU64(lineszB)));
+ /* be paranoid ... */
+ stmt( IRStmt_MBE(Imbe_Fence) );
+ putPC(mkU64( guest_PC_curr_instr + 4 ));
+ dres->whatNext = Dis_StopHere;
+ dres->jk_StopHere = Ijk_TInval;
+ DIP("ic ivau, %s\n", nameIReg64orZR(tt));
+ return True;
+ }
+
+ /* ------------------ DC_CVAU ------------------ */
+ /* D5 0B 7B 001 Rt dc cvau, rT
+ */
+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD50B7B20) {
+ /* Exactly the same scheme as for IC IVAU, except we observe the
+ dMinLine size, and request an Ijk_InvalData instead of
+ Ijk_TInval. */
+ /* We will always be provided with a valid dMinLine value. */
+ vassert(archinfo->arm64_dMinLine_lg2_szB >= 2
+ && archinfo->arm64_dMinLine_lg2_szB <= 17);
+ /* Round the requested address, in rT, down to the start of the
+ containing block. */
+ UInt tt = INSN(4,0);
+ ULong lineszB = 1ULL << archinfo->arm64_dMinLine_lg2_szB;
+ IRTemp addr = newTemp(Ity_I64);
+ assign( addr, binop( Iop_And64,
+ getIReg64orZR(tt),
+ mkU64(~(lineszB - 1))) );
+ /* Set the flush range, request exit-and-flush, with
+ continuation at the next instruction. */
+ stmt(IRStmt_Put(OFFB_TISTART, mkexpr(addr)));
+ stmt(IRStmt_Put(OFFB_TILEN, mkU64(lineszB)));
+ /* be paranoid ... */
+ stmt( IRStmt_MBE(Imbe_Fence) );
+ putPC(mkU64( guest_PC_curr_instr + 4 ));
+ dres->whatNext = Dis_StopHere;
+ dres->jk_StopHere = Ijk_FlushDCache;
+ DIP("dc cvau, %s\n", nameIReg64orZR(tt));
+ return True;
+ }
+
+ /* ------------------ ISB, DMB, DSB ------------------ */
if (INSN(31,0) == 0xD5033FDF) {
stmt(IRStmt_MBE(Imbe_Fence));
DIP("isb\n");
@@ -4640,6 +4726,11 @@
DIP("dmb ish\n");
return True;
}
+ if (INSN(31,0) == 0xD5033B9F) {
+ stmt(IRStmt_MBE(Imbe_Fence));
+ DIP("dsb ish\n");
+ return True;
+ }
/* -------------------- NOP -------------------- */
if (INSN(31,0) == 0xD503201F) {
@@ -7161,7 +7252,7 @@
break;
case BITS4(1,0,1,0): case BITS4(1,0,1,1):
// Branch, exception generation and system instructions
- ok = dis_ARM64_branch_etc(dres, insn);
+ ok = dis_ARM64_branch_etc(dres, insn, archinfo);
break;
case BITS4(0,1,0,0): case BITS4(0,1,1,0):
case BITS4(1,1,0,0): case BITS4(1,1,1,0):
@@ -7229,6 +7320,11 @@
host_is_bigendian = host_bigendian_IN;
guest_PC_curr_instr = (Addr64)guest_IP;
+ /* Sanity checks */
+ /* (x::UInt - 2) <= 15 === x >= 2 && x <= 17 (I hope) */
+ vassert((archinfo->arm64_dMinLine_lg2_szB - 2) <= 15);
+ vassert((archinfo->arm64_iMinLine_lg2_szB - 2) <= 15);
+
/* Try to decode */
Bool ok = disInstr_ARM64_WRK( &dres,
resteerOkFn, resteerCisOk, callback_opaque,
Modified: trunk/priv/host_arm64_defs.c
==============================================================================
--- trunk/priv/host_arm64_defs.c (original)
+++ trunk/priv/host_arm64_defs.c Sat May 3 21:20:56 2014
@@ -4461,7 +4461,8 @@
//case Ijk_EmWarn: trcval = VEX_TRC_JMP_EMWARN; break;
//case Ijk_MapFail: trcval = VEX_TRC_JMP_MAPFAIL; break;
case Ijk_NoDecode: trcval = VEX_TRC_JMP_NODECODE; break;
- //case Ijk_TInval: trcval = VEX_TRC_JMP_TINVAL; break;
+ case Ijk_TInval: trcval = VEX_TRC_JMP_TINVAL; break;
+ case Ijk_FlushDCache: trcval = VEX_TRC_JMP_FLUSHDCACHE; break;
case Ijk_NoRedir: trcval = VEX_TRC_JMP_NOREDIR; break;
//case Ijk_SigTRAP: trcval = VEX_TRC_JMP_SIGTRAP; break;
//case Ijk_SigSEGV: trcval = VEX_TRC_JMP_SIGSEGV; break;
Modified: trunk/priv/host_arm64_isel.c
==============================================================================
--- trunk/priv/host_arm64_isel.c (original)
+++ trunk/priv/host_arm64_isel.c Sat May 3 21:20:56 2014
@@ -6915,7 +6915,8 @@
case Ijk_NoDecode:
case Ijk_NoRedir:
case Ijk_Sys_syscall:
-//ZZ case Ijk_TInval:
+ case Ijk_TInval:
+ case Ijk_FlushDCache:
//ZZ case Ijk_Yield:
{
HReg r = iselIntExpr_R(env, next);
Modified: trunk/priv/ir_defs.c
==============================================================================
--- trunk/priv/ir_defs.c (original)
+++ trunk/priv/ir_defs.c Sat May 3 21:20:56 2014
@@ -1413,6 +1413,7 @@
case Ijk_NoDecode: vex_printf("NoDecode"); break;
case Ijk_MapFail: vex_printf("MapFail"); break;
case Ijk_TInval: vex_printf("Invalidate"); break;
+ case Ijk_FlushDCache: vex_printf("FlushDCache"); break;
case Ijk_NoRedir: vex_printf("NoRedir"); break;
case Ijk_SigILL: vex_printf("SigILL"); break;
case Ijk_SigTRAP: vex_printf("SigTRAP"); break;
Modified: trunk/priv/main_main.c
==============================================================================
--- trunk/priv/main_main.c (original)
+++ trunk/priv/main_main.c Sat May 3 21:20:56 2014
@@ -92,6 +92,7 @@
void LibVEX_default_VexControl ( /*OUT*/ VexControl* vcon )
{
+ vex_bzero(vcon, sizeof(*vcon));
vcon->iropt_verbosity = 0;
vcon->iropt_level = 2;
vcon->iropt_register_updates = VexRegUpdUnwindregsAtMemAccess;
@@ -1225,20 +1226,23 @@
/* Write default settings info *vai. */
void LibVEX_default_VexArchInfo ( /*OUT*/VexArchInfo* vai )
{
+ vex_bzero(vai, sizeof(*vai));
vai->hwcaps = 0;
vai->ppc_icache_line_szB = 0;
vai->ppc_dcbz_szB = 0;
vai->ppc_dcbzl_szB = 0;
-
+ vai->arm64_dMinLine_lg2_szB = 0;
+ vai->arm64_iMinLine_lg2_szB = 0;
vai->hwcache_info.num_levels = 0;
vai->hwcache_info.num_caches = 0;
- vai->hwcache_info.caches = NULL;
+ vai->hwcache_info.caches = NULL;
vai->hwcache_info.icaches_maintain_coherence = True; // whatever
}
/* Write default settings info *vbi. */
void LibVEX_default_VexAbiInfo ( /*OUT*/VexAbiInfo* vbi )
{
+ vex_bzero(vbi, sizeof(*vbi));
vbi->guest_stack_redzone_size = 0;
vbi->guest_amd64_assume_fs_is_zero = False;
vbi->guest_amd64_assume_gs_is_0x60 = False;
Modified: trunk/pub/libvex.h
==============================================================================
--- trunk/pub/libvex.h (original)
+++ trunk/pub/libvex.h Sat May 3 21:20:56 2014
@@ -276,9 +276,14 @@
/* PPC32/PPC64 only: size of instruction cache line */
Int ppc_icache_line_szB;
/* PPC32/PPC64 only: sizes zeroed by the dcbz/dcbzl instructions
- * (bug#135264) */
+ (bug#135264) */
UInt ppc_dcbz_szB;
UInt ppc_dcbzl_szB; /* 0 means unsupported (SIGILL) */
+ /* ARM64: I- and D- minimum line sizes in log2(bytes), as
+ obtained from ctr_el0.DminLine and .IminLine. For example, a
+ line size of 64 bytes would be encoded here as 6. */
+ UInt arm64_dMinLine_lg2_szB;
+ UInt arm64_iMinLine_lg2_szB;
}
VexArchInfo;
Modified: trunk/pub/libvex_ir.h
==============================================================================
--- trunk/pub/libvex_ir.h (original)
+++ trunk/pub/libvex_ir.h Sat May 3 21:20:56 2014
@@ -2082,6 +2082,10 @@
ensure that these are filled in with suitable values before issuing
a jump of kind Ijk_TInval.
+ Ijk_TInval requests invalidation of translations taken from the
+ requested range. Ijk_FlushDCache requests flushing of the D cache
+ for the specified range.
+
Re Ijk_EmWarn and Ijk_EmFail: the guest state must have a
pseudo-register guest_EMNOTE, which is 32-bits regardless of the
host or guest word size. That register should be made to hold a
@@ -2109,7 +2113,8 @@
Ijk_EmFail, /* emulation critical (FATAL) error; give up */
Ijk_NoDecode, /* current instruction cannot be decoded */
Ijk_MapFail, /* Vex-provided address translation failed */
- Ijk_TInval, /* Invalidate translations before continuing. */
+ Ijk_TInval, /* Inval icache to PoU in [TISTART, +TILEN) */
+ Ijk_FlushDCache, /* Clean dcache to PoU in [TISTART, +TILEN) */
Ijk_NoRedir, /* Jump to un-redirected guest addr */
Ijk_SigILL, /* current instruction synths SIGILL */
Ijk_SigTRAP, /* current instruction synths SIGTRAP */
Modified: trunk/pub/libvex_trc_values.h
==============================================================================
--- trunk/pub/libvex_trc_values.h (original)
+++ trunk/pub/libvex_trc_values.h Sat May 3 21:20:56 2014
@@ -46,15 +46,12 @@
These values should be 61 or above so as not to conflict
with Valgrind's VG_TRC_ values, which are 60 or below.
-
- These values *must* be odd (have bit 0 set) because the dispatchers
- (coregrind/m_dispatch/dispatch-*-*.S) use this fact to distinguish
- a TRC value from the unchanged baseblock pointer -- which has 0 as
- its lowest bit.
*/
#define VEX_TRC_JMP_TINVAL 61 /* invalidate translations before
continuing */
+#define VEX_TRC_JMP_FLUSHDCACHE 103 /* flush dcache before continuing */
+
#define VEX_TRC_JMP_NOREDIR 81 /* jump to undirected guest addr */
#define VEX_TRC_JMP_SIGTRAP 85 /* deliver trap (SIGTRAP) before
continuing */
|
Author: philippe
Date: Sat May 3 11:12:50 2014
New Revision: 13930
Log:
Helgrind : two new gdbserver commands 'describe address' and 'info locks'
- Helgrind GDB server monitor command 'describe <address>'
allowing to describe an address (e.g. where it was allocated).
- Helgrind GDB server monitor command 'info locks' giving
the list of locks, their location, and their status.
In a further patch, it is intended to
1. factorise the describe address code between memcheck and helgrind
2. generalise the describe address gdbsrv command so as to make
it usable for all tools.
Added:
trunk/helgrind/hg_addrdescr.c
trunk/helgrind/hg_addrdescr.h
Modified:
trunk/NEWS
trunk/docs/xml/manual-core-adv.xml
trunk/helgrind/Makefile.am
trunk/helgrind/docs/hg-manual.xml
trunk/helgrind/hg_errors.c
trunk/helgrind/hg_errors.h
trunk/helgrind/hg_main.c
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Sat May 3 11:12:50 2014
@@ -15,6 +15,10 @@
VALGRIND_ENABLE_ADDR_ERROR_REPORTING_IN_RANGE
* Helgrind:
+ - Helgrind GDB server monitor command 'describe <address>'
+ allowing to describe an address (e.g. where it was allocated).
+ - Helgrind GDB server monitor command 'info locks' giving
+ the list of locks, their location, and their status.
* Callgrind:
- callgrind_control now supports the --vgdb-prefix argument,
Modified: trunk/docs/xml/manual-core-adv.xml
==============================================================================
--- trunk/docs/xml/manual-core-adv.xml (original)
+++ trunk/docs/xml/manual-core-adv.xml Sat May 3 11:12:50 2014
@@ -603,6 +603,9 @@
<listitem>
<para><xref linkend="ms-manual.monitor-commands"/></para>
</listitem>
+ <listitem>
+ <para><xref linkend="hg-manual.monitor-commands"/></para>
+ </listitem>
</itemizedlist>
</para>
Modified: trunk/helgrind/Makefile.am
==============================================================================
--- trunk/helgrind/Makefile.am (original)
+++ trunk/helgrind/Makefile.am Sat May 3 11:12:50 2014
@@ -12,6 +12,7 @@
pkginclude_HEADERS = helgrind.h
noinst_HEADERS = \
+ hg_addrdescr.h \
hg_basics.h \
hg_errors.h \
hg_lock_n_thread.h \
@@ -28,6 +29,7 @@
endif
HELGRIND_SOURCES_COMMON = \
+ hg_addrdescr.c \
hg_basics.c \
hg_errors.c \
hg_lock_n_thread.c \
Modified: trunk/helgrind/docs/hg-manual.xml
==============================================================================
--- trunk/helgrind/docs/hg-manual.xml (original)
+++ trunk/helgrind/docs/hg-manual.xml Sat May 3 11:12:50 2014
@@ -1254,6 +1254,76 @@
</sect1>
+<sect1 id="hg-manual.monitor-commands" xreflabel="Helgrind Monitor Commands">
+<title>Helgrind Monitor Commands</title>
+<para>The Helgrind tool provides monitor commands handled by Valgrind's
+built-in gdbserver (see <xref linkend="manual-core-adv.gdbserver-commandhandling"/>).
+</para>
+<itemizedlist>
+ <listitem>
+ <para><varname>info locks</varname> shows the list of locks and their
+ status. </para>
+ <para>
+ In the following example, helgrind knows about one lock.
+ This lock is located at the guest address <varname>ga 0x8049a20</varname>.
+ The lock kind is <varname>rdwr</varname> indicating a reader-writer lock.
+ Other possible lock kinds are <varname>nonRec</varname> (simple mutex, non recursive)
+ and <varname>mbRec</varname> (simple mutex, possibly recursive).
+ The lock kind is then followed by the list of threads helding the lock.
+ In the below example, <varname>R1:thread #6 tid 3</varname> indicates that the
+ helgrind thread #6 has acquired (once, as the counter following the letter R is one)
+ the lock in read mode. The helgrind thread nr is incremented for each started thread.
+ The presence of 'tid 3' indicates that the thread #6 is has not exited yet and is the
+ valgrind tid 3. If a thread has terminated, then this is indicated with 'tid (exited)'.
+ </para>
+<programlisting><![CDATA[
+(gdb) monitor info locks
+Lock ga 0x8049a20 {
+ kind rdwr
+ { R1:thread #6 tid 3 }
+}
+(gdb)
+]]></programlisting>
+
+ <para> If you give the option <varname>--read-var-info=yes</varname>, then more
+ information will be provided about the lock location, such as the global variable
+ or the heap block that contains the lock:
+ </para>
+<programlisting><![CDATA[
+Lock ga 0x8049a20 {
+Location 0x8049a20 is 0 bytes inside global var "s_rwlock"
+declared at rwlock_race.c:17
+ kind rdwr
+ { R1:thread #3 tid 3 }
+}
+]]></programlisting>
+
+ </listitem>
+
+ <listitem>
+ <para><varname>describe <addr></varname> describes the address
+ <addr>. For example, an heap address will be described by the
+ length of the heap block and the stacktrace where this block was allocated.
+ The option <varname>--read-var-info=yes</varname> allows to give information
+ about global or local variables.
+ </para>
+<programlisting><![CDATA[
+(gdb) monitor describe 0x404e028
+
+address 0x404E028 is 0 bytes inside a block of size 100 alloc'd
+==16448== at 0x4028AA5: malloc (vg_replace_malloc.c:292)
+==16448== by 0x8048BD7: main (tc19_shadowmem.c:144)
+(gdb) mo d 0xbec6f040
+
+Location 0xbec6f040 is 0 bytes inside info.child,
+declared at tc19_shadowmem.c:139, in frame #0 of thread 1
+(gdb)
+]]></programlisting>
+ </listitem>
+
+</itemizedlist>
+
+</sect1>
<sect1 id="hg-manual.client-requests" xreflabel="Helgrind Client Requests">
<title>Helgrind Client Requests</title>
Added: trunk/helgrind/hg_addrdescr.c
==============================================================================
--- trunk/helgrind/hg_addrdescr.c (added)
+++ trunk/helgrind/hg_addrdescr.c Sat May 3 11:12:50 2014
@@ -0,0 +1,192 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Address Description. ---*/
+/*--- hg_addrdescr.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Helgrind, a Valgrind tool for detecting errors
+ in threaded programs.
+
+ Copyright (C) 2007-2012 OpenWorks Ltd
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+#include "pub_tool_basics.h"
+#include "pub_tool_libcbase.h"
+#include "pub_tool_libcprint.h"
+#include "pub_tool_libcassert.h"
+#include "pub_tool_xarray.h"
+#include "pub_tool_execontext.h"
+#include "pub_tool_debuginfo.h"
+#include "pub_tool_threadstate.h"
+
+#include "hg_basics.h"
+#include "hg_addrdescr.h" /* self */
+
+void HG_(init_AddrDescr) ( AddrDescr* ad ) {
+ VG_(memset)(ad, 0, sizeof(*ad) );
+}
+
+void HG_(describe_addr) ( Addr a, /*OUT*/AddrDescr* ad )
+{
+ tl_assert(!ad->hctxt);
+ tl_assert(!ad->descr1);
+ tl_assert(!ad->descr2);
+
+ /* First, see if it's in any heap block. Unfortunately this
+ means a linear search through all allocated heap blocks. The
+ assertion says that if it's detected as a heap block, then we
+ must have an allocation context for it, since all heap blocks
+ should have an allocation context. */
+ Bool is_heapblock
+ = HG_(mm_find_containing_block)(
+ &ad->hctxt,
+ &ad->haddr,
+ &ad->hszB,
+ a
+ );
+ tl_assert(is_heapblock == (ad->hctxt != NULL));
+
+ if (!ad->hctxt) {
+ /* It's not in any heap block. See if we can map it to a
+ stack or global symbol. */
+
+ ad->descr1
+ = VG_(newXA)( HG_(zalloc), "hg.addrdescr.descr1",
+ HG_(free), sizeof(HChar) );
+ ad->descr2
+ = VG_(newXA)( HG_(zalloc), "hg.addrdescr.descr2",
+ HG_(free), sizeof(HChar) );
+
+ (void) VG_(get_data_description)( ad->descr1,
+ ad->descr2,
+ a );
+
+ /* If there's nothing in descr1/2, free it. Why is it safe to
+ to VG_(indexXA) at zero here? Because
+ VG_(get_data_description) guarantees to zero terminate
+ descr1/2 regardless of the outcome of the call. So there's
+ always at least one element in each XA after the call.
+ */
+ if (0 == VG_(strlen)( VG_(indexXA)(ad->descr1, 0 ))) {
+ VG_(deleteXA)( ad->descr1 );
+ ad->descr1 = NULL;
+ }
+ if (0 == VG_(strlen)( VG_(indexXA)( ad->descr2, 0 ))) {
+ VG_(deleteXA)( ad->descr2 );
+ ad->descr2 = NULL;
+ }
+ }
+}
+
+void HG_(pp_addrdescr) (Bool xml, const HChar* what, Addr addr,
+ AddrDescr* ad,
+ void(*print)(const HChar *format, ...))
+{
+ /* If we have a description of the address in terms of a heap
+ block, show it. */
+ if (ad->hctxt) {
+ SizeT delta = addr - ad->haddr;
+ if (xml) {
+ (*print)(" <auxwhat>%s %p is %ld bytes inside a block "
+ "of size %ld alloc'd</auxwhat>\n", what,
+ (void*)addr, delta,
+ ad->hszB);
+ VG_(pp_ExeContext)( ad->hctxt );
+ } else {
+ (*print)("\n");
+ (*print)("%s %p is %ld bytes inside a block "
+ "of size %ld alloc'd\n", what,
+ (void*)addr, delta,
+ ad->hszB);
+ VG_(pp_ExeContext)( ad->hctxt );
+ }
+ }
+
+ /* If we have a better description of the address, show it.
+ Note that in XML mode, it will already by nicely wrapped up
+ in tags, either <auxwhat> or <xauxwhat>, so we can just emit
+ it verbatim. */
+ if (xml) {
+ if (ad->descr1)
+ (*print)( " %s\n",
+ (HChar*)VG_(indexXA)( ad->descr1, 0 ) );
+ if (ad->descr2)
+ (*print)( " %s\n",
+ (HChar*)VG_(indexXA)( ad->descr2, 0 ) );
+ } else {
+ if (ad->descr1 || ad->descr2)
+ (*print)("\n");
+ if (ad->descr1)
+ (*print)( "%s\n",
+ (HChar*)VG_(indexXA)( ad->descr1, 0 ) );
+ if (ad->descr2)
+ (*print)( "%s\n",
+ (HChar*)VG_(indexXA)( ad->descr2, 0 ) );
+ }
+}
+
+static void void_printf(const HChar *format, ...)
+{
+ UInt ret;
+ va_list vargs;
+ va_start(vargs, format);
+ ret = VG_(vprintf)(format, vargs);
+ va_end(vargs);
+}
+
+Bool HG_(get_and_pp_addrdescr) (const HChar* what, Addr addr)
+{
+
+ Bool ret;
+ AddrDescr glad;
+
+ HG_(init_AddrDescr) (&glad);
+
+ HG_(describe_addr) (addr, &glad);
+
+ HG_(pp_addrdescr) (False /* xml */, what, addr,
+ &glad,
+ void_printf);
+ ret = glad.hctxt || glad.descr1 || glad.descr2;
+
+ HG_(clear_addrdesc) (&glad);
+
+ return ret;
+}
+
+void HG_(clear_addrdesc) ( AddrDescr* ad)
+{
+ ad->hctxt = NULL;
+ ad->haddr = 0;
+ ad->hszB = 0;
+ if (ad->descr1 != NULL) {
+ VG_(deleteXA)( ad->descr1 );
+ ad->descr1 = NULL;
+ }
+ if (ad->descr2 != NULL) {
+ VG_(deleteXA)( ad->descr2 );
+ ad->descr2 = NULL;
+ }
+}
+
+/*--------------------------------------------------------------------*/
+/*--- end hg_addrdescr.c ---*/
+/*--------------------------------------------------------------------*/
Added: trunk/helgrind/hg_addrdescr.h
==============================================================================
--- trunk/helgrind/hg_addrdescr.h (added)
+++ trunk/helgrind/hg_addrdescr.h Sat May 3 11:12:50 2014
@@ -0,0 +1,94 @@
+
+/*---------------------------------------------------------------------*/
+/*--- Address Description, used e.g. to describe addresses involved ---*/
+/*--- in race conditions, locks. ---*/
+/*--- hg_addrdescr.h ---*/
+/*---------------------------------------------------------------------*/
+
+/*
+ This file is part of Helgrind, a Valgrind tool for detecting errors
+ in threaded programs.
+
+ Copyright (C) 2007-2012 OpenWorks Ltd
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#ifndef __HG_ADDRDESCR_H
+#define __HG_ADDRDESCR_H
+
+/*----------------------------------------------------------------*/
+/*--- Address Description ---*/
+/*--- Used e.g. to describe an address in a Race cond. error ---*/
+/*--- or a lock. ---*/
+/*----------------------------------------------------------------*/
+typedef
+ struct {
+ /* descr1/2 provide a description of stack/global locs */
+ XArray* descr1; /* XArray* of HChar */
+ XArray* descr2; /* XArray* of HChar */
+ /* hctxt/haddr/hszB describe the addr if it is a heap block. */
+ ExeContext* hctxt;
+ Addr haddr;
+ SizeT hszB;
+ }
+ AddrDescr;
+
+/* Initialises an empty AddrDescr. */
+void HG_(init_AddrDescr) ( AddrDescr* ad );
+
+/* Describe an address as best you can, for error messages or
+ lock description, putting the result in ad.
+ This allocates some memory in ad, to be cleared with VG_(clear_addrdesc). */
+extern void HG_(describe_addr) ( Addr a, /*OUT*/AddrDescr* ad );
+
+/* Prints (using *print) the readable description of addr given in ad.
+ "what" identifies the type pointed to by addr (e.g. a lock). */
+extern void HG_(pp_addrdescr) (Bool xml, const HChar* what, Addr addr,
+ AddrDescr* ad,
+ void(*print)(const HChar *format, ...));
+
+/* Get a readable description of addr, then print it using HG_(pp_addrdescr)
+ using xml False and VG_(printf) to emit the characters.
+ Returns True if a description was found/printed, False otherwise. */
+extern Bool HG_(get_and_pp_addrdescr) (const HChar* what, Addr a);
+
+/* Free all memory allocated by HG_(describe_addr)
+ Sets all elements of ad to 0/NULL. */
+extern void HG_(clear_addrdesc) ( AddrDescr* ad);
+
+/* For error creation/address description:
+ map 'data_addr' to a malloc'd chunk, if any.
+ Slow linear search accelerated in some special cases normal hash
+ search of the mallocmeta table. This is an abuse of the normal file
+ structure since this is exported by hg_main.c, not hg_addrdesc.c. Oh
+ Well. Returns True if found, False if not. Zero-sized blocks are
+ considered to contain the searched-for address if they equal that
+ address. */
+Bool HG_(mm_find_containing_block)( /*OUT*/ExeContext** where,
+ /*OUT*/Addr* payload,
+ /*OUT*/SizeT* szB,
+ Addr data_addr );
+
+
+#endif /* ! __HG_ADDRDESCR_H */
+
+/*--------------------------------------------------------------------*/
+/*--- end hg_addrdescr.h ---*/
+/*--------------------------------------------------------------------*/
Modified: trunk/helgrind/hg_errors.c
==============================================================================
--- trunk/helgrind/hg_errors.c (original)
+++ trunk/helgrind/hg_errors.c Sat May 3 11:12:50 2014
@@ -42,6 +42,7 @@
#include "pub_tool_options.h" // VG_(clo_xml)
#include "hg_basics.h"
+#include "hg_addrdescr.h"
#include "hg_wordset.h"
#include "hg_lock_n_thread.h"
#include "libhb.h"
@@ -291,16 +292,10 @@
struct {
Addr data_addr;
Int szB;
+ AddrDescr data_addrdescr;
Bool isWrite;
Thread* thr;
Lock** locksHeldW;
- /* descr1/2 provide a description of stack/global locs */
- XArray* descr1; /* XArray* of HChar */
- XArray* descr2; /* XArray* of HChar */
- /* halloc/haddr/hszB describe the addr if it is a heap block. */
- ExeContext* hctxt;
- Addr haddr;
- SizeT hszB;
/* h1_* and h2_* provide some description of a previously
observed access with which we are conflicting. */
Thread* h1_ct; /* non-NULL means h1 info present */
@@ -411,52 +406,7 @@
VG_(printf)("HG_(update_extra): "
"%d conflicting-event queries\n", xxx);
- tl_assert(!xe->XE.Race.hctxt);
- tl_assert(!xe->XE.Race.descr1);
- tl_assert(!xe->XE.Race.descr2);
-
- /* First, see if it's in any heap block. Unfortunately this
- means a linear search through all allocated heap blocks. The
- assertion says that if it's detected as a heap block, then we
- must have an allocation context for it, since all heap blocks
- should have an allocation context. */
- Bool is_heapblock
- = HG_(mm_find_containing_block)(
- &xe->XE.Race.hctxt, &xe->XE.Race.haddr, &xe->XE.Race.hszB,
- xe->XE.Race.data_addr
- );
- tl_assert(is_heapblock == (xe->XE.Race.hctxt != NULL));
-
- if (!xe->XE.Race.hctxt) {
- /* It's not in any heap block. See if we can map it to a
- stack or global symbol. */
-
- xe->XE.Race.descr1
- = VG_(newXA)( HG_(zalloc), "hg.update_extra.Race.descr1",
- HG_(free), sizeof(HChar) );
- xe->XE.Race.descr2
- = VG_(newXA)( HG_(zalloc), "hg.update_extra.Race.descr2",
- HG_(free), sizeof(HChar) );
-
- (void) VG_(get_data_description)( xe->XE.Race.descr1,
- xe->XE.Race.descr2,
- xe->XE.Race.data_addr );
-
- /* If there's nothing in descr1/2, free it. Why is it safe to
- to VG_(indexXA) at zero here? Because
- VG_(get_data_description) guarantees to zero terminate
- descr1/2 regardless of the outcome of the call. So there's
- always at least one element in each XA after the call.
- */
- if (0 == VG_(strlen)( VG_(indexXA)( xe->XE.Race.descr1, 0 ))) {
- VG_(deleteXA)( xe->XE.Race.descr1 );
- xe->XE.Race.descr1 = NULL;
- }
- if (0 == VG_(strlen)( VG_(indexXA)( xe->XE.Race.descr2, 0 ))) {
- VG_(deleteXA)( xe->XE.Race.descr2 );
- xe->XE.Race.descr2 = NULL;
- }
- }
+ HG_(describe_addr) (xe->XE.Race.data_addr, &xe->XE.Race.data_addrdescr);
/* And poke around in the conflicting-event map, to see if we
can rustle up a plausible-looking conflicting memory access
@@ -538,8 +488,7 @@
/* Skip on the detailed description of the raced-on address at this
point; it's expensive. Leave it for the update_extra function
if we ever make it that far. */
- tl_assert(xe.XE.Race.descr1 == NULL);
- tl_assert(xe.XE.Race.descr2 == NULL);
+ HG_(init_AddrDescr) (&xe.XE.Race.data_addrdescr);
// FIXME: tid vs thr
// Skip on any of the conflicting-access info at this point.
// It's expensive to obtain, and this error is more likely than
@@ -807,7 +756,6 @@
return True;
}
-
/* Announce 'lk'. */
static void announce_LockP ( Lock* lk )
{
@@ -1285,46 +1233,9 @@
}
- /* If we have a description of the address in terms of a heap
- block, show it. */
- if (xe->XE.Race.hctxt) {
- SizeT delta = err_ga - xe->XE.Race.haddr;
- if (xml) {
- emit(" <auxwhat>Address %p is %ld bytes inside a block "
- "of size %ld alloc'd</auxwhat>\n", (void*)err_ga, delta,
- xe->XE.Race.hszB);
- VG_(pp_ExeContext)( xe->XE.Race.hctxt );
- } else {
- emit("\n");
- emit("Address %p is %ld bytes inside a block "
- "of size %ld alloc'd\n", (void*)err_ga, delta,
- xe->XE.Race.hszB);
- VG_(pp_ExeContext)( xe->XE.Race.hctxt );
- }
- }
-
- /* If we have a better description of the address, show it.
- Note that in XML mode, it will already by nicely wrapped up
- in tags, either <auxwhat> or <xauxwhat>, so we can just emit
- it verbatim. */
- if (xml) {
- if (xe->XE.Race.descr1)
- emit( " %s\n",
- (HChar*)VG_(indexXA)( xe->XE.Race.descr1, 0 ) );
- if (xe->XE.Race.descr2)
- emit( " %s\n",
- (HChar*)VG_(indexXA)( xe->XE.Race.descr2, 0 ) );
- } else {
- if (xe->XE.Race.descr1 || xe->XE.Race.descr2)
- emit("\n");
- if (xe->XE.Race.descr1)
- emit( "%s\n",
- (HChar*)VG_(indexXA)( xe->XE.Race.descr1, 0 ) );
- if (xe->XE.Race.descr2)
- emit( "%s\n",
- (HChar*)VG_(indexXA)( xe->XE.Race.descr2, 0 ) );
- }
-
+ HG_(pp_addrdescr) (xml, "Address", err_ga,
+ &xe->XE.Race.data_addrdescr,
+ emit);
break; /* case XE_Race */
} /* case XE_Race */
Modified: trunk/helgrind/hg_errors.h
==============================================================================
--- trunk/helgrind/hg_errors.h (original)
+++ trunk/helgrind/hg_errors.h Sat May 3 11:12:50 2014
@@ -79,18 +79,6 @@
extern ULong HG_(stats__string_table_queries);
extern ULong HG_(stats__string_table_get_map_size) ( void );
-/* For error creation: map 'data_addr' to a malloc'd chunk, if any.
- Slow linear search accelerated in some special cases normal hash
- search of the mallocmeta table. This is an abuse of the normal file
- structure since this is exported by hg_main.c, not hg_errors.c. Oh
- Well. Returns True if found, False if not. Zero-sized blocks are
- considered to contain the searched-for address if they equal that
- address. */
-Bool HG_(mm_find_containing_block)( /*OUT*/ExeContext** where,
- /*OUT*/Addr* payload,
- /*OUT*/SizeT* szB,
- Addr data_addr );
-
#endif /* ! __HG_ERRORS_H */
/*--------------------------------------------------------------------*/
Modified: trunk/helgrind/hg_main.c
==============================================================================
--- trunk/helgrind/hg_main.c (original)
+++ trunk/helgrind/hg_main.c Sat May 3 11:12:50 2014
@@ -37,6 +37,7 @@
*/
#include "pub_tool_basics.h"
+#include "pub_tool_gdbserver.h"
#include "pub_tool_libcassert.h"
#include "pub_tool_libcbase.h"
#include "pub_tool_libcprint.h"
@@ -58,6 +59,7 @@
#include "hg_basics.h"
#include "hg_wordset.h"
+#include "hg_addrdescr.h"
#include "hg_lock_n_thread.h"
#include "hg_errors.h"
@@ -457,29 +459,61 @@
}
}
-static void pp_Lock ( Int d, Lock* lk )
-{
- space(d+0); VG_(printf)("Lock %p (ga %#lx) {\n", lk, lk->guestaddr);
+/* Pretty Print lock lk.
+ if show_lock_addrdescr, describes the (guest) lock address.
+ (this description will be more complete with --read-var-info=yes).
+ if show_internal_data, shows also helgrind internal information.
+ d is the level at which output is indented. */
+static void pp_Lock ( Int d, Lock* lk,
+ Bool show_lock_addrdescr,
+ Bool show_internal_data)
+{
+ space(d+0);
+ if (show_internal_data)
+ VG_(printf)("Lock %p (ga %#lx) {", lk, lk->guestaddr);
+ else
+ VG_(printf)("Lock ga %#lx {", lk->guestaddr);
+ if (!show_lock_addrdescr
+ || !HG_(get_and_pp_addrdescr) ("lock", (Addr) lk->guestaddr))
+ VG_(printf)("\n");
+
if (sHOW_ADMIN) {
space(d+3); VG_(printf)("admin_n %p\n", lk->admin_next);
space(d+3); VG_(printf)("admin_p %p\n", lk->admin_prev);
space(d+3); VG_(printf)("magic 0x%x\n", (UInt)lk->magic);
}
- space(d+3); VG_(printf)("unique %llu\n", lk->unique);
+ if (show_internal_data) {
+ space(d+3); VG_(printf)("unique %llu\n", lk->unique);
+ }
space(d+3); VG_(printf)("kind %s\n", show_LockKind(lk->kind));
- space(d+3); VG_(printf)("heldW %s\n", lk->heldW ? "yes" : "no");
- space(d+3); VG_(printf)("heldBy %p", lk->heldBy);
+ if (show_internal_data) {
+ space(d+3); VG_(printf)("heldW %s\n", lk->heldW ? "yes" : "no");
+ }
+ if (show_internal_data) {
+ space(d+3); VG_(printf)("heldBy %p", lk->heldBy);
+ }
if (lk->heldBy) {
Thread* thr;
UWord count;
VG_(printf)(" { ");
VG_(initIterBag)( lk->heldBy );
- while (VG_(nextIterBag)( lk->heldBy, (UWord*)&thr, &count ))
- VG_(printf)("%lu:%p ", count, thr);
+ while (VG_(nextIterBag)( lk->heldBy, (UWord*)&thr, &count )) {
+ if (show_internal_data)
+ VG_(printf)("%lu:%p ", count, thr);
+ else {
+ VG_(printf)("%c%lu:thread #%d ",
+ lk->heldW ? 'W' : 'R',
+ count, thr->errmsg_index);
+ if (thr->coretid == VG_INVALID_THREADID)
+ VG_(printf)("tid (exited) ");
+ else
+ VG_(printf)("tid %d ", thr->coretid);
+
+ }
+ }
VG_(doneIterBag)( lk->heldBy );
- VG_(printf)("}");
+ VG_(printf)("}\n");
}
- VG_(printf)("\n");
space(d+0); VG_(printf)("}\n");
}
@@ -496,12 +530,14 @@
space(n);
VG_(printf)("admin_locks record %d of %d:\n", i, n);
}
- pp_Lock(d+3, lk);
+ pp_Lock(d+3, lk,
+ False /* show_lock_addrdescr */,
+ True /* show_internal_data */);
}
space(d); VG_(printf)("}\n");
}
-static void pp_map_locks ( Int d )
+static void pp_map_locks ( Int d)
{
void* gla;
Lock* lk;
@@ -4703,11 +4739,89 @@
}
}
+static void print_monitor_help ( void )
+{
+ VG_(gdb_printf)
+ (
+"\n"
+"helgrind monitor commands:\n"
+" describe <addr> : outputs a description of <addr>\n"
+" info locks : show list of locks and their status\n"
+"\n");
+}
+
+/* return True if request recognised, False otherwise */
+static Bool handle_gdb_monitor_command (ThreadId tid, HChar *req)
+{
+ UWord ret = 0;
+ HChar* wcmd;
+ HChar s[VG_(strlen(req))]; /* copy for strtok_r */
+ HChar *ssaveptr;
+ Int kwdid;
+
+ VG_(strcpy) (s, req);
+
+ wcmd = VG_(strtok_r) (s, " ", &ssaveptr);
+ /* NB: if possible, avoid introducing a new command below which
+ starts with the same first letter(s) as an already existing
+ command. This ensures a shorter abbreviation for the user. */
+ switch (VG_(keyword_id)
+ ("help info describe",
+ wcmd, kwd_report_duplicated_matches)) {
+ case -2: /* multiple matches */
+ return True;
+ case -1: /* not found */
+ return False;
+ case 0: /* help */
+ print_monitor_help();
+ return True;
+ case 1: /* info */
+ ret = 1;
+ wcmd = VG_(strtok_r) (NULL, " ", &ssaveptr);
+ switch (kwdid = VG_(keyword_id)
+ ("locks",
+ wcmd, kwd_report_all)) {
+ case -2:
+ case -1:
+ break;
+ case 0: // locks
+ {
+ Int i;
+ Lock* lk;
+ for (i = 0, lk = admin_locks; lk; i++, lk = lk->admin_next) {
+ pp_Lock(0, lk,
+ True /* show_lock_addrdescr */,
+ False /* show_internal_data */);
+ }
+ if (i == 0)
+ VG_(gdb_printf) ("no locks\n");
+ }
+ break;
+ default:
+ tl_assert(0);
+ }
+ return True;
+ case 2: { /* describe */
+ Addr address;
+ SizeT szB = 1;
+ VG_(strtok_get_address_and_size) (&address, &szB, &ssaveptr);
+ if (address == (Addr) 0 && szB == 0) return True;
+ if (!HG_(get_and_pp_addrdescr) ("address", address))
+ VG_(gdb_printf) ("No description found for address %p\n",
+ (void*)address);
+ return True;
+ }
+ default:
+ tl_assert(0);
+ return False;
+ }
+}
static
Bool hg_handle_client_request ( ThreadId tid, UWord* args, UWord* ret)
{
- if (!VG_IS_TOOL_USERREQ('H','G',args[0]))
+ if (!VG_IS_TOOL_USERREQ('H','G',args[0])
+ && VG_USERREQ__GDB_MONITOR_COMMAND != args[0])
return False;
/* Anything that gets past the above check is one of ours, so we
@@ -5021,6 +5135,15 @@
evh__HG_USERSO_FORGET_ALL( tid, args[1] );
break;
+ case VG_USERREQ__GDB_MONITOR_COMMAND: {
+ Bool handled = handle_gdb_monitor_command (tid, (HChar*)args[1]);
+ if (handled)
+ *ret = 1;
+ else
+ *ret = 0;
+ return handled;
+ }
+
default:
/* Unhandled Helgrind client request! */
tl_assert2(0, "unhandled Helgrind client request 0x%lx",
|