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From: <sv...@va...> - 2013-02-14 17:10:09
|
bart 2013-02-14 17:10:01 +0000 (Thu, 14 Feb 2013)
New Revision: 13287
Log:
Add support for the Linux ioctl IB_USER_MAD_ENABLE_PKEY
Modified files:
trunk/coregrind/m_syswrap/syswrap-linux.c
trunk/include/vki/vki-linux.h
Modified: trunk/coregrind/m_syswrap/syswrap-linux.c (+4 -0)
===================================================================
--- trunk/coregrind/m_syswrap/syswrap-linux.c 2013-02-14 14:28:22 +00:00 (rev 13286)
+++ trunk/coregrind/m_syswrap/syswrap-linux.c 2013-02-14 17:10:01 +00:00 (rev 13287)
@@ -4797,6 +4797,9 @@
/* User input device creation */
case VKI_UI_DEV_CREATE:
case VKI_UI_DEV_DESTROY:
+
+ /* InfiniBand */
+ case VKI_IB_USER_MAD_ENABLE_PKEY:
PRINT("sys_ioctl ( %ld, 0x%lx )",ARG1,ARG2);
PRE_REG_READ2(long, "ioctl",
unsigned int, fd, unsigned int, request);
@@ -6237,6 +6240,7 @@
case VKI_TCSETS:
case VKI_TCSETSW:
case VKI_TCSETSF:
+ case VKI_IB_USER_MAD_ENABLE_PKEY:
break;
case VKI_TCGETS:
POST_MEM_WRITE( ARG3, sizeof(struct vki_termios) );
Modified: trunk/include/vki/vki-linux.h (+13 -0)
===================================================================
--- trunk/include/vki/vki-linux.h 2013-02-14 14:28:22 +00:00 (rev 13286)
+++ trunk/include/vki/vki-linux.h 2013-02-14 17:10:01 +00:00 (rev 13287)
@@ -3015,6 +3015,19 @@
#define VKI_UI_SET_PROPBIT _VKI_IOW(VKI_UINPUT_IOCTL_BASE, 110, int)
//----------------------------------------------------------------------
+// From linux-2.6/include/uapi/rdma/ib_user_mad.h
+//----------------------------------------------------------------------
+
+#define VKI_IB_IOCTL_MAGIC 0x1b
+
+#define VKI_IB_USER_MAD_REGISTER_AGENT _VKI_IOWR(VKI_IB_IOCTL_MAGIC, 1, \
+ struct ib_user_mad_reg_req)
+
+#define VKI_IB_USER_MAD_UNREGISTER_AGENT _VKI_IOW(VKI_IB_IOCTL_MAGIC, 2, __u32)
+
+#define VKI_IB_USER_MAD_ENABLE_PKEY _VKI_IO(VKI_IB_IOCTL_MAGIC, 3)
+
+//----------------------------------------------------------------------
// Xen privcmd IOCTL
//----------------------------------------------------------------------
|
|
From: <sv...@va...> - 2013-02-14 14:28:35
|
florian 2013-02-14 14:28:22 +0000 (Thu, 14 Feb 2013)
New Revision: 13286
Log:
s390: Testcases and vbit-tester changes for the following
DFP insns:
- extract basied exponent
- insert biased exponent
- quantize
- reround to significance
Patch by Maran Pakkirisamy (ma...@li...).
Part of fixing BZ #307113.
Modified files:
trunk/memcheck/tests/vbit-test/irops.c
trunk/none/tests/s390x/dfp-2.c
trunk/none/tests/s390x/dfp-2.stdout.exp
Modified: trunk/memcheck/tests/vbit-test/irops.c (+8 -8)
===================================================================
--- trunk/memcheck/tests/vbit-test/irops.c 2013-02-08 23:34:31 +00:00 (rev 13285)
+++ trunk/memcheck/tests/vbit-test/irops.c 2013-02-14 14:28:22 +00:00 (rev 13286)
@@ -515,16 +515,16 @@
{ DEFOP(Iop_CmpD128, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_CmpExpD64, UNDEF_ALL), .s390x = 1, .ppc64 = 0, .ppc32 = 0 },
{ DEFOP(Iop_CmpExpD128, UNDEF_ALL), .s390x = 1, .ppc64 = 0, .ppc32 = 0 },
- { DEFOP(Iop_QuantizeD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_QuantizeD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_SignificanceRoundD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_SignificanceRoundD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_ExtractExpD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_ExtractExpD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_QuantizeD64, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_QuantizeD128, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_SignificanceRoundD64, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_SignificanceRoundD128, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_ExtractExpD64, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_ExtractExpD128, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_ExtractSigD64, UNDEF_ALL), .s390x = 1, .ppc64 = 0, .ppc32 = 0 },
{ DEFOP(Iop_ExtractSigD128, UNDEF_ALL), .s390x = 1, .ppc64 = 0, .ppc32 = 0 },
- { DEFOP(Iop_InsertExpD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_InsertExpD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_InsertExpD64, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_InsertExpD128, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_D64HLtoD128, UNDEF_CONCAT), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_D128HItoD64, UNDEF_UPPER), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_D128LOtoD64, UNDEF_TRUNC), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
Modified: trunk/none/tests/s390x/dfp-2.c (+214 -0)
===================================================================
--- trunk/none/tests/s390x/dfp-2.c 2013-02-08 23:34:31 +00:00 (rev 13285)
+++ trunk/none/tests/s390x/dfp-2.c 2013-02-14 14:28:22 +00:00 (rev 13286)
@@ -1,11 +1,36 @@
#include <stdio.h>
+#include <stdint.h>
#include "dfp_utils.h"
/* Test various DFP ops:
+ - extract biased exponent 64/128 bit
- extract significance 64/128 bit
+ - insert biased exponent 64/128 bit
- load and test 64/128 bit
+ - shift left/right 64/128 bit
+ - reround 64/128 bit
*/
+void eedtr(_Decimal64 in)
+{
+ long out;
+ asm volatile(".insn rre, 0xb3e50000, %[out], %[in]\n\t"
+ :[out] "=d" (out) :[in] "f" (in));
+ printf("EEDTR ");
+ DFP_VAL_PRINT(in, _Decimal64);
+ printf(" -> %ld\n", out);
+}
+
+void eextr(_Decimal128 in)
+{
+ long out;
+ asm volatile(".insn rre, 0xb3ed0000, %[out], %[in]\n\t"
+ :[out] "=d" (out) :[in] "f" (in));
+ printf("EEXTR ");
+ DFP_VAL_PRINT(in, _Decimal128);
+ printf(" -> %ld\n", out);
+}
+
void esdtr(_Decimal64 in)
{
long out;
@@ -26,6 +51,36 @@
printf(" -> %ld\n", out);
}
+void iedtr(_Decimal64 in, long amount)
+{
+ _Decimal64 out;
+
+ asm volatile (".insn rrf, 0xb3f60000, %[out], %[amount], %[in], 0\n\t"
+ :[out]"=f"(out)
+ :[in]"f"(in), [amount]"d"(amount));
+
+ printf("IEDTR ");
+ DFP_VAL_PRINT(in, _Decimal64);
+ printf(", %ld -> ", amount);
+ DFP_VAL_PRINT(out, _Decimal64);
+ printf("\n");
+}
+
+void iextr(_Decimal128 in, long amount)
+{
+ _Decimal128 out;
+
+ asm volatile (".insn rrf, 0xb3fe0000, %[out], %[amount], %[in], 0\n\t"
+ :[out]"=f"(out)
+ :[in]"f"(in), [amount]"d"(amount));
+
+ printf("IEXTR ");
+ DFP_VAL_PRINT(in, _Decimal128);
+ printf(", %ld -> ", amount);
+ DFP_VAL_PRINT(out, _Decimal128);
+ printf("\n");
+}
+
void ltdtr(_Decimal64 in)
{
_Decimal64 out;
@@ -54,6 +109,106 @@
printf(" -> %d\n", cc);
}
+void qadtr(_Decimal64 op, _Decimal64 quan, uint8_t rm)
+{
+ _Decimal64 out;
+
+ asm volatile (
+ ".insn rrf, 0xb3f50000, %[out], %[quan], %[op], %[rm]\n\t"
+ :[out]"=f"(out)
+ :[op]"f"(op), [quan]"f"(quan), [rm]"d"(rm)
+ );
+ printf("QADTR ");
+ DFP_VAL_PRINT(op, _Decimal64);
+ printf(", ");
+ DFP_VAL_PRINT(quan, _Decimal64);
+ printf(", %x -> ", rm);
+ DFP_VAL_PRINT(out, _Decimal64);
+ printf("\n");
+}
+
+void quantize64(_Decimal64 op, _Decimal64 quan)
+{
+ uint8_t i;
+
+ for (i = 0; i < 16; i++)
+ qadtr(op, quan, i);
+}
+
+void qaxtr(_Decimal128 op, _Decimal128 quan, uint8_t rm)
+{
+ _Decimal128 out;
+
+ asm volatile (
+ ".insn rrf, 0xb3fd0000, %[out], %[quan], %[op], %[rm]\n\t"
+ :[out]"=f"(out)
+ :[op]"f"(op), [quan]"f"(quan), [rm]"d"(rm)
+ );
+ printf("QAXTR ");
+ DFP_VAL_PRINT(op, _Decimal128);
+ printf(", ");
+ DFP_VAL_PRINT(quan, _Decimal128);
+ printf(", %x -> ", rm);
+ DFP_VAL_PRINT(out, _Decimal128);
+ printf("\n");
+}
+
+void quantize128(_Decimal128 op, _Decimal128 quan)
+{
+ uint8_t i;
+
+ for (i = 0; i < 16; i++)
+ qaxtr(op, quan, i);
+}
+
+void rrdtr(_Decimal64 op, uint8_t sig, uint8_t rm)
+{
+ _Decimal64 out;
+
+ asm volatile (
+ ".insn rrf, 0xb3f70000, %[out], %[sig], %[op], %[rm]\n\t"
+ :[out]"=f"(out)
+ :[op]"f"(op), [sig]"d"(sig), [rm]"d"(rm)
+ );
+ printf("RRDTR ");
+ DFP_VAL_PRINT(op, _Decimal64);
+ printf(", %d, %x -> ", sig, rm);
+ DFP_VAL_PRINT(out, _Decimal64);
+ printf("\n");
+}
+
+void reround64(_Decimal64 op, uint8_t sig)
+{
+ uint8_t i;
+
+ for (i = 0; i < 16; i++)
+ rrdtr(op, sig, i);
+}
+
+void rrxtr(_Decimal128 op, uint8_t sig, uint8_t rm)
+{
+ _Decimal128 out;
+
+ asm volatile (
+ ".insn rrf, 0xb3ff0000, %[out], %[sig], %[op], %[rm]\n\t"
+ :[out]"=f"(out)
+ :[op]"f"(op), [sig]"d"(sig), [rm]"d"(rm)
+ );
+ printf("RRXTR ");
+ DFP_VAL_PRINT(op, _Decimal128);
+ printf(", %d, %x -> ", sig, rm);
+ DFP_VAL_PRINT(out, _Decimal128);
+ printf("\n");
+}
+
+void reround128(_Decimal128 op, uint8_t sig)
+{
+ uint8_t i;
+
+ for (i = 0; i < 16; i++)
+ rrxtr(op, sig, i);
+}
+
void sldt(_Decimal64 in, unsigned long amount)
{
_Decimal64 out;
@@ -122,6 +277,13 @@
_Decimal64 d64 = 50.0005DD;
_Decimal128 d128 = 50.0005DL;
+ eedtr(d64);
+ eedtr(-d64);
+ eedtr(0.DD);
+ eextr(d128);
+ eextr(-d128);
+ eextr(0.DL);
+
esdtr(d64);
esdtr(-d64);
esdtr(0.DD);
@@ -158,5 +320,57 @@
srxt(0.DL, 2);
srxt(-0.DL, 2);
+ d64 = 5.000005DD;
+ iedtr(d64, 391);
+ iedtr(d64, 392);
+ iedtr(d64, 393);
+ iedtr(-d64, 391);
+ iedtr(-d64, 392);
+ iedtr(-d64, 393);
+ iedtr(0.DD, 393);
+ iedtr(-0.DD, 393);
+ iedtr(1.DD, 393);
+
+ d128 = 5.000005DL;
+ iextr(d128, 6169);
+ iextr(d128, 6170);
+ iextr(d128, 6171);
+ iextr(-d128, 6169);
+ iextr(-d128, 6170);
+ iextr(-d128, 6171);
+ iextr(0.DL, 6171);
+ iextr(-0.DL, 6171);
+ iextr(1.DL, 6171);
+
+ d64 = 2.171234DD;
+ quantize64(d64, 0.001DD);
+ quantize64(-d64, 0.001DD);
+ quantize64(-d64, 0.DD);
+ quantize64(0.DD, 0.001DD);
+
+ d128 = 26365343648.171234DL;
+ quantize128(d128, 230.01DL);
+ quantize128(-d128, 230.01DL);
+ quantize128(d128, 0.DL);
+ quantize128(-0.DL, 230.01DL);
+
+ d64 = 2.174598DD;
+ reround64(d64, 3);
+ reround64(d64, 4);
+ reround64(d64, 5);
+ reround64(-d64, 3);
+ reround64(-d64, 4);
+ reround64(-d64, 5);
+ reround64(0.DD, 0);
+
+ d128 = 2.174598DL;
+ reround128(d128, 3);
+ reround128(d128, 4);
+ reround128(d128, 5);
+ reround128(-d128, 3);
+ reround128(-d128, 4);
+ reround128(-d128, 5);
+ reround128(0.DL, 0);
+
return 0;
}
Modified: trunk/none/tests/s390x/dfp-2.stdout.exp (+376 -0)
===================================================================
--- trunk/none/tests/s390x/dfp-2.stdout.exp 2013-02-08 23:34:31 +00:00 (rev 13285)
+++ trunk/none/tests/s390x/dfp-2.stdout.exp 2013-02-14 14:28:22 +00:00 (rev 13286)
@@ -1,3 +1,9 @@
+EEDTR 22280000000a0005 -> 394
+EEDTR a2280000000a0005 -> 394
+EEDTR 2238000000000000 -> 398
+EEXTR 2207000000000000000a0005 -> 6172
+EEXTR a207000000000000000a0005 -> 6172
+EEXTR 220800000000000000000000 -> 6176
ESDTR 22280000000a0005 -> 6
ESDTR a2280000000a0005 -> 6
ESDTR 2238000000000000 -> 0
@@ -26,3 +32,373 @@
SRXT a206c0000000000014d2e7971a1 -> a206c0000000000049c5de2c3
SRXT 220800000000000000000000 -> 220800000000000000000000
SRXT a20800000000000000000000 -> a20800000000000000000000
+IEDTR 2220000000500005, 391 -> 221c000000500005
+IEDTR 2220000000500005, 392 -> 2220000000500005
+IEDTR 2220000000500005, 393 -> 2224000000500005
+IEDTR a220000000500005, 391 -> a21c000000500005
+IEDTR a220000000500005, 392 -> a220000000500005
+IEDTR a220000000500005, 393 -> a224000000500005
+IEDTR 2238000000000000, 393 -> 2224000000000000
+IEDTR a238000000000000, 393 -> a224000000000000
+IEDTR 2238000000000001, 393 -> 2224000000000001
+IEXTR 220680000000000000500005, 6169 -> 220640000000000000500005
+IEXTR 220680000000000000500005, 6170 -> 220680000000000000500005
+IEXTR 220680000000000000500005, 6171 -> 2206c0000000000000500005
+IEXTR a20680000000000000500005, 6169 -> a20640000000000000500005
+IEXTR a20680000000000000500005, 6170 -> a20680000000000000500005
+IEXTR a20680000000000000500005, 6171 -> a206c0000000000000500005
+IEXTR 220800000000000000000000, 6171 -> 2206c0000000000000000000
+IEXTR a20800000000000000000000, 6171 -> a206c0000000000000000000
+IEXTR 220800000000000000000001, 6171 -> 2206c0000000000000000001
+QADTR 222000000023c534, 222c000000000001, 0 -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, 1 -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, 2 -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, 3 -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, 4 -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, 5 -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, 6 -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, 7 -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, 8 -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, 9 -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, a -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, b -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, c -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, d -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, e -> 222c0000000008f1
+QADTR 222000000023c534, 222c000000000001, f -> 222c0000000008f1
+QADTR a22000000023c534, 222c000000000001, 0 -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, 1 -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, 2 -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, 3 -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, 4 -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, 5 -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, 6 -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, 7 -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, 8 -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, 9 -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, a -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, b -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, c -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, d -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, e -> a22c0000000008f1
+QADTR a22000000023c534, 222c000000000001, f -> a22c0000000008f1
+QADTR a22000000023c534, 2238000000000000, 0 -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, 1 -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, 2 -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, 3 -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, 4 -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, 5 -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, 6 -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, 7 -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, 8 -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, 9 -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, a -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, b -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, c -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, d -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, e -> a238000000000002
+QADTR a22000000023c534, 2238000000000000, f -> a238000000000002
+QADTR 2238000000000000, 222c000000000001, 0 -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, 1 -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, 2 -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, 3 -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, 4 -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, 5 -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, 6 -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, 7 -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, 8 -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, 9 -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, a -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, b -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, c -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, d -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, e -> 222c000000000000
+QADTR 2238000000000000, 222c000000000001, f -> 222c000000000000
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, 0 -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, 1 -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, 2 -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, 3 -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, 4 -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, 5 -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, 6 -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, 7 -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, 8 -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, 9 -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, a -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, b -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, c -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, d -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, e -> 22078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220780000000000000008c01, f -> 22078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, 0 -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, 1 -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, 2 -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, 3 -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, 4 -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, 5 -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, 6 -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, 7 -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, 8 -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, 9 -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, a -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, b -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, c -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, d -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, e -> a2078000000000002cdab47931d
+QAXTR a20680000000000099e570f483c534, 220780000000000000008c01, f -> a2078000000000002cdab47931d
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, 0 -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, 1 -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, 2 -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, 3 -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, 4 -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, 5 -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, 6 -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, 7 -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, 8 -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, 9 -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, a -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, b -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, c -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, d -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, e -> 220800000000000099e570f48
+QAXTR 220680000000000099e570f483c534, 220800000000000000000000, f -> 220800000000000099e570f48
+QAXTR a20800000000000000000000, 220780000000000000008c01, 0 -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, 1 -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, 2 -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, 3 -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, 4 -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, 5 -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, 6 -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, 7 -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, 8 -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, 9 -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, a -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, b -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, c -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, d -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, e -> a20780000000000000000000
+QAXTR a20800000000000000000000, 220780000000000000008c01, f -> a20780000000000000000000
+RRDTR 222000000023d2de, 3, 0 -> 2230000000000117
+RRDTR 222000000023d2de, 3, 1 -> 2230000000000117
+RRDTR 222000000023d2de, 3, 2 -> 2230000000000117
+RRDTR 222000000023d2de, 3, 3 -> 2230000000000117
+RRDTR 222000000023d2de, 3, 4 -> 2230000000000117
+RRDTR 222000000023d2de, 3, 5 -> 2230000000000117
+RRDTR 222000000023d2de, 3, 6 -> 2230000000000117
+RRDTR 222000000023d2de, 3, 7 -> 2230000000000117
+RRDTR 222000000023d2de, 3, 8 -> 2230000000000117
+RRDTR 222000000023d2de, 3, 9 -> 2230000000000117
+RRDTR 222000000023d2de, 3, a -> 2230000000000117
+RRDTR 222000000023d2de, 3, b -> 2230000000000117
+RRDTR 222000000023d2de, 3, c -> 2230000000000117
+RRDTR 222000000023d2de, 3, d -> 2230000000000117
+RRDTR 222000000023d2de, 3, e -> 2230000000000117
+RRDTR 222000000023d2de, 3, f -> 2230000000000117
+RRDTR 222000000023d2de, 4, 0 -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, 1 -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, 2 -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, 3 -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, 4 -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, 5 -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, 6 -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, 7 -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, 8 -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, 9 -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, a -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, b -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, c -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, d -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, e -> 222c0000000008f5
+RRDTR 222000000023d2de, 4, f -> 222c0000000008f5
+RRDTR 222000000023d2de, 5, 0 -> 22280000000087c6
+RRDTR 222000000023d2de, 5, 1 -> 22280000000087c6
+RRDTR 222000000023d2de, 5, 2 -> 22280000000087c6
+RRDTR 222000000023d2de, 5, 3 -> 22280000000087c6
+RRDTR 222000000023d2de, 5, 4 -> 22280000000087c6
+RRDTR 222000000023d2de, 5, 5 -> 22280000000087c6
+RRDTR 222000000023d2de, 5, 6 -> 22280000000087c6
+RRDTR 222000000023d2de, 5, 7 -> 22280000000087c6
+RRDTR 222000000023d2de, 5, 8 -> 22280000000087c6
+RRDTR 222000000023d2de, 5, 9 -> 22280000000087c6
+RRDTR 222000000023d2de, 5, a -> 22280000000087c6
+RRDTR 222000000023d2de, 5, b -> 22280000000087c6
+RRDTR 222000000023d2de, 5, c -> 22280000000087c6
+RRDTR 222000000023d2de, 5, d -> 22280000000087c6
+RRDTR 222000000023d2de, 5, e -> 22280000000087c6
+RRDTR 222000000023d2de, 5, f -> 22280000000087c6
+RRDTR a22000000023d2de, 3, 0 -> a230000000000117
+RRDTR a22000000023d2de, 3, 1 -> a230000000000117
+RRDTR a22000000023d2de, 3, 2 -> a230000000000117
+RRDTR a22000000023d2de, 3, 3 -> a230000000000117
+RRDTR a22000000023d2de, 3, 4 -> a230000000000117
+RRDTR a22000000023d2de, 3, 5 -> a230000000000117
+RRDTR a22000000023d2de, 3, 6 -> a230000000000117
+RRDTR a22000000023d2de, 3, 7 -> a230000000000117
+RRDTR a22000000023d2de, 3, 8 -> a230000000000117
+RRDTR a22000000023d2de, 3, 9 -> a230000000000117
+RRDTR a22000000023d2de, 3, a -> a230000000000117
+RRDTR a22000000023d2de, 3, b -> a230000000000117
+RRDTR a22000000023d2de, 3, c -> a230000000000117
+RRDTR a22000000023d2de, 3, d -> a230000000000117
+RRDTR a22000000023d2de, 3, e -> a230000000000117
+RRDTR a22000000023d2de, 3, f -> a230000000000117
+RRDTR a22000000023d2de, 4, 0 -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, 1 -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, 2 -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, 3 -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, 4 -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, 5 -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, 6 -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, 7 -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, 8 -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, 9 -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, a -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, b -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, c -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, d -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, e -> a22c0000000008f5
+RRDTR a22000000023d2de, 4, f -> a22c0000000008f5
+RRDTR a22000000023d2de, 5, 0 -> a2280000000087c6
+RRDTR a22000000023d2de, 5, 1 -> a2280000000087c6
+RRDTR a22000000023d2de, 5, 2 -> a2280000000087c6
+RRDTR a22000000023d2de, 5, 3 -> a2280000000087c6
+RRDTR a22000000023d2de, 5, 4 -> a2280000000087c6
+RRDTR a22000000023d2de, 5, 5 -> a2280000000087c6
+RRDTR a22000000023d2de, 5, 6 -> a2280000000087c6
+RRDTR a22000000023d2de, 5, 7 -> a2280000000087c6
+RRDTR a22000000023d2de, 5, 8 -> a2280000000087c6
+RRDTR a22000000023d2de, 5, 9 -> a2280000000087c6
+RRDTR a22000000023d2de, 5, a -> a2280000000087c6
+RRDTR a22000000023d2de, 5, b -> a2280000000087c6
+RRDTR a22000000023d2de, 5, c -> a2280000000087c6
+RRDTR a22000000023d2de, 5, d -> a2280000000087c6
+RRDTR a22000000023d2de, 5, e -> a2280000000087c6
+RRDTR a22000000023d2de, 5, f -> a2280000000087c6
+RRDTR 2238000000000000, 0, 0 -> 2238000000000000
+RRDTR 2238000000000000, 0, 1 -> 2238000000000000
+RRDTR 2238000000000000, 0, 2 -> 2238000000000000
+RRDTR 2238000000000000, 0, 3 -> 2238000000000000
+RRDTR 2238000000000000, 0, 4 -> 2238000000000000
+RRDTR 2238000000000000, 0, 5 -> 2238000000000000
+RRDTR 2238000000000000, 0, 6 -> 2238000000000000
+RRDTR 2238000000000000, 0, 7 -> 2238000000000000
+RRDTR 2238000000000000, 0, 8 -> 2238000000000000
+RRDTR 2238000000000000, 0, 9 -> 2238000000000000
+RRDTR 2238000000000000, 0, a -> 2238000000000000
+RRDTR 2238000000000000, 0, b -> 2238000000000000
+RRDTR 2238000000000000, 0, c -> 2238000000000000
+RRDTR 2238000000000000, 0, d -> 2238000000000000
+RRDTR 2238000000000000, 0, e -> 2238000000000000
+RRDTR 2238000000000000, 0, f -> 2238000000000000
+RRXTR 22068000000000000023d2de, 3, 0 -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, 1 -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, 2 -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, 3 -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, 4 -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, 5 -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, 6 -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, 7 -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, 8 -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, 9 -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, a -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, b -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, c -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, d -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, e -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 3, f -> 220780000000000000000117
+RRXTR 22068000000000000023d2de, 4, 0 -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 4, 1 -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 4, 2 -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 4, 3 -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 4, 4 -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 4, 5 -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 4, 6 -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 4, 7 -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 4, 8 -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 4, 9 -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 4, a -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 4, b -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 4, c -> 2207400000000000000008f5
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+RRXTR 22068000000000000023d2de, 4, f -> 2207400000000000000008f5
+RRXTR 22068000000000000023d2de, 5, 0 -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, 1 -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, 2 -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, 3 -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, 4 -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, 5 -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, 6 -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, 7 -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, 8 -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, 9 -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, a -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, b -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, c -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, d -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, e -> 2207000000000000000087c6
+RRXTR 22068000000000000023d2de, 5, f -> 2207000000000000000087c6
+RRXTR a2068000000000000023d2de, 3, 0 -> a20780000000000000000117
+RRXTR a2068000000000000023d2de, 3, 1 -> a20780000000000000000117
+RRXTR a2068000000000000023d2de, 3, 2 -> a20780000000000000000117
+RRXTR a2068000000000000023d2de, 3, 3 -> a20780000000000000000117
+RRXTR a2068000000000000023d2de, 3, 4 -> a20780000000000000000117
+RRXTR a2068000000000000023d2de, 3, 5 -> a20780000000000000000117
+RRXTR a2068000000000000023d2de, 3, 6 -> a20780000000000000000117
+RRXTR a2068000000000000023d2de, 3, 7 -> a20780000000000000000117
+RRXTR a2068000000000000023d2de, 3, 8 -> a20780000000000000000117
+RRXTR a2068000000000000023d2de, 3, 9 -> a20780000000000000000117
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+RRXTR a2068000000000000023d2de, 3, b -> a20780000000000000000117
+RRXTR a2068000000000000023d2de, 3, c -> a20780000000000000000117
+RRXTR a2068000000000000023d2de, 3, d -> a20780000000000000000117
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+RRXTR a2068000000000000023d2de, 3, f -> a20780000000000000000117
+RRXTR a2068000000000000023d2de, 4, 0 -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, 1 -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, 2 -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, 3 -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, 4 -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, 5 -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, 6 -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, 7 -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, 8 -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, 9 -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, a -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, b -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, c -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, d -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, e -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 4, f -> a207400000000000000008f5
+RRXTR a2068000000000000023d2de, 5, 0 -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, 1 -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, 2 -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, 3 -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, 4 -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, 5 -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, 6 -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, 7 -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, 8 -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, 9 -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, a -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, b -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, c -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, d -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, e -> a207000000000000000087c6
+RRXTR a2068000000000000023d2de, 5, f -> a207000000000000000087c6
+RRXTR 220800000000000000000000, 0, 0 -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, 1 -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, 2 -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, 3 -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, 4 -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, 5 -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, 6 -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, 7 -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, 8 -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, 9 -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, a -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, b -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, c -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, d -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, e -> 220800000000000000000000
+RRXTR 220800000000000000000000, 0, f -> 220800000000000000000000
|
|
From: <sv...@va...> - 2013-02-14 14:27:25
|
florian 2013-02-14 14:27:12 +0000 (Thu, 14 Feb 2013)
New Revision: 2684
Log:
s390: Support the following DFP insns:
- extract basied exponent
- insert biased exponent
- quantize
- reround to significance
Patch by Maran Pakkirisamy (ma...@li...).
Part of fixing BZ #307113.
Modified files:
trunk/priv/guest_s390_toIR.c
trunk/priv/host_s390_defs.c
trunk/priv/host_s390_defs.h
trunk/priv/host_s390_isel.c
Modified: trunk/priv/host_s390_defs.h (+20 -3)
===================================================================
--- trunk/priv/host_s390_defs.h 2013-02-11 16:06:03 +00:00 (rev 2683)
+++ trunk/priv/host_s390_defs.h 2013-02-14 14:27:12 +00:00 (rev 2684)
@@ -146,6 +146,7 @@
S390_INSN_DFP_INTOP,
S390_INSN_DFP_COMPARE,
S390_INSN_DFP_CONVERT,
+ S390_INSN_DFP_REROUND,
S390_INSN_MFENCE,
S390_INSN_MIMM, /* Assign an immediate constant to a memory location */
S390_INSN_MADD, /* Add a value to a memory location */
@@ -270,11 +271,14 @@
S390_DFP_ADD,
S390_DFP_SUB,
S390_DFP_MUL,
- S390_DFP_DIV
+ S390_DFP_DIV,
+ S390_DFP_QUANTIZE
} s390_dfp_binop_t;
/* The kind of unary DFP operations */
typedef enum {
+ S390_DFP_EXTRACT_EXP_D64,
+ S390_DFP_EXTRACT_EXP_D128,
S390_DFP_EXTRACT_SIG_D64,
S390_DFP_EXTRACT_SIG_D128,
} s390_dfp_unop_t;
@@ -282,7 +286,8 @@
/* The DFP operations with 2 operands one of them being integer */
typedef enum {
S390_DFP_SHIFT_LEFT,
- S390_DFP_SHIFT_RIGHT
+ S390_DFP_SHIFT_RIGHT,
+ S390_DFP_INSERT_EXP
} s390_dfp_intop_t;
/* The kind of DFP compare operations */
@@ -291,7 +296,6 @@
S390_DFP_COMPARE_EXP,
} s390_dfp_cmp_t;
-
/* The details of a CDAS insn. Carved out to keep the size of
s390_insn low */
typedef struct {
@@ -509,6 +513,14 @@
HReg op2_hi; /* 128-bit operand high part; 64-bit opnd 2 */
HReg op2_lo; /* 128-bit operand low part */
} dfp_compare;
+ struct {
+ s390_dfp_round_t rounding_mode;
+ HReg dst_hi; /* 128-bit result high part; 64-bit result */
+ HReg dst_lo; /* 128-bit result low part */
+ HReg op2; /* integer operand */
+ HReg op3_hi; /* 128-bit operand high part; 64-bit opnd */
+ HReg op3_lo; /* 128-bit operand low part */
+ } dfp_reround;
/* Miscellaneous */
struct {
@@ -626,6 +638,8 @@
HReg op1, HReg op2);
s390_insn *s390_insn_dfp_convert(UChar size, s390_dfp_conv_t tag, HReg dst,
HReg op, s390_dfp_round_t);
+s390_insn *s390_insn_dfp_reround(UChar size, HReg dst, HReg op2, HReg op3,
+ s390_dfp_round_t);
s390_insn *s390_insn_dfp128_binop(UChar size, s390_dfp_binop_t, HReg dst_hi,
HReg dst_lo, HReg op2_hi, HReg op2_lo,
HReg op3_hi, HReg op3_lo,
@@ -643,6 +657,9 @@
s390_insn *s390_insn_dfp128_convert_from(UChar size, s390_dfp_conv_t,
HReg dst, HReg op_hi, HReg op_lo,
s390_dfp_round_t);
+s390_insn *s390_insn_dfp128_reround(UChar size, HReg dst_hi, HReg dst_lo,
+ HReg op2, HReg op3_hi, HReg op3_lo,
+ s390_dfp_round_t);
s390_insn *s390_insn_mfence(void);
s390_insn *s390_insn_mimm(UChar size, s390_amode *dst, ULong value);
s390_insn *s390_insn_madd(UChar size, s390_amode *dst, UChar delta,
Modified: trunk/priv/host_s390_defs.c (+197 -0)
===================================================================
--- trunk/priv/host_s390_defs.c 2013-02-11 16:06:03 +00:00 (rev 2683)
+++ trunk/priv/host_s390_defs.c 2013-02-14 14:27:12 +00:00 (rev 2684)
@@ -765,6 +765,16 @@
addHRegUse(u, HRmRead, insn->variant.dfp_convert.op_lo); /* operand */
break;
+ case S390_INSN_DFP_REROUND:
+ addHRegUse(u, HRmWrite, insn->variant.dfp_reround.dst_hi);
+ addHRegUse(u, HRmRead, insn->variant.dfp_reround.op2); /* left */
+ addHRegUse(u, HRmRead, insn->variant.dfp_reround.op3_hi); /* right */
+ if (insn->size == 16) {
+ addHRegUse(u, HRmWrite, insn->variant.dfp_reround.dst_lo);
+ addHRegUse(u, HRmRead, insn->variant.dfp_reround.op3_lo); /* right */
+ }
+ break;
+
case S390_INSN_MIMM:
s390_amode_get_reg_usage(u, insn->variant.mimm.dst);
break;
@@ -1083,6 +1093,21 @@
lookupHRegRemap(m, insn->variant.dfp_convert.op_lo);
break;
+ case S390_INSN_DFP_REROUND:
+ insn->variant.dfp_reround.dst_hi =
+ lookupHRegRemap(m, insn->variant.dfp_reround.dst_hi);
+ insn->variant.dfp_reround.op2 =
+ lookupHRegRemap(m, insn->variant.dfp_reround.op2);
+ insn->variant.dfp_reround.op3_hi =
+ lookupHRegRemap(m, insn->variant.dfp_reround.op3_hi);
+ if (insn->size == 16) {
+ insn->variant.dfp_reround.dst_lo =
+ lookupHRegRemap(m, insn->variant.dfp_reround.dst_lo);
+ insn->variant.dfp_reround.op3_lo =
+ lookupHRegRemap(m, insn->variant.dfp_reround.op3_lo);
+ }
+ break;
+
case S390_INSN_MIMM:
s390_amode_map_regs(m, insn->variant.mimm.dst);
break;
@@ -4446,6 +4471,26 @@
static UChar *
+s390_emit_EEDTR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, FPR), "eedtr", r1, r2);
+
+ return emit_RRE(p, 0xb3e50000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_EEXTR(UChar *p, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, FPR), "eextr", r1, r2);
+
+ return emit_RRE(p, 0xb3ed0000, r1, r2);
+}
+
+
+static UChar *
s390_emit_ESDTR(UChar *p, UChar r1, UChar r2)
{
if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
@@ -4466,6 +4511,26 @@
static UChar *
+s390_emit_IEDTR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, FPR, FPR, GPR), "iedtr", r1, r3, r2);
+
+ return emit_RRF(p, 0xb3f60000, r3, r1, r2);
+}
+
+
+static UChar *
+s390_emit_IEXTR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, FPR, FPR, GPR), "iextr", r1, r3, r2);
+
+ return emit_RRF(p, 0xb3fe0000, r3, r1, r2);
+}
+
+
+static UChar *
s390_emit_LDETR(UChar *p, UChar m4, UChar r1, UChar r2)
{
vassert(s390_host_has_dfp);
@@ -4552,6 +4617,50 @@
static UChar *
+s390_emit_QADTR(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "qadtr", r1, r3, r2, m4);
+
+ return emit_RRF4(p, 0xb3f50000, r3, m4, r1, r2);
+}
+
+
+static UChar *
+s390_emit_QAXTR(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "qaxtr", r1, r3, r2, m4);
+
+ return emit_RRF4(p, 0xb3fd0000, r3, m4, r1, r2);
+}
+
+
+static UChar *
+s390_emit_RRDTR(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC5(MNM, FPR, FPR, GPR, UINT), "rrdtr", r1, r3, r2, m4);
+
+ return emit_RRF4(p, 0xb3f70000, r3, m4, r1, r2);
+}
+
+
+static UChar *
+s390_emit_RRXTR(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC5(MNM, FPR, FPR, GPR, UINT), "rrxtr", r1, r3, r2, m4);
+
+ return emit_RRF4(p, 0xb3ff0000, r3, m4, r1, r2);
+}
+
+
+static UChar *
s390_emit_SDTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
{
vassert(s390_host_has_dfp);
@@ -5868,6 +5977,27 @@
s390_insn *
+s390_insn_dfp_reround(UChar size, HReg dst, HReg op2, HReg op3,
+ s390_dfp_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 8);
+
+ insn->tag = S390_INSN_DFP_REROUND;
+ insn->size = size;
+ insn->variant.dfp_reround.dst_hi = dst;
+ insn->variant.dfp_reround.op2 = op2;
+ insn->variant.dfp_reround.op3_hi = op3;
+ insn->variant.dfp_reround.dst_lo = INVALID_HREG;
+ insn->variant.dfp_reround.op3_lo = INVALID_HREG;
+ insn->variant.dfp_reround.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
s390_insn_dfp128_binop(UChar size, s390_dfp_binop_t tag, HReg dst_hi,
HReg dst_lo, HReg op2_hi, HReg op2_lo, HReg op3_hi,
HReg op3_lo, s390_dfp_round_t rounding_mode)
@@ -6019,6 +6149,30 @@
s390_insn *
+s390_insn_dfp128_reround(UChar size, HReg dst_hi, HReg dst_lo, HReg op2,
+ HReg op3_hi, HReg op3_lo,
+ s390_dfp_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 16);
+ vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
+ vassert(is_valid_fp128_regpair(op3_hi, op3_lo));
+
+ insn->tag = S390_INSN_DFP_REROUND;
+ insn->size = size;
+ insn->variant.dfp_reround.dst_hi = dst_hi;
+ insn->variant.dfp_reround.dst_lo = dst_lo;
+ insn->variant.dfp_reround.op2 = op2;
+ insn->variant.dfp_reround.op3_hi = op3_hi;
+ insn->variant.dfp_reround.op3_lo = op3_lo;
+ insn->variant.dfp_reround.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
s390_insn_mfence(void)
{
s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
@@ -6605,6 +6759,7 @@
case S390_DFP_SUB: op = "v-dsub"; break;
case S390_DFP_MUL: op = "v-dmul"; break;
case S390_DFP_DIV: op = "v-ddiv"; break;
+ case S390_DFP_QUANTIZE: op = "v-dqua"; break;
default: goto fail;
}
s390_sprintf(buf, "%M %R,%R,%R", op, dfp_binop->dst_hi,
@@ -6614,6 +6769,8 @@
case S390_INSN_DFP_UNOP:
switch (insn->variant.dfp_unop.tag) {
+ case S390_DFP_EXTRACT_EXP_D64:
+ case S390_DFP_EXTRACT_EXP_D128: op = "v-d2exp"; break;
case S390_DFP_EXTRACT_SIG_D64:
case S390_DFP_EXTRACT_SIG_D128: op = "v-d2sig"; break;
default: goto fail;
@@ -6626,6 +6783,7 @@
switch (insn->variant.dfp_intop.tag) {
case S390_DFP_SHIFT_LEFT: op = "v-dshl"; break;
case S390_DFP_SHIFT_RIGHT: op = "v-dshr"; break;
+ case S390_DFP_INSERT_EXP: op = "v-diexp"; break;
default: goto fail;
}
s390_sprintf(buf, "%M %R,%R,%R", op, insn->variant.dfp_intop.dst_hi,
@@ -6672,6 +6830,13 @@
insn->variant.dfp_convert.op_hi);
break;
+ case S390_INSN_DFP_REROUND:
+ s390_sprintf(buf, "%M %R,%R,%R", "v-drrnd",
+ insn->variant.dfp_reround.dst_hi,
+ insn->variant.dfp_reround.op2,
+ insn->variant.dfp_reround.op3_hi);
+ break;
+
case S390_INSN_MFENCE:
s390_sprintf(buf, "%M", "v-mfence");
return buf; /* avoid printing "size = ..." which is meaningless */
@@ -8844,6 +9009,7 @@
case S390_DFP_SUB: return s390_emit_SDTRA(buf, r3, m4, r1, r2);
case S390_DFP_MUL: return s390_emit_MDTRA(buf, r3, m4, r1, r2);
case S390_DFP_DIV: return s390_emit_DDTRA(buf, r3, m4, r1, r2);
+ case S390_DFP_QUANTIZE: return s390_emit_QADTR(buf, r3, m4, r1, r2);
default: goto fail;
}
break;
@@ -8854,6 +9020,7 @@
case S390_DFP_SUB: return s390_emit_SXTRA(buf, r3, m4, r1, r2);
case S390_DFP_MUL: return s390_emit_MXTRA(buf, r3, m4, r1, r2);
case S390_DFP_DIV: return s390_emit_DXTRA(buf, r3, m4, r1, r2);
+ case S390_DFP_QUANTIZE: return s390_emit_QAXTR(buf, r3, m4, r1, r2);
default: goto fail;
}
break;
@@ -8867,12 +9034,36 @@
static UChar *
+s390_insn_dfp_reround_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1 = hregNumber(insn->variant.dfp_reround.dst_hi);
+ UInt r2 = hregNumber(insn->variant.dfp_reround.op2);
+ UInt r3 = hregNumber(insn->variant.dfp_reround.op3_hi);
+ s390_dfp_round_t m4 = insn->variant.dfp_reround.rounding_mode;
+
+ switch (insn->size) {
+ case 8:
+ return s390_emit_RRDTR(buf, r3, m4, r1, r2);
+
+ case 16:
+ return s390_emit_RRXTR(buf, r3, m4, r1, r2);
+
+ default: goto fail;
+ }
+ fail:
+ vpanic("s390_insn_dfp_reround_emit");
+}
+
+
+static UChar *
s390_insn_dfp_unop_emit(UChar *buf, const s390_insn *insn)
{
UInt r1 = hregNumber(insn->variant.dfp_unop.dst_hi);
UInt r2 = hregNumber(insn->variant.dfp_unop.op_hi);
switch (insn->variant.dfp_unop.tag) {
+ case S390_DFP_EXTRACT_EXP_D64: return s390_emit_EEDTR(buf, r1, r2); break;
+ case S390_DFP_EXTRACT_EXP_D128: return s390_emit_EEXTR(buf, r1, r2); break;
case S390_DFP_EXTRACT_SIG_D64: return s390_emit_ESDTR(buf, r1, r2); break;
case S390_DFP_EXTRACT_SIG_D128: return s390_emit_ESXTR(buf, r1, r2); break;
default: goto fail;
@@ -8894,6 +9085,7 @@
switch (insn->variant.dfp_intop.tag) {
case S390_DFP_SHIFT_LEFT: return s390_emit_SLDT(buf, r3, r1, r2);
case S390_DFP_SHIFT_RIGHT: return s390_emit_SRDT(buf, r3, r1, r2);
+ case S390_DFP_INSERT_EXP: return s390_emit_IEDTR(buf, r3, r1, r2);
default: goto fail;
}
break;
@@ -8902,6 +9094,7 @@
switch (insn->variant.dfp_intop.tag) {
case S390_DFP_SHIFT_LEFT: return s390_emit_SLXT(buf, r3, r1, r2);
case S390_DFP_SHIFT_RIGHT: return s390_emit_SRXT(buf, r3, r1, r2);
+ case S390_DFP_INSERT_EXP: return s390_emit_IEXTR(buf, r3, r1, r2);
default: goto fail;
}
break;
@@ -9658,6 +9851,10 @@
end = s390_insn_dfp_convert_emit(buf, insn);
break;
+ case S390_INSN_DFP_REROUND:
+ end = s390_insn_dfp_reround_emit(buf, insn);
+ break;
+
case S390_INSN_MFENCE:
end = s390_insn_mfence_emit(buf, insn);
break;
Modified: trunk/priv/guest_s390_toIR.c (+206 -8)
===================================================================
--- trunk/priv/guest_s390_toIR.c 2013-02-11 16:06:03 +00:00 (rev 2683)
+++ trunk/priv/guest_s390_toIR.c 2013-02-14 14:27:12 +00:00 (rev 2684)
@@ -2016,6 +2016,16 @@
}
static void
+s390_format_RRF_F0FR(const HChar *(*irgen)(UChar, UChar, UChar),
+ UChar r3, UChar r1, UChar r2)
+{
+ const HChar *mnm = irgen(r3, r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, FPR, FPR, GPR), mnm, r1, r3, r2);
+}
+
+static void
s390_format_RRF_UUFF(const HChar *(*irgen)(UChar m3, UChar m4, UChar r1,
UChar r2),
UChar m3, UChar m4, UChar r1, UChar r2)
@@ -2080,6 +2090,26 @@
}
static void
+s390_format_RRF_FFRU(const HChar *(*irgen)(UChar, UChar, UChar, UChar),
+ UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ const HChar *mnm = irgen(r3, m4, r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(MNM, FPR, FPR, GPR, UINT), mnm, r1, r3, r2, m4);
+}
+
+static void
+s390_format_RRF_FUFF(const HChar *(*irgen)(UChar, UChar, UChar, UChar),
+ UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ const HChar *mnm = irgen(r3, m4, r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), mnm, r1, r3, r2, m4);
+}
+
+static void
s390_format_RRF_FUFF2(const HChar *(*irgen)(UChar, UChar, UChar, UChar),
UChar r3, UChar m4, UChar r1, UChar r2)
{
@@ -9713,6 +9743,24 @@
}
static const HChar *
+s390_irgen_EEDTR(UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+
+ put_gpr_dw0(r1, unop(Iop_ExtractExpD64, get_dpr_dw0(r2)));
+ return "eedtr";
+}
+
+static const HChar *
+s390_irgen_EEXTR(UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+
+ put_gpr_dw0(r1, unop(Iop_ExtractExpD128, get_dpr_pair(r2)));
+ return "eextr";
+}
+
+static const HChar *
s390_irgen_ESDTR(UChar r1, UChar r2)
{
vassert(s390_host_has_dfp);
@@ -9729,6 +9777,40 @@
}
static const HChar *
+s390_irgen_IEDTR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_D64);
+ IRTemp result = newTemp(Ity_D64);
+
+ vassert(s390_host_has_dfp);
+
+ assign(op1, get_gpr_dw0(r2));
+ assign(op2, get_dpr_dw0(r3));
+ assign(result, binop(Iop_InsertExpD64, mkexpr(op1), mkexpr(op2)));
+ put_dpr_dw0(r1, mkexpr(result));
+
+ return "iedtr";
+}
+
+static const HChar *
+s390_irgen_IEXTR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_D128);
+ IRTemp result = newTemp(Ity_D128);
+
+ vassert(s390_host_has_dfp);
+
+ assign(op1, get_gpr_dw0(r2));
+ assign(op2, get_dpr_pair(r3));
+ assign(result, binop(Iop_InsertExpD128, mkexpr(op1), mkexpr(op2)));
+ put_dpr_pair(r1, mkexpr(result));
+
+ return "iextr";
+}
+
+static const HChar *
s390_irgen_LDETR(UChar m4 __attribute__((unused)), UChar r1, UChar r2)
{
IRTemp op = newTemp(Ity_D32);
@@ -9869,6 +9951,110 @@
}
static const HChar *
+s390_irgen_QADTR(UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_D64);
+ IRTemp op2 = newTemp(Ity_D64);
+ IRTemp result = newTemp(Ity_D64);
+ IRTemp rounding_mode;
+
+ vassert(s390_host_has_dfp);
+ /* If fpext is not installed and m4 is in 1:7,
+ rounding mode performed is unpredictable */
+ if (! s390_host_has_fpext && m4 > 0 && m4 < 8) {
+ emulation_warning(EmWarn_S390X_fpext_rounding);
+ m4 = S390_DFP_ROUND_PER_FPC_0;
+ }
+
+ rounding_mode = encode_dfp_rounding_mode(m4);
+ assign(op1, get_dpr_dw0(r2));
+ assign(op2, get_dpr_dw0(r3));
+ assign(result, triop(Iop_QuantizeD64, mkexpr(rounding_mode), mkexpr(op1),
+ mkexpr(op2)));
+ put_dpr_dw0(r1, mkexpr(result));
+
+ return "qadtr";
+}
+
+static const HChar *
+s390_irgen_QAXTR(UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_D128);
+ IRTemp op2 = newTemp(Ity_D128);
+ IRTemp result = newTemp(Ity_D128);
+ IRTemp rounding_mode;
+
+ vassert(s390_host_has_dfp);
+ /* If fpext is not installed and m4 is in 1:7,
+ rounding mode performed is unpredictable */
+ if (! s390_host_has_fpext && m4 > 0 && m4 < 8) {
+ emulation_warning(EmWarn_S390X_fpext_rounding);
+ m4 = S390_DFP_ROUND_PER_FPC_0;
+ }
+
+ rounding_mode = encode_dfp_rounding_mode(m4);
+ assign(op1, get_dpr_pair(r2));
+ assign(op2, get_dpr_pair(r3));
+ assign(result, triop(Iop_QuantizeD128, mkexpr(rounding_mode), mkexpr(op1),
+ mkexpr(op2)));
+ put_dpr_pair(r1, mkexpr(result));
+
+ return "qaxtr";
+}
+
+static const HChar *
+s390_irgen_RRDTR(UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ IRTemp op2 = newTemp(Ity_D64);
+ IRTemp result = newTemp(Ity_D64);
+ IRTemp rounding_mode;
+
+ vassert(s390_host_has_dfp);
+ /* If fpext is not installed and m4 is in 1:7,
+ rounding mode performed is unpredictable */
+ if (! s390_host_has_fpext && m4 > 0 && m4 < 8) {
+ emulation_warning(EmWarn_S390X_fpext_rounding);
+ m4 = S390_DFP_ROUND_PER_FPC_0;
+ }
+
+ rounding_mode = encode_dfp_rounding_mode(m4);
+ assign(op1, get_gpr_b7(r2));
+ assign(op2, get_dpr_dw0(r3));
+ assign(result, triop(Iop_SignificanceRoundD64, mkexpr(rounding_mode),
+ mkexpr(op1), mkexpr(op2)));
+ put_dpr_dw0(r1, mkexpr(result));
+
+ return "rrdtr";
+}
+
+static const HChar *
+s390_irgen_RRXTR(UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ IRTemp op2 = newTemp(Ity_D128);
+ IRTemp result = newTemp(Ity_D128);
+ IRTemp rounding_mode;
+
+ vassert(s390_host_has_dfp);
+ /* If fpext is not installed and m4 is in 1:7,
+ rounding mode performed is unpredictable */
+ if (! s390_host_has_fpext && m4 > 0 && m4 < 8) {
+ emulation_warning(EmWarn_S390X_fpext_rounding);
+ m4 = S390_DFP_ROUND_PER_FPC_0;
+ }
+
+ rounding_mode = encode_dfp_rounding_mode(m4);
+ assign(op1, get_gpr_b7(r2));
+ assign(op2, get_dpr_pair(r3));
+ assign(result, triop(Iop_SignificanceRoundD128, mkexpr(rounding_mode),
+ mkexpr(op1), mkexpr(op2)));
+ put_dpr_pair(r1, mkexpr(result));
+
+ return "rrxtr";
+}
+
+static const HChar *
s390_irgen_SDTRA(UChar r3, UChar m4, UChar r1, UChar r2)
{
IRTemp op1 = newTemp(Ity_D64);
@@ -14077,7 +14263,8 @@
case 0xb3e3: /* CSDTR */ goto unimplemented;
case 0xb3e4: s390_format_RRE_FF(s390_irgen_CDTR, ovl.fmt.RRE.r1,
ovl.fmt.RRE.r2); goto ok;
- case 0xb3e5: /* EEDTR */ goto unimplemented;
+ case 0xb3e5: s390_format_RRE_RF(s390_irgen_EEDTR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
case 0xb3e7: s390_format_RRE_RF(s390_irgen_ESDTR, ovl.fmt.RRE.r1,
ovl.fmt.RRE.r2); goto ok;
case 0xb3e8: /* KXTR */ goto unimplemented;
@@ -14088,7 +14275,8 @@
case 0xb3eb: /* CSXTR */ goto unimplemented;
case 0xb3ec: s390_format_RRE_FF(s390_irgen_CXTR, ovl.fmt.RRE.r1,
ovl.fmt.RRE.r2); goto ok;
- case 0xb3ed: /* EEXTR */ goto unimplemented;
+ case 0xb3ed: s390_format_RRE_RF(s390_irgen_EEXTR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
case 0xb3ef: s390_format_RRE_RF(s390_irgen_ESXTR, ovl.fmt.RRE.r1,
ovl.fmt.RRE.r2); goto ok;
case 0xb3f1: s390_format_RRF_UUFR(s390_irgen_CDGTRA, ovl.fmt.RRF2.m3,
@@ -14098,9 +14286,14 @@
case 0xb3f3: /* CDSTR */ goto unimplemented;
case 0xb3f4: s390_format_RRE_FF(s390_irgen_CEDTR, ovl.fmt.RRE.r1,
ovl.fmt.RRE.r2); goto ok;
- case 0xb3f5: /* QADTR */ goto unimplemented;
- case 0xb3f6: /* IEDTR */ goto unimplemented;
- case 0xb3f7: /* RRDTR */ goto unimplemented;
+ case 0xb3f5: s390_format_RRF_FUFF(s390_irgen_QADTR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.m4, ovl.fmt.RRF4.r1,
+ ovl.fmt.RRF4.r2); goto ok;
+ case 0xb3f6: s390_format_RRF_F0FR(s390_irgen_IEDTR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
+ case 0xb3f7: s390_format_RRF_FFRU(s390_irgen_RRDTR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.m4, ovl.fmt.RRF4.r1,
+ ovl.fmt.RRF4.r2); goto ok;
case 0xb3f9: s390_format_RRF_UUFR(s390_irgen_CXGTR, ovl.fmt.RRF2.m3,
ovl.fmt.RRF2.m4, ovl.fmt.RRF2.r1,
ovl.fmt.RRF2.r2); goto ok;
@@ -14108,9 +14301,14 @@
case 0xb3fb: /* CXSTR */ goto unimplemented;
case 0xb3fc: s390_format_RRE_FF(s390_irgen_CEXTR, ovl.fmt.RRE.r1,
ovl.fmt.RRE.r2); goto ok;
- case 0xb3fd: /* QAXTR */ goto unimplemented;
- case 0xb3fe: /* IEXTR */ goto unimplemented;
- case 0xb3ff: /* RRXTR */ goto unimplemented;
+ case 0xb3fd: s390_format_RRF_FUFF(s390_irgen_QAXTR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.m4, ovl.fmt.RRF4.r1,
+ ovl.fmt.RRF4.r2); goto ok;
+ case 0xb3fe: s390_format_RRF_F0FR(s390_irgen_IEXTR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
+ case 0xb3ff: s390_format_RRF_FFRU(s390_irgen_RRXTR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.m4, ovl.fmt.RRF4.r1,
+ ovl.fmt.RRF4.r2); goto ok;
case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
ovl.fmt.RRE.r2); goto ok;
case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
Modified: trunk/priv/host_s390_isel.c (+149 -71)
===================================================================
--- trunk/priv/host_s390_isel.c 2013-02-11 16:06:03 +00:00 (rev 2683)
+++ trunk/priv/host_s390_isel.c 2013-02-14 14:27:12 +00:00 (rev 2684)
@@ -1495,16 +1495,28 @@
return dst;
}
- if (unop == Iop_ExtractSigD64) {
+ if (unop == Iop_ExtractExpD64 || unop == Iop_ExtractSigD64) {
+ s390_dfp_unop_t dfpop;
+ switch(unop) {
+ case Iop_ExtractExpD64: dfpop = S390_DFP_EXTRACT_EXP_D64; break;
+ case Iop_ExtractSigD64: dfpop = S390_DFP_EXTRACT_SIG_D64; break;
+ default: goto irreducible;
+ }
dst = newVRegI(env);
h1 = s390_isel_dfp_expr(env, arg); /* Process the operand */
- addInstr(env,
- s390_insn_dfp_unop(size, S390_DFP_EXTRACT_SIG_D64, dst, h1));
+ addInstr(env, s390_insn_dfp_unop(size, dfpop, dst, h1));
return dst;
}
- if (unop == Iop_ExtractSigD128) {
+ if (unop == Iop_ExtractExpD128 || unop == Iop_ExtractSigD128) {
+ s390_dfp_unop_t dfpop;
HReg op_hi, op_lo, f13, f15;
+
+ switch(unop) {
+ case Iop_ExtractExpD128: dfpop = S390_DFP_EXTRACT_EXP_D128; break;
+ case Iop_ExtractSigD128: dfpop = S390_DFP_EXTRACT_SIG_D128; break;
+ default: goto irreducible;
+ }
dst = newVRegI(env);
s390_isel_dfp128_expr(&op_hi, &op_lo, env, arg); /* Process operand */
@@ -1516,8 +1528,7 @@
addInstr(env, s390_insn_move(8, f13, op_hi));
addInstr(env, s390_insn_move(8, f15, op_lo));
- addInstr(env, s390_insn_dfp128_unop(size, S390_DFP_EXTRACT_SIG_D128,
- dst, f13, f15));
+ addInstr(env, s390_insn_dfp128_unop(size, dfpop, dst, f13, f15));
return dst;
}
@@ -2417,9 +2428,6 @@
s390_dfp_binop_t dfpop;
HReg op1_hi, op1_lo, op2_hi, op2_lo, f9, f11, f12, f13, f14, f15;
- s390_isel_dfp128_expr(&op1_hi, &op1_lo, env, left); /* 1st operand */
- s390_isel_dfp128_expr(&op2_hi, &op2_lo, env, right); /* 2nd operand */
-
/* We use non-virtual registers as pairs with (f9, f11) as op1,
(f12, f14) as op2 and (f13, f15) as destination) */
f9 = make_fpr(9);
@@ -2429,42 +2437,68 @@
f14 = make_fpr(14);
f15 = make_fpr(15);
- /* 1st operand --> (f9, f11) */
- addInstr(env, s390_insn_move(8, f9, op1_hi));
- addInstr(env, s390_insn_move(8, f11, op1_lo));
+ switch (op) {
+ case Iop_AddD128: dfpop = S390_DFP_ADD; goto evaluate_dfp128;
+ case Iop_SubD128: dfpop = S390_DFP_SUB; goto evaluate_dfp128;
+ case Iop_MulD128: dfpop = S390_DFP_MUL; goto evaluate_dfp128;
+ case Iop_DivD128: dfpop = S390_DFP_DIV; goto evaluate_dfp128;
+ case Iop_QuantizeD128: dfpop = S390_DFP_QUANTIZE; goto evaluate_dfp128;
- /* 2nd operand --> (f12, f14) */
- addInstr(env, s390_insn_move(8, f12, op2_hi));
- addInstr(env, s390_insn_move(8, f14, op2_lo));
+ evaluate_dfp128: {
+ /* Process 1st operand */
+ s390_isel_dfp128_expr(&op1_hi, &op1_lo, env, left);
+ /* 1st operand --> (f9, f11) */
+ addInstr(env, s390_insn_move(8, f9, op1_hi));
+ addInstr(env, s390_insn_move(8, f11, op1_lo));
- switch (op) {
- case Iop_AddD128: dfpop = S390_DFP_ADD; break;
- case Iop_SubD128: dfpop = S390_DFP_SUB; break;
- case Iop_MulD128: dfpop = S390_DFP_MUL; break;
- case Iop_DivD128: dfpop = S390_DFP_DIV; break;
- default:
- goto irreducible;
+ /* Process 2nd operand */
+ s390_isel_dfp128_expr(&op2_hi, &op2_lo, env, right);
+ /* 2nd operand --> (f12, f14) */
+ addInstr(env, s390_insn_move(8, f12, op2_hi));
+ addInstr(env, s390_insn_move(8, f14, op2_lo));
+
+ /* DFP arithmetic ops take rounding mode only when fpext is
+ installed. But, DFP quantize operation takes rm irrespective
+ of fpext facility . */
+ if (s390_host_has_fpext || dfpop == Iop_QuantizeD128) {
+ rounding_mode = get_dfp_rounding_mode(env, irrm);
+ } else {
+ set_dfp_rounding_mode_in_fpc(env, irrm);
+ rounding_mode = S390_DFP_ROUND_PER_FPC_0;
+ }
+ addInstr(env, s390_insn_dfp128_binop(16, dfpop, f13, f15, f9, f11,
+ f12, f14, rounding_mode));
+ /* Move result to virtual destination register */
+ *dst_hi = newVRegF(env);
+ *dst_lo = newVRegF(env);
+ addInstr(env, s390_insn_move(8, *dst_hi, f13));
+ addInstr(env, s390_insn_move(8, *dst_lo, f15));
+ return;
}
- /* DFP binary ops have insns with rounding mode field
- when the floating point extension facility is installed. */
- if (s390_host_has_fpext) {
+ case Iop_SignificanceRoundD128: {
+ /* Process 1st operand */
+ HReg op1 = s390_isel_int_expr(env, left);
+ /* Process 2nd operand */
+ s390_isel_dfp128_expr(&op2_hi, &op2_lo, env, right);
+ /* 2nd operand --> (f12, f14) */
+ addInstr(env, s390_insn_move(8, f12, op2_hi));
+ addInstr(env, s390_insn_move(8, f14, op2_lo));
+
rounding_mode = get_dfp_rounding_mode(env, irrm);
- } else {
- set_dfp_rounding_mode_in_fpc(env, irrm);
- rounding_mode = S390_DFP_ROUND_PER_FPC_0;
+ addInstr(env, s390_insn_dfp128_reround(16, f13, f15, op1, f12, f14,
+ rounding_mode));
+ /* Move result to virtual destination register */
+ *dst_hi = newVRegF(env);
+ *dst_lo = newVRegF(env);
+ addInstr(env, s390_insn_move(8, *dst_hi, f13));
+ addInstr(env, s390_insn_move(8, *dst_lo, f15));
+ return;
}
- addInstr(env, s390_insn_dfp128_binop(16, dfpop, f13, f15, f9, f11,
- f12, f14, rounding_mode));
-
- /* Move result to virtual destination register */
- *dst_hi = newVRegF(env);
- *dst_lo = newVRegF(env);
- addInstr(env, s390_insn_move(8, *dst_hi, f13));
- addInstr(env, s390_insn_move(8, *dst_lo, f15));
-
- return;
+ default:
+ goto irreducible;
+ }
}
/* --------- BINARY OP --------- */
@@ -2477,15 +2511,29 @@
return;
case Iop_ShlD128:
- case Iop_ShrD128: {
+ case Iop_ShrD128:
+ case Iop_InsertExpD128: {
HReg op1_hi, op1_lo, op2, f9, f11, f13, f15;
s390_dfp_intop_t intop;
- IRExpr *left = expr->Iex.Binop.arg1;
- IRExpr *right = expr->Iex.Binop.arg2;
+ IRExpr *dfp_op;
+ IRExpr *int_op;
switch (expr->Iex.Binop.op) {
- case Iop_ShlD128: intop = S390_DFP_SHIFT_LEFT; break;
- case Iop_ShrD128: intop = S390_DFP_SHIFT_RIGHT; break;
+ case Iop_ShlD128: /* (D128, I64) -> D128 */
+ intop = S390_DFP_SHIFT_LEFT;
+ dfp_op = expr->Iex.Binop.arg1;
+ int_op = expr->Iex.Binop.arg2;
+ break;
+ case Iop_ShrD128: /* (D128, I64) -> D128 */
+ intop = S390_DFP_SHIFT_RIGHT;
+ dfp_op = expr->Iex.Binop.arg1;
+ int_op = expr->Iex.Binop.arg2;
+ break;
+ case Iop_InsertExpD128: /* (I64, D128) -> D128 */
+ intop = S390_DFP_INSERT_EXP;
+ int_op = expr->Iex.Binop.arg1;
+ dfp_op = expr->Iex.Binop.arg2;
+ break;
default: goto irreducible;
}
@@ -2496,11 +2544,13 @@
f13 = make_fpr(13); /* 128 bit dfp destination */
f15 = make_fpr(15);
- s390_isel_dfp128_expr(&op1_hi, &op1_lo, env, left); /* dfp operand */
+ /* Process dfp operand */
+ s390_isel_dfp128_expr(&op1_hi, &op1_lo, env, dfp_op);
+ /* op1 -> (f9,f11) */
addInstr(env, s390_insn_move(8, f9, op1_hi));
addInstr(env, s390_insn_move(8, f11, op1_lo));
- op2 = s390_isel_int_expr(env, right); /* int operand */
+ op2 = s390_isel_int_expr(env, int_op); /* int operand */
addInstr(env,
s390_insn_dfp128_intop(16, intop, f13, f15, op2, f9, f11));
@@ -2695,21 +2745,35 @@
}
case Iop_ShlD64:
- case Iop_ShrD64: {
+ case Iop_ShrD64:
+ case Iop_InsertExpD64: {
HReg op2;
HReg op3;
+ IRExpr *dfp_op;
+ IRExpr *int_op;
s390_dfp_intop_t intop;
- IRExpr *op1 = expr->Iex.Binop.arg1;
- IRExpr *shift = expr->Iex.Binop.arg2;
switch (expr->Iex.Binop.op) {
- case Iop_ShlD64: intop = S390_DFP_SHIFT_LEFT; break;
- case Iop_ShrD64: intop = S390_DFP_SHIFT_RIGHT; break;
+ case Iop_ShlD64: /* (D64, I64) -> D64 */
+ intop = S390_DFP_SHIFT_LEFT;
+ dfp_op = expr->Iex.Binop.arg1;
+ int_op = expr->Iex.Binop.arg2;
+ break;
+ case Iop_ShrD64: /* (D64, I64) -> D64 */
+ intop = S390_DFP_SHIFT_RIGHT;
+ dfp_op = expr->Iex.Binop.arg1;
+ int_op = expr->Iex.Binop.arg2;
+ break;
+ case Iop_InsertExpD64: /* (I64, D64) -> D64 */
+ intop = S390_DFP_INSERT_EXP;
+ int_op = expr->Iex.Binop.arg1;
+ dfp_op = expr->Iex.Binop.arg2;
+ break;
default: goto irreducible;
}
- op2 = s390_isel_int_expr(env, shift);
- op3 = s390_isel_dfp_expr(env, op1);
+ op2 = s390_isel_int_expr(env, int_op);
+ op3 = s390_isel_dfp_expr(env, dfp_op);
dst = newVRegF(env);
addInstr(env, s390_insn_dfp_intop(size, intop, dst, op2, op3));
@@ -2780,29 +2844,43 @@
s390_dfp_binop_t dfpop;
HReg op2, op3, dst;
- op2 = s390_isel_dfp_expr(env, left); /* Process 1st operand */
- op3 = s390_isel_dfp_expr(env, right); /* Process 2nd operand */
- dst = newVRegF(env);
switch (op) {
- case Iop_AddD64: dfpop = S390_DFP_ADD; break;
- case Iop_SubD64: dfpop = S390_DFP_SUB; break;
- case Iop_MulD64: dfpop = S390_DFP_MUL; break;
- case Iop_DivD64: dfpop = S390_DFP_DIV; break;
+ case Iop_AddD64: dfpop = S390_DFP_ADD; goto evaluate_dfp;
+ case Iop_SubD64: dfpop = S390_DFP_SUB; goto evaluate_dfp;
+ case Iop_MulD64: dfpop = S390_DFP_MUL; goto evaluate_dfp;
+ case Iop_DivD64: dfpop = S390_DFP_DIV; goto evaluate_dfp;
+ case Iop_QuantizeD64: dfpop = S390_DFP_QUANTIZE; goto evaluate_dfp;
+
+ evaluate_dfp: {
+ op2 = s390_isel_dfp_expr(env, left); /* Process 1st operand */
+ op3 = s390_isel_dfp_expr(env, right); /* Process 2nd operand */
+ dst = newVRegF(env);
+ /* DFP arithmetic ops take rounding mode only when fpext is
+ installed. But, DFP quantize operation takes rm irrespective
+ of fpext facility . */
+ if (s390_host_has_fpext || dfpop == S390_DFP_QUANTIZE) {
+ rounding_mode = get_dfp_rounding_mode(env, irrm);
+ } else {
+ set_dfp_rounding_mode_in_fpc(env, irrm);
+ rounding_mode = S390_DFP_ROUND_PER_FPC_0;
+ }
+ addInstr(env, s390_insn_dfp_binop(size, dfpop, dst, op2, op3,
+ rounding_mode));
+ return dst;
+ }
+
+ case Iop_SignificanceRoundD64:
+ op2 = s390_isel_int_expr(env, left); /* Process 1st operand */
+ op3 = s390_isel_dfp_expr(env, right); /* Process 2nd operand */
+ dst = newVRegF(env);
+ rounding_mode = get_dfp_rounding_mode(env, irrm);
+ addInstr(env, s390_insn_dfp_reround(size, dst, op2, op3,
+ rounding_mode));
+ return dst;
+
default:
goto irreducible;
}
- /* DFP binary ops have insns with rounding mode field
- when the floating point extension facility is installed. */
- if (s390_host_has_fpext) {
- rounding_mode = get_dfp_rounding_mode(env, irrm);
- } else {
- set_dfp_rounding_mode_in_fpc(env, irrm);
- rounding_mode = S390_DFP_ROUND_PER_FPC_0;
- }
-
- addInstr(env,
- s390_insn_dfp_binop(size, dfpop, dst, op2, op3, rounding_mode));
- return dst;
}
default:
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