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From: Kevin F. <kfi...@gm...> - 2011-01-10 21:22:00
|
I recently submitted a couple of patches to the bugzilla, I was wondering if there was anything I could do to help them get incorporated? The first is a pretty trivial compile problem 262219<https://bugs.kde.org/show_bug.cgi?id=262219> The other is a little more involved, but (at least for me) resolves a long standing issue 79362 <https://bugs.kde.org/show_bug.cgi?id=79362> I would be more than willing to put more effort into the patches if I were to get some feedback. Kevin Fitch |
|
From: <sv...@va...> - 2011-01-10 17:44:38
|
Author: sewardj
Date: 2011-01-10 17:44:30 +0000 (Mon, 10 Jan 2011)
New Revision: 2073
Log:
Fix bug in ppc64g_dirtyhelper_LVS (well, elsewhere, really) causing
incorrect Altivec lvsl/lvsr handling on ppc64. (bug 250038)
Modified:
trunk/priv/guest_ppc_helpers.c
Modified: trunk/priv/guest_ppc_helpers.c
===================================================================
--- trunk/priv/guest_ppc_helpers.c 2011-01-10 15:16:38 UTC (rev 2072)
+++ trunk/priv/guest_ppc_helpers.c 2011-01-10 17:44:30 UTC (rev 2073)
@@ -154,11 +154,17 @@
void ppc64g_dirtyhelper_LVS ( VexGuestPPC64State* gst,
UInt vD_off, UInt sh, UInt shift_right )
{
- static
- UChar ref[32] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
- 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
- 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F };
+ UChar ref[32];
+ ULong i;
+ /* ref[] used to be a static const array, but this doesn't work on
+ ppc64 because VEX doesn't load the TOC pointer for the call here,
+ and so we wind up picking up some totally random other data.
+ (It's a wonder we don't segfault.) So, just to be clear, this
+ "fix" (vex r2073) is really a kludgearound for the fact that
+ VEX's 64-bit ppc code generation doesn't provide a valid TOC
+ pointer for helper function calls. Ick. (Bug 250038) */
+ for (i = 0; i < 32; i++) ref[i] = i;
+
U128* pU128_src;
U128* pU128_dst;
|
|
From: <sv...@va...> - 2011-01-10 15:16:46
|
Author: sewardj
Date: 2011-01-10 15:16:38 +0000 (Mon, 10 Jan 2011)
New Revision: 2072
Log:
Implement ROUNDPD and ROUNDPS (imm rounding mode only).
Fixes #257063 (roundps) and #255963 (roundpd).
Modified:
trunk/priv/guest_amd64_toIR.c
Modified: trunk/priv/guest_amd64_toIR.c
===================================================================
--- trunk/priv/guest_amd64_toIR.c 2011-01-10 15:10:48 UTC (rev 2071)
+++ trunk/priv/guest_amd64_toIR.c 2011-01-10 15:16:38 UTC (rev 2072)
@@ -15230,7 +15230,8 @@
imm = insn[3+alen];
if (imm & ~3) goto decode_failure;
delta += 3+alen+1;
- DIP( "roundsd $%d,%s,%s\n",
+ DIP( "rounds%c $%d,%s,%s\n",
+ isD ? 'd' : 's',
imm, dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
}
@@ -15249,6 +15250,133 @@
goto decode_success;
}
+
+ /* 66 0F 3A 09 /r ib = ROUNDPD imm8, xmm2/m128, xmm1
+ (Partial implementation only -- only deal with cases where
+ the rounding mode is specified directly by the immediate byte.)
+ */
+ if (have66noF2noF3(pfx)
+ && sz == 2
+ && insn[0] == 0x0F && insn[1] == 0x3A && insn[2] == 0x09) {
+
+ IRTemp src0 = newTemp(Ity_F64);
+ IRTemp src1 = newTemp(Ity_F64);
+ IRTemp res0 = newTemp(Ity_F64);
+ IRTemp res1 = newTemp(Ity_F64);
+ Int imm = 0;
+
+ modrm = insn[3];
+
+ if (epartIsReg(modrm)) {
+ assign( src0,
+ getXMMRegLane64F( eregOfRexRM(pfx, modrm), 0 ) );
+ assign( src1,
+ getXMMRegLane64F( eregOfRexRM(pfx, modrm), 1 ) );
+ imm = insn[3+1];
+ if (imm & ~3) goto decode_failure;
+ delta += 3+1+1;
+ DIP( "roundpd $%d,%s,%s\n",
+ imm, nameXMMReg( eregOfRexRM(pfx, modrm) ),
+ nameXMMReg( gregOfRexRM(pfx, modrm) ) );
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta+3, dis_buf, 0 );
+ gen_SEGV_if_not_16_aligned(addr);
+ assign( src0, loadLE(Ity_F64,
+ binop(Iop_Add64, mkexpr(addr), mkU64(0) )));
+ assign( src1, loadLE(Ity_F64,
+ binop(Iop_Add64, mkexpr(addr), mkU64(8) )));
+ imm = insn[3+alen];
+ if (imm & ~3) goto decode_failure;
+ delta += 3+alen+1;
+ DIP( "roundpd $%d,%s,%s\n",
+ imm, dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
+ }
+
+ /* (imm & 3) contains an Intel-encoded rounding mode. Because
+ that encoding is the same as the encoding for IRRoundingMode,
+ we can use that value directly in the IR as a rounding
+ mode. */
+ assign(res0, binop(Iop_RoundF64toInt, mkU32(imm & 3), mkexpr(src0)) );
+ assign(res1, binop(Iop_RoundF64toInt, mkU32(imm & 3), mkexpr(src1)) );
+
+ putXMMRegLane64F( gregOfRexRM(pfx, modrm), 0, mkexpr(res0) );
+ putXMMRegLane64F( gregOfRexRM(pfx, modrm), 1, mkexpr(res1) );
+
+ goto decode_success;
+ }
+
+
+ /* 66 0F 3A 08 /r ib = ROUNDPS imm8, xmm2/m128, xmm1
+ (Partial implementation only -- only deal with cases where
+ the rounding mode is specified directly by the immediate byte.)
+ */
+ if (have66noF2noF3(pfx)
+ && sz == 2
+ && insn[0] == 0x0F && insn[1] == 0x3A && insn[2] == 0x08) {
+
+ IRTemp src0 = newTemp(Ity_F32);
+ IRTemp src1 = newTemp(Ity_F32);
+ IRTemp src2 = newTemp(Ity_F32);
+ IRTemp src3 = newTemp(Ity_F32);
+ IRTemp res0 = newTemp(Ity_F32);
+ IRTemp res1 = newTemp(Ity_F32);
+ IRTemp res2 = newTemp(Ity_F32);
+ IRTemp res3 = newTemp(Ity_F32);
+ Int imm = 0;
+
+ modrm = insn[3];
+
+ if (epartIsReg(modrm)) {
+ assign( src0,
+ getXMMRegLane32F( eregOfRexRM(pfx, modrm), 0 ) );
+ assign( src1,
+ getXMMRegLane32F( eregOfRexRM(pfx, modrm), 1 ) );
+ assign( src2,
+ getXMMRegLane32F( eregOfRexRM(pfx, modrm), 2 ) );
+ assign( src3,
+ getXMMRegLane32F( eregOfRexRM(pfx, modrm), 3 ) );
+ imm = insn[3+1];
+ if (imm & ~3) goto decode_failure;
+ delta += 3+1+1;
+ DIP( "roundps $%d,%s,%s\n",
+ imm, nameXMMReg( eregOfRexRM(pfx, modrm) ),
+ nameXMMReg( gregOfRexRM(pfx, modrm) ) );
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta+3, dis_buf, 0 );
+ gen_SEGV_if_not_16_aligned(addr);
+ assign( src0, loadLE(Ity_F32,
+ binop(Iop_Add64, mkexpr(addr), mkU64(0) )));
+ assign( src1, loadLE(Ity_F32,
+ binop(Iop_Add64, mkexpr(addr), mkU64(4) )));
+ assign( src2, loadLE(Ity_F32,
+ binop(Iop_Add64, mkexpr(addr), mkU64(8) )));
+ assign( src3, loadLE(Ity_F32,
+ binop(Iop_Add64, mkexpr(addr), mkU64(12) )));
+ imm = insn[3+alen];
+ if (imm & ~3) goto decode_failure;
+ delta += 3+alen+1;
+ DIP( "roundps $%d,%s,%s\n",
+ imm, dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
+ }
+
+ /* (imm & 3) contains an Intel-encoded rounding mode. Because
+ that encoding is the same as the encoding for IRRoundingMode,
+ we can use that value directly in the IR as a rounding
+ mode. */
+ assign(res0, binop(Iop_RoundF32toInt, mkU32(imm & 3), mkexpr(src0)) );
+ assign(res1, binop(Iop_RoundF32toInt, mkU32(imm & 3), mkexpr(src1)) );
+ assign(res2, binop(Iop_RoundF32toInt, mkU32(imm & 3), mkexpr(src2)) );
+ assign(res3, binop(Iop_RoundF32toInt, mkU32(imm & 3), mkexpr(src3)) );
+
+ putXMMRegLane32F( gregOfRexRM(pfx, modrm), 0, mkexpr(res0) );
+ putXMMRegLane32F( gregOfRexRM(pfx, modrm), 1, mkexpr(res1) );
+ putXMMRegLane32F( gregOfRexRM(pfx, modrm), 2, mkexpr(res2) );
+ putXMMRegLane32F( gregOfRexRM(pfx, modrm), 3, mkexpr(res3) );
+
+ goto decode_success;
+ }
+
+
/* F3 0F BD -- LZCNT (count leading zeroes. An AMD extension,
which we can only decode if we're sure this is an AMD cpu that
supports LZCNT, since otherwise it's BSR, which behaves
|
|
From: <sv...@va...> - 2011-01-10 15:10:57
|
Author: sewardj
Date: 2011-01-10 15:10:48 +0000 (Mon, 10 Jan 2011)
New Revision: 2071
Log:
Save an instruction on the normal idiom generated for smc-checks.
Modified:
trunk/priv/host_amd64_isel.c
trunk/priv/host_x86_isel.c
Modified: trunk/priv/host_amd64_isel.c
===================================================================
--- trunk/priv/host_amd64_isel.c 2011-01-10 15:08:41 UTC (rev 2070)
+++ trunk/priv/host_amd64_isel.c 2011-01-10 15:10:48 UTC (rev 2071)
@@ -2265,6 +2265,26 @@
}
}
+ /* CmpNE64(ccall, 64-bit constant) (--smc-check=all optimisation).
+ Saves a "movq %rax, %tmp" compared to the default route. */
+ if (e->tag == Iex_Binop
+ && e->Iex.Binop.op == Iop_CmpNE64
+ && e->Iex.Binop.arg1->tag == Iex_CCall
+ && e->Iex.Binop.arg2->tag == Iex_Const) {
+ IRExpr* cal = e->Iex.Binop.arg1;
+ IRExpr* con = e->Iex.Binop.arg2;
+ HReg tmp = newVRegI(env);
+ /* clone & partial-eval of generic Iex_CCall and Iex_Const cases */
+ vassert(cal->Iex.CCall.retty == Ity_I64); /* else ill-typed IR */
+ vassert(con->Iex.Const.con->tag == Ico_U64);
+ /* Marshal args, do the call. */
+ doHelperCall( env, False, NULL, cal->Iex.CCall.cee, cal->Iex.CCall.args );
+ addInstr(env, AMD64Instr_Imm64(con->Iex.Const.con->Ico.U64, tmp));
+ addInstr(env, AMD64Instr_Alu64R(Aalu_CMP,
+ AMD64RMI_Reg(hregAMD64_RAX()), tmp));
+ return Acc_NZ;
+ }
+
/* Cmp*64*(x,y) */
if (e->tag == Iex_Binop
&& (e->Iex.Binop.op == Iop_CmpEQ64
Modified: trunk/priv/host_x86_isel.c
===================================================================
--- trunk/priv/host_x86_isel.c 2011-01-10 15:08:41 UTC (rev 2070)
+++ trunk/priv/host_x86_isel.c 2011-01-10 15:10:48 UTC (rev 2071)
@@ -1835,6 +1835,25 @@
}
}
+ /* CmpNE32(ccall, 32-bit constant) (--smc-check=all optimisation).
+ Saves a "movl %eax, %tmp" compared to the default route. */
+ if (e->tag == Iex_Binop
+ && e->Iex.Binop.op == Iop_CmpNE32
+ && e->Iex.Binop.arg1->tag == Iex_CCall
+ && e->Iex.Binop.arg2->tag == Iex_Const) {
+ IRExpr* cal = e->Iex.Binop.arg1;
+ IRExpr* con = e->Iex.Binop.arg2;
+ /* clone & partial-eval of generic Iex_CCall and Iex_Const cases */
+ vassert(cal->Iex.CCall.retty == Ity_I32); /* else ill-typed IR */
+ vassert(con->Iex.Const.con->tag == Ico_U32);
+ /* Marshal args, do the call. */
+ doHelperCall( env, False, NULL, cal->Iex.CCall.cee, cal->Iex.CCall.args );
+ addInstr(env, X86Instr_Alu32R(Xalu_CMP,
+ X86RMI_Imm(con->Iex.Const.con->Ico.U32),
+ hregX86_EAX()));
+ return Xcc_NZ;
+ }
+
/* Cmp*32*(x,y) */
if (e->tag == Iex_Binop
&& (e->Iex.Binop.op == Iop_CmpEQ32
|
|
From: <sv...@va...> - 2011-01-10 15:09:31
|
Author: sewardj
Date: 2011-01-10 15:09:23 +0000 (Mon, 10 Jan 2011)
New Revision: 11495
Log:
Improve performance of smc-checks substantially, by:
(1) allowing translations to chase across BB boundaries, as in the
non-smc-check case
(2) on 64-bit targets, do the checksumming with 64-bit loads
instead of 32-bit ones.
(valgrind-side change, to match vex r2070)
Modified:
trunk/coregrind/m_translate.c
Modified: trunk/coregrind/m_translate.c
===================================================================
--- trunk/coregrind/m_translate.c 2011-01-10 15:01:03 UTC (rev 11494)
+++ trunk/coregrind/m_translate.c 2011-01-10 15:09:23 UTC (rev 11495)
@@ -752,10 +752,6 @@
if (!translations_allowable_from_seg(seg))
goto dontchase;
- /* Destination requires a self-check? */
- if (self_check_required(seg, closure->tid))
- goto dontchase;
-
/* Destination is redirected? */
if (addr != VG_(redir_do_lookup)(addr, NULL))
goto dontchase;
|
|
From: <sv...@va...> - 2011-01-10 15:08:50
|
Author: sewardj
Date: 2011-01-10 15:08:41 +0000 (Mon, 10 Jan 2011)
New Revision: 2070
Log:
Improve performance of smc-checks substantially, by:
(1) allowing translations to chase across BB boundaries, as in the
non-smc-check case
(2) on 64-bit targets, do the checksumming with 64-bit loads
instead of 32-bit ones.
(vex-side change)
Modified:
trunk/priv/guest_generic_bb_to_IR.c
Modified: trunk/priv/guest_generic_bb_to_IR.c
===================================================================
--- trunk/priv/guest_generic_bb_to_IR.c 2010-10-22 06:29:15 UTC (rev 2069)
+++ trunk/priv/guest_generic_bb_to_IR.c 2011-01-10 15:08:41 UTC (rev 2070)
@@ -69,6 +69,33 @@
__attribute__((regparm(1)))
static UInt genericg_compute_checksum_4al_12 ( HWord first_w32 );
+__attribute__((regparm(2)))
+static ULong genericg_compute_checksum_8al ( HWord first_w64, HWord n_w64s );
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_1 ( HWord first_w64 );
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_2 ( HWord first_w64 );
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_3 ( HWord first_w64 );
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_4 ( HWord first_w64 );
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_5 ( HWord first_w64 );
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_6 ( HWord first_w64 );
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_7 ( HWord first_w64 );
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_8 ( HWord first_w64 );
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_9 ( HWord first_w64 );
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_10 ( HWord first_w64 );
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_11 ( HWord first_w64 );
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_12 ( HWord first_w64 );
+
/* Small helpers */
static Bool const_False ( void* callback_opaque, Addr64 a ) {
return False;
@@ -173,16 +200,14 @@
: IRConst_U64(guest_IP_bbstart);
}
- /* If asked to make a self-checking translation, leave 5 spaces
- in which to put the check statements. We'll fill them in later
- when we know the length and adler32 of the area to check. */
+ /* If asked to make a self-checking translation, leave 15 spaces in
+ which to put the check statements (up to 3 extents, and 5 stmts
+ required for each). We'll fill them in later when we know the
+ extents and checksums of the areas to check. */
if (do_self_check) {
selfcheck_idx = irsb->stmts_used;
- addStmtToIRSB( irsb, IRStmt_NoOp() );
- addStmtToIRSB( irsb, IRStmt_NoOp() );
- addStmtToIRSB( irsb, IRStmt_NoOp() );
- addStmtToIRSB( irsb, IRStmt_NoOp() );
- addStmtToIRSB( irsb, IRStmt_NoOp() );
+ for (i = 0; i < 3 * 5; i++)
+ addStmtToIRSB( irsb, IRStmt_NoOp() );
}
/* If the caller supplied a function to add its own preamble, use
@@ -208,11 +233,6 @@
resteerOK
= toBool(
n_instrs < vex_control.guest_chase_thresh
- /* If making self-checking translations, don't chase
- .. it makes the checks too complicated. We only want
- to scan just one sequence of bytes in the check, not
- a whole bunch. */
- && !do_self_check
/* we can't afford to have a resteer once we're on the
last extent slot. */
&& vge->n_used < 3
@@ -401,72 +421,135 @@
*/
if (do_self_check) {
- UInt len2check, expected32;
+ Addr64 base2check;
+ UInt len2check;
+ HWord expectedhW;
IRTemp tistart_tmp, tilen_tmp;
- UInt (*fn_generic)(HWord, HWord) __attribute__((regparm(2)));
- UInt (*fn_spec)(HWord) __attribute__((regparm(1)));
+ HWord __attribute__((regparm(2))) (*fn_generic)(HWord, HWord);
+ HWord __attribute__((regparm(1))) (*fn_spec)(HWord);
HChar* nm_generic;
HChar* nm_spec;
HWord fn_generic_entry = 0;
HWord fn_spec_entry = 0;
+ UInt host_word_szB = sizeof(HWord);
+ IRType host_word_type = Ity_INVALID;
- vassert(vge->n_used == 1);
- len2check = vge->len[0];
+ if (host_word_szB == 4) host_word_type = Ity_I32;
+ if (host_word_szB == 8) host_word_type = Ity_I64;
+ vassert(host_word_type != Ity_INVALID);
- /* stay sane */
- vassert(len2check >= 0 && len2check < 1000/*arbitrary*/);
+ vassert(vge->n_used >= 1 && vge->n_used <= 3);
+ for (i = 0; i < vge->n_used; i++) {
- /* Skip the check if the translation involved zero bytes */
- if (len2check > 0) {
- HWord first_w32 = ((HWord)guest_code) & ~(HWord)3;
- HWord last_w32 = (((HWord)guest_code) + len2check - 1) & ~(HWord)3;
- vassert(first_w32 <= last_w32);
- HWord w32_diff = last_w32 - first_w32;
- vassert(0 == (w32_diff & 3));
- HWord w32s_to_check = (w32_diff + 4) / 4;
- vassert(w32s_to_check > 0 && w32s_to_check < 1004/*arbitrary*//4);
+ /* the extent we're generating a check for */
+ base2check = vge->base[i];
+ len2check = vge->len[i];
+ /* stay sane */
+ vassert(len2check >= 0 && len2check < 1000/*arbitrary*/);
+
+ /* Skip the check if the translation involved zero bytes */
+ if (len2check == 0)
+ continue;
+
+ HWord first_hW = ((HWord)base2check)
+ & ~(HWord)(host_word_szB-1);
+ HWord last_hW = (((HWord)base2check) + len2check - 1)
+ & ~(HWord)(host_word_szB-1);
+ vassert(first_hW <= last_hW);
+ HWord hW_diff = last_hW - first_hW;
+ vassert(0 == (hW_diff & (host_word_szB-1)));
+ HWord hWs_to_check = (hW_diff + host_word_szB) / host_word_szB;
+ vassert(hWs_to_check > 0
+ && hWs_to_check < 1004/*arbitrary*/ / host_word_szB);
+
/* vex_printf("%lx %lx %ld\n", first_w32, last_w32, w32s_to_check); */
- fn_generic = genericg_compute_checksum_4al;
- nm_generic = "genericg_compute_checksum_4al";
+ if (host_word_szB == 8) {
+ fn_generic = (__attribute__((regparm(2))) HWord(*)(HWord, HWord))
+ genericg_compute_checksum_8al;
+ nm_generic = "genericg_compute_checksum_8al";
+ } else {
+ fn_generic = (__attribute__((regparm(2))) HWord(*)(HWord, HWord))
+ genericg_compute_checksum_4al;
+ nm_generic = "genericg_compute_checksum_4al";
+ }
+
fn_spec = NULL;
nm_spec = NULL;
- switch (w32s_to_check) {
- case 1: fn_spec = genericg_compute_checksum_4al_1;
- nm_spec = "genericg_compute_checksum_4al_1"; break;
- case 2: fn_spec = genericg_compute_checksum_4al_2;
- nm_spec = "genericg_compute_checksum_4al_2"; break;
- case 3: fn_spec = genericg_compute_checksum_4al_3;
- nm_spec = "genericg_compute_checksum_4al_3"; break;
- case 4: fn_spec = genericg_compute_checksum_4al_4;
- nm_spec = "genericg_compute_checksum_4al_4"; break;
- case 5: fn_spec = genericg_compute_checksum_4al_5;
- nm_spec = "genericg_compute_checksum_4al_5"; break;
- case 6: fn_spec = genericg_compute_checksum_4al_6;
- nm_spec = "genericg_compute_checksum_4al_6"; break;
- case 7: fn_spec = genericg_compute_checksum_4al_7;
- nm_spec = "genericg_compute_checksum_4al_7"; break;
- case 8: fn_spec = genericg_compute_checksum_4al_8;
- nm_spec = "genericg_compute_checksum_4al_8"; break;
- case 9: fn_spec = genericg_compute_checksum_4al_9;
- nm_spec = "genericg_compute_checksum_4al_9"; break;
- case 10: fn_spec = genericg_compute_checksum_4al_10;
- nm_spec = "genericg_compute_checksum_4al_10"; break;
- case 11: fn_spec = genericg_compute_checksum_4al_11;
- nm_spec = "genericg_compute_checksum_4al_11"; break;
- case 12: fn_spec = genericg_compute_checksum_4al_12;
- nm_spec = "genericg_compute_checksum_4al_12"; break;
- default: break;
+ if (host_word_szB == 8) {
+ HChar* nm = NULL;
+ ULong __attribute__((regparm(1))) (*fn)(HWord) = NULL;
+ switch (hWs_to_check) {
+ case 1: fn = genericg_compute_checksum_8al_1;
+ nm = "genericg_compute_checksum_8al_1"; break;
+ case 2: fn = genericg_compute_checksum_8al_2;
+ nm = "genericg_compute_checksum_8al_2"; break;
+ case 3: fn = genericg_compute_checksum_8al_3;
+ nm = "genericg_compute_checksum_8al_3"; break;
+ case 4: fn = genericg_compute_checksum_8al_4;
+ nm = "genericg_compute_checksum_8al_4"; break;
+ case 5: fn = genericg_compute_checksum_8al_5;
+ nm = "genericg_compute_checksum_8al_5"; break;
+ case 6: fn = genericg_compute_checksum_8al_6;
+ nm = "genericg_compute_checksum_8al_6"; break;
+ case 7: fn = genericg_compute_checksum_8al_7;
+ nm = "genericg_compute_checksum_8al_7"; break;
+ case 8: fn = genericg_compute_checksum_8al_8;
+ nm = "genericg_compute_checksum_8al_8"; break;
+ case 9: fn = genericg_compute_checksum_8al_9;
+ nm = "genericg_compute_checksum_8al_9"; break;
+ case 10: fn = genericg_compute_checksum_8al_10;
+ nm = "genericg_compute_checksum_8al_10"; break;
+ case 11: fn = genericg_compute_checksum_8al_11;
+ nm = "genericg_compute_checksum_8al_11"; break;
+ case 12: fn = genericg_compute_checksum_8al_12;
+ nm = "genericg_compute_checksum_8al_12"; break;
+ default: break;
+ }
+ fn_spec = (__attribute__((regparm(1))) HWord(*)(HWord)) fn;
+ nm_spec = nm;
+ } else {
+ HChar* nm = NULL;
+ UInt __attribute__((regparm(1))) (*fn)(HWord) = NULL;
+ switch (hWs_to_check) {
+ case 1: fn = genericg_compute_checksum_4al_1;
+ nm = "genericg_compute_checksum_4al_1"; break;
+ case 2: fn = genericg_compute_checksum_4al_2;
+ nm = "genericg_compute_checksum_4al_2"; break;
+ case 3: fn = genericg_compute_checksum_4al_3;
+ nm = "genericg_compute_checksum_4al_3"; break;
+ case 4: fn = genericg_compute_checksum_4al_4;
+ nm = "genericg_compute_checksum_4al_4"; break;
+ case 5: fn = genericg_compute_checksum_4al_5;
+ nm = "genericg_compute_checksum_4al_5"; break;
+ case 6: fn = genericg_compute_checksum_4al_6;
+ nm = "genericg_compute_checksum_4al_6"; break;
+ case 7: fn = genericg_compute_checksum_4al_7;
+ nm = "genericg_compute_checksum_4al_7"; break;
+ case 8: fn = genericg_compute_checksum_4al_8;
+ nm = "genericg_compute_checksum_4al_8"; break;
+ case 9: fn = genericg_compute_checksum_4al_9;
+ nm = "genericg_compute_checksum_4al_9"; break;
+ case 10: fn = genericg_compute_checksum_4al_10;
+ nm = "genericg_compute_checksum_4al_10"; break;
+ case 11: fn = genericg_compute_checksum_4al_11;
+ nm = "genericg_compute_checksum_4al_11"; break;
+ case 12: fn = genericg_compute_checksum_4al_12;
+ nm = "genericg_compute_checksum_4al_12"; break;
+ default: break;
+ }
+ fn_spec = (__attribute__((regparm(1))) HWord(*)(HWord))fn;
+ nm_spec = nm;
}
- expected32 = fn_generic( first_w32, w32s_to_check );
+ expectedhW = fn_generic( first_hW, hWs_to_check );
/* If we got a specialised version, check it produces the same
result as the generic version! */
if (fn_spec) {
vassert(nm_spec);
- vassert(expected32 == fn_spec( first_w32 ));
+ vassert(expectedhW == fn_spec( first_hW ));
} else {
vassert(!nm_spec);
}
@@ -478,20 +561,23 @@
tistart_tmp = newIRTemp(irsb->tyenv, guest_word_type);
tilen_tmp = newIRTemp(irsb->tyenv, guest_word_type);
- irsb->stmts[selfcheck_idx+0]
- = IRStmt_WrTmp(tistart_tmp, IRExpr_Const(guest_IP_bbstart_IRConst) );
+ IRConst* base2check_IRConst
+ = guest_word_type==Ity_I32 ? IRConst_U32(toUInt(base2check))
+ : IRConst_U64(base2check);
+ IRConst* len2check_IRConst
+ = guest_word_type==Ity_I32 ? IRConst_U32(len2check)
+ : IRConst_U64(len2check);
- irsb->stmts[selfcheck_idx+1]
- = IRStmt_WrTmp(tilen_tmp,
- guest_word_type==Ity_I32
- ? IRExpr_Const(IRConst_U32(len2check))
- : IRExpr_Const(IRConst_U64(len2check))
- );
+ irsb->stmts[selfcheck_idx + i * 5 + 0]
+ = IRStmt_WrTmp(tistart_tmp, IRExpr_Const(base2check_IRConst) );
- irsb->stmts[selfcheck_idx+2]
+ irsb->stmts[selfcheck_idx + i * 5 + 1]
+ = IRStmt_WrTmp(tilen_tmp, IRExpr_Const(len2check_IRConst) );
+
+ irsb->stmts[selfcheck_idx + i * 5 + 2]
= IRStmt_Put( offB_TISTART, IRExpr_RdTmp(tistart_tmp) );
- irsb->stmts[selfcheck_idx+3]
+ irsb->stmts[selfcheck_idx + i * 5 + 3]
= IRStmt_Put( offB_TILEN, IRExpr_RdTmp(tilen_tmp) );
/* Generate the entry point descriptors */
@@ -516,31 +602,36 @@
IRExpr* callexpr = NULL;
if (fn_spec) {
callexpr = mkIRExprCCall(
- Ity_I32, 1/*regparms*/,
+ host_word_type, 1/*regparms*/,
nm_spec, (void*)fn_spec_entry,
mkIRExprVec_1(
- mkIRExpr_HWord( (HWord)first_w32 )
+ mkIRExpr_HWord( (HWord)first_hW )
)
);
} else {
callexpr = mkIRExprCCall(
- Ity_I32, 2/*regparms*/,
+ host_word_type, 2/*regparms*/,
nm_generic, (void*)fn_generic_entry,
mkIRExprVec_2(
- mkIRExpr_HWord( (HWord)first_w32 ),
- mkIRExpr_HWord( (HWord)w32s_to_check )
+ mkIRExpr_HWord( (HWord)first_hW ),
+ mkIRExpr_HWord( (HWord)hWs_to_check )
)
);
}
- irsb->stmts[selfcheck_idx+4]
+ irsb->stmts[selfcheck_idx + i * 5 + 4]
= IRStmt_Exit(
IRExpr_Binop(
- Iop_CmpNE32,
+ host_word_type==Ity_I64 ? Iop_CmpNE64 : Iop_CmpNE32,
callexpr,
- IRExpr_Const(IRConst_U32(expected32))
+ host_word_type==Ity_I64
+ ? IRExpr_Const(IRConst_U64(expectedhW))
+ : IRExpr_Const(IRConst_U32(expectedhW))
),
Ijk_TInval,
+ /* Where we must restart if there's a failure: at the
+ first extent, regardless of which extent the
+ failure actually happened in. */
guest_IP_bbstart_IRConst
);
}
@@ -558,13 +649,13 @@
/* CALLED FROM GENERATED CODE */
/* Compute a checksum of host memory at [addr .. addr+len-1], as fast
- as possible. The _4al_4plus version is assured that the request is
- for 4-aligned memory and for a block of 4 or more long, whilst the
- _generic version must be able to handle any alignment, and lengths
- down to zero too. This fn is called once for every use of a
- self-checking translation, so it needs to be as fast as
- possible. */
+ as possible. All _4al versions assume that the supplied address is
+ 4 aligned. All length values are in 4-byte chunks. These fns
+ arecalled once for every use of a self-checking translation, so
+ they needs to be as fast as possible. */
+/* --- 32-bit versions, used only on 32-bit hosts --- */
+
static inline UInt ROL32 ( UInt w, Int n ) {
w = (w << n) | (w >> (32-n));
return w;
@@ -817,6 +908,261 @@
return sum1 + sum2;
}
+
+/* --- 64-bit versions, used only on 64-bit hosts --- */
+
+static inline ULong ROL64 ( ULong w, Int n ) {
+ w = (w << n) | (w >> (64-n));
+ return w;
+}
+
+__attribute((regparm(2)))
+static ULong genericg_compute_checksum_8al ( HWord first_w64, HWord n_w64s )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ /* unrolled */
+ while (n_w64s >= 4) {
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ p += 4;
+ n_w64s -= 4;
+ sum1 ^= sum2;
+ }
+ while (n_w64s >= 1) {
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ p += 1;
+ n_w64s -= 1;
+ sum1 ^= sum2;
+ }
+ return sum1 + sum2;
+}
+
+/* Specialised versions of the above function */
+
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_1 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_2 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_3 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_4 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_5 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_6 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_7 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[6]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_8 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[6]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[7]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_9 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[6]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[7]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[8]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_10 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[6]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[7]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[8]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[9]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_11 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[6]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[7]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[8]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[9]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[10]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
+__attribute__((regparm(1)))
+static ULong genericg_compute_checksum_8al_12 ( HWord first_w64 )
+{
+ ULong sum1 = 0, sum2 = 0;
+ ULong* p = (ULong*)first_w64;
+ ULong w;
+ w = p[0]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[1]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[2]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[3]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[4]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[5]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[6]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[7]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ w = p[8]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[9]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[10]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ w = p[11]; sum1 = ROL64(sum1 ^ w, 63); sum2 += w;
+ sum1 ^= sum2;
+ return sum1 + sum2;
+}
+
/*--------------------------------------------------------------------*/
/*--- end guest_generic_bb_to_IR.c ---*/
/*--------------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2011-01-10 15:01:12
|
Author: sewardj
Date: 2011-01-10 15:01:03 +0000 (Mon, 10 Jan 2011)
New Revision: 11494
Log:
Memcheck, None: update avg translation size to be more realistic.
Massif: specify avg translation size at all, so as to avoid excessive
retranslations caused by the fact that the default value is far below
reality for Massif.
Modified:
trunk/coregrind/m_transtab.c
trunk/massif/ms_main.c
trunk/memcheck/mc_main.c
trunk/none/nl_main.c
Modified: trunk/coregrind/m_transtab.c
===================================================================
--- trunk/coregrind/m_transtab.c 2011-01-10 14:56:59 UTC (rev 11493)
+++ trunk/coregrind/m_transtab.c 2011-01-10 15:01:03 UTC (rev 11494)
@@ -1556,7 +1556,7 @@
/* Ensure the calculated value is not way crazy. */
vg_assert(tc_sector_szQ >= 2 * N_TTES_PER_SECTOR_USABLE);
- vg_assert(tc_sector_szQ <= 80 * N_TTES_PER_SECTOR_USABLE);
+ vg_assert(tc_sector_szQ <= 100 * N_TTES_PER_SECTOR_USABLE);
/* Initialise the sectors */
youngest_sector = 0;
Modified: trunk/massif/ms_main.c
===================================================================
--- trunk/massif/ms_main.c 2011-01-10 14:56:59 UTC (rev 11493)
+++ trunk/massif/ms_main.c 2011-01-10 15:01:03 UTC (rev 11494)
@@ -2491,6 +2491,8 @@
"Copyright (C) 2003-2010, and GNU GPL'd, by Nicholas Nethercote");
VG_(details_bug_reports_to) (VG_BUGS_TO);
+ VG_(details_avg_translation_sizeB) ( 330 );
+
// Basic functions.
VG_(basic_tool_funcs) (ms_post_clo_init,
ms_instrument,
Modified: trunk/memcheck/mc_main.c
===================================================================
--- trunk/memcheck/mc_main.c 2011-01-10 14:56:59 UTC (rev 11493)
+++ trunk/memcheck/mc_main.c 2011-01-10 15:01:03 UTC (rev 11494)
@@ -5788,7 +5788,7 @@
VG_(details_copyright_author)(
"Copyright (C) 2002-2010, and GNU GPL'd, by Julian Seward et al.");
VG_(details_bug_reports_to) (VG_BUGS_TO);
- VG_(details_avg_translation_sizeB) ( 556 );
+ VG_(details_avg_translation_sizeB) ( 640 );
VG_(basic_tool_funcs) (mc_post_clo_init,
MC_(instrument),
Modified: trunk/none/nl_main.c
===================================================================
--- trunk/none/nl_main.c 2011-01-10 14:56:59 UTC (rev 11493)
+++ trunk/none/nl_main.c 2011-01-10 15:01:03 UTC (rev 11494)
@@ -58,6 +58,8 @@
"Copyright (C) 2002-2010, and GNU GPL'd, by Nicholas Nethercote.");
VG_(details_bug_reports_to) (VG_BUGS_TO);
+ VG_(details_avg_translation_sizeB) ( 275 );
+
VG_(basic_tool_funcs) (nl_post_clo_init,
nl_instrument,
nl_fini);
|
|
From: <sv...@va...> - 2011-01-10 14:57:10
|
Author: sewardj Date: 2011-01-10 14:56:59 +0000 (Mon, 10 Jan 2011) New Revision: 11493 Log: Only show per-offset access counts for allocations up to 1024 bytes, to avoid producing ridiculous amounts of output. Modified: trunk/exp-dhat/dh_main.c Modified: trunk/exp-dhat/dh_main.c =================================================================== --- trunk/exp-dhat/dh_main.c 2011-01-04 23:49:35 UTC (rev 11492) +++ trunk/exp-dhat/dh_main.c 2011-01-10 14:56:59 UTC (rev 11493) @@ -41,7 +41,7 @@ #include "pub_tool_tooliface.h" #include "pub_tool_wordfm.h" -#define HISTOGRAM_SIZE_LIMIT 4096 //1024 +#define HISTOGRAM_SIZE_LIMIT 1024 //------------------------------------------------------------// |