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From: <sv...@va...> - 2006-12-26 04:51:53
|
Author: sewardj
Date: 2006-12-26 04:51:50 +0000 (Tue, 26 Dec 2006)
New Revision: 6440
Log:
Merge r6439 (Finally close #133054/#118903 ('make install' fails with
syntax errors))
Modified:
branches/VALGRIND_3_2_BRANCH/valgrind.pc.in
Modified: branches/VALGRIND_3_2_BRANCH/valgrind.pc.in
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/valgrind.pc.in 2006-12-26 04:50:12 UTC (=
rev 6439)
+++ branches/VALGRIND_3_2_BRANCH/valgrind.pc.in 2006-12-26 04:51:50 UTC (=
rev 6440)
@@ -4,13 +4,13 @@
includedir=3D@includedir@/valgrind
arch=3D@VG_ARCH@
os=3D@VG_OS@
-platform=3D@VG_PLATFORM@
+platform=3D@VG_PLATFORM_PRI@
valt_load_address=3D@VALT_LOAD_ADDRESS@
=20
Name: Valgrind
Description: A dynamic binary instrumentation framework
Version: @VERSION@
Requires:
-Libs: -L${libdir}/valgrind/@VG_PLATFORM@ -lcoregrind -lvex -lgcc
+Libs: -L${libdir}/valgrind/@VG_PLATFORM_PRI@ -lcoregrind -lvex -lgcc
Cflags: -I${includedir}
=20
|
|
From: <sv...@va...> - 2006-12-26 04:50:18
|
Author: sewardj
Date: 2006-12-26 04:50:12 +0000 (Tue, 26 Dec 2006)
New Revision: 6439
Log:
Fix #134207 (pkg-config output contains @VG_PLATFORM@).
Modified:
trunk/valgrind.pc.in
Modified: trunk/valgrind.pc.in
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/valgrind.pc.in 2006-12-26 04:42:53 UTC (rev 6438)
+++ trunk/valgrind.pc.in 2006-12-26 04:50:12 UTC (rev 6439)
@@ -4,13 +4,13 @@
includedir=3D@includedir@/valgrind
arch=3D@VG_ARCH@
os=3D@VG_OS@
-platform=3D@VG_PLATFORM@
+platform=3D@VG_PLATFORM_PRI@
valt_load_address=3D@VALT_LOAD_ADDRESS@
=20
Name: Valgrind
Description: A dynamic binary instrumentation framework
Version: @VERSION@
Requires:
-Libs: -L${libdir}/valgrind/@VG_PLATFORM@ -lcoregrind -lvex -lgcc
+Libs: -L${libdir}/valgrind/@VG_PLATFORM_PRI@ -lcoregrind -lvex -lgcc
Cflags: -I${includedir}
=20
|
|
From: <sv...@va...> - 2006-12-26 04:42:56
|
Author: sewardj
Date: 2006-12-26 04:42:53 +0000 (Tue, 26 Dec 2006)
New Revision: 6438
Log:
Finally close #133054/#118903 ('make install' fails with syntax errors)
Modified:
branches/VALGRIND_3_2_BRANCH/Makefile.install.am
Modified: branches/VALGRIND_3_2_BRANCH/Makefile.install.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/Makefile.install.am 2006-12-26 04:34:38 =
UTC (rev 6437)
+++ branches/VALGRIND_3_2_BRANCH/Makefile.install.am 2006-12-26 04:42:53 =
UTC (rev 6438)
@@ -19,7 +19,7 @@
done ; \
fi ; \
if [ -n "$(noinst_LIBRARIES)" ] ; then \
- for f in $(noinst_LIBRARIES); do \
+ for f in $(noinst_LIBRARIES) expr_wont_match_me; do \
if expr match $$f libcoregrind_ > /dev/null ; then \
pU=3D`echo $$f | sed -e 's/libcoregrind_//g' -e 's/\.a//g'` ; \
pD=3D`echo $$pU | sed -e 's/_/-/g'` ; \
|
|
From: <sv...@va...> - 2006-12-26 04:34:42
|
Author: sewardj Date: 2006-12-26 04:34:38 +0000 (Tue, 26 Dec 2006) New Revision: 6437 Log: Merge r6389 (Fix 'make html-docs' and 'make print-docs'.) Modified: branches/VALGRIND_3_2_BRANCH/cachegrind/docs/cg-manual.xml branches/VALGRIND_3_2_BRANCH/docs/xml/manual-writing-tools.xml branches/VALGRIND_3_2_BRANCH/docs/xml/tech-docs.xml Modified: branches/VALGRIND_3_2_BRANCH/cachegrind/docs/cg-manual.xml =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- branches/VALGRIND_3_2_BRANCH/cachegrind/docs/cg-manual.xml 2006-12-26= 04:30:48 UTC (rev 6436) +++ branches/VALGRIND_3_2_BRANCH/cachegrind/docs/cg-manual.xml 2006-12-26= 04:34:38 UTC (rev 6437) @@ -1,6 +1,7 @@ <?xml version=3D"1.0"?> <!-- -*- sgml -*- --> <!DOCTYPE chapter PUBLIC "-//OASIS//DTD DocBook XML V4.2//EN" - "http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"> + "http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd" +[ <!ENTITY % vg-entities SYSTEM "../../docs/xml/vg-entities.xml"> %vg-en= tities; ]> =20 =20 <chapter id=3D"cg-manual" xreflabel=3D"Cachegrind: a cache-miss profiler= "> Modified: branches/VALGRIND_3_2_BRANCH/docs/xml/manual-writing-tools.xml =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- branches/VALGRIND_3_2_BRANCH/docs/xml/manual-writing-tools.xml 2006-1= 2-26 04:30:48 UTC (rev 6436) +++ branches/VALGRIND_3_2_BRANCH/docs/xml/manual-writing-tools.xml 2006-1= 2-26 04:34:38 UTC (rev 6437) @@ -198,7 +198,7 @@ <computeroutput>VG_DETERMINE_INTERFACE_VERSION</computeroutput> (which a= lso checks that the core/tool interface of the tool matches that of the core= ). The last three are registered using the -<computeroutput>VG_(basic_tool_funcs)</computeroutput> function. +<computeroutput>VG_(basic_tool_funcs)</computeroutput> function.</para> =20 <para>In addition, if a tool wants to use some of the optional services provided by the core, it may have to define other functions and tell the Modified: branches/VALGRIND_3_2_BRANCH/docs/xml/tech-docs.xml =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- branches/VALGRIND_3_2_BRANCH/docs/xml/tech-docs.xml 2006-12-26 04:30:= 48 UTC (rev 6436) +++ branches/VALGRIND_3_2_BRANCH/docs/xml/tech-docs.xml 2006-12-26 04:34:= 38 UTC (rev 6437) @@ -21,7 +21,7 @@ xmlns:xi=3D"http://www.w3.org/2001/XInclude" /> <xi:include href=3D"../../callgrind/docs/cl-format.xml" parse=3D"xml" = =20 xmlns:xi=3D"http://www.w3.org/2001/XInclude" /> - <xi:include href=3D"writing-tools.xml" parse=3D"xml" =20 + <xi:include href=3D"manual-writing-tools.xml" parse=3D"xml" =20 xmlns:xi=3D"http://www.w3.org/2001/XInclude" /> =20 </book> |
|
From: <sv...@va...> - 2006-12-26 04:30:49
|
Author: sewardj
Date: 2006-12-26 04:30:48 +0000 (Tue, 26 Dec 2006)
New Revision: 6436
Log:
Merge r6406: Add missing case, apparently not very popular :-)
Modified:
branches/VALGRIND_3_2_BRANCH/memcheck/mc_translate.c
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/mc_translate.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/mc_translate.c 2006-12-26 04:29=
:17 UTC (rev 6435)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/mc_translate.c 2006-12-26 04:30=
:48 UTC (rev 6436)
@@ -2438,6 +2438,7 @@
=20
case Iop_1Uto8:
case Iop_16to8:
+ case Iop_16HIto8:
case Iop_32to8:
case Iop_64to8:
return assignNew(mce, Ity_I8, unop(op, vatom));
|
|
From: <sv...@va...> - 2006-12-26 04:29:19
|
Author: sewardj
Date: 2006-12-26 04:29:17 +0000 (Tue, 26 Dec 2006)
New Revision: 6435
Log:
Merge r6417: Always ensure that the output buffer is zero-terminated,
even if it is already full. (Nick N)
Modified:
branches/VALGRIND_3_2_BRANCH/coregrind/m_libcprint.c
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_libcprint.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_libcprint.c 2006-12-26 04:09=
:33 UTC (rev 6434)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_libcprint.c 2006-12-26 04:29=
:17 UTC (rev 6435)
@@ -168,6 +168,8 @@
b->buf[b->buf_used++] =3D c;
if (b->buf_used < b->buf_size)
b->buf[b->buf_used] =3D 0;
+ else
+ b->buf[b->buf_size-1] =3D 0; /* pre: b->buf_size > 0 */
}=20
}
=20
|
|
From: <sv...@va...> - 2006-12-26 04:09:36
|
Author: sewardj
Date: 2006-12-26 04:09:33 +0000 (Tue, 26 Dec 2006)
New Revision: 6434
Log:
Update
Modified:
trunk/docs/internals/3_2_BUGSTATUS.txt
Modified: trunk/docs/internals/3_2_BUGSTATUS.txt
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/docs/internals/3_2_BUGSTATUS.txt 2006-12-26 04:08:39 UTC (rev 6=
433)
+++ trunk/docs/internals/3_2_BUGSTATUS.txt 2006-12-26 04:09:33 UTC (rev 6=
434)
@@ -45,7 +45,7 @@
=20
pending pending 32 134207 pkg-config output contains @VG_PLATFORM@
=20
-vx1660 pending 32 n-i-bz %eflags rule for SUBL-CondNLE
+vx1660 vx1690 32 n-i-bz %eflags rule for SUBL-CondNLE
=20
Signal race condition (users list, 13 June, Johannes Berg)
=20
@@ -62,50 +62,49 @@
pending pending 134316 Callgrind does not distinguish between
parent and child
=20
-v6084 pending 32 134727 valgrind exits with "Value too large
+v6084 v6421 32 134727 valgrind exits with "Value too large
for defined data type"
=20
-vx1667 pending 32 n-i-bz ppc32/64: support mcrfs
+vx1667 vx1691 32 n-i-bz ppc32/64: support mcrfs
=20
-v6211 pending 32 n-i-bz Cachegrind: Update cache parameter detect=
ion
+v6211 v6422 32 n-i-bz Cachegrind: Update cache parameter detect=
ion
=20
-vx1672 pending 32 135012 x86->IR: 0xD7 0x8A 0xE0 0xD0 (xlat)
+XXX: check status of Core2 cpuid code
+
+vx1672 vx1692 32 135012 x86->IR: 0xD7 0x8A 0xE0 0xD0 (xlat)
=3D=3D125959
=20
-vx1673/4 pending 32 126147 x86->IR: 0xF2 0xA5 0xF 0x77 (repne
+vx1673/4 vx1693 32 126147 x86->IR: 0xF2 0xA5 0xF 0x77 (repne
movsw) w/test
=20
-vx1676 pending 32 136650 amd64->IR: 0xC2 0x8 0x0
+vx1676 vx1694/6 32 136650 amd64->IR: 0xC2 0x8 0x0
=20
-vx1679 pending 32 135421 x86->IR: unhandled Grp5(R) case 6 [ok]
+vx1679 vx1695 32 135421 x86->IR: unhandled Grp5(R) case 6 [ok]
=20
-vx1675 pending 32 n-i-bz x86 COPY-CondP (Espindola #2, users, Nov =
1)
+vx1675 vx1697 32 n-i-bz x86 COPY-CondP (Espindola #2, users, Nov =
1)
(NEEDS VERIFICATION; regtest =3D espindol=
a2.c)
=20
vx1677 pending n-i-bz IR comments
=20
-vx1678 pending 32 n-i-bz jcxz (x86) (users, 8 Nov)
+vx1678 vx1698 32 n-i-bz jcxz (x86) (users, 8 Nov)
=20
-r6341 pending 32 n-i-bz ExeContext hashing fix
+r6341 r6424 32 n-i-bz ExeContext hashing fix
=20
-r6356 pending 32 n-i-bz Dwarf CFI 0:24 0:32 0:48 0:7 (Nov 8)
+r6356 r6425 32 n-i-bz Dwarf CFI 0:24 0:32 0:48 0:7 (Nov 8)
=20
-r6365 pending 32 n-i-bz Drepper: obscure Cachegrind simulation bu=
g
+r6365 r6423 32 n-i-bz Drepper: obscure Cachegrind simulation bu=
g
+r6367 r6423 32 n-i-bz Same fix as r6365, but for Callgrind simu=
lation.
=20
-r6367 pending 32 n-i-bz Same fix as r6365, but for Callgrind simu=
lation.
+r6371 r6426 32 n-i-bz libmpiwrap.c: fix handling of MPI_LONG_DO=
UBLE
=20
-XXX: check status of Core2 cpuid code
+r6374 r6427 32 n-i-bz make User errors suppressible (XXX: DOCS!=
)
=20
-r6371 pending 32 n-i-bz libmpiwrap.c: fix handling of MPI_LONG_DO=
UBLE
-
-r6374 pending 32 n-i-bz make User errors suppressible (XXX: DOCS!=
)
-
-r6377/8 pending 32 136844 corrupted malloc line when using=20
+r6377/8 r6428 32 136844 corrupted malloc line when using=20
=3D=3D138507 --gen-suppressions=3Dyes
=20
-vx1686 pending 32 n-i-bz Reg-alloc speedups
+vx1686 vx1701 32 n-i-bz Reg-alloc speedups
=20
-r6382/3 pending 32 n-i-bz Fix confusing leak-checker flag hints
+r6382/3 r6429 32 n-i-bz Fix confusing leak-checker flag hints
=20
r6384 r6385 32 n-i-bz Support recent autoswamp versions
=20
@@ -119,16 +118,16 @@
pending pending 32 n-i-bz amd64 INCW-CondZ (Andr=C3=A9 W=C3=B6bbeki=
ng,=20
users, Oct 19) (=3D=3D Espindola #1)
=20
-r6291 pending 32 n-i-bz ppc32/64 dispatcher speedups
+r6291 r6430 32 n-i-bz ppc32/64 dispatcher speedups
=20
-r1670/1 pending 32 n-i-bz ppc64 fe rld/rlw improvements
+vx1670/1 vx1699 32 n-i-bz ppc64 fe rld/rlw improvements
=20
-r1669 pending 32 n-i-bz ppc64 be imm64 improvement (hdefs.c only)
+vx1669 vx1700 32 n-i-bz ppc64 be imm64 improvement (hdefs.c only)
=20
pending pending 32 136300 support 64K pages on ppc64-linux
=3D=3D 139124
=20
-r6404/5 pending 32 n-i-bz fix ppc insn set tests for gcc >=3D 4.1
+r6404/5 r6431 32 n-i-bz fix ppc insn set tests for gcc >=3D 4.1
=20
pending pending 32 137493 x86->IR: recent binutils no-ops
=20
@@ -142,12 +141,12 @@
(at least produce a better error msg)
=3D=3D 138856
=20
-r6410 pending 32 138627 Enhancement of prctl ioctl
+r6410 r6432 32 138627 Enhancement of prctl ioctl
=20
pending pending 32 138702 amd64->IR: 0xF0 0xF 0xC0 0x90
(lock xadd %dl,0xb5(%rax))
=20
-r6411 pending 32 138896 usb ioctl handling
+r6411 r6433 32 138896 usb ioctl handling
=3D=3D 136059 =20
=20
pending pending 32 139050 ppc32->IR: mftb/mftbu instructions not ha=
ndled
@@ -155,6 +154,7 @@
pending pending 32 139076 valgrind VT_GETSTATE error
=20
Test/make run cleanly on SuSE 10.2 x86/amd64/ppc32 and FC6 ditto
+Last update was 25 Dec 06
=20
=20
------- Bugs reported and fixed in 3.2.0 ------
|
|
From: <sv...@va...> - 2006-12-26 04:08:43
|
Author: sewardj
Date: 2006-12-26 04:08:39 +0000 (Tue, 26 Dec 2006)
New Revision: 6433
Log:
Merge r6411 (usb ioctl handling)
Modified:
branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-generic.c
branches/VALGRIND_3_2_BRANCH/include/vki-linux.h
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-generi=
c.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-generic.c 20=
06-12-26 04:03:36 UTC (rev 6432)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-generic.c 20=
06-12-26 04:08:39 UTC (rev 6433)
@@ -4015,7 +4015,80 @@
case VKI_VT_UNLOCKSWITCH:
break;
=20
- =20
+ case VKI_USBDEVFS_CONTROL:
+ if ( ARG3 ) {
+ struct vki_usbdevfs_ctrltransfer *vkuc =3D (struct vki_usbdevfs=
_ctrltransfer *)ARG3;
+ PRE_MEM_READ( "ioctl(USBDEVFS_CONTROL).bRequestType", (Addr)&vk=
uc->bRequestType, sizeof(vkuc->bRequestType));
+ PRE_MEM_READ( "ioctl(USBDEVFS_CONTROL).bRequest", (Addr)&vkuc->=
bRequest, sizeof(vkuc->bRequest));
+ PRE_MEM_READ( "ioctl(USBDEVFS_CONTROL).wValue", (Addr)&vkuc->wV=
alue, sizeof(vkuc->wValue));
+ PRE_MEM_READ( "ioctl(USBDEVFS_CONTROL).wIndex", (Addr)&vkuc->wI=
ndex, sizeof(vkuc->wIndex));
+ PRE_MEM_READ( "ioctl(USBDEVFS_CONTROL).wLength", (Addr)&vkuc->w=
Length, sizeof(vkuc->wLength));
+ PRE_MEM_READ( "ioctl(USBDEVFS_CONTROL).timeout", (Addr)&vkuc->t=
imeout, sizeof(vkuc->timeout));
+ if (vkuc->bRequestType & 0x80)
+ PRE_MEM_WRITE( "ioctl(USBDEVFS_CONTROL).data", (Addr)vkuc->d=
ata, vkuc->wLength);
+ else
+ PRE_MEM_READ( "ioctl(USBDEVFS_CONTROL).data", (Addr)vkuc->da=
ta, vkuc->wLength);
+ }
+ break;
+ case VKI_USBDEVFS_BULK:
+ if ( ARG3 ) {
+ struct vki_usbdevfs_bulktransfer *vkub =3D (struct vki_usbdevfs=
_bulktransfer *)ARG3;
+ PRE_MEM_READ( "ioctl(USBDEVFS_BULK)", ARG3, sizeof(struct vki_u=
sbdevfs_bulktransfer));
+ if (vkub->ep & 0x80)
+ PRE_MEM_WRITE( "ioctl(USBDEVFS_BULK).data", (Addr)vkub->data=
, vkub->len);
+ else
+ PRE_MEM_READ( "ioctl(USBDEVFS_BULK).data", (Addr)vkub->data,=
vkub->len);
+ break;
+ }
+ case VKI_USBDEVFS_GETDRIVER:
+ if ( ARG3 ) {
+ struct vki_usbdevfs_getdriver *vkugd =3D (struct vki_usbdevfs_g=
etdriver *) ARG3;
+ PRE_MEM_WRITE( "ioctl(USBDEVFS_GETDRIVER)", (Addr)&vkugd->drive=
r, sizeof(vkugd->driver));
+ break;
+ }
+ case VKI_USBDEVFS_SUBMITURB:
+ if ( ARG3 ) {
+ struct vki_usbdevfs_urb *vkuu =3D (struct vki_usbdevfs_urb *)AR=
G3;
+
+ /* Not the whole struct needs to be initialized */
+ PRE_MEM_READ( "ioctl(USBDEVFS_SUBMITURB).ep", (Addr)&vkuu->endp=
oint, sizeof(vkuu->endpoint));
+ PRE_MEM_READ( "ioctl(USBDEVFS_SUBMITURB).type", (Addr)&vkuu->ty=
pe, sizeof(vkuu->type));
+ PRE_MEM_READ( "ioctl(USBDEVFS_SUBMITURB).flags", (Addr)&vkuu->f=
lags, sizeof(vkuu->flags));
+ PRE_MEM_READ( "ioctl(USBDEVFS_SUBMITURB).buffer", (Addr)&vkuu->=
buffer, sizeof(vkuu->buffer));
+ PRE_MEM_READ( "ioctl(USBDEVFS_SUBMITURB).buffer_length", (Addr)=
&vkuu->buffer_length, sizeof(vkuu->buffer_length));
+ PRE_MEM_READ( "ioctl(USBDEVFS_SUBMITURB).usercontext", (Addr)&v=
kuu->usercontext, sizeof(vkuu->usercontext));
+ if (vkuu->endpoint & 0x80)
+ PRE_MEM_WRITE( "ioctl(USBDEVFS_URB).buffer", (Addr)vkuu->buf=
fer, vkuu->buffer_length);
+ else
+ PRE_MEM_READ( "ioctl(USBDEVFS_URB).buffer", (Addr)vkuu->buff=
er, vkuu->buffer_length);
+ /* FIXME: Does not handle all cases this ioctl can do, ISOs are=
missing. */
+ break;
+ }
+ case VKI_USBDEVFS_REAPURB:
+ case VKI_USBDEVFS_REAPURBNDELAY:
+ if ( ARG3 ) {
+ PRE_MEM_READ( "ioctl(USBDEVFS_SUBMITURB)", ARG3, sizeof(struct =
vki_usbdevfs_urb *));
+ break;
+ }
+ case VKI_USBDEVFS_CONNECTINFO:
+ PRE_MEM_WRITE( "ioctl(USBDEVFS_CONNECTINFO)", ARG3, sizeof(struct =
vki_usbdevfs_connectinfo));
+ break;
+ case VKI_USBDEVFS_IOCTL:
+ if ( ARG3 ) {
+ struct vki_usbdevfs_ioctl *vkui =3D (struct vki_usbdevfs_ioctl =
*)ARG3;
+ UInt dir2, size2;
+ PRE_MEM_READ("ioctl(USBDEVFS_IOCTL)", (Addr)vkui, sizeof(struct=
vki_usbdevfs_ioctl));
+ dir2 =3D _VKI_IOC_DIR(vkui->ioctl_code);
+ size2 =3D _VKI_IOC_SIZE(vkui->ioctl_code);
+ if (size2 > 0) {
+ if (dir2 & _VKI_IOC_WRITE)
+ PRE_MEM_READ("ioctl(USBDEVFS_IOCTL).dataWrite", (Addr)vku=
i->data, size2);
+ else if (dir2 & _VKI_IOC_READ)
+ PRE_MEM_WRITE("ioctl(USBDEVFS_IOCTL).dataRead", (Addr)vku=
i->data, size2);
+ }
+ }
+ break;
+
/* We don't have any specific information on it, so
try to do something reasonable based on direction and
size bits. The encoding scheme is described in
@@ -4676,8 +4749,54 @@
case VKI_VT_LOCKSWITCH:
case VKI_VT_UNLOCKSWITCH:
break;
- =20
=20
+ case VKI_USBDEVFS_CONTROL:
+ if ( ARG3 ) {
+ struct vki_usbdevfs_ctrltransfer *vkuc =3D (struct vki_usbdevfs=
_ctrltransfer *)ARG3;
+ if (vkuc->bRequestType & 0x80)
+ POST_MEM_WRITE((Addr)vkuc->data, RES);
+ break;
+ }
+ case VKI_USBDEVFS_BULK:
+ if ( ARG3 ) {
+ struct vki_usbdevfs_bulktransfer *vkub =3D (struct vki_usbdevfs=
_bulktransfer *)ARG3;
+ if (vkub->ep & 0x80)
+ POST_MEM_WRITE((Addr)vkub->data, RES);
+ break;
+ }
+ case VKI_USBDEVFS_GETDRIVER:
+ if ( ARG3 ) {
+ struct vki_usbdevfs_getdriver *vkugd =3D (struct vki_usbdevfs_g=
etdriver *)ARG3;
+ POST_MEM_WRITE((Addr)&vkugd->driver, sizeof(vkugd->driver));
+ break;
+ }
+ case VKI_USBDEVFS_REAPURB:
+ case VKI_USBDEVFS_REAPURBNDELAY:
+ if ( ARG3 ) {
+ struct vki_usbdevfs_urb **vkuu =3D (struct vki_usbdevfs_urb**)A=
RG3;
+ if (!*vkuu)
+ break;
+ POST_MEM_WRITE((Addr) &((*vkuu)->status),sizeof((*vkuu)->status=
));
+ if ((*vkuu)->endpoint & 0x80)
+ POST_MEM_WRITE((Addr)(*vkuu)->buffer, (*vkuu)->actual_length=
);
+ break;
+ }
+ case VKI_USBDEVFS_CONNECTINFO:
+ POST_MEM_WRITE(ARG3, sizeof(struct vki_usbdevfs_connectinfo));
+ break;
+ case VKI_USBDEVFS_IOCTL:
+ if ( ARG3 ) {
+ struct vki_usbdevfs_ioctl *vkui =3D (struct vki_usbdevfs_ioctl =
*)ARG3;
+ UInt dir2, size2;
+ dir2 =3D _VKI_IOC_DIR(vkui->ioctl_code);
+ size2 =3D _VKI_IOC_SIZE(vkui->ioctl_code);
+ if (size2 > 0) {
+ if (dir2 & _VKI_IOC_READ)=20
+ POST_MEM_WRITE((Addr)vkui->data, size2);
+ }
+ }
+ break;
+
/* We don't have any specific information on it, so
try to do something reasonable based on direction and
size bits. The encoding scheme is described in
Modified: branches/VALGRIND_3_2_BRANCH/include/vki-linux.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/include/vki-linux.h 2006-12-26 04:03:36 =
UTC (rev 6432)
+++ branches/VALGRIND_3_2_BRANCH/include/vki-linux.h 2006-12-26 04:08:39 =
UTC (rev 6433)
@@ -2224,6 +2224,77 @@
# define VKI_PR_ENDIAN_LITTLE 1 /* True little endian mode */
# define VKI_PR_ENDIAN_PPC_LITTLE 2 /* "PowerPC" pseudo littl=
e endian */
=20
+//----------------------------------------------------------------------
+// From linux-2.6.19/include/linux/usbdevice_fs.h
+//----------------------------------------------------------------------
+
+struct vki_usbdevfs_ctrltransfer {
+ __vki_u8 bRequestType;
+ __vki_u8 bRequest;
+ __vki_u16 wValue;
+ __vki_u16 wIndex;
+ __vki_u16 wLength;
+ __vki_u32 timeout; /* in milliseconds */
+ void __user *data;
+};
+
+struct vki_usbdevfs_bulktransfer {
+ unsigned int ep;
+ unsigned int len;
+ unsigned int timeout; /* in milliseconds */
+ void __user *data;
+};
+
+#define VKI_USBDEVFS_MAXDRIVERNAME 255
+
+struct vki_usbdevfs_getdriver {
+ unsigned int interface;
+ char driver[VKI_USBDEVFS_MAXDRIVERNAME + 1];
+};
+
+struct vki_usbdevfs_connectinfo {
+ unsigned int devnum;
+ unsigned char slow;
+};
+
+struct vki_usbdevfs_iso_packet_desc {
+ unsigned int length;
+ unsigned int actual_length;
+ unsigned int status;
+};
+
+struct vki_usbdevfs_urb {
+ unsigned char type;
+ unsigned char endpoint;
+ int status;
+ unsigned int flags;
+ void __user *buffer;
+ int buffer_length;
+ int actual_length;
+ int start_frame;
+ int number_of_packets;
+ int error_count;
+ unsigned int signr; /* signal to be sent on error, -1 if none sh=
ould be sent */
+ void *usercontext;
+ struct vki_usbdevfs_iso_packet_desc iso_frame_desc[0];
+};
+
+struct vki_usbdevfs_ioctl {
+ int ifno; /* interface 0..N ; negative numbers rese=
rved */
+ int ioctl_code; /* MUST encode size + direction of data s=
o the
+ * macros in <asm/ioctl.h> give correct v=
alues */
+ void __user *data; /* param buffer (in, or out) */
+};
+
+#define VKI_USBDEVFS_CONTROL _VKI_IOWR('U', 0, struct vki_usbde=
vfs_ctrltransfer)
+#define VKI_USBDEVFS_BULK _VKI_IOWR('U', 2, struct vki_usbde=
vfs_bulktransfer)
+#define VKI_USBDEVFS_GETDRIVER _VKI_IOW('U', 8, struct vki_usbdev=
fs_getdriver)
+#define VKI_USBDEVFS_SUBMITURB _VKI_IOR('U', 10, struct vki_usbde=
vfs_urb)
+#define VKI_USBDEVFS_REAPURB _VKI_IOW('U', 12, void *)
+#define VKI_USBDEVFS_REAPURBNDELAY _VKI_IOW('U', 13, void *)
+#define VKI_USBDEVFS_CONNECTINFO _VKI_IOW('U', 17, struct vki_usbde=
vfs_connectinfo)
+#define VKI_USBDEVFS_IOCTL _VKI_IOWR('U', 18, struct vki_usbd=
evfs_ioctl)
+
#endif // __VKI_LINUX_H
=20
/*--------------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2006-12-26 04:03:38
|
Author: sewardj
Date: 2006-12-26 04:03:36 +0000 (Tue, 26 Dec 2006)
New Revision: 6432
Log:
Merge r6410 (Enhancement of prctl ioctl)
Modified:
branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-amd64-linux.c
branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-linux.c
branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-ppc32-linux.c
branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-x86-linux.c
branches/VALGRIND_3_2_BRANCH/include/vki-linux.h
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-amd64-=
linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-amd64-linux.=
c 2006-12-26 03:55:38 UTC (rev 6431)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-amd64-linux.=
c 2006-12-26 04:03:36 UTC (rev 6432)
@@ -1189,7 +1189,7 @@
=20
// (__NR_pivot_root, sys_pivot_root), // 155=20
LINXY(__NR__sysctl, sys_sysctl), // 156=20
- LINX_(__NR_prctl, sys_prctl), // 157=20
+ LINXY(__NR_prctl, sys_prctl), // 157=20
PLAX_(__NR_arch_prctl, sys_arch_prctl), // 158=20
// (__NR_adjtimex, sys_adjtimex), // 159=20
=20
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-linux.=
c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-linux.c 2006=
-12-26 03:55:38 UTC (rev 6431)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-linux.c 2006=
-12-26 04:03:36 UTC (rev 6432)
@@ -698,15 +698,99 @@
PRE(sys_prctl)
{
*flags |=3D SfMayBlock;
- PRINT( "prctl ( %d, %d, %d, %d, %d )", ARG1, ARG2, ARG3, ARG4, ARG5 )=
;
- // XXX: too simplistic, often not all args are used
- // Nb: can't use "ARG2".."ARG5" here because that's our own macro...
- PRE_REG_READ5(long, "prctl",
- int, option, unsigned long, arg2, unsigned long, arg3,
- unsigned long, arg4, unsigned long, arg5);
- // XXX: totally wrong... we need to look at the 'option' arg, and do
- // PRE_MEM_READs/PRE_MEM_WRITEs as necessary...
+ PRINT( "sys_prctl ( %d, %d, %d, %d, %d )", ARG1, ARG2, ARG3, ARG4, AR=
G5 );
+ switch (ARG1) {
+ case VKI_PR_SET_PDEATHSIG:
+ PRE_REG_READ2(int, "prctl", int, option, int, signal);
+ break;
+ case VKI_PR_GET_PDEATHSIG:
+ PRE_REG_READ2(int, "prctl", int, option, int *, signal);
+ PRE_MEM_WRITE("prctl(get-death-signal)", ARG2, sizeof(Int));
+ break;
+ case VKI_PR_GET_DUMPABLE:
+ PRE_REG_READ1(int, "prctl", int, option);
+ break;
+ case VKI_PR_SET_DUMPABLE:
+ PRE_REG_READ2(int, "prctl", int, option, int, dump);
+ break;
+ case VKI_PR_GET_UNALIGN:
+ PRE_REG_READ2(int, "prctl", int, option, int *, value);
+ PRE_MEM_WRITE("prctl(get-unalign)", ARG2, sizeof(Int));
+ break;
+ case VKI_PR_SET_UNALIGN:
+ PRE_REG_READ2(int, "prctl", int, option, int, value);
+ break;
+ case VKI_PR_GET_KEEPCAPS:
+ PRE_REG_READ1(int, "prctl", int, option);
+ break;
+ case VKI_PR_SET_KEEPCAPS:
+ PRE_REG_READ2(int, "prctl", int, option, int, keepcaps);
+ break;
+ case VKI_PR_GET_FPEMU:
+ PRE_REG_READ2(int, "prctl", int, option, int *, value);
+ PRE_MEM_WRITE("prctl(get-fpemu)", ARG2, sizeof(Int));
+ break;
+ case VKI_PR_SET_FPEMU:
+ PRE_REG_READ2(int, "prctl", int, option, int, value);
+ break;
+ case VKI_PR_GET_FPEXC:
+ PRE_REG_READ2(int, "prctl", int, option, int *, value);
+ PRE_MEM_WRITE("prctl(get-fpexc)", ARG2, sizeof(Int));
+ break;
+ case VKI_PR_SET_FPEXC:
+ PRE_REG_READ2(int, "prctl", int, option, int, value);
+ break;
+ case VKI_PR_GET_TIMING:
+ PRE_REG_READ1(int, "prctl", int, option);
+ break;
+ case VKI_PR_SET_TIMING:
+ PRE_REG_READ2(int, "prctl", int, option, int, timing);
+ break;
+ case VKI_PR_SET_NAME:
+ PRE_REG_READ2(int, "prctl", int, option, char *, name);
+ PRE_MEM_RASCIIZ("prctl(set-name)", ARG2);
+ break;
+ case VKI_PR_GET_NAME:
+ PRE_REG_READ2(int, "prctl", int, option, char *, name);
+ PRE_MEM_WRITE("prctl(get-name)", ARG2, VKI_TASK_COMM_LEN);
+ break;
+ case VKI_PR_GET_ENDIAN:
+ PRE_REG_READ2(int, "prctl", int, option, int *, value);
+ PRE_MEM_WRITE("prctl(get-endian)", ARG2, sizeof(Int));
+ break;
+ case VKI_PR_SET_ENDIAN:
+ PRE_REG_READ2(int, "prctl", int, option, int, value);
+ break;
+ default:
+ PRE_REG_READ5(long, "prctl",
+ int, option, unsigned long, arg2, unsigned long, arg=
3,
+ unsigned long, arg4, unsigned long, arg5);
+ break;
+ }
}
+POST(sys_prctl)
+{
+ switch (ARG1) {
+ case VKI_PR_GET_PDEATHSIG:
+ POST_MEM_WRITE(ARG2, sizeof(Int));
+ break;
+ case VKI_PR_GET_UNALIGN:
+ POST_MEM_WRITE(ARG2, sizeof(Int));
+ break;
+ case VKI_PR_GET_FPEMU:
+ POST_MEM_WRITE(ARG2, sizeof(Int));
+ break;
+ case VKI_PR_GET_FPEXC:
+ POST_MEM_WRITE(ARG2, sizeof(Int));
+ break;
+ case VKI_PR_GET_NAME:
+ POST_MEM_WRITE(ARG2, VKI_TASK_COMM_LEN);
+ break;
+ case VKI_PR_GET_ENDIAN:
+ POST_MEM_WRITE(ARG2, sizeof(Int));
+ break;
+ }
+}
=20
PRE(sys_sendfile)
{
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-ppc32-=
linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-ppc32-linux.=
c 2006-12-26 03:55:38 UTC (rev 6431)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-ppc32-linux.=
c 2006-12-26 04:03:36 UTC (rev 6432)
@@ -1683,7 +1683,7 @@
//..=20
LINX_(__NR_setresgid, sys_setresgid), // 169
LINXY(__NR_getresgid, sys_getresgid), // 170
- LINX_(__NR_prctl, sys_prctl), // 171
+ LINXY(__NR_prctl, sys_prctl), // 171
PLAX_(__NR_rt_sigreturn, sys_rt_sigreturn), // 172
LINXY(__NR_rt_sigaction, sys_rt_sigaction), // 173
=20
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-x86-li=
nux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-x86-linux.c =
2006-12-26 03:55:38 UTC (rev 6431)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_syswrap/syswrap-x86-linux.c =
2006-12-26 04:03:36 UTC (rev 6432)
@@ -2004,7 +2004,7 @@
//zz=20
LINX_(__NR_setresgid, sys_setresgid16), // 170
LINXY(__NR_getresgid, sys_getresgid16), // 171
- LINX_(__NR_prctl, sys_prctl), // 172
+ LINXY(__NR_prctl, sys_prctl), // 172
PLAX_(__NR_rt_sigreturn, sys_rt_sigreturn), // 173 x86/Linux o=
nly?
LINXY(__NR_rt_sigaction, sys_rt_sigaction), // 174
=20
Modified: branches/VALGRIND_3_2_BRANCH/include/vki-linux.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/include/vki-linux.h 2006-12-26 03:55:38 =
UTC (rev 6431)
+++ branches/VALGRIND_3_2_BRANCH/include/vki-linux.h 2006-12-26 04:03:36 =
UTC (rev 6432)
@@ -299,6 +299,8 @@
int sched_priority;
};
=20
+#define VKI_TASK_COMM_LEN 16
+
//----------------------------------------------------------------------
// From linux-2.6.8.1/include/asm-generic/siginfo.h
//----------------------------------------------------------------------
@@ -2121,8 +2123,6 @@
int reserved[9];
};
=20
-#endif // __VKI_LINUX_H
-
//----------------------------------------------------------------------
// From linux-2.6.16/include/linux/vt.h
//----------------------------------------------------------------------
@@ -2172,6 +2172,60 @@
#define VKI_VT_LOCKSWITCH 0x560B /* disallow vt switching */
#define VKI_VT_UNLOCKSWITCH 0x560C /* allow vt switching */
=20
+//----------------------------------------------------------------------
+// From linux-2.6.19/include/linux/prctl.h
+//----------------------------------------------------------------------
+
+#define VKI_PR_SET_PDEATHSIG 1 /* Second arg is a signal */
+#define VKI_PR_GET_PDEATHSIG 2 /* Second arg is a ptr to return the si=
gnal */
+
+#define VKI_PR_GET_DUMPABLE 3
+#define VKI_PR_SET_DUMPABLE 4
+
+#define VKI_PR_GET_UNALIGN 5
+#define VKI_PR_SET_UNALIGN 6
+# define VKI_PR_UNALIGN_NOPRINT 1 /* silently fix up unaligned user a=
ccesses */
+# define VKI_PR_UNALIGN_SIGBUS 2 /* generate SIGBUS on unaligned use=
r access */
+
+#define VKI_PR_GET_KEEPCAPS 7
+#define VKI_PR_SET_KEEPCAPS 8
+
+#define VKI_PR_GET_FPEMU 9
+#define VKI_PR_SET_FPEMU 10
+# define VKI_PR_FPEMU_NOPRINT 1 /* silently emulate fp operations acces=
ses */
+# define VKI_PR_FPEMU_SIGFPE 2 /* don't emulate fp operations, send SI=
GFPE instead */
+
+#define VKI_PR_GET_FPEXC 11
+#define VKI_PR_SET_FPEXC 12
+# define VKI_PR_FP_EXC_SW_ENABLE 0x80 /* Use FPEXC for FP excep=
tion enables */
+# define VKI_PR_FP_EXC_DIV 0x010000 /* floating point divide=
by zero */
+# define VKI_PR_FP_EXC_OVF 0x020000 /* floating point overfl=
ow */
+# define VKI_PR_FP_EXC_UND 0x040000 /* floating point underf=
low */
+# define VKI_PR_FP_EXC_RES 0x080000 /* floating point inexac=
t result */
+# define VKI_PR_FP_EXC_INV 0x100000 /* floating point invali=
d operation */
+# define VKI_PR_FP_EXC_DISABLED 0 /* FP exceptions disabled=
*/
+# define VKI_PR_FP_EXC_NONRECOV 1 /* async non-recoverable =
exc. mode */
+# define VKI_PR_FP_EXC_ASYNC 2 /* async recoverable exception mo=
de */
+# define VKI_PR_FP_EXC_PRECISE 3 /* precise exception mode */
+
+#define VKI_PR_GET_TIMING 13
+#define VKI_PR_SET_TIMING 14
+# define VKI_PR_TIMING_STATISTICAL 0 /* Normal, traditional,
+ statistical process t=
iming */
+# define VKI_PR_TIMING_TIMESTAMP 1 /* Accurate timestamp based
+ process timing */
+
+#define VKI_PR_SET_NAME 15 /* Set process name */
+#define VKI_PR_GET_NAME 16 /* Get process name */
+
+#define VKI_PR_GET_ENDIAN 19
+#define VKI_PR_SET_ENDIAN 20
+# define VKI_PR_ENDIAN_BIG 0
+# define VKI_PR_ENDIAN_LITTLE 1 /* True little endian mode */
+# define VKI_PR_ENDIAN_PPC_LITTLE 2 /* "PowerPC" pseudo littl=
e endian */
+
+#endif // __VKI_LINUX_H
+
/*--------------------------------------------------------------------*/
/*--- end ---*/
/*--------------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2006-12-26 03:55:41
|
Author: sewardj
Date: 2006-12-26 03:55:38 +0000 (Tue, 26 Dec 2006)
New Revision: 6431
Log:
Merge r6404/5 (fix ppc insn set tests for gcc >=3D 4.1)
Modified:
branches/VALGRIND_3_2_BRANCH/none/tests/ppc32/jm-insns.c
Modified: branches/VALGRIND_3_2_BRANCH/none/tests/ppc32/jm-insns.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/none/tests/ppc32/jm-insns.c 2006-12-26 0=
3:53:52 UTC (rev 6430)
+++ branches/VALGRIND_3_2_BRANCH/none/tests/ppc32/jm-insns.c 2006-12-26 0=
3:55:38 UTC (rev 6431)
@@ -177,25 +177,53 @@
#endif // #ifndef __powerpc64__
=20
=20
+#define ALLCR "cr0","cr1","cr2","cr3","cr4","cr5","cr6","cr7"
+
+#define SET_CR(_arg) \
+ __asm__ __volatile__ ("mtcr %0" : : "b"(_arg) : ALLCR );
+
+#define SET_XER(_arg) \
+ __asm__ __volatile__ ("mtxer %0" : : "b"(_arg) : "xer" );
+
+#define GET_CR(_lval) \
+ __asm__ __volatile__ ("mfcr %0" : "=3Db"(_lval) )
+
+#define GET_XER(_lval) \
+ __asm__ __volatile__ ("mfxer %0" : "=3Db"(_lval) )
+
+#define GET_CR_XER(_lval_cr,_lval_xer) \
+ do { GET_CR(_lval_cr); GET_XER(_lval_xer); } while (0)
+
+#define SET_CR_ZERO \
+ SET_CR(0)
+
+#define SET_XER_ZERO \
+ SET_XER(0)
+
+#define SET_CR_XER_ZERO \
+ do { SET_CR_ZERO; SET_XER_ZERO; } while (0)
+
+#define SET_FPSCR_ZERO \
+ do { double _d =3D 0.0; \
+ __asm__ __volatile__ ("mtfsf 0xFF, %0" : : "f"(_d) ); \
+ } while (0)
+
+
+/* XXXX these must all be callee-save regs! */
register double f14 __asm__ ("f14");
register double f15 __asm__ ("f15");
register double f16 __asm__ ("f16");
register double f17 __asm__ ("f17");
-register double f18 __asm__ ("f18");
register HWord_t r14 __asm__ ("r14");
register HWord_t r15 __asm__ ("r15");
register HWord_t r16 __asm__ ("r16");
register HWord_t r17 __asm__ ("r17");
-register HWord_t r18 __asm__ ("r18");
=20
#if defined (HAS_ALTIVEC)
# include <altivec.h>
#endif
#include <assert.h>
#include <ctype.h> // isspace
-//#include <fcntl.h>
-//#include <fenv.h>
-//#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
@@ -4540,7 +4568,7 @@
unused uint32_t test_flags)
{
volatile HWord_t res;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, j, k;
=20
for (i=3D0; i<nb_iargs; i++) {
@@ -4550,29 +4578,11 @@
r15 =3D iargs[j];
r16 =3D iargs[k];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %08x, %08x, %08x =3D> %08x (%08x %08x)\n",
#else
@@ -4589,7 +4599,7 @@
uint32_t test_flags)
{
volatile HWord_t res;
- volatile uint32_t flags, xer, xer_orig, tmpcr, tmpxer;
+ volatile uint32_t flags, xer, xer_orig;
int i, j, is_div, zap_hi32;
=20
// catches div, divwu, divo, divwu, divwuo, and . variants
@@ -4601,37 +4611,21 @@
redo:
for (i=3D0; i<nb_iargs; i++) {
for (j=3D0; j<nb_iargs; j++) {
- r14 =3D iargs[i];
- r15 =3D iargs[j];
+
/* result of division by zero is implementation dependent.
don't test it. */
if (is_div && iargs[j] =3D=3D 0)
continue;
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
+ r14 =3D iargs[i];
+ r15 =3D iargs[j];
=20
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D xer_orig;
- __asm__ __volatile__ ("mtxer 18");
+ SET_XER(xer_orig);
+ SET_CR_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %08x, %08x =3D> %08x (%08x %08x)\n",
#else
@@ -4652,38 +4646,19 @@
uint32_t test_flags)
{
volatile HWord_t res;
- volatile uint32_t flags, xer, xer_orig, tmpcr, tmpxer;
+ volatile uint32_t flags, xer, xer_orig;
int i;
=20
xer_orig =3D 0x00000000;
redo:
for (i=3D0; i<nb_iargs; i++) {
r14 =3D iargs[i];
-
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D xer_orig;
- __asm__ __volatile__ ("mtxer 18");
+ SET_XER(xer_orig);
+ SET_CR_ZERO;
(*func)();
res =3D r17;
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %08x =3D> %08x (%08x %08x)\n",
#else
@@ -4768,7 +4743,7 @@
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
volatile HWord_t res;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, j;
=20
for (i=3D0; i<nb_iargs; i++) {
@@ -4779,29 +4754,11 @@
=20
r14 =3D iargs[i];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %08x, %08x =3D> %08x (%08x %08x)\n",
#else
@@ -4843,7 +4800,7 @@
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
volatile HWord_t res;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, j, k, l, arg_step;
=20
arg_step =3D (arg_list_size =3D=3D 0) ? 31 : 3;
@@ -4862,29 +4819,11 @@
=20
r14 =3D iargs[i];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %08x, %2d, %2d, %2d =3D> %08x (%08x %08x)\n",
#else
@@ -4904,7 +4843,7 @@
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
volatile HWord_t res;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, j, k, l, arg_step;
=20
arg_step =3D (arg_list_size =3D=3D 0) ? 31 : 3;
@@ -4921,29 +4860,11 @@
r14 =3D iargs[i];
r15 =3D iargs[j];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %08x, %08x, %2d, %2d =3D> %08x (%08x %08x)\n",
#else
@@ -4963,7 +4884,7 @@
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
volatile HWord_t res;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, j, arg_step;
=20
arg_step =3D (arg_list_size =3D=3D 0) ? 31 : 1;
@@ -4976,29 +4897,11 @@
=20
r14 =3D iargs[i];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %08x, %2d =3D> %08x (%08x %08x)\n",
#else
@@ -5015,7 +4918,7 @@
{
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, j, k, arg_step;
=20
arg_step =3D (arg_list_size =3D=3D 0) ? 7 : 1;
@@ -5030,28 +4933,11 @@
=20
r14 =3D iargs[i];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 14");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR(r14);
+ SET_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %d, %d (%08x) =3D> (%08x %08x)\n",
#else
@@ -5064,19 +4950,12 @@
}
}
=20
-#if 0
-static void mcrfs_cb (const char* name, test_func_t func,
- unused uint32_t test_flags)
-{}
-#endif
-
-
static void mcrxr_cb (const char* name, test_func_t func_IN,
unused uint32_t test_flags)
{
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, j, k, arg_step;
=20
arg_step =3D 1; //(arg_list_size =3D=3D 0) ? 7 : 1;
@@ -5090,28 +4969,11 @@
=20
r14 =3D j;
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 14");
+ SET_CR_ZERO;
+ SET_XER(r14);
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
printf("%s %d (%08x) =3D> (%08x %08x)\n",
name, k, j, flags, xer);
}
@@ -5123,35 +4985,19 @@
unused uint32_t test_flags)
{
volatile HWord_t res;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i;
=20
for (i=3D0; i<nb_iargs; i++) {
r14 =3D iargs[i];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
/* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 14");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR(r14);
+ SET_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s (%08x) =3D> %08x (%08x %08x)\n",
#else
@@ -5176,7 +5022,7 @@
__asm__ __volatile__(
"mtxer %1\n"
"\tmfxer %0"
- : /*out*/"=3Dr"(res) : /*in*/"r"(j) : /*trashed*/"xer"=20
+ : /*out*/"=3Db"(res) : /*in*/"b"(j) : /*trashed*/"xer"=20
);
res &=3D 0xE000007F; /* rest of the bits are undefined */
=20
@@ -5194,7 +5040,7 @@
__asm__ __volatile__(
"mtlr %1\n"
"\tmflr %0"
- : /*out*/"=3Dr"(res) : /*in*/"r"(j) : /*trashed*/"lr"=20
+ : /*out*/"=3Db"(res) : /*in*/"b"(j) : /*trashed*/"lr"=20
);
=20
#ifndef __powerpc64__
@@ -5211,7 +5057,7 @@
__asm__ __volatile__(
"mtctr %1\n"
"\tmfctr %0"
- : /*out*/"=3Dr"(res) : /*in*/"r"(j) : /*trashed*/"ctr"=20
+ : /*out*/"=3Db"(res) : /*in*/"b"(j) : /*trashed*/"ctr"=20
);
=20
#ifndef __powerpc64__
@@ -5221,220 +5067,14 @@
#endif
name, j, res);
}
-
-#if 0
- // mfxer
- j =3D 1;
- for (k=3D0; k<nb_iargs; k++) {
- r14 =3D iargs[k];
-
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- // Only valid bits of xer: 0xE000007F
- __asm__ __volatile__ ("lis 15,0xE000");
- __asm__ __volatile__ ("addi 15,15,0x007F");
- __asm__ __volatile__ ("and 16,15,14");
- =20
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 16");
- __asm__ __volatile__ ("mtlr 18");
- __asm__ __volatile__ ("mtctr 18");
- =20
- __asm__ __volatile__ ("mfspr 17, 1"); // func()
- =20
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mflr 18");
- lr =3D r18;
- __asm__ __volatile__ ("mfctr 18");
- ctr =3D r18;
- res =3D r17;
-
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
- printf("%s %d (%08x) =3D> %08x (%08x %08x, %08x, %08x)\n",
- name, j, iargs[k], res, flags, xer, lr, ctr);
- }
- if (verbose) printf("\n");
- =20
- // mflr
- j =3D 8;
- for (k=3D0; k<nb_iargs; k++) {
- r14 =3D iargs[k];
-
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtlr 14");
- __asm__ __volatile__ ("mtctr 18");
- __asm__ __volatile__ ("mtxer 18");
-
- __asm__ __volatile__ ("mfspr 17, 8"); // func()
- =20
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mflr 18");
- lr =3D r18;
- __asm__ __volatile__ ("mfctr 18");
- ctr =3D r18;
- res =3D r17;
-
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
- printf("%s %d (%08x) =3D> %08x (%08x %08x, %08x, %08x)\n",
- name, j, iargs[k], res, flags, xer, lr, ctr);
- }
- if (verbose) printf("\n");
-
- // mfctr
- j =3D 9;
- for (k=3D0; k<nb_iargs; k++) {
- r14 =3D iargs[k];
-
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtctr 14");
- __asm__ __volatile__ ("mtxer 18");
- __asm__ __volatile__ ("mtlr 18");
- =20
- __asm__ __volatile__ ("mfspr 17, 9"); // func()
- =20
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
- __asm__ __volatile__ ("mflr 18");
- lr =3D r18;
- __asm__ __volatile__ ("mfctr 18");
- ctr =3D r18;
- res =3D r17;
-
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
- printf("%s %d (%08x) =3D> %08x (%08x %08x, %08x, %08x)\n",
- name, j, iargs[k], res, flags, xer, lr, ctr);
- }
-#endif
}
=20
-#if 0
-static void mftb_cb (const char* name, test_func_t func,
- unused uint32_t test_flags)
-{
-// How to test this?
-// 1) TBU won't change for a while
-// 2) TBL will have changed every loop iter
-
- volatile HWord_t res;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
- int i, j;
- =20
- i =3D 269;
- for (j=3D0; j<16; j++) {
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
- =20
- __asm__ __volatile__ ("mftb 17, 269"); // func
- =20
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
- res =3D r17;
-
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
- printf("%s %d =3D> %08x (%08x %08x)\n",
- name, i, res, flags, xer);
- }
- if (verbose) printf("\n");
- =20
- i =3D 268;
- for (j=3D0; j<16; j++) {
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
- =20
- __asm__ __volatile__ ("mftb 17, 268"); // func
- =20
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
- res =3D r17;
-
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
- printf("%s %d =3D> %08x (%08x %08x)\n",
- name, i, res, flags, xer);
- }
-}
-#endif
-
static void mtcrf_cb (const char* name, test_func_t func_IN,
unused uint32_t test_flags)
{
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, j, arg_step;
=20
arg_step =3D (arg_list_size =3D=3D 0) ? 99 : 1;
@@ -5447,28 +5087,10 @@
=20
r14 =3D iargs[i];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %3d, %08x =3D> (%08x %08x)\n",
#else
@@ -5484,150 +5106,6 @@
static void mtspr_cb (const char* name, test_func_t func,
unused uint32_t test_flags)
{
-#if 0
- volatile HWord_t ctr, lr;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
- int j, k;
- func =3D func; // just to stop compiler complaining
- =20
- // mtxer
- j =3D 1;
- for (k=3D0; k<nb_iargs; k++) {
- r14 =3D iargs[k];
-
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- =20
- // Only valid bits of xer: 0xE000007F
- // VEX masks these (maybe it shouldn't?), so let's do it first:
- __asm__ __volatile__ ("lis 15,0xE000");
- __asm__ __volatile__ ("addi 15,15,0x007F");
- __asm__ __volatile__ ("and 16,15,14");
- =20
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
- __asm__ __volatile__ ("mtlr 18");
- __asm__ __volatile__ ("mtctr 18");
- =20
- __asm__ __volatile__ ("mtxer 16"); // func()
- =20
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mflr 18");
- lr =3D r18;
- __asm__ __volatile__ ("mfctr 18");
- ctr =3D r18;
-
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
-#ifndef __powerpc64__
- printf("%s %d, %08x =3D> (%08x %08x, %08x, %08x)\n",
-#else
- printf("%s %d, %016lx =3D> (%08x %08x, %016lx, %016lx)\n",
-#endif
- name, j, iargs[k], flags, xer, lr, ctr);
- }
- if (verbose) printf("\n");
- =20
- // mtlr
- j =3D 8;
- for (k=3D0; k<nb_iargs; k++) {
- r14 =3D iargs[k];
-
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0x0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtlr 18");
- __asm__ __volatile__ ("mtctr 18");
- __asm__ __volatile__ ("mtxer 18");
- =20
- __asm__ __volatile__ ("mtlr 14"); // func()
- =20
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mflr 18");
- lr =3D r18;
- __asm__ __volatile__ ("mfctr 17"); // CAB: if 18, bashes lr - bad=
gcc opt?
- ctr =3D r17;
-
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
-#ifndef __powerpc64__
- printf("%s %d, %08x =3D> (%08x %08x, %08x, %08x)\n",
-#else
- printf("%s %d, %016lx =3D> (%08x %08x, %016lx, %016lx)\n",
-#endif
- name, j, iargs[k], flags, xer, lr, ctr);
- }
- if (verbose) printf("\n");
- =20
- // mtctr
- j =3D 9;
- for (k=3D0; k<nb_iargs; k++) {
- r14 =3D iargs[k];
-
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtctr 18");
- __asm__ __volatile__ ("mtxer 18");
- __asm__ __volatile__ ("mtlr 18");
- =20
- __asm__ __volatile__ ("mtctr 14"); // func()
- =20
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mflr 18");
- lr =3D r18;
- __asm__ __volatile__ ("mfctr 17");
- ctr =3D r17;
-
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
-#ifndef __powerpc64__
- printf("%s %d, %08x =3D> (%08x %08x, %08x, %08x)\n",
-#else
- printf("%s %d, %016lx =3D> (%08x %08x, %016lx, %016lx)\n",
-#endif
- name, j, iargs[k], flags, xer, lr, ctr);
- }
-#endif
}
=20
#ifdef __powerpc64__
@@ -5637,7 +5115,7 @@
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
volatile HWord_t res;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, j, k, arg_step;
=20
arg_step =3D (arg_list_size =3D=3D 0) ? 7 : 3;
@@ -5652,29 +5130,11 @@
r14 =3D iargs[i];
r15 =3D iargs[j];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
printf("%s %016lx, %016lx, %2d =3D> %016lx (%08x %08x)\n",
name, iargs[i], iargs[j], k, res, flags, xer);
}
@@ -5689,7 +5149,7 @@
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
volatile HWord_t res;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, j, k, arg_step;
=20
arg_step =3D (arg_list_size =3D=3D 0) ? 7 : 3;
@@ -5705,29 +5165,11 @@
=20
r14 =3D iargs[i];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
printf("%s %016lx, %2d, %2d =3D> %016lx (%08x %08x)\n",
name, iargs[i], j, k, res, flags, xer);
}
@@ -5742,7 +5184,7 @@
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
volatile HWord_t res;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, j, arg_step;
=20
arg_step =3D (arg_list_size =3D=3D 0) ? 7 : 3;
@@ -5756,29 +5198,11 @@
=20
r14 =3D iargs[i];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
printf("%s %016lx, %2d =3D> %016lx (%08x %08x)\n",
name, iargs[i], j, res, flags, xer);
}
@@ -5965,7 +5389,7 @@
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
volatile HWord_t res, base;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, offs, is_lwa=3D0;
=20
#ifdef __powerpc64__
@@ -5986,29 +5410,11 @@
=20
r14 =3D base;
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
- =20
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %2d, (%08x) =3D> %08x, %2d (%08x %08x)\n",
#else
@@ -6029,29 +5435,11 @@
=20
r14 =3D base;
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
- =20
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %2d, (%08x) =3D> %08x, %2d (%08x %08x)\n",
#else
@@ -6066,7 +5454,7 @@
unused uint32_t test_flags)
{
volatile HWord_t res, base;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, offs;
=20
// +ve d
@@ -6076,29 +5464,11 @@
r14 =3D base;
r15 =3D offs;
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
- =20
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D r17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %d (%08x) =3D> %08x, %d (%08x %08x)\n",
#else
@@ -6114,7 +5484,7 @@
{
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, offs, k;
HWord_t *iargs_priv, base;
=20
@@ -6136,28 +5506,10 @@
r14 =3D iargs[i]; // read from iargs
r15 =3D base; // store to r15 + offs
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
- =20
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %08x, %2d =3D> %08x, %2d (%08x %08x)\n",
#else
@@ -6182,28 +5534,10 @@
r14 =3D iargs[nb_iargs-1+i]; // read from iargs
r15 =3D base; // store to r15 + offs
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
- =20
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %08x, %2d =3D> %08x, %2d (%08x %08x)\n",
#else
@@ -6219,7 +5553,7 @@
test_func_t func,
unused uint32_t test_flags)
{
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
int i, offs, k;
HWord_t *iargs_priv, base;
=20
@@ -6236,28 +5570,10 @@
r15 =3D base; // store to r15 + offs
r16 =3D offs;
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
- =20
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %08x, %d =3D> %08x, %d (%08x %08x)\n",
#else
@@ -6292,7 +5608,7 @@
{
double res;
uint64_t u0, u1, u2, ur;
- volatile uint32_t flags, tmpcr, tmpxer;
+ volatile uint32_t flags;
int i, j, k;
=20
/* Note: using nb_normal_fargs:
@@ -6309,30 +5625,13 @@
f15 =3D fargs[j];
f16 =3D fargs[k];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
- f18 =3D +0.0;
- __asm__ __volatile__ ("mtfsf 0xFF, 18");
+ SET_FPSCR_ZERO;
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
+ GET_CR(flags);
res =3D f17;
ur =3D *(uint64_t *)(&res);
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
/* Note: zapping the bottom byte of the result,=20
as vex's accuracy isn't perfect */
ur &=3D 0xFFFFFFFFFFFFFF00ULL;
@@ -6358,7 +5657,7 @@
{
double res;
uint64_t u0, u1, ur;
- volatile uint32_t flags, tmpcr, tmpxer;
+ volatile uint32_t flags;
int i, j;
=20
for (i=3D0; i<nb_fargs; i+=3D3) {
@@ -6368,30 +5667,13 @@
f14 =3D fargs[i];
f15 =3D fargs[j];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
-
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
- f18 =3D +0.0;
- __asm__ __volatile__ ("mtfsf 0xFF, 18");
+ SET_FPSCR_ZERO;
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
+ GET_CR(flags);
res =3D f17;
ur =3D *(uint64_t *)(&res);
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %016llx, %016llx =3D> %016llx",
#else
@@ -6412,7 +5694,7 @@
{
double res;
uint64_t u0, ur;
- volatile uint32_t flags, tmpcr, tmpxer;
+ volatile uint32_t flags;
int i, zap_hi_32bits;
=20
/* if we're testing fctiw or fctiwz, zap the hi 32bits,
@@ -6423,30 +5705,13 @@
u0 =3D *(uint64_t *)(&fargs[i]);
f14 =3D fargs[i];
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
+ SET_FPSCR_ZERO;
+ SET_CR_XER_ZERO;
+ (*func)();
+ GET_CR(flags);
+ res =3D f17;
+ ur =3D *(uint64_t *)(&res);
=20
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
- f18 =3D +0.0;
- __asm__ __volatile__ ("mtfsf 0xFF, 18");
- (*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- res =3D f17;
- ur =3D *(uint64_t *)(&res);
-
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
if (zap_hi_32bits)
ur &=3D 0xFFFFFFFFULL;
=20
@@ -6531,7 +5796,7 @@
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
uint32_t base;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
volatile double src, res;
int i, offs;
=20
@@ -6553,29 +5818,11 @@
// load from fargs[idx] =3D> r14 + offs
r14 =3D base;
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
- =20
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D f17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %016llx, %4d =3D> %016llx, %4d",
#else
@@ -6596,7 +5843,7 @@
unused uint32_t test_flags)
{
volatile HWord_t base;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
volatile double src, res;
int i, offs;
=20
@@ -6614,29 +5861,11 @@
r14 =3D base;
r15 =3D offs;
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
- =20
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
res =3D f17;
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %016llx, %4d =3D> %016llx, %4d",
#else
@@ -6658,7 +5887,7 @@
volatile test_func_t func;
uint32_t* func_buf =3D get_rwx_area();
HWord_t base;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
double src, *p_dst;
int i, offs;
double *fargs_priv;
@@ -6701,28 +5930,10 @@
f14 =3D src;
r15 =3D base;
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
- =20
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %016llx, %4d =3D> %016llx, %4d",
#else
@@ -6743,7 +5954,7 @@
unused uint32_t test_flags)
{
volatile HWord_t base;
- volatile uint32_t flags, xer, tmpcr, tmpxer;
+ volatile uint32_t flags, xer;
double src, *p_dst;
int i, offs;
double *fargs_priv;
@@ -6782,28 +5993,10 @@
r15 =3D base; // store to r15 + offs
r16 =3D offs;
=20
- /* Save flags */
- __asm__ __volatile__ ("mfcr 18");
- tmpcr =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- tmpxer =3D r18;
- =20
- /* Set up flags for test */
- r18 =3D 0;
- __asm__ __volatile__ ("mtcr 18");
- __asm__ __volatile__ ("mtxer 18");
+ SET_CR_XER_ZERO;
(*func)();
- __asm__ __volatile__ ("mfcr 18");
- flags =3D r18;
- __asm__ __volatile__ ("mfxer 18");
- xer =3D r18;
+ GET_CR_XER(flags,xer);
=20
- /* Restore flags */
- r18 =3D tmpcr;
- __asm__ __volatile__ ("mtcr 18");
- r18 =3D tmpxer;
- __asm__ __volatile__ ("mtxer 18");
-
#ifndef __powerpc64__
printf("%s %016llx, %4d =3D> %016llx, %4d",
#else
@@ -8202,6 +7395,7 @@
"\t-i: test integer instructions (default)\n"
"\t-f: test floating point instructions\n"
"\t-a: test altivec instructions\n"
+ "\t-A: test all (int, fp, altivec) instructions\n"
"\t-v: be verbose\n"
"\t-h: display this help and exit\n"
);
@@ -8218,6 +7412,9 @@
insn_sel_flags_t flags;
int c;
=20
+ // check HWord_t really is a host word
+ assert(sizeof(void*) =3D=3D sizeof(HWord_t));
+
flags.one_arg =3D 0;
flags.two_args =3D 0;
flags.three_args =3D 0;
@@ -8344,6 +7541,7 @@
./jm-insns -i =3D> int insns
./jm-insns -f =3D> fp insns
./jm-insns -a =3D> av insns
+ ./jm-insns -A =3D> int, fp and avinsns
*/
char *filter =3D NULL;
insn_sel_flags_t flags;
@@ -8367,7 +7565,7 @@
// Flags
flags.cr =3D 2;
=20
- while ((c =3D getopt(argc, argv, "ifahv")) !=3D -1) {
+ while ((c =3D getopt(argc, argv, "ifahvA")) !=3D -1) {
switch (c) {
case 'i':
flags.integer =3D 1;
@@ -8379,6 +7577,12 @@
flags.altivec =3D 1;
flags.faltivec =3D 1;
break;
+ case 'A':
+ flags.integer =3D 1;
+ flags.floats =3D 1;
+ flags.altivec =3D 1;
+ flags.faltivec =3D 1;
+ break;
case 'h':
usage();
return 0;
|
|
From: Tom H. <to...@co...> - 2006-12-26 03:54:12
|
Nightly build on dunsmere ( athlon, Fedora Core 6 ) started at 2006-12-26 03:30:07 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 252 tests, 5 stderr failures, 2 stdout failures, 0 posttest failures == memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/xml1 (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) none/tests/pth_detached (stdout) |
|
From: <sv...@va...> - 2006-12-26 03:54:00
|
Author: sewardj
Date: 2006-12-26 03:53:52 +0000 (Tue, 26 Dec 2006)
New Revision: 6430
Log:
Merge r6391 (ppc32/64-linux: use 'ctr' for the branch address, not 'lr' s=
ince
using the latter trashes the branch predictors somehow)
Modified:
branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-amd64-linux=
.S
branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-ppc32-linux=
.S
branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-ppc64-linux=
.S
branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-x86-linux.S
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-amd6=
4-linux.S
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-amd64-linu=
x.S 2006-12-26 03:51:46 UTC (rev 6429)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-amd64-linu=
x.S 2006-12-26 03:53:52 UTC (rev 6430)
@@ -1,7 +1,7 @@
=20
/*--------------------------------------------------------------------*/
/*--- The core dispatch loop, for jumping to a code address. ---*/
-/*--- dispatch-amd64.S ---*/
+/*--- dispatch-amd64-linux.S ---*/
/*--------------------------------------------------------------------*/
=20
/*
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-ppc3=
2-linux.S
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-ppc32-linu=
x.S 2006-12-26 03:51:46 UTC (rev 6429)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-ppc32-linu=
x.S 2006-12-26 03:53:52 UTC (rev 6430)
@@ -1,7 +1,7 @@
=20
/*--------------------------------------------------------------------*/
/*--- The core dispatch loop, for jumping to a code address. ---*/
-/*--- dispatch-ppc32.S ---*/
+/*--- dispatch-ppc32-linux.S ---*/
/*--------------------------------------------------------------------*/
=20
/*
@@ -275,10 +275,10 @@
/* Found a match. Call tce[1], which is 8 bytes along, since
each tce element is a 64-bit int. */
addi 8,5,8
- mtlr 8
+ mtctr 8
=20
/* run the translation */
- blrl
+ bctrl
=20
/* On return from guest code:
r3 holds destination (original) address.
@@ -338,10 +338,10 @@
/* Found a match. Call tce[1], which is 8 bytes along, since
each tce element is a 64-bit int. */
addi 8,5,8
- mtlr 8
+ mtctr 8
=20
/* run the translation */
- blrl
+ bctrl
=20
/* On return from guest code:
r3 holds destination (original) address.
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-ppc6=
4-linux.S
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-ppc64-linu=
x.S 2006-12-26 03:51:46 UTC (rev 6429)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-ppc64-linu=
x.S 2006-12-26 03:53:52 UTC (rev 6430)
@@ -1,7 +1,7 @@
=20
/*--------------------------------------------------------------------*/
/*--- The core dispatch loop, for jumping to a code address. ---*/
-/*--- dispatch-ppc64.S ---*/
+/*--- dispatch-ppc64-linux.S ---*/
/*--------------------------------------------------------------------*/
=20
/*
@@ -298,10 +298,10 @@
/* Found a match. Call tce[1], which is 8 bytes along, since
each tce element is a 64-bit int. */
addi 8,5,8
- mtlr 8
+ mtctr 8
=20
/* run the translation */
- blrl
+ bctrl
=20
/* On return from guest code:
r3 holds destination (original) address.
@@ -376,10 +376,10 @@
/* Found a match. Call tce[1], which is 8 bytes along, since
each tce element is a 64-bit int. */
addi 8,5,8
- mtlr 8
+ mtctr 8
=20
/* run the translation */
- blrl
+ bctrl
=20
/* On return from guest code:
r3 holds destination (original) address.
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-x86-=
linux.S
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-x86-linux.=
S 2006-12-26 03:51:46 UTC (rev 6429)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_dispatch/dispatch-x86-linux.=
S 2006-12-26 03:53:52 UTC (rev 6430)
@@ -1,7 +1,7 @@
=20
/*--------------------------------------------------------------------*/
/*--- The core dispatch loop, for jumping to a code address. ---*/
-/*--- dispatch-x86.S ---*/
+/*--- dispatch-x86-linux.S ---*/
/*--------------------------------------------------------------------*/
=20
/*
|
|
From: <sv...@va...> - 2006-12-26 03:51:51
|
Author: sewardj
Date: 2006-12-26 03:51:46 +0000 (Tue, 26 Dec 2006)
New Revision: 6429
Log:
Merge r6382/3 (Fix confusing leak-checker flag hints, and regtest updates=
)
Modified:
branches/VALGRIND_3_2_BRANCH/memcheck/mc_leakcheck.c
branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-0.stderr.exp
branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-0.stderr.exp2
branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-cycle.stderr.exp64
branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-regroot.stderr.exp
branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-regroot.stderr.exp2
branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-tree.stderr.exp
branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-tree.stderr.exp2
branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-tree.stderr.exp64
branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stderr.exp
branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stderr.exp2
branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stderr.exp3
branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stderr.exp64
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/mc_leakcheck.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/mc_leakcheck.c 2006-12-26 03:17=
:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/mc_leakcheck.c 2006-12-26 03:51=
:46 UTC (rev 6429)
@@ -928,14 +928,17 @@
MC_(bytes_reachable), blocks_reachable );
VG_(message)(Vg_UserMsg, " suppressed: %,lu bytes in %,lu b=
locks.",
MC_(bytes_suppressed), blocks_suppressed =
);
- if (mode =3D=3D LC_Summary && blocks_leaked > 0)
- VG_(message)(Vg_UserMsg,
- "Use --leak-check=3Dfull to see details of leaked memory.");
- else if (!MC_(clo_show_reachable)) {
+ if (mode =3D=3D LC_Summary=20
+ && (blocks_leaked + blocks_indirect=20
+ + blocks_dubious + blocks_reachable) > 0) {
+ VG_(message)(Vg_UserMsg,
+ "Rerun with --leak-check=3Dfull to see details of =
leaked memory.");
+ }
+ if (blocks_reachable > 0 && !MC_(clo_show_reachable) && mode =3D=3D=
LC_Full) {
VG_(message)(Vg_UserMsg,=20
"Reachable blocks (those to which a pointer was found) are no=
t shown.");
VG_(message)(Vg_UserMsg,=20
- "To see them, rerun with: --show-reachable=3Dyes");
+ "To see them, rerun with: --leak-check=3Dfull --show-reachab=
le=3Dyes");
}
}
=20
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-0.stderr.exp
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-0.stderr.exp 2006-12=
-26 03:17:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-0.stderr.exp 2006-12=
-26 03:51:46 UTC (rev 6429)
@@ -8,7 +8,7 @@
still reachable: 0 bytes in 1 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
=20
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
malloc/free: in use at exit: 0 bytes in 0 blocks.
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-0.stderr.exp2
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-0.stderr.exp2 2006-1=
2-26 03:17:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-0.stderr.exp2 2006-1=
2-26 03:51:46 UTC (rev 6429)
@@ -9,7 +9,7 @@
still reachable: 24 bytes in 2 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
=20
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
malloc/free: in use at exit: 0 bytes in 0 blocks.
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-cycle.stderr.e=
xp64
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-cycle.stderr.exp64 2=
006-12-26 03:17:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-cycle.stderr.exp64 2=
006-12-26 03:51:46 UTC (rev 6429)
@@ -35,8 +35,6 @@
possibly lost: 0 bytes in 0 blocks.
still reachable: 0 bytes in 0 blocks.
suppressed: 0 bytes in 0 blocks.
-Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
=20
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
malloc/free: in use at exit: 288 bytes in 18 blocks.
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-regroot.stderr=
.exp
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-regroot.stderr.exp 2=
006-12-26 03:17:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-regroot.stderr.exp 2=
006-12-26 03:51:46 UTC (rev 6429)
@@ -8,7 +8,7 @@
still reachable: 10 bytes in 1 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
=20
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
malloc/free: in use at exit: 0 bytes in 0 blocks.
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-regroot.stderr=
.exp2
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-regroot.stderr.exp2 =
2006-12-26 03:17:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-regroot.stderr.exp2 =
2006-12-26 03:51:46 UTC (rev 6429)
@@ -9,7 +9,7 @@
still reachable: 34 bytes in 2 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
=20
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
malloc/free: in use at exit: 0 bytes in 0 blocks.
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-tree.stderr.ex=
p
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-tree.stderr.exp 2006=
-12-26 03:17:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-tree.stderr.exp 2006=
-12-26 03:51:46 UTC (rev 6429)
@@ -14,7 +14,7 @@
still reachable: 16 bytes in 2 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
searching for pointers to 14 not-freed blocks.
checked ... bytes.
=20
@@ -43,7 +43,7 @@
still reachable: 0 bytes in 0 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
=20
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
malloc/free: in use at exit: 112 bytes in 14 blocks.
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-tree.stderr.ex=
p2
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-tree.stderr.exp2 200=
6-12-26 03:17:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-tree.stderr.exp2 200=
6-12-26 03:51:46 UTC (rev 6429)
@@ -13,7 +13,7 @@
still reachable: 80 bytes in 10 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
searching for pointers to 14 not-freed blocks.
checked ... bytes.
=20
@@ -42,7 +42,7 @@
still reachable: 56 bytes in 7 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
=20
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
malloc/free: in use at exit: 112 bytes in 14 blocks.
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-tree.stderr.ex=
p64
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-tree.stderr.exp64 20=
06-12-26 03:17:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/tests/leak-tree.stderr.exp64 20=
06-12-26 03:51:46 UTC (rev 6429)
@@ -14,7 +14,7 @@
still reachable: 96 bytes in 6 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
searching for pointers to 14 not-freed blocks.
checked ... bytes.
=20
@@ -43,7 +43,7 @@
still reachable: 112 bytes in 7 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
=20
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
malloc/free: in use at exit: 224 bytes in 14 blocks.
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stder=
r.exp
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stderr.exp =
2006-12-26 03:17:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stderr.exp =
2006-12-26 03:51:46 UTC (rev 6429)
@@ -8,7 +8,7 @@
still reachable: 1,048,576 bytes in 1 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
=20
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
malloc/free: in use at exit: 1,048,576 bytes in 1 blocks.
@@ -26,5 +26,3 @@
possibly lost: 0 bytes in 0 blocks.
still reachable: 0 bytes in 0 blocks.
suppressed: 0 bytes in 0 blocks.
-Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stder=
r.exp2
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stderr.exp2=
2006-12-26 03:17:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stderr.exp2=
2006-12-26 03:51:46 UTC (rev 6429)
@@ -9,7 +9,7 @@
still reachable: 1,048,600 bytes in 2 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
=20
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
malloc/free: in use at exit: 1,048,576 bytes in 1 blocks.
@@ -29,4 +29,4 @@
still reachable: 0 bytes in 0 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stder=
r.exp3
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stderr.exp3=
2006-12-26 03:17:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stderr.exp3=
2006-12-26 03:51:46 UTC (rev 6429)
@@ -8,7 +8,7 @@
still reachable: 1,048,576 bytes in 1 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
=20
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
malloc/free: in use at exit: 1,048,576 bytes in 1 blocks.
@@ -27,4 +27,4 @@
still reachable: 0 bytes in 0 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stder=
r.exp64
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stderr.exp6=
4 2006-12-26 03:17:44 UTC (rev 6428)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/tests/pointer-trace.stderr.exp6=
4 2006-12-26 03:51:46 UTC (rev 6429)
@@ -8,7 +8,7 @@
still reachable: 2,097,152 bytes in 1 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
=20
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
malloc/free: in use at exit: 2,097,152 bytes in 1 blocks.
@@ -27,4 +27,4 @@
still reachable: 0 bytes in 0 blocks.
suppressed: 0 bytes in 0 blocks.
Reachable blocks (those to which a pointer was found) are not shown.
-To see them, rerun with: --show-reachable=3Dyes
+To see them, rerun with: --leak-check=3Dfull --show-reachable=3Dyes
|
|
From: Tom H. <th...@cy...> - 2006-12-26 03:24:30
|
Nightly build on dellow ( x86_64, Fedora Core 6 ) started at 2006-12-26 03:10:04 GMT Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 280 tests, 4 stderr failures, 1 stdout failure, 0 posttest failures == memcheck/tests/pointer-trace (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/xml1 (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 280 tests, 4 stderr failures, 2 stdout failures, 0 posttest failures == memcheck/tests/pointer-trace (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/xml1 (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) none/tests/pth_detached (stdout) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Tue Dec 26 03:17:21 2006 --- new.short Tue Dec 26 03:24:20 2006 *************** *** 8,10 **** ! == 280 tests, 4 stderr failures, 2 stdout failures, 0 posttest failures == memcheck/tests/pointer-trace (stderr) --- 8,10 ---- ! == 280 tests, 4 stderr failures, 1 stdout failure, 0 posttest failures == memcheck/tests/pointer-trace (stderr) *************** *** 14,16 **** none/tests/mremap2 (stdout) - none/tests/pth_detached (stdout) --- 14,15 ---- |
|
From: <sv...@va...> - 2006-12-26 03:17:50
|
Author: sewardj
Date: 2006-12-26 03:17:44 +0000 (Tue, 26 Dec 2006)
New Revision: 6428
Log:
Merge r6377/8: --gen-suppressions fixes (fix for #136844, #138507)
Modified:
branches/VALGRIND_3_2_BRANCH/coregrind/m_errormgr.c
branches/VALGRIND_3_2_BRANCH/memcheck/mc_main.c
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_errormgr.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_errormgr.c 2006-12-26 03:13:=
14 UTC (rev 6427)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_errormgr.c 2006-12-26 03:17:=
44 UTC (rev 6428)
@@ -386,7 +386,7 @@
{
static UChar buf[ERRTXT_LEN];
=20
- if ( VG_(get_fnname_nodemangle) (ip, buf, ERRTXT_LEN) ) {
+ if ( VG_(get_fnname_Z_demangle_only) (ip, buf, ERRTXT_LEN) ) {
VG_(printf)(" fun:%s\n", buf);
} else if ( VG_(get_objname)(ip, buf, ERRTXT_LEN) ) {
VG_(printf)(" obj:%s\n", buf);
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/mc_main.c 2006-12-26 03:13:14 U=
TC (rev 6427)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/mc_main.c 2006-12-26 03:17:44 U=
TC (rev 6428)
@@ -3025,7 +3025,7 @@
return (ekind =3D=3D FreeErr || ekind =3D=3D FreeMismatchErr);
=20
case OverlapSupp:
- return (ekind =3D OverlapErr);
+ return (ekind =3D=3D OverlapErr);
=20
case LeakSupp:
return (ekind =3D=3D LeakErr);
|
|
From: <sv...@va...> - 2006-12-26 03:13:21
|
Author: sewardj
Date: 2006-12-26 03:13:14 +0000 (Tue, 26 Dec 2006)
New Revision: 6427
Log:
Merge r6374 (make User errors suppressible)
Modified:
branches/VALGRIND_3_2_BRANCH/memcheck/mc_main.c
Modified: branches/VALGRIND_3_2_BRANCH/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/memcheck/mc_main.c 2006-12-26 03:10:51 U=
TC (rev 6426)
+++ branches/VALGRIND_3_2_BRANCH/memcheck/mc_main.c 2006-12-26 03:13:14 U=
TC (rev 6427)
@@ -2268,6 +2268,7 @@
typedef=20
enum {=20
ParamSupp, // Bad syscall params
+ UserSupp, // Errors arising from client-request checks
CoreMemSupp, // Memory errors in core (pthread ops, signal handl=
ing)
=20
// Use of invalid values of given size (MemCheck only)
@@ -2945,6 +2946,7 @@
SuppKind skind;
=20
if (VG_STREQ(name, "Param")) skind =3D ParamSupp;
+ else if (VG_STREQ(name, "User")) skind =3D UserSupp;
else if (VG_STREQ(name, "CoreMem")) skind =3D CoreMemSupp;
else if (VG_STREQ(name, "Addr1")) skind =3D Addr1Supp;
else if (VG_STREQ(name, "Addr2")) skind =3D Addr2Supp;
@@ -2994,6 +2996,9 @@
&& VG_STREQ(VG_(get_error_string)(err),=20
VG_(get_supp_string)(su)));
=20
+ case UserSupp:
+ return (ekind =3D=3D UserErr);
+
case CoreMemSupp:
return (ekind =3D=3D CoreMemErr
&& VG_STREQ(VG_(get_error_string)(err),
@@ -3042,7 +3047,7 @@
Char* s;
switch (VG_(get_error_kind)(err)) {
case ParamErr: return "Param";
- case UserErr: return NULL; /* Can't suppress User errors =
*/
+ case UserErr: return "User";
case FreeMismatchErr: return "Free";
case IllegalMempoolErr: return "Mempool";
case FreeErr: return "Free";
|
|
From: <sv...@va...> - 2006-12-26 03:10:58
|
Author: sewardj
Date: 2006-12-26 03:10:51 +0000 (Tue, 26 Dec 2006)
New Revision: 6426
Log:
Merge r6371 (fix handling of MPI_LONG_DOUBLE)
Modified:
branches/VALGRIND_3_2_BRANCH/auxprogs/libmpiwrap.c
Modified: branches/VALGRIND_3_2_BRANCH/auxprogs/libmpiwrap.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/auxprogs/libmpiwrap.c 2006-12-26 03:07:0=
2 UTC (rev 6425)
+++ branches/VALGRIND_3_2_BRANCH/auxprogs/libmpiwrap.c 2006-12-26 03:10:5=
1 UTC (rev 6426)
@@ -90,6 +90,7 @@
#define I_WRAP_FNNAME_U(_name) I_WRAP_SONAME_FNNAME_ZU(libmpiZdsoZa,_nam=
e)
=20
=20
+
/*------------------------------------------------------------*/
/*--- Decls ---*/
/*------------------------------------------------------------*/
@@ -108,7 +109,11 @@
# define offsetof(type,memb) ((int)&((type*)0)->memb)
#endif
=20
+/* Find the size of long double image (not 'sizeof(long double)').
+ See comments in sizeofOneNamedTy. */
+static long sizeof_long_double_image ( void );
=20
+
/*------------------------------------------------------------*/
/*--- Simple helpers ---*/
/*------------------------------------------------------------*/
@@ -380,10 +385,14 @@
There is a subtlety, which is that this is required to return the
exact size of one item of the type, NOT the size of it when padded
suitably to make an array of them. In particular that's why the
- size of LONG_DOUBLE is 10 and not sizeof(long double), since the
- latter is 12 at least on x86. Except if sizeof(long double) is
- claimed to be 8 then we'd better respect that.
+ size of LONG_DOUBLE is computed by looking at the result of doing a
+ long double store, rather than just asking what is the sizeof(long
+ double).
=20
+ For LONG_DOUBLE on x86-linux and amd64-linux my impression is that
+ the right answer is 10 even though sizeof(long double) says 12 and
+ 16 respectively. On ppc32-linux it appears to be 16.
+
Ref: MPI 1.1 doc p18 */
static long sizeofOneNamedTy ( MPI_Datatype ty )
{
@@ -398,9 +407,8 @@
if (ty =3D=3D MPI_FLOAT) return sizeof(float);
if (ty =3D=3D MPI_DOUBLE) return sizeof(double);
if (ty =3D=3D MPI_BYTE) return 1;
- if (ty =3D=3D MPI_LONG_DOUBLE)
- return sizeof(long double)=3D=3D8=20
- ? 8 : 10; /* NOT: sizeof(long double); */
+ if (ty =3D=3D MPI_LONG_DOUBLE) return sizeof_long_double_image();
+
/* MPI_PACKED */
/* new in MPI2: */
# if defined(MPI_WCHAR)
@@ -424,6 +432,60 @@
}
=20
=20
+/* Find the size of long double image (not 'sizeof(long double)').
+ See comments in sizeofOneNamedTy.=20
+*/
+static long sizeof_long_double_image ( void )
+{
+ long i;
+ unsigned char* p;
+ static long cached_result =3D 0;
+
+ /* Hopefully we have it already. */
+ if (cached_result !=3D 0) {
+ assert(cached_result =3D=3D 10 || cached_result =3D=3D 16 || cache=
d_result =3D=3D 8);
+ return cached_result;
+ }
+
+ /* No? Then we'll have to compute it. This isn't thread-safe but
+ it doesn't really matter since all races to compute it should
+ produce the same answer. */
+ p =3D malloc(64);
+ assert(p);
+ for (i =3D 0; i < 64; i++)
+ p[i] =3D 0x55;
+
+ /* Write a value which isn't known at compile time and therefore
+ must come out of a register. If we just store a constant here,
+ some compilers write more data than a store from a machine
+ register would. Therefore we have to force a store from a
+ machine register by storing a value which isn't known at compile
+ time. Since getpid() will return a value < 1 million, turn it
+ into a zero by dividing by 1e+30. */
+ *(long double*)(&p[16]) =3D (long double)(1.0e-30 * (double)getpid())=
;
+
+ for (i =3D 0; i < 16; i++) {
+ assert(p[i] =3D=3D 0x55);
+ assert(p[i+48] =3D=3D 0x55);
+ }
+ for (i =3D 16; i <=3D 48; i++) {
+ if (p[i] =3D=3D 0x55)
+ break;
+ }
+
+ assert(i < 48);
+ assert(i > 16);
+ free(p);
+ cached_result =3D i - 16;
+
+ if (0)=20
+ printf("sizeof_long_double_image: computed %d\n", (int)cached_resu=
lt);
+
+ assert(cached_result =3D=3D 10 || cached_result =3D=3D 16 || cached_r=
esult =3D=3D 8);
+ return cached_result;
+}
+
+
/*------------------------------------------------------------*/
/*--- Unpicking datatypes ---*/
/*------------------------------------------------------------*/
@@ -684,11 +746,12 @@
=20
/* ----------------
Do corresponding checks on memory areas defined using a=20
- straightforward (start, length) description.
+ straightforward (start, length) description. Not inlined
+ so as to make any resulting error tracebacks easier to read.
----------------
*/
=20
-static inline
+static
void check_mem_is_defined_untyped ( void* buffer, long nbytes )
{
if (nbytes > 0) {
@@ -696,7 +759,7 @@
}
}
=20
-static inline
+static
void check_mem_is_addressable_untyped ( void* buffer, long nbytes )
{
if (nbytes > 0) {
@@ -704,7 +767,7 @@
}
}
=20
-static inline
+static
void make_mem_defined_if_addressable_untyped ( void* buffer, long nbytes=
)
{
if (nbytes > 0) {
@@ -712,7 +775,7 @@
}
}
=20
-static inline
+static
void make_mem_defined_if_addressable_if_success_untyped ( int err,=20
void* buffer, long nbytes )
{
@@ -721,18 +784,7 @@
}
}
=20
-/* Set the specified area to 'addressible but undefined'
- (safe-to-write) state. */
=20
-static inline
-void make_mem_undefined_untyped ( void* buffer, long nbytes )
-{
- if (nbytes > 0) {
- VALGRIND_MAKE_MEM_UNDEFINED(buffer, nbytes);
- }
-}
-
-
/* ----------------
Do checks on memory areas defined using the MPI (buffer, count,
type) convention.
|
|
From: <sv...@va...> - 2006-12-26 03:07:10
|
Author: sewardj
Date: 2006-12-26 03:07:02 +0000 (Tue, 26 Dec 2006)
New Revision: 6425
Log:
Merge r6356:
CFI reader: when decoding the single (address) argument to
DW_CFA_set_loc, take into account any encoding info conveyed by the
augmentation string. See big comment in the code.
Modified:
branches/VALGRIND_3_2_BRANCH/coregrind/m_debuginfo/readdwarf.c
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_debuginfo/readdwarf.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_debuginfo/readdwarf.c 2006-1=
2-26 03:01:53 UTC (rev 6424)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_debuginfo/readdwarf.c 2006-1=
2-26 03:07:02 UTC (rev 6425)
@@ -1357,6 +1357,69 @@
Only handles 32-bit DWARF.
*/
=20
+/* Comments re DW_CFA_set_loc, 16 Nov 06.
+
+ JRS:
+ Someone recently sent me a libcrypto.so.0.9.8 as distributed with
+ Ubuntu of some flavour, compiled with gcc 4.1.2 on amd64. It
+ causes V's CF reader to complain a lot:
+
+ >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
+ >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
+ >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
+ >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
+ >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:48
+ >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
+
+ After chasing this around a bit it seems that the CF bytecode
+ parser lost sync at a DW_CFA_set_loc, which has a single argument
+ denoting an address.
+
+ As it stands that address is extracted by read_Addr(). On amd64
+ that just fetches 8 bytes regardless of anything else.
+
+ read_encoded_Addr() is more sophisticated. This appears to take
+ into account some kind of encoding flag. When I replace the uses
+ of read_Addr by read_encoded_Addr for DW_CFA_set_loc, the
+ complaints go away, there is no loss of sync, and the parsed CF
+ instructions are the same as shown by readelf --debug-dump=3Dframes.
+
+ So it seems a plausible fix. The problem is I looked in the DWARF3
+ spec and completely failed to figure out whether or not the arg to
+ DW_CFA_set_loc is supposed to be encoded in a way suitable for
+ read_encoded_Addr, nor for that matter any description of what it
+ is that read_encoded_Addr is really decoding.
+
+ TomH:
+ The problem is that the encoding is not standard - the eh_frame
+ section uses the same encoding as the dwarf_frame section except
+ for a few small changes, and this is one of them. So this is not
+ something the DWARF standard covers.
+
+ There is an augmentation string to indicate what is going on though
+ so that programs can recognise it.
+
+ What we are doing seems to match what gdb 6.5 and libdwarf 20060614
+ do though. I'm not sure about readelf though.
+
+ (later): Well dwarfdump barfs on it:
+
+ dwarfdump ERROR: dwarf_get_fde_info_for_reg: =20
+ DW_DLE_DF_FRAME_DECODING_ERROR(193) (193)
+
+ I've looked at binutils as well now, and the code in readelf agrees
+ with your patch - ie it treats set_loc as having an encoded address
+ if there is a zR augmentation indicating an encoding.
+
+ Quite why gdb and libdwarf don't understand this is an interesting
+ question...
+
+ Final outcome: all uses of read_Addr were replaced by
+ read_encoded_Addr. A new type AddressDecodingInfo was added to
+ make it relatively clean to plumb through the extra info needed by
+ read_encoded_Addr.
+*/
+
/* --------------- Decls --------------- */
=20
#if defined(VGP_x86_linux)
@@ -1529,6 +1592,19 @@
}
=20
=20
+/* A structure which holds information needed by read_encoded_Addr().
+ Not sure what these address-like fields are -- really ought to
+ distinguish properly svma/avma/image addresses.=20
+*/
+typedef
+ struct {
+ UChar encoding;
+ UChar* ehframe;
+ Addr ehframe_addr;
+ }
+ AddressDecodingInfo;
+
+
/* ------------ Deal with summary-info records ------------ */
=20
static void initCfiSI ( DiCfSI* si )
@@ -1730,15 +1806,6 @@
return r;
}
=20
-static Addr read_Addr ( UChar* data )
-{
-# if VG_WORDSIZE =3D=3D 4
- return read_UInt(data);
-# else
- return read_ULong(data);
-# endif
-}
-
static UChar read_UChar ( UChar* data )
{
return data[0];
@@ -1767,11 +1834,15 @@
}
}
=20
-static Addr read_encoded_Addr ( UChar* data, UChar encoding, Int *nbytes=
,
- UChar* ehframe, Addr ehframe_addr )
+static Addr read_encoded_Addr ( /*OUT*/Int* nbytes,
+ AddressDecodingInfo* adi,
+ UChar* data )
{
- Addr base;
- Int offset;
+ Addr base;
+ Int offset;
+ UChar encoding =3D adi->encoding;
+ UChar* ehframe =3D adi->ehframe;
+ Addr ehframe_addr =3D adi->ehframe_addr;
=20
vg_assert((encoding & DW_EH_PE_indirect) =3D=3D 0);
=20
@@ -1842,7 +1913,8 @@
*/
static Int run_CF_instruction ( /*MOD*/UnwindContext* ctx,=20
UChar* instr,
- UnwindContext* restore_ctx )
+ UnwindContext* restore_ctx,
+ AddressDecodingInfo* adi )
{
Int off, reg, reg2, nleb, len;
UInt delta;
@@ -1885,7 +1957,11 @@
case DW_CFA_nop:=20
break;
case DW_CFA_set_loc:
- ctx->loc =3D read_Addr(&instr[i]) - ctx->initloc; i+=3D sizeof(=
Addr);
+ /* WAS:=20
+ ctx->loc =3D read_Addr(&instr[i]) - ctx->initloc; i+=3D size=
of(Addr);
+ Was this ever right? */
+ ctx->loc =3D read_encoded_Addr(&len, adi, &instr[i]);
+ i +=3D len;
break;
case DW_CFA_advance_loc1:
delta =3D (UInt)read_UChar(&instr[i]); i+=3D sizeof(UChar);
@@ -2087,7 +2163,8 @@
=20
/* Show a CFI instruction, and also return its length. */
=20
-static Int show_CF_instruction ( UChar* instr )
+static Int show_CF_instruction ( UChar* instr,
+ AddressDecodingInfo* adi )
{
UInt delta;
Int off, reg, reg2, nleb, len;
@@ -2128,7 +2205,9 @@
break;
=20
case DW_CFA_set_loc:
- loc =3D read_Addr(&instr[i]); i+=3D sizeof(Addr);
+ /* WAS: loc =3D read_Addr(&instr[i]); i+=3D sizeof(Addr); */
+ loc =3D read_encoded_Addr(&len, adi, &instr[i]);
+ i +=3D len;
VG_(printf)("DW_CFA_set_loc(%p)\n", loc);=20
break;
=20
@@ -2299,12 +2378,13 @@
}
=20
=20
-static void show_CF_instructions ( UChar* instrs, Int ilen )
+static void show_CF_instructions ( UChar* instrs, Int ilen,
+ AddressDecodingInfo* adi )
{
Int i =3D 0;
while (True) {
if (i >=3D ilen) break;
- i +=3D show_CF_instruction( &instrs[i] );
+ i +=3D show_CF_instruction( &instrs[i], adi );
}
}
=20
@@ -2315,7 +2395,8 @@
Bool run_CF_instructions ( struct _SegInfo* si,
UnwindContext* ctx, UChar* instrs, Int ilen,
UWord fde_arange,
- UnwindContext* restore_ctx )
+ UnwindContext* restore_ctx,
+ AddressDecodingInfo* adi )
{
DiCfSI cfsi;
Bool summ_ok;
@@ -2326,8 +2407,8 @@
while (True) {
loc_prev =3D ctx->loc;
if (i >=3D ilen) break;
- if (0) (void)show_CF_instruction( &instrs[i] );
- j =3D run_CF_instruction( ctx, &instrs[i], restore_ctx );
+ if (0) (void)show_CF_instruction( &instrs[i], adi );
+ j =3D run_CF_instruction( ctx, &instrs[i], restore_ctx, adi );
if (j =3D=3D 0)
return False; /* execution failed */
i +=3D j;
@@ -2403,10 +2484,10 @@
Int n_CIEs =3D 0;
UChar* data =3D ehframe;
=20
-#if defined(VGP_ppc32_linux) || defined(VGP_ppc64_linux)
- // CAB: tmp hack for ppc - no stacktraces for now...
+# if defined(VGP_ppc32_linux) || defined(VGP_ppc64_linux)
+ /* These targets don't use CFI-based stack unwinding. */
return;
-#endif
+# endif
=20
if (VG_(clo_trace_cfi)) {
VG_(printf)("\n-----------------------------------------------\n")=
;
@@ -2611,12 +2692,18 @@
=20
data +=3D the_CIEs[this_CIE].ilen;
=20
- if (VG_(clo_trace_cfi))=20
+ if (VG_(clo_trace_cfi)) {
+ AddressDecodingInfo adi;
+ adi.encoding =3D the_CIEs[this_CIE].address_encoding;
+ adi.ehframe =3D ehframe;
+ adi.ehframe_addr =3D ehframe_addr;
show_CF_instructions(the_CIEs[this_CIE].instrs,=20
- the_CIEs[this_CIE].ilen);
+ the_CIEs[this_CIE].ilen, &adi );
+ }
=20
} else {
=20
+ AddressDecodingInfo adi;
UnwindContext ctx, restore_ctx;
Int cie;
UInt look_for;
@@ -2647,16 +2734,18 @@
goto bad;
}
=20
- fde_initloc=20
- =3D read_encoded_Addr(data, the_CIEs[cie].address_encoding,
- &nbytes, ehframe, ehframe_addr);
+ adi.encoding =3D the_CIEs[cie].address_encoding;
+ adi.ehframe =3D ehframe;
+ adi.ehframe_addr =3D ehframe_addr;
+ fde_initloc =3D read_encoded_Addr(&nbytes, &adi, data);
data +=3D nbytes;
if (VG_(clo_trace_cfi))=20
VG_(printf)("fde.initloc =3D %p\n", (void*)fde_initloc);
=20
- fde_arange=20
- =3D read_encoded_Addr(data, the_CIEs[cie].address_encoding &=
0xf,
- &nbytes, ehframe, ehframe_addr);
+ adi.encoding =3D the_CIEs[cie].address_encoding & 0xf;
+ adi.ehframe =3D ehframe;
+ adi.ehframe_addr =3D ehframe_addr;
+ fde_arange =3D read_encoded_Addr(&nbytes, &adi, data);
data +=3D nbytes;
if (VG_(clo_trace_cfi))=20
VG_(printf)("fde.arangec =3D %p\n", (void*)fde_arange);
@@ -2680,9 +2769,13 @@
=20
data +=3D fde_ilen;
=20
- if (VG_(clo_trace_cfi))=20
- show_CF_instructions(fde_instrs, fde_ilen);
+ adi.encoding =3D the_CIEs[cie].address_encoding;
+ adi.ehframe =3D ehframe;
+ adi.ehframe_addr =3D ehframe_addr;
=20
+ if (VG_(clo_trace_cfi))
+ show_CF_instructions(fde_instrs, fde_ilen, &adi);
+
initUnwindContext(&ctx);
ctx.code_a_f =3D the_CIEs[cie].code_a_f;
ctx.data_a_f =3D the_CIEs[cie].data_a_f;
@@ -2693,12 +2786,14 @@
=20
ok =3D run_CF_instructions(
NULL, &ctx, the_CIEs[cie].instrs,=20
- the_CIEs[cie].ilen, 0, NULL);
+ the_CIEs[cie].ilen, 0, NULL, &adi
+ );
if (ok) {
restore_ctx =3D ctx;
ok =3D run_CF_instructions(
si, &ctx, fde_instrs, fde_ilen, fde_arange,=20
- &restore_ctx);
+ &restore_ctx, &adi
+ );
}
}
}
|
|
From: <sv...@va...> - 2006-12-26 03:02:08
|
Author: sewardj
Date: 2006-12-26 03:01:53 +0000 (Tue, 26 Dec 2006)
New Revision: 6424
Log:
Merge r6341 (ExeContext hashing fix)
Modified:
branches/VALGRIND_3_2_BRANCH/coregrind/m_execontext.c
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_execontext.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_execontext.c 2006-12-26 02:5=
9:50 UTC (rev 6423)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_execontext.c 2006-12-26 03:0=
1:53 UTC (rev 6424)
@@ -185,6 +185,13 @@
on the returned ExeContext* values themselves. Inspired by Hugs's
Text type. =20
*/
+static inline UWord ROLW ( UWord w, Int n )
+{
+ Int bpw =3D 8 * sizeof(UWord);
+ w =3D (w << n) | (w >> (bpw-n));
+ return w;
+}
+
ExeContext* VG_(record_ExeContext) ( ThreadId tid )
{
Int i;
@@ -194,7 +201,13 @@
ExeContext* new_ec;
ExeContext* list;
UInt n_ips;
+ ExeContext *prev2, *prev;
=20
+ static UInt ctr =3D 0;
+
+ vg_assert(sizeof(void*) =3D=3D sizeof(UWord));
+ vg_assert(sizeof(void*) =3D=3D sizeof(Addr));
+
init_ExeContext_storage();
vg_assert(VG_(clo_backtrace_size) >=3D 1 &&
VG_(clo_backtrace_size) <=3D VG_DEEPEST_BACKTRACE);
@@ -208,15 +221,19 @@
hash =3D 0;
for (i =3D 0; i < n_ips; i++) {
hash ^=3D ips[i];
- hash =3D (hash << 29) | (hash >> 3);
+ hash =3D ROLW(hash, 19);
}
+ if (0) VG_(printf)("hash 0x%lx ", hash);
hash =3D hash % N_EC_LISTS;
+ if (0) VG_(printf)("%lu\n", hash);
=20
/* And (the expensive bit) look a matching entry in the list. */
=20
ec_searchreqs++;
=20
- list =3D ec_list[hash];
+ prev2 =3D NULL;
+ prev =3D NULL;
+ list =3D ec_list[hash];
=20
while (True) {
if (list =3D=3D NULL) break;
@@ -229,11 +246,22 @@
}
}
if (same) break;
- list =3D list->next;
+ prev2 =3D prev;
+ prev =3D list;
+ list =3D list->next;
}
=20
if (list !=3D NULL) {
- /* Yay! We found it. */
+ /* Yay! We found it. Once every 8 searches, move it one step
+ closer to the start of the list to make future searches
+ cheaper. */
+ if (prev2 && prev && 0 =3D=3D ((ctr++) & 7)) {
+ vg_assert(prev2->next =3D=3D prev);
+ vg_assert(prev->next =3D=3D list);
+ prev2->next =3D list;
+ prev->next =3D list->next;
+ list->next =3D prev;
+ }
return list;
}
=20
|
|
From: <sv...@va...> - 2006-12-26 02:59:54
|
Author: sewardj
Date: 2006-12-26 02:59:50 +0000 (Tue, 26 Dec 2006)
New Revision: 6423
Log:
Merge r6365 and r6367 (fix for: "Drepper: obscure Cachegrind
simulation bug", and the same for Callgrind)
Modified:
branches/VALGRIND_3_2_BRANCH/cachegrind/cg_sim.c
branches/VALGRIND_3_2_BRANCH/callgrind/sim.c
Modified: branches/VALGRIND_3_2_BRANCH/cachegrind/cg_sim.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/cachegrind/cg_sim.c 2006-12-26 02:56:23 =
UTC (rev 6422)
+++ branches/VALGRIND_3_2_BRANCH/cachegrind/cg_sim.c 2006-12-26 02:59:50 =
UTC (rev 6423)
@@ -80,21 +80,6 @@
c->tags[i] =3D 0;
}
=20
-#if 0
-static void print_cache(cache_t2* c)
-{
- UInt set, way, i;
-
- /* Note initialisation and update of 'i'. */
- for (i =3D 0, set =3D 0; set < c->sets; set++) {
- for (way =3D 0; way < c->assoc; way++, i++) {
- VG_(printf)("%16lx ", c->tags[i]);
- }
- VG_(printf)("\n");
- }
-}
-#endif=20
-
/* This is done as a macro rather than by passing in the cache_t2 as an=20
* arg because it slows things down by a small amount (3-5%) due to all=20
* that extra indirection. */
@@ -114,9 +99,10 @@
static __inline__ =
\
void cachesim_##L##_doref(Addr a, UChar size, ULong* m1, ULong *m2) =
\
{ =
\
- register UInt set1 =3D ( a >> L.line_size_bits) & (L.sets_mi=
n_1); \
- register UInt set2 =3D ((a+size-1) >> L.line_size_bits) & (L.sets_mi=
n_1); \
- register UWord tag =3D a >> L.tag_shift; =
\
+ UInt set1 =3D ( a >> L.line_size_bits) & (L.sets_min_1); =
\
+ UInt set2 =3D ((a+size-1) >> L.line_size_bits) & (L.sets_min_1); =
\
+ UWord tag =3D a >> L.tag_shift; =
\
+ UWord tag2; =
\
Int i, j; =
\
Bool is_miss =3D False; =
\
UWord* set; =
\
@@ -176,22 +162,23 @@
is_miss =3D True; =
\
block2: =
\
set =3D &(L.tags[set2 << L.assoc_bits]); =
\
- if (tag =3D=3D set[0]) { =
\
+ tag2 =3D (a+size-1) >> L.tag_shift; =
\
+ if (tag2 =3D=3D set[0]) { =
\
goto miss_treatment; =
\
} =
\
for (i =3D 1; i < L.assoc; i++) { =
\
- if (tag =3D=3D set[i]) { =
\
+ if (tag2 =3D=3D set[i]) { =
\
for (j =3D i; j > 0; j--) { =
\
set[j] =3D set[j - 1]; =
\
} =
\
- set[0] =3D tag; =
\
+ set[0] =3D tag2; =
\
goto miss_treatment; =
\
} =
\
} =
\
for (j =3D L.assoc - 1; j > 0; j--) { =
\
set[j] =3D set[j - 1]; =
\
} =
\
- set[0] =3D tag; =
\
+ set[0] =3D tag2; =
\
is_miss =3D True; =
\
miss_treatment: =
\
if (is_miss) { MISS_TREATMENT; } =
\
Modified: branches/VALGRIND_3_2_BRANCH/callgrind/sim.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/callgrind/sim.c 2006-12-26 02:56:23 UTC =
(rev 6422)
+++ branches/VALGRIND_3_2_BRANCH/callgrind/sim.c 2006-12-26 02:59:50 UTC =
(rev 6423)
@@ -300,10 +300,11 @@
/* Access straddles two lines. */
/* Nb: this is a fast way of doing ((set1+1) % c->sets) */
else if (((set1 + 1) & (c->sets-1)) =3D=3D set2) {
+ UWord tag2 =3D (a+size-1) >> c->tag_shift;
=20
/* the call updates cache structures as side effect */
CacheResult res1 =3D cachesim_setref(c, set1, tag);
- CacheResult res2 =3D cachesim_setref(c, set2, tag);
+ CacheResult res2 =3D cachesim_setref(c, set2, tag2);
return ((res1 =3D=3D Miss) || (res2 =3D=3D Miss)) ? Miss : Hit;
=20
} else {
@@ -404,10 +405,11 @@
/* Access straddles two lines. */
/* Nb: this is a fast way of doing ((set1+1) % c->sets) */
else if (((set1 + 1) & (c->sets-1)) =3D=3D set2) {
+ UWord tag2 =3D (a+size-1) >> c->tag_shift;
=20
/* the call updates cache structures as side effect */
CacheResult res1 =3D cachesim_setref_wb(c, ref, set1, tag);
- CacheResult res2 =3D cachesim_setref_wb(c, ref, set2, tag);
+ CacheResult res2 =3D cachesim_setref_wb(c, ref, set2, tag2);
=20
if ((res1 =3D=3D MissDirty) || (res2 =3D=3D MissDirty)) return MissDirt=
y;
return ((res1 =3D=3D Miss) || (res2 =3D=3D Miss)) ? Miss : Hit;
@@ -758,10 +760,11 @@
/* Access straddles two lines. */
/* Nb: this is a fast way of doing ((set1+1) % c->sets) */
else if (((set1 + 1) & (c->sets-1)) =3D=3D set2) {
+ UWord tag2 =3D a >> c->tag_shift;
=20
/* the call updates cache structures as side effect */
CacheResult res1 =3D cacheuse_isMiss(c, set1, tag);
- CacheResult res2 =3D cacheuse_isMiss(c, set2, tag);
+ CacheResult res2 =3D cacheuse_isMiss(c, set2, tag2);
return ((res1 =3D=3D Miss) || (res2 =3D=3D Miss)) ? Miss : Hit;
=20
} else {
@@ -778,9 +781,10 @@
=
\
static CacheModelResult cacheuse##_##L##_doRead(Addr a, UChar size) =
\
{ =
\
- register UInt set1 =3D ( a >> L.line_size_bits) & (L.sets_min=
_1); \
- register UInt set2 =3D ((a+size-1) >> L.line_size_bits) & (L.sets_min=
_1); \
- register UWord tag =3D a & L.tag_mask; =
\
+ UInt set1 =3D ( a >> L.line_size_bits) & (L.sets_min_1); =
\
+ UInt set2 =3D ((a+size-1) >> L.line_size_bits) & (L.sets_min_1); =
\
+ UWord tag =3D a & L.tag_mask; =
\
+ UWord tag2; =
\
int i, j, idx; =
\
UWord *set, tmp_tag; \
UInt use_mask; \
@@ -879,7 +883,8 @@
block2: =
\
set =3D &(L.tags[set2 << L.assoc_bits]); =
\
use_mask =3D L.line_end_mask[(a+size-1) & L.line_size_mask]; =
\
- if (tag =3D=3D (set[0] & L.tag_mask)) { =
\
+ tag2 =3D (a+size-1) & L.tag_mask; =
\
+ if (tag2 =3D=3D (set[0] & L.tag_mask)) { =
\
idx =3D (set2 << L.assoc_bits) | (set[0] & ~L.tag_mask); =
\
L.use[idx].count ++; =
\
L.use[idx].mask |=3D use_mask; =
\
@@ -889,7 +894,7 @@
return miss1; =
\
} =
\
for (i =3D 1; i < L.assoc; i++) { =
\
- if (tag =3D=3D (set[i] & L.tag_mask)) { \
+ if (tag2 =3D=3D (set[i] & L.tag_mask)) { \
tmp_tag =3D set[i]; =
\
for (j =3D i; j > 0; j--) { =
\
set[j] =3D set[j - 1]; =
\
@@ -908,7 +913,7 @@
for (j =3D L.assoc - 1; j > 0; j--) { =
\
set[j] =3D set[j - 1]; =
\
} =
\
- set[0] =3D tag | tmp_tag; =
\
+ set[0] =3D tag2 | tmp_tag; =
\
idx =3D (set2 << L.assoc_bits) | tmp_tag; =
\
miss2 =3D update_##L##_use(&L, idx, \
use_mask, (a+size-1) &~ L.line_size_mask); \
|
|
From: <sv...@va...> - 2006-12-26 02:56:26
|
Author: sewardj
Date: 2006-12-26 02:56:23 +0000 (Tue, 26 Dec 2006)
New Revision: 6422
Log:
Merge r6211 (Cachegrind: Update cache parameter detection)
Modified:
branches/VALGRIND_3_2_BRANCH/cachegrind/cg-amd64.c
branches/VALGRIND_3_2_BRANCH/cachegrind/cg-x86.c
Modified: branches/VALGRIND_3_2_BRANCH/cachegrind/cg-amd64.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/cachegrind/cg-amd64.c 2006-12-26 02:54:4=
6 UTC (rev 6421)
+++ branches/VALGRIND_3_2_BRANCH/cachegrind/cg-amd64.c 2006-12-26 02:56:2=
3 UTC (rev 6422)
@@ -88,9 +88,10 @@
break;
=20
/* TLB info, ignore */
- case 0x01: case 0x02: case 0x03: case 0x04:
- case 0x50: case 0x51: case 0x52: case 0x5b: case 0x5c: case 0x5d:
- case 0xb0: case 0xb3:
+ case 0x01: case 0x02: case 0x03: case 0x04: case 0x05:
+ case 0x50: case 0x51: case 0x52: case 0x56: case 0x57:
+ case 0x5b: case 0x5c: case 0x5d:
+ case 0xb0: case 0xb1: case 0xb3: case 0xb4:
break; =20
=20
case 0x06: *I1c =3D (cache_t) { 8, 4, 32 }; break;
@@ -107,7 +108,7 @@
case 0x90: case 0x96: case 0x9b:
VG_(tool_panic)("IA-64 cache detected?!");
=20
- case 0x22: case 0x23: case 0x25: case 0x29:=20
+ case 0x22: case 0x23: case 0x25: case 0x29: case 0x46: case 0x47:
VG_(message)(Vg_DebugMsg,=20
"warning: L3 cache detected but ignored\n");
break;
@@ -128,6 +129,7 @@
case 0x43: *L2c =3D (cache_t) { 512, 4, 32 }; L2_found =3D True; =
break;
case 0x44: *L2c =3D (cache_t) { 1024, 4, 32 }; L2_found =3D True; =
break;
case 0x45: *L2c =3D (cache_t) { 2048, 4, 32 }; L2_found =3D True; =
break;
+ case 0x49: *L2c =3D (cache_t) { 4096,16, 64 }; L2_found =3D True; =
break;
=20
/* These are sectored, whatever that means */
case 0x60: *D1c =3D (cache_t) { 16, 8, 64 }; break; /* secto=
red */
@@ -169,6 +171,10 @@
case 0x86: *L2c =3D (cache_t) { 512, 4, 64 }; L2_found =3D True;=
break;
case 0x87: *L2c =3D (cache_t) { 1024, 8, 64 }; L2_found =3D True;=
break;
=20
+ /* Ignore prefetch information */
+ case 0xf0: case 0xf1:
+ break;
+
default:
VG_(message)(Vg_DebugMsg,=20
"warning: Unknown Intel cache config value "
Modified: branches/VALGRIND_3_2_BRANCH/cachegrind/cg-x86.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/cachegrind/cg-x86.c 2006-12-26 02:54:46 =
UTC (rev 6421)
+++ branches/VALGRIND_3_2_BRANCH/cachegrind/cg-x86.c 2006-12-26 02:56:23 =
UTC (rev 6422)
@@ -88,9 +88,10 @@
break;
=20
/* TLB info, ignore */
- case 0x01: case 0x02: case 0x03: case 0x04:
- case 0x50: case 0x51: case 0x52: case 0x5b: case 0x5c: case 0x5d:
- case 0xb0: case 0xb3:
+ case 0x01: case 0x02: case 0x03: case 0x04: case 0x05:
+ case 0x50: case 0x51: case 0x52: case 0x56: case 0x57:
+ case 0x5b: case 0x5c: case 0x5d:
+ case 0xb0: case 0xb1: case 0xb3: case 0xb4:
break; =20
=20
case 0x06: *I1c =3D (cache_t) { 8, 4, 32 }; break;
@@ -107,7 +108,7 @@
case 0x90: case 0x96: case 0x9b:
VG_(tool_panic)("IA-64 cache detected?!");
=20
- case 0x22: case 0x23: case 0x25: case 0x29:=20
+ case 0x22: case 0x23: case 0x25: case 0x29: case 0x46: case 0x47:
VG_(message)(Vg_DebugMsg, "warning: L3 cache detected but igno=
red");
break;
=20
@@ -127,6 +128,7 @@
case 0x43: *L2c =3D (cache_t) { 512, 4, 32 }; L2_found =3D True; =
break;
case 0x44: *L2c =3D (cache_t) { 1024, 4, 32 }; L2_found =3D True; =
break;
case 0x45: *L2c =3D (cache_t) { 2048, 4, 32 }; L2_found =3D True; =
break;
+ case 0x49: *L2c =3D (cache_t) { 4096,16, 64 }; L2_found =3D True; =
break;
=20
/* These are sectored, whatever that means */
case 0x60: *D1c =3D (cache_t) { 16, 8, 64 }; break; /* secto=
red */
|
|
From: <sv...@va...> - 2006-12-26 02:54:48
|
Author: sewardj
Date: 2006-12-26 02:54:46 +0000 (Tue, 26 Dec 2006)
New Revision: 6421
Log:
Merge r6084 (fix for #134727: valgrind exits with "Value too large
for defined data type")
Modified:
branches/VALGRIND_3_2_BRANCH/coregrind/m_libcfile.c
Modified: branches/VALGRIND_3_2_BRANCH/coregrind/m_libcfile.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_2_BRANCH/coregrind/m_libcfile.c 2006-12-25 23:32:=
41 UTC (rev 6420)
+++ branches/VALGRIND_3_2_BRANCH/coregrind/m_libcfile.c 2006-12-26 02:54:=
46 UTC (rev 6421)
@@ -234,10 +234,14 @@
/* returns: 0 =3D success, non-0 is failure */
Int VG_(check_executable)(HChar* f)
{
+#ifdef __NR_stat64
+ struct vki_stat64 st;
+ SysRes res =3D VG_(do_syscall2)(__NR_stat64, (UWord)f, (UWord)&st);
+#else
struct vki_stat st;
- SysRes res;
+ SysRes res =3D VG_(do_syscall2)(__NR_stat, (UWord)f, (UWord)&st);
+#endif
=20
- res =3D VG_(stat)(f, &st);
if (res.isError) {
return res.val;
}
|
|
From: <sv...@va...> - 2006-12-26 02:37:40
|
Author: sewardj
Date: 2006-12-26 02:37:38 +0000 (Tue, 26 Dec 2006)
New Revision: 1701
Log:
Merge r1686 (speed up register allocator by using a less braindead
algorithm for maintenance of real register live ranges)
Modified:
branches/VEX_3_2_BRANCH/priv/host-generic/reg_alloc2.c
Modified: branches/VEX_3_2_BRANCH/priv/host-generic/reg_alloc2.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_2_BRANCH/priv/host-generic/reg_alloc2.c 2006-12-26 02:=
34:31 UTC (rev 1700)
+++ branches/VEX_3_2_BRANCH/priv/host-generic/reg_alloc2.c 2006-12-26 02:=
37:38 UTC (rev 1701)
@@ -129,6 +129,7 @@
}
RRegState;
=20
+
/* The allocator also maintains a redundant array of indexes
(vreg_state) from vreg numbers back to entries in rreg_state. It
is redundant because iff vreg_state[i] =3D=3D j then
@@ -152,7 +153,6 @@
#define IS_VALID_RREGNO(_zz) ((_zz) >=3D 0 && (_zz) < n_rregs)
=20
=20
-
/* Does this instruction mention a particular reg? */
static Bool instrMentionsReg (=20
void (*getRegUsage) (HRegUsage*, HInstr*, Bool),
@@ -215,7 +215,6 @@
}
=20
=20
-
/* Double the size of the real-reg live-range array, if needed. */
static void ensureRRLRspace ( RRegLR** info, Int* size, Int used )
{
@@ -233,6 +232,62 @@
}
=20
=20
+/* Sort an array of RRegLR entries by either the .live_after or
+ .dead_before fields. This is performance-critical. */
+static void sortRRLRarray ( RRegLR* arr,=20
+ Int size, Bool by_live_after )
+{
+ Int incs[14] =3D { 1, 4, 13, 40, 121, 364, 1093, 3280,
+ 9841, 29524, 88573, 265720,
+ 797161, 2391484 };
+ Int lo =3D 0;
+ Int hi =3D size-1;
+ Int i, j, h, bigN, hp;
+ RRegLR v;
+
+ vassert(size >=3D 0);
+ if (size =3D=3D 0)
+ return;
+
+ bigN =3D hi - lo + 1; if (bigN < 2) return;
+ hp =3D 0; while (hp < 14 && incs[hp] < bigN) hp++; hp--;
+
+ if (by_live_after) {
+
+ for ( ; hp >=3D 0; hp--) {
+ h =3D incs[hp];
+ for (i =3D lo + h; i <=3D hi; i++) {
+ v =3D arr[i];
+ j =3D i;
+ while (arr[j-h].live_after > v.live_after) {
+ arr[j] =3D arr[j-h];
+ j =3D j - h;
+ if (j <=3D (lo + h - 1)) break;
+ }
+ arr[j] =3D v;
+ }
+ }
+
+ } else {
+
+ for ( ; hp >=3D 0; hp--) {
+ h =3D incs[hp];
+ for (i =3D lo + h; i <=3D hi; i++) {
+ v =3D arr[i];
+ j =3D i;
+ while (arr[j-h].dead_before > v.dead_before) {
+ arr[j] =3D arr[j-h];
+ j =3D j - h;
+ if (j <=3D (lo + h - 1)) break;
+ }
+ arr[j] =3D v;
+ }
+ }
+
+ }
+}
+
+
/* A target-independent register allocator. Requires various
functions which it uses to deal abstractly with instructions and
registers, since it cannot have any target-specific knowledge.
@@ -294,9 +349,18 @@
Int n_vregs;
VRegLR* vreg_lrs; /* [0 .. n_vregs-1] */
=20
- RRegLR* rreg_lrs;
+ /* We keep two copies of the real-reg live range info, one sorted
+ by .live_after and the other by .dead_before. First the
+ unsorted info is created in the _la variant is copied into the
+ _db variant. Once that's done both of them are sorted.=20
+ We also need two integer cursors which record the next
+ location in the two arrays to consider. */
+ RRegLR* rreg_lrs_la;
+ RRegLR* rreg_lrs_db;
Int rreg_lrs_size;
Int rreg_lrs_used;
+ Int rreg_lrs_la_next;
+ Int rreg_lrs_db_next;
=20
/* Used when constructing vreg_lrs (for allocating stack
slots). */
@@ -437,7 +501,8 @@
=20
rreg_lrs_used =3D 0;
rreg_lrs_size =3D 4;
- rreg_lrs =3D LibVEX_Alloc(rreg_lrs_size * sizeof(RRegLR));
+ rreg_lrs_la =3D LibVEX_Alloc(rreg_lrs_size * sizeof(RRegLR));
+ rreg_lrs_db =3D NULL; /* we'll create this later */
=20
/* We'll need to track live range start/end points seperately for
each rreg. Sigh. */
@@ -593,12 +658,12 @@
if (flush) {
vassert(flush_la !=3D INVALID_INSTRNO);
vassert(flush_db !=3D INVALID_INSTRNO);
- ensureRRLRspace(&rreg_lrs, &rreg_lrs_size, rreg_lrs_used);
+ ensureRRLRspace(&rreg_lrs_la, &rreg_lrs_size, rreg_lrs_used)=
;
if (0)=20
vex_printf("FLUSH 1 (%d,%d)\n", flush_la, flush_db);
- rreg_lrs[rreg_lrs_used].rreg =3D rreg;
- rreg_lrs[rreg_lrs_used].live_after =3D toShort(flush_la);
- rreg_lrs[rreg_lrs_used].dead_before =3D toShort(flush_db);
+ rreg_lrs_la[rreg_lrs_used].rreg =3D rreg;
+ rreg_lrs_la[rreg_lrs_used].live_after =3D toShort(flush_la)=
;
+ rreg_lrs_la[rreg_lrs_used].dead_before =3D toShort(flush_db)=
;
rreg_lrs_used++;
}
=20
@@ -629,13 +694,13 @@
if (rreg_live_after[j] =3D=3D INVALID_INSTRNO)
continue;
=20
- ensureRRLRspace(&rreg_lrs, &rreg_lrs_size, rreg_lrs_used);
+ ensureRRLRspace(&rreg_lrs_la, &rreg_lrs_size, rreg_lrs_used);
if (0)
vex_printf("FLUSH 2 (%d,%d)\n",=20
rreg_live_after[j], rreg_dead_before[j]);
- rreg_lrs[rreg_lrs_used].rreg =3D available_real_regs[j];
- rreg_lrs[rreg_lrs_used].live_after =3D toShort(rreg_live_after[j]=
);
- rreg_lrs[rreg_lrs_used].dead_before =3D toShort(rreg_dead_before[j=
]);
+ rreg_lrs_la[rreg_lrs_used].rreg =3D available_real_regs[j];
+ rreg_lrs_la[rreg_lrs_used].live_after =3D toShort(rreg_live_after=
[j]);
+ rreg_lrs_la[rreg_lrs_used].dead_before =3D toShort(rreg_dead_befor=
e[j]);
rreg_lrs_used++;
}
=20
@@ -648,7 +713,7 @@
this mechanism -- it is only an optimisation. */
=20
for (j =3D 0; j < rreg_lrs_used; j++) {
- rreg =3D rreg_lrs[j].rreg;
+ rreg =3D rreg_lrs_la[j].rreg;
vassert(!hregIsVirtual(rreg));
/* rreg is involved in a HLR. Record this info in the array, if
there is space. */
@@ -667,6 +732,24 @@
}
}
=20
+ /* Finally, copy the _la variant into the _db variant and
+ sort both by their respective fields. */
+ rreg_lrs_db =3D LibVEX_Alloc(rreg_lrs_used * sizeof(RRegLR));
+ for (j =3D 0; j < rreg_lrs_used; j++)
+ rreg_lrs_db[j] =3D rreg_lrs_la[j];
+
+ sortRRLRarray( rreg_lrs_la, rreg_lrs_used, True /* by .live_after*/ =
);
+ sortRRLRarray( rreg_lrs_db, rreg_lrs_used, False/* by .dead_before*/ =
);
+
+ /* And set up the cursors. */
+ rreg_lrs_la_next =3D 0;
+ rreg_lrs_db_next =3D 0;
+
+ for (j =3D 1; j < rreg_lrs_used; j++) {
+ vassert(rreg_lrs_la[j-1].live_after <=3D rreg_lrs_la[j].live_afte=
r);
+ vassert(rreg_lrs_db[j-1].dead_before <=3D rreg_lrs_db[j].dead_befo=
re);
+ }
+
/* ------ end of FINALISE RREG LIVE RANGES ------ */
=20
# if DEBUG_REGALLOC
@@ -677,11 +760,20 @@
# endif
=20
# if DEBUG_REGALLOC
+ vex_printf("RRegLRs by LA:\n");
for (j =3D 0; j < rreg_lrs_used; j++) {
- (*ppReg)(rreg_lrs[j].rreg);
+ vex_printf(" ");
+ (*ppReg)(rreg_lrs_la[j].rreg);
vex_printf(" la =3D %d, db =3D %d\n",
- rreg_lrs[j].live_after, rreg_lrs[j].dead_before );
+ rreg_lrs_la[j].live_after, rreg_lrs_la[j].dead_before )=
;
}
+ vex_printf("RRegLRs by DB:\n");
+ for (j =3D 0; j < rreg_lrs_used; j++) {
+ vex_printf(" ");
+ (*ppReg)(rreg_lrs_db[j].rreg);
+ vex_printf(" la =3D %d, db =3D %d\n",
+ rreg_lrs_db[j].live_after, rreg_lrs_db[j].dead_before )=
;
+ }
# endif
=20
/* --------- Stage 3: allocate spill slots. --------- */
@@ -815,8 +907,8 @@
this insn must be marked as unavailable in the running
state. */
for (j =3D 0; j < rreg_lrs_used; j++) {
- if (rreg_lrs[j].live_after < ii=20
- && ii < rreg_lrs[j].dead_before) {
+ if (rreg_lrs_la[j].live_after < ii=20
+ && ii < rreg_lrs_la[j].dead_before) {
/* ii is the middle of a hard live range for some real
reg. Check it's marked as such in the running
state. */
@@ -831,7 +923,7 @@
=20
/* find the state entry for this rreg */
for (k =3D 0; k < n_rregs; k++)
- if (rreg_state[k].rreg =3D=3D rreg_lrs[j].rreg)
+ if (rreg_state[k].rreg =3D=3D rreg_lrs_la[j].rreg)
break;
=20
/* and assert that this rreg is marked as unavailable */
@@ -850,9 +942,9 @@
if (rreg_state[j].disp !=3D Unavail)
continue;
for (k =3D 0; k < rreg_lrs_used; k++)=20
- if (rreg_lrs[k].rreg =3D=3D rreg_state[j].rreg
- && rreg_lrs[k].live_after < ii=20
- && ii < rreg_lrs[k].dead_before)=20
+ if (rreg_lrs_la[k].rreg =3D=3D rreg_state[j].rreg
+ && rreg_lrs_la[k].live_after < ii=20
+ && ii < rreg_lrs_la[k].dead_before)=20
break;
/* If this vassertion fails, we couldn't find a
corresponding HLR. */
@@ -980,49 +1072,60 @@
Note we could do better:
* Could move it into some other free rreg, if one is available=20
=20
- Simplest way to do this is to iterate over the collection
- of rreg live ranges.
+ Do this efficiently, by incrementally stepping along an array
+ of rreg HLRs that are known to be sorted by start point
+ (their .live_after field).
*/
- for (j =3D 0; j < rreg_lrs_used; j++) {
- if (rreg_lrs[j].live_after =3D=3D ii) {
- /* rreg_lrs[j].rreg needs to be freed up. Find=20
- the associated rreg_state entry. */
- /* Note, re rreg_lrs[j].live_after =3D=3D ii. Real register
- live ranges are guaranteed to be well-formed in that
- they start with a write to the register -- Stage 2
- rejects any code not satisfying this. So the correct
- question to ask is whether rreg_lrs[j].live_after =3D=3D
- ii, that is, whether the reg becomes live after this
- insn -- rather than before it. */
-# if DEBUG_REGALLOC
- vex_printf("need to free up rreg: ");
- (*ppReg)(rreg_lrs[j].rreg);
- vex_printf("\n\n");
-# endif
- for (k =3D 0; k < n_rregs; k++)
- if (rreg_state[k].rreg =3D=3D rreg_lrs[j].rreg)
- break;
- /* If this fails, we don't have an entry for this rreg.
- Which we should. */
- vassert(IS_VALID_RREGNO(k));
- m =3D hregNumber(rreg_state[k].vreg);
- if (rreg_state[k].disp =3D=3D Bound) {
- /* Yes, there is an associated vreg. Spill it if it's
- still live. */
- vassert(IS_VALID_VREGNO(m));
- vreg_state[m] =3D INVALID_RREG_NO;
- if (vreg_lrs[m].dead_before > ii) {
- vassert(vreg_lrs[m].reg_class !=3D HRcINVALID);
- EMIT_INSTR( (*genSpill)( rreg_state[k].rreg,
- vreg_lrs[m].spill_offset,
- mode64 ) );
- }
+ while (True) {
+ vassert(rreg_lrs_la_next >=3D 0);
+ vassert(rreg_lrs_la_next <=3D rreg_lrs_used);
+ if (rreg_lrs_la_next =3D=3D rreg_lrs_used)
+ break; /* no more real reg live ranges to consider */
+ if (ii < rreg_lrs_la[rreg_lrs_la_next].live_after)
+ break; /* next live range does not yet start */
+ vassert(ii =3D=3D rreg_lrs_la[rreg_lrs_la_next].live_after);
+ /* rreg_lrs_la[rreg_lrs_la_next].rreg needs to be freed up.
+ Find the associated rreg_state entry. */
+ /* Note, re ii =3D=3D rreg_lrs_la[rreg_lrs_la_next].live_after.
+ Real register live ranges are guaranteed to be well-formed
+ in that they start with a write to the register -- Stage 2
+ rejects any code not satisfying this. So the correct
+ question to ask is whether
+ rreg_lrs_la[rreg_lrs_la_next].live_after =3D=3D ii, that is,
+ whether the reg becomes live after this insn -- rather
+ than before it. */
+# if DEBUG_REGALLOC
+ vex_printf("need to free up rreg: ");
+ (*ppReg)(rreg_lrs_la[rreg_lrs_la_next].rreg);
+ vex_printf("\n\n");
+# endif
+ for (k =3D 0; k < n_rregs; k++)
+ if (rreg_state[k].rreg =3D=3D rreg_lrs_la[rreg_lrs_la_next].=
rreg)
+ break;
+ /* If this fails, we don't have an entry for this rreg.
+ Which we should. */
+ vassert(IS_VALID_RREGNO(k));
+ m =3D hregNumber(rreg_state[k].vreg);
+ if (rreg_state[k].disp =3D=3D Bound) {
+ /* Yes, there is an associated vreg. Spill it if it's
+ still live. */
+ vassert(IS_VALID_VREGNO(m));
+ vreg_state[m] =3D INVALID_RREG_NO;
+ if (vreg_lrs[m].dead_before > ii) {
+ vassert(vreg_lrs[m].reg_class !=3D HRcINVALID);
+ EMIT_INSTR( (*genSpill)( rreg_state[k].rreg,
+ vreg_lrs[m].spill_offset,
+ mode64 ) );
}
- rreg_state[k].disp =3D Unavail;
- rreg_state[k].vreg =3D INVALID_HREG;
}
+ rreg_state[k].disp =3D Unavail;
+ rreg_state[k].vreg =3D INVALID_HREG;
+
+ /* check for further rregs entering HLRs at this point */
+ rreg_lrs_la_next++;
}
=20
+
# if DEBUG_REGALLOC
vex_printf("After pre-insn actions for fixed regs:\n");
PRINT_STATE;
@@ -1220,20 +1323,28 @@
=20
/* Now we need to check for rregs exiting fixed live ranges
after this instruction, and if so mark them as free. */
- for (j =3D 0; j < rreg_lrs_used; j++) {
- if (rreg_lrs[j].dead_before =3D=3D ii+1) {
- /* rreg_lrs[j].rreg is exiting a hard live range. Mark
- it as such in the main rreg_state array. */
- for (k =3D 0; k < n_rregs; k++)
- if (rreg_state[k].rreg =3D=3D rreg_lrs[j].rreg)
- break;
- /* If this vassertion fails, we don't have an entry for
- this rreg. Which we should. */
- vassert(k < n_rregs);
- vassert(rreg_state[k].disp =3D=3D Unavail);
- rreg_state[k].disp =3D Free;
- rreg_state[k].vreg =3D INVALID_HREG;
- }
+ while (True) {
+ vassert(rreg_lrs_db_next >=3D 0);
+ vassert(rreg_lrs_db_next <=3D rreg_lrs_used);
+ if (rreg_lrs_db_next =3D=3D rreg_lrs_used)
+ break; /* no more real reg live ranges to consider */
+ if (ii+1 < rreg_lrs_db[rreg_lrs_db_next].dead_before)
+ break; /* next live range does not yet start */
+ vassert(ii+1 =3D=3D rreg_lrs_db[rreg_lrs_db_next].dead_before);
+ /* rreg_lrs_db[[rreg_lrs_db_next].rreg is exiting a hard live
+ range. Mark it as such in the main rreg_state array. */
+ for (k =3D 0; k < n_rregs; k++)
+ if (rreg_state[k].rreg =3D=3D rreg_lrs_db[rreg_lrs_db_next].=
rreg)
+ break;
+ /* If this vassertion fails, we don't have an entry for
+ this rreg. Which we should. */
+ vassert(k < n_rregs);
+ vassert(rreg_state[k].disp =3D=3D Unavail);
+ rreg_state[k].disp =3D Free;
+ rreg_state[k].vreg =3D INVALID_HREG;
+
+ /* check for further rregs leaving HLRs at this point */
+ rreg_lrs_db_next++;
}
=20
# if DEBUG_REGALLOC
@@ -1254,6 +1365,9 @@
for (j =3D 0; j < n_rregs; j++)
vassert(rreg_state[j].rreg =3D=3D available_real_regs[j]);
=20
+ vassert(rreg_lrs_la_next =3D=3D rreg_lrs_used);
+ vassert(rreg_lrs_db_next =3D=3D rreg_lrs_used);
+
return instrs_out;
=20
# undef INVALID_INSTRNO
|
|
From: <sv...@va...> - 2006-12-26 02:34:32
|
Author: sewardj
Date: 2006-12-26 02:34:31 +0000 (Tue, 26 Dec 2006)
New Revision: 1700
Log:
Merge r1669 (ppc64 be imm64 improvements)
Modified:
branches/VEX_3_2_BRANCH/priv/host-ppc/hdefs.c
Modified: branches/VEX_3_2_BRANCH/priv/host-ppc/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_2_BRANCH/priv/host-ppc/hdefs.c 2006-12-26 02:31:01 UTC=
(rev 1699)
+++ branches/VEX_3_2_BRANCH/priv/host-ppc/hdefs.c 2006-12-26 02:34:31 UTC=
(rev 1700)
@@ -1123,67 +1123,13 @@
=20
/* Pretty Print instructions */
static void ppLoadImm ( HReg dst, ULong imm, Bool mode64 ) {
-#if 1
vex_printf("li_word ");
ppHRegPPC(dst);
if (!mode64) {
- vassert(imm =3D=3D (ULong)(Long)(Int)(UInt)imm);
vex_printf(",0x%08x", (UInt)imm);
} else {
vex_printf(",0x%016llx", imm);
}
-#else
- if (imm >=3D 0xFFFFFFFFFFFF8000ULL || imm < 0x8000) {
- // sign-extendable from 16 bits
- vex_printf("li ");
- ppHRegPPC(dst);
- vex_printf(",0x%x", (UInt)imm);
- } else {
- if (imm >=3D 0xFFFFFFFF80000000ULL || imm < 0x80000000ULL) {
- // sign-extendable from 32 bits
- vex_printf("lis ");
- ppHRegPPC(dst);
- vex_printf(",0x%x ; ", (UInt)(imm >> 16));
- vex_printf("ori ");
- ppHRegPPC(dst);
- vex_printf(",");
- ppHRegPPC(dst);
- vex_printf(",0x%x", (UInt)(imm & 0xFFFF));
- } else {
- // full 64bit immediate load: 5 (five!) insns.
- vassert(mode64);
-
- // load high word
- vex_printf("lis ");
- ppHRegPPC(dst);
- vex_printf(",0x%x ; ", (UInt)(imm >> 48) & 0xFFFF);
- vex_printf("ori ");
- ppHRegPPC(dst);
- vex_printf(",");
- ppHRegPPC(dst);
- vex_printf(",0x%x ; ", (UInt)(imm >> 32) & 0xFFFF);
- =20
- // shift r_dst low word to high word =3D> rldicr
- vex_printf("rldicr ");
- ppHRegPPC(dst);
- vex_printf(",");
- ppHRegPPC(dst);
- vex_printf(",32,31 ; ");
-
- // load low word
- vex_printf("oris ");
- ppHRegPPC(dst);
- vex_printf(",");
- ppHRegPPC(dst);
- vex_printf(",0x%x ; ", (UInt)(imm >> 16) & 0xFFFF);
- vex_printf("ori ");
- ppHRegPPC(dst);
- vex_printf(",");
- ppHRegPPC(dst);
- vex_printf(",0x%x", (UInt)(imm >> 0) & 0xFFFF);
- }
- }
-#endif
}
=20
static void ppMovReg ( HReg dst, HReg src ) {
@@ -2496,19 +2442,26 @@
vassert(mode64);
=20
// load high word
+
// lis r_dst, (imm>>48) & 0xFFFF
p =3D mkFormD(p, 15, r_dst, 0, (imm>>48) & 0xFFFF);
+
// ori r_dst, r_dst, (imm>>32) & 0xFFFF
- p =3D mkFormD(p, 24, r_dst, r_dst, (imm>>32) & 0xFFFF);
+ if ((imm>>32) & 0xFFFF)
+ p =3D mkFormD(p, 24, r_dst, r_dst, (imm>>32) & 0xFFFF);
=20
// shift r_dst low word to high word =3D> rldicr
p =3D mkFormMD(p, 30, r_dst, r_dst, 32, 31, 1);
=20
// load low word
+
// oris r_dst, r_dst, (imm>>16) & 0xFFFF
- p =3D mkFormD(p, 25, r_dst, r_dst, (imm>>16) & 0xFFFF);
+ if ((imm>>16) & 0xFFFF)
+ p =3D mkFormD(p, 25, r_dst, r_dst, (imm>>16) & 0xFFFF);
+
// ori r_dst, r_dst, (imm) & 0xFFFF
- p =3D mkFormD(p, 24, r_dst, r_dst, imm & 0xFFFF);
+ if (imm & 0xFFFF)
+ p =3D mkFormD(p, 24, r_dst, r_dst, imm & 0xFFFF);
}
}
return p;
|
|
From: <sv...@va...> - 2006-12-26 02:31:04
|
Author: sewardj
Date: 2006-12-26 02:31:01 +0000 (Tue, 26 Dec 2006)
New Revision: 1699
Log:
Merge r1670/1 (ppc64 fe rld/rlw improvements)
Modified:
branches/VEX_3_2_BRANCH/priv/guest-ppc/toIR.c
Modified: branches/VEX_3_2_BRANCH/priv/guest-ppc/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_2_BRANCH/priv/guest-ppc/toIR.c 2006-12-26 02:25:46 UTC=
(rev 1698)
+++ branches/VEX_3_2_BRANCH/priv/guest-ppc/toIR.c 2006-12-26 02:31:01 UTC=
(rev 1699)
@@ -3288,6 +3288,7 @@
vassert(sh_imm < 32);
=20
if (mode64) {
+ IRTemp rTmp =3D newTemp(Ity_I64);
mask64 =3D MASK64(31-MaskEnd, 31-MaskBeg);
DIP("rlwinm%s r%u,r%u,%d,%d,%d\n", flag_rC ? ".":"",
rA_addr, rS_addr, sh_imm, MaskBeg, MaskEnd);
@@ -3295,8 +3296,10 @@
// rA =3D ((tmp32 || tmp32) & mask64)
r =3D ROTL( unop(Iop_64to32, mkexpr(rS) ), mkU8(sh_imm) );
r =3D unop(Iop_32Uto64, r);
- assign( rot, binop(Iop_Or64, r,
- binop(Iop_Shl64, r, mkU8(32))) );
+ assign( rTmp, r );
+ r =3D NULL;
+ assign( rot, binop(Iop_Or64, mkexpr(rTmp),
+ binop(Iop_Shl64, mkexpr(rTmp), mkU8(32))) );
assign( rA, binop(Iop_And64, mkexpr(rot), mkU64(mask64)) );
}
else {
@@ -3311,7 +3314,7 @@
/* Special-case the ,32-n,n,31 form as that is just n-bit
unsigned shift right, PPC32 p501 */
DIP("srwi%s r%u,r%u,%d\n", flag_rC ? ".":"",
- rA_addr, rS_addr, sh_imm);
+ rA_addr, rS_addr, MaskBeg);
assign( rA, binop(Iop_Shr32, mkexpr(rS), mkU8(MaskBeg)) );
}
else {
@@ -3356,7 +3359,6 @@
break;
}
=20
-
/* 64bit Integer Rotates */
case 0x1E: {
msk_imm =3D ((msk_imm & 1) << 5) | (msk_imm >> 1);
@@ -3402,24 +3404,38 @@
*/
=20
case 0x0: // rldicl (Rotl DWord Imm, Clear Left, PPC64 p558)
- DIP("rldicl%s r%u,r%u,%u,%u\n", flag_rC ? ".":"",
- rA_addr, rS_addr, sh_imm, msk_imm);
- r =3D ROTL(mkexpr(rS), mkU8(sh_imm));
- mask64 =3D MASK64(0, 63-msk_imm);
- assign( rA, binop(Iop_And64, r, mkU64(mask64)) );
+ if (mode64
+ && sh_imm + msk_imm =3D=3D 64 && msk_imm >=3D 1 && msk_imm =
<=3D 63) {
+ /* special-case the ,64-n,n form as that is just
+ unsigned shift-right by n */
+ DIP("srdi%s r%u,r%u,%u\n",
+ flag_rC ? ".":"", rA_addr, rS_addr, msk_imm);
+ assign( rA, binop(Iop_Shr64, mkexpr(rS), mkU8(msk_imm)) );
+ } else {
+ DIP("rldicl%s r%u,r%u,%u,%u\n", flag_rC ? ".":"",
+ rA_addr, rS_addr, sh_imm, msk_imm);
+ r =3D ROTL(mkexpr(rS), mkU8(sh_imm));
+ mask64 =3D MASK64(0, 63-msk_imm);
+ assign( rA, binop(Iop_And64, r, mkU64(mask64)) );
+ }
break;
- /* later: deal with special case:
- (msk_imm + sh_imm =3D=3D 63) =3D> SHR(63 - sh_imm) */
=20
case 0x1: // rldicr (Rotl DWord Imm, Clear Right, PPC64 p559)
- DIP("rldicr%s r%u,r%u,%u,%u\n", flag_rC ? ".":"",
- rA_addr, rS_addr, sh_imm, msk_imm);
- r =3D ROTL(mkexpr(rS), mkU8(sh_imm));
- mask64 =3D MASK64(63-msk_imm, 63);
- assign( rA, binop(Iop_And64, r, mkU64(mask64)) );
+ if (mode64=20
+ && sh_imm + msk_imm =3D=3D 63 && sh_imm >=3D 1 && sh_imm <=3D=
63) {
+ /* special-case the ,n,63-n form as that is just
+ shift-left by n */
+ DIP("sldi%s r%u,r%u,%u\n",
+ flag_rC ? ".":"", rA_addr, rS_addr, sh_imm);
+ assign( rA, binop(Iop_Shl64, mkexpr(rS), mkU8(sh_imm)) );
+ } else {
+ DIP("rldicr%s r%u,r%u,%u,%u\n", flag_rC ? ".":"",
+ rA_addr, rS_addr, sh_imm, msk_imm);
+ r =3D ROTL(mkexpr(rS), mkU8(sh_imm));
+ mask64 =3D MASK64(63-msk_imm, 63);
+ assign( rA, binop(Iop_And64, r, mkU64(mask64)) );
+ }
break;
- /* later: deal with special case:
- (msk_imm =3D=3D sh_imm) =3D> SHL(sh_imm) */
=20
case 0x3: { // rldimi (Rotl DWord Imm, Mask Insert, PPC64 p560)
IRTemp rA_orig =3D newTemp(ty);
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