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|
From: <sv...@va...> - 2005-09-13 23:47:26
|
Author: paulus Date: 2005-09-14 00:47:22 +0100 (Wed, 14 Sep 2005) New Revision: 196 Log: The current place to download my 2.x ppc32/linux port is on www.valgrind.org, not ozlabs.org any more. Modified: trunk/devel/platforms.html Modified: trunk/devel/platforms.html =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/devel/platforms.html 2005-09-13 21:11:12 UTC (rev 195) +++ trunk/devel/platforms.html 2005-09-13 23:47:22 UTC (rev 196) @@ -43,7 +43,7 @@ =20 <li><p><b>PPC32/Linux:</b> Paul Mackerras has an experimental port of Valgrind 2.X which you can - <a href=3D"http://ozlabs.org/~paulus/">download here</a>.=20 + <a href=3D"/downloads/variants.html?pmk">download here</a>.=20 This was the basis of the PPC32/Linux port included in Valgrind 3.0.= 0 and above.</p></li> =20 |
|
From: <sv...@va...> - 2005-09-13 23:23:50
|
Author: sewardj
Date: 2005-09-14 00:23:47 +0100 (Wed, 14 Sep 2005)
New Revision: 4650
Log:
Oops.
Modified:
branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c
Modified: branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c 2005-09-13 22:43:4=
8 UTC (rev 4649)
+++ branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c 2005-09-13 23:23:4=
7 UTC (rev 4650)
@@ -1816,7 +1816,6 @@
=20
aspacem_assert(sane_NSegment(&nsegments[0]));
for (i =3D 1; i < nsegments_used; i++) {
-if (!sane_NSegment(&nsegments[i])) show_nsegment_full(0,&nsegments[i]);
aspacem_assert(sane_NSegment(&nsegments[i]));
aspacem_assert(nsegments[i-1].end+1 =3D=3D nsegments[i].start);
}
|
|
From: <sv...@va...> - 2005-09-13 22:43:50
|
Author: sewardj
Date: 2005-09-13 23:43:48 +0100 (Tue, 13 Sep 2005)
New Revision: 4649
Log:
- improve segment array printing
- add code for sanity checking segments
- add code for merging mergeable segments
Modified:
branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c
branches/ASPACEM/coregrind/pub_core_aspacemgr.h
Modified: branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c 2005-09-13 22:40:4=
1 UTC (rev 4648)
+++ branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c 2005-09-13 22:43:4=
8 UTC (rev 4649)
@@ -1555,6 +1555,292 @@
=20
/*-----------------------------------------------------------------*/
/*--- ---*/
+/*--- Displaying the segment array. ---*/
+/*--- ---*/
+/*-----------------------------------------------------------------*/
+
+static HChar* show_SegKind ( SegKind sk )
+{
+ switch (sk) {
+ case SkFree: return " ";
+ case SkAnonC: return "anon";
+ case SkAnonV: return "ANON";
+ case SkFileC: return "file";
+ case SkFileV: return "FILE";
+ case SkResvn: return "RSVN";
+ default: return "????";
+ }
+}
+
+static HChar* show_ShrinkMode ( ShrinkMode sm )
+{
+ switch (sm) {
+ case SmLower: return "SmLower";
+ case SmUpper: return "SmUpper";
+ case SmFixed: return "SmFixed";
+ default: return "Sm?????";
+ }
+}
+
+static void show_Addr_concisely ( /*OUT*/HChar* buf, Addr aA )
+{
+ HChar* fmt;
+ ULong a =3D (ULong)aA;
+ if (a >=3D 10000000ULL) {
+ fmt =3D "%6llum";
+ a /=3D 1024*1024ULL;
+ } else {
+ fmt =3D "%7llu";
+ }
+ aspacem_sprintf(buf, fmt, a);
+}
+
+
+/* Show full details of an NSegment */
+
+static void show_nsegment_full ( Int logLevel, NSegment* seg )
+{
+ VG_(debugLog)(logLevel, "aspacem",
+ "NSegment{%s, start=3D0x%llx, end=3D0x%llx, smode=3D%s, dev=3D%u, =
"
+ "ino=3D%u, offset=3D%llu, fnIdx=3D%d, hasR=3D%d, hasW=3D%d, hasX=3D=
%d, "
+ "hasT=3D%d, mark=3D%d}\n",
+ show_SegKind(seg->kind),
+ (ULong)seg->start,
+ (ULong)seg->end,
+ show_ShrinkMode(seg->smode),
+ seg->dev, seg->ino, (ULong)seg->offset, seg->fnIdx,
+ (Int)seg->hasR, (Int)seg->hasW, (Int)seg->hasX, (Int)seg->hasT,
+ (Int)seg->mark
+ );
+}
+
+
+/* Show an NSegment in a user-friendly-ish way. */
+
+static void show_nsegment ( Int logLevel, Int segNo, NSegment* seg )
+{
+ HChar len_buf[20];
+ ULong len =3D ((ULong)seg->end) - ((ULong)seg->start) + 1;
+ show_Addr_concisely(len_buf, len);
+
+ switch (seg->kind) {
+
+ case SkFree:
+ VG_(debugLog)(
+ logLevel, "aspacem",
+ "%3d: %s %08llx-%08llx %s\n",
+ segNo, show_SegKind(seg->kind),
+ (ULong)seg->start, (ULong)seg->end, len_buf
+ );
+ break;
+
+ case SkAnonC: case SkAnonV:
+ VG_(debugLog)(
+ logLevel, "aspacem",
+ "%3d: %s %08llx-%08llx %s %c%c%c%c\n",
+ segNo, show_SegKind(seg->kind),
+ (ULong)seg->start, (ULong)seg->end, len_buf,
+ seg->hasR ? 'r' : '-', seg->hasW ? 'w' : '-',=20
+ seg->hasX ? 'x' : '-', seg->hasT ? 'T' : '-'=20
+ );
+ break;
+
+ case SkFileC: case SkFileV:
+ VG_(debugLog)(
+ logLevel, "aspacem",
+ "%3d: %s %08llx-%08llx %s %c%c%c%c d=3D0x%03x i=3D%-7d o=3D%=
-7lld (%d)\n",
+ segNo, show_SegKind(seg->kind),
+ (ULong)seg->start, (ULong)seg->end, len_buf,
+ seg->hasR ? 'r' : '-', seg->hasW ? 'w' : '-',=20
+ seg->hasX ? 'x' : '-', seg->hasT ? 'T' : '-',=20
+ seg->dev, seg->ino, (Long)seg->offset, seg->fnIdx
+ );
+ break;
+
+ case SkResvn:
+ VG_(debugLog)(
+ logLevel, "aspacem",
+ "%3d: %s %08llx-%08llx %s %c%c%c%c %s\n",
+ segNo, show_SegKind(seg->kind),
+ (ULong)seg->start, (ULong)seg->end, len_buf,
+ seg->hasR ? 'r' : '-', seg->hasW ? 'w' : '-',=20
+ seg->hasX ? 'x' : '-', seg->hasT ? 'T' : '-',=20
+ show_ShrinkMode(seg->smode)
+ );
+ break;
+
+ default:
+ VG_(debugLog)(
+ logLevel, "aspacem",
+ "%3d: ???? UNKNOWN SEGMENT KIND\n",=20
+ segNo=20
+ );
+ break;
+ }
+}
+
+/* Print out the segment array (debugging only!). */
+void VG_(am_show_nsegments) ( Int logLevel, HChar* who )
+{
+ Int i;
+ VG_(debugLog)(logLevel, "aspacem",
+ "<<< SHOW_SEGMENTS: %s (%d segments, %d segnames)\n",=20
+ who, segments_used, segnames_used);
+ for (i =3D 0; i < segnames_used; i++) {
+ if (!segnames[i].inUse)
+ continue;
+ VG_(debugLog)(logLevel, "aspacem",
+ "(%2d) %s\n", i, segnames[i].fname);
+ }
+ for (i =3D 0; i < nsegments_used; i++)
+ show_nsegment( logLevel, i, &nsegments[i] );
+ VG_(debugLog)(logLevel, "aspacem",
+ ">>>\n");
+}
+
+
+/*-----------------------------------------------------------------*/
+/*--- ---*/
+/*--- Sanity checking and preening of the segment array. ---*/
+/*--- ---*/
+/*-----------------------------------------------------------------*/
+
+/* Check representational invariants for NSegments. */
+
+static Bool sane_NSegment ( NSegment* s )
+{
+ if (s =3D=3D NULL) return False;
+
+ /* No zero sized segments and no wraparounds. */
+ if (s->start >=3D s->end) return False;
+
+ /* .mark is used for admin purposes only. */
+ if (s->mark) return False;
+
+ /* require page alignment */
+ if (!VG_IS_PAGE_ALIGNED(s->start)) return False;
+ if (!VG_IS_PAGE_ALIGNED(s->end+1)) return False;
+
+ switch (s->kind) {
+
+ case SkFree:
+ return=20
+ s->smode =3D=3D SmFixed
+ && s->dev =3D=3D 0 && s->ino =3D=3D 0 && s->offset =3D=3D 0 =
&& s->fnIdx =3D=3D -1=20
+ && !s->hasR && !s->hasW && !s->hasX && !s->hasT;
+
+ case SkAnonC: case SkAnonV:
+ return=20
+ s->smode =3D=3D SmFixed=20
+ && s->dev =3D=3D 0 && s->ino =3D=3D 0 && s->offset =3D=3D 0 =
&& s->fnIdx =3D=3D -1;
+
+ case SkFileC: case SkFileV:
+ return=20
+ s->smode =3D=3D SmFixed;
+
+ case SkResvn:=20
+ return=20
+ s->dev =3D=3D 0 && s->ino =3D=3D 0 && s->offset =3D=3D 0 && =
s->fnIdx =3D=3D -1=20
+ && !s->hasR && !s->hasW && !s->hasX && !s->hasT;
+
+ default:
+ return False;
+ }
+}
+
+
+/* Try merging s2 into s1, if possible. If successful, s1 is
+ modified, and True is returned. Otherwise s1 is unchanged and
+ False is returned. */
+
+static Bool maybe_merge_nsegments ( NSegment* s1, NSegment* s2 )
+{
+ if (s1->kind !=3D s2->kind)=20
+ return False;
+
+ if (s1->end+1 !=3D s2->start)
+ return False;
+
+ /* reject cases which would cause wraparound */
+ if (s1->start > s2->end)
+ return False;
+
+ switch (s1->kind) {
+
+ case SkFree:
+ s1->end =3D s2->end;
+ return True;
+
+ case SkAnonC: case SkAnonV:
+ if (s1->hasR =3D=3D s2->hasR=20
+ && s1->hasW =3D=3D s2->hasW && s1->hasX =3D=3D s2->hasX) {
+ s1->end =3D s2->end;
+ s1->hasT |=3D s2->hasT;
+ return True;
+ }
+ break;
+
+ case SkFileC: case SkFileV:
+ if (s1->hasR =3D=3D s2->hasR=20
+ && s1->hasW =3D=3D s2->hasW && s1->hasX =3D=3D s2->hasX
+ && s1->dev =3D=3D s2->dev && s1->ino =3D=3D s2->ino
+ && s2->offset =3D=3D s1->offset
+ + ((ULong)s2->start) - ((ULong)s1->start) =
) {
+ s1->end =3D s2->end;
+ s1->hasT |=3D s2->hasT;
+ return True;
+ }
+ break;
+
+ default:
+ break;
+ =20
+ }
+
+ return False;
+}
+
+
+/* Sanity-check and canonicalise the segment array (merge mergable
+ segments). */
+
+static void preen_nsegments ( void )
+{
+ Int i, r, w;
+
+ /* Pass 1: check the segment array covers the entire address space
+ exactly once, and also that each segment is sane. */
+ aspacem_assert(nsegments_used > 0);
+ aspacem_assert(nsegments[0].start =3D=3D Addr_MIN);
+ aspacem_assert(nsegments[nsegments_used-1].end =3D=3D Addr_MAX);
+
+ aspacem_assert(sane_NSegment(&nsegments[0]));
+ for (i =3D 1; i < nsegments_used; i++) {
+if (!sane_NSegment(&nsegments[i])) show_nsegment_full(0,&nsegments[i]);
+ aspacem_assert(sane_NSegment(&nsegments[i]));
+ aspacem_assert(nsegments[i-1].end+1 =3D=3D nsegments[i].start);
+ }
+
+ /* Pass 2: merge as much as possible, using
+ maybe_merge_segments. */
+ w =3D 0;
+ for (r =3D 1; r < nsegments_used; r++) {
+ if (maybe_merge_nsegments(&nsegments[w], &nsegments[r])) {
+ /* nothing */
+ } else {
+ w++;
+ if (w !=3D r)=20
+ nsegments[w] =3D nsegments[r];
+ }
+ }
+ w++;
+ aspacem_assert(w > 0 && w <=3D nsegments_used);
+ nsegments_used =3D w;
+}
+
+
+/*-----------------------------------------------------------------*/
+/*--- ---*/
/*--- Low level access / modification of the segment array. ---*/
/*--- ---*/
/*-----------------------------------------------------------------*/
@@ -1644,19 +1930,6 @@
}
=20
=20
-/* Sanity checking: ensure the segment array covers the entire address
- space exactly. */
-static void check_nsegments ( void )
-{
- Int i;
- aspacem_assert(nsegments_used > 0);
- aspacem_assert(nsegments[0].start =3D=3D Addr_MIN);
- aspacem_assert(nsegments[nsegments_used-1].end =3D=3D Addr_MAX);
- for (i =3D 1; i < nsegments_used; i++)
- aspacem_assert(nsegments[i-1].end+1 =3D=3D nsegments[i].start);
-}
-
-
/* Trivial fn: return the total amount of space in anonymous mappings,
both for V and the client. Is used for printing stats in
out-of-memory messages. */
@@ -1710,135 +1983,18 @@
=20
/*-----------------------------------------------------------------*/
/*--- ---*/
-/*--- Displaying the segment array. ---*/
+/*--- Modifying the segment array, and constructing segments. ---*/
/*--- ---*/
/*-----------------------------------------------------------------*/
=20
-static HChar* show_seg_kind ( NSegment* seg )
-{
- switch (seg->kind) {
- case SkFree: return " ";
- case SkAnonC: return "anon";
- case SkAnonV: return "ANON";
- case SkFileC: return "file";
- case SkFileV: return "FILE";
- case SkResvn: return "RSVN";
- default: return "????";
- }
-}
+/* Helper fn */
=20
-static HChar* show_ShrinkMode ( ShrinkMode sm )
+static Bool is_SkFile ( SegKind sk )
{
- switch (sm) {
- case SmLower: return "SmLower";
- case SmUpper: return "SmUpper";
- case SmFixed: return "SmFixed";
- default: return "Sm?????";
- }
+ return sk =3D=3D SkFileV || sk =3D=3D SkFileC;
}
=20
-static void show_Addr_concisely ( /*OUT*/HChar* buf, Addr aA )
-{
- HChar* fmt;
- ULong a =3D (ULong)aA;
- if (a >=3D 10000000ULL) {
- fmt =3D "%6llum";
- a /=3D 1024*1024ULL;
- } else {
- fmt =3D "%7llu";
- }
- aspacem_sprintf(buf, fmt, a);
-}
=20
-static void show_nsegment ( Int logLevel, Int segNo, NSegment* seg )
-{
- HChar len_buf[20];
- ULong len =3D ((ULong)seg->end) - ((ULong)seg->start) + 1;
- show_Addr_concisely(len_buf, len);
-
- switch (seg->kind) {
-
- case SkFree:
- VG_(debugLog)(
- logLevel, "aspacem",
- "%3d: %s %08llx-%08llx %s\n",
- segNo, show_seg_kind(seg),
- (ULong)seg->start, (ULong)seg->end, len_buf
- );
- break;
-
- case SkAnonC: case SkAnonV:
- VG_(debugLog)(
- logLevel, "aspacem",
- "%3d: %s %08llx-%08llx %s %c%c%c%c d=3D0x%03x i=3D%-7d o=3D%=
-7lld (%d)\n",
- segNo, show_seg_kind(seg),
- (ULong)seg->start, (ULong)seg->end, len_buf,
- seg->hasR ? 'r' : '-', seg->hasW ? 'w' : '-',=20
- seg->hasX ? 'x' : '-', seg->hasT ? 'T' : '-',=20
- seg->dev, seg->ino, (Long)seg->offset, seg->fnIdx
- );
- break;
-
- case SkFileC: case SkFileV:
- VG_(debugLog)(
- logLevel, "aspacem",
- "%3d: %s %08llx-%08llx %s %c%c%c%c d=3D0x%03x i=3D%-7d o=3D%=
-7lld (%d)\n",
- segNo, show_seg_kind(seg),
- (ULong)seg->start, (ULong)seg->end, len_buf,
- seg->hasR ? 'r' : '-', seg->hasW ? 'w' : '-',=20
- seg->hasX ? 'x' : '-', seg->hasT ? 'T' : '-',=20
- seg->dev, seg->ino, (Long)seg->offset, seg->fnIdx
- );
- break;
-
- case SkResvn:
- VG_(debugLog)(
- logLevel, "aspacem",
- "%3d: %s %08llx-%08llx %s %c%c%c%c %s\n",
- segNo, show_seg_kind(seg),
- (ULong)seg->start, (ULong)seg->end, len_buf,
- seg->hasR ? 'r' : '-', seg->hasW ? 'w' : '-',=20
- seg->hasX ? 'x' : '-', seg->hasT ? 'T' : '-',=20
- show_ShrinkMode(seg->smode)
- );
- break;
-
- default:
- VG_(debugLog)(
- logLevel, "aspacem",
- "%3d: ???? UNKNOWN SEGMENT KIND\n",=20
- segNo=20
- );
- break;
- }
-}
-
-/* Print out the segment array (debugging only!). */
-void VG_(am_show_nsegments) ( Int logLevel, HChar* who )
-{
- Int i;
- VG_(debugLog)(logLevel, "aspacem",
- "<<< SHOW_SEGMENTS: %s (%d segments, %d segnames)\n",=20
- who, segments_used, segnames_used);
- for (i =3D 0; i < segnames_used; i++) {
- if (!segnames[i].inUse)
- continue;
- VG_(debugLog)(logLevel, "aspacem",
- "(%2d) %s\n", i, segnames[i].fname);
- }
- for (i =3D 0; i < nsegments_used; i++)
- show_nsegment( logLevel, i, &nsegments[i] );
- VG_(debugLog)(logLevel, "aspacem",
- ">>>\n");
-}
-
-
-/*-----------------------------------------------------------------*/
-/*--- ---*/
-/*--- Modifying the segment array, and constructing segments. ---*/
-/*--- ---*/
-/*-----------------------------------------------------------------*/
-
/* Add SEG to the collection, deleting/truncating any it overlaps.
This deals with all the tricky cases of splitting up segments as
needed. */
@@ -1854,6 +2010,7 @@
aspacem_assert(dStart <=3D dEnd);
aspacem_assert(VG_IS_PAGE_ALIGNED(dStart));
aspacem_assert(VG_IS_PAGE_ALIGNED(dEnd+1));
+ aspacem_assert(sane_NSegment(seg));
=20
nDeld =3D 0;
=20
@@ -1891,7 +2048,8 @@
nsegments[i+1] =3D nsegments[i];
nsegments[i].end =3D dStart-1;
nsegments[i+1].start =3D dEnd+1;
- nsegments[i+1].offset +=3D (nsegments[i+1].start - nsegments[i]=
.start);
+ if (is_SkFile(nsegments[i].kind))
+ nsegments[i+1].offset +=3D (nsegments[i+1].start - nsegments=
[i].start);
continue;
}
=20
@@ -1903,7 +2061,8 @@
=20
if (iEnd > dEnd && iStart >=3D dStart && iStart <=3D dEnd) {
/* interval to be deleted straddles lower boundary of i. */
- nsegments[i].offset +=3D (dEnd+1 - nsegments[i].start);
+ if (is_SkFile(nsegments[i].kind))
+ nsegments[i].offset +=3D (dEnd+1 - nsegments[i].start);
nsegments[i].start =3D dEnd+1;
continue;
}
@@ -1948,7 +2107,7 @@
=20
nsegments[k] =3D *seg;
=20
- check_nsegments();
+ preen_nsegments();
}
=20
=20
@@ -1964,7 +2123,7 @@
seg->ino =3D 0;
seg->offset =3D 0;
seg->fnIdx =3D -1;
- seg->hasR =3D seg->hasR =3D seg->hasW =3D seg->hasT =3D False;
+ seg->hasR =3D seg->hasW =3D seg->hasX =3D seg->hasT =3D False;
seg->mark =3D False;
}
=20
Modified: branches/ASPACEM/coregrind/pub_core_aspacemgr.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/pub_core_aspacemgr.h 2005-09-13 22:40:41 U=
TC (rev 4648)
+++ branches/ASPACEM/coregrind/pub_core_aspacemgr.h 2005-09-13 22:43:48 U=
TC (rev 4649)
@@ -182,7 +182,7 @@
SkFileV, // file mapping belonging to valgrind
SkResvn // reservation
}
- MKind;
+ SegKind;
=20
/* Describes how a reservation segment can be resized. */
typedef
@@ -199,13 +199,13 @@
// the only meaningful fields are .start and .end
=20
kind =3D=3D SkAnon{C,V}:
- // the segment may be resized if required
+ // smode=3D=3DSmFixed
// there's no associated file:
dev=3D=3Dino=3D=3Dfoff =3D 0, fnidx =3D=3D -1
// segment may have permissions
=20
kind =3D=3D SkFile{C,V}:
- // the segment may not be resized:
+ // smode=3D=3DSmFixed
moveLo =3D=3D moveHi =3D=3D NotMovable, maxlen =3D=3D 0
// there is an associated file
// segment may have permissions
@@ -222,7 +222,7 @@
*/
typedef
struct {
- MKind kind;
+ SegKind kind;
/* Extent (SkFree, SkAnon{C,V}, SkFile{C,V}, SkResvn) */
Addr start; // lowest address in range
Addr end; // highest address in range
|
|
From: <sv...@va...> - 2005-09-13 22:40:46
|
Author: sewardj
Date: 2005-09-13 23:40:41 +0100 (Tue, 13 Sep 2005)
New Revision: 4648
Log:
Change layout a bit.
Modified:
branches/ASPACEM/coregrind/m_syswrap/syswrap-generic.c
Modified: branches/ASPACEM/coregrind/m_syswrap/syswrap-generic.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_syswrap/syswrap-generic.c 2005-09-13 21:=
05:00 UTC (rev 4647)
+++ branches/ASPACEM/coregrind/m_syswrap/syswrap-generic.c 2005-09-13 22:=
40:41 UTC (rev 4648)
@@ -873,9 +873,8 @@
/* Return true if we're allowed to use or create this fd */
Bool ML_(fd_allowed)(Int fd, const Char *syscallname, ThreadId tid, Bool=
soft)
{
- if ((fd < 0 || fd >=3D VG_(fd_hard_limit) || fd =3D=3D VG_(clo_log_fd=
)) &&
- VG_(showing_core_errors)())
- {
+ if ( (fd < 0 || fd >=3D VG_(fd_hard_limit) || fd =3D=3D VG_(clo_log_f=
d))=20
+ && VG_(showing_core_errors)() ) {
VG_(message)(Vg_UserMsg,=20
"Warning: invalid file descriptor %d in syscall %s()",
fd, syscallname);
|
|
From: Nicholas N. <nj...@cs...> - 2005-09-13 21:47:49
|
On Sun, 4 Sep 2005, John Reiser wrote: > In order for valgrind to tell other tools (debugger, profiler, ...) > about the modules it loads (stage2, vgtool_memcheck, ld-linux, ...), > I have had success using the attached patches for valgrind-3.0.1 > (co-resident.patch, 4370 bytes.) > > Synopsys (refer to <elf.h> and <link.h>): > Have a PT_DYNAMIC that contains a DT_DEBUG with a datum that points > to a struct r_debug. For each module loaded: add a struct link_map > onto the front of the list that is maintained through .l_next, .l_prev. > Use .r_brk as a function pointer, and call it as appropriate: > with .r_state=RT_ADD just before loading some modules, > and with .r_state=RT_CONSISTENT just after loading some modules. > Set .r_brk to the address of a no-op subroutine if 0==.r_brk. > A debugger or co-resident tool may intercept this subroutine, > so make it easy to breakpoint or overwrite (allow at least 16 bytes.) > Using names _r_debug and _dl_debug_state() may help older [or lazy] > debuggers that don't understand the PT_DYNAMIC + DT_DEBUG protocol. > > I have used this with a subroutine profiler that is in development. > The current state is sufficient to measure memcheck on simple programs. > Example output is http://BitWagon.com/valgrind/valgrind.tsprof.bz2 > (76636 bytes; expands to 497089 bytes, 6084 lines.) The profile output looks really interesting. There's an explanation of the format at http://bitwagon.com/tsprof/tsprof.html. Here's an interesting snippet: Black box 4.766 seconds ('+' excludes Recursive entries) count ticks millisec @millisec % [id] module:name [...] 2599 9055199077 4527.5995 1.7421 95 [4] 2:LibVEX_Translate 2599 37727305 18.8637 0.0073 0 [4] 2:LibVEX_Translate (self) 2599 2641400997 1320.7005 0.5082 29 [4]->[5] 2:doRegisterAllocation 10396 1482524941 741.2625 0.0713 16 [4]->[6] 2:sanityCheckIRBB 2599 905329930 452.6650 0.1742 10 [4]->[11] 2:iselBB_AMD64 2599 856546420 428.2732 0.1648 9 [4]->[13] 2:do_iropt_BB 2599 689222695 344.6113 0.1326 8 [4]->[19] 5:vgMemCheck_instrument 2599 688523386 344.2617 0.1325 8 [4]->[20] 2:do_treebuild_BB 2599 490806029 245.4030 0.0944 5 [4]->[17] 2:cprop_BB 185354 445410431 222.7052 0.0012 5 [4]->[26] 2:emit_AMD64Instr 2599 373706079 186.8530 0.0719 4 [4]->[33] 2:bb_to_IR 7797 335553017 167.7765 0.0215 4 [4]->[27] 2:do_deadcode_BB 2599 93003070 46.5015 0.0179 1 [4]->[87] 2:vg_SP_update_pass 2599 14737922 7.3690 0.0028 0 [4]->[211] 2:getAllocableRegs_AMD64 5198 706855 0.3534 0.0001 0 [4]->[506] 2:vexClearTEMP This shows that 95% of time accounted for was spent in LibVEX_Translate, and that 29% of that 95% was in doRegisterAllocation, and 16% of that 95% was in sanitycheckIRBB. This is a small program, it would be interesting to see what the numbers are like for a bigger program. Presumably the translation costs would drop as a proportion of total time. John, will generated code be covered by this profile? I see this entry: 1 994533995 497.2670 497.2670 10 [9] 2:0x70057c53 1 0 0.0000 0.0000 0 [9] 2:0x70057c53 (self) Is this a generated basic block? Also, Valgrind seg faulted during the run -- is this due to a bad interaction with tsprof? Nick |
|
From: <sv...@va...> - 2005-09-13 21:11:19
|
Author: njn Date: 2005-09-13 22:11:12 +0100 (Tue, 13 Sep 2005) New Revision: 195 Log: Add a new project: make debug info reading incremental. Modified: trunk/devel/projects.html Modified: trunk/devel/projects.html =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/devel/projects.html 2005-09-13 20:29:46 UTC (rev 194) +++ trunk/devel/projects.html 2005-09-13 21:11:12 UTC (rev 195) @@ -243,6 +243,18 @@ August 27, 2005)</p> =20 =20 +<h3>Incremental debug info reading</h3> +<p>When a code segment is loaded Valgrind mmaps the entire file into +memory and reads the debug info all in one hit. If the code segment is +big (eg. 300MB) the mmap will fail and no debug info will be read for +that segment. It would be nice if the debug info reader was more +incremental. This project will require an understanding of ELF formats, +and to a lesser extent, debugging formats (DWARF, stabs). The place to +start looking is m_debuginfo/symtab.c, in the function +VG_(read_seg_symbols)(). That code is not very pretty, and could do +with a clean-up anyway. (Added September 13, 2005) + + <h3>Addrcheck and/or compressed V bit representation</h3> <p>Memcheck more than doubles the amount of memory a program uses, due to its V bits. Addrcheck only increases memory by 1/8th. However, |
|
From: <sv...@va...> - 2005-09-13 21:05:02
|
Author: njn
Date: 2005-09-13 22:05:00 +0100 (Tue, 13 Sep 2005)
New Revision: 4647
Log:
Note that SSE3 isn't supported.
MERGED FROM TRUNK
Modified:
branches/VALGRIND_3_0_BRANCH/docs/xml/manual-core.xml
Modified: branches/VALGRIND_3_0_BRANCH/docs/xml/manual-core.xml
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_0_BRANCH/docs/xml/manual-core.xml 2005-09-13 21:0=
3:46 UTC (rev 4646)
+++ branches/VALGRIND_3_0_BRANCH/docs/xml/manual-core.xml 2005-09-13 21:0=
5:00 UTC (rev 4647)
@@ -1618,7 +1618,8 @@
<listitem>
<para>On x86 and AMD64, there is no support for 3DNow! instructions. =
If
the translator encounters these, Valgrind will generate a SIGILL when=
the
- instruction is executed.</para>
+ instruction is executed. The same is true for Intel's SSE3 SIMD
+ instructions.</para>
</listitem>
=20
<listitem>
|
|
From: <sv...@va...> - 2005-09-13 21:03:50
|
Author: njn
Date: 2005-09-13 22:03:46 +0100 (Tue, 13 Sep 2005)
New Revision: 4646
Log:
Note that SSE3 isn't supported.
Modified:
trunk/docs/xml/manual-core.xml
Modified: trunk/docs/xml/manual-core.xml
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/docs/xml/manual-core.xml 2005-09-13 19:56:19 UTC (rev 4645)
+++ trunk/docs/xml/manual-core.xml 2005-09-13 21:03:46 UTC (rev 4646)
@@ -1618,7 +1618,8 @@
<listitem>
<para>On x86 and AMD64, there is no support for 3DNow! instructions. =
If
the translator encounters these, Valgrind will generate a SIGILL when=
the
- instruction is executed.</para>
+ instruction is executed. The same is true for Intel's SSE3 SIMD
+ instructions.</para>
</listitem>
=20
<listitem>
|
|
From: Nicholas N. <nj...@cs...> - 2005-09-13 20:33:08
|
On Fri, 2 Sep 2005, Kailash Sethuraman wrote: > This may be of interest to you. Me and a few others are doing a port > of valgrind to NetBSD/i386. > The code and the work done so far is public at > http://vg4nbsd.berlios.de . > Work is underway, while we are not there yet, there is steady > progress. The code tracks both trunk and the aspacem branch. However, > we are concentrating on the aspacem branch now. We would also welcome > people willing to contribute to the effort. Code is also publicly > available. Thanks for letting us know. I've updated http://www.valgrind.org/devel/platforms.html accordingly. It's good that you're tracking both trunk and ASPACEM. Nick |
|
From: <sv...@va...> - 2005-09-13 20:29:48
|
Author: njn
Date: 2005-09-13 21:29:46 +0100 (Tue, 13 Sep 2005)
New Revision: 194
Log:
Tweaks.
Modified:
trunk/devel/platforms.html
Modified: trunk/devel/platforms.html
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/devel/platforms.html 2005-09-13 20:25:57 UTC (rev 193)
+++ trunk/devel/platforms.html 2005-09-13 20:29:46 UTC (rev 194)
@@ -9,9 +9,9 @@
=20
<p>The Valgrind 3.0.X series supports the following platforms.</p>
<ul>
-<li><b>x86/Linux:</b> support is mature and almost complete.
-<li><b>AMD64/Linux:</b> support is new but fairly complete.
-<li><b>PPC32/Linux:</b> support is new, incomplete, but improving.
+<li><b>x86/Linux:</b> support is mature and almost complete.</li>
+<li><b>AMD64/Linux:</b> support is new but fairly complete.</li>
+<li><b>PPC32/Linux:</b> support is new, incomplete, but improving.</li>
</ul>
=20
<p>You must be running Linux kernel 2.4.X, 2.5.X or 2.6.X, and glibc 2.2=
.X,
@@ -39,7 +39,7 @@
<li><p><b>x86/FreeBSD:</b> Doug Rabson and others haved done a fairly=20
complete port of Valgrind 2.X. Snapshots of the work in progress ar=
e at
<a href=3D"http://www.freebsd.org/cgi/ports.cgi?query=3Dvalgrind">th=
is
- FreeBSD page</a></p></li>.
+ FreeBSD page</a>.</p></li>
=20
<li><p><b>PPC32/Linux:</b> Paul Mackerras has an experimental port of
Valgrind 2.X which you can
@@ -49,7 +49,7 @@
=20
<li><p><b>x86/NetBSD:</b> Eric Auge, Kailash Sethuraman and Peter Bex
are doing a port of Valgrind 3.X, available at=20
- <a href=3D"http://http://vg4nbsd.berlios.de/">this page</a>.=20
+ <a href=3D"http://vg4nbsd.berlios.de/">this page</a>.=20
</p></li>
</ul>
=20
|
|
From: <sv...@va...> - 2005-09-13 20:26:02
|
Author: njn Date: 2005-09-13 21:25:57 +0100 (Tue, 13 Sep 2005) New Revision: 193 Log: Rework ports page to talk about platforms, rather than separating arch an= d OS. Modified: trunk/devel/platforms.html trunk/info/news.html Modified: trunk/devel/platforms.html =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/devel/platforms.html 2005-09-12 20:55:43 UTC (rev 192) +++ trunk/devel/platforms.html 2005-09-13 20:25:57 UTC (rev 193) @@ -1,68 +1,60 @@ <h1>Supported Platforms</h1> =20 -<p>We are working to make future Valgrinds (3.0 and above) more +<p>We are working to make future Valgrinds (3.0.0 and above) more portable.</p> =20 <div class=3D"hr_brown"><hr/></div> =20 -<a name=3D"arch_ports"></a><h2>Architectures</h2> +<a name=3D"curr_mainline"></a><h2>Current Mainline</h2> =20 -<dl class=3D"spaced"> +<p>The Valgrind 3.0.X series supports the following platforms.</p> +<ul> +<li><b>x86/Linux:</b> support is mature and almost complete. +<li><b>AMD64/Linux:</b> support is new but fairly complete. +<li><b>PPC32/Linux:</b> support is new, incomplete, but improving. +</ul> =20 -<dt><b>x86</b></dt> -<dd>The stable 2.4.0 release only supports=20 - Linux running on x86 machines.</dd> +<p>You must be running Linux kernel 2.4.X, 2.5.X or 2.6.X, and glibc 2.2= .X, +2.3.X or 2.4.X. That covers the vast majority of installed systems at +present.</p> =20 -<dt><b>AMD64</b></dt> -<dd>valgrind-3.0 supports AMD64 on Linux.</dd> +<p>For details of which distributions the current release +(<?php echo $config['release-version']; ?>) builds and runs its +regression tests on, see the=20 +<a href=3D"/downloads/source_code.html#current">release notes</a>.</p> =20 =20 -<dt><b>PowerPC/Linux</b></dt> -<dd>Paul Mackerras has an experimental port of valgrind to - PowerPC/Linux which you can - <a href=3D"http://ozlabs.org/~paulus/">download - here</a>. Caveat emptor applies! -</dd> +<a name=3D"old_mainline"></a><h2>Old Mainline</h2> =20 -<dd>In the Valgrind-3.0 series, support for 32-bit PowerPC on Linux is -under development.</dd> +<p>All Valgrind versions prior to 3.0.0 supported only <b>x86/Linux</b>.= </p> =20 =20 -</dl> +<a name=3D"experimental"></a><h2>Experimental</h2> =20 +<p>The following experimental ports have been done. Note that they have +varying levels of completeness and may not work reliably, and may target +older versions of Valgrind.</p> =20 +<ul> +<li><p><b>x86/FreeBSD:</b> Doug Rabson and others haved done a fairly=20 + complete port of Valgrind 2.X. Snapshots of the work in progress ar= e at + <a href=3D"http://www.freebsd.org/cgi/ports.cgi?query=3Dvalgrind">th= is + FreeBSD page</a></p></li>. =20 -<div class=3D"hr_brown"><hr/></div> +<li><p><b>PPC32/Linux:</b> Paul Mackerras has an experimental port of + Valgrind 2.X which you can + <a href=3D"http://ozlabs.org/~paulus/">download here</a>.=20 + This was the basis of the PPC32/Linux port included in Valgrind 3.0.= 0 + and above.</p></li> =20 -<a name=3D"os_ports"></a><h2>Operating Systems</h2> +<li><p><b>x86/NetBSD:</b> Eric Auge, Kailash Sethuraman and Peter Bex + are doing a port of Valgrind 3.X, available at=20 + <a href=3D"http://http://vg4nbsd.berlios.de/">this page</a>.=20 + </p></li> +</ul> =20 -<dl class=3D"spaced"> =20 -<dt><b>*/Linux</b></dt> =20 - <dd>You must be running Linux kernel 2.4.X, 2.5.X or 2.6.X, and - glibc 2.2.X, 2.3.X or 2.4.X. That covers the vast majority of - installed systems at present. - - <p>For details of which distributions the current release - (<?php echo $config['release-version']; ?>) builds - and runs its regression tests on, see the=20 - <a href=3D"/downloads/source_code.html#current">release - notes</a>.</p> - </dd> - - -<dt><b>FreeBSD</b></dt> - - <dd>Doug Rabson and others haved done a fairly complete port for x86. - Snapshots of the work in progress are at <a - href=3D"http://www.freebsd.org/cgi/ports.cgi?query=3Dvalgrind">this F= reeBSD - page</a>. We hope to integrate this support into Valgrind at some - point.</dd> - -</dl> - - <div class=3D"hr_brown"><hr/></div> =20 <a name=3D"porting_plans"></a><h2>Porting Plans</h2> @@ -74,7 +66,7 @@ =20 <p>Maintaining each port takes a lot of effort, more so than for most other programs. Valgrind is fragile due to the low-level nature of what -it does. Also each platform port has CPU-specific code, OS-specific +it does. Also, each platform port has CPU-specific code, OS-specific code and platform-specific code, and testing all the combinations is difficult.</p> =20 @@ -84,7 +76,7 @@ burden is too high. Therefore, porting Valgrind to different platforms is not simply a technical exercise: you also need to make a convincing case that the effort will be worth it, and that the port will be -supported properly, at least in the forseeable future. The following +supported properly, at least in the foreseeable future. The following table summarises our current porting priorities.</p> =20 <table class=3D"form" width=3D"100%" cellspacing=3D"0" cellpadding=3D"3"= border=3D"1"> @@ -97,12 +89,14 @@ </table> =20 <p>There are experimental ppc32/darwin and x86/FreeBSD ports for Valgrin= d 2.X. -They could be made to work with 3.x with some effort. A (much less matu= re) -port for x86/Solaris is also being worked on.</p> +They could be made to work with 3.X with some effort. Less mature +ports for x86/Solaris and x86/NetBSD are also being worked on.</p> =20 -<p>ppc32/darwin is a high priority; it would be great to have Valgrind = running -on Apple machines. Once x86/darwin machines become available, that too -will become a high priority. amd64/darwin will presumably eventually be= come +<p>ppc32/darwin is a high priority; it would be great to have Valgrind +running on Apple machines, as it would make Valgrind usable with a lot o= f +new software (e.g. Microsoft Office for Mac!), more so than x86/BSD port= s, +for example. Once x86/darwin machines become available, that too will +become a high priority. amd64/darwin will presumably eventually become important. Of the other table entries Arm/Linux or MIPS/Linux might be useful for embedded developers. x86/BSD, amd64/BSD and x86/Solaris are lower priorities.</p> Modified: trunk/info/news.html =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/info/news.html 2005-09-12 20:55:43 UTC (rev 192) +++ trunk/info/news.html 2005-09-13 20:25:57 UTC (rev 193) @@ -52,7 +52,7 @@ is available.</li> =20 <li>March 04 2004:<br /> An experimental=20 - <a href=3D"/devel/platforms.html#arch_ports">PowerPC port</a>=20 + <a href=3D"/devel/platforms.html">PowerPC port</a>=20 is available.</li> =20 <li>February 15 2004:<br /> Valgrind CVS now includes=20 |
|
From: Nicholas N. <nj...@cs...> - 2005-09-13 19:59:23
|
On Mon, 5 Sep 2005, Naveen Kumar wrote: > void *mmap(void *addr, size_t len, int prot, int > flags, int fildes, off_t off); > > One of the flags that can be passed to mmap on solaris > is MAP_ALIGN. If that flag is set then the addr arg > specifies the alignment of the return address of mmap. > How easy can this functionality be hacked into > VG_(find_map_space) ? Will this affect anything else ? It's probably not that hard, it would just be a few lines in VG_(find_map_space)(), no? Note that Julian's work on the ASPACEM branch will affect this. The changes will hopefully make porting to other OSes easier (Greg Parker has confirmed that this is so for Darwin) but it means you will have to pay attention to two branches, ASPACEM and the trunk. Nick |
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From: <sv...@va...> - 2005-09-13 19:56:37
|
Author: njn Date: 2005-09-13 20:56:19 +0100 (Tue, 13 Sep 2005) New Revision: 4645 Log: wibble Modified: trunk/docs/internals/3_0_BUGSTATUS.txt Modified: trunk/docs/internals/3_0_BUGSTATUS.txt =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/docs/internals/3_0_BUGSTATUS.txt 2005-09-13 18:26:16 UTC (rev 4= 644) +++ trunk/docs/internals/3_0_BUGSTATUS.txt 2005-09-13 19:56:19 UTC (rev 4= 645) @@ -157,7 +157,7 @@ =20 =20 =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D -=3D=3D=3D Bugs targeted for 3.1.0 and 3.0.1 = =3D=3D=3D +=3D=3D=3D Bugs targeted for 3.1.0 and 3.0.1 (all done, 3.0.1 released) = =3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 ---------------------------------------------------------------- |
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From: Nicholas N. <nj...@cs...> - 2005-09-13 19:54:45
|
On Tue, 6 Sep 2005, Arndt Muehlenfeld wrote: > A solution would be, to set the objects memory to NEW upon entry of > the destructor, therfore avoiding false reports. > > I did this with help of Aspect-C++, where the need to call VALRIND_HG_* > in destructors might be expressed as an aspect, but I wonder, if it would > be possible in the Helgrind tool itself without reducing the performance > of the tool. > > Any suggestions? I don't think there's an easy way to do this. None of the Valgrind developers have done much with Helgrind in a while (it's not even working in the 3.0.X series, although we'd like to rectify that). Nick |
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From: <sv...@va...> - 2005-09-13 18:41:17
|
Author: cerion
Date: 2005-09-13 19:41:09 +0100 (Tue, 13 Sep 2005)
New Revision: 1391
Log:
implemented guest-ppc32 lvsl, lvsr using dirty helper function
Modified:
trunk/priv/guest-ppc32/gdefs.h
trunk/priv/guest-ppc32/ghelpers.c
trunk/priv/guest-ppc32/toIR.c
Modified: trunk/priv/guest-ppc32/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/gdefs.h 2005-09-13 17:25:41 UTC (rev 1390)
+++ trunk/priv/guest-ppc32/gdefs.h 2005-09-13 18:41:09 UTC (rev 1391)
@@ -133,6 +133,9 @@
=20
extern ULong ppc32g_dirtyhelper_MFTB ( void );
=20
+extern void ppc32g_dirtyhelper_LVS ( VexGuestPPC32State* gst,
+ UInt vD_idx, UInt sh,
+ UInt dirn );
=20
#endif /* ndef __LIBVEX_GUEST_PPC32_DEFS_H */
=20
Modified: trunk/priv/guest-ppc32/ghelpers.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/ghelpers.c 2005-09-13 17:25:41 UTC (rev 1390)
+++ trunk/priv/guest-ppc32/ghelpers.c 2005-09-13 18:41:09 UTC (rev 1391)
@@ -99,6 +99,32 @@
}
=20
=20
+/* CALLED FROM GENERATED CODE */
+/* DIRTY HELPER (reads guest state, writes guest mem) */
+void ppc32g_dirtyhelper_LVS ( VexGuestPPC32State* gst,
+ UInt vD_idx, UInt sh, UInt dirn )
+{
+ vassert( vD_idx <=3D 31 );
+ vassert( sh <=3D 15 );
+ vassert( dirn <=3D 1 );
+ UChar ref[32] =3D { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
+ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+ 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F };
+ if (dirn =3D=3D 1) /* shift right */
+ sh =3D 16-sh;
+ /* else shift left */
+
+ U128* pU128_src =3D (U128*)&ref[sh];
+ U128* pU128_dst =3D &gst->guest_VR0 + (vD_idx*sizeof(gst->guest_VR0));
+
+ (*pU128_dst)[0] =3D (*pU128_src)[0];
+ (*pU128_dst)[1] =3D (*pU128_src)[1];
+ (*pU128_dst)[2] =3D (*pU128_src)[2];
+ (*pU128_dst)[3] =3D (*pU128_src)[3];
+}
+
+
/* Helper-function specialiser. */
=20
IRExpr* guest_ppc32_spechelper ( HChar* function_name,
Modified: trunk/priv/guest-ppc32/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/toIR.c 2005-09-13 17:25:41 UTC (rev 1390)
+++ trunk/priv/guest-ppc32/toIR.c 2005-09-13 18:41:09 UTC (rev 1391)
@@ -4865,16 +4865,44 @@
=20
switch (opc2) {
=20
- case 0x006: // lvsl (Load Vector for Shift Left, AV p123)
+ case 0x006: { // lvsl (Load Vector for Shift Left, AV p123)
DIP("lvsl v%d,r%d,r%d\n", vD_addr, rA_addr, rB_addr);
- DIP(" =3D> not implemented\n");
- return False;
+ IRExpr** args =3D mkIRExprVec_3(mkU32(vD_addr), mkexpr(EA), mkU32(=
0));
+ IRDirty* d =3D unsafeIRDirty_0_N (
+ 0/*regparms*/,=20
+ "ppc32g_dirtyhelper_LVS",
+ &ppc32g_dirtyhelper_LVS,
+ args );
+ /* declare guest state effects */
+ d->needsBBP =3D True;
+ d->nFxState =3D 1;
+ d->fxState[0].fx =3D Ifx_Write;
+ d->fxState[0].offset =3D vectorGuestRegOffset(vD_addr);
+ d->fxState[0].size =3D sizeof(U128);
=20
- case 0x026: // lvsr (Load Vector for Shift Right, AV p125)
+ /* execute the dirty call, side-effecting guest state */
+ stmt( IRStmt_Dirty(d) );
+ break;
+ }
+ case 0x026: { // lvsr (Load Vector for Shift Right, AV p125)
DIP("lvsr v%d,r%d,r%d\n", vD_addr, rA_addr, rB_addr);
- DIP(" =3D> not implemented\n");
- return False;
+ IRExpr** args =3D mkIRExprVec_3(mkU32(vD_addr), mkexpr(EA), mkU32(=
1));
+ IRDirty* d =3D unsafeIRDirty_0_N (
+ 0/*regparms*/,=20
+ "ppc32g_dirtyhelper_LVS",
+ &ppc32g_dirtyhelper_LVS,
+ args );
+ /* declare guest state effects */
+ d->needsBBP =3D True;
+ d->nFxState =3D 1;
+ d->fxState[0].fx =3D Ifx_Write;
+ d->fxState[0].offset =3D vectorGuestRegOffset(vD_addr);
+ d->fxState[0].size =3D sizeof(U128);
=20
+ /* execute the dirty call, side-effecting guest state */
+ stmt( IRStmt_Dirty(d) );
+ break;
+ }
case 0x007: // lvebx (Load Vector Element Byte Indexed, AV p119)
DIP("lvebx v%d,r%d,r%d\n", vD_addr, rA_addr, rB_addr);
DIP(" =3D> not implemented\n");
|
|
From: <sv...@va...> - 2005-09-13 18:26:23
|
Author: sewardj
Date: 2005-09-13 19:26:16 +0100 (Tue, 13 Sep 2005)
New Revision: 4644
Log:
Fix what looks like a potential buffer overrun in VG_(resolve_filename).
Modified:
branches/ASPACEM/coregrind/m_libcfile.c
Modified: branches/ASPACEM/coregrind/m_libcfile.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_libcfile.c 2005-09-13 18:22:01 UTC (rev =
4643)
+++ branches/ASPACEM/coregrind/m_libcfile.c 2005-09-13 18:26:16 UTC (rev =
4644)
@@ -78,7 +78,7 @@
VG_(sprintf)(tmp, "/proc/self/fd/%d", fd);
VG_(memset)(buf, 0, n_buf);
=20
- if (VG_(readlink)(tmp, buf, VKI_PATH_MAX) > 0 && buf[0] =3D=3D '/')
+ if (VG_(readlink)(tmp, buf, n_buf) > 0 && buf[0] =3D=3D '/')
return True;
else
return False;
|
|
From: <sv...@va...> - 2005-09-13 18:22:16
|
Author: sewardj
Date: 2005-09-13 19:22:01 +0100 (Tue, 13 Sep 2005)
New Revision: 4643
Log:
Reinstate fd->(dev,ino) resolution. This facilitates reinstating
segment preening.
Modified:
branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c
Modified: branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c 2005-09-13 18:08:0=
5 UTC (rev 4642)
+++ branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c 2005-09-13 18:22:0=
1 UTC (rev 4643)
@@ -1499,27 +1499,38 @@
return res;
}
=20
-static
-SysRes do_munmap_NO_NOTIFY(Addr start, SizeT length)
+static SysRes do_munmap_NO_NOTIFY(Addr start, SizeT length)
{
return VG_(do_syscall2)(__NR_munmap, (UWord)start, length );
}
=20
-static
-Int aspacem_readlink(HChar* path, HChar* buf, UInt bufsiz)
+static Int aspacem_readlink(HChar* path, HChar* buf, UInt bufsiz)
{
SysRes res;
res =3D VG_(do_syscall3)(__NR_readlink, (UWord)path, (UWord)buf, bufs=
iz);
return res.isError ? -1 : res.val;
}
=20
+static Int aspacem_fstat( Int fd, struct vki_stat* buf )
+{
+ SysRes res =3D VG_(do_syscall2)(__NR_fstat, fd, (UWord)buf);
+ return res.isError ? (-1) : 0;
+}
=20
+
//--------------------------------------------------------------
// Functions for extracting information about file descriptors.
=20
static=20
Bool get_inode_for_fd ( Int fd, /*OUT*/UInt* dev, /*OUT*/UInt* ino )
{
+ struct vki_stat buf;
+ Int r =3D aspacem_fstat(fd, &buf);
+ if (r =3D=3D 0) {
+ *dev =3D buf.st_dev;
+ *ino =3D buf.st_ino;
+ return True;
+ }
return False;
}
=20
@@ -2022,6 +2033,14 @@
aspacem_assert(sizeof(SizeT) =3D=3D sizeof(void*));
aspacem_assert(sizeof(SSizeT) =3D=3D sizeof(void*));
=20
+ {=20
+ /* If these fail, we'd better change the type of dev and ino in
+ NSegment accordingly. */
+ struct vki_stat buf;
+ aspacem_assert(sizeof(buf.st_dev) =3D=3D sizeof(UInt));
+ aspacem_assert(sizeof(buf.st_ino) =3D=3D sizeof(UInt));
+ }
+
/* Add a single interval covering the entire address space. */
init_nsegment(&seg);
seg.kind =3D SkFree;
|
|
From: Nicholas N. <nj...@cs...> - 2005-09-13 18:14:41
|
On Tue, 13 Sep 2005, Julian Seward wrote:
> Re the below, shouldn't the 3rd arg to VG_(readlink) be n_buf?
>
>
> /* Given a file descriptor, attempt to deduce its filename. To do
> this, we use /proc/self/fd/<FD>. If this doesn't point to a file,
> or if it doesn't exist, we return False. */
> Bool VG_(resolve_filename) ( Int fd, HChar* buf, Int n_buf )
> {
> HChar tmp[64];
>
> VG_(sprintf)(tmp, "/proc/self/fd/%d", fd);
> VG_(memset)(buf, 0, n_buf);
>
> if (VG_(readlink)(tmp, buf, VKI_PATH_MAX) > 0 && buf[0] == '/')
> return True;
> else
> return False;
> }
I think so. It hasn't been a problem so far because all the callers pass
in VKI_PATH_MAX for n_buf. I see you've changed it anyway in ASPACEM,
seems fine.
N
|
|
From: <sv...@va...> - 2005-09-13 18:08:08
|
Author: sewardj
Date: 2005-09-13 19:08:05 +0100 (Tue, 13 Sep 2005)
New Revision: 4642
Log:
Reinstate fd-to-filename resolution.
Modified:
branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c
Modified: branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c 2005-09-13 16:47:0=
0 UTC (rev 4641)
+++ branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c 2005-09-13 18:08:0=
5 UTC (rev 4642)
@@ -1469,8 +1469,8 @@
=20
=20
//--------------------------------------------------------------
-// Direct access to the kernel's mmap/munmap syscalls. This
-// avoids dependence on m_libcmman.
+// Direct access to a handful of syscalls. This avoids dependence on
+// m_libc*.
=20
SysRes VG_(am_do_mmap_NO_NOTIFY)( Addr start, SizeT length, UInt prot,=20
UInt flags, UInt fd, OffT offset)
@@ -1505,7 +1505,15 @@
return VG_(do_syscall2)(__NR_munmap, (UWord)start, length );
}
=20
+static
+Int aspacem_readlink(HChar* path, HChar* buf, UInt bufsiz)
+{
+ SysRes res;
+ res =3D VG_(do_syscall3)(__NR_readlink, (UWord)path, (UWord)buf, bufs=
iz);
+ return res.isError ? -1 : res.val;
+}
=20
+
//--------------------------------------------------------------
// Functions for extracting information about file descriptors.
=20
@@ -1515,10 +1523,22 @@
return False;
}
=20
+/* Given a file descriptor, attempt to deduce its filename. To do
+ this, we use /proc/self/fd/<FD>. If this doesn't point to a file,
+ or if it doesn't exist, we return False. */
static
Bool get_name_for_fd ( Int fd, /*OUT*/HChar* buf, Int nbuf )
{
- return False;
+ Int i;
+ HChar tmp[64];
+
+ aspacem_sprintf(tmp, "/proc/self/fd/%d", fd);
+ for (i =3D 0; i < nbuf; i++) buf[i] =3D 0;
+ =20
+ if (aspacem_readlink(tmp, buf, nbuf) > 0 && buf[0] =3D=3D '/')
+ return True;
+ else
+ return False;
}
=20
=20
|
|
From: Julian S. <js...@ac...> - 2005-09-13 18:01:44
|
Re the below, shouldn't the 3rd arg to VG_(readlink) be n_buf?
J
/* Given a file descriptor, attempt to deduce its filename. To do
this, we use /proc/self/fd/<FD>. If this doesn't point to a file,
or if it doesn't exist, we return False. */
Bool VG_(resolve_filename) ( Int fd, HChar* buf, Int n_buf )
{
HChar tmp[64];
VG_(sprintf)(tmp, "/proc/self/fd/%d", fd);
VG_(memset)(buf, 0, n_buf);
if (VG_(readlink)(tmp, buf, VKI_PATH_MAX) > 0 && buf[0] == '/')
return True;
else
return False;
}
|
|
From: <sv...@va...> - 2005-09-13 17:25:44
|
Author: cerion
Date: 2005-09-13 18:25:41 +0100 (Tue, 13 Sep 2005)
New Revision: 1390
Log:
yet another new IR primop: Iop_QNarrow32Ux4
Modified:
trunk/priv/ir/irdefs.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/ir/irdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/ir/irdefs.c 2005-09-13 16:34:28 UTC (rev 1389)
+++ trunk/priv/ir/irdefs.c 2005-09-13 17:25:41 UTC (rev 1390)
@@ -503,6 +503,7 @@
case Iop_Narrow16Ux8: vex_printf("Narrow16Ux8"); return;
case Iop_Narrow32Ux4: vex_printf("Narrow32Ux4"); return;
case Iop_QNarrow16Ux8: vex_printf("QNarrow16Ux8"); return;
+ case Iop_QNarrow32Ux4: vex_printf("QNarrow32Ux4"); return;
case Iop_QNarrow16Sx8: vex_printf("QNarrow16Sx8"); return;
case Iop_QNarrow32Sx4: vex_printf("QNarrow32Sx4"); return;
=20
@@ -1563,7 +1564,7 @@
case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4:
case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4:
case Iop_Rot8x16: case Iop_Rot16x8: case Iop_Rot32x4:
- case Iop_QNarrow16Ux8:
+ case Iop_QNarrow16Ux8: case Iop_QNarrow32Ux4:
case Iop_QNarrow16Sx8: case Iop_QNarrow32Sx4:
case Iop_Narrow16Ux8: case Iop_Narrow32Ux4:
case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8:
Modified: trunk/pub/libvex_ir.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/pub/libvex_ir.h 2005-09-13 16:34:28 UTC (rev 1389)
+++ trunk/pub/libvex_ir.h 2005-09-13 17:25:41 UTC (rev 1390)
@@ -581,9 +581,8 @@
Iop_Rot8x16, Iop_Rot16x8, Iop_Rot32x4,
=20
/* NARROWING -- narrow 2xV128 into 1xV128, hi half from left arg *=
/
- Iop_QNarrow16Ux8,
- Iop_QNarrow16Sx8,
- Iop_QNarrow32Sx4,
+ Iop_QNarrow16Ux8, Iop_QNarrow32Ux4,
+ Iop_QNarrow16Sx8, Iop_QNarrow32Sx4,
Iop_Narrow16Ux8, Iop_Narrow32Ux4,
=20
/* INTERLEAVING -- interleave lanes from low or high halves of
|
|
From: <sv...@va...> - 2005-09-13 16:47:03
|
Author: cerion
Date: 2005-09-13 17:47:00 +0100 (Tue, 13 Sep 2005)
New Revision: 4641
Log:
Rename VG_(have_altivec) =3D> VG_(have_altivec_ppc) for consistency.
Modified:
trunk/coregrind/m_dispatch/dispatch-ppc32.S
trunk/coregrind/m_machine.c
trunk/coregrind/m_main.c
trunk/coregrind/m_translate.c
trunk/coregrind/pub_core_machine.h
Modified: trunk/coregrind/m_dispatch/dispatch-ppc32.S
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_dispatch/dispatch-ppc32.S 2005-09-13 13:30:38 UTC (=
rev 4640)
+++ trunk/coregrind/m_dispatch/dispatch-ppc32.S 2005-09-13 16:47:00 UTC (=
rev 4641)
@@ -92,8 +92,8 @@
=20
/* set host AltiVec control word to the default mode expected=20
by VEX-generated code. */
- lis 3,VG_(have_altivec)@ha
- lwz 3,VG_(have_altivec)@l(3)
+ lis 3,VG_(have_altivec_ppc)@ha
+ lwz 3,VG_(have_altivec_ppc)@l(3)
cmplwi 3,0
beq L1
/* generate vector {0x0,0x0,0x0,0x00010000} */
Modified: trunk/coregrind/m_machine.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_machine.c 2005-09-13 13:30:38 UTC (rev 4640)
+++ trunk/coregrind/m_machine.c 2005-09-13 16:47:00 UTC (rev 4641)
@@ -220,7 +220,7 @@
// not-yet-set.
Int VG_(cache_line_size_ppc32) =3D 0;
// Altivec enabled? Harvested on startup from the AT_HWCAP entry
-Int VG_(have_altivec) =3D 0;
+Int VG_(have_altivec_ppc) =3D 0;
#endif
=20
// X86: set to 1 if the host is able to do {ld,st}mxcsr (load/store
Modified: trunk/coregrind/m_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_main.c 2005-09-13 13:30:38 UTC (rev 4640)
+++ trunk/coregrind/m_main.c 2005-09-13 16:47:00 UTC (rev 4641)
@@ -183,8 +183,8 @@
case AT_HWCAP:
VG_(debugLog)(1, "main", "PPC32 hwcaps: 0x%x\n", (UInt)auxv->u.=
a_val);
if ((auxv->u.a_val & 0x10000000) > 0)
- VG_(have_altivec) =3D 1;
- VG_(debugLog)(1, "main", "PPC32 AltiVec support: %u\n", VG_(hav=
e_altivec));
+ VG_(have_altivec_ppc) =3D 1;
+ VG_(debugLog)(1, "main", "PPC32 AltiVec support: %u\n", VG_(hav=
e_altivec_ppc));
break;
# endif
=20
Modified: trunk/coregrind/m_translate.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_translate.c 2005-09-13 13:30:38 UTC (rev 4640)
+++ trunk/coregrind/m_translate.c 2005-09-13 16:47:00 UTC (rev 4641)
@@ -34,7 +34,7 @@
#include "pub_core_aspacemgr.h"
#include "pub_core_cpuid.h"
#include "pub_core_machine.h" // For VG_(cache_line_size_ppc32)
- // and VG_(have_altivec)
+ // and VG_(have_altivec_ppc)
// and VG_(get_SP)
// and VG_(have_mxcsr_x86)
#include "pub_core_libcbase.h"
@@ -113,8 +113,8 @@
=20
#elif defined(VGA_ppc32)
*vex_arch =3D VexArchPPC32;
- vai->subarch =3D VG_(have_altivec) ? VexSubArchPPC32_AV
- : VexSubArchPPC32_noAV;
+ vai->subarch =3D VG_(have_altivec_ppc) ? VexSubArchPPC32_AV
+ : VexSubArchPPC32_noAV;
vai->ppc32_cache_line_szB =3D VG_(cache_line_size_ppc32);
return True;
=20
Modified: trunk/coregrind/pub_core_machine.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/pub_core_machine.h 2005-09-13 13:30:38 UTC (rev 4640)
+++ trunk/coregrind/pub_core_machine.h 2005-09-13 16:47:00 UTC (rev 4641)
@@ -84,7 +84,7 @@
// entries.
extern Int VG_(cache_line_size_ppc32);
// Altivec enabled? Harvested on startup from the AT_HWCAP entry
-extern Int VG_(have_altivec);
+extern Int VG_(have_altivec_ppc);
#endif
=20
// X86: set to 1 if the host is able to do {ld,st}mxcsr (load/store
|
|
From: <sv...@va...> - 2005-09-13 16:34:32
|
Author: cerion
Date: 2005-09-13 17:34:28 +0100 (Tue, 13 Sep 2005)
New Revision: 1389
Log:
Added a number of new IR primops to support integer AltiVec insns
Modified:
trunk/priv/ir/irdefs.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/ir/irdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/ir/irdefs.c 2005-09-13 13:34:09 UTC (rev 1388)
+++ trunk/priv/ir/irdefs.c 2005-09-13 16:34:28 UTC (rev 1389)
@@ -398,6 +398,10 @@
case Iop_V128to32: vex_printf("V128to32"); return;
case Iop_SetV128lo32: vex_printf("SetV128lo32"); return;
=20
+ case Iop_Dup8x16: vex_printf("Dup8x16"); return;
+ case Iop_Dup16x8: vex_printf("Dup16x8"); return;
+ case Iop_Dup32x4: vex_printf("Dup32x4"); return;
+
case Iop_NotV128: vex_printf("NotV128"); return;
case Iop_AndV128: vex_printf("AndV128"); return;
case Iop_OrV128: vex_printf("OrV128"); return;
@@ -414,8 +418,10 @@
case Iop_Add64x2: vex_printf("Add64x2"); return;
case Iop_QAdd8Ux16: vex_printf("QAdd8Ux16"); return;
case Iop_QAdd16Ux8: vex_printf("QAdd16Ux8"); return;
+ case Iop_QAdd32Ux4: vex_printf("QAdd32Ux4"); return;
case Iop_QAdd8Sx16: vex_printf("QAdd8Sx16"); return;
case Iop_QAdd16Sx8: vex_printf("QAdd16Sx8"); return;
+ case Iop_QAdd32Sx4: vex_printf("QAdd32Sx4"); return;
=20
case Iop_Sub8x16: vex_printf("Sub8x16"); return;
case Iop_Sub16x8: vex_printf("Sub16x8"); return;
@@ -423,20 +429,41 @@
case Iop_Sub64x2: vex_printf("Sub64x2"); return;
case Iop_QSub8Ux16: vex_printf("QSub8Ux16"); return;
case Iop_QSub16Ux8: vex_printf("QSub16Ux8"); return;
+ case Iop_QSub32Ux4: vex_printf("QSub32Ux4"); return;
case Iop_QSub8Sx16: vex_printf("QSub8Sx16"); return;
case Iop_QSub16Sx8: vex_printf("QSub16Sx8"); return;
+ case Iop_QSub32Sx4: vex_printf("QSub32Sx4"); return;
=20
case Iop_Mul16x8: vex_printf("Mul16x8"); return;
+ case Iop_MulLo16Ux8: vex_printf("MulLo16Ux8"); return;
+ case Iop_MulLo32Ux4: vex_printf("MulLo32Ux4"); return;
+ case Iop_MulLo16Sx8: vex_printf("MulLo16Sx8"); return;
+ case Iop_MulLo32Sx4: vex_printf("MulLo32Sx4"); return;
case Iop_MulHi16Ux8: vex_printf("MulHi16Ux8"); return;
+ case Iop_MulHi32Ux4: vex_printf("MulHi32Ux4"); return;
case Iop_MulHi16Sx8: vex_printf("MulHi16Sx8"); return;
+ case Iop_MulHi32Sx4: vex_printf("MulHi32Sx4"); return;
=20
case Iop_Avg8Ux16: vex_printf("Avg8Ux16"); return;
case Iop_Avg16Ux8: vex_printf("Avg16Ux8"); return;
+ case Iop_Avg32Ux4: vex_printf("Avg32Ux4"); return;
+ case Iop_Avg8Sx16: vex_printf("Avg8Sx16"); return;
+ case Iop_Avg16Sx8: vex_printf("Avg16Sx8"); return;
+ case Iop_Avg32Sx4: vex_printf("Avg32Sx4"); return;
=20
+ case Iop_Max8Sx16: vex_printf("Max8Sx16"); return;
case Iop_Max16Sx8: vex_printf("Max16Sx8"); return;
+ case Iop_Max32Sx4: vex_printf("Max32Sx4"); return;
case Iop_Max8Ux16: vex_printf("Max8Ux16"); return;
+ case Iop_Max16Ux8: vex_printf("Max16Ux8"); return;
+ case Iop_Max32Ux4: vex_printf("Max32Ux4"); return;
+
+ case Iop_Min8Sx16: vex_printf("Min8Sx16"); return;
case Iop_Min16Sx8: vex_printf("Min16Sx8"); return;
+ case Iop_Min32Sx4: vex_printf("Min32Sx4"); return;
case Iop_Min8Ux16: vex_printf("Min8Ux16"); return;
+ case Iop_Min16Ux8: vex_printf("Min16Ux8"); return;
+ case Iop_Min32Ux4: vex_printf("Min32Ux4"); return;
=20
case Iop_CmpEQ8x16: vex_printf("CmpEQ8x16"); return;
case Iop_CmpEQ16x8: vex_printf("CmpEQ16x8"); return;
@@ -444,7 +471,13 @@
case Iop_CmpGT8Sx16: vex_printf("CmpGT8Sx16"); return;
case Iop_CmpGT16Sx8: vex_printf("CmpGT16Sx8"); return;
case Iop_CmpGT32Sx4: vex_printf("CmpGT32Sx4"); return;
+ case Iop_CmpGT8Ux16: vex_printf("CmpGT8Ux16"); return;
+ case Iop_CmpGT16Ux8: vex_printf("CmpGT16Ux8"); return;
+ case Iop_CmpGT32Ux4: vex_printf("CmpGT32Ux4"); return;
=20
+ case Iop_ShlV128: vex_printf("ShlV128"); return;
+ case Iop_ShrV128: vex_printf("ShrV128"); return;
+
case Iop_ShlN16x8: vex_printf("ShlN16x8"); return;
case Iop_ShlN32x4: vex_printf("ShlN32x4"); return;
case Iop_ShlN64x2: vex_printf("ShlN64x2"); return;
@@ -454,6 +487,21 @@
case Iop_SarN16x8: vex_printf("SarN16x8"); return;
case Iop_SarN32x4: vex_printf("SarN32x4"); return;
=20
+ case Iop_Shl8x16: vex_printf("Shl8x16"); return;
+ case Iop_Shl16x8: vex_printf("Shl16x8"); return;
+ case Iop_Shl32x4: vex_printf("Shl32x4"); return;
+ case Iop_Shr8x16: vex_printf("Shr8x16"); return;
+ case Iop_Shr16x8: vex_printf("Shr16x8"); return;
+ case Iop_Shr32x4: vex_printf("Shr32x4"); return;
+ case Iop_Sar8x16: vex_printf("Sar8x16"); return;
+ case Iop_Sar16x8: vex_printf("Sar16x8"); return;
+ case Iop_Sar32x4: vex_printf("Sar32x4"); return;
+ case Iop_Rot8x16: vex_printf("Rot8x16"); return;
+ case Iop_Rot16x8: vex_printf("Rot16x8"); return;
+ case Iop_Rot32x4: vex_printf("Rot32x4"); return;
+
+ case Iop_Narrow16Ux8: vex_printf("Narrow16Ux8"); return;
+ case Iop_Narrow32Ux4: vex_printf("Narrow32Ux4"); return;
case Iop_QNarrow16Ux8: vex_printf("QNarrow16Ux8"); return;
case Iop_QNarrow16Sx8: vex_printf("QNarrow16Sx8"); return;
case Iop_QNarrow32Sx4: vex_printf("QNarrow32Sx4"); return;
@@ -467,6 +515,8 @@
case Iop_InterleaveLO32x4: vex_printf("InterleaveLO32x4"); return;
case Iop_InterleaveLO64x2: vex_printf("InterleaveLO64x2"); return;
=20
+ case Iop_Perm: vex_printf("Perm"); return;
+
default: vpanic("ppIROp(1)");
}
=20
@@ -1462,6 +1512,10 @@
case Iop_SetV128lo32: BINARY(Ity_V128, Ity_V128,Ity_I32);
case Iop_SetV128lo64: BINARY(Ity_V128, Ity_V128,Ity_I64);
=20
+ case Iop_Dup8x16: UNARY(Ity_V128, Ity_I8);
+ case Iop_Dup16x8: UNARY(Ity_V128, Ity_I16);
+ case Iop_Dup32x4: UNARY(Ity_V128, Ity_I32);
+
case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4:
case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2:
case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4:
@@ -1485,29 +1539,38 @@
case Iop_AndV128: case Iop_OrV128: case Iop_XorV128:
case Iop_Add8x16: case Iop_Add16x8: =20
case Iop_Add32x4: case Iop_Add64x2:
- case Iop_QAdd8Ux16: case Iop_QAdd16Ux8:
- case Iop_QAdd8Sx16: case Iop_QAdd16Sx8:
+ case Iop_QAdd8Ux16: case Iop_QAdd16Ux8: case Iop_QAdd32Ux4:
+ case Iop_QAdd8Sx16: case Iop_QAdd16Sx8: case Iop_QAdd32Sx4:
case Iop_Sub8x16: case Iop_Sub16x8:
case Iop_Sub32x4: case Iop_Sub64x2:
- case Iop_QSub8Ux16: case Iop_QSub16Ux8:
- case Iop_QSub8Sx16: case Iop_QSub16Sx8:
+ case Iop_QSub8Ux16: case Iop_QSub16Ux8: case Iop_QSub32Ux4:
+ case Iop_QSub8Sx16: case Iop_QSub16Sx8: case Iop_QSub32Sx4:
case Iop_Mul16x8:
- case Iop_MulHi16Ux8:
- case Iop_MulHi16Sx8:
- case Iop_Avg8Ux16:
- case Iop_Avg16Ux8:
- case Iop_Max16Sx8:
- case Iop_Max8Ux16:
- case Iop_Min16Sx8:
- case Iop_Min8Ux16:
+ case Iop_MulLo16Ux8: case Iop_MulLo32Ux4:
+ case Iop_MulLo16Sx8: case Iop_MulLo32Sx4:
+ case Iop_MulHi16Ux8: case Iop_MulHi32Ux4:=20
+ case Iop_MulHi16Sx8: case Iop_MulHi32Sx4:=20
+ case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4:
+ case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4:
+ case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4:
+ case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4:
+ case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4:
+ case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4:
case Iop_CmpEQ8x16: case Iop_CmpEQ16x8: case Iop_CmpEQ32x4:
case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4:
+ case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4:
+ case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4:
+ case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4:
+ case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4:
+ case Iop_Rot8x16: case Iop_Rot16x8: case Iop_Rot32x4:
case Iop_QNarrow16Ux8:
case Iop_QNarrow16Sx8: case Iop_QNarrow32Sx4:
+ case Iop_Narrow16Ux8: case Iop_Narrow32Ux4:
case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8:
case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2:
case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8:=20
case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2:
+ case Iop_Perm:
BINARY(Ity_V128, Ity_V128,Ity_V128);
=20
case Iop_NotV128:
@@ -1521,6 +1584,7 @@
case Iop_CmpNEZ32x4: case Iop_CmpNEZ64x2:
UNARY(Ity_V128, Ity_V128);
=20
+ case Iop_ShlV128: case Iop_ShrV128:
case Iop_ShlN16x8: case Iop_ShlN32x4: case Iop_ShlN64x2:
case Iop_ShrN16x8: case Iop_ShrN32x4: case Iop_ShrN64x2:
case Iop_SarN16x8: case Iop_SarN32x4:
Modified: trunk/pub/libvex_ir.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/pub/libvex_ir.h 2005-09-13 13:34:09 UTC (rev 1388)
+++ trunk/pub/libvex_ir.h 2005-09-13 16:34:28 UTC (rev 1389)
@@ -531,47 +531,60 @@
Iop_NotV128,
Iop_AndV128, Iop_OrV128, Iop_XorV128,=20
=20
+ /* VECTOR SHIFT (shift amt :: Ity_I8) */
+ Iop_ShlV128, Iop_ShrV128,
+
/* MISC (vector integer cmp !=3D 0) */
Iop_CmpNEZ8x16, Iop_CmpNEZ16x8, Iop_CmpNEZ32x4, Iop_CmpNEZ64x2,
=20
/* ADDITION (normal / unsigned sat / signed sat) */
Iop_Add8x16, Iop_Add16x8, Iop_Add32x4, Iop_Add64x2,
- Iop_QAdd8Ux16, Iop_QAdd16Ux8,
- Iop_QAdd8Sx16, Iop_QAdd16Sx8,
+ Iop_QAdd8Ux16, Iop_QAdd16Ux8, Iop_QAdd32Ux4,
+ Iop_QAdd8Sx16, Iop_QAdd16Sx8, Iop_QAdd32Sx4,
=20
/* SUBTRACTION (normal / unsigned sat / signed sat) */
Iop_Sub8x16, Iop_Sub16x8, Iop_Sub32x4, Iop_Sub64x2,
- Iop_QSub8Ux16, Iop_QSub16Ux8,
- Iop_QSub8Sx16, Iop_QSub16Sx8,
+ Iop_QSub8Ux16, Iop_QSub16Ux8, Iop_QSub32Ux4,
+ Iop_QSub8Sx16, Iop_QSub16Sx8, Iop_QSub32Sx4,
=20
/* MULTIPLICATION (normal / high half of signed/unsigned) */
Iop_Mul16x8,
- Iop_MulHi16Ux8,
- Iop_MulHi16Sx8,
+ Iop_MulLo16Ux8, Iop_MulLo32Ux4,
+ Iop_MulLo16Sx8, Iop_MulLo32Sx4,
+ Iop_MulHi16Ux8, Iop_MulHi32Ux4,
+ Iop_MulHi16Sx8, Iop_MulHi32Sx4,
=20
/* AVERAGING: note: (arg1 + arg2 + 1) >>u 1 */
- Iop_Avg8Ux16,
- Iop_Avg16Ux8,
+ Iop_Avg8Ux16, Iop_Avg16Ux8, Iop_Avg32Ux4,
+ Iop_Avg8Sx16, Iop_Avg16Sx8, Iop_Avg32Sx4,
=20
/* MIN/MAX */
- Iop_Max16Sx8,
- Iop_Max8Ux16,
- Iop_Min16Sx8,
- Iop_Min8Ux16,
+ Iop_Max8Sx16, Iop_Max16Sx8, Iop_Max32Sx4,
+ Iop_Max8Ux16, Iop_Max16Ux8, Iop_Max32Ux4,
+ Iop_Min8Sx16, Iop_Min16Sx8, Iop_Min32Sx4,
+ Iop_Min8Ux16, Iop_Min16Ux8, Iop_Min32Ux4,
=20
/* COMPARISON */
Iop_CmpEQ8x16, Iop_CmpEQ16x8, Iop_CmpEQ32x4,
Iop_CmpGT8Sx16, Iop_CmpGT16Sx8, Iop_CmpGT32Sx4,
+ Iop_CmpGT8Ux16, Iop_CmpGT16Ux8, Iop_CmpGT32Ux4,
=20
/* VECTOR x SCALAR SHIFT (shift amt :: Ity_I8) */
Iop_ShlN16x8, Iop_ShlN32x4, Iop_ShlN64x2,
Iop_ShrN16x8, Iop_ShrN32x4, Iop_ShrN64x2,
Iop_SarN16x8, Iop_SarN32x4,
=20
+ /* VECTOR x VECTOR SHIFT / ROTATE */
+ Iop_Shl8x16, Iop_Shl16x8, Iop_Shl32x4,
+ Iop_Shr8x16, Iop_Shr16x8, Iop_Shr32x4,
+ Iop_Sar8x16, Iop_Sar16x8, Iop_Sar32x4,
+ Iop_Rot8x16, Iop_Rot16x8, Iop_Rot32x4,
+
/* NARROWING -- narrow 2xV128 into 1xV128, hi half from left arg *=
/
Iop_QNarrow16Ux8,
Iop_QNarrow16Sx8,
Iop_QNarrow32Sx4,
+ Iop_Narrow16Ux8, Iop_Narrow32Ux4,
=20
/* INTERLEAVING -- interleave lanes from low or high halves of
operands. Most-significant result lane is from the left
@@ -579,7 +592,14 @@
Iop_InterleaveHI8x16, Iop_InterleaveHI16x8,
Iop_InterleaveHI32x4, Iop_InterleaveHI64x2,
Iop_InterleaveLO8x16, Iop_InterleaveLO16x8,=20
- Iop_InterleaveLO32x4, Iop_InterleaveLO64x2
+ Iop_InterleaveLO32x4, Iop_InterleaveLO64x2,
+
+ /* DUPLICATING -- copy value to all lanes */
+ Iop_Dup8x16, Iop_Dup16x8, Iop_Dup32x4,
+
+ /* PERMUTING -- copy src bytes to dst,
+ as indexed by control vector bytes: dst[i] =3D src[ ctl[i] ] */
+ Iop_Perm
}
IROp;
=20
|
|
From: <sv...@va...> - 2005-09-13 13:34:15
|
Author: cerion
Date: 2005-09-13 14:34:09 +0100 (Tue, 13 Sep 2005)
New Revision: 1388
Log:
a couple more simple altivec insns
- vandc, vnor, vsel
Modified:
trunk/priv/guest-ppc32/toIR.c
trunk/priv/host-ppc32/isel.c
Modified: trunk/priv/guest-ppc32/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/toIR.c 2005-09-12 22:51:53 UTC (rev 1387)
+++ trunk/priv/guest-ppc32/toIR.c 2005-09-13 13:34:09 UTC (rev 1388)
@@ -5308,8 +5308,9 @@
=20
case 0x444: // vandc (And, AV p148)
DIP("vandc v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
- DIP(" =3D> not implemented\n");
- return False;
+ putVReg( vD_addr, binop(Iop_AndV128, mkexpr(vA),
+ unop(Iop_NotV128, mkexpr(vB))) );
+ break;
=20
case 0x484: // vor (Or, AV p217)
DIP("vor v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
@@ -5323,8 +5324,9 @@
=20
case 0x504: // vnor (Nor, AV p216)
DIP("vnor v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
- DIP(" =3D> not implemented\n");
- return False;
+ putVReg( vD_addr,
+ unop(Iop_NotV128, binop(Iop_OrV128, mkexpr(vA), mkexpr(vB))) );
+ break;
=20
default:
vex_printf("dis_av_logic(PPC32)(opc2=3D0x%x)\n", opc2);
@@ -5603,6 +5605,13 @@
=20
UChar SIMM_8 =3D extend_s_5to8(SIMM_5);
=20
+ IRTemp vA =3D newTemp(Ity_V128);
+ IRTemp vB =3D newTemp(Ity_V128);
+ IRTemp vC =3D newTemp(Ity_V128);
+ assign( vA, getVReg(vA_addr));
+ assign( vB, getVReg(vB_addr));
+ assign( vC, getVReg(vC_addr));
+
if (opc1 !=3D 0x4) {
vex_printf("dis_av_permute(PPC32)(instr)\n");
return False;
@@ -5611,8 +5620,11 @@
switch (opc2) {
case 0x2A: // vsel (Conditional Select, AV p238)
DIP("vsel v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
- DIP(" =3D> not implemented\n");
- return False;
+ /* vD =3D (vA & ~vC) | (vB & vC) */
+ putVReg( vD_addr, binop(Iop_OrV128,
+ binop(Iop_AndV128, mkexpr(vA), unop(Iop_NotV128, mkexpr(vC))),
+ binop(Iop_AndV128, mkexpr(vB), mkexpr(vC))) );
+ return True;
=20
case 0x2B: // vperm (Permute, AV p218)
DIP("vperm v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr)=
;
Modified: trunk/priv/host-ppc32/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/isel.c 2005-09-12 22:51:53 UTC (rev 1387)
+++ trunk/priv/host-ppc32/isel.c 2005-09-13 13:34:09 UTC (rev 1388)
@@ -2822,6 +2822,7 @@
}
=20
if (e->tag =3D=3D Iex_Get) {
+ /* Guest state vectors are 16byte aligned, so don't need to worry =
here */
HReg dst =3D newVRegV(env);
addInstr(env,
PPC32Instr_AvLdSt( True/*load*/, 16, dst,
@@ -3393,6 +3394,7 @@
return;
}
if (ty =3D=3D Ity_V128) {
+ /* Guest state vectors are 16byte aligned, so don't need to wor=
ry here */
HReg v_src =3D iselVecExpr(env, stmt->Ist.Put.data);
PPC32AMode* am_addr =3D PPC32AMode_IR(stmt->Ist.Put.offset, Gu=
estStatePtr);
addInstr(env, PPC32Instr_AvLdSt(False/*store*/, 16, v_src, am_a=
ddr));
|
|
From: <sv...@va...> - 2005-09-13 13:30:44
|
Author: tom
Date: 2005-09-13 14:30:38 +0100 (Tue, 13 Sep 2005)
New Revision: 4640
Log:
Implement VG_(fsize) as a restricted version of VG_(fstat) that only
returns the size and use it in the command line module when we want
the size of the .valgrindrc file.
This allows the launcher to provide VG_(fsize) instead of VG_(fstat)
which removed the assumption that the glibc stat structure matches the
kernel stat structure without having to do a full translation from one
to the other.
Modified:
branches/ASPACEM/coregrind/m_commandline.c
branches/ASPACEM/coregrind/m_launcher.c
branches/ASPACEM/coregrind/m_libcfile.c
branches/ASPACEM/coregrind/pub_core_libcfile.h
Modified: branches/ASPACEM/coregrind/m_commandline.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_commandline.c 2005-09-13 12:45:13 UTC (r=
ev 4639)
+++ branches/ASPACEM/coregrind/m_commandline.c 2005-09-13 13:30:38 UTC (r=
ev 4640)
@@ -44,7 +44,7 @@
{
Int n;
SysRes fd;
- struct vki_stat s1;
+ Int size;
Char* f_clo =3D NULL;
Char filename[VKI_PATH_MAX];
=20
@@ -52,10 +52,10 @@
( NULL =3D=3D dir ? "" : dir ) );
fd =3D VG_(open)(filename, 0, VKI_S_IRUSR);
if ( !fd.isError ) {
- if ( 0 =3D=3D VG_(fstat)(fd.val, &s1) ) {
- f_clo =3D VG_(malloc)(s1.st_size+1);
+ if ( 0 =3D=3D (size =3D VG_(fsize)(fd.val)) ) {
+ f_clo =3D VG_(malloc)(size+1);
vg_assert(f_clo);
- n =3D VG_(read)(fd.val, f_clo, s1.st_size);
+ n =3D VG_(read)(fd.val, f_clo, size);
if (n =3D=3D -1) n =3D 0;
f_clo[n] =3D '\0';
}
Modified: branches/ASPACEM/coregrind/m_launcher.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_launcher.c 2005-09-13 12:45:13 UTC (rev =
4639)
+++ branches/ASPACEM/coregrind/m_launcher.c 2005-09-13 13:30:38 UTC (rev =
4640)
@@ -159,9 +159,10 @@
return read(fd, buf, count);
}
=20
-Int VG_(fstat) ( Int fd, struct vki_stat* buf )
+Int VG_(fsize) ( Int fd )
{
- return fstat(fd, buf);
+ struct stat buf;
+ return fstat(fd, &buf) =3D=3D 0 ? buf.st_size : (-1);
}
=20
UInt VG_(snprintf) ( Char* buf, Int size, const HChar *format, ... )
Modified: branches/ASPACEM/coregrind/m_libcfile.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_libcfile.c 2005-09-13 12:45:13 UTC (rev =
4639)
+++ branches/ASPACEM/coregrind/m_libcfile.c 2005-09-13 13:30:38 UTC (rev =
4640)
@@ -133,6 +133,13 @@
return res.isError ? (-1) : 0;
}
=20
+Int VG_(fsize) ( Int fd )
+{
+ struct vki_stat buf;
+ SysRes res =3D VG_(do_syscall2)(__NR_fstat, fd, (UWord)&buf);
+ return res.isError ? (-1) : buf.st_size;
+}
+
Int VG_(dup2) ( Int oldfd, Int newfd )
{
SysRes res =3D VG_(do_syscall2)(__NR_dup2, oldfd, newfd);
Modified: branches/ASPACEM/coregrind/pub_core_libcfile.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/pub_core_libcfile.h 2005-09-13 12:45:13 UT=
C (rev 4639)
+++ branches/ASPACEM/coregrind/pub_core_libcfile.h 2005-09-13 13:30:38 UT=
C (rev 4640)
@@ -49,6 +49,9 @@
/* Convert an fd into a filename */
extern Bool VG_(resolve_filename) ( Int fd, HChar* buf, Int n_buf );
=20
+/* Return the size of a file */
+extern Int VG_(fsize) ( Int fd );
+
/* Default destination port to be used in logging over a network, if
none specified. */
#define VG_CLO_DEFAULT_LOGPORT 1500
|