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From: <sv...@va...> - 2005-08-24 17:39:28
|
Author: sewardj
Date: 2005-08-24 18:39:26 +0100 (Wed, 24 Aug 2005)
New Revision: 1358
Log:
Merge r1343 (x86 LOOP{,E,NE} implementation)
Modified:
branches/VEX_3_0_BRANCH/priv/guest-x86/toIR.c
Modified: branches/VEX_3_0_BRANCH/priv/guest-x86/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-x86/toIR.c 2005-08-24 17:36:20 UTC=
(rev 1357)
+++ branches/VEX_3_0_BRANCH/priv/guest-x86/toIR.c 2005-08-24 17:39:26 UTC=
(rev 1358)
@@ -666,7 +666,17 @@
vpanic("mkWidenOp(x86,guest)");
}
=20
+static IRExpr* mkAnd1 ( IRExpr* x, IRExpr* y )
+{
+ vassert(typeOfIRExpr(irbb->tyenv,x) =3D=3D Ity_I1);
+ vassert(typeOfIRExpr(irbb->tyenv,y) =3D=3D Ity_I1);
+ return unop(Iop_32to1,=20
+ binop(Iop_And32,=20
+ unop(Iop_1Uto32,x),=20
+ unop(Iop_1Uto32,y)));
+}
=20
+
/*------------------------------------------------------------*/
/*--- Helpers for %eflags. ---*/
/*------------------------------------------------------------*/
@@ -10543,9 +10553,8 @@
break;
=20
case 0xE3: /* JECXZ or perhaps JCXZ, depending on OSO ? Intel
- manual says it depends on address size override,
- which doesn't sound right to me. */
- vassert(sz=3D=3D4); /* possibly also OK for sz=3D=3D2 */
+ manual says it depends on address size override. */
+ if (sz !=3D 4) goto decode_failure;
d32 =3D (((Addr32)guest_EIP_bbstart)+delta+1) + getSDisp8(delta);
delta++;
ty =3D szToITy(sz);
@@ -10560,28 +10569,48 @@
DIP("j%sz 0x%x\n", nameIReg(sz, R_ECX), d32);
break;
=20
-//-- case 0xE0: /* LOOPNE disp8 */
-//-- case 0xE1: /* LOOPE disp8 */
-//-- case 0xE2: /* LOOP disp8 */
-//-- /* Again, the docs say this uses ECX/CX as a count depending =
on
-//-- the address size override, not the operand one. Since we
-//-- don't handle address size overrides, I guess that means
-//-- ECX. */
-//-- d32 =3D (eip+1) + getSDisp8(eip); eip++;
-//-- t1 =3D newTemp(cb);
-//-- uInstr2(cb, GET, 4, ArchReg, R_ECX, TempReg, t1);
-//-- uInstr1(cb, DEC, 4, TempReg, t1);
-//-- uInstr2(cb, PUT, 4, TempReg, t1, ArchReg, R_ECX);
-//-- uInstr2(cb, JIFZ, 4, TempReg, t1, Literal, 0);
-//-- uLiteral(cb, eip);
-//-- if (opc =3D=3D 0xE0 || opc =3D=3D 0xE1) { /* LOOPE/LOOPNE *=
/
-//-- jcc_lit(cb, eip, (opc =3D=3D 0xE1 ? CondNZ : CondZ));
-//-- }
-//-- jmp_lit(cb, d32);
-//-- whatNext =3D Dis_StopHere;
-//-- DIP("loop 0x%x\n", d32);
-//-- break;
+ case 0xE0: /* LOOPNE disp8: decrement count, jump if count !=3D 0 && =
ZF=3D=3D0 */
+ case 0xE1: /* LOOPE disp8: decrement count, jump if count !=3D 0 && =
ZF=3D=3D1 */
+ case 0xE2: /* LOOP disp8: decrement count, jump if count !=3D 0 */
+ { /* Again, the docs say this uses ECX/CX as a count depending on
+ the address size override, not the operand one. Since we
+ don't handle address size overrides, I guess that means
+ ECX. */
+ IRExpr* zbit =3D NULL;
+ IRExpr* count =3D NULL;
+ IRExpr* cond =3D NULL;
+ HChar* xtra =3D NULL;
=20
+ if (sz !=3D 4) goto decode_failure;
+ d32 =3D (((Addr32)guest_EIP_bbstart)+delta+1) + getSDisp8(delta);
+ delta++;
+ putIReg(4, R_ECX, binop(Iop_Sub32, getIReg(4,R_ECX), mkU32(1)));
+
+ count =3D getIReg(4,R_ECX);
+ cond =3D binop(Iop_CmpNE32, count, mkU32(0));
+ switch (opc) {
+ case 0xE2:=20
+ xtra =3D "";=20
+ break;
+ case 0xE1:=20
+ xtra =3D "e";=20
+ zbit =3D mk_x86g_calculate_condition( X86CondZ );
+ cond =3D mkAnd1(cond, zbit);
+ break;
+ case 0xE0:=20
+ xtra =3D "ne";
+ zbit =3D mk_x86g_calculate_condition( X86CondNZ );
+ cond =3D mkAnd1(cond, zbit);
+ break;
+ default:
+ vassert(0);
+ }
+ stmt( IRStmt_Exit(cond, Ijk_Boring, IRConst_U32(d32)) );
+
+ DIP("loop%s 0x%x\n", xtra, d32);
+ break;
+ }
+
/* ------------------------ IMUL ----------------------- */
=20
case 0x69: /* IMUL Iv, Ev, Gv */
|
|
From: <sv...@va...> - 2005-08-24 17:36:22
|
Author: sewardj
Date: 2005-08-24 18:36:20 +0100 (Wed, 24 Aug 2005)
New Revision: 1357
Log:
Merge r1352: amd64 BT{,R,S,C} Gv, Ev. Also fix bug in x86 version.
Modified:
branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c
branches/VEX_3_0_BRANCH/priv/guest-x86/toIR.c
Modified: branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c 2005-08-24 17:31:24 U=
TC (rev 1356)
+++ branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c 2005-08-24 17:36:20 U=
TC (rev 1357)
@@ -6478,153 +6478,156 @@
//.. if (amt_is_literal) delta++;
//.. return delta;
//.. }
-//..=20
-//..=20
-//.. /* Handle BT/BTS/BTR/BTC Gv, Ev. Apparently b-size is not
-//.. required. */
-//..=20
-//.. typedef enum { BtOpNone, BtOpSet, BtOpReset, BtOpComp } BtOp;
-//..=20
-//.. static Char* nameBtOp ( BtOp op )
-//.. {
-//.. switch (op) {
-//.. case BtOpNone: return "";
-//.. case BtOpSet: return "s";
-//.. case BtOpReset: return "r";
-//.. case BtOpComp: return "c";
-//.. default: vpanic("nameBtOp(x86)");
-//.. }
-//.. }
-//..=20
-//..=20
-//.. static
-//.. UInt dis_bt_G_E ( UChar sorb, Int sz, Long delta, BtOp op )
-//.. {
-//.. HChar dis_buf[50];
-//.. UChar modrm;
-//.. Int len;
-//.. IRTemp t_fetched, t_bitno0, t_bitno1, t_bitno2, t_addr0,=20
-//.. t_addr1, t_esp, t_mask;
-//..=20
-//.. vassert(sz =3D=3D 2 || sz =3D=3D 4);
-//..=20
-//.. t_fetched =3D t_bitno0 =3D t_bitno1 =3D t_bitno2=20
-//.. =3D t_addr0 =3D t_addr1 =3D t_esp =3D t_mask =3D IRTem=
p_INVALID;
-//..=20
-//.. t_fetched =3D newTemp(Ity_I8);
-//.. t_bitno0 =3D newTemp(Ity_I32);
-//.. t_bitno1 =3D newTemp(Ity_I32);
-//.. t_bitno2 =3D newTemp(Ity_I8);
-//.. t_addr1 =3D newTemp(Ity_I32);
-//.. modrm =3D getUChar(delta);
-//..=20
-//.. assign( t_bitno0, widenUto32(getIReg(sz, gregOfRM(modrm))) );
-//.. =20
-//.. if (epartIsReg(modrm)) {
-//.. delta++;
-//.. /* Get it onto the client's stack. */
-//.. t_esp =3D newTemp(Ity_I32);
-//.. t_addr0 =3D newTemp(Ity_I32);
-//..=20
-//.. assign( t_esp, binop(Iop_Sub32, getIReg(4, R_ESP), mkU32(sz))=
);
-//.. putIReg(4, R_ESP, mkexpr(t_esp));
-//..=20
-//.. storeLE( mkexpr(t_esp), getIReg(sz, eregOfRM(modrm)) );
-//..=20
-//.. /* Make t_addr0 point at it. */
-//.. assign( t_addr0, mkexpr(t_esp) );
-//..=20
-//.. /* Mask out upper bits of the shift amount, since we're doing=
a
-//.. reg. */
-//.. assign( t_bitno1, binop(Iop_And32,=20
-//.. mkexpr(t_bitno0),=20
-//.. mkU32(sz =3D=3D 4 ? 31 : 15)) );
-//..=20
-//.. } else {
-//.. t_addr0 =3D disAMode ( &len, sorb, delta, dis_buf );
-//.. delta +=3D len;
-//.. assign( t_bitno1, mkexpr(t_bitno0) );
-//.. }
-//.. =20
-//.. /* At this point: t_addr0 is the address being operated on. If =
it
-//.. was a reg, we will have pushed it onto the client's stack.
-//.. t_bitno1 is the bit number, suitably masked in the case of a
-//.. reg. */
-//.. =20
-//.. /* Now the main sequence. */
-//.. assign( t_addr1,=20
-//.. binop(Iop_Add32,=20
-//.. mkexpr(t_addr0),=20
-//.. binop(Iop_Sar32, mkexpr(t_bitno1), mkU8(3))) );
-//..=20
-//.. /* t_addr1 now holds effective address */
-//..=20
-//.. assign( t_bitno2,=20
-//.. unop(Iop_32to8,=20
-//.. binop(Iop_And32, mkexpr(t_bitno1), mkU32(7))) );
-//..=20
-//.. /* t_bitno2 contains offset of bit within byte */
-//..=20
-//.. if (op !=3D BtOpNone) {
-//.. t_mask =3D newTemp(Ity_I8);
-//.. assign( t_mask, binop(Iop_Shl8, mkU8(1), mkexpr(t_bitno2)) );
-//.. }
-//..=20
-//.. /* t_mask is now a suitable byte mask */
-//..=20
-//.. assign( t_fetched, loadLE(Ity_I8, mkexpr(t_addr1)) );
-//..=20
-//.. if (op !=3D BtOpNone) {
-//.. switch (op) {
-//.. case BtOpSet:=20
-//.. storeLE( mkexpr(t_addr1),=20
-//.. binop(Iop_Or8, mkexpr(t_fetched),=20
-//.. mkexpr(t_mask)) );
-//.. break;
-//.. case BtOpComp:=20
-//.. storeLE( mkexpr(t_addr1),=20
-//.. binop(Iop_Xor8, mkexpr(t_fetched),=20
-//.. mkexpr(t_mask)) );
-//.. break;
-//.. case BtOpReset:=20
-//.. storeLE( mkexpr(t_addr1),=20
-//.. binop(Iop_And8, mkexpr(t_fetched),=20
-//.. unop(Iop_Not8, mkexpr(t_mask))=
) );
-//.. break;
-//.. default:=20
-//.. vpanic("dis_bt_G_E(x86)");
-//.. }
-//.. }
-//.. =20
-//.. /* Side effect done; now get selected bit into Carry flag */
-//.. /* Flags: C=3Dselected bit, O,S,Z,A,P undefined, so are set to z=
ero. */
-//.. stmt( IRStmt_Put( OFFB_CC_OP, mkU32(X86G_CC_OP_COPY) ));
-//.. stmt( IRStmt_Put( OFFB_CC_DEP2, mkU32(0) ));
-//.. stmt( IRStmt_Put(=20
-//.. OFFB_CC_DEP1,
-//.. binop(Iop_And32,
-//.. binop(Iop_Shr32,=20
-//.. unop(Iop_8Uto32, mkexpr(t_fetched)),
-//.. mkexpr(t_bitno2)),
-//.. mkU32(1)))
-//.. );
-//..=20
-//.. /* Move reg operand from stack back to reg */
-//.. if (epartIsReg(modrm)) {
-//.. /* t_esp still points at it. */
-//.. putIReg(sz, eregOfRM(modrm), loadLE(szToITy(sz), mkexpr(t_esp=
)) );
-//.. putIReg(4, R_ESP, binop(Iop_Add32, mkexpr(t_esp), mkU32(sz)) =
);
-//.. }
-//..=20
-//.. DIP("bt%s%c %s, %s\n",
-//.. nameBtOp(op), nameISize(sz), nameIReg(sz, gregOfRM(modrm)),=20
-//.. ( epartIsReg(modrm) ? nameIReg(sz, eregOfRM(modrm)) : dis_bu=
f ) );
-//.. =20
-//.. return delta;
-//.. }
=20
=20
+/* Handle BT/BTS/BTR/BTC Gv, Ev. Apparently b-size is not
+ required. */
=20
+typedef enum { BtOpNone, BtOpSet, BtOpReset, BtOpComp } BtOp;
+
+static HChar* nameBtOp ( BtOp op )
+{
+ switch (op) {
+ case BtOpNone: return "";
+ case BtOpSet: return "s";
+ case BtOpReset: return "r";
+ case BtOpComp: return "c";
+ default: vpanic("nameBtOp(amd64)");
+ }
+}
+
+
+static
+ULong dis_bt_G_E ( Prefix pfx, Int sz, Long delta, BtOp op )
+{
+ HChar dis_buf[50];
+ UChar modrm;
+ Int len;
+ IRTemp t_fetched, t_bitno0, t_bitno1, t_bitno2, t_addr0,=20
+ t_addr1, t_rsp, t_mask;
+
+ vassert(sz =3D=3D 2 || sz =3D=3D 4 || sz =3D=3D 8);
+
+ t_fetched =3D t_bitno0 =3D t_bitno1 =3D t_bitno2=20
+ =3D t_addr0 =3D t_addr1 =3D t_rsp =3D t_mask =3D IRTemp_INV=
ALID;
+
+ t_fetched =3D newTemp(Ity_I8);
+ t_bitno0 =3D newTemp(Ity_I64);
+ t_bitno1 =3D newTemp(Ity_I64);
+ t_bitno2 =3D newTemp(Ity_I8);
+ t_addr1 =3D newTemp(Ity_I64);
+ modrm =3D getUChar(delta);
+
+ assign( t_bitno0, widenSto64(getIRegG(sz, pfx, modrm)) );
+ =20
+ if (epartIsReg(modrm)) {
+ delta++;
+ /* Get it onto the client's stack. */
+ t_rsp =3D newTemp(Ity_I64);
+ t_addr0 =3D newTemp(Ity_I64);
+
+ assign( t_rsp, binop(Iop_Sub64, getIReg64(R_RSP), mkU64(sz)) );
+ putIReg64(R_RSP, mkexpr(t_rsp));
+
+ storeLE( mkexpr(t_rsp), getIRegE(sz, pfx, modrm) );
+
+ /* Make t_addr0 point at it. */
+ assign( t_addr0, mkexpr(t_rsp) );
+
+ /* Mask out upper bits of the shift amount, since we're doing a
+ reg. */
+ assign( t_bitno1, binop(Iop_And64,=20
+ mkexpr(t_bitno0),=20
+ mkU64(sz =3D=3D 8 ? 63 : sz =3D=3D 4 ? 31 =
: 15)) );
+
+ } else {
+ t_addr0 =3D disAMode ( &len, pfx, delta, dis_buf, 0 );
+ delta +=3D len;
+ assign( t_bitno1, mkexpr(t_bitno0) );
+ }
+ =20
+ /* At this point: t_addr0 is the address being operated on. If it
+ was a reg, we will have pushed it onto the client's stack.
+ t_bitno1 is the bit number, suitably masked in the case of a
+ reg. */
+ =20
+ /* Now the main sequence. */
+ assign( t_addr1,=20
+ binop(Iop_Add64,=20
+ mkexpr(t_addr0),=20
+ binop(Iop_Sar64, mkexpr(t_bitno1), mkU8(3))) );
+
+ /* t_addr1 now holds effective address */
+
+ assign( t_bitno2,=20
+ unop(Iop_64to8,=20
+ binop(Iop_And64, mkexpr(t_bitno1), mkU64(7))) );
+
+ /* t_bitno2 contains offset of bit within byte */
+
+ if (op !=3D BtOpNone) {
+ t_mask =3D newTemp(Ity_I8);
+ assign( t_mask, binop(Iop_Shl8, mkU8(1), mkexpr(t_bitno2)) );
+ }
+
+ /* t_mask is now a suitable byte mask */
+
+ assign( t_fetched, loadLE(Ity_I8, mkexpr(t_addr1)) );
+
+ if (op !=3D BtOpNone) {
+ switch (op) {
+ case BtOpSet:=20
+ storeLE( mkexpr(t_addr1),=20
+ binop(Iop_Or8, mkexpr(t_fetched),=20
+ mkexpr(t_mask)) );
+ break;
+ case BtOpComp:=20
+ storeLE( mkexpr(t_addr1),=20
+ binop(Iop_Xor8, mkexpr(t_fetched),=20
+ mkexpr(t_mask)) );
+ break;
+ case BtOpReset:=20
+ storeLE( mkexpr(t_addr1),=20
+ binop(Iop_And8, mkexpr(t_fetched),=20
+ unop(Iop_Not8, mkexpr(t_mask))) );
+ break;
+ default:=20
+ vpanic("dis_bt_G_E(amd64)");
+ }
+ }
+=20
+ /* Side effect done; now get selected bit into Carry flag */
+ /* Flags: C=3Dselected bit, O,S,Z,A,P undefined, so are set to zero. =
*/
+ stmt( IRStmt_Put( OFFB_CC_OP, mkU64(AMD64G_CC_OP_COPY) ));
+ stmt( IRStmt_Put( OFFB_CC_DEP2, mkU64(0) ));
+ stmt( IRStmt_Put(=20
+ OFFB_CC_DEP1,
+ binop(Iop_And64,
+ binop(Iop_Shr64,=20
+ unop(Iop_8Uto64, mkexpr(t_fetched)),
+ mkexpr(t_bitno2)),
+ mkU64(1)))
+ );
+ /* Set NDEP even though it isn't used. This makes redundant-PUT
+ elimination of previous stores to this field work better. */
+ stmt( IRStmt_Put( OFFB_CC_NDEP, mkU64(0) ));
+
+ /* Move reg operand from stack back to reg */
+ if (epartIsReg(modrm)) {
+ /* t_esp still points at it. */
+ putIRegE(sz, pfx, modrm, loadLE(szToITy(sz), mkexpr(t_rsp)) );
+ putIReg64(R_RSP, binop(Iop_Add64, mkexpr(t_rsp), mkU64(sz)) );
+ }
+
+ DIP("bt%s%c %s, %s\n",
+ nameBtOp(op), nameISize(sz), nameIRegG(sz, pfx, modrm),=20
+ ( epartIsReg(modrm) ? nameIRegE(sz, pfx, modrm) : dis_buf ) );
+=20
+ return delta;
+}
+
+
+
/* Handle BSF/BSR. Only v-size seems necessary. */
static
ULong dis_bs_E_G ( Prefix pfx, Int sz, Long delta, Bool fwds )
@@ -12903,21 +12906,32 @@
goto decode_failure;
}
=20
-//.. /* =3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- BT/BTS/BTR/BTC =3D-=3D=
-=3D-=3D-=3D-=3D-=3D */
-//..=20
-//.. case 0xA3: /* BT Gv,Ev */
-//.. delta =3D dis_bt_G_E ( sorb, sz, delta, BtOpNone );
-//.. break;
-//.. case 0xB3: /* BTR Gv,Ev */
-//.. delta =3D dis_bt_G_E ( sorb, sz, delta, BtOpReset );
-//.. break;
-//.. case 0xAB: /* BTS Gv,Ev */
-//.. delta =3D dis_bt_G_E ( sorb, sz, delta, BtOpSet );
-//.. break;
-//.. case 0xBB: /* BTC Gv,Ev */
-//.. delta =3D dis_bt_G_E ( sorb, sz, delta, BtOpComp );
-//.. break;
+ /* =3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- BT/BTS/BTR/BTC =3D-=3D-=3D=
-=3D-=3D-=3D-=3D */
=20
+ /* All of these are possible at sizes 2, 4 and 8, but until size
+ 2 and 4 test cases show up, only handle size 8. */
+
+ case 0xA3: /* BT Gv,Ev */
+ if (haveF2orF3(pfx)) goto decode_failure;
+ if (sz !=3D 8) goto decode_failure;
+ delta =3D dis_bt_G_E ( pfx, sz, delta, BtOpNone );
+ break;
+ case 0xB3: /* BTR Gv,Ev */
+ if (haveF2orF3(pfx)) goto decode_failure;
+ if (sz !=3D 8) goto decode_failure;
+ delta =3D dis_bt_G_E ( pfx, sz, delta, BtOpReset );
+ break;
+ case 0xAB: /* BTS Gv,Ev */
+ if (haveF2orF3(pfx)) goto decode_failure;
+ if (sz !=3D 8) goto decode_failure;
+ delta =3D dis_bt_G_E ( pfx, sz, delta, BtOpSet );
+ break;
+ case 0xBB: /* BTC Gv,Ev */
+ if (haveF2orF3(pfx)) goto decode_failure;
+ if (sz !=3D 8) goto decode_failure;
+ delta =3D dis_bt_G_E ( pfx, sz, delta, BtOpComp );
+ break;
+
/* =3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- CMOV =3D-=3D-=3D-=3D-=3D-=3D=
-=3D-=3D-=3D-=3D-=3D-=3D */
=20
case 0x40:
Modified: branches/VEX_3_0_BRANCH/priv/guest-x86/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-x86/toIR.c 2005-08-24 17:31:24 UTC=
(rev 1356)
+++ branches/VEX_3_0_BRANCH/priv/guest-x86/toIR.c 2005-08-24 17:36:20 UTC=
(rev 1357)
@@ -5653,7 +5653,7 @@
t_addr1 =3D newTemp(Ity_I32);
modrm =3D getIByte(delta);
=20
- assign( t_bitno0, widenUto32(getIReg(sz, gregOfRM(modrm))) );
+ assign( t_bitno0, widenSto32(getIReg(sz, gregOfRM(modrm))) );
=20
if (epartIsReg(modrm)) {
delta++;
|
|
From: <sv...@va...> - 2005-08-24 17:31:26
|
Author: sewardj
Date: 2005-08-24 18:31:24 +0100 (Wed, 24 Aug 2005)
New Revision: 1356
Log:
Merge r1349 (amd64 LOOPE/LOOPNE implementation)
Modified:
branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c
Modified: branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c 2005-08-24 17:28:27 U=
TC (rev 1355)
+++ branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c 2005-08-24 17:31:24 U=
TC (rev 1356)
@@ -1302,9 +1302,19 @@
return IRExpr_Const(IRConst_V128(mask));
}
=20
+static IRExpr* mkAnd1 ( IRExpr* x, IRExpr* y )
+{
+ vassert(typeOfIRExpr(irbb->tyenv,x) =3D=3D Ity_I1);
+ vassert(typeOfIRExpr(irbb->tyenv,y) =3D=3D Ity_I1);
+ return unop(Iop_64to1,=20
+ binop(Iop_And64,=20
+ unop(Iop_1Uto64,x),=20
+ unop(Iop_1Uto64,y)));
+}
=20
+
/*------------------------------------------------------------*/
-/*--- Helpers for %eflags. ---*/
+/*--- Helpers for %rflags. ---*/
/*------------------------------------------------------------*/
=20
/* -------------- Evaluating the flags-thunk. -------------- */
@@ -11575,45 +11585,47 @@
//..=20
//.. DIP("j%sz 0x%x\n", nameIReg(sz, R_ECX), d32);
//.. break;
-//..=20
-//.. //-- case 0xE0: /* LOOPNE disp8 */
-//.. //-- case 0xE1: /* LOOPE disp8 */
- case 0xE2: /* LOOP disp8 */
- /* The docs say this uses RCX/ECX as a count depending on
- the address size override, not the operand one. Since we
- don't handle address size overrides, I guess that means
- RCX. */
- if (!haveF3(pfx) && !haveF2(pfx) && !have66(pfx) && !haveASO(pfx))=
{
- /* RCX--; if (RCX !=3D 0) goto d64; */
- d64 =3D guest_RIP_curr_instr + getSDisp8(delta) + 2; delta++;
- DIP("loop 0x%llx\n", (ULong)d64);
- putIReg64(R_RCX, binop(Iop_Sub64, getIReg64(R_RCX), mkU64(1)) )=
;
- stmt( IRStmt_Exit(=20
- binop(Iop_CmpNE64,getIReg64(R_RCX),mkU64(0)),=20
- Ijk_Boring,=20
- IRConst_U64(d64)=20
- ));
- dres.whatNext =3D Dis_StopHere;
- irbb->next =3D mkU64(guest_RIP_curr_instr + 2);
- irbb->jumpkind =3D Ijk_Boring;
- break;
+
+ case 0xE0: /* LOOPNE disp8: decrement count, jump if count !=3D 0 && =
ZF=3D=3D0 */
+ case 0xE1: /* LOOPE disp8: decrement count, jump if count !=3D 0 && =
ZF=3D=3D1 */
+ case 0xE2: /* LOOP disp8: decrement count, jump if count !=3D 0 */
+ { /* The docs say this uses rCX as a count depending on the
+ address size override, not the operand one. Since we don't
+ handle address size overrides, I guess that means RCX. */
+ IRExpr* zbit =3D NULL;
+ IRExpr* count =3D NULL;
+ IRExpr* cond =3D NULL;
+ HChar* xtra =3D NULL;
+
+ if (have66orF2orF3(pfx) || haveASO(pfx)) goto decode_failure;
+ d64 =3D guest_RIP_bbstart+delta+1 + getSDisp8(delta);
+ delta++;
+ putIReg64(R_RCX, binop(Iop_Sub64, getIReg64(R_RCX), mkU64(1)));
+
+ count =3D getIReg64(R_RCX);
+ cond =3D binop(Iop_CmpNE64, count, mkU64(0));
+ switch (opc) {
+ case 0xE2:=20
+ xtra =3D "";=20
+ break;
+ case 0xE1:=20
+ xtra =3D "e";=20
+ zbit =3D mk_amd64g_calculate_condition( AMD64CondZ );
+ cond =3D mkAnd1(cond, zbit);
+ break;
+ case 0xE0:=20
+ xtra =3D "ne";
+ zbit =3D mk_amd64g_calculate_condition( AMD64CondNZ );
+ cond =3D mkAnd1(cond, zbit);
+ break;
+ default:
+ vassert(0);
}
- goto decode_failure;
+ stmt( IRStmt_Exit(cond, Ijk_Boring, IRConst_U64(d64)) );
=20
-//.. //-- d32 =3D (eip+1) + getSDisp8(eip); eip++;
-//.. //-- t1 =3D newTemp(cb);
-//.. //-- uInstr2(cb, GET, 4, ArchReg, R_ECX, TempReg, t1);
-//.. //-- uInstr1(cb, DEC, 4, TempReg, t1);
-//.. //-- uInstr2(cb, PUT, 4, TempReg, t1, ArchReg, R_ECX);
-//.. //-- uInstr2(cb, JIFZ, 4, TempReg, t1, Literal, 0);
-//.. //-- uLiteral(cb, eip);
-//.. //-- if (opc =3D=3D 0xE0 || opc =3D=3D 0xE1) { /* LOOPE/LOO=
PNE */
-//.. //-- jcc_lit(cb, eip, (opc =3D=3D 0xE1 ? CondNZ : CondZ));
-//.. //-- }
-//.. //-- jmp_lit(cb, d32);
-//.. //-- whatNext =3D Dis_StopHere;
-//.. //-- DIP("loop 0x%x\n", d32);
-//.. //-- break;
+ DIP("loop%s 0x%llx\n", xtra, d64);
+ break;
+ }
=20
/* ------------------------ IMUL ----------------------- */
=20
|
|
From: <sv...@va...> - 2005-08-24 17:28:42
|
Author: sewardj
Date: 2005-08-24 18:28:27 +0100 (Wed, 24 Aug 2005)
New Revision: 1355
Log:
Merge r1346 (amd64 rdtsc implementation)
Modified:
branches/VEX_3_0_BRANCH/priv/guest-amd64/gdefs.h
branches/VEX_3_0_BRANCH/priv/guest-amd64/ghelpers.c
branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c
Modified: branches/VEX_3_0_BRANCH/priv/guest-amd64/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-amd64/gdefs.h 2005-08-24 17:23:37 =
UTC (rev 1354)
+++ branches/VEX_3_0_BRANCH/priv/guest-amd64/gdefs.h 2005-08-24 17:28:27 =
UTC (rev 1355)
@@ -145,6 +145,8 @@
=20
extern void amd64g_dirtyhelper_CPUID ( VexGuestAMD64State* st );
=20
+extern ULong amd64g_dirtyhelper_RDTSC ( void );
+
//extern void amd64g_dirtyhelper_CPUID_sse0 ( VexGuestAMD64State* );
//extern void amd64g_dirtyhelper_CPUID_sse1 ( VexGuestAMD64State* );
//extern void amd64g_dirtyhelper_CPUID_sse2 ( VexGuestAMD64State* );
Modified: branches/VEX_3_0_BRANCH/priv/guest-amd64/ghelpers.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-amd64/ghelpers.c 2005-08-24 17:23:=
37 UTC (rev 1354)
+++ branches/VEX_3_0_BRANCH/priv/guest-amd64/ghelpers.c 2005-08-24 17:28:=
27 UTC (rev 1355)
@@ -1676,6 +1676,21 @@
}
=20
=20
+/* CALLED FROM GENERATED CODE */
+/* DIRTY HELPER (non-referentially-transparent) */
+/* Horrible hack. On non-amd64 platforms, return 1. */
+ULong amd64g_dirtyhelper_RDTSC ( void )
+{
+# if defined(__x86_64__)
+ UInt eax, edx;
+ __asm__ __volatile__("rdtsc" : "=3Da" (eax), "=3Dd" (edx));
+ return (((ULong)edx) << 32) | ((ULong)eax);
+# else
+ return 1ULL;
+# endif
+}
+
+
/*---------------------------------------------------------------*/
/*--- Helpers for MMX/SSE/SSE2. ---*/
/*---------------------------------------------------------------*/
Modified: branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c 2005-08-24 17:23:37 U=
TC (rev 1354)
+++ branches/VEX_3_0_BRANCH/priv/guest-amd64/toIR.c 2005-08-24 17:28:27 U=
TC (rev 1355)
@@ -13084,35 +13084,24 @@
break;
=20
/* =3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- RDTSC -=3D-=3D-=3D-=3D-=3D=
-=3D-=3D-=3D-=3D-=3D-=3D */
-
- case 0x31: /* RDTSC */
- if (haveF2orF3(pfx)) goto decode_failure;
- if (0) vex_printf("vex amd64->IR: kludged rdtsc\n");
- putIRegRAX(4, mkU32(1));
- putIRegRDX(4, mkU32(0));
-
-//.. //-- t1 =3D newTemp(cb);
-//.. //-- t2 =3D newTemp(cb);
-//.. //-- t3 =3D newTemp(cb);
-//.. //-- uInstr0(cb, CALLM_S, 0);
-//.. //-- // Nb: even though these args aren't used by RDTSC_he=
lper, need
-//.. //-- // them to be defined (for Memcheck). The TempRegs p=
ushed must
-//.. //-- // also be distinct.
-//.. //-- uInstr2(cb, MOV, 4, Literal, 0, TempReg, t1);
-//.. //-- uLiteral(cb, 0);
-//.. //-- uInstr1(cb, PUSH, 4, TempReg, t1);
-//.. //-- uInstr2(cb, MOV, 4, Literal, 0, TempReg, t2);
-//.. //-- uLiteral(cb, 0);
-//.. //-- uInstr1(cb, PUSH, 4, TempReg, t2);
-//.. //-- uInstr1(cb, CALLM, 0, Lit16, VGOFF_(helper_RDTSC));
-//.. //-- uFlagsRWU(cb, FlagsEmpty, FlagsEmpty, FlagsEmpty);
-//.. //-- uInstr1(cb, POP, 4, TempReg, t3);
-//.. //-- uInstr2(cb, PUT, 4, TempReg, t3, ArchReg, R_EDX);
-//.. //-- uInstr1(cb, POP, 4, TempReg, t3);
-//.. //-- uInstr2(cb, PUT, 4, TempReg, t3, ArchReg, R_EAX);
-//.. //-- uInstr0(cb, CALLM_E, 0);
+ case 0x31: { /* RDTSC */
+ IRTemp val =3D newTemp(Ity_I64);
+ IRExpr** args =3D mkIRExprVec_0();
+ IRDirty* d =3D unsafeIRDirty_1_N (=20
+ val,=20
+ 0/*regparms*/,=20
+ "amd64g_dirtyhelper_RDTSC",=20
+ &amd64g_dirtyhelper_RDTSC,=20
+ args=20
+ );
+ if (have66orF2orF3(pfx)) goto decode_failure;
+ /* execute the dirty call, dumping the result in val. */
+ stmt( IRStmt_Dirty(d) );
+ putIRegRDX(4, unop(Iop_64HIto32, mkexpr(val)));
+ putIRegRAX(4, unop(Iop_64to32, mkexpr(val)));
DIP("rdtsc\n");
break;
+ }
=20
//.. /* =3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- PUSH/POP Sreg =3D-=3D=
-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D */
//..=20
|
|
From: <sv...@va...> - 2005-08-24 17:23:45
|
Author: sewardj
Date: 2005-08-24 18:23:37 +0100 (Wed, 24 Aug 2005)
New Revision: 1354
Log:
Merge r1344 (x86 rdtsc implementation)
Modified:
branches/VEX_3_0_BRANCH/priv/guest-x86/gdefs.h
branches/VEX_3_0_BRANCH/priv/guest-x86/ghelpers.c
branches/VEX_3_0_BRANCH/priv/guest-x86/toIR.c
Modified: branches/VEX_3_0_BRANCH/priv/guest-x86/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-x86/gdefs.h 2005-08-24 10:56:01 UT=
C (rev 1353)
+++ branches/VEX_3_0_BRANCH/priv/guest-x86/gdefs.h 2005-08-24 17:23:37 UT=
C (rev 1354)
@@ -148,6 +148,8 @@
extern void x86g_dirtyhelper_FSAVE ( VexGuestX86State*, HWord );
extern void x86g_dirtyhelper_FSTENV ( VexGuestX86State*, HWord );
=20
+extern ULong x86g_dirtyhelper_RDTSC ( void );
+
extern VexEmWarn
x86g_dirtyhelper_FRSTOR ( VexGuestX86State*, HWord );
=20
Modified: branches/VEX_3_0_BRANCH/priv/guest-x86/ghelpers.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-x86/ghelpers.c 2005-08-24 10:56:01=
UTC (rev 1353)
+++ branches/VEX_3_0_BRANCH/priv/guest-x86/ghelpers.c 2005-08-24 17:23:37=
UTC (rev 1354)
@@ -1639,6 +1639,21 @@
=20
=20
/* CALLED FROM GENERATED CODE */
+/* DIRTY HELPER (non-referentially-transparent) */
+/* Horrible hack. On non-x86 platforms, return 1. */
+ULong x86g_dirtyhelper_RDTSC ( void )
+{
+# if defined(__i386__)
+ ULong res;
+ __asm__ __volatile__("rdtsc" : "=3DA" (res));
+ return res;
+# else
+ return 1ULL;
+# endif
+}
+
+
+/* CALLED FROM GENERATED CODE */
/* DIRTY HELPER (modifies guest state) */
/* Claim to be a P55C (Intel Pentium/MMX) */
void x86g_dirtyhelper_CPUID_sse0 ( VexGuestX86State* st )
Modified: branches/VEX_3_0_BRANCH/priv/guest-x86/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VEX_3_0_BRANCH/priv/guest-x86/toIR.c 2005-08-24 10:56:01 UTC=
(rev 1353)
+++ branches/VEX_3_0_BRANCH/priv/guest-x86/toIR.c 2005-08-24 17:23:37 UTC=
(rev 1354)
@@ -11926,35 +11926,24 @@
break;
=20
/* =3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- RDTSC -=3D-=3D-=3D-=3D-=3D=
-=3D-=3D-=3D-=3D-=3D-=3D */
+ case 0x31: { /* RDTSC */
+ IRTemp val =3D newTemp(Ity_I64);
+ IRExpr** args =3D mkIRExprVec_0();
+ IRDirty* d =3D unsafeIRDirty_1_N (=20
+ val,=20
+ 0/*regparms*/,=20
+ "x86g_dirtyhelper_RDTSC",=20
+ &x86g_dirtyhelper_RDTSC,=20
+ args=20
+ );
+ /* execute the dirty call, dumping the result in val. */
+ stmt( IRStmt_Dirty(d) );
+ putIReg(4, R_EDX, unop(Iop_64HIto32, mkexpr(val)));
+ putIReg(4, R_EAX, unop(Iop_64to32, mkexpr(val)));
+ DIP("rdtsc\n");
+ break;
+ }
=20
- case 0x31: /* RDTSC */
- if (0) vex_printf("vex x86->IR: kludged rdtsc\n");
- putIReg(4, R_EAX, mkU32(1));
- putIReg(4, R_EDX, mkU32(0));
-
-//-- t1 =3D newTemp(cb);
-//-- t2 =3D newTemp(cb);
-//-- t3 =3D newTemp(cb);
-//-- uInstr0(cb, CALLM_S, 0);
-//-- // Nb: even though these args aren't used by RDTSC_helper,=
need
-//-- // them to be defined (for Memcheck). The TempRegs pushed=
must
-//-- // also be distinct.
-//-- uInstr2(cb, MOV, 4, Literal, 0, TempReg, t1);
-//-- uLiteral(cb, 0);
-//-- uInstr1(cb, PUSH, 4, TempReg, t1);
-//-- uInstr2(cb, MOV, 4, Literal, 0, TempReg, t2);
-//-- uLiteral(cb, 0);
-//-- uInstr1(cb, PUSH, 4, TempReg, t2);
-//-- uInstr1(cb, CALLM, 0, Lit16, VGOFF_(helper_RDTSC));
-//-- uFlagsRWU(cb, FlagsEmpty, FlagsEmpty, FlagsEmpty);
-//-- uInstr1(cb, POP, 4, TempReg, t3);
-//-- uInstr2(cb, PUT, 4, TempReg, t3, ArchReg, R_EDX);
-//-- uInstr1(cb, POP, 4, TempReg, t3);
-//-- uInstr2(cb, PUT, 4, TempReg, t3, ArchReg, R_EAX);
-//-- uInstr0(cb, CALLM_E, 0);
- DIP("rdtsc\n");
- break;
-
/* =3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- PUSH/POP Sreg =3D-=3D-=3D-=
=3D-=3D-=3D-=3D-=3D-=3D-=3D */
=20
case 0xA1: /* POP %FS */
|
|
From: Julian S. <js...@ac...> - 2005-08-24 16:45:24
|
Greg Great stuff. What is the current state of your port? I have a MacOS 10.4 box to hand and would be interested to try it out. It would be good to have an overview of the state of the port and the directions you are going with it. > * Overall, Valgrind 3.x looks far more portable than 2.x. > I appreciate all of the hard rewriting work; Thanks. Note that there are still a lot of cleanups in progress, and in particular a major overhaul of address space management is in progress. That should help non-Linux OSs a lot. > * Darwin always uses a 64-bit off_t, even on 32-bit architectures. Ok. This sounds fairly harmless. > * dispatch.S should be platform-specific instead of arch-specific. True. > * Some Darwin syscalls take 7 arguments (in particular, mmap() > with 64-bit off_t offset). Valgrind currently provides > arg1..arg6. I don't see any obvious 8-argument syscalls. > Do other architectures define a 7th syscall argument and > just never use it, or do they have a 6 argument max? 6 args is as many as Linux uses, it seems, and that's why the m_syswrap abstractions stop at 6. But clearly that could be extended to 7 with minimal effort. > * Darwin syscalls return a full 64-bit result, even on 32-bit > architectures. In particular, the lseek() syscall returns > a 64-bit off_t in registers r3 and r4. I think the m_syswrap abstractions should be able to hide that OK. > * Darwin/PPC syscalls indicate success and failure in an unusual > way: successful calls and failed calls return to different > points. A syscall call usually looks like this: > > // ...set up parameters here... > sc // make the syscall > b BAD // failed calls return here > GOOD: > nop // successful calls return here > // ...handle success case here... > blr > BAD: > // ...handle failure case here... > blr So you're saying that after sc, execution continues either at CIA+4 or CIA+8 depending on outcome. Right? > Handling this in VEX might be more difficult, because VEX > might need to know that `sc` looks like a conditional branch > in basic block analysis. Probably pretty harmless. There's all sorts of tricks that can be played. I think it's a non-problem. J |
|
From: Nicholas N. <nj...@cs...> - 2005-08-24 14:40:35
|
On Wed, 24 Aug 2005, Dirk Mueller wrote:
> On Wednesday 24 August 2005 15:56, sv...@va... wrote:
>
>> * Linux PRE(sys_umount) doesn't print ARG2.
>
> this fails if sys_umount (not sys_umount2) is actually used.
What do you mean by "fails"? What should it be?
> also we don't check sys_umount2's 2nd argument for definedness..
Are you sure?
PRE(sys_umount)
{
PRINT("sys_umount( %p, %d )", ARG1, ARG2);
PRE_REG_READ2(long, "umount2", char *, path, int, flags);
PRE_MEM_RASCIIZ( "umount2(path)", ARG1);
}
The PRE_REG_READ2 call checks both args.
N
|
|
From: Dirk M. <dm...@gm...> - 2005-08-24 14:26:39
|
On Wednesday 24 August 2005 15:56, sv...@va... wrote: > * Linux PRE(sys_umount) doesn't print ARG2. this fails if sys_umount (not sys_umount2) is actually used. also we don't check sys_umount2's 2nd argument for definedness.. |
|
From: Nicholas N. <nj...@cs...> - 2005-08-24 14:07:47
|
On Wed, 24 Aug 2005, Greg Parker wrote: > Some notes about porting Valgrind 3.x to Mac OS X / PowerPC: > > * Darwin always uses a 64-bit off_t, even on 32-bit architectures. > > * dispatch.S should be platform-specific instead of arch-specific. > > * Some Darwin syscalls take 7 arguments > > * Darwin syscalls return a full 64-bit result, even on 32-bit > architectures. > > * Darwin/PPC syscalls indicate success and failure in an unusual > way: This is all good stuff. You must be handling these things in your port if you are running real programs, right? It would be good to see your port code to see how you are handling these. N |
|
From: Nicholas N. <nj...@cs...> - 2005-08-24 14:03:07
|
On Wed, 24 Aug 2005, Greg Parker wrote: > I examined Valgrind's generic syscall wrappers and compared them to > Darwin / Mac OS X's syscall list. The list should give us a better > idea of which syscall wrappers are actually generic and which should > be Linux-specific instead. Thank you! This is great. I appreciate how boring this must have been... there are so many syscalls and going through them systematically is a real pain. > The wrappers are divided into four classes: > * Truly generic. There is a Darwin syscall that matches the Linux > syscall, and Valgrind's wrapper will probably work for both. > These should stay in syswrap-generic.c yes > * Unused on Darwin but generic. There is no Darwin syscall that > will use this wrapper, but the wrapper compiles without error. > These should stay in syswrap-generic.c if they are useful for > FreeBSD or Solaris or something. yes > * Unused on Darwin and not generic. There is no Darwin syscall > that will use this wrapper, and the wrapper does not compile. > Usually these fail because of a Linux-specific type that is > missing. These could move to syswrap-linux.c, or they could > stay in syswrap-generic.c and Darwin could provide dummy vki > definitions for the types. They should go in syswrap-linux.c. > * Not generic. Darwin has a syscall that is similar to Linux, > but the wrapper implementations will differ. Usually these > fail because the syscall parameter lists are different. These should be moved to syswrap-linux.c also. > I looked at the valgrind-3 tree checked out as of a few days ago. > My analysis was brief and not 100% precise, but these results > should be correct for most cases. None of the wrappers currently > in syswrap-*linux.c looked applicable to Darwin. > > > # The following groups of syscalls are mostly not generic > # and should be handled en masse: > *16 > *xattr > clock_* > mq_* > msg* > rt_sig* > sched_* > sig* > timer_* Some of these you have in the "unused but generic" list below: > # Unused but generic - probably keep in syscall-generic.c > ... > getegid16 > getgid16 > ... > llistxattr > lremovexattr > lsetxattr > mq_unlink > ... > rt_sigaction > rt_sigpending > ... > sched_get_priority_max > sched_get_priority_min is that just a mistake? They look like they should be in syswrap-linux.c. I'll try to find time to start moving the Linux-specific ones out of syswrap-generic.c into syswrap-linux.c, although patience would be appreciated :) Can you post a full list of the Darwin syscalls for comparison? (The contents of vki_unistd.h would suffice.) And remind me -- is your code visible somewhere? N |
|
From: <sv...@va...> - 2005-08-24 13:57:51
|
Author: njn
Date: 2005-08-24 14:57:50 +0100 (Wed, 24 Aug 2005)
New Revision: 4488
Log:
update
Modified:
trunk/docs/internals/3_0_BUGSTATUS.txt
Modified: trunk/docs/internals/3_0_BUGSTATUS.txt
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/docs/internals/3_0_BUGSTATUS.txt 2005-08-24 13:55:59 UTC (rev 4=
487)
+++ trunk/docs/internals/3_0_BUGSTATUS.txt 2005-08-24 13:57:50 UTC (rev 4=
488)
@@ -419,3 +419,10 @@
1353 (amd64 adc/sbb flags thunk fix)
FIXED-30BRANCH: TODO
=20
+----------------------------------------------------------------
+
+not-in-bugzilla minor umount/fcntl wrapper fixes
+
+FIXED-TRUNK: 4487
+FIXED-30BRANCH: TODO
+
|
|
From: <sv...@va...> - 2005-08-24 13:56:03
|
Author: njn
Date: 2005-08-24 14:55:59 +0100 (Wed, 24 Aug 2005)
New Revision: 4487
Log:
Minor fixes for problems pointed out by Greg Parker:
* The wrapper for fcntl(F_SETOWN) and fcntl(F_SETSIG) ignores ARG3,
but should not.
* Linux PRE(sys_umount) doesn't print ARG2.
Modified:
trunk/coregrind/m_syswrap/syswrap-generic.c
trunk/coregrind/m_syswrap/syswrap-linux.c
Modified: trunk/coregrind/m_syswrap/syswrap-generic.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_syswrap/syswrap-generic.c 2005-08-24 10:57:09 UTC (=
rev 4486)
+++ trunk/coregrind/m_syswrap/syswrap-generic.c 2005-08-24 13:55:59 UTC (=
rev 4487)
@@ -2600,9 +2600,7 @@
case VKI_F_GETFD:
case VKI_F_GETFL:
case VKI_F_GETOWN:
- case VKI_F_SETOWN:
case VKI_F_GETSIG:
- case VKI_F_SETSIG:
case VKI_F_GETLEASE:
PRINT("sys_fcntl ( %d, %d )", ARG1,ARG2);
PRE_REG_READ2(long, "fcntl", unsigned int, fd, unsigned int, cmd);
@@ -2614,6 +2612,8 @@
case VKI_F_SETFL:
case VKI_F_SETLEASE:
case VKI_F_NOTIFY:
+ case VKI_F_SETOWN:
+ case VKI_F_SETSIG:
PRINT("sys_fcntl[ARG3=3D=3D'arg'] ( %d, %d, %d )", ARG1,ARG2,ARG3)=
;
PRE_REG_READ3(long, "fcntl",
unsigned int, fd, unsigned int, cmd, unsigned long, =
arg);
Modified: trunk/coregrind/m_syswrap/syswrap-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_syswrap/syswrap-linux.c 2005-08-24 10:57:09 UTC (re=
v 4486)
+++ trunk/coregrind/m_syswrap/syswrap-linux.c 2005-08-24 13:55:59 UTC (re=
v 4487)
@@ -168,7 +168,7 @@
=20
PRE(sys_umount)
{
- PRINT("sys_umount( %p )", ARG1);
+ PRINT("sys_umount( %p, %d )", ARG1, ARG2);
PRE_REG_READ2(long, "umount2", char *, path, int, flags);
PRE_MEM_RASCIIZ( "umount2(path)", ARG1);
}
|
|
From: Nicholas N. <nj...@cs...> - 2005-08-24 13:51:25
|
On Wed, 24 Aug 2005, Greg Parker wrote: > Some potential minor syscall wrapper bugs that I saw while > comparing the syscalls to Darwin: > > * The wrapper for fcntl(F_SETOWN) and fcntl(F_SETSIG) ignore ARG3, > but should not. > > * Linux PRE(sys_umount) doesn't print ARG2. I've fixed these two, thanks. > * PRE(sys_select) does in fact sanity-check too little memory for > each of the fd_sets (it misses the last n%8 valid bits.) The > comment there may indicate that someone already knows about this. Yes. As you say, select can read any number of bits from the final byte, and we don't have that level of granularity. I've previously suggested rounding up in this case, but there was disagreement due to the possibility of false positives. N |
|
From: <sv...@va...> - 2005-08-24 10:57:14
|
Author: sewardj Date: 2005-08-24 11:57:09 +0100 (Wed, 24 Aug 2005) New Revision: 4486 Log: Update. Modified: trunk/docs/internals/3_0_BUGSTATUS.txt Modified: trunk/docs/internals/3_0_BUGSTATUS.txt =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/docs/internals/3_0_BUGSTATUS.txt 2005-08-24 10:02:57 UTC (rev 4= 485) +++ trunk/docs/internals/3_0_BUGSTATUS.txt 2005-08-24 10:57:09 UTC (rev 4= 486) @@ -358,7 +358,7 @@ =20 110898 opteron instructions missing: btq sbbq btsq btrq bsfq =20 -FIXED-TRUNK: TODO +FIXED-TRUNK: 1352 FIXED-30BRANCH: TODO =20 ---------------------------------------------------------------- @@ -415,6 +415,7 @@ =20 not-in-bugzilla vex x86->IR: unhandled instruction bytes: 0x14 0x0 =20 -FIXED-TRUNK: 1350 (basic fix), 1351 (x86 adc/sbb flags thunk fix) +FIXED-TRUNK: 1350 (basic fix), 1351 (x86 adc/sbb flags thunk fix), + 1353 (amd64 adc/sbb flags thunk fix) FIXED-30BRANCH: TODO =20 |
|
From: <sv...@va...> - 2005-08-24 10:56:10
|
Author: sewardj
Date: 2005-08-24 11:56:01 +0100 (Wed, 24 Aug 2005)
New Revision: 1353
Log:
Build rflag thunk for adc/sbb correctly.
Modified:
trunk/priv/guest-amd64/toIR.c
Modified: trunk/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-amd64/toIR.c 2005-08-24 10:46:19 UTC (rev 1352)
+++ trunk/priv/guest-amd64/toIR.c 2005-08-24 10:56:01 UTC (rev 1353)
@@ -53,12 +53,11 @@
disInstr for details.
*/
=20
-//.. /* TODO:
-//..=20
-//.. check flag settings for cmpxchg
-//.. FUCOMI(P): what happens to A and S flags? Currently are forced
-//.. to zero.
-//..=20
+/* TODO:
+
+ All Puts to CC_OP/CC_DEP1/CC_DEP2/CC_NDEP should really be checked
+ to ensure a 64-bit value is being written.
+
//.. x87 FP Limitations:
//..=20
//.. * all arithmetic done at 64 bits
@@ -91,7 +90,8 @@
//.. bit be set by PUSHF.
//..=20
//.. This module uses global variables and so is not MT-safe (if that
-//.. should ever become relevant). */
+//.. should ever become relevant).
+*/
=20
/* Translates AMD64 code to IR. */
=20
@@ -1685,9 +1685,9 @@
mkexpr(oldcn)) );
=20
stmt( IRStmt_Put( OFFB_CC_OP, mkU64(thunkOp) ) );
- stmt( IRStmt_Put( OFFB_CC_DEP1, mkexpr(ta1) ) );
- stmt( IRStmt_Put( OFFB_CC_DEP2, binop(xor, mkexpr(ta2),=20
- mkexpr(oldcn)) ) );
+ stmt( IRStmt_Put( OFFB_CC_DEP1, widenUto64(mkexpr(ta1)) ));
+ stmt( IRStmt_Put( OFFB_CC_DEP2, widenUto64(binop(xor, mkexpr(ta2),=20
+ mkexpr(oldcn)) =
)) );
stmt( IRStmt_Put( OFFB_CC_NDEP, mkexpr(oldc) ) );
}
=20
@@ -1725,9 +1725,9 @@
mkexpr(oldcn)) );
=20
stmt( IRStmt_Put( OFFB_CC_OP, mkU64(thunkOp) ) );
- stmt( IRStmt_Put( OFFB_CC_DEP1, mkexpr(ta1) ) );
- stmt( IRStmt_Put( OFFB_CC_DEP2, binop(xor, mkexpr(ta2),=20
- mkexpr(oldcn)) ) );
+ stmt( IRStmt_Put( OFFB_CC_DEP1, widenUto64(mkexpr(ta1) )) );
+ stmt( IRStmt_Put( OFFB_CC_DEP2, widenUto64(binop(xor, mkexpr(ta2),=20
+ mkexpr(oldcn)) =
)) );
stmt( IRStmt_Put( OFFB_CC_NDEP, mkexpr(oldc) ) );
}
=20
|
|
From: <sv...@va...> - 2005-08-24 10:46:31
|
Author: sewardj
Date: 2005-08-24 11:46:19 +0100 (Wed, 24 Aug 2005)
New Revision: 1352
Log:
amd64: Handle BT/BTS/BTR/BTC Gv, Ev.
x86: Fix signedness bug in existing BT/BTS/BTR/BTC Gv, Ev code.
Modified:
trunk/priv/guest-amd64/toIR.c
trunk/priv/guest-x86/toIR.c
Modified: trunk/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-amd64/toIR.c 2005-08-24 10:01:36 UTC (rev 1351)
+++ trunk/priv/guest-amd64/toIR.c 2005-08-24 10:46:19 UTC (rev 1352)
@@ -6480,153 +6480,156 @@
//.. if (amt_is_literal) delta++;
//.. return delta;
//.. }
-//..=20
-//..=20
-//.. /* Handle BT/BTS/BTR/BTC Gv, Ev. Apparently b-size is not
-//.. required. */
-//..=20
-//.. typedef enum { BtOpNone, BtOpSet, BtOpReset, BtOpComp } BtOp;
-//..=20
-//.. static Char* nameBtOp ( BtOp op )
-//.. {
-//.. switch (op) {
-//.. case BtOpNone: return "";
-//.. case BtOpSet: return "s";
-//.. case BtOpReset: return "r";
-//.. case BtOpComp: return "c";
-//.. default: vpanic("nameBtOp(x86)");
-//.. }
-//.. }
-//..=20
-//..=20
-//.. static
-//.. UInt dis_bt_G_E ( UChar sorb, Int sz, Long delta, BtOp op )
-//.. {
-//.. HChar dis_buf[50];
-//.. UChar modrm;
-//.. Int len;
-//.. IRTemp t_fetched, t_bitno0, t_bitno1, t_bitno2, t_addr0,=20
-//.. t_addr1, t_esp, t_mask;
-//..=20
-//.. vassert(sz =3D=3D 2 || sz =3D=3D 4);
-//..=20
-//.. t_fetched =3D t_bitno0 =3D t_bitno1 =3D t_bitno2=20
-//.. =3D t_addr0 =3D t_addr1 =3D t_esp =3D t_mask =3D IRTem=
p_INVALID;
-//..=20
-//.. t_fetched =3D newTemp(Ity_I8);
-//.. t_bitno0 =3D newTemp(Ity_I32);
-//.. t_bitno1 =3D newTemp(Ity_I32);
-//.. t_bitno2 =3D newTemp(Ity_I8);
-//.. t_addr1 =3D newTemp(Ity_I32);
-//.. modrm =3D getUChar(delta);
-//..=20
-//.. assign( t_bitno0, widenUto32(getIReg(sz, gregOfRM(modrm))) );
-//.. =20
-//.. if (epartIsReg(modrm)) {
-//.. delta++;
-//.. /* Get it onto the client's stack. */
-//.. t_esp =3D newTemp(Ity_I32);
-//.. t_addr0 =3D newTemp(Ity_I32);
-//..=20
-//.. assign( t_esp, binop(Iop_Sub32, getIReg(4, R_ESP), mkU32(sz))=
);
-//.. putIReg(4, R_ESP, mkexpr(t_esp));
-//..=20
-//.. storeLE( mkexpr(t_esp), getIReg(sz, eregOfRM(modrm)) );
-//..=20
-//.. /* Make t_addr0 point at it. */
-//.. assign( t_addr0, mkexpr(t_esp) );
-//..=20
-//.. /* Mask out upper bits of the shift amount, since we're doing=
a
-//.. reg. */
-//.. assign( t_bitno1, binop(Iop_And32,=20
-//.. mkexpr(t_bitno0),=20
-//.. mkU32(sz =3D=3D 4 ? 31 : 15)) );
-//..=20
-//.. } else {
-//.. t_addr0 =3D disAMode ( &len, sorb, delta, dis_buf );
-//.. delta +=3D len;
-//.. assign( t_bitno1, mkexpr(t_bitno0) );
-//.. }
-//.. =20
-//.. /* At this point: t_addr0 is the address being operated on. If =
it
-//.. was a reg, we will have pushed it onto the client's stack.
-//.. t_bitno1 is the bit number, suitably masked in the case of a
-//.. reg. */
-//.. =20
-//.. /* Now the main sequence. */
-//.. assign( t_addr1,=20
-//.. binop(Iop_Add32,=20
-//.. mkexpr(t_addr0),=20
-//.. binop(Iop_Sar32, mkexpr(t_bitno1), mkU8(3))) );
-//..=20
-//.. /* t_addr1 now holds effective address */
-//..=20
-//.. assign( t_bitno2,=20
-//.. unop(Iop_32to8,=20
-//.. binop(Iop_And32, mkexpr(t_bitno1), mkU32(7))) );
-//..=20
-//.. /* t_bitno2 contains offset of bit within byte */
-//..=20
-//.. if (op !=3D BtOpNone) {
-//.. t_mask =3D newTemp(Ity_I8);
-//.. assign( t_mask, binop(Iop_Shl8, mkU8(1), mkexpr(t_bitno2)) );
-//.. }
-//..=20
-//.. /* t_mask is now a suitable byte mask */
-//..=20
-//.. assign( t_fetched, loadLE(Ity_I8, mkexpr(t_addr1)) );
-//..=20
-//.. if (op !=3D BtOpNone) {
-//.. switch (op) {
-//.. case BtOpSet:=20
-//.. storeLE( mkexpr(t_addr1),=20
-//.. binop(Iop_Or8, mkexpr(t_fetched),=20
-//.. mkexpr(t_mask)) );
-//.. break;
-//.. case BtOpComp:=20
-//.. storeLE( mkexpr(t_addr1),=20
-//.. binop(Iop_Xor8, mkexpr(t_fetched),=20
-//.. mkexpr(t_mask)) );
-//.. break;
-//.. case BtOpReset:=20
-//.. storeLE( mkexpr(t_addr1),=20
-//.. binop(Iop_And8, mkexpr(t_fetched),=20
-//.. unop(Iop_Not8, mkexpr(t_mask))=
) );
-//.. break;
-//.. default:=20
-//.. vpanic("dis_bt_G_E(x86)");
-//.. }
-//.. }
-//.. =20
-//.. /* Side effect done; now get selected bit into Carry flag */
-//.. /* Flags: C=3Dselected bit, O,S,Z,A,P undefined, so are set to z=
ero. */
-//.. stmt( IRStmt_Put( OFFB_CC_OP, mkU32(X86G_CC_OP_COPY) ));
-//.. stmt( IRStmt_Put( OFFB_CC_DEP2, mkU32(0) ));
-//.. stmt( IRStmt_Put(=20
-//.. OFFB_CC_DEP1,
-//.. binop(Iop_And32,
-//.. binop(Iop_Shr32,=20
-//.. unop(Iop_8Uto32, mkexpr(t_fetched)),
-//.. mkexpr(t_bitno2)),
-//.. mkU32(1)))
-//.. );
-//..=20
-//.. /* Move reg operand from stack back to reg */
-//.. if (epartIsReg(modrm)) {
-//.. /* t_esp still points at it. */
-//.. putIReg(sz, eregOfRM(modrm), loadLE(szToITy(sz), mkexpr(t_esp=
)) );
-//.. putIReg(4, R_ESP, binop(Iop_Add32, mkexpr(t_esp), mkU32(sz)) =
);
-//.. }
-//..=20
-//.. DIP("bt%s%c %s, %s\n",
-//.. nameBtOp(op), nameISize(sz), nameIReg(sz, gregOfRM(modrm)),=20
-//.. ( epartIsReg(modrm) ? nameIReg(sz, eregOfRM(modrm)) : dis_bu=
f ) );
-//.. =20
-//.. return delta;
-//.. }
=20
=20
+/* Handle BT/BTS/BTR/BTC Gv, Ev. Apparently b-size is not
+ required. */
=20
+typedef enum { BtOpNone, BtOpSet, BtOpReset, BtOpComp } BtOp;
+
+static HChar* nameBtOp ( BtOp op )
+{
+ switch (op) {
+ case BtOpNone: return "";
+ case BtOpSet: return "s";
+ case BtOpReset: return "r";
+ case BtOpComp: return "c";
+ default: vpanic("nameBtOp(amd64)");
+ }
+}
+
+
+static
+ULong dis_bt_G_E ( Prefix pfx, Int sz, Long delta, BtOp op )
+{
+ HChar dis_buf[50];
+ UChar modrm;
+ Int len;
+ IRTemp t_fetched, t_bitno0, t_bitno1, t_bitno2, t_addr0,=20
+ t_addr1, t_rsp, t_mask;
+
+ vassert(sz =3D=3D 2 || sz =3D=3D 4 || sz =3D=3D 8);
+
+ t_fetched =3D t_bitno0 =3D t_bitno1 =3D t_bitno2=20
+ =3D t_addr0 =3D t_addr1 =3D t_rsp =3D t_mask =3D IRTemp_INV=
ALID;
+
+ t_fetched =3D newTemp(Ity_I8);
+ t_bitno0 =3D newTemp(Ity_I64);
+ t_bitno1 =3D newTemp(Ity_I64);
+ t_bitno2 =3D newTemp(Ity_I8);
+ t_addr1 =3D newTemp(Ity_I64);
+ modrm =3D getUChar(delta);
+
+ assign( t_bitno0, widenSto64(getIRegG(sz, pfx, modrm)) );
+ =20
+ if (epartIsReg(modrm)) {
+ delta++;
+ /* Get it onto the client's stack. */
+ t_rsp =3D newTemp(Ity_I64);
+ t_addr0 =3D newTemp(Ity_I64);
+
+ assign( t_rsp, binop(Iop_Sub64, getIReg64(R_RSP), mkU64(sz)) );
+ putIReg64(R_RSP, mkexpr(t_rsp));
+
+ storeLE( mkexpr(t_rsp), getIRegE(sz, pfx, modrm) );
+
+ /* Make t_addr0 point at it. */
+ assign( t_addr0, mkexpr(t_rsp) );
+
+ /* Mask out upper bits of the shift amount, since we're doing a
+ reg. */
+ assign( t_bitno1, binop(Iop_And64,=20
+ mkexpr(t_bitno0),=20
+ mkU64(sz =3D=3D 8 ? 63 : sz =3D=3D 4 ? 31 =
: 15)) );
+
+ } else {
+ t_addr0 =3D disAMode ( &len, pfx, delta, dis_buf, 0 );
+ delta +=3D len;
+ assign( t_bitno1, mkexpr(t_bitno0) );
+ }
+ =20
+ /* At this point: t_addr0 is the address being operated on. If it
+ was a reg, we will have pushed it onto the client's stack.
+ t_bitno1 is the bit number, suitably masked in the case of a
+ reg. */
+ =20
+ /* Now the main sequence. */
+ assign( t_addr1,=20
+ binop(Iop_Add64,=20
+ mkexpr(t_addr0),=20
+ binop(Iop_Sar64, mkexpr(t_bitno1), mkU8(3))) );
+
+ /* t_addr1 now holds effective address */
+
+ assign( t_bitno2,=20
+ unop(Iop_64to8,=20
+ binop(Iop_And64, mkexpr(t_bitno1), mkU64(7))) );
+
+ /* t_bitno2 contains offset of bit within byte */
+
+ if (op !=3D BtOpNone) {
+ t_mask =3D newTemp(Ity_I8);
+ assign( t_mask, binop(Iop_Shl8, mkU8(1), mkexpr(t_bitno2)) );
+ }
+
+ /* t_mask is now a suitable byte mask */
+
+ assign( t_fetched, loadLE(Ity_I8, mkexpr(t_addr1)) );
+
+ if (op !=3D BtOpNone) {
+ switch (op) {
+ case BtOpSet:=20
+ storeLE( mkexpr(t_addr1),=20
+ binop(Iop_Or8, mkexpr(t_fetched),=20
+ mkexpr(t_mask)) );
+ break;
+ case BtOpComp:=20
+ storeLE( mkexpr(t_addr1),=20
+ binop(Iop_Xor8, mkexpr(t_fetched),=20
+ mkexpr(t_mask)) );
+ break;
+ case BtOpReset:=20
+ storeLE( mkexpr(t_addr1),=20
+ binop(Iop_And8, mkexpr(t_fetched),=20
+ unop(Iop_Not8, mkexpr(t_mask))) );
+ break;
+ default:=20
+ vpanic("dis_bt_G_E(amd64)");
+ }
+ }
+=20
+ /* Side effect done; now get selected bit into Carry flag */
+ /* Flags: C=3Dselected bit, O,S,Z,A,P undefined, so are set to zero. =
*/
+ stmt( IRStmt_Put( OFFB_CC_OP, mkU64(AMD64G_CC_OP_COPY) ));
+ stmt( IRStmt_Put( OFFB_CC_DEP2, mkU64(0) ));
+ stmt( IRStmt_Put(=20
+ OFFB_CC_DEP1,
+ binop(Iop_And64,
+ binop(Iop_Shr64,=20
+ unop(Iop_8Uto64, mkexpr(t_fetched)),
+ mkexpr(t_bitno2)),
+ mkU64(1)))
+ );
+ /* Set NDEP even though it isn't used. This makes redundant-PUT
+ elimination of previous stores to this field work better. */
+ stmt( IRStmt_Put( OFFB_CC_NDEP, mkU64(0) ));
+
+ /* Move reg operand from stack back to reg */
+ if (epartIsReg(modrm)) {
+ /* t_esp still points at it. */
+ putIRegE(sz, pfx, modrm, loadLE(szToITy(sz), mkexpr(t_rsp)) );
+ putIReg64(R_RSP, binop(Iop_Add64, mkexpr(t_rsp), mkU64(sz)) );
+ }
+
+ DIP("bt%s%c %s, %s\n",
+ nameBtOp(op), nameISize(sz), nameIRegG(sz, pfx, modrm),=20
+ ( epartIsReg(modrm) ? nameIRegE(sz, pfx, modrm) : dis_buf ) );
+=20
+ return delta;
+}
+
+
+
/* Handle BSF/BSR. Only v-size seems necessary. */
static
ULong dis_bs_E_G ( Prefix pfx, Int sz, Long delta, Bool fwds )
@@ -12905,21 +12908,32 @@
goto decode_failure;
}
=20
-//.. /* =3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- BT/BTS/BTR/BTC =3D-=3D=
-=3D-=3D-=3D-=3D-=3D */
-//..=20
-//.. case 0xA3: /* BT Gv,Ev */
-//.. delta =3D dis_bt_G_E ( sorb, sz, delta, BtOpNone );
-//.. break;
-//.. case 0xB3: /* BTR Gv,Ev */
-//.. delta =3D dis_bt_G_E ( sorb, sz, delta, BtOpReset );
-//.. break;
-//.. case 0xAB: /* BTS Gv,Ev */
-//.. delta =3D dis_bt_G_E ( sorb, sz, delta, BtOpSet );
-//.. break;
-//.. case 0xBB: /* BTC Gv,Ev */
-//.. delta =3D dis_bt_G_E ( sorb, sz, delta, BtOpComp );
-//.. break;
+ /* =3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- BT/BTS/BTR/BTC =3D-=3D-=3D=
-=3D-=3D-=3D-=3D */
=20
+ /* All of these are possible at sizes 2, 4 and 8, but until size
+ 2 and 4 test cases show up, only handle size 8. */
+
+ case 0xA3: /* BT Gv,Ev */
+ if (haveF2orF3(pfx)) goto decode_failure;
+ if (sz !=3D 8) goto decode_failure;
+ delta =3D dis_bt_G_E ( pfx, sz, delta, BtOpNone );
+ break;
+ case 0xB3: /* BTR Gv,Ev */
+ if (haveF2orF3(pfx)) goto decode_failure;
+ if (sz !=3D 8) goto decode_failure;
+ delta =3D dis_bt_G_E ( pfx, sz, delta, BtOpReset );
+ break;
+ case 0xAB: /* BTS Gv,Ev */
+ if (haveF2orF3(pfx)) goto decode_failure;
+ if (sz !=3D 8) goto decode_failure;
+ delta =3D dis_bt_G_E ( pfx, sz, delta, BtOpSet );
+ break;
+ case 0xBB: /* BTC Gv,Ev */
+ if (haveF2orF3(pfx)) goto decode_failure;
+ if (sz !=3D 8) goto decode_failure;
+ delta =3D dis_bt_G_E ( pfx, sz, delta, BtOpComp );
+ break;
+
/* =3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- CMOV =3D-=3D-=3D-=3D-=3D-=3D=
-=3D-=3D-=3D-=3D-=3D-=3D */
=20
case 0x40:
Modified: trunk/priv/guest-x86/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-x86/toIR.c 2005-08-24 10:01:36 UTC (rev 1351)
+++ trunk/priv/guest-x86/toIR.c 2005-08-24 10:46:19 UTC (rev 1352)
@@ -5679,7 +5679,7 @@
t_addr1 =3D newTemp(Ity_I32);
modrm =3D getIByte(delta);
=20
- assign( t_bitno0, widenUto32(getIReg(sz, gregOfRM(modrm))) );
+ assign( t_bitno0, widenSto32(getIReg(sz, gregOfRM(modrm))) );
=20
if (epartIsReg(modrm)) {
delta++;
|
|
From: <sv...@va...> - 2005-08-24 10:02:59
|
Author: sewardj Date: 2005-08-24 11:02:57 +0100 (Wed, 24 Aug 2005) New Revision: 4485 Log: Update. Modified: trunk/docs/internals/3_0_BUGSTATUS.txt Modified: trunk/docs/internals/3_0_BUGSTATUS.txt =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/docs/internals/3_0_BUGSTATUS.txt 2005-08-24 01:56:15 UTC (rev 4= 484) +++ trunk/docs/internals/3_0_BUGSTATUS.txt 2005-08-24 10:02:57 UTC (rev 4= 485) @@ -411,3 +411,10 @@ FIXED-TRUNK: 4476 FIXED-30BRANCH: TODO =20 +---------------------------------------------------------------- + +not-in-bugzilla vex x86->IR: unhandled instruction bytes: 0x14 0x0 + +FIXED-TRUNK: 1350 (basic fix), 1351 (x86 adc/sbb flags thunk fix) +FIXED-30BRANCH: TODO + |
|
From: <sv...@va...> - 2005-08-24 10:01:38
|
Author: sewardj
Date: 2005-08-24 11:01:36 +0100 (Wed, 24 Aug 2005)
New Revision: 1351
Log:
Fix incorrect building of the flags thunk after ADC and SBB.
Modified:
trunk/priv/guest-x86/toIR.c
Modified: trunk/priv/guest-x86/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-x86/toIR.c 2005-08-24 09:22:39 UTC (rev 1350)
+++ trunk/priv/guest-x86/toIR.c 2005-08-24 10:01:36 UTC (rev 1351)
@@ -46,7 +46,9 @@
=20
/* TODO:
=20
- check flag settings for cmpxchg
+ All Puts to CC_OP/CC_DEP1/CC_DEP2/CC_NDEP should really be checked
+ to ensure a 32-bit value is being written.
+
FUCOMI(P): what happens to A and S flags? Currently are forced
to zero.
=20
@@ -1036,9 +1038,9 @@
mkexpr(oldcn)) );
=20
stmt( IRStmt_Put( OFFB_CC_OP, mkU32(thunkOp) ) );
- stmt( IRStmt_Put( OFFB_CC_DEP1, mkexpr(ta1) ) );
- stmt( IRStmt_Put( OFFB_CC_DEP2, binop(xor, mkexpr(ta2),=20
- mkexpr(oldcn)) ) );
+ stmt( IRStmt_Put( OFFB_CC_DEP1, widenUto32(mkexpr(ta1)) ));
+ stmt( IRStmt_Put( OFFB_CC_DEP2, widenUto32(binop(xor, mkexpr(ta2),=20
+ mkexpr(oldcn)) =
)) );
stmt( IRStmt_Put( OFFB_CC_NDEP, mkexpr(oldc) ) );
}
=20
@@ -1072,9 +1074,9 @@
mkexpr(oldcn)) );
=20
stmt( IRStmt_Put( OFFB_CC_OP, mkU32(thunkOp) ) );
- stmt( IRStmt_Put( OFFB_CC_DEP1, mkexpr(ta1) ) );
- stmt( IRStmt_Put( OFFB_CC_DEP2, binop(xor, mkexpr(ta2),=20
- mkexpr(oldcn)) ) );
+ stmt( IRStmt_Put( OFFB_CC_DEP1, widenUto32(mkexpr(ta1) )) );
+ stmt( IRStmt_Put( OFFB_CC_DEP2, widenUto32(binop(xor, mkexpr(ta2),=20
+ mkexpr(oldcn)) =
)) );
stmt( IRStmt_Put( OFFB_CC_NDEP, mkexpr(oldc) ) );
}
=20
|
|
From: <sv...@va...> - 2005-08-24 09:22:44
|
Author: sewardj
Date: 2005-08-24 10:22:39 +0100 (Wed, 24 Aug 2005)
New Revision: 1350
Log:
Enable ADC Ib, AL.
Modified:
trunk/priv/guest-x86/toIR.c
Modified: trunk/priv/guest-x86/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-x86/toIR.c 2005-08-23 23:44:35 UTC (rev 1349)
+++ trunk/priv/guest-x86/toIR.c 2005-08-24 09:22:39 UTC (rev 1350)
@@ -10767,11 +10767,11 @@
delta =3D dis_op_imm_A( sz, False, Iop_Or8, True, delta, "or" );
break;
=20
-//-- case 0x14: /* ADC Ib, AL */
-//-- delta =3D dis_op_imm_A( 1, ADC, True, delta, "adc" );
-//-- break;
+ case 0x14: /* ADC Ib, AL */
+ delta =3D dis_op_imm_A( 1, True, Iop_Add8, True, delta, "adc" );
+ break;
case 0x15: /* ADC Iv, eAX */
- delta =3D dis_op_imm_A( sz, True, Iop_Add8, True, delta, "adc" );
+ delta =3D dis_op_imm_A( sz, True, Iop_Add8, True, delta, "adc" );
break;
=20
//-- case 0x1C: /* SBB Ib, AL */
|
|
From: Greg P. <gp...@us...> - 2005-08-24 06:12:10
|
Some notes about porting Valgrind 3.x to Mac OS X / PowerPC:
* Overall, Valgrind 3.x looks far more portable than 2.x.
I appreciate all of the hard rewriting work; it should
begin to pay off soon. Thanks!
* Darwin always uses a 64-bit off_t, even on 32-bit architectures.
(FreeBSD may also do this.) Valgrind currently allows off_t to
be pointer sized only, but it doesn't look like there is any
strong dependence on this anywhere.
* dispatch.S should be platform-specific instead of arch-specific.
In particular, Darwin's assembler is not GNU as, so the file's
syntax would be wrong even if everything else were the same.
It should be reasonable to change dispatch-$VG_ARCH.S to
dispatch-$VG_OS-$VG_ARCH.S .
* Some Darwin syscalls take 7 arguments (in particular, mmap()
with 64-bit off_t offset). Valgrind currently provides
arg1..arg6. I don't see any obvious 8-argument syscalls.
Do other architectures define a 7th syscall argument and
just never use it, or do they have a 6 argument max?
* Darwin syscalls return a full 64-bit result, even on 32-bit
architectures. In particular, the lseek() syscall returns
a 64-bit off_t in registers r3 and r4. For syscalls that
return a 32-bit int, the kernel sets the other return
register to zero (or the appropriate sign extension for
signed return types). I don't know how much of an effect
changing this would have.
* Darwin/PPC syscalls indicate success and failure in an unusual
way: successful calls and failed calls return to different
points. A syscall call usually looks like this:
// ...set up parameters here...
sc // make the syscall
b BAD // failed calls return here
GOOD:
nop // successful calls return here
// ...handle success case here...
blr
BAD:
// ...handle failure case here...
blr
Handling this in VG_(do_syscall_for_client) isn't too bad.
One option is to store the PC of the last simulated `sc`
in the thread state, updating it before each call. Another
is to store a "sc failed" bit in each thread state, updating
it after each call. In either case, the simulated PC after
completion of the simulated `sc` would be adjusted based on
the result of the real `sc` or the syscall wrapper. The
syscall restarter would use the extra thread state to decide
whether to back up on instruction or two.
Handling this in VEX might be more difficult, because VEX
might need to know that `sc` looks like a conditional branch
in basic block analysis.
(Of course, Mach traps use `sc` but don't use the PC-modifying
calling convention. However, Mach traps are an entirely different
ball of wax, and much will be said about them later.)
--
Greg Parker gp...@us...
|
|
From: Greg P. <gp...@us...> - 2005-08-24 05:43:10
|
Some potential minor syscall wrapper bugs that I saw while comparing the syscalls to Darwin: * The wrapper for fcntl(F_SETOWN) and fcntl(F_SETSIG) ignore ARG3, but should not. * PRE(sys_select) does in fact sanity-check too little memory for each of the fd_sets (it misses the last n%8 valid bits.) The comment there may indicate that someone already knows about this. * Linux PRE(sys_umount) doesn't print ARG2. -- Greg Parker gp...@us... |
|
From: Greg P. <gp...@us...> - 2005-08-24 05:31:46
|
I examined Valgrind's generic syscall wrappers and compared them to Darwin / Mac OS X's syscall list. The list should give us a better idea of which syscall wrappers are actually generic and which should be Linux-specific instead. The wrappers are divided into four classes: * Truly generic. There is a Darwin syscall that matches the Linux syscall, and Valgrind's wrapper will probably work for both. These should stay in syswrap-generic.c * Unused on Darwin but generic. There is no Darwin syscall that will use this wrapper, but the wrapper compiles without error. These should stay in syswrap-generic.c if they are useful for FreeBSD or Solaris or something. * Unused on Darwin and not generic. There is no Darwin syscall that will use this wrapper, and the wrapper does not compile. Usually these fail because of a Linux-specific type that is missing. These could move to syswrap-linux.c, or they could stay in syswrap-generic.c and Darwin could provide dummy vki definitions for the types. * Not generic. Darwin has a syscall that is similar to Linux, but the wrapper implementations will differ. Usually these fail because the syscall parameter lists are different. I looked at the valgrind-3 tree checked out as of a few days ago. My analysis was brief and not 100% precise, but these results should be correct for most cases. None of the wrappers currently in syswrap-*linux.c looked applicable to Darwin. # The following groups of syscalls are mostly not generic # and should be handled en masse: *16 *xattr clock_* mq_* msg* rt_sig* sched_* sig* timer_* # The following syscalls are partly generic and partly not. They're # likely candidates for a generic wrapper plus an OS-specific hook. fcntl (some flags are different) ioctl (most flags are different) semctl (most flags are different) shmctl (most flags are different) # Truly generic - keep in syswrap-generic.c accept access acct bind chdir chmod chown chroot close connect dup dup2 execve exit fchdir fchmod fchown flock fork fstatfs fsync ftruncate64 getegid geteuid getgid getgroups getitimer getpeername getpgid getpgrp getpid getppid getpriority getrlimit getrusage getsid getsockname getsockopt gettimeofday getuid lchown link madvise mincore mkdir mknod mlock mlockall mprotect msync munlock munmap newfstat newlstat newstat open poll pread64 pwrite64 read readlink readv recv recvfrom recvmsg rename rmdir select semop send sendmsg sendto setgid setgroups setgroups setitimer setpgid setpriority setregid setreuid setrlimit setsid setsockopt settimeofday setuid shmat shmdt sigaltstack socket socketpair statfs symlink sync truncate64 umask unlink utimes wait4 write writev # Unused but generic - probably keep in syscall-generic.c alarm brk creat fdatasync fstatfs64 ftruncate getcwd getdents getdents64 getegid16 getgid16 getpmsg getuid16 getuid16 init_module iopl lgetxattr llistxattr lookup_dcookie lremovexattr lsetxattr mq_unlink mremap nanosleep newuname nice old_getrlimit pause putpmsg rt_sigaction rt_sigpending rt_sigprocmask rt_sigqueueinfo rt_sigsuspend rt_sigtimedwait sched_get_priority_max sched_get_priority_min sched_getaffinity sched_getscheduler sched_setaffinity sched_yield semtimedop statfs64 time times truncate waitpid # Unused and not generic - possibly keep in syswrap-generic.c capget (no vki_cap_user_data_t) capset (no vki_cap_user_data_t) chown16 (no vki_old_gid_t) clock_getres (no vki_clockid_t) clock_gettime (no vki_clockid_t) clock_nanosleep (no vki_clockid_t) clock_settime (no vki_clockid_t) fchown16 (no vki_old_uid_t) fcntl64 (flags are different) getgroups16 (no vki_old_gid_t) mq_getsetatte (no vki_mqd_t, no mq_attr) mq_notify (no vki_mqd_t) mq_open (no vki_mq_attr) mq_timedreceive (no vki_mqd_t) mq_timedsend (no vki_mqd_t) msgctl (no vki_msgbuf) msgrcv (no vki_msgbuf) msgsnd (no vki_msgbuf) sched_getparam (no vki_sched_param) sched_setparam (no vki_sched_param) sched_setscheduler (no vki_sched_param) setgid16 (no vki_old_gid_t) setgroups16 (no vki_old_gid_t) setgroups16 (no vki_old_gid_t) setregid16 (no vki_old_gid_t) setreuid16 (no vki_old_uid_t) setuid16 (no vki_old_uid_t) timer_create (no vki_timer_t, no vki_clockid_t) timer_delete (no vki_timer_t) timer_getoverrun (no vki_timer_t) timer_gettime (no vki_timer_t, no vki_itimerspec) timer_settime (no vki_timer_t, no vki_itimerspec) utime (no vki_utimbuf) # Not generic - probably move to OS-specific files fgetxattr (darwin has another parameter) flistxattr (darwin has another parameter) fremovexattr (darwin has another parameter) fsetxattr (darwin has another parameter) getxattr (darwin has another parameter) kill (darwin has another parameter) listxattr (darwin has another parameter) lseek (darwin's off_t is 64 bits even on 32-bit archs) mmap (darwin's off_t is 64 bits even on 32-bit archs) munlockall (darwin has another parameter) pipe (darwin has different parameters and return value) quotactl (darwin has different parameters) removexattr (darwin has another parameter) setxattr (darwin has another parameter) sigpending (darwin only has one sigset_t type sigprocmask (darwin only has one sigset_t type) waitid (darwin has different parameters) -- Greg Parker gp...@us... |
|
From: <js...@ac...> - 2005-08-24 02:56:25
|
Nightly build on phoenix ( SuSE 9.1 ) started at 2005-08-24 03:30:01 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 184 tests, 2 stderr failures, 0 stdout failures ================= none/tests/faultstatus (stderr) none/tests/x86/int (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 183 tests, 2 stderr failures, 0 stdout failures ================= none/tests/faultstatus (stderr) none/tests/x86/int (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Wed Aug 24 03:43:33 2005 --- new.short Wed Aug 24 03:56:18 2005 *************** *** 10,12 **** ! == 183 tests, 2 stderr failures, 0 stdout failures ================= none/tests/faultstatus (stderr) --- 10,12 ---- ! == 184 tests, 2 stderr failures, 0 stdout failures ================= none/tests/faultstatus (stderr) |
|
From: <js...@ac...> - 2005-08-24 02:44:45
|
Nightly build on g5 ( YDL 4.0, ppc970 ) started at 2005-08-24 04:40:00 CEST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 157 tests, 17 stderr failures, 1 stdout failure ================= memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/fprw (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp_unknown (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/xml1 (stderr) cachegrind/tests/chdir (stderr) cachegrind/tests/dlclose (stdout) cachegrind/tests/dlclose (stderr) none/tests/faultstatus (stderr) none/tests/fdleak_cmsg (stderr) none/tests/fdleak_ipv4 (stderr) |
|
From: Tom H. <to...@co...> - 2005-08-24 02:40:59
|
Nightly build on dunsmere ( athlon, Fedora Core 4 ) started at 2005-08-24 03:30:05 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 186 tests, 5 stderr failures, 0 stdout failures ================= memcheck/tests/leak-tree (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/xml1 (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 185 tests, 5 stderr failures, 0 stdout failures ================= memcheck/tests/leak-tree (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/xml1 (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Wed Aug 24 03:35:31 2005 --- new.short Wed Aug 24 03:40:50 2005 *************** *** 8,10 **** ! == 185 tests, 5 stderr failures, 0 stdout failures ================= memcheck/tests/leak-tree (stderr) --- 8,10 ---- ! == 186 tests, 5 stderr failures, 0 stdout failures ================= memcheck/tests/leak-tree (stderr) |