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From: <sv...@va...> - 2005-05-10 22:42:58
|
Author: sewardj
Date: 2005-05-10 23:42:54 +0100 (Tue, 10 May 2005)
New Revision: 1178
Modified:
trunk/priv/guest-amd64/toIR.c
trunk/priv/host-amd64/hdefs.c
trunk/priv/host-amd64/hdefs.h
trunk/priv/host-amd64/isel.c
Log:
Enough SSE2 instructions to sink a small ship. And that's not even
half of them.
Modified: trunk/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-amd64/toIR.c 2005-05-10 20:08:34 UTC (rev 1177)
+++ trunk/priv/guest-amd64/toIR.c 2005-05-10 22:42:54 UTC (rev 1178)
@@ -1419,17 +1419,17 @@
}
}
=20
-//.. /* Lanes of vector registers are always numbered from zero being th=
e
-//.. least significant lane (rightmost in the register). */
-//..=20
-//.. static Int xmmGuestRegLane16offset ( UInt xmmreg, Int laneno )
-//.. {
-//.. /* Correct for little-endian host only. */
-//.. vassert(!host_is_bigendian);
-//.. vassert(laneno >=3D 0 && laneno < 8);
-//.. return xmmGuestRegOffset( xmmreg ) + 2 * laneno;
-//.. }
+/* Lanes of vector registers are always numbered from zero being the
+ least significant lane (rightmost in the register). */
=20
+static Int xmmGuestRegLane16offset ( UInt xmmreg, Int laneno )
+{
+ /* Correct for little-endian host only. */
+ vassert(!host_is_bigendian);
+ vassert(laneno >=3D 0 && laneno < 8);
+ return xmmGuestRegOffset( xmmreg ) + 2 * laneno;
+}
+
static Int xmmGuestRegLane32offset ( UInt xmmreg, Int laneno )
{
/* Correct for little-endian host only. */
@@ -1512,11 +1512,11 @@
stmt( IRStmt_Put( xmmGuestRegLane32offset(xmmreg,laneno), e ) );
}
=20
-//.. static void putXMMRegLane16 ( UInt xmmreg, Int laneno, IRExpr* e )
-//.. {
-//.. vassert(typeOfIRExpr(irbb->tyenv,e) =3D=3D Ity_I16);
-//.. stmt( IRStmt_Put( xmmGuestRegLane16offset(xmmreg,laneno), e ) );
-//.. }
+static void putXMMRegLane16 ( UInt xmmreg, Int laneno, IRExpr* e )
+{
+ vassert(typeOfIRExpr(irbb->tyenv,e) =3D=3D Ity_I16);
+ stmt( IRStmt_Put( xmmGuestRegLane16offset(xmmreg,laneno), e ) );
+}
=20
static IRExpr* mkV128 ( UShort mask )
{
@@ -9301,11 +9301,12 @@
goto decode_success;
}
=20
-//.. /* 66 0F C2 =3D CMPPD -- 64Fx2 comparison from R/M to R */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC2) {
-//.. delta =3D dis_SSEcmp_E_to_G( sorb, delta+2, "cmppd", True, 8 =
);
-//.. goto decode_success;
-//.. }
+ /* 66 0F C2 =3D CMPPD -- 64Fx2 comparison from R/M to R */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC2) {
+ delta =3D dis_SSEcmp_E_to_G( pfx, delta+2, "cmppd", True, 8 );
+ goto decode_success;
+ }
=20
/* F2 0F C2 =3D CMPSD -- 64F0x2 comparison from R/M to R */
if (haveF2no66noF3(pfx) && sz =3D=3D 4
@@ -10018,7 +10019,8 @@
/* 66 0F 6E =3D MOVD from ireg32/m32 to xmm lo 1/4, zeroing high 3/4 =
of xmm. */
/* or from ireg64/m64 to xmm lo 1/2, zeroing high 1/2 of=
xmm. */
if (have66noF2noF3(pfx) && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x6E=
) {
- vassert(sz =3D=3D 4 || sz =3D=3D 8);
+ vassert(sz =3D=3D 2 || sz =3D=3D 8);
+ if (sz =3D=3D 2) sz =3D 4;
modrm =3D getUChar(delta+2);
if (epartIsReg(modrm)) {
delta +=3D 2+1;
@@ -10444,12 +10446,13 @@
goto decode_success;
}
=20
-//.. /* 66 0F 51 =3D SQRTPD -- approx sqrt 64Fx2 from R/M to R */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x51) {
-//.. delta =3D dis_SSE_E_to_G_unary_all( sorb, delta+2,=20
-//.. "sqrtpd", Iop_Sqrt64Fx2 );
-//.. goto decode_success;
-//.. }
+ /* 66 0F 51 =3D SQRTPD -- approx sqrt 64Fx2 from R/M to R */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x51) {
+ delta =3D dis_SSE_E_to_G_unary_all( pfx, delta+2,=20
+ "sqrtpd", Iop_Sqrt64Fx2 );
+ goto decode_success;
+ }
=20
/* F2 0F 51 =3D SQRTSD -- approx sqrt 64F0x2 from R/M to R */
if (haveF2no66noF3(pfx) && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x51=
) {
@@ -10522,46 +10525,52 @@
}
=20
/* 66 0F 57 =3D XORPD -- G =3D G xor E */
- if (have66noF2noF3(pfx) && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x57=
) {
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x57) {
delta =3D dis_SSE_E_to_G_all( pfx, delta+2, "xorpd", Iop_XorV128 )=
;
goto decode_success;
}
=20
-//.. /* 66 0F 6B =3D PACKSSDW */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x6B) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "packssdw", Iop_QNarrow32Sx4, True=
);
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F 63 =3D PACKSSWB */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x63) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "packsswb", Iop_QNarrow16Sx8, True=
);
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F 67 =3D PACKUSWB */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x67) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "packuswb", Iop_QNarrow16Ux8, True=
);
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F FC =3D PADDB */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xFC) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "paddb", Iop_Add8x16, False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F FE =3D PADDD */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xFE) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "paddd", Iop_Add32x4, False );
-//.. goto decode_success;
-//.. }
+ /* 66 0F 6B =3D PACKSSDW */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x6B) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "packssdw", Iop_QNarrow32Sx4, True );
+ goto decode_success;
+ }
=20
+ /* 66 0F 63 =3D PACKSSWB */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x63) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "packsswb", Iop_QNarrow16Sx8, True );
+ goto decode_success;
+ }
+
+ /* 66 0F 67 =3D PACKUSWB */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x67) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "packuswb", Iop_QNarrow16Ux8, True );
+ goto decode_success;
+ }
+
+ /* 66 0F FC =3D PADDB */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xFC) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "paddb", Iop_Add8x16, False );
+ goto decode_success;
+ }
+
+ /* 66 0F FE =3D PADDD */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xFE) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "paddd", Iop_Add32x4, False );
+ goto decode_success;
+ }
+
/* ***--- this is an MMX class insn introduced in SSE2 ---*** */
/* 0F D4 =3D PADDQ -- add 64x1 */
if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
@@ -10683,60 +10692,70 @@
//.. "pcmpgtw", Iop_CmpGT16Sx8, False )=
;
//.. goto decode_success;
//.. }
-//..=20
-//.. /* 66 0F C5 =3D PEXTRW -- extract 16-bit field from xmm(E) and p=
ut=20
-//.. zero-extend of it in ireg(G). */
-//.. if (insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC5) {
-//.. modrm =3D insn[2];
-//.. if (sz =3D=3D 2 && epartIsReg(modrm)) {
-//.. t5 =3D newTemp(Ity_V128);
-//.. t4 =3D newTemp(Ity_I16);
-//.. assign(t5, getXMMReg(eregOfRM(modrm)));
-//.. breakup128to32s( t5, &t3, &t2, &t1, &t0 );
-//.. switch (insn[3] & 7) {
-//.. case 0: assign(t4, unop(Iop_32to16, mkexpr(t0))); br=
eak;
-//.. case 1: assign(t4, unop(Iop_32HIto16, mkexpr(t0))); br=
eak;
-//.. case 2: assign(t4, unop(Iop_32to16, mkexpr(t1))); br=
eak;
-//.. case 3: assign(t4, unop(Iop_32HIto16, mkexpr(t1))); br=
eak;
-//.. case 4: assign(t4, unop(Iop_32to16, mkexpr(t2))); br=
eak;
-//.. case 5: assign(t4, unop(Iop_32HIto16, mkexpr(t2))); br=
eak;
-//.. case 6: assign(t4, unop(Iop_32to16, mkexpr(t3))); br=
eak;
-//.. case 7: assign(t4, unop(Iop_32HIto16, mkexpr(t3))); br=
eak;
-//.. default: vassert(0);
-//.. }
-//.. putIReg(4, gregOfRM(modrm), unop(Iop_16Uto32, mkexpr(t4)))=
;
-//.. DIP("pextrw $%d,%s,%s\n",
-//.. (Int)insn[3], nameXMMReg(eregOfRM(modrm)),
-//.. nameIReg(4,gregOfRM(modrm)));
-//.. delta +=3D 4;
-//.. goto decode_success;
-//.. }=20
-//.. /* else fall through */
-//.. }
-//..=20
-//.. /* 66 0F C4 =3D PINSRW -- get 16 bits from E(mem or low half ire=
g) and
-//.. put it into the specified lane of xmm(G). */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC4) {
-//.. Int lane;
-//.. t4 =3D newTemp(Ity_I16);
-//.. modrm =3D insn[2];
-//..=20
-//.. if (epartIsReg(modrm)) {
-//.. assign(t4, getIReg(2, eregOfRM(modrm)));
-//.. lane =3D insn[3];
-//.. delta +=3D 2+2;
-//.. DIP("pinsrw $%d,%s,%s\n", (Int)lane,=20
-//.. nameIReg(2,eregOfRM(modrm)),
-//.. nameXMMReg(gregOfRM(modrm)));
-//.. } else {
-//.. /* awaiting test case */
-//.. goto decode_failure;
-//.. }
-//..=20
-//.. putXMMRegLane16( gregOfRM(modrm), lane & 7, mkexpr(t4) );
-//.. goto decode_success;
-//.. }
-//..=20
+
+ /* 66 0F C5 =3D PEXTRW -- extract 16-bit field from xmm(E) and put=20
+ zero-extend of it in ireg(G). */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC5) {
+ modrm =3D insn[2];
+ if (epartIsReg(modrm)) {
+ t5 =3D newTemp(Ity_V128);
+ t4 =3D newTemp(Ity_I16);
+ assign(t5, getXMMReg(eregOfRexRM(pfx,modrm)));
+ breakup128to32s( t5, &t3, &t2, &t1, &t0 );
+ switch (insn[3] & 7) {
+ case 0: assign(t4, unop(Iop_32to16, mkexpr(t0))); break;
+ case 1: assign(t4, unop(Iop_32HIto16, mkexpr(t0))); break;
+ case 2: assign(t4, unop(Iop_32to16, mkexpr(t1))); break;
+ case 3: assign(t4, unop(Iop_32HIto16, mkexpr(t1))); break;
+ case 4: assign(t4, unop(Iop_32to16, mkexpr(t2))); break;
+ case 5: assign(t4, unop(Iop_32HIto16, mkexpr(t2))); break;
+ case 6: assign(t4, unop(Iop_32to16, mkexpr(t3))); break;
+ case 7: assign(t4, unop(Iop_32HIto16, mkexpr(t3))); break;
+ default: vassert(0);
+ }
+ putIReg32(gregOfRexRM(pfx,modrm), unop(Iop_16Uto32, mkexpr(t4))=
);
+ DIP("pextrw $%d,%s,%s\n",
+ (Int)insn[3], nameXMMReg(eregOfRexRM(pfx,modrm)),
+ nameIReg32(gregOfRexRM(pfx,modrm)));
+ delta +=3D 4;
+ goto decode_success;
+ }=20
+ /* else fall through */
+ /* note, if memory case is ever filled in, there is 1 byte after
+ amode */
+ }
+
+ /* 66 0F C4 =3D PINSRW -- get 16 bits from E(mem or low half ireg) an=
d
+ put it into the specified lane of xmm(G). */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC4) {
+ Int lane;
+ t4 =3D newTemp(Ity_I16);
+ modrm =3D insn[2];
+
+ if (epartIsReg(modrm)) {
+ assign(t4, getIReg16(eregOfRexRM(pfx,modrm)));
+ delta +=3D 3+1;
+ lane =3D insn[3+1-1];
+ DIP("pinsrw $%d,%s,%s\n", (Int)lane,=20
+ nameIReg16(eregOfRexRM(pfx,modrm)),
+ nameXMMReg(gregOfRexRM(pfx,modrm)));
+ } else {
+ addr =3D disAMode ( &alen, pfx, delta+2, dis_buf,=20
+ 1/*byte after the amode*/ );
+ delta +=3D 3+alen;
+ lane =3D insn[3+alen-1];
+ assign(t4, loadLE(Ity_I16, mkexpr(addr)));
+ DIP("pinsrw $%d,%s,%s\n", (Int)lane,
+ dis_buf,
+ nameXMMReg(gregOfRexRM(pfx,modrm)));
+ }
+
+ putXMMRegLane16( gregOfRexRM(pfx,modrm), lane & 7, mkexpr(t4) );
+ goto decode_success;
+ }
+
//.. /* 66 0F EE =3D PMAXSW -- 16x8 signed max */
//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xEE) {
//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
@@ -11036,64 +11055,69 @@
//.. delta =3D dis_SSE_shiftG_byE( sorb, delta+2, "pslld", Iop_Shl=
N32x4 );
//.. goto decode_success;
//.. }
-//..=20
-//.. /* 66 0F 73 /7 ib =3D PSLLDQ by immediate */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x73
-//.. && epartIsReg(insn[2])
-//.. && gregOfRM(insn[2]) =3D=3D 7) {
-//.. IRTemp sV, dV, hi64, lo64, hi64r, lo64r;
-//.. Int imm =3D (Int)insn[3];
-//.. Int reg =3D eregOfRM(insn[2]);
-//.. DIP("pslldq $%d,%s\n", imm, nameXMMReg(reg));
-//.. vassert(imm >=3D 0 && imm <=3D 255);
-//.. delta +=3D 4;
-//..=20
-//.. sV =3D newTemp(Ity_V128);
-//.. dV =3D newTemp(Ity_V128);
-//.. hi64 =3D newTemp(Ity_I64);
-//.. lo64 =3D newTemp(Ity_I64);
-//.. hi64r =3D newTemp(Ity_I64);
-//.. lo64r =3D newTemp(Ity_I64);
-//..=20
-//.. if (imm >=3D 16) {
-//.. vassert(0); /* awaiting test case */
-//.. putXMMReg(reg, mkV128(0x0000));
-//.. goto decode_success;
-//.. }
-//..=20
-//.. assign( sV, getXMMReg(reg) );
-//.. assign( hi64, unop(Iop_128HIto64, mkexpr(sV)) );
-//.. assign( lo64, unop(Iop_128to64, mkexpr(sV)) );
-//..=20
-//.. if (imm =3D=3D 8) {
-//.. assign( lo64r, mkU64(0) );
-//.. assign( hi64r, mkexpr(lo64) );
-//.. }
-//.. else
-//.. if (imm > 8) {
-//.. vassert(0); /* awaiting test case */
-//.. assign( lo64r, mkU64(0) );
-//.. assign( hi64r, binop( Iop_Shl64,=20
-//.. mkexpr(lo64),
-//.. mkU8( 8*(imm-8) ) ));
-//.. } else {
-//.. assign( lo64r, binop( Iop_Shl64,=20
-//.. mkexpr(lo64),
-//.. mkU8(8 * imm) ));
-//.. assign( hi64r,=20
-//.. binop( Iop_Or64,
-//.. binop(Iop_Shl64, mkexpr(hi64),=20
-//.. mkU8(8 * imm)),
-//.. binop(Iop_Shr64, mkexpr(lo64),
-//.. mkU8(8 * (8 - imm)) )
-//.. )
-//.. );
-//.. }
-//.. assign( dV, binop(Iop_64HLto128, mkexpr(hi64r), mkexpr(lo64r)=
) );
-//.. putXMMReg(reg, mkexpr(dV));
-//.. goto decode_success;
-//.. }
-//..=20
+
+ /* 66 0F 73 /7 ib =3D PSLLDQ by immediate */
+ /* note, if mem case ever filled in, 1 byte after amode */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x73
+ && epartIsReg(insn[2])
+ && gregLO3ofRM(insn[2]) =3D=3D 7) {
+ IRTemp sV, dV, hi64, lo64, hi64r, lo64r;
+ Int imm =3D (Int)insn[3];
+ Int reg =3D eregOfRexRM(pfx,insn[2]);
+ DIP("pslldq $%d,%s\n", imm, nameXMMReg(reg));
+ vassert(imm >=3D 0 && imm <=3D 255);
+ delta +=3D 4;
+
+ sV =3D newTemp(Ity_V128);
+ dV =3D newTemp(Ity_V128);
+ hi64 =3D newTemp(Ity_I64);
+ lo64 =3D newTemp(Ity_I64);
+ hi64r =3D newTemp(Ity_I64);
+ lo64r =3D newTemp(Ity_I64);
+
+ if (imm >=3D 16) {
+ putXMMReg(reg, mkV128(0x0000));
+ goto decode_success;
+ }
+
+ assign( sV, getXMMReg(reg) );
+ assign( hi64, unop(Iop_V128HIto64, mkexpr(sV)) );
+ assign( lo64, unop(Iop_V128to64, mkexpr(sV)) );
+
+ if (imm =3D=3D 0) {
+ assign( lo64r, mkexpr(lo64) );
+ assign( hi64r, mkexpr(hi64) );
+ }
+ else
+ if (imm =3D=3D 8) {
+ assign( lo64r, mkU64(0) );
+ assign( hi64r, mkexpr(lo64) );
+ }
+ else
+ if (imm > 8) {
+ assign( lo64r, mkU64(0) );
+ assign( hi64r, binop( Iop_Shl64,=20
+ mkexpr(lo64),
+ mkU8( 8*(imm-8) ) ));
+ } else {
+ assign( lo64r, binop( Iop_Shl64,=20
+ mkexpr(lo64),
+ mkU8(8 * imm) ));
+ assign( hi64r,=20
+ binop( Iop_Or64,
+ binop(Iop_Shl64, mkexpr(hi64),=20
+ mkU8(8 * imm)),
+ binop(Iop_Shr64, mkexpr(lo64),
+ mkU8(8 * (8 - imm)) )
+ )
+ );
+ }
+ assign( dV, binop(Iop_64HLtoV128, mkexpr(hi64r), mkexpr(lo64r)) );
+ putXMMReg(reg, mkexpr(dV));
+ goto decode_success;
+ }
+
//.. /* 66 0F 73 /6 ib =3D PSLLQ by immediate */
//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x73
//.. && epartIsReg(insn[2])
@@ -11163,65 +11187,70 @@
//.. delta =3D dis_SSE_shiftG_byE( sorb, delta+2, "psrld", Iop_Shr=
N32x4 );
//.. goto decode_success;
//.. }
-//..=20
-//.. /* 66 0F 73 /3 ib =3D PSRLDQ by immediate */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x73
-//.. && epartIsReg(insn[2])
-//.. && gregOfRM(insn[2]) =3D=3D 3) {
-//.. IRTemp sV, dV, hi64, lo64, hi64r, lo64r;
-//.. Int imm =3D (Int)insn[3];
-//.. Int reg =3D eregOfRM(insn[2]);
-//.. DIP("psrldq $%d,%s\n", imm, nameXMMReg(reg));
-//.. vassert(imm >=3D 0 && imm <=3D 255);
-//.. delta +=3D 4;
-//..=20
-//.. sV =3D newTemp(Ity_V128);
-//.. dV =3D newTemp(Ity_V128);
-//.. hi64 =3D newTemp(Ity_I64);
-//.. lo64 =3D newTemp(Ity_I64);
-//.. hi64r =3D newTemp(Ity_I64);
-//.. lo64r =3D newTemp(Ity_I64);
-//..=20
-//.. if (imm >=3D 16) {
-//.. vassert(0); /* awaiting test case */
-//.. putXMMReg(reg, mkV128(0x0000));
-//.. goto decode_success;
-//.. }
-//..=20
-//.. assign( sV, getXMMReg(reg) );
-//.. assign( hi64, unop(Iop_128HIto64, mkexpr(sV)) );
-//.. assign( lo64, unop(Iop_128to64, mkexpr(sV)) );
-//..=20
-//.. if (imm =3D=3D 8) {
-//.. assign( hi64r, mkU64(0) );
-//.. assign( lo64r, mkexpr(hi64) );
-//.. }
-//.. else=20
-//.. if (imm > 8) {
-//.. vassert(0); /* awaiting test case */
-//.. assign( hi64r, mkU64(0) );
-//.. assign( lo64r, binop( Iop_Shr64,=20
-//.. mkexpr(hi64),
-//.. mkU8( 8*(imm-8) ) ));
-//.. } else {
-//.. assign( hi64r, binop( Iop_Shr64,=20
-//.. mkexpr(hi64),
-//.. mkU8(8 * imm) ));
-//.. assign( lo64r,=20
-//.. binop( Iop_Or64,
-//.. binop(Iop_Shr64, mkexpr(lo64),=20
-//.. mkU8(8 * imm)),
-//.. binop(Iop_Shl64, mkexpr(hi64),
-//.. mkU8(8 * (8 - imm)) )
-//.. )
-//.. );
-//.. }
-//..=20
-//.. assign( dV, binop(Iop_64HLto128, mkexpr(hi64r), mkexpr(lo64r)=
) );
-//.. putXMMReg(reg, mkexpr(dV));
-//.. goto decode_success;
-//.. }
=20
+ /* 66 0F 73 /3 ib =3D PSRLDQ by immediate */
+ /* note, if mem case ever filled in, 1 byte after amode */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x73
+ && epartIsReg(insn[2])
+ && gregLO3ofRM(insn[2]) =3D=3D 3) {
+ IRTemp sV, dV, hi64, lo64, hi64r, lo64r;
+ Int imm =3D (Int)insn[3];
+ Int reg =3D eregOfRexRM(pfx,insn[2]);
+ DIP("psrldq $%d,%s\n", imm, nameXMMReg(reg));
+ vassert(imm >=3D 0 && imm <=3D 255);
+ delta +=3D 4;
+
+ sV =3D newTemp(Ity_V128);
+ dV =3D newTemp(Ity_V128);
+ hi64 =3D newTemp(Ity_I64);
+ lo64 =3D newTemp(Ity_I64);
+ hi64r =3D newTemp(Ity_I64);
+ lo64r =3D newTemp(Ity_I64);
+
+ if (imm >=3D 16) {
+ putXMMReg(reg, mkV128(0x0000));
+ goto decode_success;
+ }
+
+ assign( sV, getXMMReg(reg) );
+ assign( hi64, unop(Iop_V128HIto64, mkexpr(sV)) );
+ assign( lo64, unop(Iop_V128to64, mkexpr(sV)) );
+
+ if (imm =3D=3D 0) {
+ assign( lo64r, mkexpr(lo64) );
+ assign( hi64r, mkexpr(hi64) );
+ }
+ else
+ if (imm =3D=3D 8) {
+ assign( hi64r, mkU64(0) );
+ assign( lo64r, mkexpr(hi64) );
+ }
+ else=20
+ if (imm > 8) {
+ assign( hi64r, mkU64(0) );
+ assign( lo64r, binop( Iop_Shr64,=20
+ mkexpr(hi64),
+ mkU8( 8*(imm-8) ) ));
+ } else {
+ assign( hi64r, binop( Iop_Shr64,=20
+ mkexpr(hi64),
+ mkU8(8 * imm) ));
+ assign( lo64r,=20
+ binop( Iop_Or64,
+ binop(Iop_Shr64, mkexpr(lo64),=20
+ mkU8(8 * imm)),
+ binop(Iop_Shl64, mkexpr(hi64),
+ mkU8(8 * (8 - imm)) )
+ )
+ );
+ }
+
+ assign( dV, binop(Iop_64HLtoV128, mkexpr(hi64r), mkexpr(lo64r)) );
+ putXMMReg(reg, mkexpr(dV));
+ goto decode_success;
+ }
+
/* 66 0F 73 /2 ib =3D PSRLQ by immediate */
if (have66noF2noF3(pfx) && sz =3D=3D 2=20
&& insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x73
@@ -11250,21 +11279,23 @@
//.. delta =3D dis_SSE_shiftG_byE( sorb, delta+2, "psrlw", Iop_Shr=
N16x8 );
//.. goto decode_success;
//.. }
-//..=20
-//.. /* 66 0F F8 =3D PSUBB */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xF8) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "psubb", Iop_Sub8x16, False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F FA =3D PSUBD */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xFA) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "psubd", Iop_Sub32x4, False );
-//.. goto decode_success;
-//.. }
=20
+ /* 66 0F F8 =3D PSUBB */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xF8) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "psubb", Iop_Sub8x16, False );
+ goto decode_success;
+ }
+
+ /* 66 0F FA =3D PSUBD */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xFA) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "psubd", Iop_Sub32x4, False );
+ goto decode_success;
+ }
+
/* ***--- this is an MMX class insn introduced in SSE2 ---*** */
/* 0F FB =3D PSUBQ -- sub 64x1 */
if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
@@ -11283,105 +11314,118 @@
goto decode_success;
}
=20
-//.. /* 66 0F F9 =3D PSUBW */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xF9) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "psubw", Iop_Sub16x8, False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F E8 =3D PSUBSB */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xE8) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "psubsb", Iop_QSub8Sx16, False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F E9 =3D PSUBSW */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xE9) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "psubsw", Iop_QSub16Sx8, False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F D8 =3D PSUBSB */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xD8) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "psubusb", Iop_QSub8Ux16, False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F D9 =3D PSUBSW */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xD9) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "psubusw", Iop_QSub16Ux8, False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F 68 =3D PUNPCKHBW */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x68) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "punpckhbw",
-//.. Iop_InterleaveHI8x16, True );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F 6A =3D PUNPCKHDQ */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x6A) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "punpckhdq",
-//.. Iop_InterleaveHI32x4, True );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F 6D =3D PUNPCKHQDQ */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x6D) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "punpckhqdq",
-//.. Iop_InterleaveHI64x2, True );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F 69 =3D PUNPCKHWD */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x69) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "punpckhwd",
-//.. Iop_InterleaveHI16x8, True );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F 60 =3D PUNPCKLBW */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x60) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "punpcklbw",
-//.. Iop_InterleaveLO8x16, True );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F 62 =3D PUNPCKLDQ */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x62) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "punpckldq",
-//.. Iop_InterleaveLO32x4, True );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F 6C =3D PUNPCKLQDQ */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x6C) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "punpcklqdq",
-//.. Iop_InterleaveLO64x2, True );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 66 0F 61 =3D PUNPCKLWD */
-//.. if (sz =3D=3D 2 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x61) {
-//.. delta =3D dis_SSEint_E_to_G( sorb, delta+2,=20
-//.. "punpcklwd",
-//.. Iop_InterleaveLO16x8, True );
-//.. goto decode_success;
-//.. }
+ /* 66 0F F9 =3D PSUBW */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xF9) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "psubw", Iop_Sub16x8, False );
+ goto decode_success;
+ }
=20
+ /* 66 0F E8 =3D PSUBSB */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xE8) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "psubsb", Iop_QSub8Sx16, False );
+ goto decode_success;
+ }
+
+ /* 66 0F E9 =3D PSUBSW */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xE9) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "psubsw", Iop_QSub16Sx8, False );
+ goto decode_success;
+ }
+
+ /* 66 0F D8 =3D PSUBSB */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xD8) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "psubusb", Iop_QSub8Ux16, False );
+ goto decode_success;
+ }
+
+ /* 66 0F D9 =3D PSUBSW */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xD9) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "psubusw", Iop_QSub16Ux8, False );
+ goto decode_success;
+ }
+
+ /* 66 0F 68 =3D PUNPCKHBW */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x68) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "punpckhbw",
+ Iop_InterleaveHI8x16, True );
+ goto decode_success;
+ }
+
+ /* 66 0F 6A =3D PUNPCKHDQ */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x6A) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "punpckhdq",
+ Iop_InterleaveHI32x4, True );
+ goto decode_success;
+ }
+
+ /* 66 0F 6D =3D PUNPCKHQDQ */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x6D) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "punpckhqdq",
+ Iop_InterleaveHI64x2, True );
+ goto decode_success;
+ }
+
+ /* 66 0F 69 =3D PUNPCKHWD */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x69) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "punpckhwd",
+ Iop_InterleaveHI16x8, True );
+ goto decode_success;
+ }
+
+ /* 66 0F 60 =3D PUNPCKLBW */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x60) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "punpcklbw",
+ Iop_InterleaveLO8x16, True );
+ goto decode_success;
+ }
+
+ /* 66 0F 62 =3D PUNPCKLDQ */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x62) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "punpckldq",
+ Iop_InterleaveLO32x4, True );
+ goto decode_success;
+ }
+
+ /* 66 0F 6C =3D PUNPCKLQDQ */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x6C) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "punpcklqdq",
+ Iop_InterleaveLO64x2, True );
+ goto decode_success;
+ }
+
+ /* 66 0F 61 =3D PUNPCKLWD */
+ if (have66noF2noF3(pfx) && sz =3D=3D 2=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x61) {
+ delta =3D dis_SSEint_E_to_G( pfx, delta+2,=20
+ "punpcklwd",
+ Iop_InterleaveLO16x8, True );
+ goto decode_success;
+ }
+
/* 66 0F EF =3D PXOR */
if (have66noF2noF3(pfx) && sz =3D=3D 2=20
&& insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xEF) {
Modified: trunk/priv/host-amd64/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/hdefs.c 2005-05-10 20:08:34 UTC (rev 1177)
+++ trunk/priv/host-amd64/hdefs.c 2005-05-10 22:42:54 UTC (rev 1178)
@@ -603,22 +603,22 @@
case Asse_OR: return "or";
case Asse_XOR: return "xor";
case Asse_ANDN: return "andn";
-//.. case Xsse_ADD8: return "paddb";
-//.. case Xsse_ADD16: return "paddw";
-//.. case Xsse_ADD32: return "paddd";
+ case Asse_ADD8: return "paddb";
+ case Asse_ADD16: return "paddw";
+ case Asse_ADD32: return "paddd";
case Asse_ADD64: return "paddq";
//.. case Xsse_QADD8U: return "paddusb";
//.. case Xsse_QADD16U: return "paddusw";
//.. case Xsse_QADD8S: return "paddsb";
//.. case Xsse_QADD16S: return "paddsw";
-//.. case Xsse_SUB8: return "psubb";
-//.. case Xsse_SUB16: return "psubw";
-//.. case Xsse_SUB32: return "psubd";
+ case Asse_SUB8: return "psubb";
+ case Asse_SUB16: return "psubw";
+ case Asse_SUB32: return "psubd";
case Asse_SUB64: return "psubq";
-//.. case Xsse_QSUB8U: return "psubusb";
-//.. case Xsse_QSUB16U: return "psubusw";
-//.. case Xsse_QSUB8S: return "psubsb";
-//.. case Xsse_QSUB16S: return "psubsw";
+ case Asse_QSUB8U: return "psubusb";
+ case Asse_QSUB16U: return "psubusw";
+ case Asse_QSUB8S: return "psubsb";
+ case Asse_QSUB16S: return "psubsw";
//.. case Xsse_MUL16: return "pmullw";
//.. case Xsse_MULHI16U: return "pmulhuw";
//.. case Xsse_MULHI16S: return "pmulhw";
@@ -642,17 +642,17 @@
case Asse_SHR64: return "psrlq";
//.. case Xsse_SAR16: return "psraw";
//.. case Xsse_SAR32: return "psrad";
-//.. case Xsse_PACKSSD: return "packssdw";
-//.. case Xsse_PACKSSW: return "packsswb";
-//.. case Xsse_PACKUSW: return "packuswb";
-//.. case Xsse_UNPCKHB: return "punpckhb";
-//.. case Xsse_UNPCKHW: return "punpckhw";
-//.. case Xsse_UNPCKHD: return "punpckhd";
-//.. case Xsse_UNPCKHQ: return "punpckhq";
-//.. case Xsse_UNPCKLB: return "punpcklb";
-//.. case Xsse_UNPCKLW: return "punpcklw";
-//.. case Xsse_UNPCKLD: return "punpckld";
-//.. case Xsse_UNPCKLQ: return "punpcklq";
+ case Asse_PACKSSD: return "packssdw";
+ case Asse_PACKSSW: return "packsswb";
+ case Asse_PACKUSW: return "packuswb";
+ case Asse_UNPCKHB: return "punpckhb";
+ case Asse_UNPCKHW: return "punpckhw";
+ case Asse_UNPCKHD: return "punpckhd";
+ case Asse_UNPCKHQ: return "punpckhq";
+ case Asse_UNPCKLB: return "punpcklb";
+ case Asse_UNPCKLW: return "punpcklw";
+ case Asse_UNPCKLD: return "punpckld";
+ case Asse_UNPCKLQ: return "punpcklq";
default: vpanic("showAMD64SseOp");
}
}
@@ -3228,11 +3228,11 @@
case Asse_MULF: *p++ =3D 0x59; break;
//.. case Xsse_RCPF: *p++ =3D 0x53; break;
//.. case Xsse_RSQRTF: *p++ =3D 0x52; break;
-//.. case Xsse_SQRTF: *p++ =3D 0x51; break;
+ case Asse_SQRTF: *p++ =3D 0x51; break;
case Asse_SUBF: *p++ =3D 0x5C; break;
-//.. case Xsse_CMPEQF: *p++ =3D 0xC2; xtra =3D 0x100; break;
-//.. case Xsse_CMPLTF: *p++ =3D 0xC2; xtra =3D 0x101; break;
-//.. case Xsse_CMPLEF: *p++ =3D 0xC2; xtra =3D 0x102; break;
+ case Asse_CMPEQF: *p++ =3D 0xC2; xtra =3D 0x100; break;
+ case Asse_CMPLTF: *p++ =3D 0xC2; xtra =3D 0x101; break;
+ case Asse_CMPLEF: *p++ =3D 0xC2; xtra =3D 0x102; break;
default: goto bad;
}
p =3D doAMode_R(p, vreg2ireg(i->Ain.Sse64Fx2.dst),
@@ -3310,12 +3310,12 @@
case Asse_XOR: XX(rex); XX(0x0F); XX(0x57); brea=
k;
case Asse_AND: XX(rex); XX(0x0F); XX(0x54); brea=
k;
case Asse_ANDN: XX(rex); XX(0x0F); XX(0x55); brea=
k;
-//.. case Xsse_PACKSSD: XX(0x66); XX(rex); XX(0x0F); XX(0x6B);=
break;
-//.. case Xsse_PACKSSW: XX(0x66); XX(rex); XX(0x0F); XX(0x63);=
break;
-//.. case Xsse_PACKUSW: XX(0x66); XX(rex); XX(0x0F); XX(0x67);=
break;
-//.. case Xsse_ADD8: XX(0x66); XX(rex); XX(0x0F); XX(0xFC);=
break;
+ case Asse_PACKSSD: XX(0x66); XX(rex); XX(0x0F); XX(0x6B); brea=
k;
+ case Asse_PACKSSW: XX(0x66); XX(rex); XX(0x0F); XX(0x63); brea=
k;
+ case Asse_PACKUSW: XX(0x66); XX(rex); XX(0x0F); XX(0x67); brea=
k;
+ case Asse_ADD8: XX(0x66); XX(rex); XX(0x0F); XX(0xFC); brea=
k;
//.. case Xsse_ADD16: XX(0x66); XX(rex); XX(0x0F); XX(0xFD);=
break;
-//.. case Xsse_ADD32: XX(0x66); XX(rex); XX(0x0F); XX(0xFE);=
break;
+ case Asse_ADD32: XX(0x66); XX(rex); XX(0x0F); XX(0xFE); brea=
k;
case Asse_ADD64: XX(0x66); XX(rex); XX(0x0F); XX(0xD4); brea=
k;
//.. case Xsse_QADD8S: XX(0x66); XX(rex); XX(0x0F); XX(0xEC);=
break;
//.. case Xsse_QADD16S: XX(0x66); XX(rex); XX(0x0F); XX(0xED);=
break;
@@ -3344,22 +3344,22 @@
//.. case Xsse_SHR16: XX(0x66); XX(rex); XX(0x0F); XX(0xD1);=
break;
//.. case Xsse_SHR32: XX(0x66); XX(rex); XX(0x0F); XX(0xD2);=
break;
case Asse_SHR64: XX(0x66); XX(rex); XX(0x0F); XX(0xD3); brea=
k;
-//.. case Xsse_SUB8: XX(0x66); XX(rex); XX(0x0F); XX(0xF8);=
break;
-//.. case Xsse_SUB16: XX(0x66); XX(rex); XX(0x0F); XX(0xF9);=
break;
-//.. case Xsse_SUB32: XX(0x66); XX(rex); XX(0x0F); XX(0xFA);=
break;
+ case Asse_SUB8: XX(0x66); XX(rex); XX(0x0F); XX(0xF8); brea=
k;
+ case Asse_SUB16: XX(0x66); XX(rex); XX(0x0F); XX(0xF9); brea=
k;
+ case Asse_SUB32: XX(0x66); XX(rex); XX(0x0F); XX(0xFA); brea=
k;
case Asse_SUB64: XX(0x66); XX(rex); XX(0x0F); XX(0xFB); brea=
k;
-//.. case Xsse_QSUB8S: XX(0x66); XX(rex); XX(0x0F); XX(0xE8);=
break;
-//.. case Xsse_QSUB16S: XX(0x66); XX(rex); XX(0x0F); XX(0xE9);=
break;
-//.. case Xsse_QSUB8U: XX(0x66); XX(rex); XX(0x0F); XX(0xD8);=
break;
-//.. case Xsse_QSUB16U: XX(0x66); XX(rex); XX(0x0F); XX(0xD9);=
break;
-//.. case Xsse_UNPCKHB: XX(0x66); XX(rex); XX(0x0F); XX(0x68);=
break;
-//.. case Xsse_UNPCKHW: XX(0x66); XX(rex); XX(0x0F); XX(0x69);=
break;
-//.. case Xsse_UNPCKHD: XX(0x66); XX(rex); XX(0x0F); XX(0x6A);=
break;
-//.. case Xsse_UNPCKHQ: XX(0x66); XX(rex); XX(0x0F); XX(0x6D);=
break;
-//.. case Xsse_UNPCKLB: XX(0x66); XX(rex); XX(0x0F); XX(0x60);=
break;
-//.. case Xsse_UNPCKLW: XX(0x66); XX(rex); XX(0x0F); XX(0x61);=
break;
-//.. case Xsse_UNPCKLD: XX(0x66); XX(rex); XX(0x0F); XX(0x62);=
break;
-//.. case Xsse_UNPCKLQ: XX(0x66); XX(rex); XX(0x0F); XX(0x6C);=
break;
+ case Asse_QSUB8S: XX(0x66); XX(rex); XX(0x0F); XX(0xE8); brea=
k;
+ case Asse_QSUB16S: XX(0x66); XX(rex); XX(0x0F); XX(0xE9); brea=
k;
+ case Asse_QSUB8U: XX(0x66); XX(rex); XX(0x0F); XX(0xD8); brea=
k;
+ case Asse_QSUB16U: XX(0x66); XX(rex); XX(0x0F); XX(0xD9); brea=
k;
+ case Asse_UNPCKHB: XX(0x66); XX(rex); XX(0x0F); XX(0x68); brea=
k;
+ case Asse_UNPCKHW: XX(0x66); XX(rex); XX(0x0F); XX(0x69); brea=
k;
+ case Asse_UNPCKHD: XX(0x66); XX(rex); XX(0x0F); XX(0x6A); brea=
k;
+ case Asse_UNPCKHQ: XX(0x66); XX(rex); XX(0x0F); XX(0x6D); brea=
k;
+ case Asse_UNPCKLB: XX(0x66); XX(rex); XX(0x0F); XX(0x60); brea=
k;
+ case Asse_UNPCKLW: XX(0x66); XX(rex); XX(0x0F); XX(0x61); brea=
k;
+ case Asse_UNPCKLD: XX(0x66); XX(rex); XX(0x0F); XX(0x62); brea=
k;
+ case Asse_UNPCKLQ: XX(0x66); XX(rex); XX(0x0F); XX(0x6C); brea=
k;
default: goto bad;
}
p =3D doAMode_R(p, vreg2ireg(i->Ain.SseReRg.dst),
Modified: trunk/priv/host-amd64/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/hdefs.h 2005-05-10 20:08:34 UTC (rev 1177)
+++ trunk/priv/host-amd64/hdefs.h 2005-05-10 22:42:54 UTC (rev 1178)
@@ -323,14 +323,12 @@
/* Bitwise */
Asse_AND, Asse_OR, Asse_XOR, Asse_ANDN,
//.. /* Integer binary */
-//.. Xsse_ADD8, Xsse_ADD16, Xsse_ADD32,
- Asse_ADD64,
+ Asse_ADD8, Asse_ADD16, Asse_ADD32, Asse_ADD64,
//.. Xsse_QADD8U, Xsse_QADD16U,
//.. Xsse_QADD8S, Xsse_QADD16S,
-//.. Xsse_SUB8, Xsse_SUB16, Xsse_SUB32,
- Asse_SUB64,
-//.. Xsse_QSUB8U, Xsse_QSUB16U,
-//.. Xsse_QSUB8S, Xsse_QSUB16S,
+ Asse_SUB8, Asse_SUB16, Asse_SUB32, Asse_SUB64,
+ Asse_QSUB8U, Asse_QSUB16U,
+ Asse_QSUB8S, Asse_QSUB16S,
//.. Xsse_MUL16,
//.. Xsse_MULHI16U,
//.. Xsse_MULHI16S,
@@ -346,9 +344,9 @@
//.. Xsse_SHR16, Xsse_SHR32,=20
Asse_SHR64,
//.. Xsse_SAR16, Xsse_SAR32,=20
-//.. Xsse_PACKSSD, Xsse_PACKSSW, Xsse_PACKUSW,
-//.. Xsse_UNPCKHB, Xsse_UNPCKHW, Xsse_UNPCKHD, Xsse_UNPCKHQ,
-//.. Xsse_UNPCKLB, Xsse_UNPCKLW, Xsse_UNPCKLD, Xsse_UNPCKLQ
+ Asse_PACKSSD, Asse_PACKSSW, Asse_PACKUSW,
+ Asse_UNPCKHB, Asse_UNPCKHW, Asse_UNPCKHD, Asse_UNPCKHQ,
+ Asse_UNPCKLB, Asse_UNPCKLW, Asse_UNPCKLD, Asse_UNPCKLQ
}
AMD64SseOp;
=20
Modified: trunk/priv/host-amd64/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/isel.c 2005-05-10 20:08:34 UTC (rev 1177)
+++ trunk/priv/host-amd64/isel.c 2005-05-10 22:42:54 UTC (rev 1178)
@@ -3191,16 +3191,15 @@
}
=20
//.. case Iop_Recip64Fx2: op =3D Xsse_RCPF; goto do_64Fx2_unary;
-//.. case Iop_RSqrt64Fx2: op =3D Xsse_RSQRTF; goto do_64Fx2_unary;
-//.. case Iop_Sqrt64Fx2: op =3D Xsse_SQRTF; goto do_64Fx2_unary;
-//.. do_64Fx2_unary:
-//.. {
-//.. HReg arg =3D iselVecExpr(env, e->Iex.Unop.arg);
-//.. HReg dst =3D newVRegV(env);
-//.. REQUIRE_SSE2;
-//.. addInstr(env, X86Instr_Sse64Fx2(op, arg, dst));
-//.. return dst;
-//.. }
+//.. case Iop_RSqrt64Fx2: op =3D Asse_RSQRTF; goto do_64Fx2_unary;
+ case Iop_Sqrt64Fx2: op =3D Asse_SQRTF; goto do_64Fx2_unary;
+ do_64Fx2_unary:
+ {
+ HReg arg =3D iselVecExpr(env, e->Iex.Unop.arg);
+ HReg dst =3D newVRegV(env);
+ addInstr(env, AMD64Instr_Sse64Fx2(op, arg, dst));
+ return dst;
+ }
=20
case Iop_Recip32F0x4: op =3D Asse_RCPF; goto do_32F0x4_unary;
case Iop_RSqrt32F0x4: op =3D Asse_RSQRTF; goto do_32F0x4_unary;
@@ -3317,9 +3316,9 @@
return dst;
}
=20
-//.. case Iop_CmpEQ64Fx2: op =3D Xsse_CMPEQF; goto do_64Fx2;
-//.. case Iop_CmpLT64Fx2: op =3D Xsse_CMPLTF; goto do_64Fx2;
-//.. case Iop_CmpLE64Fx2: op =3D Xsse_CMPLEF; goto do_64Fx2;
+ case Iop_CmpEQ64Fx2: op =3D Asse_CMPEQF; goto do_64Fx2;
+ case Iop_CmpLT64Fx2: op =3D Asse_CMPLTF; goto do_64Fx2;
+ case Iop_CmpLE64Fx2: op =3D Asse_CMPLEF; goto do_64Fx2;
case Iop_Add64Fx2: op =3D Asse_ADDF; goto do_64Fx2;
//.. case Iop_Div64Fx2: op =3D Xsse_DIVF; goto do_64Fx2;
//.. case Iop_Max64Fx2: op =3D Xsse_MAXF; goto do_64Fx2;
@@ -3372,37 +3371,37 @@
return dst;
}
=20
-//.. case Iop_QNarrow32Sx4:=20
-//.. op =3D Xsse_PACKSSD; arg1isEReg =3D True; goto do_SseReRg;
-//.. case Iop_QNarrow16Sx8:=20
-//.. op =3D Xsse_PACKSSW; arg1isEReg =3D True; goto do_SseReRg;
-//.. case Iop_QNarrow16Ux8:=20
-//.. op =3D Xsse_PACKUSW; arg1isEReg =3D True; goto do_SseReRg;
-//..=20
-//.. case Iop_InterleaveHI8x16:=20
-//.. op =3D Xsse_UNPCKHB; arg1isEReg =3D True; goto do_SseReRg;
-//.. case Iop_InterleaveHI16x8:=20
-//.. op =3D Xsse_UNPCKHW; arg1isEReg =3D True; goto do_SseReRg;
-//.. case Iop_InterleaveHI32x4:=20
-//.. op =3D Xsse_UNPCKHD; arg1isEReg =3D True; goto do_SseReRg;
-//.. case Iop_InterleaveHI64x2:=20
-//.. op =3D Xsse_UNPCKHQ; arg1isEReg =3D True; goto do_SseReRg;
-//..=20
-//.. case Iop_InterleaveLO8x16:=20
-//.. op =3D Xsse_UNPCKLB; arg1isEReg =3D True; goto do_SseReRg;
-//.. case Iop_InterleaveLO16x8:=20
-//.. op =3D Xsse_UNPCKLW; arg1isEReg =3D True; goto do_SseReRg;
-//.. case Iop_InterleaveLO32x4:=20
-//.. op =3D Xsse_UNPCKLD; arg1isEReg =3D True; goto do_SseReRg;
-//.. case Iop_InterleaveLO64x2:=20
-//.. op =3D Xsse_UNPCKLQ; arg1isEReg =3D True; goto do_SseReRg;
-//..=20
+ case Iop_QNarrow32Sx4:=20
+ op =3D Asse_PACKSSD; arg1isEReg =3D True; goto do_SseReRg;
+ case Iop_QNarrow16Sx8:=20
+ op =3D Asse_PACKSSW; arg1isEReg =3D True; goto do_SseReRg;
+ case Iop_QNarrow16Ux8:=20
+ op =3D Asse_PACKUSW; arg1isEReg =3D True; goto do_SseReRg;
+
+ case Iop_InterleaveHI8x16:=20
+ op =3D Asse_UNPCKHB; arg1isEReg =3D True; goto do_SseReRg;
+ case Iop_InterleaveHI16x8:=20
+ op =3D Asse_UNPCKHW; arg1isEReg =3D True; goto do_SseReRg;
+ case Iop_InterleaveHI32x4:=20
+ op =3D Asse_UNPCKHD; arg1isEReg =3D True; goto do_SseReRg;
+ case Iop_InterleaveHI64x2:=20
+ op =3D Asse_UNPCKHQ; arg1isEReg =3D True; goto do_SseReRg;
+
+ case Iop_InterleaveLO8x16:=20
+ op =3D Asse_UNPCKLB; arg1isEReg =3D True; goto do_SseReRg;
+ case Iop_InterleaveLO16x8:=20
+ op =3D Asse_UNPCKLW; arg1isEReg =3D True; goto do_SseReRg;
+ case Iop_InterleaveLO32x4:=20
+ op =3D Asse_UNPCKLD; arg1isEReg =3D True; goto do_SseReRg;
+ case Iop_InterleaveLO64x2:=20
+ op =3D Asse_UNPCKLQ; arg1isEReg =3D True; goto do_SseReRg;
+
case Iop_AndV128: op =3D Asse_AND; goto do_SseReRg;
case Iop_OrV128: op =3D Asse_OR; goto do_SseReRg;
case Iop_XorV128: op =3D Asse_XOR; goto do_SseReRg;
-//.. case Iop_Add8x16: op =3D Xsse_ADD8; goto do_SseReRg;
+ case Iop_Add8x16: op =3D Asse_ADD8; goto do_SseReRg;
//.. case Iop_Add16x8: op =3D Xsse_ADD16; goto do_SseReRg;
-//.. case Iop_Add32x4: op =3D Xsse_ADD32; goto do_SseReRg;
+ case Iop_Add32x4: op =3D Asse_ADD32; goto do_SseReRg;
case Iop_Add64x2: op =3D Asse_ADD64; goto do_SseReRg;
//.. case Iop_QAdd8Sx16: op =3D Xsse_QADD8S; goto do_SseReRg;
//.. case Iop_QAdd16Sx8: op =3D Xsse_QADD16S; goto do_SseReRg;
@@ -3423,20 +3422,19 @@
//.. case Iop_MulHi16Ux8: op =3D Xsse_MULHI16U; goto do_SseReRg;
//.. case Iop_MulHi16Sx8: op =3D Xsse_MULHI16S; goto do_SseReRg;
//.. case Iop_Mul16x8: op =3D Xsse_MUL16; goto do_SseReRg;
-//.. case Iop_Sub8x16: op =3D Xsse_SUB8; goto do_SseReRg;
-//.. case Iop_Sub16x8: op =3D Xsse_SUB16; goto do_SseReRg;
-//.. case Iop_Sub32x4: op =3D Xsse_SUB32; goto do_SseReRg;
+ case Iop_Sub8x16: op =3D Asse_SUB8; goto do_SseReRg;
+ case Iop_Sub16x8: op =3D Asse_SUB16; goto do_SseReRg;
+ case Iop_Sub32x4: op =3D Asse_SUB32; goto do_SseReRg;
case Iop_Sub64x2: op =3D Asse_SUB64; goto do_SseReRg;
-//.. case Iop_QSub8Sx16: op =3D Xsse_QSUB8S; goto do_SseReRg;
-//.. case Iop_QSub16Sx8: op =3D Xsse_QSUB16S; goto do_SseReRg;
-//.. case Iop_QSub8Ux16: op =3D Xsse_QSUB8U; goto do_SseReRg;
-//.. case Iop_QSub16Ux8: op =3D Xsse_QSUB16U; goto do_SseReRg;
+ case Iop_QSub8Sx16: op =3D Asse_QSUB8S; goto do_SseReRg;
+ case Iop_QSub16Sx8: op =3D Asse_QSUB16S; goto do_SseReRg;
+ case Iop_QSub8Ux16: op =3D Asse_QSUB8U; goto do_SseReRg;
+ case Iop_QSub16Ux8: op =3D Asse_QSUB16U; goto do_SseReRg;
do_SseReRg: {
HReg arg1 =3D iselVecExpr(env, e->Iex.Binop.arg1);
HReg arg2 =3D iselVecExpr(env, e->Iex.Binop.arg2);
HReg dst =3D newVRegV(env);
if (arg1isEReg) {
- goto vec_fail; /* awaiting test case */
addInstr(env, mk_vMOVsd_RR(arg2, dst));
addInstr(env, AMD64Instr_SseReRg(op, arg1, dst));
} else {
|
|
From: Oswald B. <os...@kd...> - 2005-05-10 21:03:11
|
On Tue, May 10, 2005 at 02:05:20PM -0500, Nicholas Nethercote wrote: > On Tue, 10 May 2005, Oswald Buddenhagen wrote: > >>I had a thought: what about storing the heap block metadata separate from > >>the heap blocks themselves? > > > >i think freebsd (or some other *bsd) does/did this in the standard > >allocator. so it can't be _that_ a bad idea. ;) > > I see. Do you know how the metadata is stored? Eg. in a hash table, or > something cleverer like a bitmap? > zero idea. i read it in a man page, now i think it was openbsd. but after a first look it seems like it's the same as freebsd anyway. http://www.openbsd.org/cgi-bin/cvsweb/src/lib/libc/stdlib/malloc.c -- Hi! I'm a .signature virus! Copy me into your ~/.signature, please! -- Chaos, panic, and disorder - my work here is done. |
|
From: <sv...@va...> - 2005-05-10 20:08:40
|
Author: sewardj
Date: 2005-05-10 21:08:34 +0100 (Tue, 10 May 2005)
New Revision: 1177
Modified:
trunk/priv/guest-amd64/gdefs.h
trunk/priv/guest-amd64/ghelpers.c
trunk/priv/guest-amd64/toIR.c
trunk/priv/host-amd64/hdefs.c
trunk/priv/host-amd64/isel.c
Log:
First pass through SSE1 instructions.
Modified: trunk/priv/guest-amd64/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-amd64/gdefs.h 2005-05-10 02:50:05 UTC (rev 1176)
+++ trunk/priv/guest-amd64/gdefs.h 2005-05-10 20:08:34 UTC (rev 1177)
@@ -117,8 +117,8 @@
=20
extern ULong amd64g_calculate_mmx_pmaddwd ( ULong, ULong );
extern ULong amd64g_calculate_mmx_psadbw ( ULong, ULong );
-extern UInt amd64g_calculate_mmx_pmovmskb ( ULong );
-extern UInt amd64g_calculate_sse_pmovmskb ( ULong w64hi, ULong w64lo );
+extern ULong amd64g_calculate_mmx_pmovmskb ( ULong );
+extern ULong amd64g_calculate_sse_pmovmskb ( ULong w64hi, ULong w64lo );
=20
=20
/* --- DIRTY HELPERS --- */
Modified: trunk/priv/guest-amd64/ghelpers.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-amd64/ghelpers.c 2005-05-10 02:50:05 UTC (rev 1176)
+++ trunk/priv/guest-amd64/ghelpers.c 2005-05-10 20:08:34 UTC (rev 1177)
@@ -1387,6 +1387,10 @@
/*--- Helpers for MMX/SSE/SSE2. ---*/
/*---------------------------------------------------------------*/
=20
+static inline UChar abdU8 ( UChar xx, UChar yy ) {
+ return toUChar(xx>yy ? xx-yy : yy-xx);
+}
+
static inline ULong mk32x2 ( UInt w1, UInt w0 ) {
return (((ULong)w1) << 32) | ((ULong)w0);
}
@@ -1408,6 +1412,39 @@
return toUShort(lo32);
}
=20
+static inline UChar sel8x8_7 ( ULong w64 ) {
+ UInt hi32 =3D toUInt(w64 >> 32);
+ return toUChar(hi32 >> 24);
+}
+static inline UChar sel8x8_6 ( ULong w64 ) {
+ UInt hi32 =3D toUInt(w64 >> 32);
+ return toUChar(hi32 >> 16);
+}
+static inline UChar sel8x8_5 ( ULong w64 ) {
+ UInt hi32 =3D toUInt(w64 >> 32);
+ return toUChar(hi32 >> 8);
+}
+static inline UChar sel8x8_4 ( ULong w64 ) {
+ UInt hi32 =3D toUInt(w64 >> 32);
+ return toUChar(hi32 >> 0);
+}
+static inline UChar sel8x8_3 ( ULong w64 ) {
+ UInt lo32 =3D toUInt(w64);
+ return toUChar(lo32 >> 24);
+}
+static inline UChar sel8x8_2 ( ULong w64 ) {
+ UInt lo32 =3D toUInt(w64);
+ return toUChar(lo32 >> 16);
+}
+static inline UChar sel8x8_1 ( ULong w64 ) {
+ UInt lo32 =3D toUInt(w64);
+ return toUChar(lo32 >> 8);
+}
+static inline UChar sel8x8_0 ( ULong w64 ) {
+ UInt lo32 =3D toUInt(w64);
+ return toUChar(lo32 >> 0);
+}
+
/* CALLED FROM GENERATED CODE: CLEAN HELPER */
ULong amd64g_calculate_mmx_pmaddwd ( ULong xx, ULong yy )
{
@@ -1420,7 +1457,38 @@
);
}
=20
+/* CALLED FROM GENERATED CODE: CLEAN HELPER */
+ULong amd64g_calculate_mmx_pmovmskb ( ULong xx )
+{
+ ULong r =3D 0;
+ if (xx & (1ULL << (64-1))) r |=3D (1<<7);
+ if (xx & (1ULL << (56-1))) r |=3D (1<<6);
+ if (xx & (1ULL << (48-1))) r |=3D (1<<5);
+ if (xx & (1ULL << (40-1))) r |=3D (1<<4);
+ if (xx & (1ULL << (32-1))) r |=3D (1<<3);
+ if (xx & (1ULL << (24-1))) r |=3D (1<<2);
+ if (xx & (1ULL << (16-1))) r |=3D (1<<1);
+ if (xx & (1ULL << ( 8-1))) r |=3D (1<<0);
+ return r;
+}
=20
+/* CALLED FROM GENERATED CODE: CLEAN HELPER */
+ULong amd64g_calculate_mmx_psadbw ( ULong xx, ULong yy )
+{
+ UInt t =3D 0;
+ t +=3D (UInt)abdU8( sel8x8_7(xx), sel8x8_7(yy) );
+ t +=3D (UInt)abdU8( sel8x8_6(xx), sel8x8_6(yy) );
+ t +=3D (UInt)abdU8( sel8x8_5(xx), sel8x8_5(yy) );
+ t +=3D (UInt)abdU8( sel8x8_4(xx), sel8x8_4(yy) );
+ t +=3D (UInt)abdU8( sel8x8_3(xx), sel8x8_3(yy) );
+ t +=3D (UInt)abdU8( sel8x8_2(xx), sel8x8_2(yy) );
+ t +=3D (UInt)abdU8( sel8x8_1(xx), sel8x8_1(yy) );
+ t +=3D (UInt)abdU8( sel8x8_0(xx), sel8x8_0(yy) );
+ t &=3D 0xFFFF;
+ return (ULong)t;
+}
+
+
/*---------------------------------------------------------------*/
/*--- Helpers for dealing with, and describing, ---*/
/*--- guest state as a whole. ---*/
Modified: trunk/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-amd64/toIR.c 2005-05-10 02:50:05 UTC (rev 1176)
+++ trunk/priv/guest-amd64/toIR.c 2005-05-10 20:08:34 UTC (rev 1177)
@@ -1200,6 +1200,22 @@
}
=20
=20
+/* Simplistic functions to deal with the lower quarters of integer
+ registers as a straightforward bank of 16 16-bit regs. */
+
+static IRExpr* getIReg16 ( UInt regno )
+{
+ vassert(!host_is_bigendian);
+ return IRExpr_Get( integerGuestReg64Offset(regno),
+ Ity_I16 );
+}
+
+static HChar* nameIReg16 ( UInt regno )
+{
+ return nameIReg( 2, regno, False );
+}
+
+
/* Sometimes what we know is a 3-bit register number, a REX byte, and
which field of the REX byte is to be used to extend to a 4-bit
number. These functions cater for that situation. =20
@@ -5948,7 +5964,7 @@
case 0xEA: op =3D Iop_Min16Sx4; break;
case 0xDA: op =3D Iop_Min8Ux8; break;
case 0xE4: op =3D Iop_MulHi16Ux4; break;
- // case 0xF6: XXX(x86g_calculate_mmx_psadbw); break;
+ case 0xF6: XXX(amd64g_calculate_mmx_psadbw); break;
=20
/* Introduced in SSE2 */
case 0xD4: op =3D Iop_Add64; break;
@@ -7389,79 +7405,79 @@
}
=20
=20
-//.. /* All lanes unary SSE operation, G =3D op(E). */
-//..=20
-//.. static UInt dis_SSE_E_to_G_unary_all (=20
-//.. UChar sorb, ULong delta,=20
-//.. HChar* opname, IROp op
-//.. )
-//.. {
-//.. HChar dis_buf[50];
-//.. Int alen;
-//.. IRTemp addr;
-//.. UChar rm =3D getUChar(delta);
-//.. if (epartIsReg(rm)) {
-//.. putXMMReg( gregOfRM(rm),=20
-//.. unop(op, getXMMReg(eregOfRM(rm))) );
-//.. DIP("%s %s,%s\n", opname,
-//.. nameXMMReg(eregOfRM(rm)),
-//.. nameXMMReg(gregOfRM(rm)) );
-//.. return delta+1;
-//.. } else {
-//.. addr =3D disAMode ( &alen, sorb, delta, dis_buf );
-//.. putXMMReg( gregOfRM(rm),=20
-//.. unop(op, loadLE(Ity_V128, mkexpr(addr))) );
-//.. DIP("%s %s,%s\n", opname,
-//.. dis_buf,
-//.. nameXMMReg(gregOfRM(rm)) );
-//.. return delta+alen;
-//.. }
-//.. }
-//..=20
-//..=20
-//.. /* Lowest 32-bit lane only unary SSE operation, G =3D op(E). */
-//..=20
-//.. static UInt dis_SSE_E_to_G_unary_lo32 (=20
-//.. UChar sorb, ULong delta,=20
-//.. HChar* opname, IROp op
-//.. )
-//.. {
-//.. /* First we need to get the old G value and patch the low 32 bit=
s
-//.. of the E operand into it. Then apply op and write back to G.=
*/
-//.. HChar dis_buf[50];
-//.. Int alen;
-//.. IRTemp addr;
-//.. UChar rm =3D getUChar(delta);
-//.. IRTemp oldG0 =3D newTemp(Ity_V128);
-//.. IRTemp oldG1 =3D newTemp(Ity_V128);
-//..=20
-//.. assign( oldG0, getXMMReg(gregOfRM(rm)) );
-//..=20
-//.. if (epartIsReg(rm)) {
-//.. assign( oldG1,=20
-//.. binop( Iop_Set128lo32,
-//.. mkexpr(oldG0),
-//.. getXMMRegLane32(eregOfRM(rm), 0)) );
-//.. putXMMReg( gregOfRM(rm), unop(op, mkexpr(oldG1)) );
-//.. DIP("%s %s,%s\n", opname,
-//.. nameXMMReg(eregOfRM(rm)),
-//.. nameXMMReg(gregOfRM(rm)) );
-//.. return delta+1;
-//.. } else {
-//.. addr =3D disAMode ( &alen, sorb, delta, dis_buf );
-//.. assign( oldG1,=20
-//.. binop( Iop_Set128lo32,
-//.. mkexpr(oldG0),
-//.. loadLE(Ity_I32, mkexpr(addr)) ));
-//.. putXMMReg( gregOfRM(rm), unop(op, mkexpr(oldG1)) );
-//.. DIP("%s %s,%s\n", opname,
-//.. dis_buf,
-//.. nameXMMReg(gregOfRM(rm)) );
-//.. return delta+alen;
-//.. }
-//.. }
+/* All lanes unary SSE operation, G =3D op(E). */
=20
+static ULong dis_SSE_E_to_G_unary_all (=20
+ Prefix pfx, ULong delta,=20
+ HChar* opname, IROp op
+ )
+{
+ HChar dis_buf[50];
+ Int alen;
+ IRTemp addr;
+ UChar rm =3D getUChar(delta);
+ if (epartIsReg(rm)) {
+ putXMMReg( gregOfRexRM(pfx,rm),=20
+ unop(op, getXMMReg(eregOfRexRM(pfx,rm))) );
+ DIP("%s %s,%s\n", opname,
+ nameXMMReg(eregOfRexRM(pfx,rm)),
+ nameXMMReg(gregOfRexRM(pfx,rm)) );
+ return delta+1;
+ } else {
+ addr =3D disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ putXMMReg( gregOfRexRM(pfx,rm),=20
+ unop(op, loadLE(Ity_V128, mkexpr(addr))) );
+ DIP("%s %s,%s\n", opname,
+ dis_buf,
+ nameXMMReg(gregOfRexRM(pfx,rm)) );
+ return delta+alen;
+ }
+}
=20
+
+/* Lowest 32-bit lane only unary SSE operation, G =3D op(E). */
+
+static ULong dis_SSE_E_to_G_unary_lo32 (=20
+ Prefix pfx, ULong delta,=20
+ HChar* opname, IROp op
+ )
+{
+ /* First we need to get the old G value and patch the low 32 bits
+ of the E operand into it. Then apply op and write back to G. */
+ HChar dis_buf[50];
+ Int alen;
+ IRTemp addr;
+ UChar rm =3D getUChar(delta);
+ IRTemp oldG0 =3D newTemp(Ity_V128);
+ IRTemp oldG1 =3D newTemp(Ity_V128);
+
+ assign( oldG0, getXMMReg(gregOfRexRM(pfx,rm)) );
+
+ if (epartIsReg(rm)) {
+ assign( oldG1,=20
+ binop( Iop_SetV128lo32,
+ mkexpr(oldG0),
+ getXMMRegLane32(eregOfRexRM(pfx,rm), 0)) );
+ putXMMReg( gregOfRexRM(pfx,rm), unop(op, mkexpr(oldG1)) );
+ DIP("%s %s,%s\n", opname,
+ nameXMMReg(eregOfRexRM(pfx,rm)),
+ nameXMMReg(gregOfRexRM(pfx,rm)) );
+ return delta+1;
+ } else {
+ addr =3D disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ assign( oldG1,=20
+ binop( Iop_SetV128lo32,
+ mkexpr(oldG0),
+ loadLE(Ity_I32, mkexpr(addr)) ));
+ putXMMReg( gregOfRexRM(pfx,rm), unop(op, mkexpr(oldG1)) );
+ DIP("%s %s,%s\n", opname,
+ dis_buf,
+ nameXMMReg(gregOfRexRM(pfx,rm)) );
+ return delta+alen;
+ }
+}
+
+
/* Lowest 64-bit lane only unary SSE operation, G =3D op(E). */
=20
static ULong dis_SSE_E_to_G_unary_lo64 (=20
@@ -7796,85 +7812,85 @@
unop(Iop_32Uto64,sseround) ) );
}
=20
-//.. /* Break a 128-bit value up into four 32-bit ints. */
-//..=20
-//.. static void breakup128to32s ( IRTemp t128,
-//.. /*OUTs*/
-//.. IRTemp* t3, IRTemp* t2,
-//.. IRTemp* t1, IRTemp* t0 )
-//.. {
-//.. IRTemp hi64 =3D newTemp(Ity_I64);
-//.. IRTemp lo64 =3D newTemp(Ity_I64);
-//.. assign( hi64, unop(Iop_128HIto64, mkexpr(t128)) );
-//.. assign( lo64, unop(Iop_128to64, mkexpr(t128)) );
-//..=20
-//.. vassert(t0 && *t0 =3D=3D IRTemp_INVALID);
-//.. vassert(t1 && *t1 =3D=3D IRTemp_INVALID);
-//.. vassert(t2 && *t2 =3D=3D IRTemp_INVALID);
-//.. vassert(t3 && *t3 =3D=3D IRTemp_INVALID);
-//..=20
-//.. *t0 =3D newTemp(Ity_I32);
-//.. *t1 =3D newTemp(Ity_I32);
-//.. *t2 =3D newTemp(Ity_I32);
-//.. *t3 =3D newTemp(Ity_I32);
-//.. assign( *t0, unop(Iop_64to32, mkexpr(lo64)) );
-//.. assign( *t1, unop(Iop_64HIto32, mkexpr(lo64)) );
-//.. assign( *t2, unop(Iop_64to32, mkexpr(hi64)) );
-//.. assign( *t3, unop(Iop_64HIto32, mkexpr(hi64)) );
-//.. }
-//..=20
-//.. /* Construct a 128-bit value from four 32-bit ints. */
-//..=20
-//.. static IRExpr* mk128from32s ( IRTemp t3, IRTemp t2,
-//.. IRTemp t1, IRTemp t0 )
-//.. {
-//.. return
-//.. binop( Iop_64HLto128,
-//.. binop(Iop_32HLto64, mkexpr(t3), mkexpr(t2)),
-//.. binop(Iop_32HLto64, mkexpr(t1), mkexpr(t0))
-//.. );
-//.. }
-//..=20
-//.. /* Break a 64-bit value up into four 16-bit ints. */
-//..=20
-//.. static void breakup64to16s ( IRTemp t64,
-//.. /*OUTs*/
-//.. IRTemp* t3, IRTemp* t2,
-//.. IRTemp* t1, IRTemp* t0 )
-//.. {
-//.. IRTemp hi32 =3D newTemp(Ity_I32);
-//.. IRTemp lo32 =3D newTemp(Ity_I32);
-//.. assign( hi32, unop(Iop_64HIto32, mkexpr(t64)) );
-//.. assign( lo32, unop(Iop_64to32, mkexpr(t64)) );
-//..=20
-//.. vassert(t0 && *t0 =3D=3D IRTemp_INVALID);
-//.. vassert(t1 && *t1 =3D=3D IRTemp_INVALID);
-//.. vassert(t2 && *t2 =3D=3D IRTemp_INVALID);
-//.. vassert(t3 && *t3 =3D=3D IRTemp_INVALID);
-//..=20
-//.. *t0 =3D newTemp(Ity_I16);
-//.. *t1 =3D newTemp(Ity_I16);
-//.. *t2 =3D newTemp(Ity_I16);
-//.. *t3 =3D newTemp(Ity_I16);
-//.. assign( *t0, unop(Iop_32to16, mkexpr(lo32)) );
-//.. assign( *t1, unop(Iop_32HIto16, mkexpr(lo32)) );
-//.. assign( *t2, unop(Iop_32to16, mkexpr(hi32)) );
-//.. assign( *t3, unop(Iop_32HIto16, mkexpr(hi32)) );
-//.. }
-//..=20
-//.. /* Construct a 64-bit value from four 16-bit ints. */
-//..=20
-//.. static IRExpr* mk64from16s ( IRTemp t3, IRTemp t2,
-//.. IRTemp t1, IRTemp t0 )
-//.. {
-//.. return
-//.. binop( Iop_32HLto64,
-//.. binop(Iop_16HLto32, mkexpr(t3), mkexpr(t2)),
-//.. binop(Iop_16HLto32, mkexpr(t1), mkexpr(t0))
-//.. );
-//.. }
+/* Break a 128-bit value up into four 32-bit ints. */
=20
+static void breakup128to32s ( IRTemp t128,
+ /*OUTs*/
+ IRTemp* t3, IRTemp* t2,
+ IRTemp* t1, IRTemp* t0 )
+{
+ IRTemp hi64 =3D newTemp(Ity_I64);
+ IRTemp lo64 =3D newTemp(Ity_I64);
+ assign( hi64, unop(Iop_V128HIto64, mkexpr(t128)) );
+ assign( lo64, unop(Iop_V128to64, mkexpr(t128)) );
=20
+ vassert(t0 && *t0 =3D=3D IRTemp_INVALID);
+ vassert(t1 && *t1 =3D=3D IRTemp_INVALID);
+ vassert(t2 && *t2 =3D=3D IRTemp_INVALID);
+ vassert(t3 && *t3 =3D=3D IRTemp_INVALID);
+
+ *t0 =3D newTemp(Ity_I32);
+ *t1 =3D newTemp(Ity_I32);
+ *t2 =3D newTemp(Ity_I32);
+ *t3 =3D newTemp(Ity_I32);
+ assign( *t0, unop(Iop_64to32, mkexpr(lo64)) );
+ assign( *t1, unop(Iop_64HIto32, mkexpr(lo64)) );
+ assign( *t2, unop(Iop_64to32, mkexpr(hi64)) );
+ assign( *t3, unop(Iop_64HIto32, mkexpr(hi64)) );
+}
+
+/* Construct a 128-bit value from four 32-bit ints. */
+
+static IRExpr* mk128from32s ( IRTemp t3, IRTemp t2,
+ IRTemp t1, IRTemp t0 )
+{
+ return
+ binop( Iop_64HLtoV128,
+ binop(Iop_32HLto64, mkexpr(t3), mkexpr(t2)),
+ binop(Iop_32HLto64, mkexpr(t1), mkexpr(t0))
+ );
+}
+
+/* Break a 64-bit value up into four 16-bit ints. */
+
+static void breakup64to16s ( IRTemp t64,
+ /*OUTs*/
+ IRTemp* t3, IRTemp* t2,
+ IRTemp* t1, IRTemp* t0 )
+{
+ IRTemp hi32 =3D newTemp(Ity_I32);
+ IRTemp lo32 =3D newTemp(Ity_I32);
+ assign( hi32, unop(Iop_64HIto32, mkexpr(t64)) );
+ assign( lo32, unop(Iop_64to32, mkexpr(t64)) );
+
+ vassert(t0 && *t0 =3D=3D IRTemp_INVALID);
+ vassert(t1 && *t1 =3D=3D IRTemp_INVALID);
+ vassert(t2 && *t2 =3D=3D IRTemp_INVALID);
+ vassert(t3 && *t3 =3D=3D IRTemp_INVALID);
+
+ *t0 =3D newTemp(Ity_I16);
+ *t1 =3D newTemp(Ity_I16);
+ *t2 =3D newTemp(Ity_I16);
+ *t3 =3D newTemp(Ity_I16);
+ assign( *t0, unop(Iop_32to16, mkexpr(lo32)) );
+ assign( *t1, unop(Iop_32HIto16, mkexpr(lo32)) );
+ assign( *t2, unop(Iop_32to16, mkexpr(hi32)) );
+ assign( *t3, unop(Iop_32HIto16, mkexpr(hi32)) );
+}
+
+/* Construct a 64-bit value from four 16-bit ints. */
+
+static IRExpr* mk64from16s ( IRTemp t3, IRTemp t2,
+ IRTemp t1, IRTemp t0 )
+{
+ return
+ binop( Iop_32HLto64,
+ binop(Iop_16HLto32, mkexpr(t3), mkexpr(t2)),
+ binop(Iop_16HLto32, mkexpr(t1), mkexpr(t0))
+ );
+}
+
+
/*------------------------------------------------------------*/
/*--- Disassemble a single instruction ---*/
/*------------------------------------------------------------*/
@@ -7895,7 +7911,7 @@
/*OUT*/ Addr64* whereNext )
{
IRType ty;
- IRTemp addr, t0, t1, t2, t3, t4 /*, t5, t6 */;
+ IRTemp addr, t0, t1, t2, t3, t4, t5, t6;
Int alen;
UChar opc, modrm, /*abyte,*/ pre;
Long d64;
@@ -7923,7 +7939,7 @@
vassert(guest_rip_next_assumed =3D=3D 0);
vassert(guest_rip_next_mustcheck =3D=3D False);
=20
- addr =3D t0 =3D t1 =3D t2 =3D t3 =3D t4 =3D /* t5 =3D t6 =3D */ IRTem=
p_INVALID;=20
+ addr =3D t0 =3D t1 =3D t2 =3D t3 =3D t4 =3D t5 =3D t6 =3D IRTemp_INVA=
LID;=20
=20
DIP("\t0x%llx: ", guest_rip_bbstart+delta);
=20
@@ -8337,10 +8353,10 @@
=20
/* 0F 2D =3D CVTPS2PI -- convert 2 x F32 in mem/low half xmm to 2 x
I32 in mmx, according to prevailing SSE rounding mode */
-//.. /* 0F 2C =3D CVTTPS2PI -- convert 2 x F32 in mem/low half xmm to=
2 x
-//.. I32 in mmx, rounding towards zero */
+ /* 0F 2C =3D CVTTPS2PI -- convert 2 x F32 in mem/low half xmm to 2 x
+ I32 in mmx, rounding towards zero */
if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
- && insn[0] =3D=3D 0x0F && (insn[1] =3D=3D 0x2D /* || insn[1] =3D=3D=
0x2C */)) {
+ && insn[0] =3D=3D 0x0F && (insn[1] =3D=3D 0x2D || insn[1] =3D=3D =
0x2C)) {
IRTemp dst64 =3D newTemp(Ity_I64);
IRTemp rmode =3D newTemp(Ity_I32);
IRTemp f32lo =3D newTemp(Ity_F32);
@@ -8656,77 +8672,80 @@
/* else fall through */
}
=20
-//.. /* 0F 50 =3D MOVMSKPS - move 4 sign bits from 4 x F32 in xmm(E)
-//.. to 4 lowest bits of ireg(G) */
-//.. if (insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x50) {
-//.. modrm =3D getUChar(delta+2);
-//.. if (sz =3D=3D 4 && epartIsReg(modrm)) {
-//.. Int src;
-//.. t0 =3D newTemp(Ity_I32);
-//.. t1 =3D newTemp(Ity_I32);
-//.. t2 =3D newTemp(Ity_I32);
-//.. t3 =3D newTemp(Ity_I32);
-//.. delta +=3D 2+1;
-//.. src =3D eregOfRM(modrm);
-//.. assign( t0, binop( Iop_And32,
-//.. binop(Iop_Shr32, getXMMRegLane32(src,0)=
, mkU8(31)),
-//.. mkU32(1) ));
-//.. assign( t1, binop( Iop_And32,
-//.. binop(Iop_Shr32, getXMMRegLane32(src,1)=
, mkU8(30)),
-//.. mkU32(2) ));
-//.. assign( t2, binop( Iop_And32,
-//.. binop(Iop_Shr32, getXMMRegLane32(src,2)=
, mkU8(29)),
-//.. mkU32(4) ));
-//.. assign( t3, binop( Iop_And32,
-//.. binop(Iop_Shr32, getXMMRegLane32(src,3)=
, mkU8(28)),
-//.. mkU32(8) ));
-//.. putIReg(4, gregOfRM(modrm),
-//.. binop(Iop_Or32,
-//.. binop(Iop_Or32, mkexpr(t0), mkexpr(t1)),
-//.. binop(Iop_Or32, mkexpr(t2), mkexpr(t3))
-//.. )
-//.. );
-//.. DIP("movmskps %s,%s\n", nameXMMReg(src),=20
-//.. nameIReg(4, gregOfRM(modrm)));
-//.. goto decode_success;
-//.. }
-//.. /* else fall through */
-//.. }
-//..=20
-//.. /* 0F 2B =3D MOVNTPS -- for us, just a plain SSE store. */
-//.. if (insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x2B) {
-//.. modrm =3D getUChar(delta+2);
-//.. if (!epartIsReg(modrm)) {
-//.. addr =3D disAMode ( &alen, sorb, delta+2, dis_buf );
-//.. storeLE( mkexpr(addr), getXMMReg(gregOfRM(modrm)) );
-//.. DIP("movntps %s,%s\n", dis_buf,
-//.. nameXMMReg(gregOfRM(modrm)));
-//.. delta +=3D 2+alen;
-//.. goto decode_success;
-//.. }
-//.. /* else fall through */
-//.. }
-//..=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F E7 =3D MOVNTQ -- for us, just a plain MMX store. Note, th=
e
-//.. Intel manual does not say anything about the usual business o=
f
-//.. the FP reg tags getting trashed whenever an MMX insn happens.
-//.. So we just leave them alone.=20
-//.. */
-//.. if (insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xE7) {
-//.. modrm =3D getUChar(delta+2);
-//.. if (sz =3D=3D 4 && !epartIsReg(modrm)) {
-//.. /* do_MMX_preamble(); Intel docs don't specify this */
-//.. addr =3D disAMode ( &alen, sorb, delta+2, dis_buf );
-//.. storeLE( mkexpr(addr), getMMXReg(gregOfRM(modrm)) );
-//.. DIP("movntq %s,%s\n", dis_buf,
-//.. nameMMXReg(gregOfRM(modrm)));
-//.. delta +=3D 2+alen;
-//.. goto decode_success;
-//.. }
-//.. /* else fall through */
-//.. }
+ /* 0F 50 =3D MOVMSKPS - move 4 sign bits from 4 x F32 in xmm(E)
+ to 4 lowest bits of ireg(G) */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x50) {
+ modrm =3D getUChar(delta+2);
+ if (epartIsReg(modrm)) {
+ Int src;
+ t0 =3D newTemp(Ity_I32);
+ t1 =3D newTemp(Ity_I32);
+ t2 =3D newTemp(Ity_I32);
+ t3 =3D newTemp(Ity_I32);
+ delta +=3D 2+1;
+ src =3D eregOfRexRM(pfx,modrm);
+ assign( t0, binop( Iop_And32,
+ binop(Iop_Shr32, getXMMRegLane32(src,0), mkU=
8(31)),
+ mkU32(1) ));
+ assign( t1, binop( Iop_And32,
+ binop(Iop_Shr32, getXMMRegLane32(src,1), mkU=
8(30)),
+ mkU32(2) ));
+ assign( t2, binop( Iop_And32,
+ binop(Iop_Shr32, getXMMRegLane32(src,2), mkU=
8(29)),
+ mkU32(4) ));
+ assign( t3, binop( Iop_And32,
+ binop(Iop_Shr32, getXMMRegLane32(src,3), mkU=
8(28)),
+ mkU32(8) ));
+ putIReg32( gregOfRexRM(pfx,modrm),
+ binop(Iop_Or32,
+ binop(Iop_Or32, mkexpr(t0), mkexpr(t1)),
+ binop(Iop_Or32, mkexpr(t2), mkexpr(t3))
+ )
+ );
+ DIP("movmskps %s,%s\n", nameXMMReg(src),=20
+ nameIReg32(gregOfRexRM(pfx,modrm)));
+ goto decode_success;
+ }
+ /* else fall through */
+ }
=20
+ /* 0F 2B =3D MOVNTPS -- for us, just a plain SSE store. */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x2B) {
+ modrm =3D getUChar(delta+2);
+ if (!epartIsReg(modrm)) {
+ addr =3D disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ storeLE( mkexpr(addr), getXMMReg(gregOfRexRM(pfx,modrm)) );
+ DIP("movntps %s,%s\n", dis_buf,
+ nameXMMReg(gregOfRexRM(pfx,modrm)));
+ delta +=3D 2+alen;
+ goto decode_success;
+ }
+ /* else fall through */
+ }
+
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F E7 =3D MOVNTQ -- for us, just a plain MMX store. Note, the
+ Intel manual does not say anything about the usual business of
+ the FP reg tags getting trashed whenever an MMX insn happens.
+ So we just leave them alone.=20
+ */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xE7) {
+ modrm =3D getUChar(delta+2);
+ if (!epartIsReg(modrm)) {
+ /* do_MMX_preamble(); Intel docs don't specify this */
+ addr =3D disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ storeLE( mkexpr(addr), getMMXReg(gregLO3ofRM(modrm)) );
+ DIP("movntq %s,%s\n", dis_buf,
+ nameMMXReg(gregLO3ofRM(modrm)));
+ delta +=3D 2+alen;
+ goto decode_success;
+ }
+ /* else fall through */
+ }
+
/* F3 0F 10 =3D MOVSS -- move 32 bits from E (mem or lo 1/4 xmm) to G
(lo 1/4 xmm). If E is mem, upper 3/4 of G is zeroed out. */
if (haveF3no66noF2(pfx) && sz =3D=3D 4
@@ -8789,162 +8808,180 @@
goto decode_success;
}
=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F E0 =3D PAVGB -- 8x8 unsigned Packed Average, with rounding=
*/
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xE0) {
-//.. do_MMX_preamble();
-//.. delta =3D dis_MMXop_regmem_to_reg (=20
-//.. sorb, delta+2, insn[1], "pavgb", False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F E3 =3D PAVGW -- 16x4 unsigned Packed Average, with roundin=
g */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xE3) {
-//.. do_MMX_preamble();
-//.. delta =3D dis_MMXop_regmem_to_reg (=20
-//.. sorb, delta+2, insn[1], "pavgw", False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F C5 =3D PEXTRW -- extract 16-bit field from mmx(E) and put=20
-//.. zero-extend of it in ireg(G). */
-//.. if (insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC5) {
-//.. modrm =3D insn[2];
-//.. if (sz =3D=3D 4 && epartIsReg(modrm)) {
-//.. IRTemp sV =3D newTemp(Ity_I64);
-//.. t5 =3D newTemp(Ity_I16);
-//.. do_MMX_preamble();
-//.. assign(sV, getMMXReg(eregOfRM(modrm)));
-//.. breakup64to16s( sV, &t3, &t2, &t1, &t0 );
-//.. switch (insn[3] & 3) {
-//.. case 0: assign(t5, mkexpr(t0)); break;
-//.. case 1: assign(t5, mkexpr(t1)); break;
-//.. case 2: assign(t5, mkexpr(t2)); break;
-//.. case 3: assign(t5, mkexpr(t3)); break;
-//.. default: vassert(0);
-//.. }
-//.. putIReg(4, gregOfRM(modrm), unop(Iop_16Uto32, mkexpr(t5)))=
;
-//.. DIP("pextrw $%d,%s,%s\n",
-//.. (Int)insn[3], nameMMXReg(eregOfRM(modrm)),
-//.. nameIReg(4,gregOfRM(modrm)));
-//.. delta +=3D 4;
-//.. goto decode_success;
-//.. }=20
-//.. /* else fall through */
-//.. }
-//..=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F C4 =3D PINSRW -- get 16 bits from E(mem or low half ireg) =
and
-//.. put it into the specified lane of mmx(G). */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC4) {
-//.. /* Use t0 .. t3 to hold the 4 original 16-bit lanes of the
-//.. mmx reg. t4 is the new lane value. t5 is the original
-//.. mmx value. t6 is the new mmx value. */
-//.. Int lane;
-//.. t4 =3D newTemp(Ity_I16);
-//.. t5 =3D newTemp(Ity_I64);
-//.. t6 =3D newTemp(Ity_I64);
-//.. modrm =3D insn[2];
-//.. do_MMX_preamble();
-//..=20
-//.. assign(t5, getMMXReg(gregOfRM(modrm)));
-//.. breakup64to16s( t5, &t3, &t2, &t1, &t0 );
-//..=20
-//.. if (epartIsReg(modrm)) {
-//.. assign(t4, getIReg(2, eregOfRM(modrm)));
-//.. lane =3D insn[3];
-//.. delta +=3D 2+2;
-//.. DIP("pinsrw $%d,%s,%s\n", (Int)lane,=20
-//.. nameIReg(2,eregOfRM(modrm)),
-//.. nameMMXReg(gregOfRM(modrm)));
-//.. } else {
-//.. /* awaiting test case */
-//.. goto decode_failure;
-//.. }
-//..=20
-//.. switch (lane & 3) {
-//.. case 0: assign(t6, mk64from16s(t3,t2,t1,t4)); break;
-//.. case 1: assign(t6, mk64from16s(t3,t2,t4,t0)); break;
-//.. case 2: assign(t6, mk64from16s(t3,t4,t1,t0)); break;
-//.. case 3: assign(t6, mk64from16s(t4,t2,t1,t0)); break;
-//.. default: vassert(0);
-//.. }
-//.. putMMXReg(gregOfRM(modrm), mkexpr(t6));
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F EE =3D PMAXSW -- 16x4 signed max */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xEE) {
-//.. do_MMX_preamble();
-//.. delta =3D dis_MMXop_regmem_to_reg (=20
-//.. sorb, delta+2, insn[1], "pmaxsw", False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F DE =3D PMAXUB -- 8x8 unsigned max */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xDE) {
-//.. do_MMX_preamble();
-//.. delta =3D dis_MMXop_regmem_to_reg (=20
-//.. sorb, delta+2, insn[1], "pmaxub", False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F EA =3D PMINSW -- 16x4 signed min */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xEA) {
-//.. do_MMX_preamble();
-//.. delta =3D dis_MMXop_regmem_to_reg (=20
-//.. sorb, delta+2, insn[1], "pminsw", False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F DA =3D PMINUB -- 8x8 unsigned min */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xDA) {
-//.. do_MMX_preamble();
-//.. delta =3D dis_MMXop_regmem_to_reg (=20
-//.. sorb, delta+2, insn[1], "pminub", False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F D7 =3D PMOVMSKB -- extract sign bits from each of 8 lanes =
in
-//.. mmx(G), turn them into a byte, and put zero-extend of it in
-//.. ireg(G). */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xD7) {
-//.. modrm =3D insn[2];
-//.. if (epartIsReg(modrm)) {
-//.. do_MMX_preamble();
-//.. t0 =3D newTemp(Ity_I64);
-//.. t1 =3D newTemp(Ity_I32);
-//.. assign(t0, getMMXReg(eregOfRM(modrm)));
-//.. assign(t1, mkIRExprCCall(
-//.. Ity_I32, 0/*regparms*/,=20
-//.. "x86g_calculate_mmx_pmovmskb",
-//.. &x86g_calculate_mmx_pmovmskb,
-//.. mkIRExprVec_1(mkexpr(t0))));
-//.. putIReg(4, gregOfRM(modrm), mkexpr(t1));
-//.. DIP("pmovmskb %s,%s\n", nameMMXReg(eregOfRM(modrm)),
-//.. nameIReg(4,gregOfRM(modrm)));
-//.. delta +=3D 3;
-//.. goto decode_success;
-//.. }=20
-//.. /* else fall through */
-//.. }
-//..=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F E4 =3D PMULUH -- 16x4 hi-half of unsigned widening multipl=
y */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xE4) {
-//.. do_MMX_preamble();
-//.. delta =3D dis_MMXop_regmem_to_reg (=20
-//.. sorb, delta+2, insn[1], "pmuluh", False );
-//.. goto decode_success;
-//.. }
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F E0 =3D PAVGB -- 8x8 unsigned Packed Average, with rounding */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xE0) {
+ do_MMX_preamble();
+ delta =3D dis_MMXop_regmem_to_reg (=20
+ pfx, delta+2, insn[1], "pavgb", False );
+ goto decode_success;
+ }
=20
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F E3 =3D PAVGW -- 16x4 unsigned Packed Average, with rounding */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xE3) {
+ do_MMX_preamble();
+ delta =3D dis_MMXop_regmem_to_reg (=20
+ pfx, delta+2, insn[1], "pavgw", False );
+ goto decode_success;
+ }
+
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F C5 =3D PEXTRW -- extract 16-bit field from mmx(E) and put=20
+ zero-extend of it in ireg(G). */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC5) {
+ modrm =3D insn[2];
+ if (epartIsReg(modrm)) {
+ IRTemp sV =3D newTemp(Ity_I64);
+ t5 =3D newTemp(Ity_I16);
+ do_MMX_preamble();
+ assign(sV, getMMXReg(eregLO3ofRM(modrm)));
+ breakup64to16s( sV, &t3, &t2, &t1, &t0 );
+ switch (insn[3] & 3) {
+ case 0: assign(t5, mkexpr(t0)); break;
+ case 1: assign(t5, mkexpr(t1)); break;
+ case 2: assign(t5, mkexpr(t2)); break;
+ case 3: assign(t5, mkexpr(t3)); break;
+ default: vassert(0);
+ }
+ putIReg32(gregOfRexRM(pfx,modrm), unop(Iop_16Uto32, mkexpr(t5))=
);
+ DIP("pextrw $%d,%s,%s\n",
+ (Int)insn[3], nameMMXReg(eregLO3ofRM(modrm)),
+ nameIReg32(gregOfRexRM(pfx,modrm)));
+ delta +=3D 4;
+ goto decode_success;
+ }=20
+ /* else fall through */
+ /* note, for anyone filling in the mem case: this insn has one
+ byte after the amode and therefore you must pass 1 as the
+ last arg to disAMode */
+ }
+
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F C4 =3D PINSRW -- get 16 bits from E(mem or low half ireg) and
+ put it into the specified lane of mmx(G). */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC4) {
+ /* Use t0 .. t3 to hold the 4 original 16-bit lanes of the
+ mmx reg. t4 is the new lane value. t5 is the original
+ mmx value. t6 is the new mmx value. */
+ Int lane;
+ t4 =3D newTemp(Ity_I16);
+ t5 =3D newTemp(Ity_I64);
+ t6 =3D newTemp(Ity_I64);
+ modrm =3D insn[2];
+ do_MMX_preamble();
+
+ assign(t5, getMMXReg(gregLO3ofRM(modrm)));
+ breakup64to16s( t5, &t3, &t2, &t1, &t0 );
+
+ if (epartIsReg(modrm)) {
+ assign(t4, getIReg16(eregOfRexRM(pfx,modrm)));
+ delta +=3D 3+1;
+ lane =3D insn[3+1-1];
+ DIP("pinsrw $%d,%s,%s\n", (Int)lane,=20
+ nameIReg16(eregOfRexRM(pfx,modrm)),
+ nameMMXReg(gregLO3ofRM(modrm)));
+ } else {
+ addr =3D disAMode ( &alen, pfx, delta+2, dis_buf, 1 );
+ delta +=3D 3+alen;
+ lane =3D insn[3+alen-1];
+ assign(t4, loadLE(Ity_I16, mkexpr(addr)));
+ DIP("pinsrw $%d,%s,%s\n", (Int)lane,
+ dis_buf,
+ nameMMXReg(gregLO3ofRM(modrm)));
+ }
+
+ switch (lane & 3) {
+ case 0: assign(t6, mk64from16s(t3,t2,t1,t4)); break;
+ case 1: assign(t6, mk64from16s(t3,t2,t4,t0)); break;
+ case 2: assign(t6, mk64from16s(t3,t4,t1,t0)); break;
+ case 3: assign(t6, mk64from16s(t4,t2,t1,t0)); break;
+ default: vassert(0);
+ }
+ putMMXReg(gregLO3ofRM(modrm), mkexpr(t6));
+ goto decode_success;
+ }
+
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F EE =3D PMAXSW -- 16x4 signed max */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xEE) {
+ do_MMX_preamble();
+ delta =3D dis_MMXop_regmem_to_reg (=20
+ pfx, delta+2, insn[1], "pmaxsw", False );
+ goto decode_success;
+ }
+
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F DE =3D PMAXUB -- 8x8 unsigned max */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xDE) {
+ do_MMX_preamble();
+ delta =3D dis_MMXop_regmem_to_reg (=20
+ pfx, delta+2, insn[1], "pmaxub", False );
+ goto decode_success;
+ }
+
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F EA =3D PMINSW -- 16x4 signed min */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xEA) {
+ do_MMX_preamble();
+ delta =3D dis_MMXop_regmem_to_reg (=20
+ pfx, delta+2, insn[1], "pminsw", False );
+ goto decode_success;
+ }
+
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F DA =3D PMINUB -- 8x8 unsigned min */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xDA) {
+ do_MMX_preamble();
+ delta =3D dis_MMXop_regmem_to_reg (=20
+ pfx, delta+2, insn[1], "pminub", False );
+ goto decode_success;
+ }
+
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F D7 =3D PMOVMSKB -- extract sign bits from each of 8 lanes in
+ mmx(G), turn them into a byte, and put zero-extend of it in
+ ireg(G). */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xD7) {
+ modrm =3D insn[2];
+ if (epartIsReg(modrm)) {
+ do_MMX_preamble();
+ t0 =3D newTemp(Ity_I64);
+ t1 =3D newTemp(Ity_I64);
+ assign(t0, getMMXReg(eregLO3ofRM(modrm)));
+ assign(t1, mkIRExprCCall(
+ Ity_I64, 0/*regparms*/,=20
+ "amd64g_calculate_mmx_pmovmskb",
+ &amd64g_calculate_mmx_pmovmskb,
+ mkIRExprVec_1(mkexpr(t0))));
+ putIReg32(gregOfRexRM(pfx,modrm), unop(Iop_64to32,mkexpr(t1)));
+ DIP("pmovmskb %s,%s\n", nameMMXReg(eregLO3ofRM(modrm)),
+ nameIReg32(gregOfRexRM(pfx,modrm)));
+ delta +=3D 3;
+ goto decode_success;
+ }=20
+ /* else fall through */
+ }
+
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F E4 =3D PMULUH -- 16x4 hi-half of unsigned widening multiply */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xE4) {
+ do_MMX_preamble();
+ delta =3D dis_MMXop_regmem_to_reg (=20
+ pfx, delta+2, insn[1], "pmuluh", False );
+ goto decode_success;
+ }
+
/* 0F 18 /0 =3D PREFETCHNTA -- prefetch into caches, */
/* 0F 18 /1 =3D PREFETCH0 -- with various different hints */
/* 0F 18 /2 =3D PREFETCH1 */
@@ -8973,89 +9010,88 @@
goto decode_success;
}
=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F F6 =3D PSADBW -- sum of 8Ux8 absolute differences */
-//.. if (insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xF6) {
-//.. vassert(sz =3D=3D 4);
-//.. do_MMX_preamble();
-//.. delta =3D dis_MMXop_regmem_to_reg (=20
-//.. sorb, delta+2, insn[1], "psadbw", False );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
-//.. /* 0F 70 =3D PSHUFW -- rearrange 4x16 from E(mmx or mem) to G(mm=
x) */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x70) {
-//.. Int order;
-//.. IRTemp sV, dV, s3, s2, s1, s0;
-//.. s3 =3D s2 =3D s1 =3D s0 =3D IRTemp_INVALID;
-//.. sV =3D newTemp(Ity_I64);
-//.. dV =3D newTemp(Ity_I64);
-//.. do_MMX_preamble();
-//.. modrm =3D insn[2];
-//.. if (epartIsReg(modrm)) {
-//.. assign( sV, getMMXReg(eregOfRM(modrm)) );
-//.. order =3D (Int)insn[3];
-//.. delta +=3D 2+2;
-//.. DIP("pshufw $%d,%s,%s\n", order,=20
-//.. nameMMXReg(eregOfRM(modrm)),
-//.. nameMMXReg(gregOfRM(modrm)));
-//.. } else {
-//.. addr =3D disAMode ( &alen, sorb, delta+2, dis_buf );
-//.. assign( sV, loadLE(Ity_I64, mkexpr(addr)) );
-//.. order =3D (Int)insn[2+alen];
-//.. delta +=3D 3+alen;
-//.. DIP("pshufw $%d,%s,%s\n", order,=20
-//.. dis_buf,
-//.. nameMMXReg(gregOfRM(modrm)));
-//.. }
-//.. breakup64to16s( sV, &s3, &s2, &s1, &s0 );
-//..=20
-#if 0 /* stop gcc multi-line comment warning */
-/.. # define SEL(n) \
-/.. ((n)=3D=3D0 ? s0 : ((n)=3D=3D1 ? s1 : ((n)=3D=3D2 ? =
s2 : s3)))
-#endif /* stop gcc multi-line comment warning */
-//.. assign(dV,
-//.. mk64from16s( SEL((order>>6)&3), SEL((order>>4)&3),
-//.. SEL((order>>2)&3), SEL((order>>0)&3) )
-//.. );
-//.. putMMXReg(gregOfRM(modrm), mkexpr(dV));
-//.. # undef SEL
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 0F 53 =3D RCPPS -- approx reciprocal 32Fx4 from R/M to R */
-//.. if (insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x53) {
-//.. vassert(sz =3D=3D 4);
-//.. delta =3D dis_SSE_E_to_G_unary_all( sorb, delta+2,=20
-//.. "rcpps", Iop_Recip32Fx4 );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* F3 0F 53 =3D RCPSS -- approx reciprocal 32F0x4 from R/M to R =
*/
-//.. if (insn[0] =3D=3D 0xF3 && insn[1] =3D=3D 0x0F && insn[2] =3D=3D=
0x53) {
-//.. vassert(sz =3D=3D 4);
-//.. delta =3D dis_SSE_E_to_G_unary_lo32( sorb, delta+3,=20
-//.. "rcpss", Iop_Recip32F0x4 )=
;
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 0F 52 =3D RSQRTPS -- approx reciprocal sqrt 32Fx4 from R/M to=
R */
-//.. if (insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x52) {
-//.. vassert(sz =3D=3D 4);
-//.. delta =3D dis_SSE_E_to_G_unary_all( sorb, delta+2,=20
-//.. "rsqrtps", Iop_RSqrt32Fx4 )=
;
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* F3 0F 52 =3D RSQRTSS -- approx reciprocal sqrt 32F0x4 from R/=
M to R */
-//.. if (insn[0] =3D=3D 0xF3 && insn[1] =3D=3D 0x0F && insn[2] =3D=3D=
0x52) {
-//.. vassert(sz =3D=3D 4);
-//.. delta =3D dis_SSE_E_to_G_unary_lo32( sorb, delta+3,=20
-//.. "rsqrtss", Iop_RSqrt32F0x4=
);
-//.. goto decode_success;
-//.. }
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F F6 =3D PSADBW -- sum of 8Ux8 absolute differences */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xF6) {
+ do_MMX_preamble();
+ delta =3D dis_MMXop_regmem_to_reg (=20
+ pfx, delta+2, insn[1], "psadbw", False );
+ goto decode_success;
+ }
=20
+ /* ***--- this is an MMX class insn introduced in SSE1 ---*** */
+ /* 0F 70 =3D PSHUFW -- rearrange 4x16 from E(mmx or mem) to G(mmx) */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x70) {
+ Int order;
+ IRTemp sV, dV, s3, s2, s1, s0;
+ s3 =3D s2 =3D s1 =3D s0 =3D IRTemp_INVALID;
+ sV =3D newTemp(Ity_I64);
+ dV =3D newTemp(Ity_I64);
+ do_MMX_preamble();
+ modrm =3D insn[2];
+ if (epartIsReg(modrm)) {
+ assign( sV, getMMXReg(eregLO3ofRM(modrm)) );
+ order =3D (Int)insn[3];
+ delta +=3D 2+2;
+ DIP("pshufw $%d,%s,%s\n", order,=20
+ nameMMXReg(eregLO3ofRM(modrm)),
+ nameMMXReg(gregLO3ofRM(modrm)));
+ } else {
+ addr =3D disAMode ( &alen, pfx, delta+2, dis_buf,
+ 1/*extra byte after amode*/ );
+ assign( sV, loadLE(Ity_I64, mkexpr(addr)) );
+ order =3D (Int)insn[2+alen];
+ delta +=3D 3+alen;
+ DIP("pshufw $%d,%s,%s\n", order,=20
+ dis_buf,
+ nameMMXReg(gregLO3ofRM(modrm)));
+ }
+ breakup64to16s( sV, &s3, &s2, &s1, &s0 );
+# define SEL(n) \
+ ((n)=3D=3D0 ? s0 : ((n)=3D=3D1 ? s1 : ((n)=3D=3D2 ? s2 :=
s3)))
+ assign(dV,
+ mk64from16s( SEL((order>>6)&3), SEL((order>>4)&3),
+ SEL((order>>2)&3), SEL((order>>0)&3) )
+ );
+ putMMXReg(gregLO3ofRM(modrm), mkexpr(dV));
+# undef SEL
+ goto decode_success;
+ }
+
+ /* 0F 53 =3D RCPPS -- approx reciprocal 32Fx4 from R/M to R */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x53) {
+ delta =3D dis_SSE_E_to_G_unary_all( pfx, delta+2,=20
+ "rcpps", Iop_Recip32Fx4 );
+ goto decode_success;
+ }
+
+ /* F3 0F 53 =3D RCPSS -- approx reciprocal 32F0x4 from R/M to R */
+ if (haveF3no66noF2(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x53) {
+ delta =3D dis_SSE_E_to_G_unary_lo32( pfx, delta+2,=20
+ "rcpss", Iop_Recip32F0x4 );
+ goto decode_success;
+ }
+
+ /* 0F 52 =3D RSQRTPS -- approx reciprocal sqrt 32Fx4 from R/M to R */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x52) {
+ delta =3D dis_SSE_E_to_G_unary_all( pfx, delta+2,=20
+ "rsqrtps", Iop_RSqrt32Fx4 );
+ goto decode_success;
+ }
+
+ /* F3 0F 52 =3D RSQRTSS -- approx reciprocal sqrt 32F0x4 from R/M to =
R */
+ if (haveF3no66noF2(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x52) {
+ delta =3D dis_SSE_E_to_G_unary_lo32( pfx, delta+2,=20
+ "rsqrtss", Iop_RSqrt32F0x4 );
+ goto decode_success;
+ }
+
/* 0F AE /7 =3D SFENCE -- flush pending operations to memory */
if (haveNo66noF2noF3(pfx)=20
&& insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xAE
@@ -9069,67 +9105,70 @@
goto decode_success;
}
=20
-//.. /* 0F C6 /r ib =3D SHUFPS -- shuffle packed F32s */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC6) {
-//.. Int select;
-//.. IRTemp sV, dV;
-//.. IRTemp s3, s2, s1, s0, d3, d2, d1, d0;
-//.. sV =3D newTemp(Ity_V128);
-//.. dV =3D newTemp(Ity_V128);
-//.. s3 =3D s2 =3D s1 =3D s0 =3D d3 =3D d2 =3D d1 =3D d0 =3D IRTem=
p_INVALID;
-//.. modrm =3D insn[2];
-//.. assign( dV, getXMMReg(gregOfRM(modrm)) );
-//..=20
-//.. if (epartIsReg(modrm)) {
-//.. assign( sV, getXMMReg(eregOfRM(modrm)) );
-//.. select =3D (Int)insn[3];
-//.. delta +=3D 2+2;
-//.. DIP("shufps $%d,%s,%s\n", select,=20
-//.. nameXMMReg(eregOfRM(modrm)),
-//.. nameXMMReg(gregOfRM(modrm)));
-//.. } else {
-//.. addr =3D disAMode ( &alen, sorb, delta+2, dis_buf );
-//.. assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
-//.. select =3D (Int)insn[2+alen];
-//.. delta +=3D 3+alen;
-//.. DIP("shufps $%d,%s,%s\n", select,=20
-//.. dis_buf,
-//.. nameXMMReg(gregOfRM(modrm)));
-//.. }
-//..=20
-//.. breakup128to32s( dV, &d3, &d2, &d1, &d0 );
-//.. breakup128to32s( sV, &s3, &s2, &s1, &s0 );
-//..=20
-//.. # define SELD(n) ((n)=3D=3D0 ? d0 : ((n)=3D=3D1 ? d1 : ((n)=3D=3D=
2 ? d2 : d3)))
-//.. # define SELS(n) ((n)=3D=3D0 ? s0 : ((n)=3D=3D1 ? s1 : ((n)=3D=3D=
2 ? s2 : s3)))
-//..=20
-//.. putXMMReg(
-//.. gregOfRM(modrm),=20
-//.. mk128from32s( SELS((select>>6)&3), SELS((select>>4)&3),=20
-//.. SELD((select>>2)&3), SELD((select>>0)&3) )
-//.. );
-//..=20
-//.. # undef SELD
-//.. # undef SELS
-//..=20
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 0F 51 =3D SQRTPS -- approx sqrt 32Fx4 from R/M to R */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x51) {
-//.. delta =3D dis_SSE_E_to_G_unary_all( sorb, delta+2,=20
-//.. "sqrtps", Iop_Sqrt32Fx4 );
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* F3 0F 51 =3D SQRTSS -- approx sqrt 32F0x4 from R/M to R */
-//.. if (insn[0] =3D=3D 0xF3 && insn[1] =3D=3D 0x0F && insn[2] =3D=3D=
0x51) {
-//.. vassert(sz =3D=3D 4);
-//.. delta =3D dis_SSE_E_to_G_unary_lo32( sorb, delta+3,=20
-//.. "sqrtss", Iop_Sqrt32F0x4 )=
;
-//.. goto decode_success;
-//.. }
+ /* 0F C6 /r ib =3D SHUFPS -- shuffle packed F32s */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC6) {
+ Int select;
+ IRTemp sV, dV;
+ IRTemp s3, s2, s1, s0, d3, d2, d1, d0;
+ sV =3D newTemp(Ity_V128);
+ dV =3D newTemp(Ity_V128);
+ s3 =3D s2 =3D s1 =3D s0 =3D d3 =3D d2 =3D d1 =3D d0 =3D IRTemp_INV=
ALID;
+ modrm =3D insn[2];
+ assign( dV, getXMMReg(gregOfRexRM(pfx,modrm)) );
=20
+ if (epartIsReg(modrm)) {
+ assign( sV, getXMMReg(eregOfRexRM(pfx,modrm)) );
+ select =3D (Int)insn[3];
+ delta +=3D 2+2;
+ DIP("shufps $%d,%s,%s\n", select,=20
+ nameXMMReg(eregOfRexRM(pfx,modrm)),
+ nameXMMReg(gregOfRexRM(pfx,modrm)));
+ } else {
+ addr =3D disAMode ( &alen, pfx, delta+2, dis_buf,=20
+ 1/*byte at end of insn*/ );
+ assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
+ select =3D (Int)insn[2+alen];
+ delta +=3D 3+alen;
+ DIP("shufps $%d,%s,%s\n", select,=20
+ dis_buf,
+ nameXMMReg(gregOfRexRM(pfx,modrm)));
+ }
+
+ breakup128to32s( dV, &d3, &d2, &d1, &d0 );
+ breakup128to32s( sV, &s3, &s2, &s1, &s0 );
+
+# define SELD(n) ((n)=3D=3D0 ? d0 : ((n)=3D=3D1 ? d1 : ((n)=3D=3D2 ?=
d2 : d3)))
+# define SELS(n) ((n)=3D=3D0 ? s0 : ((n)=3D=3D1 ? s1 : ((n)=3D=3D2 ?=
s2 : s3)))
+
+ putXMMReg(
+ gregOfRexRM(pfx,modrm),=20
+ mk128from32s( SELS((select>>6)&3), SELS((select>>4)&3),=20
+ SELD((select>>2)&3), SELD((select>>0)&3) )
+ );
+
+# undef SELD
+# undef SELS
+
+ goto decode_success;
+ }
+
+ /* 0F 51 =3D SQRTPS -- approx sqrt 32Fx4 from R/M to R */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x51) {
+ delta =3D dis_SSE_E_to_G_unary_all( pfx, delta+2,=20
+ "sqrtps", Iop_Sqrt32Fx4 );
+ goto decode_success;
+ }
+
+ /* F3 0F 51 =3D SQRTSS -- approx sqrt 32F0x4 from R/M to R */
+ if (haveF3no66noF2(pfx) && sz =3D=3D 4
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x51) {
+ delta =3D dis_SSE_E_to_G_unary_lo32( pfx, delta+2,=20
+ "sqrtss", Iop_Sqrt32F0x4 );
+ goto decode_success;
+ }
+
/* 0F AE /3 =3D STMXCSR m32 -- store %mxcsr */
if (insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xAE
&& haveNo66noF2noF3(pfx)
@@ -9171,46 +9210,47 @@
goto decode_success;
}
=20
-//.. /* 0F 15 =3D UNPCKHPS -- unpack and interleave high part F32s */
-//.. /* 0F 14 =3D UNPCKLPS -- unpack and interleave low part F32s */
-//.. /* These just appear to be special cases of SHUFPS */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && (insn[1] =3D=3D 0x15 |=
| insn[1] =3D=3D 0x14)) {
-//.. IRTemp sV, dV;
-//.. IRTemp s3, s2, s1, s0, d3, d2, d1, d0;
-//.. Bool hi =3D insn[1] =3D=3D 0x15;
-//.. sV =3D newTemp(Ity_V128);
-//.. dV =3D newTemp(Ity_V128);
-//.. s3 =3D s2 =3D s1 =3D s0 =3D d3 =3D d2 =3D d1 =3D d0 =3D IRTem=
p_INVALID;
-//.. modrm =3D insn[2];
-//.. assign( dV, getXMMReg(gregOfRM(modrm)) );
-//..=20
-//.. if (epartIsReg(modrm)) {
-//.. assign( sV, getXMMReg(eregOfRM(modrm)) );
-//.. delta +=3D 2+1;
-//.. DIP("unpck%sps %s,%s\n", hi ? "h" : "l",
-//.. nameXMMReg(eregOfRM(modrm)),
-//.. nameXMMReg(gregOfRM(modrm)));
-//.. } else {
-//.. addr =3D disAMode ( &alen, sorb, delta+2, dis_buf );
-//.. assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
-//.. delta +=3D 2+alen;
-//.. DIP("unpck%sps %s,%s\n", hi ? "h" : "l",
-//.. dis_buf,
-//.. nameXMMReg(gregOfRM(modrm)));
-//.. }
-//..=20
-//.. breakup128to32s( dV, &d3, &d2, &d1, &d0 );
-//.. breakup128to32s( sV, &s3, &s2, &s1, &s0 );
-//..=20
-//.. if (hi) {
-//.. putXMMReg( gregOfRM(modrm), mk128from32s( s3, d3, s2, d2 )=
);
-//.. } else {
-//.. putXMMReg( gregOfRM(modrm), mk128from32s( s1, d1, s0, d0 )=
);
-//.. }
-//..=20
-//.. goto decode_success;
-//.. }
+ /* 0F 15 =3D UNPCKHPS -- unpack and interleave high part F32s */
+ /* 0F 14 =3D UNPCKLPS -- unpack and interleave low part F32s */
+ /* These just appear to be special cases of SHUFPS */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && (insn[1] =3D=3D 0x15 || insn[1] =3D=3D =
0x14)) {
+ IRTemp sV, dV;
+ IRTemp s3, s2, s1, s0, d3, d2, d1, d0;
+ Bool hi =3D insn[1] =3D=3D 0x15;
+ sV =3D newTemp(Ity_V128);
+ dV =3D newTemp(Ity_V128);
+ s3 =3D s2 =3D s1 =3D s0 =3D d3 =3D d2 =3D d1 =3D d0 =3D IRTemp_INV=
ALID;
+ modrm =3D insn[2];
+ assign( dV, getXMMReg(gregOfRexRM(pfx,modrm)) );
=20
+ if (epartIsReg(modrm)) {
+ assign( sV, getXMMReg(eregOfRexRM(pfx,modrm)) );
+ delta +=3D 2+1;
+ DIP("unpck%sps %s,%s\n", hi ? "h" : "l",
+ nameXMMReg(eregOfRexRM(pfx,modrm)),
+ nameXMMReg(gregOfRexRM(pfx,modrm)));
+ } else {
+ addr =3D disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
+ delta +=3D 2+alen;
+ DIP("unpck%sps %s,%s\n", hi ? "h" : "l",
+ dis_buf,
+ nameXMMReg(gregOfRexRM(pfx,modrm)));
+ }
+
+ breakup128to32s( dV, &d3, &d2, &d1, &d0 );
+ breakup128to32s( sV, &s3, &s2, &s1, &s0 );
+
+ if (hi) {
+ putXMMReg( gregOfRexRM(pfx,modrm), mk128from32s( s3, d3, s2, d2=
) );
+ } else {
+ putXMMReg( gregOfRexRM(pfx,modrm), mk128from32s( s1, d1, s0, d0=
) );
+ }
+
+ goto decode_success;
+ }
+
/* 0F 57 =3D XORPS -- G =3D G and E */
if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
&& insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x57) {
Modified: trunk/priv/host-amd64/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/hdefs.c 2005-05-10 02:50:05 UTC (rev 1176)
+++ trunk/priv/host-amd64/hdefs.c 2005-05-10 20:08:34 UTC (rev 1177)
@@ -596,8 +596,8 @@
case Asse_CMPLTF: return "cmpFlt";
case Asse_CMPLEF: return "cmpFle";
case Asse_CMPUNF: return "cmpFun";
-//.. case Xsse_RCPF: return "rcp";
-//.. case Xsse_RSQRTF: return "rsqrt";
+ case Asse_RCPF: return "rcp";
+ case Asse_RSQRTF: return "rsqrt";
case Asse_SQRTF: return "sqrt";
case Asse_AND: return "and";
case Asse_OR: return "or";
@@ -3198,9 +3198,9 @@
case Asse_MAXF: *p++ =3D 0x5F; break;
case Asse_MINF: *p++ =3D 0x5D; break;
case Asse_MULF: *p++ =3D 0x59; break;
- //case Asse_RCPF: *p++ =3D 0x53; break;
- //case Asse_RSQRTF: *p++ =3D 0x52; break;
- //case Asse_SQRTF: *p++ =3D 0x51; break;
+ case Asse_RCPF: *p++ =3D 0x53; break;
+ case Asse_RSQRTF: *p++ =3D 0x52; break;
+ case Asse_SQRTF: *p++ =3D 0x51; break;
case Asse_SUBF: *p++ =3D 0x5C; break;
case Asse_CMPEQF: *p++ =3D 0xC2; xtra =3D 0x100; break;
case Asse_CMPLTF: *p++ =3D 0xC2; xtra =3D 0x101; break;
@@ -3254,9 +3254,9 @@
case Asse_MAXF: *p++ =3D 0x5F; break;
case Asse_MINF: *p++ =3D 0x5D; break;
case Asse_MULF: *p++ =3D 0x59; break;
-//.. case Xsse_RCPF: *p++ =3D 0x53; break;
-//.. case Xsse_RSQRTF: *p++ =3D 0x52; break;
-//.. case Xsse_SQRTF: *p++ =3D 0x51; break;
+ case Asse_RCPF: *p++ =3D 0x53; break;
+ case Asse_RSQRTF: *p++ =3D 0x52; break;
+ case Asse_SQRTF: *p++ =3D 0x51; break;
case Asse_SUBF: *p++ =3D 0x5C; break;
case Asse_CMPEQF: *p++ =3D 0xC2; xtra =3D 0x100; break;
case Asse_CMPLTF: *p++ =3D 0xC2; xtra =3D 0x101; break;
Modified: trunk/priv/host-amd64/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/isel.c 2005-05-10 02:50:05 UTC (rev 1176)
+++ trunk/priv/host-amd64/isel.c 2005-05-10 20:08:34 UTC (rev 1177)
@@ -933,12 +933,12 @@
fn =3D (HWord)h_generic_calc_Add16x4; break;
case Iop_Add32x2:
fn =3D (HWord)h_generic_calc_Add32x2; break;
-//..=20
-//.. case Iop_Avg8Ux8:
-//.. fn =3D (HWord)h_generic_calc_Avg8Ux8; break;
-//.. case Iop_Avg16Ux4:
-//.. fn =3D (HWord)h_generic_calc_Avg16Ux4; break;
=20
+ case Iop_Avg8Ux8:
+ fn =3D (HWord)h_generic_calc_Avg8Ux8; break;
+ case Iop_Avg16Ux4:
+ fn =3D (HWord)h_generic_calc_Avg16Ux4; break;
+
case Iop_CmpEQ8x8:
fn =3D (HWord)h_generic_calc_CmpEQ8x8; break;
case Iop_CmpEQ16x4:
@@ -966,22 +966,22 @@
case Iop_InterleaveLO32x2:
fn =3D (HWord)h_generic_calc_InterleaveLO32x2; break;
=20
-//.. case Iop_Max8Ux8:
-//.. fn =3D (HWord)h_generic_calc_Max8Ux8; break;
-//.. case Iop_Max16Sx4:
-//.. fn =3D (HWord)h_generic_calc_Max16Sx4; break;
-//.. case Iop_Min8Ux8:
-//.. fn =3D (HWord)h_generic_calc_Min8Ux8; break;
-//.. case Iop_Min16Sx4:
-//.. fn =3D (HWord)h_generic_calc_Min16Sx4; break;
+ case Iop_Max8Ux8:
+ fn =3D (HWord)h_generic_calc_Max8Ux8; break;
+ case Iop_Max16Sx4:
+ fn =3D (HWord)h_generic_calc_Max16Sx4; break;
+ case Iop_Min8Ux8:
+ fn =3D (HWord)h_generic_calc_Min8Ux8; break;
+ case Iop_Min16Sx4:
+ fn =3D (HWord)h_generic_calc_Min16Sx4; break;
=20
case Iop_Mul16x4:
fn =3D (HWord)h_generic_calc_Mul16x4; break;
case Iop_MulHi16Sx4:
fn =3D (HWord)h_generic_calc_MulHi16Sx4; break;
-//.. case Iop_MulHi16Ux4:
-//.. fn =3D (HWord)h_generic_calc_MulHi16Ux4; break;
-//..=20
+ case Iop_MulHi16Ux4:
+ fn =3D (HWord)h_generic_calc_MulHi16Ux4; break;
+
case Iop_QAdd8Sx8:
fn =3D (HWord)h_generic_calc_QAdd8Sx8; break;
case Iop_QAdd16Sx4:
@@ -3178,18 +3178,18 @@
//.. addInstr(env, X86Instr_SseReRg(Xsse_XOR, vec1, dst));
//.. return dst;
//.. }
-//..=20
-//.. case Iop_Recip32Fx4: op =3D Xsse_RCPF; goto do_32Fx4_unary;
-//.. case Iop_RSqrt32Fx4: op =3D Xsse_RSQRTF; goto do_32Fx4_unary;
-//.. case Iop_Sqrt32Fx4: op =3D Xsse_SQRTF; goto do_32Fx4_unary;
-//.. do_32Fx4_unary:
-/...
[truncated message content] |
|
From: Nicholas N. <nj...@cs...> - 2005-05-10 19:05:33
|
On Tue, 10 May 2005, Oswald Buddenhagen wrote: >> I had a thought: what about storing the heap block metadata separate from >> the heap blocks themselves? > > i think freebsd (or some other *bsd) does/did this in the standard > allocator. so it can't be _that_ a bad idea. ;) I see. Do you know how the metadata is stored? Eg. in a hash table, or something cleverer like a bitmap? Thanks. N |
|
From: Jeremy F. <je...@go...> - 2005-05-10 18:46:10
|
Nicholas Nethercote wrote:
>> If that wasn't so, wouldn't all hell break loose when 2.4.0
>> runs itself -- since the different V instances would conflict?
>
>
> I guess so. Can someone else confirm... Jeremy?
Yep, there's no possibility of collision. The VG_(*) prefix stuff is
obsolete from that perspective.
J
|
|
From: Oswald B. <os...@kd...> - 2005-05-10 17:06:25
|
On Tue, May 10, 2005 at 08:43:49AM -0500, Nicholas Nethercote wrote: > I had a thought: what about storing the heap block metadata separate from > the heap blocks themselves? > i think freebsd (or some other *bsd) does/did this in the standard allocator. so it can't be _that_ a bad idea. ;) -- Hi! I'm a .signature virus! Copy me into your ~/.signature, please! -- Chaos, panic, and disorder - my work here is done. |
|
From: Nicholas N. <nj...@cs...> - 2005-05-10 13:43:52
|
Hi,
It's possible for a client to trash the metadata associated with a heap
block, causing Valgrind to fail. For example,
#include <stdlib.h>
int main(void)
{
int i;
int* x = malloc(sizeof(int));
for (i = 0; i < 10; i++) {
x[i] = 0;
}
free(x);
x = malloc(sizeof(int));
return 0;
}
causes Memcheck to barf:
==26401== Invalid write of size 4
==26401== at 0x80483FD: main (a.c:8)
==26401== Address 0x1BA3C02C is 0 bytes after a block of size 4 alloc'd
==26401== at 0x1B8FB652: malloc (vg_replace_malloc.c:219)
==26401== by 0x80483E7: main (a.c:5)
valgrind: m_mallocfree.c:157 (mk_plain_bszB): Assertion `bszB != 0' failed.
==26401== at 0xB001E7C9: ???
==26401== by 0xB001E7C8: ???
==26401== by 0xB00127B3: ???
==26401== by 0xB000EB6B: ???
==26401== by 0xB115C2D3: ???
==26401== by 0xB0017242: ???
==26401== by 0xB0016ACA: ???
==26401== by 0xB005B167: ???
and the assertion failure doesn't explain well to the user what's
happened.
Admittedly, because of the redzones this requires a quite substantial heap
block overrun from the user, but it does happen every now and then.
I had a thought: what about storing the heap block metadata separate from
the heap blocks themselves? It seems like a not-bad idea for any
allocator in general, and in Valgrind we'd have the advantage that the
metadata would be in Valgrind's protected address space, untrashable by
the client.
The downside would be that you'd need an extra data structure like a hash
table to hold the metadata, and the insertions and lookups would slow down
allocation and deallocation a bit. But probably not much. You could have
a separate hash table for each arena. You'd want a pretty scalable data
structure to handle potentially many entries (eg. VgHashTable would not
suffice, maybe the skip-list would be ok).
Comments? Maybe I'm just inventing a solution for something that's not
really a problem in the first place.
N
|
|
From: Nicholas N. <nj...@cs...> - 2005-05-10 13:20:16
|
[cc'ing list] On Tue, 10 May 2005, Julian Seward wrote: >> Vex pollutes the global symbol namespace quite a bit, as this shows: >> >> nm -g coregrind/stage2 | grep -v vg | more > > Wow, it does, doesn't it. A lot. > > I guess .. this is not such a problem as it used to be, since > we're no longer sharing the ld.so with the client -- now we have > our own ld.so instance. And so there's no need to avoid collisions > between stage2 and the guest. > > At least, according to my hazy understanding that's so. > > If that wasn't so, wouldn't all hell break loose when 2.4.0 > runs itself -- since the different V instances would conflict? I guess so. Can someone else confirm... Jeremy? N |
|
From: <sv...@va...> - 2005-05-10 13:04:33
|
Author: njn
Date: 2005-05-10 14:04:23 +0100 (Tue, 10 May 2005)
New Revision: 116
Modified:
trunk/gallery/users.html
Log:
Added Carpet.
Modified: trunk/gallery/users.html
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/gallery/users.html 2005-05-05 14:49:48 UTC (rev 115)
+++ trunk/gallery/users.html 2005-05-10 13:04:23 UTC (rev 116)
@@ -195,6 +195,9 @@
a framework for parallel computation and collaborative code
development.</li>
=20
+ <li><a href=3D"http://www.carpetcode.org/">Carpet:</a>
+ a mesh refinement driver for Cactus.</li>
+
<li><a href=3D"http://www.harmonyware.com/">HarmonyWare:</a>
NURBS-based geometry translator tools.</li>
=20
@@ -212,7 +215,7 @@
<li><a href=3D"http://www.parl.clemson.edu/~wjones/research/index.html"=
>Beosim:</a>
a Beowulf grid simulator.</li>
=20
- <li><a href=3D"http://zori.aspuru.com">Zori:</a>
+ <li><a href=3D"http://zori.aspuru.com/">Zori:</a>
a GPL quantum Monte Carlo (QMC) program.</li>
=20
</ul>
|
|
From: <sv...@va...> - 2005-05-10 05:00:59
|
Author: njn Date: 2005-05-10 06:00:55 +0100 (Tue, 10 May 2005) New Revision: 3655 Modified: trunk/coregrind/vg_symtab2.c Log: Forgot a #include line. Modified: trunk/coregrind/vg_symtab2.c =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/coregrind/vg_symtab2.c 2005-05-10 04:56:56 UTC (rev 3654) +++ trunk/coregrind/vg_symtab2.c 2005-05-10 05:00:55 UTC (rev 3655) @@ -34,6 +34,7 @@ #include "vg_symtab2.h" =20 #include "pub_core_aspacemgr.h" +#include "pub_core_demangle.h" #include "pub_core_tooliface.h" =20 #include <elf.h> /* ELF defns */ |
|
From: <sv...@va...> - 2005-05-10 04:57:02
|
Author: njn
Date: 2005-05-10 05:56:56 +0100 (Tue, 10 May 2005)
New Revision: 3654
Added:
trunk/coregrind/m_demangle/
trunk/coregrind/m_demangle/demangle.c
trunk/coregrind/pub_core_demangle.h
Removed:
trunk/coregrind/demangle/
trunk/coregrind/vg_demangle.c
Modified:
trunk/configure.in
trunk/coregrind/Makefile.am
trunk/coregrind/core.h
trunk/coregrind/m_demangle/Makefile.am
Log:
Modularised the demangler into m_demangle. (It very nearly fit our new
module structure as-is.)
Modified: trunk/configure.in
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/configure.in 2005-05-10 04:50:05 UTC (rev 3653)
+++ trunk/configure.in 2005-05-10 04:56:56 UTC (rev 3654)
@@ -393,7 +393,7 @@
include/x86-linux/Makefile=20
auxprogs/Makefile
coregrind/Makefile=20
- coregrind/demangle/Makefile=20
+ coregrind/m_demangle/Makefile=20
coregrind/m_aspacemgr/Makefile=20
coregrind/m_replacemalloc/Makefile=20
coregrind/m_sigframe/Makefile=20
Modified: trunk/coregrind/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/Makefile.am 2005-05-10 04:50:05 UTC (rev 3653)
+++ trunk/coregrind/Makefile.am 2005-05-10 04:56:56 UTC (rev 3654)
@@ -2,7 +2,7 @@
include $(top_srcdir)/Makefile.core-AM_CPPFLAGS.am
=20
MODULES =3D \
- demangle \
+ m_demangle \
m_aspacemgr \
m_replacemalloc \
m_sigframe \
@@ -19,7 +19,7 @@
$(VG_ARCH_ALL) $(VG_OS_ALL) $(VG_PLATFORM_ALL) \
$(MODULES) .
=20
-AM_CPPFLAGS +=3D -DVG_LIBDIR=3D"\"$(valdir)"\" -I$(srcdir)/demangle \
+AM_CPPFLAGS +=3D -DVG_LIBDIR=3D"\"$(valdir)"\" \
-DKICKSTART_BASE=3D@KICKSTART_BASE@
=20
AM_CFLAGS =3D $(WERROR) -Wmissing-prototypes -Winline -Wall -Wshadow -O =
-g @ARCH_CORE_AM_CFLAGS@
@@ -39,6 +39,7 @@
core_asm.h \
pub_core_aspacemgr.h \
pub_core_debuglog.h \
+ pub_core_demangle.h \
pub_core_errormgr.h \
pub_core_execontext.h \
pub_core_mallocfree.h \
@@ -75,7 +76,6 @@
ume.c \
\
vg_scheduler.c \
- vg_demangle.c \
vg_hashtable.c \
vg_main.c \
vg_messages.c \
@@ -95,7 +95,7 @@
=20
## libplatform.a must be before libarch.a and libos.a, it seems.
stage2_extra=3D \
- demangle/libdemangle.a \
+ m_demangle/libdemangle.a \
m_aspacemgr/libaspacemgr.a \
m_sigframe/libsigframe.a \
m_syscalls/libsyscalls.a \
Modified: trunk/coregrind/core.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/core.h 2005-05-10 04:50:05 UTC (rev 3653)
+++ trunk/coregrind/core.h 2005-05-10 04:56:56 UTC (rev 3654)
@@ -718,14 +718,6 @@
extern void VG_(send_bytes_to_logging_sink) ( Char* msg, Int nbytes );
=20
/* ---------------------------------------------------------------------
- Exports of vg_demangle.c
- ------------------------------------------------------------------ */
-
-extern void VG_(demangle) ( Char* orig, Char* result, Int result_size );
-
-extern void VG_(reloc_abs_jump) ( UChar *jmp );
-
-/* ---------------------------------------------------------------------
Exports of vg_translate.c
------------------------------------------------------------------ */
=20
Copied: trunk/coregrind/m_demangle (from rev 3648, trunk/coregrind/demang=
le)
Modified: trunk/coregrind/m_demangle/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/demangle/Makefile.am 2005-05-10 02:47:21 UTC (rev 364=
8)
+++ trunk/coregrind/m_demangle/Makefile.am 2005-05-10 04:56:56 UTC (rev 3=
654)
@@ -18,7 +18,11 @@
noinst_LIBRARIES =3D libdemangle.a
=20
libdemangle_a_SOURCES =3D \
- cp-demangle.c cplus-dem.c dyn-string.c safe-ctype.c
+ cp-demangle.c \
+ cplus-dem.c \
+ demangle.c \
+ dyn-string.c \
+ safe-ctype.c
=20
## Ignore harmless warnings for these ones
cp-demangle.o: CFLAGS +=3D -Wno-unused -Wno-shadow=20
Copied: trunk/coregrind/m_demangle/demangle.c (from rev 3648, trunk/coreg=
rind/vg_demangle.c)
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_demangle.c 2005-05-10 02:47:21 UTC (rev 3648)
+++ trunk/coregrind/m_demangle/demangle.c 2005-05-10 04:56:56 UTC (rev 36=
54)
@@ -0,0 +1,61 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Demangling of C++ mangled names. demangle.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2000-2005 Julian Seward=20
+ js...@ac...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#include "core.h"
+#include "demangle.h"
+
+void VG_(demangle) ( Char* orig, Char* result, Int result_size )
+{
+ Char* demangled =3D NULL;
+
+ VGP_PUSHCC(VgpDemangle);
+
+ if (VG_(clo_demangle))
+ demangled =3D VG_(cplus_demangle) ( orig, DMGL_ANSI | DMGL_PARAMS =
);
+
+ if (demangled) {
+ VG_(strncpy_safely)(result, demangled, result_size);
+ VG_(arena_free) (VG_AR_DEMANGLE, demangled);
+ } else {
+ VG_(strncpy_safely)(result, orig, result_size);
+ }
+
+ // 13 Mar 2005: We used to check here that the demangler wasn't leaki=
ng
+ // by calling the (now-removed) function VG_(is_empty_arena)(). But,
+ // very rarely (ie. I've heard of it twice in 3 years), the demangler
+ // does leak. But, we can't do much about it, and it's not a disaste=
r,
+ // so we just let it slide without aborting or telling the user.
+
+ VGP_POPCC(VgpDemangle);
+}
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
Added: trunk/coregrind/pub_core_demangle.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/pub_core_demangle.h 2005-05-10 04:50:05 UTC (rev 3653=
)
+++ trunk/coregrind/pub_core_demangle.h 2005-05-10 04:56:56 UTC (rev 3654=
)
@@ -0,0 +1,45 @@
+
+/*--------------------------------------------------------------------*/
+/*--- The C++ name demangler. pub_core_demangle.h ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2000-2005 Julian Seward
+ js...@ac...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#ifndef __PUB_CORE_DEMANGLE_H
+#define __PUB_CORE_DEMANGLE_H
+
+//--------------------------------------------------------------------
+// PURPOSE: This module exports a single function for demangling C++
+// names.
+//--------------------------------------------------------------------
+
+extern void VG_(demangle) ( Char* orig, Char* result, Int result_size );
+
+#endif // __PUB_CORE_DEMANGLE_H
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
Deleted: trunk/coregrind/vg_demangle.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_demangle.c 2005-05-10 04:50:05 UTC (rev 3653)
+++ trunk/coregrind/vg_demangle.c 2005-05-10 04:56:56 UTC (rev 3654)
@@ -1,63 +0,0 @@
-
-/*--------------------------------------------------------------------*/
-/*--- Demangling of C++ mangled names. ---*/
-/*--- vg_demangle.c ---*/
-/*--------------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2000-2005 Julian Seward=20
- js...@ac...
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
-#include "core.h"
-#include "demangle.h"
-
-void VG_(demangle) ( Char* orig, Char* result, Int result_size )
-{
- Char* demangled =3D NULL;
-
- VGP_PUSHCC(VgpDemangle);
-
- if (VG_(clo_demangle))
- demangled =3D VG_(cplus_demangle) ( orig, DMGL_ANSI | DMGL_PARAMS =
);
-
- if (demangled) {
- VG_(strncpy_safely)(result, demangled, result_size);
- VG_(arena_free) (VG_AR_DEMANGLE, demangled);
- } else {
- VG_(strncpy_safely)(result, orig, result_size);
- }
-
- // 13 Mar 2005: We used to check here that the demangler wasn't leaki=
ng
- // by calling the (now-removed) function VG_(is_empty_arena)(). But,
- // very rarely (ie. I've heard of it twice in 3 years), the demangler
- // does leak. But, we can't do much about it, and it's not a disaste=
r,
- // so we just let it slide without aborting or telling the user.
-
- VGP_POPCC(VgpDemangle);
-}
-
-
-/*--------------------------------------------------------------------*/
-/*--- end ---*/
-/*--------------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2005-05-10 04:50:10
|
Author: njn
Date: 2005-05-10 05:50:05 +0100 (Tue, 10 May 2005)
New Revision: 3653
Modified:
trunk/coregrind/valgrind.vs
Log:
update properly
Modified: trunk/coregrind/valgrind.vs
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/valgrind.vs 2005-05-10 04:37:01 UTC (rev 3652)
+++ trunk/coregrind/valgrind.vs 2005-05-10 04:50:05 UTC (rev 3653)
@@ -2,7 +2,7 @@
global:
vgPlain_*;
vgTool_*;
- vgPlatform*;
+ vgPlatform_*;
vgArch_*;
*IROp*;
*IRExpr*;
|
Author: njn
Date: 2005-05-10 05:37:01 +0100 (Tue, 10 May 2005)
New Revision: 3652
Added:
trunk/coregrind/m_tooliface.c
trunk/coregrind/pub_core_tooliface.h
trunk/include/pub_tool_tooliface.h
Removed:
trunk/coregrind/vg_needs.c
Modified:
trunk/cachegrind/cg_main.c
trunk/corecheck/cc_main.c
trunk/coregrind/Makefile.am
trunk/coregrind/amd64/state.c
trunk/coregrind/core.h
trunk/coregrind/linux/core_os.c
trunk/coregrind/linux/sema.c
trunk/coregrind/m_aspacemgr/aspacemgr.c
trunk/coregrind/m_errormgr.c
trunk/coregrind/m_sigframe/sigframe-amd64-linux.c
trunk/coregrind/m_sigframe/sigframe-x86-linux.c
trunk/coregrind/m_syscalls/syscalls-amd64-linux.c
trunk/coregrind/m_syscalls/syscalls-linux.c
trunk/coregrind/m_syscalls/syscalls-x86-linux.c
trunk/coregrind/m_syscalls/syscalls.c
trunk/coregrind/pub_core_aspacemgr.h
trunk/coregrind/vg_main.c
trunk/coregrind/vg_mylibc.c
trunk/coregrind/vg_scheduler.c
trunk/coregrind/vg_signals.c
trunk/coregrind/vg_symtab2.c
trunk/coregrind/vg_symtypes.c
trunk/coregrind/vg_translate.c
trunk/coregrind/vg_transtab.c
trunk/coregrind/x86-linux/ldt.c
trunk/coregrind/x86/state.c
trunk/helgrind/hg_main.c
trunk/include/Makefile.am
trunk/include/tool.h
trunk/lackey/lk_main.c
trunk/massif/ms_main.c
trunk/memcheck/mac_shared.h
trunk/none/nl_main.c
Log:
Modularised the core/tool interface ('details', 'needs' and VG_(tdict))
into a new module m_tooliface. Pretty straightforward. Touches a lot
of files because many files use this interface and so need to include
the headers for the new module.
Modified: trunk/cachegrind/cg_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/cachegrind/cg_main.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/cachegrind/cg_main.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -31,6 +31,7 @@
=20
#include "tool.h"
#include "pub_tool_mallocfree.h"
+#include "pub_tool_tooliface.h"
=20
#include "cg_arch.h"
#include "cg_sim.c"
Modified: trunk/corecheck/cc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/corecheck/cc_main.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/corecheck/cc_main.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -30,6 +30,7 @@
*/
=20
#include "tool.h"
+#include "pub_tool_tooliface.h"
=20
static void cc_post_clo_init(void)
{
Modified: trunk/coregrind/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/Makefile.am 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/Makefile.am 2005-05-10 04:37:01 UTC (rev 3652)
@@ -46,6 +46,7 @@
pub_core_sigframe.h \
pub_core_stacktrace.h \
pub_core_syscalls.h \
+ pub_core_tooliface.h \
ume.h \
vg_symtab2.h \
vg_symtypes.h
@@ -65,11 +66,12 @@
valgrind_LDADD=3D
=20
stage2_SOURCES =3D \
+ m_debuglog.c \
m_errormgr.c \
m_execontext.c \
m_mallocfree.c \
m_stacktrace.c \
- m_debuglog.c \
+ m_tooliface.c \
ume.c \
\
vg_scheduler.c \
@@ -78,7 +80,6 @@
vg_main.c \
vg_messages.c \
vg_mylibc.c \
- vg_needs.c \
vg_dummy_profile.c \
vg_signals.c \
vg_symtab2.c \
Modified: trunk/coregrind/amd64/state.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/amd64/state.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/amd64/state.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -7,8 +7,8 @@
This file is part of Valgrind, a dynamic binary instrumentation
framework.
=20
- Copyright (C) 2000-2005 Nicholas Nethercote
- nj...@va...
+ Copyright (C) 2000-2005 Julian Seward
+ js...@ac...
=20
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
@@ -29,6 +29,7 @@
*/
=20
#include "core.h"
+#include "pub_core_tooliface.h"
#include "amd64_private.h"
#include <sys/ptrace.h>
=20
@@ -236,4 +237,3 @@
/*--------------------------------------------------------------------*/
/*--- end ---*/
/*--------------------------------------------------------------------*/
-
Modified: trunk/coregrind/core.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/core.h 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/core.h 2005-05-10 04:37:01 UTC (rev 3652)
@@ -299,165 +299,6 @@
=20
=20
/* ---------------------------------------------------------------------
- Tool-related types
- ------------------------------------------------------------------ */
-/* These structs are not exposed to tools to mitigate possibility of
- binary-incompatibilities when the core/tool interface changes. Inste=
ad,
- set functions are provided (see include/tool.h). */
-typedef
- struct {
- Char* name;
- Char* version;
- Char* description;
- Char* copyright_author;
- Char* bug_reports_to;
- UInt avg_translation_sizeB;
- }
- VgDetails;
-
-extern VgDetails VG_(details);
-
-typedef
- struct {
- Bool libc_freeres;
- Bool core_errors;
- Bool tool_errors;
- Bool basic_block_discards;
- Bool no_longer_used_1; // for backwards compatibility
- Bool command_line_options;
- Bool client_requests;
- Bool no_longer_used_0; // for backwards compatibility
- Bool syscall_wrapper;
- Bool sanity_checks;
- Bool data_syms;
- Bool shadow_memory;
- }=20
- VgNeeds;
-
-extern VgNeeds VG_(needs);
-
-typedef struct {
- // ---------------------------------------------
- // 'Needs' and related functions
- // ---------------------------------------------
- // Basic functions
- void (*tool_pre_clo_init) (void);
- void (*tool_post_clo_init)(void);
- IRBB* (*tool_instrument) (IRBB*, VexGuestLayout*, IRType, IRType);
- void (*tool_fini) (Int);
-
- // VG_(needs).core_errors
- // (none)
- =20
- // VG_(needs).tool_errors
- Bool (*tool_eq_Error) (VgRes, Error*, Error*);
- void (*tool_pp_Error) (Error*);
- UInt (*tool_update_extra) (Error*);
- Bool (*tool_recognised_suppression) (Char*, Supp*);
- Bool (*tool_read_extra_suppression_info) (Int, Char*, Int, Supp*);
- Bool (*tool_error_matches_suppression) (Error*, Supp*);
- Char* (*tool_get_error_name) (Error*);
- void (*tool_print_extra_suppression_info)(Error*);
-
- // VG_(needs).basic_block_discards
- void (*tool_discard_basic_block_info)(Addr, SizeT);
-
- // VG_(needs).command_line_options
- Bool (*tool_process_cmd_line_option)(Char*);
- void (*tool_print_usage) (void);
- void (*tool_print_debug_usage) (void);
-
- // VG_(needs).client_requests
- Bool (*tool_handle_client_request)(ThreadId, UWord*, UWord*);
-
- // VG_(needs).syscall_wrapper
- void (*tool_pre_syscall) (ThreadId, UInt);
- void (*tool_post_syscall)(ThreadId, UInt, Int);
-
- // VG_(needs).sanity_checks
- Bool (*tool_cheap_sanity_check)(void);
- Bool (*tool_expensive_sanity_check)(void);
-
- // ---------------------------------------------
- // Event tracking functions
- // ---------------------------------------------
- void (*track_new_mem_startup) (Addr, SizeT, Bool, Bool, Bool);
- void (*track_new_mem_stack_signal)(Addr, SizeT);
- void (*track_new_mem_brk) (Addr, SizeT);
- void (*track_new_mem_mmap) (Addr, SizeT, Bool, Bool, Bool);
-
- void (*track_copy_mem_remap) (Addr, Addr, SizeT);
- void (*track_change_mem_mprotect) (Addr, SizeT, Bool, Bool, Bool);
- void (*track_die_mem_stack_signal)(Addr, SizeT);
- void (*track_die_mem_brk) (Addr, SizeT);
- void (*track_die_mem_munmap) (Addr, SizeT);
-
- VGA_REGPARM(1) void (*track_new_mem_stack_4) (Addr);
- VGA_REGPARM(1) void (*track_new_mem_stack_8) (Addr);
- VGA_REGPARM(1) void (*track_new_mem_stack_12)(Addr);
- VGA_REGPARM(1) void (*track_new_mem_stack_16)(Addr);
- VGA_REGPARM(1) void (*track_new_mem_stack_32)(Addr);
- void (*track_new_mem_stack)(Addr, SizeT);
-
- VGA_REGPARM(1) void (*track_die_mem_stack_4) (Addr);
- VGA_REGPARM(1) void (*track_die_mem_stack_8) (Addr);
- VGA_REGPARM(1) void (*track_die_mem_stack_12)(Addr);
- VGA_REGPARM(1) void (*track_die_mem_stack_16)(Addr);
- VGA_REGPARM(1) void (*track_die_mem_stack_32)(Addr);
- void (*track_die_mem_stack)(Addr, SizeT);
-
- void (*track_ban_mem_stack)(Addr, SizeT);
-
- void (*track_pre_mem_read) (CorePart, ThreadId, Char*, Addr, Si=
zeT);
- void (*track_pre_mem_read_asciiz)(CorePart, ThreadId, Char*, Addr);
- void (*track_pre_mem_write) (CorePart, ThreadId, Char*, Addr, Si=
zeT);
- void (*track_post_mem_write) (CorePart, ThreadId, Addr, SizeT);
-
- void (*track_pre_reg_read) (CorePart, ThreadId, Char*, OffT, SizeT);
- void (*track_post_reg_write)(CorePart, ThreadId, OffT, SizeT);
- void (*track_post_reg_write_clientcall_return)(ThreadId, OffT, SizeT,=
Addr);
-
- void (*track_thread_run)(ThreadId);
-
- void (*track_post_thread_create)(ThreadId, ThreadId);
- void (*track_post_thread_join) (ThreadId, ThreadId);
-
- void (*track_pre_mutex_lock) (ThreadId, void*);
- void (*track_post_mutex_lock) (ThreadId, void*);
- void (*track_post_mutex_unlock)(ThreadId, void*);
-
- void (*track_pre_deliver_signal) (ThreadId, Int sigNo, Bool);
- void (*track_post_deliver_signal)(ThreadId, Int sigNo);
-
- void (*track_init_shadow_page)(Addr);
-
- // ---------------------------------------------
- // malloc/free replacements
- // ---------------------------------------------
- void* (*malloc_malloc) (ThreadId, SizeT);
- void* (*malloc___builtin_new) (ThreadId, SizeT);
- void* (*malloc___builtin_vec_new) (ThreadId, SizeT);
- void* (*malloc_memalign) (ThreadId, SizeT, SizeT);
- void* (*malloc_calloc) (ThreadId, SizeT, SizeT);
- void (*malloc_free) (ThreadId, void*);
- void (*malloc___builtin_delete) (ThreadId, void*);
- void (*malloc___builtin_vec_delete)(ThreadId, void*);
- void* (*malloc_realloc) (ThreadId, void*, SizeT);
-
-} VgToolInterface;
-
-extern VgToolInterface VG_(tdict);
-
-
-
-/* ---------------------------------------------------------------------
- Exports of vg_needs.c
- ------------------------------------------------------------------ */
-
-void VG_(sanity_check_needs)(void);
-
-
-/* ---------------------------------------------------------------------
Exports of vg_intercept.c
------------------------------------------------------------------ */
=20
@@ -1110,25 +951,6 @@
extern const Int VG_(tramp_gettimeofday_offset);
extern const Int VG_(tramp_time_offset);
=20
-/* ---------------------------------------------------------------------
- Things relating to the used tool
- ------------------------------------------------------------------ */
-
-// Note the use of C's comma operator here -- it means that we execute b=
oth
-// statements, and the rvalue of the whole thing is the rvalue of the la=
st
-// statement. This lets us say "x =3D VG_TDICT_CALL(...)" in the requir=
ed
-// places, while still checking the assertion.
-#define VG_TDICT_CALL(fn, args...) \
- ( tl_assert2(VG_(tdict).fn, \
- "you forgot to set VgToolInterface function '" #fn "'"),=
\
- VG_(tdict).fn(args) )
-
-#define VG_TRACK(fn, args...) \
- do { \
- if (VG_(tdict).track_##fn) \
- VG_(tdict).track_##fn(args); \
- } while(0)
-
// ---------------------------------------------------------------------
// Architecture-specific things defined in eg. x86/*.c
// ---------------------------------------------------------------------
Modified: trunk/coregrind/linux/core_os.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/linux/core_os.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/linux/core_os.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -1,4 +1,35 @@
+
+/*--------------------------------------------------------------------*/
+/*--- OS-specific stuff. linux/core_os.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2000-2005 Nicholas Nethercote
+ nj...@va...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
#include "core.h"
+#include "pub_core_tooliface.h"
=20
void VGA_(os_state_clear)(ThreadState *tst)
{
@@ -169,3 +200,7 @@
=20
return handled;
}
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
Modified: trunk/coregrind/linux/sema.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/linux/sema.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/linux/sema.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -1,3 +1,34 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Semaphore stuff. linux/sema.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2000-2005 Julian Seward
+ js...@ac...
+ (except where noted below)
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
#include "core.h"
=20
#if FUTEX_SEMA
@@ -6,9 +37,8 @@
=20
Taken from futex-2.2/usersem.c
Based on work by Matthew Kirkwood <ma...@ha...>.=20
- */
+*/
=20
-
#define FUTEX_PASSED (-(1024 * 1024 * 1024))
=20
static inline Int sys_futex(Int *futex, Int op, Int val, struct vki_time=
spec *rel)
@@ -110,3 +140,9 @@
}
=20
#endif /* FUTEX_SEMA */
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
+
+
Modified: trunk/coregrind/m_aspacemgr/aspacemgr.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_aspacemgr/aspacemgr.c 2005-05-10 03:01:23 UTC (rev =
3651)
+++ trunk/coregrind/m_aspacemgr/aspacemgr.c 2005-05-10 04:37:01 UTC (rev =
3652)
@@ -33,6 +33,7 @@
#include "core.h"
#include "pub_core_aspacemgr.h"
#include "pub_core_syscalls.h"
+#include "pub_core_tooliface.h"
=20
=20
/* Define to debug the memory-leak-detector. */
Modified: trunk/coregrind/m_errormgr.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_errormgr.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/m_errormgr.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -32,6 +32,7 @@
#include "pub_core_errormgr.h"
#include "pub_core_execontext.h"
#include "pub_core_stacktrace.h"
+#include "pub_core_tooliface.h"
=20
/*------------------------------------------------------------*/
/*--- Globals ---*/
Modified: trunk/coregrind/m_sigframe/sigframe-amd64-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_sigframe/sigframe-amd64-linux.c 2005-05-10 03:01:23=
UTC (rev 3651)
+++ trunk/coregrind/m_sigframe/sigframe-amd64-linux.c 2005-05-10 04:37:01=
UTC (rev 3652)
@@ -30,8 +30,9 @@
*/
=20
#include "core.h"
+#include "pub_core_aspacemgr.h"
#include "pub_core_sigframe.h"
-#include "pub_core_aspacemgr.h"
+#include "pub_core_tooliface.h"
=20
#include "libvex_guest_amd64.h"
=20
Modified: trunk/coregrind/m_sigframe/sigframe-x86-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_sigframe/sigframe-x86-linux.c 2005-05-10 03:01:23 U=
TC (rev 3651)
+++ trunk/coregrind/m_sigframe/sigframe-x86-linux.c 2005-05-10 04:37:01 U=
TC (rev 3652)
@@ -30,10 +30,10 @@
*/
=20
#include "core.h"
+#include "pub_core_aspacemgr.h" /* find_segment */
#include "pub_core_sigframe.h"
-#include "pub_core_aspacemgr.h" /* find_segment */
+#include "pub_core_tooliface.h"
=20
-
#include "libvex_guest_x86.h"
=20
=20
Modified: trunk/coregrind/m_syscalls/syscalls-amd64-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_syscalls/syscalls-amd64-linux.c 2005-05-10 03:01:23=
UTC (rev 3651)
+++ trunk/coregrind/m_syscalls/syscalls-amd64-linux.c 2005-05-10 04:37:01=
UTC (rev 3652)
@@ -33,6 +33,7 @@
#include "pub_core_aspacemgr.h"
#include "pub_core_sigframe.h"
#include "pub_core_syscalls.h"
+#include "pub_core_tooliface.h"
#include "priv_syscalls.h"
=20
=20
Modified: trunk/coregrind/m_syscalls/syscalls-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_syscalls/syscalls-linux.c 2005-05-10 03:01:23 UTC (=
rev 3651)
+++ trunk/coregrind/m_syscalls/syscalls-linux.c 2005-05-10 04:37:01 UTC (=
rev 3652)
@@ -30,6 +30,7 @@
=20
#include "core.h"
#include "pub_core_aspacemgr.h"
+#include "pub_core_tooliface.h"
#include "priv_syscalls.h"
=20
/* ---------------------------------------------------------------------
Modified: trunk/coregrind/m_syscalls/syscalls-x86-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_syscalls/syscalls-x86-linux.c 2005-05-10 03:01:23 U=
TC (rev 3651)
+++ trunk/coregrind/m_syscalls/syscalls-x86-linux.c 2005-05-10 04:37:01 U=
TC (rev 3652)
@@ -38,6 +38,7 @@
#include "pub_core_aspacemgr.h"
#include "pub_core_sigframe.h"
#include "pub_core_syscalls.h"
+#include "pub_core_tooliface.h"
#include "priv_syscalls.h"
=20
=20
Modified: trunk/coregrind/m_syscalls/syscalls.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_syscalls/syscalls.c 2005-05-10 03:01:23 UTC (rev 36=
51)
+++ trunk/coregrind/m_syscalls/syscalls.c 2005-05-10 04:37:01 UTC (rev 36=
52)
@@ -32,6 +32,7 @@
#include "pub_core_aspacemgr.h"
#include "pub_core_stacktrace.h"
#include "pub_core_syscalls.h"
+#include "pub_core_tooliface.h"
#include "priv_syscalls.h"
=20
=20
Copied: trunk/coregrind/m_tooliface.c (from rev 3648, trunk/coregrind/vg_=
needs.c)
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_needs.c 2005-05-10 02:47:21 UTC (rev 3648)
+++ trunk/coregrind/m_tooliface.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -0,0 +1,337 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Stuff relating to tool data structures. ---*/
+/*--- vg_needs.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2000-2005 Nicholas Nethercote
+ nj...@va...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#include "core.h"
+#include "pub_core_tooliface.h"
+
+// The core/tool dictionary of functions (initially zeroed, as we want i=
t)
+VgToolInterface VG_(tdict);
+
+/*--------------------------------------------------------------------*/
+/* Setting basic functions */
+
+void VG_(basic_tool_funcs)(
+ void(*post_clo_init)(void),
+ IRBB*(*instrument)(IRBB*, VexGuestLayout*, IRType, IRType ),
+ void(*fini)(Int)
+)
+{
+ VG_(tdict).tool_post_clo_init =3D post_clo_init;
+ VG_(tdict).tool_instrument =3D instrument;
+ VG_(tdict).tool_fini =3D fini;
+}
+
+
+/*--------------------------------------------------------------------*/
+/* Setting details */
+
+/* Init with default values. */
+VgDetails VG_(details) =3D {
+ .name =3D NULL,
+ .version =3D NULL,
+ .description =3D NULL,
+ .copyright_author =3D NULL,
+ .bug_reports_to =3D NULL,
+ .avg_translation_sizeB =3D VG_DEFAULT_TRANS_SIZEB,
+};
+
+/* Use macro because they're so repetitive */
+#define DETAILS(type, detail) \
+ extern void VG_(details_##detail)(type detail) \
+ { \
+ VG_(details).detail =3D detail; \
+ }
+
+DETAILS(Char*, name)
+DETAILS(Char*, version)
+DETAILS(Char*, description)
+DETAILS(Char*, copyright_author)
+DETAILS(Char*, bug_reports_to)
+DETAILS(UInt, avg_translation_sizeB)
+
+
+/*--------------------------------------------------------------------*/
+/* Setting needs */
+
+VgNeeds VG_(needs) =3D {
+ .core_errors =3D False,
+ .tool_errors =3D False,
+ .libc_freeres =3D False,
+ .basic_block_discards =3D False,
+ .no_longer_used_1 =3D False,
+ .command_line_options =3D False,
+ .client_requests =3D False,
+ .no_longer_used_0 =3D False,
+ .syscall_wrapper =3D False,
+ .sanity_checks =3D False,
+ .data_syms =3D False,
+ .shadow_memory =3D False,
+};
+
+/* static */
+void VG_(sanity_check_needs) ( void)
+{
+#define CHECK_NOT(var, value) \
+ if ((var)=3D=3D(value)) { \
+ VG_(printf)("\nTool error: `%s' not initialised\n", \
+ VG_STRINGIFY(var)); \
+ VG_(tool_panic)("Uninitialised details field\n"); \
+ }
+ =20
+ /* Ones that must be set */
+ CHECK_NOT(VG_(details).name, NULL);
+ /* Nb: .version can be NULL */
+ CHECK_NOT(VG_(details).description, NULL);
+ CHECK_NOT(VG_(details).copyright_author, NULL);
+ CHECK_NOT(VG_(details).bug_reports_to, NULL);
+
+ if ( (VG_(tdict).track_new_mem_stack_4 ||
+ VG_(tdict).track_new_mem_stack_8 ||
+ VG_(tdict).track_new_mem_stack_12 ||
+ VG_(tdict).track_new_mem_stack_16 ||
+ VG_(tdict).track_new_mem_stack_32 ) &&
+ ! VG_(tdict).track_new_mem_stack)=20
+ {
+ VG_(printf)("\nTool error: one of the specialised `new_mem_stack_n=
'\n"
+ "events tracked, but not the generic `new_mem_stack' o=
ne.\n");
+ VG_(tool_panic)("`new_mem_stack' should be defined\n");
+ }
+
+ if ( (VG_(tdict).track_die_mem_stack_4 ||
+ VG_(tdict).track_die_mem_stack_8 ||
+ VG_(tdict).track_die_mem_stack_12 ||
+ VG_(tdict).track_die_mem_stack_16 ||
+ VG_(tdict).track_die_mem_stack_32 ) &&
+ ! VG_(tdict).track_die_mem_stack)=20
+ {
+ VG_(printf)("\nTool error: one of the specialised `die_mem_stack_n=
'\n"
+ "events tracked, but not the generic `die_mem_stack' o=
ne.\n");
+ VG_(tool_panic)("`die_mem_stack' should be defined\n");
+ }
+
+ if (VG_(needs).shadow_memory !=3D (VG_(get_shadow_size)() !=3D 0)) {
+ if (VG_(get_shadow_size)() !=3D 0)
+ VG_(printf)("\nTool error: tool allocated shadow memory, but apparentl=
y doesn't "
+ "need it.\n");
+ else
+ VG_(printf)("\nTool error: tool didn't allocate shadow memory, but app=
arently "
+ "needs it.\n");
+ VG_(tool_panic)("VG_(needs).shadow_memory need should be set to ma=
tch 'shadow_ratio'\n");
+ }
+
+#undef CHECK_NOT
+}
+
+/* Use macro because they're so repetitive */
+#define NEEDS(need) \
+ extern void VG_(needs_##need)(void) \
+ { \
+ VG_(needs).need =3D True; \
+ }
+
+// These ones don't require any tool-supplied functions
+NEEDS(libc_freeres)
+NEEDS(core_errors)
+NEEDS(data_syms)
+NEEDS(shadow_memory)
+
+void VG_(needs_basic_block_discards)(
+ void (*discard)(Addr, SizeT)
+)
+{
+ VG_(needs).basic_block_discards =3D True;
+ VG_(tdict).tool_discard_basic_block_info =3D discard;
+}
+
+void VG_(needs_tool_errors)(
+ Bool (*eq) (VgRes, Error*, Error*),
+ void (*pp) (Error*),
+ UInt (*update) (Error*),
+ Bool (*recog) (Char*, Supp*),
+ Bool (*read_extra) (Int, Char*, Int, Supp*),
+ Bool (*matches) (Error*, Supp*),
+ Char* (*name) (Error*),
+ void (*print_extra)(Error*)
+)
+{
+ VG_(needs).tool_errors =3D True;
+ VG_(tdict).tool_eq_Error =3D eq;
+ VG_(tdict).tool_pp_Error =3D pp;
+ VG_(tdict).tool_update_extra =3D update;
+ VG_(tdict).tool_recognised_suppression =3D recog;
+ VG_(tdict).tool_read_extra_suppression_info =3D read_extra;
+ VG_(tdict).tool_error_matches_suppression =3D matches;
+ VG_(tdict).tool_get_error_name =3D name;
+ VG_(tdict).tool_print_extra_suppression_info =3D print_extra;
+}
+
+void VG_(needs_command_line_options)(
+ Bool (*process)(Char*),
+ void (*usage)(void),
+ void (*debug_usage)(void)
+)
+{
+ VG_(needs).command_line_options =3D True;
+ VG_(tdict).tool_process_cmd_line_option =3D process;
+ VG_(tdict).tool_print_usage =3D usage;
+ VG_(tdict).tool_print_debug_usage =3D debug_usage;
+}
+
+void VG_(needs_client_requests)(
+ Bool (*handle)(ThreadId, UWord*, UWord*)
+)
+{
+ VG_(needs).client_requests =3D True;
+ VG_(tdict).tool_handle_client_request =3D handle;
+}
+
+void VG_(needs_syscall_wrapper)(
+ void(*pre) (ThreadId, UInt),
+ void(*post)(ThreadId, UInt, Int res)
+)
+{
+ VG_(needs).syscall_wrapper =3D True;
+ VG_(tdict).tool_pre_syscall =3D pre;
+ VG_(tdict).tool_post_syscall =3D post;
+}
+
+void VG_(needs_sanity_checks)(
+ Bool(*cheap)(void),
+ Bool(*expen)(void)
+)
+{
+ VG_(needs).sanity_checks =3D True;
+ VG_(tdict).tool_cheap_sanity_check =3D cheap;
+ VG_(tdict).tool_expensive_sanity_check =3D expen;
+}
+
+
+/*--------------------------------------------------------------------*/
+/* Replacing malloc() */
+
+extern void VG_(malloc_funcs)(
+ void* (*malloc) ( ThreadId, SizeT ),
+ void* (*__builtin_new) ( ThreadId, SizeT ),
+ void* (*__builtin_vec_new) ( ThreadId, SizeT ),
+ void* (*memalign) ( ThreadId, SizeT, SizeT ),
+ void* (*calloc) ( ThreadId, SizeT, SizeT ),
+ void (*free) ( ThreadId, void* ),
+ void (*__builtin_delete) ( ThreadId, void* ),
+ void (*__builtin_vec_delete) ( ThreadId, void* ),
+ void* (*realloc) ( ThreadId, void*, SizeT ),
+ SizeT client_malloc_redzone_szB
+)
+{
+ VG_(tdict).malloc_malloc =3D malloc;
+ VG_(tdict).malloc___builtin_new =3D __builtin_new;
+ VG_(tdict).malloc___builtin_vec_new =3D __builtin_vec_new;
+ VG_(tdict).malloc_memalign =3D memalign;
+ VG_(tdict).malloc_calloc =3D calloc;
+ VG_(tdict).malloc_free =3D free;
+ VG_(tdict).malloc___builtin_delete =3D __builtin_delete;
+ VG_(tdict).malloc___builtin_vec_delete =3D __builtin_vec_delete;
+ VG_(tdict).malloc_realloc =3D realloc;
+
+ VG_(set_client_malloc_redzone_szB)( client_malloc_redzone_szB );
+}
+
+
+/*--------------------------------------------------------------------*/
+/* Tracked events */
+
+#define DEF(fn, args...) \
+void VG_(fn)(void(*f)(args)) \
+{ \
+ VG_(tdict).fn =3D f; \
+}
+
+#define DEF2(fn, args...) \
+void VG_(fn)(VGA_REGPARM(1) void(*f)(args)) \
+{ \
+ VG_(tdict).fn =3D f; \
+}
+
+DEF(track_new_mem_startup, Addr, SizeT, Bool, Bool, Bool)
+DEF(track_new_mem_stack_signal, Addr, SizeT)
+DEF(track_new_mem_brk, Addr, SizeT)
+DEF(track_new_mem_mmap, Addr, SizeT, Bool, Bool, Bool)
+
+DEF(track_copy_mem_remap, Addr, Addr, SizeT)
+DEF(track_change_mem_mprotect, Addr, SizeT, Bool, Bool, Bool)
+DEF(track_die_mem_stack_signal, Addr, SizeT)
+DEF(track_die_mem_brk, Addr, SizeT)
+DEF(track_die_mem_munmap, Addr, SizeT)
+
+DEF2(track_new_mem_stack_4, Addr)
+DEF2(track_new_mem_stack_8, Addr)
+DEF2(track_new_mem_stack_12, Addr)
+DEF2(track_new_mem_stack_16, Addr)
+DEF2(track_new_mem_stack_32, Addr)
+DEF (track_new_mem_stack, Addr, SizeT)
+
+DEF2(track_die_mem_stack_4, Addr)
+DEF2(track_die_mem_stack_8, Addr)
+DEF2(track_die_mem_stack_12, Addr)
+DEF2(track_die_mem_stack_16, Addr)
+DEF2(track_die_mem_stack_32, Addr)
+DEF (track_die_mem_stack, Addr, SizeT)
+
+DEF(track_ban_mem_stack, Addr, SizeT)
+
+DEF(track_pre_mem_read, CorePart, ThreadId, Char*, Addr, SizeT)
+DEF(track_pre_mem_read_asciiz, CorePart, ThreadId, Char*, Addr)
+DEF(track_pre_mem_write, CorePart, ThreadId, Char*, Addr, SizeT)
+DEF(track_post_mem_write, CorePart, ThreadId, Addr, SizeT)
+
+DEF(track_pre_reg_read, CorePart, ThreadId, Char*, OffT, SizeT)
+DEF(track_post_reg_write, CorePart, ThreadId, OffT, SizeT)
+
+DEF(track_post_reg_write_clientcall_return, ThreadId, OffT, SizeT, Addr)
+
+DEF(track_thread_run, ThreadId)
+
+DEF(track_post_thread_create, ThreadId, ThreadId)
+DEF(track_post_thread_join, ThreadId, ThreadId)
+
+DEF(track_pre_mutex_lock, ThreadId, void*)
+DEF(track_post_mutex_lock, ThreadId, void*)
+DEF(track_post_mutex_unlock, ThreadId, void*)
+
+DEF(track_pre_deliver_signal, ThreadId, Int sigNo, Bool)
+DEF(track_post_deliver_signal, ThreadId, Int sigNo)
+
+DEF(track_init_shadow_page, Addr)
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
+
+
Modified: trunk/coregrind/pub_core_aspacemgr.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/pub_core_aspacemgr.h 2005-05-10 03:01:23 UTC (rev 365=
1)
+++ trunk/coregrind/pub_core_aspacemgr.h 2005-05-10 04:37:01 UTC (rev 365=
2)
@@ -1,7 +1,6 @@
=20
/*--------------------------------------------------------------------*/
-/*--- The address space manager. ---*/
-/*--- pub_core_aspacemgr.h ---*/
+/*--- The address space manager. pub_core_aspacemgr.h ---*/
/*--------------------------------------------------------------------*/
=20
/*
Added: trunk/coregrind/pub_core_tooliface.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/pub_core_tooliface.h 2005-05-10 03:01:23 UTC (rev 365=
1)
+++ trunk/coregrind/pub_core_tooliface.h 2005-05-10 04:37:01 UTC (rev 365=
2)
@@ -0,0 +1,220 @@
+
+/*--------------------------------------------------------------------*/
+/*--- The core/tool interface. pub_core_tooliface.h ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2000-2005 Julian Seward
+ js...@ac...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#ifndef __PUB_CORE_TOOLIFACE_H
+#define __PUB_CORE_TOOLIFACE_H
+
+#include "pub_tool_tooliface.h"
+
+//--------------------------------------------------------------------
+// PURPOSE: This module encapsulates the key parts of the core/tool
+// interface: 'details', 'needs' and 'trackable events'.
+//--------------------------------------------------------------------
+
+// Note the use of C's comma operator here -- it means that we execute b=
oth
+// statements, and the rvalue of the whole thing is the rvalue of the la=
st
+// statement. This lets us say "x =3D VG_TDICT_CALL(...)" in the requir=
ed
+// places, while still checking the assertion.
+#define VG_TDICT_CALL(fn, args...) \
+ ( tl_assert2(VG_(tdict).fn, \
+ "you forgot to set VgToolInterface function '" #fn "'"),=
\
+ VG_(tdict).fn(args) )
+
+#define VG_TRACK(fn, args...) \
+ do { \
+ if (VG_(tdict).track_##fn) \
+ VG_(tdict).track_##fn(args); \
+ } while(0)
+
+/* These structs are not exposed to tools to mitigate possibility of
+ binary-incompatibilities when the core/tool interface changes. Inste=
ad,
+ set functions are provided (see include/tool.h). */
+
+/* ---------------------------------------------------------------------
+ 'Details'
+ ------------------------------------------------------------------ */
+
+typedef
+ struct {
+ Char* name;
+ Char* version;
+ Char* description;
+ Char* copyright_author;
+ Char* bug_reports_to;
+ UInt avg_translation_sizeB;
+ }
+ VgDetails;
+
+extern VgDetails VG_(details);
+
+/* ---------------------------------------------------------------------
+ 'Needs'
+ ------------------------------------------------------------------ */
+
+typedef
+ struct {
+ Bool libc_freeres;
+ Bool core_errors;
+ Bool tool_errors;
+ Bool basic_block_discards;
+ Bool no_longer_used_1; // for backwards compatibility
+ Bool command_line_options;
+ Bool client_requests;
+ Bool no_longer_used_0; // for backwards compatibility
+ Bool syscall_wrapper;
+ Bool sanity_checks;
+ Bool data_syms;
+ Bool shadow_memory;
+ }=20
+ VgNeeds;
+
+extern VgNeeds VG_(needs);
+
+/* ---------------------------------------------------------------------
+ The dictionary of callable tool functions
+ ------------------------------------------------------------------ */
+
+typedef struct {
+ // -- 'Needs'-related functions ----------------------------------
+ // Basic functions
+ void (*tool_pre_clo_init) (void);
+ void (*tool_post_clo_init)(void);
+ IRBB* (*tool_instrument) (IRBB*, VexGuestLayout*, IRType, IRType);
+ void (*tool_fini) (Int);
+
+ // VG_(needs).core_errors
+ // (none)
+ =20
+ // VG_(needs).tool_errors
+ Bool (*tool_eq_Error) (VgRes, Error*, Error*);
+ void (*tool_pp_Error) (Error*);
+ UInt (*tool_update_extra) (Error*);
+ Bool (*tool_recognised_suppression) (Char*, Supp*);
+ Bool (*tool_read_extra_suppression_info) (Int, Char*, Int, Supp*);
+ Bool (*tool_error_matches_suppression) (Error*, Supp*);
+ Char* (*tool_get_error_name) (Error*);
+ void (*tool_print_extra_suppression_info)(Error*);
+
+ // VG_(needs).basic_block_discards
+ void (*tool_discard_basic_block_info)(Addr, SizeT);
+
+ // VG_(needs).command_line_options
+ Bool (*tool_process_cmd_line_option)(Char*);
+ void (*tool_print_usage) (void);
+ void (*tool_print_debug_usage) (void);
+
+ // VG_(needs).client_requests
+ Bool (*tool_handle_client_request)(ThreadId, UWord*, UWord*);
+
+ // VG_(needs).syscall_wrapper
+ void (*tool_pre_syscall) (ThreadId, UInt);
+ void (*tool_post_syscall)(ThreadId, UInt, Int);
+
+ // VG_(needs).sanity_checks
+ Bool (*tool_cheap_sanity_check)(void);
+ Bool (*tool_expensive_sanity_check)(void);
+
+ // -- Event tracking functions ------------------------------------
+ void (*track_new_mem_startup) (Addr, SizeT, Bool, Bool, Bool);
+ void (*track_new_mem_stack_signal)(Addr, SizeT);
+ void (*track_new_mem_brk) (Addr, SizeT);
+ void (*track_new_mem_mmap) (Addr, SizeT, Bool, Bool, Bool);
+
+ void (*track_copy_mem_remap) (Addr, Addr, SizeT);
+ void (*track_change_mem_mprotect) (Addr, SizeT, Bool, Bool, Bool);
+ void (*track_die_mem_stack_signal)(Addr, SizeT);
+ void (*track_die_mem_brk) (Addr, SizeT);
+ void (*track_die_mem_munmap) (Addr, SizeT);
+
+ VGA_REGPARM(1) void (*track_new_mem_stack_4) (Addr);
+ VGA_REGPARM(1) void (*track_new_mem_stack_8) (Addr);
+ VGA_REGPARM(1) void (*track_new_mem_stack_12)(Addr);
+ VGA_REGPARM(1) void (*track_new_mem_stack_16)(Addr);
+ VGA_REGPARM(1) void (*track_new_mem_stack_32)(Addr);
+ void (*track_new_mem_stack)(Addr, SizeT);
+
+ VGA_REGPARM(1) void (*track_die_mem_stack_4) (Addr);
+ VGA_REGPARM(1) void (*track_die_mem_stack_8) (Addr);
+ VGA_REGPARM(1) void (*track_die_mem_stack_12)(Addr);
+ VGA_REGPARM(1) void (*track_die_mem_stack_16)(Addr);
+ VGA_REGPARM(1) void (*track_die_mem_stack_32)(Addr);
+ void (*track_die_mem_stack)(Addr, SizeT);
+
+ void (*track_ban_mem_stack)(Addr, SizeT);
+
+ void (*track_pre_mem_read) (CorePart, ThreadId, Char*, Addr, Si=
zeT);
+ void (*track_pre_mem_read_asciiz)(CorePart, ThreadId, Char*, Addr);
+ void (*track_pre_mem_write) (CorePart, ThreadId, Char*, Addr, Si=
zeT);
+ void (*track_post_mem_write) (CorePart, ThreadId, Addr, SizeT);
+
+ void (*track_pre_reg_read) (CorePart, ThreadId, Char*, OffT, SizeT);
+ void (*track_post_reg_write)(CorePart, ThreadId, OffT, SizeT);
+ void (*track_post_reg_write_clientcall_return)(ThreadId, OffT, SizeT,=
Addr);
+
+ void (*track_thread_run)(ThreadId);
+
+ void (*track_post_thread_create)(ThreadId, ThreadId);
+ void (*track_post_thread_join) (ThreadId, ThreadId);
+
+ void (*track_pre_mutex_lock) (ThreadId, void*);
+ void (*track_post_mutex_lock) (ThreadId, void*);
+ void (*track_post_mutex_unlock)(ThreadId, void*);
+
+ void (*track_pre_deliver_signal) (ThreadId, Int sigNo, Bool);
+ void (*track_post_deliver_signal)(ThreadId, Int sigNo);
+
+ void (*track_init_shadow_page)(Addr);
+
+ // -- malloc/free replacements -----------------------------------
+ void* (*malloc_malloc) (ThreadId, SizeT);
+ void* (*malloc___builtin_new) (ThreadId, SizeT);
+ void* (*malloc___builtin_vec_new) (ThreadId, SizeT);
+ void* (*malloc_memalign) (ThreadId, SizeT, SizeT);
+ void* (*malloc_calloc) (ThreadId, SizeT, SizeT);
+ void (*malloc_free) (ThreadId, void*);
+ void (*malloc___builtin_delete) (ThreadId, void*);
+ void (*malloc___builtin_vec_delete)(ThreadId, void*);
+ void* (*malloc_realloc) (ThreadId, void*, SizeT);
+
+} VgToolInterface;
+
+extern VgToolInterface VG_(tdict);
+
+/* ---------------------------------------------------------------------
+ Miscellaneous functions
+ ------------------------------------------------------------------ */
+
+void VG_(sanity_check_needs)(void);
+
+#endif // __PUB_CORE_TOOLIFACE_H
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
Modified: trunk/coregrind/vg_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_main.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/vg_main.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -37,6 +37,7 @@
#include "pub_core_errormgr.h"
#include "pub_core_execontext.h"
#include "pub_core_syscalls.h"
+#include "pub_core_tooliface.h"
=20
#include <dirent.h>
#include <dlfcn.h>
Modified: trunk/coregrind/vg_mylibc.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_mylibc.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/vg_mylibc.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -35,6 +35,7 @@
#include "pub_core_debuglog.h" /* VG_(debugLog_vprintf) */
#include "pub_core_stacktrace.h"
#include "pub_core_syscalls.h"
+#include "pub_core_tooliface.h"
=20
=20
/* ---------------------------------------------------------------------
Deleted: trunk/coregrind/vg_needs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_needs.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/vg_needs.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -1,336 +0,0 @@
-
-/*--------------------------------------------------------------------*/
-/*--- Stuff relating to tool data structures. ---*/
-/*--- vg_needs.c ---*/
-/*--------------------------------------------------------------------*/
-
-/*
- This file is part of Valgrind, a dynamic binary instrumentation
- framework.
-
- Copyright (C) 2000-2005 Nicholas Nethercote
- nj...@va...
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- 02111-1307, USA.
-
- The GNU General Public License is contained in the file COPYING.
-*/
-
-#include "core.h"
-
-// The core/tool dictionary of functions (initially zeroed, as we want i=
t)
-VgToolInterface VG_(tdict);
-
-/*--------------------------------------------------------------------*/
-/* Setting basic functions */
-
-void VG_(basic_tool_funcs)(
- void(*post_clo_init)(void),
- IRBB*(*instrument)(IRBB*, VexGuestLayout*, IRType, IRType ),
- void(*fini)(Int)
-)
-{
- VG_(tdict).tool_post_clo_init =3D post_clo_init;
- VG_(tdict).tool_instrument =3D instrument;
- VG_(tdict).tool_fini =3D fini;
-}
-
-
-/*--------------------------------------------------------------------*/
-/* Setting details */
-
-/* Init with default values. */
-VgDetails VG_(details) =3D {
- .name =3D NULL,
- .version =3D NULL,
- .description =3D NULL,
- .copyright_author =3D NULL,
- .bug_reports_to =3D NULL,
- .avg_translation_sizeB =3D VG_DEFAULT_TRANS_SIZEB,
-};
-
-/* Use macro because they're so repetitive */
-#define DETAILS(type, detail) \
- extern void VG_(details_##detail)(type detail) \
- { \
- VG_(details).detail =3D detail; \
- }
-
-DETAILS(Char*, name)
-DETAILS(Char*, version)
-DETAILS(Char*, description)
-DETAILS(Char*, copyright_author)
-DETAILS(Char*, bug_reports_to)
-DETAILS(UInt, avg_translation_sizeB)
-
-
-/*--------------------------------------------------------------------*/
-/* Setting needs */
-
-VgNeeds VG_(needs) =3D {
- .core_errors =3D False,
- .tool_errors =3D False,
- .libc_freeres =3D False,
- .basic_block_discards =3D False,
- .no_longer_used_1 =3D False,
- .command_line_options =3D False,
- .client_requests =3D False,
- .no_longer_used_0 =3D False,
- .syscall_wrapper =3D False,
- .sanity_checks =3D False,
- .data_syms =3D False,
- .shadow_memory =3D False,
-};
-
-/* static */
-void VG_(sanity_check_needs) ( void)
-{
-#define CHECK_NOT(var, value) \
- if ((var)=3D=3D(value)) { \
- VG_(printf)("\nTool error: `%s' not initialised\n", \
- VG_STRINGIFY(var)); \
- VG_(tool_panic)("Uninitialised details field\n"); \
- }
- =20
- /* Ones that must be set */
- CHECK_NOT(VG_(details).name, NULL);
- /* Nb: .version can be NULL */
- CHECK_NOT(VG_(details).description, NULL);
- CHECK_NOT(VG_(details).copyright_author, NULL);
- CHECK_NOT(VG_(details).bug_reports_to, NULL);
-
- if ( (VG_(tdict).track_new_mem_stack_4 ||
- VG_(tdict).track_new_mem_stack_8 ||
- VG_(tdict).track_new_mem_stack_12 ||
- VG_(tdict).track_new_mem_stack_16 ||
- VG_(tdict).track_new_mem_stack_32 ) &&
- ! VG_(tdict).track_new_mem_stack)=20
- {
- VG_(printf)("\nTool error: one of the specialised `new_mem_stack_n=
'\n"
- "events tracked, but not the generic `new_mem_stack' o=
ne.\n");
- VG_(tool_panic)("`new_mem_stack' should be defined\n");
- }
-
- if ( (VG_(tdict).track_die_mem_stack_4 ||
- VG_(tdict).track_die_mem_stack_8 ||
- VG_(tdict).track_die_mem_stack_12 ||
- VG_(tdict).track_die_mem_stack_16 ||
- VG_(tdict).track_die_mem_stack_32 ) &&
- ! VG_(tdict).track_die_mem_stack)=20
- {
- VG_(printf)("\nTool error: one of the specialised `die_mem_stack_n=
'\n"
- "events tracked, but not the generic `die_mem_stack' o=
ne.\n");
- VG_(tool_panic)("`die_mem_stack' should be defined\n");
- }
-
- if (VG_(needs).shadow_memory !=3D (VG_(get_shadow_size)() !=3D 0)) {
- if (VG_(get_shadow_size)() !=3D 0)
- VG_(printf)("\nTool error: tool allocated shadow memory, but apparentl=
y doesn't "
- "need it.\n");
- else
- VG_(printf)("\nTool error: tool didn't allocate shadow memory, but app=
arently "
- "needs it.\n");
- VG_(tool_panic)("VG_(needs).shadow_memory need should be set to ma=
tch 'shadow_ratio'\n");
- }
-
-#undef CHECK_NOT
-}
-
-/* Use macro because they're so repetitive */
-#define NEEDS(need) \
- extern void VG_(needs_##need)(void) \
- { \
- VG_(needs).need =3D True; \
- }
-
-// These ones don't require any tool-supplied functions
-NEEDS(libc_freeres)
-NEEDS(core_errors)
-NEEDS(data_syms)
-NEEDS(shadow_memory)
-
-void VG_(needs_basic_block_discards)(
- void (*discard)(Addr, SizeT)
-)
-{
- VG_(needs).basic_block_discards =3D True;
- VG_(tdict).tool_discard_basic_block_info =3D discard;
-}
-
-void VG_(needs_tool_errors)(
- Bool (*eq) (VgRes, Error*, Error*),
- void (*pp) (Error*),
- UInt (*update) (Error*),
- Bool (*recog) (Char*, Supp*),
- Bool (*read_extra) (Int, Char*, Int, Supp*),
- Bool (*matches) (Error*, Supp*),
- Char* (*name) (Error*),
- void (*print_extra)(Error*)
-)
-{
- VG_(needs).tool_errors =3D True;
- VG_(tdict).tool_eq_Error =3D eq;
- VG_(tdict).tool_pp_Error =3D pp;
- VG_(tdict).tool_update_extra =3D update;
- VG_(tdict).tool_recognised_suppression =3D recog;
- VG_(tdict).tool_read_extra_suppression_info =3D read_extra;
- VG_(tdict).tool_error_matches_suppression =3D matches;
- VG_(tdict).tool_get_error_name =3D name;
- VG_(tdict).tool_print_extra_suppression_info =3D print_extra;
-}
-
-void VG_(needs_command_line_options)(
- Bool (*process)(Char*),
- void (*usage)(void),
- void (*debug_usage)(void)
-)
-{
- VG_(needs).command_line_options =3D True;
- VG_(tdict).tool_process_cmd_line_option =3D process;
- VG_(tdict).tool_print_usage =3D usage;
- VG_(tdict).tool_print_debug_usage =3D debug_usage;
-}
-
-void VG_(needs_client_requests)(
- Bool (*handle)(ThreadId, UWord*, UWord*)
-)
-{
- VG_(needs).client_requests =3D True;
- VG_(tdict).tool_handle_client_request =3D handle;
-}
-
-void VG_(needs_syscall_wrapper)(
- void(*pre) (ThreadId, UInt),
- void(*post)(ThreadId, UInt, Int res)
-)
-{
- VG_(needs).syscall_wrapper =3D True;
- VG_(tdict).tool_pre_syscall =3D pre;
- VG_(tdict).tool_post_syscall =3D post;
-}
-
-void VG_(needs_sanity_checks)(
- Bool(*cheap)(void),
- Bool(*expen)(void)
-)
-{
- VG_(needs).sanity_checks =3D True;
- VG_(tdict).tool_cheap_sanity_check =3D cheap;
- VG_(tdict).tool_expensive_sanity_check =3D expen;
-}
-
-
-/*--------------------------------------------------------------------*/
-/* Replacing malloc() */
-
-extern void VG_(malloc_funcs)(
- void* (*malloc) ( ThreadId, SizeT ),
- void* (*__builtin_new) ( ThreadId, SizeT ),
- void* (*__builtin_vec_new) ( ThreadId, SizeT ),
- void* (*memalign) ( ThreadId, SizeT, SizeT ),
- void* (*calloc) ( ThreadId, SizeT, SizeT ),
- void (*free) ( ThreadId, void* ),
- void (*__builtin_delete) ( ThreadId, void* ),
- void (*__builtin_vec_delete) ( ThreadId, void* ),
- void* (*realloc) ( ThreadId, void*, SizeT ),
- SizeT client_malloc_redzone_szB
-)
-{
- VG_(tdict).malloc_malloc =3D malloc;
- VG_(tdict).malloc___builtin_new =3D __builtin_new;
- VG_(tdict).malloc___builtin_vec_new =3D __builtin_vec_new;
- VG_(tdict).malloc_memalign =3D memalign;
- VG_(tdict).malloc_calloc =3D calloc;
- VG_(tdict).malloc_free =3D free;
- VG_(tdict).malloc___builtin_delete =3D __builtin_delete;
- VG_(tdict).malloc___builtin_vec_delete =3D __builtin_vec_delete;
- VG_(tdict).malloc_realloc =3D realloc;
-
- VG_(set_client_malloc_redzone_szB)( client_malloc_redzone_szB );
-}
-
-
-/*--------------------------------------------------------------------*/
-/* Tracked events */
-
-#define DEF(fn, args...) \
-void VG_(fn)(void(*f)(args)) \
-{ \
- VG_(tdict).fn =3D f; \
-}
-
-#define DEF2(fn, args...) \
-void VG_(fn)(VGA_REGPARM(1) void(*f)(args)) \
-{ \
- VG_(tdict).fn =3D f; \
-}
-
-DEF(track_new_mem_startup, Addr, SizeT, Bool, Bool, Bool)
-DEF(track_new_mem_stack_signal, Addr, SizeT)
-DEF(track_new_mem_brk, Addr, SizeT)
-DEF(track_new_mem_mmap, Addr, SizeT, Bool, Bool, Bool)
-
-DEF(track_copy_mem_remap, Addr, Addr, SizeT)
-DEF(track_change_mem_mprotect, Addr, SizeT, Bool, Bool, Bool)
-DEF(track_die_mem_stack_signal, Addr, SizeT)
-DEF(track_die_mem_brk, Addr, SizeT)
-DEF(track_die_mem_munmap, Addr, SizeT)
-
-DEF2(track_new_mem_stack_4, Addr)
-DEF2(track_new_mem_stack_8, Addr)
-DEF2(track_new_mem_stack_12, Addr)
-DEF2(track_new_mem_stack_16, Addr)
-DEF2(track_new_mem_stack_32, Addr)
-DEF (track_new_mem_stack, Addr, SizeT)
-
-DEF2(track_die_mem_stack_4, Addr)
-DEF2(track_die_mem_stack_8, Addr)
-DEF2(track_die_mem_stack_12, Addr)
-DEF2(track_die_mem_stack_16, Addr)
-DEF2(track_die_mem_stack_32, Addr)
-DEF (track_die_mem_stack, Addr, SizeT)
-
-DEF(track_ban_mem_stack, Addr, SizeT)
-
-DEF(track_pre_mem_read, CorePart, ThreadId, Char*, Addr, SizeT)
-DEF(track_pre_mem_read_asciiz, CorePart, ThreadId, Char*, Addr)
-DEF(track_pre_mem_write, CorePart, ThreadId, Char*, Addr, SizeT)
-DEF(track_post_mem_write, CorePart, ThreadId, Addr, SizeT)
-
-DEF(track_pre_reg_read, CorePart, ThreadId, Char*, OffT, SizeT)
-DEF(track_post_reg_write, CorePart, ThreadId, OffT, SizeT)
-
-DEF(track_post_reg_write_clientcall_return, ThreadId, OffT, SizeT, Addr)
-
-DEF(track_thread_run, ThreadId)
-
-DEF(track_post_thread_create, ThreadId, ThreadId)
-DEF(track_post_thread_join, ThreadId, ThreadId)
-
-DEF(track_pre_mutex_lock, ThreadId, void*)
-DEF(track_post_mutex_lock, ThreadId, void*)
-DEF(track_post_mutex_unlock, ThreadId, void*)
-
-DEF(track_pre_deliver_signal, ThreadId, Int sigNo, Bool)
-DEF(track_post_deliver_signal, ThreadId, Int sigNo)
-
-DEF(track_init_shadow_page, Addr)
-
-/*--------------------------------------------------------------------*/
-/*--- end ---*/
-/*--------------------------------------------------------------------*/
-
-
Modified: trunk/coregrind/vg_scheduler.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_scheduler.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/vg_scheduler.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -64,6 +64,7 @@
#include "pub_core_replacemalloc.h"
#include "pub_core_stacktrace.h"
#include "pub_core_syscalls.h"
+#include "pub_core_tooliface.h"
=20
/* ---------------------------------------------------------------------
Types and globals for the scheduler.
Modified: trunk/coregrind/vg_signals.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_signals.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/vg_signals.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -85,6 +85,7 @@
#include "pub_core_errormgr.h"
#include "pub_core_sigframe.h"
#include "pub_core_syscalls.h"
+#include "pub_core_tooliface.h"
=20
=20
/* Define to give more sanity checking for signals. */
Modified: trunk/coregrind/vg_symtab2.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_symtab2.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/vg_symtab2.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -34,8 +34,9 @@
#include "vg_symtab2.h"
=20
#include "pub_core_aspacemgr.h"
+#include "pub_core_tooliface.h"
=20
-#include <elf.h> /* ELF defns */
+#include <elf.h> /* ELF defns */
=20
static SegInfo* segInfo =3D NULL;
=20
Modified: trunk/coregrind/vg_symtypes.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_symtypes.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/vg_symtypes.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -30,6 +30,7 @@
#include "core.h"
#include "vg_symtypes.h"
#include "pub_core_debuglog.h" /* VG_(debugLog_vprintf) */
+#include "pub_core_tooliface.h"
=20
typedef enum {
TyUnknown, /* unknown type */
Modified: trunk/coregrind/vg_translate.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_translate.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/vg_translate.c 2005-05-10 04:37:01 UTC (rev 3652)
@@ -31,6 +31,7 @@
=20
#include "core.h"
#include "pub_core_aspacemgr.h"
+#include "pub_core_tooliface.h"
=20
=20
/*------------------------------------------------------------*/
Modified: trunk/coregrind/vg_transtab.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_transtab.c 2005-05-10 03:01:23 UTC (rev 3651)
+++ trunk/coregrind/vg_transtab.c 2005-05-10 04:37:01 ...
[truncated message content] |
|
From: <js...@ac...> - 2005-05-10 03:06:59
|
Nightly build on phoenix ( SuSE 9.1 ) started at 2005-05-10 03:50:00 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow insn_mmx: valgrind ./insn_mmx insn_mmxext: (skipping, prereq failed: ../../../tests/cputest x86-mmxext) insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 201 tests, 5 stderr failures, 0 stdout failures ================= memcheck/tests/pth_once (stderr) memcheck/tests/scalar (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/writev (stderr) corecheck/tests/fdleak_fcntl (stderr) make: *** [regtest] Error 1 |
|
From: <sv...@va...> - 2005-05-10 03:01:43
|
Author: njn
Date: 2005-05-10 04:01:23 +0100 (Tue, 10 May 2005)
New Revision: 3651
Modified:
trunk/coregrind/vg_scheduler.c
trunk/include/valgrind.h.in
Log:
Add a comment explaining the recently changed behaviour of
RUNNING_ON_VALGRIND.
Modified: trunk/coregrind/vg_scheduler.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_scheduler.c 2005-05-10 02:56:08 UTC (rev 3650)
+++ trunk/coregrind/vg_scheduler.c 2005-05-10 03:01:23 UTC (rev 3651)
@@ -989,6 +989,8 @@
break;
}
=20
+ // Nb: this looks like a circular definition, because it kind of i=
s.
+ // See comment in valgrind.h to understand what's going on.
case VG_USERREQ__RUNNING_ON_VALGRIND:
SET_CLREQ_RETVAL(tid, RUNNING_ON_VALGRIND+1);
break;
Modified: trunk/include/valgrind.h.in
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/include/valgrind.h.in 2005-05-10 02:56:08 UTC (rev 3650)
+++ trunk/include/valgrind.h.in 2005-05-10 03:01:23 UTC (rev 3651)
@@ -244,8 +244,9 @@
#define __extension__
#endif
=20
-/* Returns 1 if running on Valgrind, 0 if running on the real CPU.=20
- Currently implemented but untested. */
+/* Returns the number of Valgrinds this code is running under. That is,
+ 0 if running natively, 1 if running under Valgrind, 2 if running unde=
r
+ Valgrind which is running under another Valgrind, etc. */
#define RUNNING_ON_VALGRIND __extension__ \
({unsigned int _qzz_res; \
VALGRIND_MAGIC_SEQUENCE(_qzz_res, 0 /* returned if not */, \
|
|
From: <sv...@va...> - 2005-05-10 02:56:13
|
Author: njn
Date: 2005-05-10 03:56:08 +0100 (Tue, 10 May 2005)
New Revision: 3650
Modified:
trunk/coregrind/valgrind.vs
Log:
update
Modified: trunk/coregrind/valgrind.vs
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/valgrind.vs 2005-05-10 02:49:11 UTC (rev 3649)
+++ trunk/coregrind/valgrind.vs 2005-05-10 02:56:08 UTC (rev 3650)
@@ -2,7 +2,7 @@
global:
vgPlain_*;
vgTool_*;
- vgProf_*;
+ vgPlatform*;
vgArch_*;
*IROp*;
*IRExpr*;
|
|
From: <sv...@va...> - 2005-05-10 02:50:10
|
Author: sewardj
Date: 2005-05-10 03:50:05 +0100 (Tue, 10 May 2005)
New Revision: 1176
Modified:
trunk/priv/guest-amd64/toIR.c
trunk/priv/host-amd64/hdefs.c
trunk/priv/host-amd64/isel.c
Log:
Many amd64 SSE1 instructions.
Modified: trunk/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-amd64/toIR.c 2005-05-09 22:23:38 UTC (rev 1175)
+++ trunk/priv/guest-amd64/toIR.c 2005-05-10 02:50:05 UTC (rev 1176)
@@ -8157,13 +8157,14 @@
//.. =20
//.. /* Otherwise we must be doing sse1 or sse2, so we can at least t=
ry
//.. for SSE1 here. */
-//..=20
-//.. /* 0F 58 =3D ADDPS -- add 32Fx4 from R/M to R */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x58) {
-//.. delta =3D dis_SSE_E_to_G_all( sorb, delta+2, "addps", Iop_Add=
32Fx4 );
-//.. goto decode_success;
-//.. }
=20
+ /* 0F 58 =3D ADDPS -- add 32Fx4 from R/M to R */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x58) {
+ delta =3D dis_SSE_E_to_G_all( pfx, delta+2, "addps", Iop_Add32Fx4 =
);
+ goto decode_success;
+ }
+
/* F3 0F 58 =3D ADDSS -- add 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz =3D=3D 4
&& insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x58) {
@@ -8185,11 +8186,12 @@
goto decode_success;
}
=20
-//.. /* 0F C2 =3D CMPPS -- 32Fx4 comparison from R/M to R */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC2) {
-//.. delta =3D dis_SSEcmp_E_to_G( sorb, delta+2, "cmpps", True, 4 =
);
-//.. goto decode_success;
-//.. }
+ /* 0F C2 =3D CMPPS -- 32Fx4 comparison from R/M to R */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0xC2) {
+ delta =3D dis_SSEcmp_E_to_G( pfx, delta+2, "cmpps", True, 4 );
+ goto decode_success;
+ }
=20
/* F3 0F C2 =3D CMPSS -- 32F0x4 comparison from R/M to R */
if (haveF3no66noF2(pfx) && sz =3D=3D 4
@@ -8238,47 +8240,47 @@
goto decode_success;
}
=20
-//.. /* 0F 2A =3D CVTPI2PS -- convert 2 x I32 in mem/mmx to 2 x F32 i=
n low
-//.. half xmm */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x2A) {
-//.. IRTemp arg64 =3D newTemp(Ity_I64);
-//.. IRTemp rmode =3D newTemp(Ity_I32);
-//.. vassert(sz =3D=3D 4);
-//..=20
-//.. modrm =3D getUChar(delta+2);
-//.. do_MMX_preamble();
-//.. if (epartIsReg(modrm)) {
-//.. assign( arg64, getMMXReg(eregOfRM(modrm)) );
-//.. delta +=3D 2+1;
-//.. DIP("cvtpi2ps %s,%s\n", nameMMXReg(eregOfRM(modrm)),
-//.. nameXMMReg(gregOfRM(modrm)));
-//.. } else {
-//.. addr =3D disAMode ( &alen, sorb, delta+2, dis_buf );
-//.. assign( arg64, loadLE(Ity_I64, mkexpr(addr)) );
-//.. delta +=3D 2+alen;
-//.. DIP("cvtpi2ps %s,%s\n", dis_buf,
-//.. nameXMMReg(gregOfRM(modrm)) );
-//.. }
-//..=20
-//.. assign( rmode, get_sse_roundingmode() );
-//..=20
-//.. putXMMRegLane32F(=20
-//.. gregOfRM(modrm), 0,
-//.. binop(Iop_F64toF32,=20
-//.. mkexpr(rmode),
-//.. unop(Iop_I32toF64,=20
-//.. unop(Iop_64to32, mkexpr(arg64)) )) );
-//..=20
-//.. putXMMRegLane32F(
-//.. gregOfRM(modrm), 1,=20
-//.. binop(Iop_F64toF32,=20
-//.. mkexpr(rmode),
-//.. unop(Iop_I32toF64,
-//.. unop(Iop_64HIto32, mkexpr(arg64)) )) );
-//..=20
-//.. goto decode_success;
-//.. }
+ /* 0F 2A =3D CVTPI2PS -- convert 2 x I32 in mem/mmx to 2 x F32 in low
+ half xmm */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x2A) {
+ IRTemp arg64 =3D newTemp(Ity_I64);
+ IRTemp rmode =3D newTemp(Ity_I32);
=20
+ modrm =3D getUChar(delta+2);
+ do_MMX_preamble();
+ if (epartIsReg(modrm)) {
+ assign( arg64, getMMXReg(eregLO3ofRM(modrm)) );
+ delta +=3D 2+1;
+ DIP("cvtpi2ps %s,%s\n", nameMMXReg(eregLO3ofRM(modrm)),
+ nameXMMReg(gregOfRexRM(pfx,modrm)));
+ } else {
+ addr =3D disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ assign( arg64, loadLE(Ity_I64, mkexpr(addr)) );
+ delta +=3D 2+alen;
+ DIP("cvtpi2ps %s,%s\n", dis_buf,
+ nameXMMReg(gregOfRexRM(pfx,modrm)) );
+ }
+
+ assign( rmode, get_sse_roundingmode() );
+
+ putXMMRegLane32F(=20
+ gregOfRexRM(pfx,modrm), 0,
+ binop(Iop_F64toF32,=20
+ mkexpr(rmode),
+ unop(Iop_I32toF64,=20
+ unop(Iop_64to32, mkexpr(arg64)) )) );
+
+ putXMMRegLane32F(
+ gregOfRexRM(pfx,modrm), 1,=20
+ binop(Iop_F64toF32,=20
+ mkexpr(rmode),
+ unop(Iop_I32toF64,
+ unop(Iop_64HIto32, mkexpr(arg64)) )) );
+
+ goto decode_success;
+ }
+
/* F3 0F 2A =3D CVTSI2SS=20
-- sz=3D=3D4: convert I32 in mem/ireg to F32 in low quarter xmm
-- sz=3D=3D8: convert I64 in mem/ireg to F32 in low quarter xmm */
@@ -8333,63 +8335,68 @@
goto decode_success;
}
=20
-//.. /* 0F 2D =3D CVTPS2PI -- convert 2 x F32 in mem/low half xmm to =
2 x
-//.. I32 in mmx, according to prevailing SSE rounding mode */
+ /* 0F 2D =3D CVTPS2PI -- convert 2 x F32 in mem/low half xmm to 2 x
+ I32 in mmx, according to prevailing SSE rounding mode */
//.. /* 0F 2C =3D CVTTPS2PI -- convert 2 x F32 in mem/low half xmm to=
2 x
//.. I32 in mmx, rounding towards zero */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && (insn[1] =3D=3D 0x2D |=
| insn[1] =3D=3D 0x2C)) {
-//.. IRTemp dst64 =3D newTemp(Ity_I64);
-//.. IRTemp rmode =3D newTemp(Ity_I32);
-//.. IRTemp f32lo =3D newTemp(Ity_F32);
-//.. IRTemp f32hi =3D newTemp(Ity_F32);
-//.. Bool r2zero =3D insn[1] =3D=3D 0x2C;
-//..=20
-//.. do_MMX_preamble();
-//.. modrm =3D getUChar(delta+2);
-//..=20
-//.. if (epartIsReg(modrm)) {
-//.. delta +=3D 2+1;
-//.. assign(f32lo, getXMMRegLane32F(eregOfRM(modrm), 0));
-//.. assign(f32hi, getXMMRegLane32F(eregOfRM(modrm), 1));
-//.. DIP("cvt%sps2pi %s,%s\n", r2zero ? "t" : "",
-//.. nameXMMReg(eregOfRM(modrm)),
-//.. nameMMXReg(gregOfRM(modrm)));
-//.. } else {
-//.. addr =3D disAMode ( &alen, sorb, delta+2, dis_buf );
-//.. assign(f32lo, loadLE(Ity_F32, mkexpr(addr)));
-//.. assign(f32hi, loadLE(Ity_F32, binop( Iop_Add32,=20
-//.. mkexpr(addr),=20
-//.. mkU32(4) )));
-//.. delta +=3D 2+alen;
-//.. DIP("cvt%sps2pi %s,%s\n", r2zero ? "t" : "",
-//.. dis_buf,
-//.. nameMMXReg(gregOfRM(modrm)));
-//.. }
-//..=20
-//.. if (r2zero) {
-//.. assign(rmode, mkU32((UInt)Irrm_ZERO) );
-//.. } else {
-//.. assign( rmode, get_sse_roundingmode() );
-//.. }
-//..=20
-//.. assign(=20
-//.. dst64,
-//.. binop( Iop_32HLto64,
-//.. binop( Iop_F64toI32,=20
-//.. mkexpr(rmode),=20
-//.. unop( Iop_F32toF64, mkexpr(f32hi) ) ),
-//.. binop( Iop_F64toI32,=20
-//.. mkexpr(rmode),=20
-//.. unop( Iop_F32toF64, mkexpr(f32lo) ) )
-//.. )
-//.. );
-//..=20
-//.. putMMXReg(gregOfRM(modrm), mkexpr(dst64));
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* F3 0F 2D =3D CVTSS2SI -- convert F32 in mem/low quarter xmm t=
o
-//.. I32 in ireg, according to prevailing SSE rounding mode */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && (insn[1] =3D=3D 0x2D /* || insn[1] =3D=3D=
0x2C */)) {
+ IRTemp dst64 =3D newTemp(Ity_I64);
+ IRTemp rmode =3D newTemp(Ity_I32);
+ IRTemp f32lo =3D newTemp(Ity_F32);
+ IRTemp f32hi =3D newTemp(Ity_F32);
+ Bool r2zero =3D toBool(insn[1] =3D=3D 0x2C);
+
+ do_MMX_preamble();
+ modrm =3D getUChar(delta+2);
+
+ if (epartIsReg(modrm)) {
+ delta +=3D 2+1;
+ assign(f32lo, getXMMRegLane32F(eregOfRexRM(pfx,modrm), 0));
+ assign(f32hi, getXMMRegLane32F(eregOfRexRM(pfx,modrm), 1));
+ DIP("cvt%sps2pi %s,%s\n", r2zero ? "t" : "",
+ nameXMMReg(eregOfRexRM(pfx,modrm)),
+ nameMMXReg(gregLO3ofRM(modrm)));
+ } else {
+ addr =3D disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ assign(f32lo, loadLE(Ity_F32, mkexpr(addr)));
+ assign(f32hi, loadLE(Ity_F32, binop( Iop_Add64,=20
+ mkexpr(addr),=20
+ mkU64(4) )));
+ delta +=3D 2+alen;
+ DIP("cvt%sps2pi %s,%s\n", r2zero ? "t" : "",
+ dis_buf,
+ nameMMXReg(gregLO3ofRM(modrm)));
+ }
+
+ if (r2zero) {
+ assign(rmode, mkU32((UInt)Irrm_ZERO) );
+ } else {
+ assign( rmode, get_sse_roundingmode() );
+ }
+
+ assign(=20
+ dst64,
+ binop( Iop_32HLto64,
+ binop( Iop_F64toI32,=20
+ mkexpr(rmode),=20
+ unop( Iop_F32toF64, mkexpr(f32hi) ) ),
+ binop( Iop_F64toI32,=20
+ mkexpr(rmode),=20
+ unop( Iop_F32toF64, mkexpr(f32lo) ) )
+ )
+ );
+
+ putMMXReg(gregLO3ofRM(modrm), mkexpr(dst64));
+ goto decode_success;
+ }
+
+ /* F3 0F 2D =3D CVTSS2SI=20
+ when sz=3D=3D4 -- convert F32 in mem/low quarter xmm to I32 in ire=
g,=20
+ according to prevailing SSE rounding mode
+ when sz=3D=3D8 -- convert F32 in mem/low quarter xmm to I64 in ire=
g,=20
+ according to prevailing SSE rounding mode
+ */
/* F3 0F 2C =3D CVTTSS2SI=20
when sz=3D=3D4 -- convert F32 in mem/low quarter xmm to I32 in ire=
g,=20
truncating towards zero
@@ -8398,7 +8405,7 @@
*/
if (haveF3no66noF2(pfx)=20
&& insn[0] =3D=3D 0x0F=20
- && ( /* insn[1] =3D=3D 0x2D || */ insn[1] =3D=3D 0x2C)) {
+ && (insn[1] =3D=3D 0x2D || insn[1] =3D=3D 0x2C)) {
IRTemp rmode =3D newTemp(Ity_I32);
IRTemp f32lo =3D newTemp(Ity_F32);
Bool r2zero =3D toBool(insn[1] =3D=3D 0x2C);
@@ -8441,57 +8448,13 @@
goto decode_success;
}
=20
+ /* 0F 5E =3D DIVPS -- div 32Fx4 from R/M to R */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x5E) {
+ delta =3D dis_SSE_E_to_G_all( pfx, delta+2, "divps", Iop_Div32Fx4 =
);
+ goto decode_success;
+ }
=20
-////////////////////////////////////////////////////////////////
-//.. /* F3 0F 2C =3D CVTTSS2SI -- convert F32 in mem/low quarter xmm =
to
-//.. I32 in ireg, according to prevailing SSE rounding mode */
-//.. if (insn[0] =3D=3D 0xF3 && insn[1] =3D=3D 0x0F=20
-//.. && (insn[2] =3D=3D 0x2D || insn[2] =3D=3D 0x2C)) {
-//.. IRTemp rmode =3D newTemp(Ity_I32);
-//.. IRTemp f32lo =3D newTemp(Ity_F32);
-//.. Bool r2zero =3D insn[2] =3D=3D 0x2C;
-//.. vassert(sz =3D=3D 4);
-//..=20
-//.. modrm =3D getUChar(delta+3);
-//.. if (epartIsReg(modrm)) {
-//.. delta +=3D 3+1;
-//.. assign(f32lo, getXMMRegLane32F(eregOfRM(modrm), 0));
-//.. DIP("cvt%sss2si %s,%s\n", r2zero ? "t" : "",
-//.. nameXMMReg(eregOfRM(modrm)),
-//.. nameIReg(4, gregOfRM(modrm)));
-//.. } else {
-//.. addr =3D disAMode ( &alen, sorb, delta+3, dis_buf );
-//.. assign(f32lo, loadLE(Ity_F32, mkexpr(addr)));
-//.. delta +=3D 3+alen;
-//.. DIP("cvt%sss2si %s,%s\n", r2zero ? "t" : "",
-//.. dis_buf,
-//.. nameIReg(4, gregOfRM(modrm)));
-//.. }
-//..=20
-//.. if (r2zero) {
-//.. assign( rmode, mkU32((UInt)Irrm_ZERO) );
-//.. } else {
-//.. assign( rmode, get_sse_roundingmode() );
-//.. }
-//..=20
-//.. putIReg(4, gregOfRM(modrm),
-//.. binop( Iop_F64toI32,=20
-//.. mkexpr(rmode),=20
-//.. unop( Iop_F32toF64, mkexpr(f32lo) ) )
-//.. );
-//..=20
-//.. goto decode_success;
-//.. }
-///////////////////////////////////////////////////////////////////
-
-
-//..=20
-//.. /* 0F 5E =3D DIVPS -- div 32Fx4 from R/M to R */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x5E) {
-//.. delta =3D dis_SSE_E_to_G_all( sorb, delta+2, "divps", Iop_Div=
32Fx4 );
-//.. goto decode_success;
-//.. }
-
/* F3 0F 5E =3D DIVSS -- div 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz =3D=3D 4
&& insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x5E) {
@@ -8548,11 +8511,12 @@
goto decode_success;
}
=20
-//.. /* 0F 5F =3D MAXPS -- max 32Fx4 from R/M to R */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x5F) {
-//.. delta =3D dis_SSE_E_to_G_all( sorb, delta+2, "maxps", Iop_Max=
32Fx4 );
-//.. goto decode_success;
-//.. }
+ /* 0F 5F =3D MAXPS -- max 32Fx4 from R/M to R */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x5F) {
+ delta =3D dis_SSE_E_to_G_all( pfx, delta+2, "maxps", Iop_Max32Fx4 =
);
+ goto decode_success;
+ }
=20
/* F3 0F 5F =3D MAXSS -- max 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz =3D=3D 4
@@ -8561,11 +8525,12 @@
goto decode_success;
}
=20
-//.. /* 0F 5D =3D MINPS -- min 32Fx4 from R/M to R */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x5D) {
-//.. delta =3D dis_SSE_E_to_G_all( sorb, delta+2, "minps", Iop_Min=
32Fx4 );
-//.. goto decode_success;
-//.. }
+ /* 0F 5D =3D MINPS -- min 32Fx4 from R/M to R */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x5D) {
+ delta =3D dis_SSE_E_to_G_all( pfx, delta+2, "minps", Iop_Min32Fx4 =
);
+ goto decode_success;
+ }
=20
/* F3 0F 5D =3D MINSS -- min 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz =3D=3D 4
@@ -8612,81 +8577,85 @@
}
}
=20
-//.. /* 0F 16 =3D MOVHPS -- move from mem to high half of XMM. */
-//.. /* 0F 16 =3D MOVLHPS -- move from lo half to hi half of XMM. */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x16) {
-//.. modrm =3D getUChar(delta+2);
-//.. if (epartIsReg(modrm)) {
-//.. delta +=3D 2+1;
-//.. putXMMRegLane64( gregOfRM(modrm), 1/*upper lane*/,
-//.. getXMMRegLane64( eregOfRM(modrm), 0 ) );
-//.. DIP("movhps %s,%s\n", nameXMMReg(eregOfRM(modrm)),=20
-//.. nameXMMReg(gregOfRM(modrm)));
-//.. } else {
-//.. addr =3D disAMode ( &alen, sorb, delta+2, dis_buf );
-//.. delta +=3D 2+alen;
-//.. putXMMRegLane64( gregOfRM(modrm), 1/*upper lane*/,
-//.. loadLE(Ity_I64, mkexpr(addr)) );
-//.. DIP("movhps %s,%s\n", dis_buf,=20
-//.. nameXMMReg( gregOfRM(modrm) ));
-//.. }
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 0F 17 =3D MOVHPS -- move from high half of XMM to mem. */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x17) {
-//.. if (!epartIsReg(insn[2])) {
-//.. delta +=3D 2;
-//.. addr =3D disAMode ( &alen, sorb, delta, dis_buf );
-//.. delta +=3D alen;
-//.. storeLE( mkexpr(addr),=20
-//.. getXMMRegLane64( gregOfRM(insn[2]),
-//.. 1/*upper lane*/ ) );
-//.. DIP("movhps %s,%s\n", nameXMMReg( gregOfRM(insn[2]) ),
-//.. dis_buf);
-//.. goto decode_success;
-//.. }
-//.. /* else fall through */
-//.. }
-//..=20
-//.. /* 0F 12 =3D MOVLPS -- move from mem to low half of XMM. */
-//.. /* OF 12 =3D MOVHLPS -- from from hi half to lo half of XMM. */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x12) {
-//.. modrm =3D getUChar(delta+2);
-//.. if (epartIsReg(modrm)) {
-//.. delta +=3D 2+1;
-//.. putXMMRegLane64( gregOfRM(modrm), =20
-//.. 0/*lower lane*/,
-//.. getXMMRegLane64( eregOfRM(modrm), 1 ));
-//.. DIP("movhlps %s, %s\n", nameXMMReg(eregOfRM(modrm)),=20
-//.. nameXMMReg(gregOfRM(modrm)));
-//.. } else {
-//.. addr =3D disAMode ( &alen, sorb, delta+2, dis_buf );
-//.. delta +=3D 2+alen;
-//.. putXMMRegLane64( gregOfRM(modrm), 0/*lower lane*/,
-//.. loadLE(Ity_I64, mkexpr(addr)) );
-//.. DIP("movlps %s, %s\n",=20
-//.. dis_buf, nameXMMReg( gregOfRM(modrm) ));
-//.. }
-//.. goto decode_success;
-//.. }
-//..=20
-//.. /* 0F 13 =3D MOVLPS -- move from low half of XMM to mem. */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x13) {
-//.. if (!epartIsReg(insn[2])) {
-//.. delta +=3D 2;
-//.. addr =3D disAMode ( &alen, sorb, delta, dis_buf );
-//.. delta +=3D alen;
-//.. storeLE( mkexpr(addr),=20
-//.. getXMMRegLane64( gregOfRM(insn[2]),=20
-//.. 0/*lower lane*/ ) );
-//.. DIP("movlps %s, %s\n", nameXMMReg( gregOfRM(insn[2]) ),
-//.. dis_buf);
-//.. goto decode_success;
-//.. }
-//.. /* else fall through */
-//.. }
-//..=20
+ /* 0F 16 =3D MOVHPS -- move from mem to high half of XMM. */
+ /* 0F 16 =3D MOVLHPS -- move from lo half to hi half of XMM. */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x16) {
+ modrm =3D getUChar(delta+2);
+ if (epartIsReg(modrm)) {
+ delta +=3D 2+1;
+ putXMMRegLane64( gregOfRexRM(pfx,modrm), 1/*upper lane*/,
+ getXMMRegLane64( eregOfRexRM(pfx,modrm), 0 ) )=
;
+ DIP("movhps %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),=20
+ nameXMMReg(gregOfRexRM(pfx,modrm)));
+ } else {
+ addr =3D disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ delta +=3D 2+alen;
+ putXMMRegLane64( gregOfRexRM(pfx,modrm), 1/*upper lane*/,
+ loadLE(Ity_I64, mkexpr(addr)) );
+ DIP("movhps %s,%s\n", dis_buf,=20
+ nameXMMReg( gregOfRexRM(pfx,modrm) ));
+ }
+ goto decode_success;
+ }
+
+ /* 0F 17 =3D MOVHPS -- move from high half of XMM to mem. */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x17) {
+ if (!epartIsReg(insn[2])) {
+ delta +=3D 2;
+ addr =3D disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ delta +=3D alen;
+ storeLE( mkexpr(addr),=20
+ getXMMRegLane64( gregOfRexRM(pfx,insn[2]),
+ 1/*upper lane*/ ) );
+ DIP("movhps %s,%s\n", nameXMMReg( gregOfRexRM(pfx,insn[2]) ),
+ dis_buf);
+ goto decode_success;
+ }
+ /* else fall through */
+ }
+
+ /* 0F 12 =3D MOVLPS -- move from mem to low half of XMM. */
+ /* OF 12 =3D MOVHLPS -- from from hi half to lo half of XMM. */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x12) {
+ modrm =3D getUChar(delta+2);
+ if (epartIsReg(modrm)) {
+ delta +=3D 2+1;
+ putXMMRegLane64( gregOfRexRM(pfx,modrm), =20
+ 0/*lower lane*/,
+ getXMMRegLane64( eregOfRexRM(pfx,modrm), 1 ));
+ DIP("movhlps %s, %s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),=20
+ nameXMMReg(gregOfRexRM(pfx,modrm)));
+ } else {
+ addr =3D disAMode ( &alen, pfx, delta+2, dis_buf, 0 );
+ delta +=3D 2+alen;
+ putXMMRegLane64( gregOfRexRM(pfx,modrm), 0/*lower lane*/,
+ loadLE(Ity_I64, mkexpr(addr)) );
+ DIP("movlps %s, %s\n",=20
+ dis_buf, nameXMMReg( gregOfRexRM(pfx,modrm) ));
+ }
+ goto decode_success;
+ }
+
+ /* 0F 13 =3D MOVLPS -- move from low half of XMM to mem. */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x13) {
+ if (!epartIsReg(insn[2])) {
+ delta +=3D 2;
+ addr =3D disAMode ( &alen, pfx, delta, dis_buf, 0 );
+ delta +=3D alen;
+ storeLE( mkexpr(addr),=20
+ getXMMRegLane64( gregOfRexRM(pfx,insn[2]),=20
+ 0/*lower lane*/ ) );
+ DIP("movlps %s, %s\n", nameXMMReg( gregOfRexRM(pfx,insn[2]) ),
+ dis_buf);
+ goto decode_success;
+ }
+ /* else fall through */
+ }
+
//.. /* 0F 50 =3D MOVMSKPS - move 4 sign bits from 4 x F32 in xmm(E)
//.. to 4 lowest bits of ireg(G) */
//.. if (insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x50) {
@@ -8799,11 +8768,12 @@
}
}
=20
-//.. /* 0F 59 =3D MULPS -- mul 32Fx4 from R/M to R */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x59) {
-//.. delta =3D dis_SSE_E_to_G_all( sorb, delta+2, "mulps", Iop_Mul=
32Fx4 );
-//.. goto decode_success;
-//.. }
+ /* 0F 59 =3D MULPS -- mul 32Fx4 from R/M to R */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x59) {
+ delta =3D dis_SSE_E_to_G_all( pfx, delta+2, "mulps", Iop_Mul32Fx4 =
);
+ goto decode_success;
+ }
=20
/* F3 0F 59 =3D MULSS -- mul 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz =3D=3D 4
@@ -9187,11 +9157,12 @@
goto decode_success;
}
=20
-//.. /* 0F 5C =3D SUBPS -- sub 32Fx4 from R/M to R */
-//.. if (sz =3D=3D 4 && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x5C) {
-//.. delta =3D dis_SSE_E_to_G_all( sorb, delta+2, "subps", Iop_Sub=
32Fx4 );
-//.. goto decode_success;
-//.. }
+ /* 0F 5C =3D SUBPS -- sub 32Fx4 from R/M to R */
+ if (haveNo66noF2noF3(pfx) && sz =3D=3D 4=20
+ && insn[0] =3D=3D 0x0F && insn[1] =3D=3D 0x5C) {
+ delta =3D dis_SSE_E_to_G_all( pfx, delta+2, "subps", Iop_Sub32Fx4 =
);
+ goto decode_success;
+ }
=20
/* F3 0F 5C =3D SUBSS -- sub 32F0x4 from R/M to R */
if (haveF3no66noF2(pfx) && sz =3D=3D 4
@@ -12263,40 +12234,45 @@
//..=20
//.. DIP("pusha%c\n", nameISize(sz));
//.. break;
-//..=20
-//.. case 0x8F: /* POPL/POPW m32 */
-//.. { Int len;
-//.. UChar rm =3D getUChar(delta);
-//..=20
-//.. /* make sure this instruction is correct POP */
-//.. vassert(!epartIsReg(rm) && (gregOfRM(rm) =3D=3D 0));
-//.. /* and has correct size */
-//.. vassert(sz =3D=3D 4); =20
-//.. =20
-//.. t1 =3D newTemp(Ity_I32); t3 =3D newTemp(Ity_I32);
-//.. /* set t1 to ESP: t1 =3D ESP */
-//.. assign( t1, getIReg(4, R_ESP) );
-//.. /* load M[ESP] to virtual register t3: t3 =3D M[t1] */
-//.. assign( t3, loadLE(Ity_I32, mkexpr(t1)) );
-//.. =20
-//.. /* increase ESP; must be done before the STORE. Intel manua=
l says:
-//.. If the ESP register is used as a base register for addr=
essing
-//.. a destination operand in memory, the POP instruction co=
mputes
-//.. the effective address of the operand after it increment=
s the
-//.. ESP register.
-//.. */
-//.. putIReg(4, R_ESP, binop(Iop_Add32, mkexpr(t1), mkU32(sz)) );
-//..=20
-//.. /* resolve MODR/M */
-//.. addr =3D disAMode ( &len, sorb, delta, dis_buf);
-//.. storeLE( mkexpr(addr), mkexpr(t3) );
-//..=20
-//.. DIP("popl %s\n", dis_buf);
-//..=20
-//.. delta +=3D len;
-//.. break;
-//.. }
-//..=20
+
+ case 0x8F: { /* POPQ m64 / POPW m16 */
+ Int len;
+ /* There is no encoding for 32-bit pop in 64-bit mode.
+ So sz=3D=3D4 actually means sz=3D=3D8. */
+ if (haveF2orF3(pfx)) goto decode_failure;
+ vassert(sz =3D=3D 2 || sz =3D=3D 4);
+ if (sz =3D=3D 4) sz =3D 8;
+ if (sz !=3D 8) goto decode_failure; // until we know a sz=3D=3D2 t=
est case exists
+
+ UChar rm =3D getUChar(delta);
+
+ /* make sure this instruction is correct POP */
+ if (epartIsReg(rm) || gregLO3ofRM(rm) !=3D 0)
+ goto decode_failure;
+ /* and has correct size */
+ vassert(sz =3D=3D 8); =20
+ =20
+ t1 =3D newTemp(Ity_I64);
+ t3 =3D newTemp(Ity_I64);
+ assign( t1, getIReg64(R_RSP) );
+ assign( t3, loadLE(Ity_I64, mkexpr(t1)) );
+ =20
+ /* Increase RSP; must be done before the STORE. Intel manual
+ says: If the RSP register is used as a base register for
+ addressing a destination operand in memory, the POP
+ instruction computes the effective address of the operand
+ after it increments the RSP register. */
+ putIReg64(R_RSP, binop(Iop_Add64, mkexpr(t1), mkU64(sz)) );
+
+ addr =3D disAMode ( &len, pfx, delta, dis_buf, 0 );
+ storeLE( mkexpr(addr), mkexpr(t3) );
+
+ DIP("popl %s\n", dis_buf);
+
+ delta +=3D len;
+ break;
+ }
+
//.. //-- case 0x1F: /* POP %DS */
//.. //-- dis_pop_segreg( cb, R_DS, sz ); break;
//.. //-- case 0x07: /* POP %ES */
Modified: trunk/priv/host-amd64/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/hdefs.c 2005-05-09 22:23:38 UTC (rev 1175)
+++ trunk/priv/host-amd64/hdefs.c 2005-05-10 02:50:05 UTC (rev 1176)
@@ -3193,18 +3193,18 @@
vreg2ireg(i->Ain.Sse32Fx4.src) ));
*p++ =3D 0x0F;
switch (i->Ain.Sse32Fx4.op) {
- //case Asse_ADDF: *p++ =3D 0x58; break;
- //case Asse_DIVF: *p++ =3D 0x5E; break;
- //case Asse_MAXF: *p++ =3D 0x5F; break;
- //case Asse_MINF: *p++ =3D 0x5D; break;
- //case Asse_MULF: *p++ =3D 0x59; break;
+ case Asse_ADDF: *p++ =3D 0x58; break;
+ case Asse_DIVF: *p++ =3D 0x5E; break;
+ case Asse_MAXF: *p++ =3D 0x5F; break;
+ case Asse_MINF: *p++ =3D 0x5D; break;
+ case Asse_MULF: *p++ =3D 0x59; break;
//case Asse_RCPF: *p++ =3D 0x53; break;
//case Asse_RSQRTF: *p++ =3D 0x52; break;
//case Asse_SQRTF: *p++ =3D 0x51; break;
- //case Asse_SUBF: *p++ =3D 0x5C; break;
+ case Asse_SUBF: *p++ =3D 0x5C; break;
case Asse_CMPEQF: *p++ =3D 0xC2; xtra =3D 0x100; break;
- //case Asse_CMPLTF: *p++ =3D 0xC2; xtra =3D 0x101; break;
- //case Asse_CMPLEF: *p++ =3D 0xC2; xtra =3D 0x102; break;
+ case Asse_CMPLTF: *p++ =3D 0xC2; xtra =3D 0x101; break;
+ case Asse_CMPLEF: *p++ =3D 0xC2; xtra =3D 0x102; break;
default: goto bad;
}
p =3D doAMode_R(p, vreg2ireg(i->Ain.Sse32Fx4.dst),
@@ -3258,7 +3258,7 @@
//.. case Xsse_RSQRTF: *p++ =3D 0x52; break;
//.. case Xsse_SQRTF: *p++ =3D 0x51; break;
case Asse_SUBF: *p++ =3D 0x5C; break;
-//.. case Xsse_CMPEQF: *p++ =3D 0xC2; xtra =3D 0x100; break;
+ case Asse_CMPEQF: *p++ =3D 0xC2; xtra =3D 0x100; break;
case Asse_CMPLTF: *p++ =3D 0xC2; xtra =3D 0x101; break;
case Asse_CMPLEF: *p++ =3D 0xC2; xtra =3D 0x102; break;
default: goto bad;
Modified: trunk/priv/host-amd64/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/isel.c 2005-05-09 22:23:38 UTC (rev 1175)
+++ trunk/priv/host-amd64/isel.c 2005-05-10 02:50:05 UTC (rev 1176)
@@ -3298,25 +3298,25 @@
return dst;
}
=20
-//.. case Iop_CmpEQ32Fx4: op =3D Xsse_CMPEQF; goto do_32Fx4;
-//.. case Iop_CmpLT32Fx4: op =3D Xsse_CMPLTF; goto do_32Fx4;
-//.. case Iop_CmpLE32Fx4: op =3D Xsse_CMPLEF; goto do_32Fx4;
-//.. case Iop_Add32Fx4: op =3D Xsse_ADDF; goto do_32Fx4;
-//.. case Iop_Div32Fx4: op =3D Xsse_DIVF; goto do_32Fx4;
-//.. case Iop_Max32Fx4: op =3D Xsse_MAXF; goto do_32Fx4;
-//.. case Iop_Min32Fx4: op =3D Xsse_MINF; goto do_32Fx4;
-//.. case Iop_Mul32Fx4: op =3D Xsse_MULF; goto do_32Fx4;
-//.. case Iop_Sub32Fx4: op =3D Xsse_SUBF; goto do_32Fx4;
-//.. do_32Fx4:
-//.. {
-//.. HReg argL =3D iselVecExpr(env, e->Iex.Binop.arg1);
-//.. HReg argR =3D iselVecExpr(env, e->Iex.Binop.arg2);
-//.. HReg dst =3D newVRegV(env);
-//.. addInstr(env, mk_vMOVsd_RR(argL, dst));
-//.. addInstr(env, X86Instr_Sse32Fx4(op, argR, dst));
-//.. return dst;
-//.. }
-//..=20
+ case Iop_CmpEQ32Fx4: op =3D Asse_CMPEQF; goto do_32Fx4;
+ case Iop_CmpLT32Fx4: op =3D Asse_CMPLTF; goto do_32Fx4;
+ case Iop_CmpLE32Fx4: op =3D Asse_CMPLEF; goto do_32Fx4;
+ case Iop_Add32Fx4: op =3D Asse_ADDF; goto do_32Fx4;
+ case Iop_Div32Fx4: op =3D Asse_DIVF; goto do_32Fx4;
+ case Iop_Max32Fx4: op =3D Asse_MAXF; goto do_32Fx4;
+ case Iop_Min32Fx4: op =3D Asse_MINF; goto do_32Fx4;
+ case Iop_Mul32Fx4: op =3D Asse_MULF; goto do_32Fx4;
+ case Iop_Sub32Fx4: op =3D Asse_SUBF; goto do_32Fx4;
+ do_32Fx4:
+ {
+ HReg argL =3D iselVecExpr(env, e->Iex.Binop.arg1);
+ HReg argR =3D iselVecExpr(env, e->Iex.Binop.arg2);
+ HReg dst =3D newVRegV(env);
+ addInstr(env, mk_vMOVsd_RR(argL, dst));
+ addInstr(env, AMD64Instr_Sse32Fx4(op, argR, dst));
+ return dst;
+ }
+
//.. case Iop_CmpEQ64Fx2: op =3D Xsse_CMPEQF; goto do_64Fx2;
//.. case Iop_CmpLT64Fx2: op =3D Xsse_CMPLTF; goto do_64Fx2;
//.. case Iop_CmpLE64Fx2: op =3D Xsse_CMPLEF; goto do_64Fx2;
@@ -3336,7 +3336,7 @@
return dst;
}
=20
-//.. case Iop_CmpEQ32F0x4: op =3D Xsse_CMPEQF; goto do_32F0x4;
+ case Iop_CmpEQ32F0x4: op =3D Asse_CMPEQF; goto do_32F0x4;
case Iop_CmpLT32F0x4: op =3D Asse_CMPLTF; goto do_32F0x4;
case Iop_CmpLE32F0x4: op =3D Asse_CMPLEF; goto do_32F0x4;
case Iop_Add32F0x4: op =3D Asse_ADDF; goto do_32F0x4;
|
|
From: <sv...@va...> - 2005-05-10 02:49:18
|
Author: sewardj
Date: 2005-05-10 03:49:11 +0100 (Tue, 10 May 2005)
New Revision: 3649
Added:
trunk/none/tests/amd64/insn_sse.def
Modified:
trunk/none/tests/amd64/gen_insn_test.pl
Log:
* test cases for amd64 SSE
* modify gen_insn_test to handle them
Modified: trunk/none/tests/amd64/gen_insn_test.pl
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/none/tests/amd64/gen_insn_test.pl 2005-05-10 02:47:21 UTC (rev =
3648)
+++ trunk/none/tests/amd64/gen_insn_test.pl 2005-05-10 02:49:11 UTC (rev =
3649)
@@ -144,7 +144,7 @@
__attribute__((unused))
static int eq_float(float f1, float f2)
{
- return f1 =3D=3D f2 || fabsf(f1 - f2) < fabsf(f1) * 1.5 * pow(2,-12);
+ return f1 =3D=3D f2 || fabsf(f1 - f2) < fabsf(f1) * 1.5 * powf(2,-12)=
;
}
=20
__attribute__((unused))
@@ -663,8 +663,8 @@
}
elsif ($arg->{type} eq "xmm")
{
- print qq| \"movlps 0%$arg->{argnum}, %%$arg->{regist=
er}\\n\"\n|;
- print qq| \"movhps 8%$arg->{argnum}, %%$arg->{regist=
er}\\n\"\n|;
+ print qq| \"movlps 0+%$arg->{argnum}, %%$arg->{regis=
ter}\\n\"\n|;
+ print qq| \"movhps 8+%$arg->{argnum}, %%$arg->{regis=
ter}\\n\"\n|;
}
elsif ($arg->{type} eq "st")
{
@@ -693,20 +693,21 @@
=20
if (defined($eflagsmask) || defined($eflagsset))
{
- print qq| \"pushfl\\n\"\n|;
- print qq| \"andl \$$eflagsmask, (%%esp)\\n\"\n| if defin=
ed($eflagsmask);
- print qq| \"orl \$$eflagsset, (%%esp)\\n\"\n| if defined=
($eflagsset);
- print qq| \"popfl\\n\"\n|;
+ print qq| \"pushfq\\n\"\n|;
+ print qq| \"andl \$$eflagsmask, (%%rsp)\\n\"\n| if defin=
ed($eflagsmask);
+ print qq| \"andl \$0, 8(%%rsp)\\n\"\n| if defined($eflag=
smask);
+ print qq| \"orq \$$eflagsset, (%%rsp)\\n\"\n| if defined=
($eflagsset);
+ print qq| \"popfq\\n\"\n|;
}
=20
if (defined($fpucwmask) || defined($fpucwset))
{
- print qq| \"subl \$2, %%esp\\n\"\n|;
- print qq| \"fstcw (%%esp)\\n\"\n|;
- print qq| \"andw \$$fpucwmask, (%%esp)\\n\"\n| if define=
d($fpucwmask);
- print qq| \"orw \$$fpucwset, (%%esp)\\n\"\n| if defined(=
$fpucwset);
- print qq| \"fldcw (%%esp)\\n\"\n|;
- print qq| \"addl \$2, %%esp\\n\"\n|;
+ print qq| \"subl \$2, %%rsp\\n\"\n|;
+ print qq| \"fstcw (%%rsp)\\n\"\n|;
+ print qq| \"andw \$$fpucwmask, (%%rsp)\\n\"\n| if define=
d($fpucwmask);
+ print qq| \"orw \$$fpucwset, (%%rsp)\\n\"\n| if defined(=
$fpucwset);
+ print qq| \"fldcw (%%rsp)\\n\"\n|;
+ print qq| \"addl \$2, %%rsp\\n\"\n|;
}
=20
print qq| \"$insn|;
@@ -776,8 +777,8 @@
}
elsif ($result->{type} eq "xmm")
{
- print qq| \"movlps %%$result->{register}, 0%$result-=
>{argnum}\\n\"\n|;
- print qq| \"movhps %%$result->{register}, 8%$result-=
>{argnum}\\n\"\n|;
+ print qq| \"movlps %%$result->{register}, 0+%$result=
->{argnum}\\n\"\n|;
+ print qq| \"movhps %%$result->{register}, 8+%$result=
->{argnum}\\n\"\n|;
}
elsif ($result->{type} eq "st")
{
@@ -785,8 +786,8 @@
}
elsif ($result->{type} eq "eflags")
{
- print qq| \"pushfl\\n\"\n|;
- print qq| \"popl %$result->{argnum}\\n\"\n|;
+ print qq| \"pushfq\\n\"\n|;
+ print qq| \"popq %$result->{argnum}\\n\"\n|;
}
elsif ($result->{type} eq "fpucw")
{
Added: trunk/none/tests/amd64/insn_sse.def
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/none/tests/amd64/insn_sse.def 2005-05-10 02:47:21 UTC (rev 3648=
)
+++ trunk/none/tests/amd64/insn_sse.def 2005-05-10 02:49:11 UTC (rev 3649=
)
@@ -0,0 +1,146 @@
+addps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] =3D=
> 1.ps[56.78,90.11,65.43,98.76]
+addps m128.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] =3D=
> 1.ps[56.78,90.11,65.43,98.76]
+addss xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] =3D=
> 1.ps[56.78,33.33,22.22,11.11]
+addss m128.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] =3D=
> 1.ps[56.78,33.33,22.22,11.11]
+andnps xmm.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789=
abcdef,0xfdb97531eca86420] =3D> 1.uq[0xfc98301064002000,0x00020046010389c=
f]
+andnps m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x012345678=
9abcdef,0xfdb97531eca86420] =3D> 1.uq[0xfc98301064002000,0x00020046010389=
cf]
+andps xmm.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789a=
bcdef,0xfdb97531eca86420] =3D> 1.uq[0x0121452188a84420,0x0121452188a84420=
]
+andps m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789=
abcdef,0xfdb97531eca86420] =3D> 1.uq[0x0121452188a84420,0x0121452188a8442=
0]
+cmpeqps xmm.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5678,234.=
5679,234.5678,234.5679] =3D> 1.ud[0xffffffff,0x00000000,0xffffffff,0x0000=
0000]
+cmpeqps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5678,234=
.5679,234.5678,234.5679] =3D> 1.ud[0xffffffff,0x00000000,0xffffffff,0x000=
00000]
+cmpeqss xmm.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5678,0.0,0.0,0.0] =3D>=
1.ud[0xffffffff,0,0,0]
+cmpeqss m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] =3D=
> 1.ud[0x00000000,0,0,0]
+cmpleps xmm.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5678,234.=
5679,234.5678,234.5679] =3D> 1.ud[0xffffffff,0x00000000,0xffffffff,0x0000=
0000]
+cmpleps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5678,234=
.5679,234.5678,234.5679] =3D> 1.ud[0xffffffff,0x00000000,0xffffffff,0x000=
00000]
+cmpless xmm.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5678,0.0,0.0,0.0] =3D>=
1.ud[0xffffffff,0,0,0]
+cmpless m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] =3D=
> 1.ud[0x00000000,0,0,0]
+cmpltps xmm.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5677,234.=
5679,234.5677,234.5679] =3D> 1.ud[0xffffffff,0x00000000,0xffffffff,0x0000=
0000]
+cmpltps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5677,234=
.5679,234.5677,234.5679] =3D> 1.ud[0xffffffff,0x00000000,0xffffffff,0x000=
00000]
+cmpltss xmm.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5676,0.0,0.0,0.0] =3D>=
1.ud[0xffffffff,0,0,0]
+cmpltss m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] =3D=
> 1.ud[0x00000000,0,0,0]
+cmpneqps xmm.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5679,234=
.5678,234.5679,234.5678] =3D> 1.ud[0xffffffff,0x00000000,0xffffffff,0x000=
00000]
+cmpneqps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5679,23=
4.5678,234.5679,234.5678] =3D> 1.ud[0xffffffff,0x00000000,0xffffffff,0x00=
000000]
+cmpneqss xmm.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] =3D=
> 1.ud[0xffffffff,0,0,0]
+cmpneqss m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5678,0.0,0.0,0.0] =3D=
> 1.ud[0x00000000,0,0,0]
+cmpnleps xmm.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5679,234=
.5678,234.5679,234.5678] =3D> 1.ud[0xffffffff,0x00000000,0xffffffff,0x000=
00000]
+cmpnleps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5679,23=
4.5678,234.5679,234.5678] =3D> 1.ud[0xffffffff,0x00000000,0xffffffff,0x00=
000000]
+cmpnless xmm.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] =3D=
> 1.ud[0xffffffff,0,0,0]
+cmpnless m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5678,0.0,0.0,0.0] =3D=
> 1.ud[0x00000000,0,0,0]
+cmpnltps xmm.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5679,234=
.5677,234.5679,234.5677] =3D> 1.ud[0xffffffff,0x00000000,0xffffffff,0x000=
00000]
+cmpnltps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5679,23=
4.5677,234.5679,234.5677] =3D> 1.ud[0xffffffff,0x00000000,0xffffffff,0x00=
000000]
+cmpnltss xmm.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] =3D=
> 1.ud[0xffffffff,0,0,0]
+cmpnltss m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5676,0.0,0.0,0.0] =3D=
> 1.ud[0x00000000,0,0,0]
+comiss xmm.ps[234.5678,0.0] xmm.ps[234.5679,0.0] =3D> eflags[0x8d5,0x000=
]
+comiss m32.ps[234.5678] xmm.ps[234.5679,0.0] =3D> eflags[0x8d5,0x000]
+comiss xmm.ps[234.5678,0.0] xmm.ps[234.5677,0.0] =3D> eflags[0x8d5,0x001=
]
+comiss m32.ps[234.5678] xmm.ps[234.5677,0.0] =3D> eflags[0x8d5,0x001]
+comiss xmm.ps[234.5678,0.0] xmm.ps[234.5678,0.0] =3D> eflags[0x8d5,0x040=
]
+comiss m32.ps[234.5678] xmm.ps[234.5678,0.0] =3D> eflags[0x8d5,0x040]
+cvtpi2ps mm.sd[1234,5678] xmm.ps[1.1,2.2,3.3,4.4] =3D> 1.ps[1234.0,5678.=
0,3.3,4.4]
+cvtpi2ps m64.sd[1234,5678] xmm.ps[1.1,2.2,3.3,4.4] =3D> 1.ps[1234.0,5678=
.0,3.3,4.4]
+cvtps2pi xmm.ps[12.34,56.78,1.11,2.22] mm.sd[1,2] =3D> 1.sd[12,57]
+cvtps2pi m128.ps[12.34,56.78,1.11,2.22] mm.sd[1,2] =3D> 1.sd[12,57]
+cvtsi2ss r32.sd[12] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.ps[12.0,2.22,3.33=
,4.44]
+cvtsi2ss m32.sd[12] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.ps[12.0,2.22,3.33=
,4.44]
+cvtss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] =3D> 1.sd[12]
+cvtss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] =3D> 1.sd[57]
+cvttps2pi xmm.ps[12.34,56.78,1.11,2.22] mm.sd[1,2] =3D> 1.sd[12,56]
+cvttps2pi m128.ps[12.34,56.78,1.11,2.22] mm.sd[1,2] =3D> 1.sd[12,56]
+cvttss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] =3D> 1.sd[12]
+cvttss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] =3D> 1.sd[56]
+divps xmm.ps[2.0,3.0,4.0,5.0] xmm.ps[24.68,3.69,48.48,55.55] =3D> 1.ps[1=
2.34,1.23,12.12,11.11]
+divps m128.ps[2.0,3.0,4.0,5.0] xmm.ps[24.68,3.69,48.48,55.55] =3D> 1.ps[=
12.34,1.23,12.12,11.11]
+divss xmm.ps[2.0,3.0,4.0,5.0] xmm.ps[24.68,3.69,48.48,55.55] =3D> 1.ps[1=
2.34,3.69,48.48,55.55]
+divss m128.ps[2.0,3.0,4.0,5.0] xmm.ps[24.68,3.69,48.48,55.55] =3D> 1.ps[=
12.34,3.69,48.48,55.55]
+maxps xmm.ps[2.22,4.44,6.66,8.88] xmm.ps[7.77,5.55,3.33,1.11] =3D> 1.ps[=
7.77,5.55,6.66,8.88]
+maxps m128.ps[2.22,4.44,6.66,8.88] xmm.ps[7.77,5.55,3.33,1.11] =3D> 1.ps=
[7.77,5.55,6.66,8.88]
+maxss xmm.ps[2.22,4.44,6.66,8.88] xmm.ps[7.77,5.55,3.33,1.11] =3D> 1.ps[=
7.77,5.55,3.33,1.11]
+maxss m128.ps[8.88,6.66,4.44,2.22] xmm.ps[1.11,3.33,5.55,7.77] =3D> 1.ps=
[8.88,3.33,5.55,7.77]
+minps xmm.ps[2.22,4.44,6.66,8.88] xmm.ps[7.77,5.55,3.33,1.11] =3D> 1.ps[=
2.22,4.44,3.33,1.11]
+minps m128.ps[2.22,4.44,6.66,8.88] xmm.ps[7.77,5.55,3.33,1.11] =3D> 1.ps=
[2.22,4.44,3.33,1.11]
+minss xmm.ps[2.22,4.44,6.66,8.88] xmm.ps[7.77,5.55,3.33,1.11] =3D> 1.ps[=
2.22,5.55,3.33,1.11]
+minss m128.ps[8.88,6.66,4.44,2.22] xmm.ps[1.11,3.33,5.55,7.77] =3D> 1.ps=
[1.11,3.33,5.55,7.77]
+movaps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.11,22.22,33.33,44.44] =3D=
> 1.ps[12.34,56.78,43.21,87.65]
+movaps m128.ps[12.34,56.78,43.21,87.65] xmm.ps[11.11,22.22,33.33,44.44] =
=3D> 1.ps[12.34,56.78,43.21,87.65]
+movhlps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.11,22.22,33.33,44.44] =
=3D> 1.ps[43.21,87.65,33.33,44.44]
+movhps m64.ps[12.34,56.78] xmm.ps[11.11,22.22,33.33,44.44] =3D> 1.ps[11.=
11,22.22,12.34,56.78]
+movhps xmm.ps[12.34,56.78,43.21,87.65] m64.ps[11.11,22.22] =3D> 1.ps[43.=
21,87.65]
+movlhps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.11,22.22,33.33,44.44] =
=3D> 1.ps[11.11,22.22,12.34,56.78]
+movlps m64.ps[12.34,56.78] xmm.ps[11.11,22.22,33.33,44.44] =3D> 1.ps[12.=
34,56.78,33.33,44.44]
+movlps xmm.ps[12.34,56.78,43.21,87.65] m64.ps[11.11,22.22] =3D> 1.ps[12.=
34,56.78]
+movmskps xmm.ps[12.34,-56.78,43.21,-87.65] r32.sd[0] =3D> 1.sd[10]
+movntps xmm.ps[12.34,56.78,43.21,87.65] m128.ps[11.11,22.22,33.33,44.44]=
=3D> 1.ps[12.34,56.78,43.21,87.65]
+movntq mm.uq[0x0123456789abcdef] m64.uq[0x1212121234343434] =3D> 1.uq[0x=
0123456789abcdef]
+movss xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.11,22.22,33.33,44.44] =3D=
> 1.ps[12.34,22.22,33.33,44.44]
+movss m32.ps[12.34] xmm.ps[11.11,22.22,33.33,44.44] =3D> 1.ps[12.34,0.0,=
0.0,0.0]
+movss xmm.ps[12.34,56.78,43.21,87.65] m32.ps[11.11] =3D> 1.ps[12.34]
+movups xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.11,22.22,33.33,44.44] =3D=
> 1.ps[12.34,56.78,43.21,87.65]
+movups m128.ps[12.34,56.78,43.21,87.65] xmm.ps[11.11,22.22,33.33,44.44] =
=3D> 1.ps[12.34,56.78,43.21,87.65]
+mulps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[5.0,4.0,3.0,2.0] =3D> 1.ps[=
61.70,227.12,129.63,175.30]
+mulps m128.ps[12.34,56.78,43.21,87.65] xmm.ps[5.0,4.0,3.0,2.0] =3D> 1.ps=
[61.70,227.12,129.63,175.30]
+mulss xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[5.0,4.0,3.0,2.0] =3D> 1.ps[=
61.70,4.0,3.0,2.0]
+mulss m128.ps[12.34,56.78,43.21,87.65] xmm.ps[5.0,4.0,3.0,2.0] =3D> 1.ps=
[61.70,4.0,3.0,2.0]
+orps xmm.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789ab=
cdef,0xfdb97531eca86420] =3D> 1.uq[0xfdbb7577edabedef,0xfdbb7577edabedef]
+orps m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789a=
bcdef,0xfdb97531eca86420] =3D> 1.uq[0xfdbb7577edabedef,0xfdbb7577edabedef=
]
+pavgb mm.ub[11,22,33,44,55,66,77,88] mm.ub[15,25,35,45,55,65,75,85] =3D>=
1.ub[13,24,34,45,55,66,76,87]
+pavgb m64.ub[11,22,33,44,55,66,77,88] mm.ub[15,25,35,45,55,65,75,85] =3D=
> 1.ub[13,24,34,45,55,66,76,87]
+pavgw mm.uw[1122,3344,5566,7788] mm.uw[1525,3545,5565,7585] =3D> 1.uw[13=
24,3445,5566,7687]
+pavgw m64.uw[1122,3344,5566,7788] mm.uw[1525,3545,5565,7585] =3D> 1.uw[1=
324,3445,5566,7687]
+pextrw imm8[0] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] =3D> 2.ud[1=
234]
+pextrw imm8[1] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] =3D> 2.ud[5=
678]
+pextrw imm8[2] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] =3D> 2.ud[4=
321]
+pextrw imm8[3] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] =3D> 2.ud[8=
765]
+pinsrw imm8[0] r32.ud[0xffffffff] mm.uw[1234,5678,4321,8765] =3D> 2.uw[6=
5535,5678,4321,8765]
+pinsrw imm8[1] r32.ud[0xffffffff] mm.uw[1234,5678,4321,8765] =3D> 2.uw[1=
234,65535,4321,8765]
+pinsrw imm8[2] r32.ud[0xffffffff] mm.uw[1234,5678,4321,8765] =3D> 2.uw[1=
234,5678,65535,8765]
+pinsrw imm8[3] r32.ud[0xffffffff] mm.uw[1234,5678,4321,8765] =3D> 2.uw[1=
234,5678,4321,65535]
+pinsrw imm8[0] m16.uw[0xffff] mm.uw[1234,5678,4321,8765] =3D> 2.uw[65535=
,5678,4321,8765]
+pinsrw imm8[1] m16.uw[0xffff] mm.uw[1234,5678,4321,8765] =3D> 2.uw[1234,=
65535,4321,8765]
+pinsrw imm8[2] m16.uw[0xffff] mm.uw[1234,5678,4321,8765] =3D> 2.uw[1234,=
5678,65535,8765]
+pinsrw imm8[3] m16.uw[0xffff] mm.uw[1234,5678,4321,8765] =3D> 2.uw[1234,=
5678,4321,65535]
+pmaxsw mm.sw[-1,2,-3,4] mm.sw[2,-3,4,-5] =3D> 1.sw[2,2,4,4]
+pmaxsw m64.sw[-1,2,-3,4] mm.sw[2,-3,4,-5] =3D> 1.sw[2,2,4,4]
+pmaxub mm.ub[1,2,3,4,5,6,7,8] mm.ub[8,7,6,5,4,3,2,1] =3D> 1.ub[8,7,6,5,5=
,6,7,8]
+pmaxub m64.ub[1,2,3,4,5,6,7,8] mm.ub[8,7,6,5,4,3,2,1] =3D> 1.ub[8,7,6,5,=
5,6,7,8]
+pminsw mm.sw[-1,2,-3,4] mm.sw[2,-3,4,-5] =3D> 1.sw[-1,-3,-3,-5]
+pminsw m64.sw[-1,2,-3,4] mm.sw[2,-3,4,-5] =3D> 1.sw[-1,-3,-3,-5]
+pminub mm.ub[1,2,3,4,5,6,7,8] mm.ub[8,7,6,5,4,3,2,1] =3D> 1.ub[1,2,3,4,4=
,3,2,1]
+pminub m64.ub[1,2,3,4,5,6,7,8] mm.ub[8,7,6,5,4,3,2,1] =3D> 1.ub[1,2,3,4,=
4,3,2,1]
+pmovmskb mm.uq[0x8000000080008088] r32.ud[0] =3D> 1.ud[0x8b]
+pmulhuw mm.uw[1111,2222,3333,4444] mm.uw[5555,6666,7777,8888] =3D> 1.uw[=
0x005e,0x00e2,0x018b,0x025a]
+pmulhuw m64.uw[1111,2222,3333,4444] mm.uw[5555,6666,7777,8888] =3D> 1.uw=
[0x005e,0x00e2,0x018b,0x025a]
+psadbw mm.ub[1,2,3,4,5,6,7,8] mm.ub[8,7,6,5,4,3,2,1] =3D> 1.sw[32,0,0,0]
+psadbw m64.ub[1,2,3,4,5,6,7,8] mm.ub[8,7,6,5,4,3,2,1] =3D> 1.sw[32,0,0,0=
]
+pshufw imm8[0x1b] mm.sw[11,22,33,44] mm.sw[0,0,0,0] =3D> 2.sw[44,33,22,1=
1]
+pshufw imm8[0x1b] m64.sw[11,22,33,44] mm.sw[0,0,0,0] =3D> 2.sw[44,33,22,=
11]
+rcpps xmm.ps[2.0,4.0,0.5,0.25] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.ps[0.5=
,0.25,2.0,4.0]
+rcpps m128.ps[2.0,4.0,0.5,0.25] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.ps[0.=
5,0.25,2.0,4.0]
+rcpss xmm.ps[2.0,4.0,0.5,0.25] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.ps[0.5=
,2.22,3.33,4.44]
+rcpss m128.ps[2.0,4.0,0.5,0.25] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.ps[0.=
5,2.22,3.33,4.44]
+rsqrtps xmm.ps[4.0,16.0,25.0,64.0] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.ps=
[0.499878,0.249939,0.199982,0.124969]
+rsqrtps m128.ps[4.0,16.0,25.0,64.0] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.p=
s[0.499878,0.249939,0.199982,0.124969]
+rsqrtss xmm.ps[16.0,5.55,6.66,7.77] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.p=
s[0.249939,2.22,3.33,4.44]
+rsqrtss m128.ps[16.0,5.55,6.66,7.77] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.=
ps[0.249939,2.22,3.33,4.44]
+sfence
+shufps imm8[0xe4] xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[12.34,56.78,43.=
21,87.65] =3D> 2.ps[12.34,56.78,43.21,87.65]
+shufps imm8[0xb1] m128.ps[12.34,56.78,43.21,87.65] xmm.ps[12.34,56.78,43=
.21,87.65] =3D> 2.ps[56.78,12.34,87.65,43.21]
+sqrtps xmm.ps[16.0,25.0,36.0,49.0] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.ps=
[4.0,5.0,6.0,7.0]
+sqrtps m128.ps[16.0,25.0,36.0,49.0] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.p=
s[4.0,5.0,6.0,7.0]
+sqrtss xmm.ps[16.0,5.55,6.66,7.77] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.ps=
[4.0,2.22,3.33,4.44]
+sqrtss m128.ps[16.0,5.55,6.66,7.77] xmm.ps[1.11,2.22,3.33,4.44] =3D> 1.p=
s[4.0,2.22,3.33,4.44]
+subps xmm.ps[12.34,56.77,43.21,87.65] xmm.ps[44.0,33.0,22.0,11.0] =3D> 1=
.ps[31.66,-23.77,-21.21,-76.65]
+subps m128.ps[12.34,56.77,43.21,87.65] xmm.ps[44.0,33.0,22.0,11.0] =3D> =
1.ps[31.66,-23.77,-21.21,-76.65]
+subss xmm.ps[12.34,56.77,43.21,87.65] xmm.ps[44.0,33.0,22.0,11.0] =3D> 1=
.ps[31.66,33.0,22.0,11.0]
+subss m128.ps[12.34,56.77,43.21,87.65] xmm.ps[44.0,33.0,22.0,11.0] =3D> =
1.ps[31.66,33.0,22.0,11.0]
+ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5679,0.0] =3D> eflags[0x8d5,0x00=
0]
+ucomiss m32.ps[234.5678] xmm.ps[234.5679,0.0] =3D> eflags[0x8d5,0x000]
+ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5677,0.0] =3D> eflags[0x8d5,0x00=
1]
+ucomiss m32.ps[234.5678] xmm.ps[234.5677,0.0] =3D> eflags[0x8d5,0x001]
+ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5678,0.0] =3D> eflags[0x8d5,0x04=
0]
+ucomiss m32.ps[234.5678] xmm.ps[234.5678,0.0] =3D> eflags[0x8d5,0x040]
+unpckhps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.22,33.44,55.66,77.88]=
=3D> 1.ps[55.66,43.21,77.88,87.65]
+unpckhps m128.ps[12.34,56.78,43.21,87.65] xmm.ps[11.22,33.44,55.66,77.88=
] =3D> 1.ps[55.66,43.21,77.88,87.65]
+unpcklps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.22,33.44,55.66,77.88]=
=3D> 1.ps[11.22,12.34,33.44,56.78]
+unpcklps m128.ps[12.34,56.78,43.21,87.65] xmm.ps[11.22,33.44,55.66,77.88=
] =3D> 1.ps[11.22,12.34,33.44,56.78]
+xorps xmm.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789a=
bcdef,0xfdb97531eca86420] =3D> 1.uq[0xfc9a30566503a9cf,0xfc9a30566503a9cf=
]
+xorps m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789=
abcdef,0xfdb97531eca86420] =3D> 1.uq[0xfc9a30566503a9cf,0xfc9a30566503a9c=
f]
|
|
From: <sv...@va...> - 2005-05-10 02:47:29
|
Author: njn
Date: 2005-05-10 03:47:21 +0100 (Tue, 10 May 2005)
New Revision: 3648
Added:
trunk/coregrind/m_mallocfree.c
trunk/coregrind/m_replacemalloc/
trunk/coregrind/m_replacemalloc/Makefile.am
trunk/coregrind/m_replacemalloc/README_REPLACEMALLOC.txt
trunk/coregrind/m_replacemalloc/replacemalloc_core.c
trunk/coregrind/m_replacemalloc/vg_replace_malloc.c
trunk/coregrind/pub_core_mallocfree.h
trunk/coregrind/pub_core_replacemalloc.h
trunk/include/pub_tool_mallocfree.h
trunk/include/pub_tool_replacemalloc.h
Removed:
trunk/coregrind/vg_malloc2.c
trunk/coregrind/vg_replace_malloc.c
Modified:
trunk/Makefile.tool.am
trunk/addrcheck/Makefile.am
trunk/cachegrind/cg_main.c
trunk/configure.in
trunk/coregrind/Makefile.am
trunk/coregrind/README_MODULES.txt
trunk/coregrind/core.h
trunk/coregrind/vg_pthreadmodel.c
trunk/coregrind/vg_scheduler.c
trunk/helgrind/Makefile.am
trunk/helgrind/hg_main.c
trunk/include/Makefile.am
trunk/include/tool.h
trunk/massif/Makefile.am
trunk/massif/ms_main.c
trunk/memcheck/Makefile.am
trunk/memcheck/mac_shared.c
trunk/memcheck/mac_shared.h
trunk/memcheck/mc_main.c
Log:
Modularised the malloc/free stuff into two modules: m_mallocfree for the
malloc/free implementation, and m_replacemalloc with the stuff for the to=
ols
that replace malloc with their own version. Previously these two areas o=
f
functionality were mixed up somewhat.
Modified: trunk/Makefile.tool.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/Makefile.tool.am 2005-05-09 22:01:37 UTC (rev 3647)
+++ trunk/Makefile.tool.am 2005-05-10 02:47:21 UTC (rev 3648)
@@ -4,3 +4,6 @@
include $(top_srcdir)/Makefile.all.am
include $(top_srcdir)/Makefile.tool-flags.am
include $(top_srcdir)/Makefile.tool-inplace.am
+
+LIBREPLACEMALLOC =3D $(top_builddir)/coregrind/m_replacemalloc/libreplac=
emalloc_toolpreload.a
+
Modified: trunk/addrcheck/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/addrcheck/Makefile.am 2005-05-09 22:01:37 UTC (rev 3647)
+++ trunk/addrcheck/Makefile.am 2005-05-10 02:47:21 UTC (rev 3648)
@@ -16,10 +16,10 @@
vgpreload_addrcheck_so_LDADD =3D \
../memcheck/mac_replace_strmem.o
vgpreload_addrcheck_so_DEPENDENCIES =3D \
- $(top_builddir)/coregrind/lib_replace_malloc.a \
+ $(LIBREPLACEMALLOC) \
../memcheck/mac_replace_strmem.o
vgpreload_addrcheck_so_LDFLAGS =3D -shared -Wl,-z,interpose,-z,initfirst=
\
-Wl,--whole-archive \
- $(top_builddir)/coregrind/lib_replace_malloc.a \
+ $(LIBREPLACEMALLOC) \
-Wl,--no-whole-archive
=20
Modified: trunk/cachegrind/cg_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/cachegrind/cg_main.c 2005-05-09 22:01:37 UTC (rev 3647)
+++ trunk/cachegrind/cg_main.c 2005-05-10 02:47:21 UTC (rev 3648)
@@ -30,7 +30,7 @@
*/
=20
#include "tool.h"
-//#include "vg_profile.c"
+#include "pub_tool_mallocfree.h"
=20
#include "cg_arch.h"
#include "cg_sim.c"
Modified: trunk/configure.in
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/configure.in 2005-05-09 22:01:37 UTC (rev 3647)
+++ trunk/configure.in 2005-05-10 02:47:21 UTC (rev 3648)
@@ -395,6 +395,7 @@
coregrind/Makefile=20
coregrind/demangle/Makefile=20
coregrind/m_aspacemgr/Makefile=20
+ coregrind/m_replacemalloc/Makefile=20
coregrind/m_sigframe/Makefile=20
coregrind/m_syscalls/Makefile=20
coregrind/amd64/Makefile
Modified: trunk/coregrind/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/Makefile.am 2005-05-09 22:01:37 UTC (rev 3647)
+++ trunk/coregrind/Makefile.am 2005-05-10 02:47:21 UTC (rev 3648)
@@ -4,6 +4,7 @@
MODULES =3D \
demangle \
m_aspacemgr \
+ m_replacemalloc \
m_sigframe \
m_syscalls
=20
@@ -33,8 +34,6 @@
stage2 \
vg_inject.so
=20
-noinst_LIBRARIES =3D lib_replace_malloc.a
-
noinst_HEADERS =3D \
core.h \
core_asm.h \
@@ -42,6 +41,8 @@
pub_core_debuglog.h \
pub_core_errormgr.h \
pub_core_execontext.h \
+ pub_core_mallocfree.h \
+ pub_core_replacemalloc.h\
pub_core_sigframe.h \
pub_core_stacktrace.h \
pub_core_syscalls.h \
@@ -66,6 +67,7 @@
stage2_SOURCES =3D \
m_errormgr.c \
m_execontext.c \
+ m_mallocfree.c \
m_stacktrace.c \
m_debuglog.c \
ume.c \
@@ -73,9 +75,7 @@
vg_scheduler.c \
vg_demangle.c \
vg_hashtable.c \
- vg_replace_malloc.c \
vg_main.c \
- vg_malloc2.c \
vg_messages.c \
vg_mylibc.c \
vg_needs.c \
@@ -103,29 +103,42 @@
${VG_OS}/libos.a \
@VEX_DIR@/libvex.a
=20
-## Test repeated in both arms of the if-then-else because older versions=
of
-## automake don't seem to like having +=3D within an if-then-else.
+## These ones must be linked in with the --whole-archive flag, because t=
hey
+## wouldn't get pulled into stage otherwise (because they contain symbol=
s
+## only referred to by tool shared objects).
+stage2_extra2 =3D \
+ m_replacemalloc/libreplacemalloc_core.a
+=09
+## Nb: older versions of automake don't seem to like having +=3D within =
an
+## if-then-else, so we have to use these variables for the common parts.
+st2_DEPS_common =3D \
+ $(srcdir)/valgrind.vs \
+ $(stage2_extra) \
+ $(stage2_extra2)
+
+st2_LDFLAGS_common =3D \
+ -Wl,--export-dynamic -g \
+ -Wl,-version-script $(srcdir)/valgrind.vs
+
if USE_PIE
stage2_CFLAGS =3D $(AM_CFLAGS) -fpie
-stage2_DEPENDENCIES =3D \
- $(srcdir)/valgrind.vs \
- $(stage2_extra)
-stage2_LDFLAGS =3D -Wl,--export-dynamic -g \
- -Wl,-version-script $(srcdir)/valgrind.vs \
+stage2_DEPENDENCIES =3D $(st2_DEPS_common)
+stage2_LDFLAGS =3D \
+ $(st2_LDFLAGS_common) \
+ -Wl,--whole-archive $(stage2_extra2) -Wl,--no-whole-archive \
-pie
else
stage2_CFLAGS =3D $(AM_CFLAGS)
-stage2_DEPENDENCIES =3D \
- $(srcdir)/valgrind.vs ${VG_ARCH}/stage2.lds \
- $(stage2_extra)
-stage2_LDFLAGS =3D -Wl,--export-dynamic -g \
- -Wl,-version-script $(srcdir)/valgrind.vs \
+stage2_DEPENDENCIES =3D $(st2_DEPS_common) ${VG_ARCH}/stage2.lds
+stage2_LDFLAGS =3D \
+ $(st2_LDFLAGS_common) \
+ -Wl,--whole-archive $(stage2_extra2) -Wl,--no-whole-archive \
-Wl,-defsym,kickstart_base=3D@KICKSTART_BASE@ -Wl,-T,${VG_ARCH}/stage2.=
lds
endif
=20
-stage2_LDADD=3D $(stage2_extra) -ldl
+stage2_LDADD=3D $(stage2_extra) \
+ -ldl
=20
-
vg_inject_so_SOURCES =3D vg_intercept.c
vg_inject_so_CFLAGS =3D $(AM_CFLAGS) -fpic
vg_inject_so_LDADD =3D -ldl
@@ -134,9 +147,6 @@
-Wl,--soname,vg_inject.so \
-Wl,-z,initfirst
=20
-lib_replace_malloc_a_SOURCES =3D vg_replace_malloc.c
-lib_replace_malloc_a_CFLAGS =3D $(AM_CFLAGS) -fpic -fno-omit-frame-poin=
ter
-
MANUAL_DEPS =3D $(noinst_HEADERS) $(include_HEADERS)
=20
all-local:
Modified: trunk/coregrind/README_MODULES.txt
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/README_MODULES.txt 2005-05-09 22:01:37 UTC (rev 3647)
+++ trunk/coregrind/README_MODULES.txt 2005-05-10 02:47:21 UTC (rev 3648)
@@ -43,6 +43,8 @@
pub_tool_foo.h, if it exists. pub_tool_foo.h *must not* #include
pub_core_foo.h, nor any other pub_core_ header for that matter.
=20
+Module-private headers are named "priv_foo.h".
+
No module may include the private headers of any other module. If a
type/enum/function/struct/whatever is stated in neither
include/pub_tool_foo.h nor coregrind/pub_core_foo.h then module 'foo'
Modified: trunk/coregrind/core.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/core.h 2005-05-09 22:01:37 UTC (rev 3647)
+++ trunk/coregrind/core.h 2005-05-10 02:47:21 UTC (rev 3648)
@@ -1,7 +1,6 @@
=20
/*--------------------------------------------------------------------*/
-/*--- A header file for all private parts of Valgrind's core. ---*/
-/*--- Include no other! (more or less...) ---*/
+/*--- A header file for various private parts of Valgrind's core. ---*/
/*--- core.h ---*/
/*--------------------------------------------------------------------*/
=20
@@ -97,6 +96,7 @@
// eg. x86-linux/core_platform.h
#include "core_os.h" // OS-specific stuff, eg. linux/core_os.h
=20
+#include "pub_core_mallocfree.h" // for type 'ArenaId'
#include "pub_core_stacktrace.h" // for type 'StackTrace'
=20
#include "valgrind.h"
@@ -458,57 +458,6 @@
=20
=20
/* ---------------------------------------------------------------------
- Exports of vg_malloc2.c
- ------------------------------------------------------------------ */
-
-/* Allocation arenas. =20
-
- CORE for the core's general use.
- TOOL for the tool to use (and the only one it uses).
- SYMTAB for Valgrind's symbol table storage.
- CLIENT for the client's mallocs/frees, if the tool replaces gli=
bc's
- malloc() et al -- redzone size is chosen by the tool=
.
- DEMANGLE for the C++ demangler.
- EXECTXT for storing ExeContexts.
- ERRORS for storing CoreErrors.
-
- When adding a new arena, remember also to add it to ensure_mm_init().=
=20
-*/
-typedef Int ArenaId;
-
-#define VG_N_ARENAS 7
-
-#define VG_AR_CORE 0
-#define VG_AR_TOOL 1
-#define VG_AR_SYMTAB 2
-#define VG_AR_CLIENT 3
-#define VG_AR_DEMANGLE 4
-#define VG_AR_EXECTXT 5
-#define VG_AR_ERRORS 6
-
-// This is both the minimum payload size of a malloc'd block, and its
-// minimum alignment. Must be a power of 2 greater than 4, and should b=
e
-// greater than 8.
-#define VG_MIN_MALLOC_SZB 8
-
-extern void* VG_(arena_malloc) ( ArenaId arena, SizeT nbytes );
-extern void VG_(arena_free) ( ArenaId arena, void* ptr );
-extern void* VG_(arena_calloc) ( ArenaId arena,=20
- SizeT nmemb, SizeT bytes_per_memb );
-extern void* VG_(arena_realloc) ( ArenaId arena, void* ptr, SizeT size )=
;
-
-/* Sets the size of the redzones at the start and end of heap blocks. T=
his
- must be called before any of VG_(malloc) and friends are called. */
-extern void VG_(set_client_malloc_redzone_szB) ( SizeT rz_szB );
-
-extern SizeT VG_(arena_payload_szB) ( ArenaId aid, void* payload );
-
-extern void VG_(sanity_check_malloc_all) ( void );
-
-extern void VG_(print_all_arena_stats) ( void );
-
-
-/* ---------------------------------------------------------------------
Exports of vg_intercept.c
------------------------------------------------------------------ */
=20
@@ -575,10 +524,10 @@
A synonym for exit. */
#define VG_USERREQ__LIBC_FREERES_DONE 0x3029
=20
-/* Intercept prefix stuff. See coregrind/vg_replace_malloc.c for
- details. Unfortunately the "_vgi_" literal is also hardcoded in
- that file, so if you change this one you must also change the other
- one. */
+/* Intercept prefix stuff. See
+ coregrind/m_replace_malloc/vg_replace_malloc.c for details.
+ Unfortunately the "_vgi_" literal is also hardcoded in that file, so =
if
+ you change this one you must also change the other one. */
#define VG_INTERCEPT_PREFIX "_vgi_"
#define VG_INTERCEPT_PREFIX_LEN 5
=20
Copied: trunk/coregrind/m_mallocfree.c (from rev 3646, trunk/coregrind/vg=
_malloc2.c)
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/vg_malloc2.c 2005-05-09 01:23:49 UTC (rev 3646)
+++ trunk/coregrind/m_mallocfree.c 2005-05-10 02:47:21 UTC (rev 3648)
@@ -0,0 +1,1295 @@
+
+/*--------------------------------------------------------------------*/
+/*--- An implementation of malloc/free which doesn't use sbrk. ---*/
+/*--- m_mallocfree.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2000-2005 Julian Seward=20
+ js...@ac...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+
+#include "core.h"
+#include "pub_core_aspacemgr.h"
+
+//zz#include "memcheck/memcheck.h"
+
+//#define DEBUG_MALLOC // turn on heavyweight debugging machinery
+//#define VERBOSE_MALLOC // make verbose, esp. in debugging machinery
+
+/*------------------------------------------------------------*/
+/*--- Main types ---*/
+/*------------------------------------------------------------*/
+
+#define N_MALLOC_LISTS 16 // do not change this
+
+// The amount you can ask for is limited only by sizeof(SizeT)...
+#define MAX_PSZB (~((SizeT)0x0))
+
+typedef UChar UByte;
+
+/* Block layout:
+
+ this block total szB (sizeof(SizeT) bytes)
+ freelist previous ptr (sizeof(void*) bytes)
+ red zone bytes (depends on .rz_szB field of Arena)
+ (payload bytes)
+ red zone bytes (depends on .rz_szB field of Arena)
+ freelist next ptr (sizeof(void*) bytes)
+ this block total szB (sizeof(SizeT) bytes)
+
+ Total size in bytes (bszB) and payload size in bytes (pszB)
+ are related by:
+
+ bszB =3D=3D pszB + 2*sizeof(SizeT) + 2*sizeof(void*) + 2*a->rz_s=
zB
+
+ Furthermore, both size fields in the block have their least-sifnifi=
cant
+ bit set if the block is not in use, and unset if it is in use.
+ (The bottom 3 or so bits are always free for this because of alignm=
ent.)
+ A block size of zero is not possible, because a block always has at
+ least two SizeTs and two pointers of overhead. =20
+
+ Nb: All Block payloads must be VG_MIN_MALLOC_SZB-aligned. This is
+ achieved by ensuring that Superblocks are VG_MIN_MALLOC_SZB-aligned
+ (see newSuperblock() for how), and that the lengths of the followin=
g
+ things are a multiple of VG_MIN_MALLOC_SZB:
+ - Superblock admin section lengths (due to elastic padding)
+ - Block admin section (low and high) lengths (due to elastic redzon=
es)
+ - Block payload lengths (due to req_pszB rounding up)
+*/
+typedef
+ struct {
+ // No fields are actually used in this struct, because a Block has
+ // loads of variable sized fields and so can't be accessed
+ // meaningfully with normal fields. So we use access functions al=
l
+ // the time. This struct gives us a type to use, though. Also, w=
e
+ // make sizeof(Block) 1 byte so that we can do arithmetic with the
+ // Block* type in increments of 1!
+ UByte dummy;
+ }=20
+ Block;
+
+// A superblock. 'padding' is never used, it just ensures that if the
+// entire Superblock is aligned to VG_MIN_MALLOC_SZB, then payload_bytes=
[]
+// will be too. It can add small amounts of padding unnecessarily -- eg=
.
+// 8-bytes on 32-bit machines with an 8-byte VG_MIN_MALLOC_SZB -- becaus=
e
+// it's too hard to make a constant expression that works perfectly in a=
ll
+// cases.
+// payload_bytes[] is made a single big Block when the Superblock is
+// created, and then can be split and the splittings remerged, but Block=
s
+// always cover its entire length -- there's never any unused bytes at t=
he
+// end, for example.
+typedef=20
+ struct _Superblock {
+ struct _Superblock* next;
+ SizeT n_payload_bytes;
+ UByte padding[ VG_MIN_MALLOC_SZB -=20
+ ((sizeof(struct _Superblock*) + sizeof(SizeT)) %=
=20
+ VG_MIN_MALLOC_SZB) ];
+ UByte payload_bytes[0];
+ }
+ Superblock;
+
+// An arena. 'freelist' is a circular, doubly-linked list. 'rz_szB' is
+// elastic, in that it can be bigger than asked-for to ensure alignment.
+typedef=20
+ struct {
+ Char* name;
+ Bool clientmem; // Allocates in the client address s=
pace?
+ SizeT rz_szB; // Red zone size in bytes
+ SizeT min_sblock_szB; // Minimum superblock size in bytes
+ Block* freelist[N_MALLOC_LISTS];
+ Superblock* sblocks;
+ // Stats only.
+ SizeT bytes_on_loan;
+ SizeT bytes_mmaped;
+ SizeT bytes_on_loan_max;
+ }=20
+ Arena;
+
+
+/*------------------------------------------------------------*/
+/*--- Low-level functions for working with Blocks. ---*/
+/*------------------------------------------------------------*/
+
+#define SIZE_T_0x1 ((SizeT)0x1)
+
+// Mark a bszB as in-use, and not in-use.
+static __inline__
+SizeT mk_inuse_bszB ( SizeT bszB )
+{
+ vg_assert(bszB !=3D 0);
+ return bszB & (~SIZE_T_0x1);
+}
+static __inline__
+SizeT mk_free_bszB ( SizeT bszB )
+{
+ vg_assert(bszB !=3D 0);
+ return bszB | SIZE_T_0x1;
+}
+
+// Remove the in-use/not-in-use attribute from a bszB, leaving just
+// the size.
+static __inline__
+SizeT mk_plain_bszB ( SizeT bszB )
+{
+ vg_assert(bszB !=3D 0);
+ return bszB & (~SIZE_T_0x1);
+}
+
+// Does this bszB have the in-use attribute?
+static __inline__
+Bool is_inuse_bszB ( SizeT bszB )
+{
+ vg_assert(bszB !=3D 0);
+ return (0 !=3D (bszB & SIZE_T_0x1)) ? False : True;
+}
+
+
+// Set and get the lower size field of a block.
+static __inline__
+void set_bszB_lo ( Block* b, SizeT bszB )
+{=20
+ *(SizeT*)&b[0] =3D bszB;
+}
+static __inline__
+SizeT get_bszB_lo ( Block* b )
+{
+ return *(SizeT*)&b[0];
+}
+
+// Get the address of the last byte in a block
+static __inline__
+UByte* last_byte ( Block* b )
+{
+ UByte* b2 =3D (UByte*)b;
+ return &b2[mk_plain_bszB(get_bszB_lo(b)) - 1];
+}
+
+// Set and get the upper size field of a block.
+static __inline__
+void set_bszB_hi ( Block* b, SizeT bszB )
+{
+ UByte* b2 =3D (UByte*)b;
+ UByte* lb =3D last_byte(b);
+ vg_assert(lb =3D=3D &b2[mk_plain_bszB(bszB) - 1]);
+ *(SizeT*)&lb[-sizeof(SizeT) + 1] =3D bszB;
+}
+static __inline__
+SizeT get_bszB_hi ( Block* b )
+{
+ UByte* lb =3D last_byte(b);
+ return *(SizeT*)&lb[-sizeof(SizeT) + 1];
+}
+
+
+// Return the lower, upper and total overhead in bytes for a block.
+// These are determined purely by which arena the block lives in.
+static __inline__
+SizeT overhead_szB_lo ( Arena* a )
+{
+ return sizeof(SizeT) + sizeof(void*) + a->rz_szB;
+}
+static __inline__
+SizeT overhead_szB_hi ( Arena* a )
+{
+ return a->rz_szB + sizeof(void*) + sizeof(SizeT);
+}
+static __inline__
+SizeT overhead_szB ( Arena* a )
+{
+ return overhead_szB_lo(a) + overhead_szB_hi(a);
+}
+
+// Given the addr of a block, return the addr of its payload.
+static __inline__
+UByte* get_block_payload ( Arena* a, Block* b )
+{
+ UByte* b2 =3D (UByte*)b;
+ return & b2[ overhead_szB_lo(a) ];
+}
+// Given the addr of a block's payload, return the addr of the block its=
elf.
+static __inline__
+Block* get_payload_block ( Arena* a, UByte* payload )
+{
+ return (Block*)&payload[ -overhead_szB_lo(a) ];
+}
+
+
+// Set and get the next and previous link fields of a block.
+static __inline__
+void set_prev_b ( Block* b, Block* prev_p )
+{=20
+ UByte* b2 =3D (UByte*)b;
+ *(Block**)&b2[sizeof(SizeT)] =3D prev_p;
+}
+static __inline__
+void set_next_b ( Block* b, Block* next_p )
+{
+ UByte* lb =3D last_byte(b);
+ *(Block**)&lb[-sizeof(SizeT) - sizeof(void*) + 1] =3D next_p;
+}
+static __inline__
+Block* get_prev_b ( Block* b )
+{=20
+ UByte* b2 =3D (UByte*)b;
+ return *(Block**)&b2[sizeof(SizeT)];
+}
+static __inline__
+Block* get_next_b ( Block* b )
+{=20
+ UByte* lb =3D last_byte(b);
+ return *(Block**)&lb[-sizeof(SizeT) - sizeof(void*) + 1];
+}
+
+
+// Get the block immediately preceding this one in the Superblock.
+static __inline__
+Block* get_predecessor_block ( Block* b )
+{
+ UByte* b2 =3D (UByte*)b;
+ SizeT bszB =3D mk_plain_bszB( (*(SizeT*)&b2[-sizeof(SizeT)]) );
+ return (Block*)&b2[-bszB];
+}
+
+// Read and write the lower and upper red-zone bytes of a block.
+static __inline__
+void set_rz_lo_byte ( Arena* a, Block* b, UInt rz_byteno, UByte v )
+{
+ UByte* b2 =3D (UByte*)b;
+ b2[sizeof(SizeT) + sizeof(void*) + rz_byteno] =3D v;
+}
+static __inline__
+void set_rz_hi_byte ( Arena* a, Block* b, UInt rz_byteno, UByte v )
+{
+ UByte* lb =3D last_byte(b);
+ lb[-sizeof(SizeT) - sizeof(void*) - rz_byteno] =3D v;
+}
+static __inline__
+UByte get_rz_lo_byte ( Arena* a, Block* b, UInt rz_byteno )
+{
+ UByte* b2 =3D (UByte*)b;
+ return b2[sizeof(SizeT) + sizeof(void*) + rz_byteno];
+}
+static __inline__
+UByte get_rz_hi_byte ( Arena* a, Block* b, UInt rz_byteno )
+{
+ UByte* lb =3D last_byte(b);
+ return lb[-sizeof(SizeT) - sizeof(void*) - rz_byteno];
+}
+
+
+// Return the minimum bszB for a block in this arena. Can have zero-len=
gth
+// payloads, so it's the size of the admin bytes.
+static __inline__
+SizeT min_useful_bszB ( Arena* a )
+{
+ return overhead_szB(a);
+}
+
+// Convert payload size <--> block size (both in bytes).
+static __inline__
+SizeT pszB_to_bszB ( Arena* a, SizeT pszB )
+{
+ return pszB + overhead_szB(a);
+}
+static __inline__
+SizeT bszB_to_pszB ( Arena* a, SizeT bszB )
+{
+ vg_assert(bszB >=3D overhead_szB(a));
+ return bszB - overhead_szB(a);
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Arena management ---*/
+/*------------------------------------------------------------*/
+
+#define CORE_ARENA_MIN_SZB 1048576
+
+// The arena structures themselves.
+static Arena vg_arena[VG_N_ARENAS];
+
+// Functions external to this module identify arenas using ArenaIds,
+// not Arena*s. This fn converts the former to the latter.
+static Arena* arenaId_to_ArenaP ( ArenaId arena )
+{
+ vg_assert(arena >=3D 0 && arena < VG_N_ARENAS);
+ return & vg_arena[arena];
+}
+
+// Initialise an arena. rz_szB is the minimum redzone size; it might b=
e
+// made bigger to ensure that VG_MIN_MALLOC_SZB is observed.
+static
+void arena_init ( ArenaId aid, Char* name, SizeT rz_szB, SizeT min_sbloc=
k_szB )
+{
+ SizeT i;
+ Arena* a =3D arenaId_to_ArenaP(aid);
+ =20
+ vg_assert(rz_szB < 128); // ensure reasonable size
+ vg_assert((min_sblock_szB % VKI_PAGE_SIZE) =3D=3D 0);
+ a->name =3D name;
+ a->clientmem =3D ( VG_AR_CLIENT =3D=3D aid ? True : False );
+
+ // The size of the low and high admin sections in a block must be a
+ // multiple of VG_MIN_MALLOC_SZB. So we round up the asked-for
+ // redzone size if necessary to achieve this.
+ a->rz_szB =3D rz_szB;
+ while (0 !=3D overhead_szB_lo(a) % VG_MIN_MALLOC_SZB) a->rz_szB++;
+ vg_assert(overhead_szB_lo(a) =3D=3D overhead_szB_hi(a));
+
+ a->min_sblock_szB =3D min_sblock_szB;
+ for (i =3D 0; i < N_MALLOC_LISTS; i++) a->freelist[i] =3D NULL;
+ a->sblocks =3D NULL;
+ a->bytes_on_loan =3D 0;
+ a->bytes_mmaped =3D 0;
+ a->bytes_on_loan_max =3D 0;
+}
+
+/* Print vital stats for an arena. */
+void VG_(print_all_arena_stats) ( void )
+{
+ UInt i;
+ for (i =3D 0; i < VG_N_ARENAS; i++) {
+ Arena* a =3D arenaId_to_ArenaP(i);
+ VG_(message)(Vg_DebugMsg,
+ "%8s: %8d mmap'd, %8d/%8d max/curr",
+ a->name, a->bytes_mmaped, a->bytes_on_loan_max, a->bytes_on_loa=
n=20
+ );
+ }
+}
+
+static Bool init_done =3D False;
+static SizeT client_malloc_redzone_szB =3D 8; // default: be paranoid
+
+// Nb: this must be called before the client arena is initialised, ie.
+// before any memory is allocated.
+void VG_(set_client_malloc_redzone_szB)(SizeT rz_szB)
+{
+ if (init_done) {
+ VG_(printf)(
+ "\nTool error:\n"
+ "%s cannot be called after the first allocation.\n",
+ __PRETTY_FUNCTION__);
+ VG_(exit)(1);
+ }
+ // This limit is no special figure, just something not too big
+ if (rz_szB > 128) {
+ VG_(printf)(
+ "\nTool error:\n"
+ " %s passed a too-big value (%llu)",=20
+ __PRETTY_FUNCTION__, (ULong)rz_szB);
+ VG_(exit)(1);
+ }
+ client_malloc_redzone_szB =3D rz_szB;
+}
+
+/* This library is self-initialising, as it makes this more self-contain=
ed,
+ less coupled with the outside world. Hence VG_(arena_malloc)() and
+ VG_(arena_free)() below always call ensure_mm_init() to ensure things=
are
+ correctly initialised. */
+static
+void ensure_mm_init ( void )
+{
+ if (init_done) {
+ return;
+ }
+
+ /* Use checked red zones (of various sizes) for our internal stuff,
+ and an unchecked zone of arbitrary size for the client. Of
+ course the client's red zone can be checked by the tool, eg.=20
+ by using addressibility maps, but not by the mechanism implemented
+ here, which merely checks at the time of freeing that the red=20
+ zone bytes are unchanged.
+
+ Nb: redzone sizes are *minimums*; they could be made bigger to en=
sure
+ alignment. Eg. on 32-bit machines, 4 becomes 8, and 12 becomes 16=
;
+ but on 64-bit machines 4 stays as 4, and 12 stays as 12 --- the ex=
tra
+ 4 bytes in both are accounted for by the larger prev/next ptr.
+ */
+ arena_init ( VG_AR_CORE, "core", 4, CORE_ARENA_MIN_SZB );
+ arena_init ( VG_AR_TOOL, "tool", 4, 1048576 );
+ arena_init ( VG_AR_SYMTAB, "symtab", 4, 1048576 );
+ arena_init ( VG_AR_CLIENT, "client", client_malloc_redzone_szB, 10=
48576 );
+ arena_init ( VG_AR_DEMANGLE, "demangle", 12/*paranoid*/, 65536 );
+ arena_init ( VG_AR_EXECTXT, "exectxt", 4, 65536 );
+ arena_init ( VG_AR_ERRORS, "errors", 4, 65536 );
+
+ init_done =3D True;
+# ifdef DEBUG_MALLOC
+ VG_(sanity_check_malloc_all)();
+# endif
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Superblock management ---*/
+/*------------------------------------------------------------*/
+
+// Align ptr p upwards to an align-sized boundary.
+static
+void* align_upwards ( void* p, SizeT align )
+{
+ Addr a =3D (Addr)p;
+ if ((a % align) =3D=3D 0) return (void*)a;
+ return (void*)(a - (a % align) + align);
+}
+
+// If not enough memory available, either aborts (for non-client memory)
+// or returns 0 (for client memory).
+static
+Superblock* newSuperblock ( Arena* a, SizeT cszB )
+{
+ // The extra VG_MIN_MALLOC_SZB bytes are for possible alignment up.
+ static UByte bootstrap_superblock[CORE_ARENA_MIN_SZB+VG_MIN_MALLOC_SZ=
B];
+ static Bool called_before =3D True; //False;
+ Superblock* sb;
+
+ // Take into account admin bytes in the Superblock.
+ cszB +=3D sizeof(Superblock);
+
+ if (cszB < a->min_sblock_szB) cszB =3D a->min_sblock_szB;
+ while ((cszB % VKI_PAGE_SIZE) > 0) cszB++;
+
+ if (!called_before) {
+ // First time we're called -- use the special static bootstrap
+ // superblock (see comment at top of main() for details).
+ called_before =3D True;
+ vg_assert(a =3D=3D arenaId_to_ArenaP(VG_AR_CORE));
+ vg_assert(CORE_ARENA_MIN_SZB >=3D cszB);
+ // Ensure sb is suitably aligned.
+ sb =3D (Superblock*)align_upwards( bootstrap_superblock,=20
+ VG_MIN_MALLOC_SZB );
+ } else if (a->clientmem) {
+ // client allocation -- return 0 to client if it fails
+ sb =3D (Superblock *)
+ VG_(get_memory_from_mmap_for_client)
+ (0, cszB, VKI_PROT_READ|VKI_PROT_WRITE|VKI_PROT_EXEC, 0);
+ if (NULL =3D=3D sb)
+ return 0;
+ } else {
+ // non-client allocation -- aborts if it fails
+ sb =3D VG_(get_memory_from_mmap) ( cszB, "newSuperblock" );
+ }
+ vg_assert(NULL !=3D sb);
+ //zzVALGRIND_MAKE_WRITABLE(sb, cszB);
+ vg_assert(0 =3D=3D (Addr)sb % VG_MIN_MALLOC_SZB);
+ sb->n_payload_bytes =3D cszB - sizeof(Superblock);
+ a->bytes_mmaped +=3D cszB;
+ if (0)
+ VG_(message)(Vg_DebugMsg, "newSuperblock, %d payload bytes",=20
+ sb->n_payload_bytes);
+ return sb;
+}
+
+// Find the superblock containing the given chunk.
+static
+Superblock* findSb ( Arena* a, Block* b )
+{
+ Superblock* sb;
+ for (sb =3D a->sblocks; sb; sb =3D sb->next)
+ if ((Block*)&sb->payload_bytes[0] <=3D b
+ && b < (Block*)&sb->payload_bytes[sb->n_payload_bytes])
+ return sb;
+ VG_(printf)("findSb: can't find pointer %p in arena `%s'\n", b, a->na=
me );
+ VG_(core_panic)("findSb: VG_(arena_free)() in wrong arena?");
+ return NULL; /*NOTREACHED*/
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Functions for working with freelists. ---*/
+/*------------------------------------------------------------*/
+
+// Nb: Determination of which freelist a block lives on is based on the
+// payload size, not block size.
+
+// Convert a payload size in bytes to a freelist number.
+static
+UInt pszB_to_listNo ( SizeT pszB )
+{
+ vg_assert(0 =3D=3D pszB % VG_MIN_MALLOC_SZB);
+ pszB /=3D VG_MIN_MALLOC_SZB;
+ if (pszB <=3D 2) return 0;
+ if (pszB <=3D 3) return 1;
+ if (pszB <=3D 4) return 2;
+ if (pszB <=3D 5) return 3;
+ if (pszB <=3D 6) return 4;
+ if (pszB <=3D 7) return 5;
+ if (pszB <=3D 8) return 6;
+ if (pszB <=3D 9) return 7;
+ if (pszB <=3D 10) return 8;
+ if (pszB <=3D 11) return 9;
+ if (pszB <=3D 12) return 10;
+ if (pszB <=3D 16) return 11;
+ if (pszB <=3D 32) return 12;
+ if (pszB <=3D 64) return 13;
+ if (pszB <=3D 128) return 14;
+ return 15;
+}
+
+// What is the minimum payload size for a given list?
+static
+SizeT listNo_to_pszB_min ( UInt listNo )
+{
+ SizeT pszB =3D 0;
+ vg_assert(listNo <=3D N_MALLOC_LISTS);
+ while (pszB_to_listNo(pszB) < listNo) pszB +=3D VG_MIN_MALLOC_SZB;
+ return pszB;
+}
+
+// What is the maximum payload size for a given list?
+static
+SizeT listNo_to_pszB_max ( UInt listNo )
+{
+ vg_assert(listNo <=3D N_MALLOC_LISTS);
+ if (listNo =3D=3D N_MALLOC_LISTS-1) {
+ return MAX_PSZB;
+ } else {
+ return listNo_to_pszB_min(listNo+1) - 1;
+ }
+}
+
+
+/* A nasty hack to try and reduce fragmentation. Try and replace
+ a->freelist[lno] with another block on the same list but with a
+ lower address, with the idea of attempting to recycle the same
+ blocks rather than cruise through the address space. */
+static=20
+void swizzle ( Arena* a, UInt lno )
+{
+ Block* p_best;
+ Block* pp;
+ Block* pn;
+ UInt i;
+
+ p_best =3D a->freelist[lno];
+ if (p_best =3D=3D NULL) return;
+
+ pn =3D pp =3D p_best;
+ for (i =3D 0; i < 20; i++) {
+ pn =3D get_next_b(pn);
+ pp =3D get_prev_b(pp);
+ if (pn < p_best) p_best =3D pn;
+ if (pp < p_best) p_best =3D pp;
+ }
+ if (p_best < a->freelist[lno]) {
+# ifdef VERBOSE_MALLOC
+ VG_(printf)("retreat by %d\n", a->freelist[lno] - p_best);
+# endif
+ a->freelist[lno] =3D p_best;
+ }
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Sanity-check/debugging machinery. ---*/
+/*------------------------------------------------------------*/
+
+#define REDZONE_LO_MASK 0x31
+#define REDZONE_HI_MASK 0x7c
+
+// Do some crude sanity checks on a Block.
+static=20
+Bool blockSane ( Arena* a, Block* b )
+{
+# define BLEAT(str) VG_(printf)("blockSane: fail -- %s\n",str)
+ UInt i;
+ if (get_bszB_lo(b) !=3D get_bszB_hi(b))
+ {BLEAT("sizes");return False;}
+ if (!a->clientmem && is_inuse_bszB(get_bszB_lo(b))) {
+ for (i =3D 0; i < a->rz_szB; i++) {
+ if (get_rz_lo_byte(a, b, i) !=3D=20
+ (UByte)(((Addr)b&0xff) ^ REDZONE_LO_MASK))
+ {BLEAT("redzone-lo");return False;}
+ if (get_rz_hi_byte(a, b, i) !=3D=20
+ (UByte)(((Addr)b&0xff) ^ REDZONE_HI_MASK))
+ {BLEAT("redzone-hi");return False;}
+ } =20
+ }
+ return True;
+# undef BLEAT
+}
+
+// Print superblocks (only for debugging).
+static=20
+void ppSuperblocks ( Arena* a )
+{
+ UInt i, blockno;
+ SizeT b_bszB;
+ Block* b;
+ Superblock* sb =3D a->sblocks;
+ blockno =3D 1;
+
+ while (sb) {
+ VG_(printf)( "\n" );
+ VG_(printf)( "superblock %d at %p, sb->n_pl_bs =3D %d, next =3D %p=
\n",=20
+ blockno++, sb, sb->n_payload_bytes, sb->next );
+ for (i =3D 0; i < sb->n_payload_bytes; i +=3D mk_plain_bszB(b_bszB=
)) {
+ b =3D (Block*)&sb->payload_bytes[i];
+ b_bszB =3D get_bszB_lo(b);
+ VG_(printf)( " block at %d, bszB %d: ", i, mk_plain_bszB(b_bs=
zB) );
+ VG_(printf)( "%s, ", is_inuse_bszB(b_bszB) ? "inuse" : "free");
+ VG_(printf)( "%s\n", blockSane(a, b) ? "ok" : "BAD" );
+ }
+ vg_assert(i =3D=3D sb->n_payload_bytes); // no overshoot at end =
of Sb
+ sb =3D sb->next;
+ }
+ VG_(printf)( "end of superblocks\n\n" );
+}
+
+// Sanity check both the superblocks and the chains.
+static void sanity_check_malloc_arena ( ArenaId aid )
+{
+ UInt i, superblockctr, blockctr_sb, blockctr_li;
+ UInt blockctr_sb_free, listno;
+ SizeT b_bszB, b_pszB, list_min_pszB, list_max_pszB;
+ Superblock* sb;
+ Bool thisFree, lastWasFree;
+ Block* b;
+ Block* b_prev;
+ SizeT arena_bytes_on_loan;
+ Arena* a;
+
+# define BOMB VG_(core_panic)("sanity_check_malloc_arena")
+
+ a =3D arenaId_to_ArenaP(aid);
+ =20
+ // First, traverse all the superblocks, inspecting the Blocks in each=
.
+ superblockctr =3D blockctr_sb =3D blockctr_sb_free =3D 0;
+ arena_bytes_on_loan =3D 0;
+ sb =3D a->sblocks;
+ while (sb) {
+ lastWasFree =3D False;
+ superblockctr++;
+ for (i =3D 0; i < sb->n_payload_bytes; i +=3D mk_plain_bszB(b_bszB=
)) {
+ blockctr_sb++;
+ b =3D (Block*)&sb->payload_bytes[i];
+ b_bszB =3D get_bszB_lo(b);
+ if (!blockSane(a, b)) {
+ VG_(printf)("sanity_check_malloc_arena: sb %p, block %d (bsz=
B %d): "
+ " BAD\n", sb, i, b_bszB );
+ BOMB;
+ }
+ thisFree =3D !is_inuse_bszB(b_bszB);
+ if (thisFree && lastWasFree) {
+ VG_(printf)("sanity_check_malloc_arena: sb %p, block %d (bsz=
B %d): "
+ "UNMERGED FREES\n",
+ sb, i, b_bszB );
+ BOMB;
+ }
+ if (thisFree) blockctr_sb_free++;
+ if (!thisFree)=20
+ arena_bytes_on_loan +=3D bszB_to_pszB(a, b_bszB);
+ lastWasFree =3D thisFree;
+ }
+ if (i > sb->n_payload_bytes) {
+ VG_(printf)( "sanity_check_malloc_arena: sb %p: last block "
+ "overshoots end\n", sb);
+ BOMB;
+ }
+ sb =3D sb->next;
+ }
+
+ if (arena_bytes_on_loan !=3D a->bytes_on_loan) {
+# ifdef VERBOSE_MALLOC
+ VG_(printf)( "sanity_check_malloc_arena: a->bytes_on_loan %d, "
+ "arena_bytes_on_loan %d: "
+ "MISMATCH\n", a->bytes_on_loan, arena_bytes_on_loan);
+# endif
+ ppSuperblocks(a);
+ BOMB;
+ }
+
+ /* Second, traverse each list, checking that the back pointers make
+ sense, counting blocks encountered, and checking that each block
+ is an appropriate size for this list. */
+ blockctr_li =3D 0;
+ for (listno =3D 0; listno < N_MALLOC_LISTS; listno++) {
+ list_min_pszB =3D listNo_to_pszB_min(listno);
+ list_max_pszB =3D listNo_to_pszB_max(listno);
+ b =3D a->freelist[listno];
+ if (b =3D=3D NULL) continue;
+ while (True) {
+ b_prev =3D b;
+ b =3D get_next_b(b);
+ if (get_prev_b(b) !=3D b_prev) {
+ VG_(printf)( "sanity_check_malloc_arena: list %d at %p: "
+ "BAD LINKAGE\n",=20
+ listno, b );
+ BOMB;
+ }
+ b_pszB =3D bszB_to_pszB(a, mk_plain_bszB(get_bszB_lo(b)));
+ if (b_pszB < list_min_pszB || b_pszB > list_max_pszB) {
+ VG_(printf)(=20
+ "sanity_check_malloc_arena: list %d at %p: "
+ "WRONG CHAIN SIZE %dB (%dB, %dB)\n",=20
+ listno, b, b_pszB, list_min_pszB, list_max_pszB );
+ BOMB;
+ }
+ blockctr_li++;
+ if (b =3D=3D a->freelist[listno]) break;
+ }
+ }
+
+ if (blockctr_sb_free !=3D blockctr_li) {
+# ifdef VERBOSE_MALLOC
+ VG_(printf)( "sanity_check_malloc_arena: BLOCK COUNT MISMATCH "
+ "(via sbs %d, via lists %d)\n",
+ blockctr_sb_free, blockctr_li );
+# endif
+ ppSuperblocks(a);
+ BOMB;
+ }
+
+ if (VG_(clo_verbosity) > 2)=20
+ VG_(message)(Vg_DebugMsg,
+ "%8s: %2d sbs, %5d bs, %2d/%-2d free bs, "
+ "%7d mmap, %7d loan",=20
+ a->name,
+ superblockctr,
+ blockctr_sb, blockctr_sb_free, blockctr_li,=20
+ a->bytes_mmaped, a->bytes_on_loan); =20
+# undef BOMB
+}
+
+
+void VG_(sanity_check_malloc_all) ( void )
+{
+ UInt i;
+ for (i =3D 0; i < VG_N_ARENAS; i++)
+ sanity_check_malloc_arena ( i );
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Creating and deleting blocks. ---*/
+/*------------------------------------------------------------*/
+
+// Mark the bytes at b .. b+bszB-1 as not in use, and add them to the
+// relevant free list.
+
+static
+void mkFreeBlock ( Arena* a, Block* b, SizeT bszB, UInt b_lno )
+{
+ SizeT pszB =3D bszB_to_pszB(a, bszB);
+ vg_assert(b_lno =3D=3D pszB_to_listNo(pszB));
+ //zzVALGRIND_MAKE_WRITABLE(b, bszB);
+ // Set the size fields and indicate not-in-use.
+ set_bszB_lo(b, mk_free_bszB(bszB));
+ set_bszB_hi(b, mk_free_bszB(bszB));
+
+ // Add to the relevant list.
+ if (a->freelist[b_lno] =3D=3D NULL) {
+ set_prev_b(b, b);
+ set_next_b(b, b);
+ a->freelist[b_lno] =3D b;
+ } else {
+ Block* b_prev =3D get_prev_b(a->freelist[b_lno]);
+ Block* b_next =3D a->freelist[b_lno];
+ set_next_b(b_prev, b);
+ set_prev_b(b_next, b);
+ set_next_b(b, b_next);
+ set_prev_b(b, b_prev);
+ }
+# ifdef DEBUG_MALLOC
+ (void)blockSane(a,b);
+# endif
+}
+
+// Mark the bytes at b .. b+bszB-1 as in use, and set up the block
+// appropriately.
+static
+void mkInuseBlock ( Arena* a, Block* b, SizeT bszB )
+{
+ UInt i;
+ vg_assert(bszB >=3D min_useful_bszB(a));
+ //zzVALGRIND_MAKE_WRITABLE(b, bszB);
+ set_bszB_lo(b, mk_inuse_bszB(bszB));
+ set_bszB_hi(b, mk_inuse_bszB(bszB));
+ set_prev_b(b, NULL); // Take off freelist
+ set_next_b(b, NULL); // ditto
+ if (!a->clientmem) {
+ for (i =3D 0; i < a->rz_szB; i++) {
+ set_rz_lo_byte(a, b, i, (UByte)(((Addr)b&0xff) ^ REDZONE_LO_MAS=
K));
+ set_rz_hi_byte(a, b, i, (UByte)(((Addr)b&0xff) ^ REDZONE_HI_MAS=
K));
+ }
+ }
+# ifdef DEBUG_MALLOC
+ (void)blockSane(a,b);
+# endif
+}
+
+// Remove a block from a given list. Does no sanity checking.
+static
+void unlinkBlock ( Arena* a, Block* b, UInt listno )
+{
+ vg_assert(listno < N_MALLOC_LISTS);
+ if (get_prev_b(b) =3D=3D b) {
+ // Only one element in the list; treat it specially.
+ vg_assert(get_next_b(b) =3D=3D b);
+ a->freelist[listno] =3D NULL;
+ } else {
+ Block* b_prev =3D get_prev_b(b);
+ Block* b_next =3D get_next_b(b);
+ a->freelist[listno] =3D b_prev;
+ set_next_b(b_prev, b_next);
+ set_prev_b(b_next, b_prev);
+ swizzle ( a, listno );
+ }
+ set_prev_b(b, NULL);
+ set_next_b(b, NULL);
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Core-visible functions. ---*/
+/*------------------------------------------------------------*/
+
+// Align the request size.
+static __inline__
+SizeT align_req_pszB ( SizeT req_pszB )
+{
+ SizeT n =3D VG_MIN_MALLOC_SZB-1;
+ return ((req_pszB + n) & (~n));
+}
+
+void* VG_(arena_malloc) ( ArenaId aid, SizeT req_pszB )
+{
+ SizeT req_bszB, frag_bszB, b_bszB;
+ UInt lno;
+ Superblock* new_sb;
+ Block* b =3D NULL;
+ Arena* a;
+ void* v;
+
+ VGP_PUSHCC(VgpMalloc);
+
+ ensure_mm_init();
+ a =3D arenaId_to_ArenaP(aid);
+
+ vg_assert(req_pszB < MAX_PSZB);
+ req_pszB =3D align_req_pszB(req_pszB);
+ req_bszB =3D pszB_to_bszB(a, req_pszB);
+
+ // Scan through all the big-enough freelists for a block.
+ for (lno =3D pszB_to_listNo(req_pszB); lno < N_MALLOC_LISTS; lno++) {
+ b =3D a->freelist[lno];
+ if (NULL =3D=3D b) continue; // If this list is empty, try the n=
ext one.
+ while (True) {
+ b_bszB =3D mk_plain_bszB(get_bszB_lo(b));
+ if (b_bszB >=3D req_bszB) goto obtained_block; // success!
+ b =3D get_next_b(b);
+ if (b =3D=3D a->freelist[lno]) break; // traversed entire fre=
elist
+ }
+ }
+
+ // If we reach here, no suitable block found, allocate a new superblo=
ck
+ vg_assert(lno =3D=3D N_MALLOC_LISTS);
+ new_sb =3D newSuperblock(a, req_bszB);
+ if (NULL =3D=3D new_sb) {
+ // Should only fail if for client, otherwise, should have aborted
+ // already.
+ vg_assert(VG_AR_CLIENT =3D=3D aid);
+ return NULL;
+ }
+ new_sb->next =3D a->sblocks;
+ a->sblocks =3D new_sb;
+ b =3D (Block*)&new_sb->payload_bytes[0];
+ lno =3D pszB_to_listNo(bszB_to_pszB(a, new_sb->n_payload_bytes));
+ mkFreeBlock ( a, b, new_sb->n_payload_bytes, lno);
+ // fall through
+
+ obtained_block:
+ // Ok, we can allocate from b, which lives in list lno.
+ vg_assert(b !=3D NULL);
+ vg_assert(lno < N_MALLOC_LISTS);
+ vg_assert(a->freelist[lno] !=3D NULL);
+ b_bszB =3D mk_plain_bszB(get_bszB_lo(b));
+ // req_bszB is the size of the block we are after. b_bszB is the
+ // size of what we've actually got. */
+ vg_assert(b_bszB >=3D req_bszB);
+
+ // Could we split this block and still get a useful fragment?
+ frag_bszB =3D b_bszB - req_bszB;
+ if (frag_bszB >=3D min_useful_bszB(a)) {
+ // Yes, split block in two, put the fragment on the appropriate fr=
ee
+ // list, and update b_bszB accordingly.
+ // printf( "split %dB into %dB and %dB\n", b_bszB, req_bszB, frag_=
bszB );
+ unlinkBlock(a, b, lno);
+ mkInuseBlock(a, b, req_bszB);
+ mkFreeBlock(a, &b[req_bszB], frag_bszB,=20
+ pszB_to_listNo(bszB_to_pszB(a, frag_bszB)));
+ b_bszB =3D mk_plain_bszB(get_bszB_lo(b));
+ } else {
+ // No, mark as in use and use as-is.
+ unlinkBlock(a, b, lno);
+ mkInuseBlock(a, b, b_bszB);
+ }
+
+ // Update stats
+ a->bytes_on_loan +=3D bszB_to_pszB(a, b_bszB);
+ if (a->bytes_on_loan > a->bytes_on_loan_max)
+ a->bytes_on_loan_max =3D a->bytes_on_loan;
+
+# ifdef DEBUG_MALLOC
+ sanity_check_malloc_arena(aid);
+# endif
+
+ VGP_POPCC(VgpMalloc);
+ v =3D get_block_payload(a, b);
+ vg_assert( (((Addr)v) & (VG_MIN_MALLOC_SZB-1)) =3D=3D 0 );
+
+ VALGRIND_MALLOCLIKE_BLOCK(v, req_pszB, 0, False);
+ return v;
+}
+
+=20
+void VG_(arena_free) ( ArenaId aid, void* ptr )
+{
+ Superblock* sb;
+ UByte* sb_start;
+ UByte* sb_end;
+ Block* other;
+ Block* b;
+ SizeT b_bszB, b_pszB, other_bszB;
+ UInt b_listno;
+ Arena* a;
+
+ VGP_PUSHCC(VgpMalloc);
+
+ ensure_mm_init();
+ a =3D arenaId_to_ArenaP(aid);
+
+ if (ptr =3D=3D NULL) {
+ VGP_POPCC(VgpMalloc);
+ return;
+ }
+ =20
+ b =3D get_payload_block(a, ptr);
+
+# ifdef DEBUG_MALLOC
+ vg_assert(blockSane(a, b));
+# endif
+
+ a->bytes_on_loan -=3D bszB_to_pszB(a, mk_plain_bszB(get_bszB_lo(b)));
+
+ sb =3D findSb( a, b );
+ sb_start =3D &sb->payload_bytes[0];
+ sb_end =3D &sb->payload_bytes[sb->n_payload_bytes - 1];
+
+ // Put this chunk back on a list somewhere.
+ b_bszB =3D get_bszB_lo(b);
+ b_pszB =3D bszB_to_pszB(a, b_bszB);
+ b_listno =3D pszB_to_listNo(b_pszB);
+ mkFreeBlock( a, b, b_bszB, b_listno );
+
+ // See if this block can be merged with its successor.
+ // First test if we're far enough before the superblock's end to poss=
ibly
+ // have a successor.
+ other =3D b + b_bszB;
+ if (other+min_useful_bszB(a)-1 <=3D (Block*)sb_end) {
+ // Ok, we have a successor, merge if it's not in use.
+ other_bszB =3D get_bszB_lo(other);
+ if (!is_inuse_bszB(other_bszB)) {
+ // VG_(printf)( "merge-successor\n");
+ other_bszB =3D mk_plain_bszB(other_bszB);
+# ifdef DEBUG_MALLOC
+ vg_assert(blockSane(a, other));
+# endif
+ unlinkBlock( a, b, b_listno );
+ unlinkBlock( a, other, pszB_to_listNo(bszB_to_pszB(a,other_bszB=
)) );
+ b_bszB +=3D other_bszB;
+ b_listno =3D pszB_to_listNo(bszB_to_pszB(a, b_bszB));
+ mkFreeBlock( a, b, b_bszB, b_listno );
+ }
+ } else {
+ // Not enough space for successor: check that b is the last block
+ // ie. there are no unused bytes at the end of the Superblock.
+ vg_assert(other-1 =3D=3D (Block*)sb_end);
+ }
+
+ // Then see if this block can be merged with its predecessor.
+ // First test if we're far enough after the superblock's start to pos=
sibly
+ // have a predecessor.
+ if (b >=3D (Block*)sb_start + min_useful_bszB(a)) {
+ // Ok, we have a predecessor, merge if it's not in use.
+ other =3D get_predecessor_block( b );
+ other_bszB =3D get_bszB_lo(other);
+ if (!is_inuse_bszB(other_bszB)) {
+ // VG_(printf)( "merge-predecessor\n");
+ other_bszB =3D mk_plain_bszB(other_bszB);
+ unlinkBlock( a, b, b_listno );
+ unlinkBlock( a, other, pszB_to_listNo(bszB_to_pszB(a, other_bsz=
B)) );
+ b =3D other;
+ b_bszB +=3D other_bszB;
+ b_listno =3D pszB_to_listNo(bszB_to_pszB(a, b_bszB));
+ mkFreeBlock( a, b, b_bszB, b_listno );
+ }
+ } else {
+ // Not enough space for predecessor: check that b is the first blo=
ck,
+ // ie. there are no unused bytes at the start of the Superblock.
+ vg_assert((Block*)sb_start =3D=3D b);
+ }
+
+# ifdef DEBUG_MALLOC
+ sanity_check_malloc_arena(aid);
+# endif
+
+ VALGRIND_FREELIKE_BLOCK(ptr, 0);
+
+ VGP_POPCC(VgpMalloc);
+}
+
+
+/*
+ The idea for malloc_aligned() is to allocate a big block, base, and
+ then split it into two parts: frag, which is returned to the the
+ free pool, and align, which is the bit we're really after. Here's
+ a picture. L and H denote the block lower and upper overheads, in
+ bytes. The details are gruesome. Note it is slightly complicated
+ because the initial request to generate base may return a bigger
+ block than we asked for, so it is important to distinguish the base
+ request size and the base actual size.
+
+ frag_b align_b
+ | |
+ | frag_p | align_p
+ | | | |
+ v v v v
+
+ +---+ +---+---+ +---+
+ | L |----------------| H | L |---------------| H |
+ +---+ +---+---+ +---+
+
+ ^ ^ ^
+ | | :
+ | base_p this addr must be aligned
+ |
+ base_b
+
+ . . . . . . .
+ <------ frag_bszB -------> . . .
+ . <------------- base_pszB_act -----------> .
+ . . . . . . .
+
+*/
+void* VG_(arena_memalign) ( ArenaId aid, SizeT req_alignB, SizeT req_psz=
B )
+{
+ SizeT base_pszB_req, base_pszB_act, frag_bszB;
+ Block *base_b, *align_b;
+ UByte *base_p, *align_p;
+ SizeT saved_bytes_on_loan;
+ Arena* a;
+
+ VGP_PUSHCC(VgpMalloc);
+
+ ensure_mm_init();
+ a =3D arenaId_to_ArenaP(aid);
+
+ vg_assert(req_pszB < MAX_PSZB);
+
+ // Check that the requested alignment seems reasonable; that is, is
+ // a power of 2.
+ if (req_alignB < VG_MIN_MALLOC_SZB
+ || req_alignB > 1048576
+ || VG_(log2)( req_alignB ) =3D=3D -1 /* not a power of 2 */) {
+ VG_(printf)("VG_(arena_memalign)(%p, %d, %d)\nbad alignment",=20
+ a, req_alignB, req_pszB );
+ VG_(core_panic)("VG_(arena_memalign)");
+ /*NOTREACHED*/
+ }
+ // Paranoid
+ vg_assert(req_alignB % VG_MIN_MALLOC_SZB =3D=3D 0);
+
+ /* Required payload size for the aligned chunk. */
+ req_pszB =3D align_req_pszB(req_pszB);
+ =20
+ /* Payload size to request for the big block that we will split up. *=
/
+ base_pszB_req =3D req_pszB + min_useful_bszB(a) + req_alignB;
+
+ /* Payload ptr for the block we are going to split. Note this
+ changes a->bytes_on_loan; we save and restore it ourselves. */
+ saved_bytes_on_loan =3D a->bytes_on_loan;
+ base_p =3D VG_(arena_malloc) ( aid, base_pszB_req );
+ a->bytes_on_loan =3D saved_bytes_on_loan;
+
+ /* Block ptr for the block we are going to split. */
+ base_b =3D get_payload_block ( a, base_p );
+
+ /* Pointer to the payload of the aligned block we are going to
+ return. This has to be suitably aligned. */
+ align_p =3D align_upwards ( base_b + 2 * overhead_szB_lo(a)
+ + overhead_szB_hi(a),
+ req_alignB );
+ align_b =3D get_payload_block(a, align_p);
+
+ /* The block size of the fragment we will create. This must be big
+ enough to actually create a fragment. */
+ frag_bszB =3D align_b - base_b;
+
+ vg_assert(frag_bszB >=3D min_useful_bszB(a));
+
+ /* The actual payload size of the block we are going to split. */
+ base_pszB_act =3D bszB_to_pszB(a, mk_plain_bszB(get_bszB_lo(base_b)))=
;
+
+ /* Create the fragment block, and put it back on the relevant free li=
st. */
+ mkFreeBlock ( a, base_b, frag_bszB,
+ pszB_to_listNo(bszB_to_pszB(a, frag_bszB)) );
+
+ /* Create the aligned block. */
+ mkInuseBlock ( a, align_b,
+ base_p + base_pszB_act=20
+ + overhead_szB_hi(a) - (UByte*)align_b );
+
+ /* Final sanity checks. */
+ vg_assert( is_inuse_bszB(get_bszB_lo(get_payload_block(a, align_p))) =
);
+
+ vg_assert(req_pszB
+ <=3D=20
+ bszB_to_pszB(a, mk_plain_bszB(get_bszB_lo(
+ get_payload_block(a, align_=
p))))
+ );
+
+ a->bytes_on_loan=20
+ +=3D bszB_to_pszB(a, mk_plain_bszB(get_bszB_lo(
+ get_payload_block(a, align_p))=
));
+ if (a->bytes_on_loan > a->bytes_on_loan_max)
+ a->bytes_on_loan_max =3D a->bytes_on_loan;
+
+# ifdef DEBUG_MALLOC
+ sanity_check_malloc_arena(aid);
+# endif
+
+ VGP_POPCC(VgpMalloc);
+
+ vg_assert( (((Addr)align_p) % req_alignB) =3D=3D 0 );
+
+ VALGRIND_MALLOCLIKE_BLOCK(align_p, req_pszB, 0, False);
+
+ return align_p;
+}
+
+
+SizeT VG_(arena_payload_szB) ( ArenaId aid, void* ptr )
+{
+ Arena* a =3D arenaId_to_ArenaP(aid);
+ Block* b =3D get_payload_block(a, ptr);
+ return bszB_to_pszB(a, get_bszB_lo(b));
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Services layered on top of malloc/free. ---*/
+/*------------------------------------------------------------*/
+
+void* VG_(arena_calloc) ( ArenaId aid, SizeT nmemb, SizeT bytes_per_memb=
)
+{
+ SizeT size;
+ UChar* p;
+
+ VGP_PUSHCC(VgpMalloc);
+
+ size =3D nmemb * bytes_per_memb;
+ vg_assert(size >=3D nmemb && size >=3D bytes_per_memb);// check again=
st overflow
+
+ p =3D VG_(arena_malloc) ( aid, size );
+
+ VG_(memset)(p, 0, size);
+
+ VALGRIND_MALLOCLIKE_BLOCK(p, size, 0, True);
+
+ VGP_POPCC(VgpMalloc);
+ =20
+ return p;
+}
+
+
+void* VG_(arena_realloc) ( ArenaId aid, void* ptr, SizeT req_pszB )
+{
+ Arena* a;
+ SizeT old_bszB, old_pszB;
+ UChar *p_new;
+ Block* b;
+
+ VGP_PUSHCC(VgpMalloc);
+
+ ensure_mm_init();
+ a =3D arenaId_to_ArenaP(aid);
+
+ vg_assert(req_pszB < MAX_PSZB);
+
+ b =3D get_payload_block(a, ptr);
+ vg_assert(blockSane(a, b));
+
+ old_bszB =3D get_bszB_lo(b);
+ vg_assert(is_inuse_bszB(old_bszB));
+ old_bszB =3D mk_plain_bszB(old_bszB);
+ old_pszB =3D bszB_to_pszB(a, old_bszB);
+
+ if (req_pszB <=3D old_pszB) {
+ VGP_POPCC(VgpMalloc);
+ return ptr;
+ }
+
+ p_new =3D VG_(arena_malloc) ( aid, req_pszB );
+ =20
+ VG_(memcpy)(p_new, ptr, old_pszB);
+
+ VG_(arena_free)(aid, ptr);
+
+ VGP_POPCC(VgpMalloc);
+ return p_new;
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Tool-visible functions. ---*/
+/*------------------------------------------------------------*/
+
+// All just wrappers to avoid exposing arenas to tools.
+
+void* VG_(malloc) ( SizeT nbytes )
+{
+ return VG_(arena_malloc) ( VG_AR_TOOL, nbytes );
+}
+
+void VG_(free) ( void* ptr )
+{
+ VG_(arena_free) ( VG_AR_TOOL, ptr );
+}
+
+void* VG_(calloc) ( SizeT nmemb, SizeT bytes_per_memb )
+{
+ return VG_(arena_calloc) ( VG_AR_TOOL, nmemb, bytes_per_memb );
+}
+
+void* VG_(realloc) ( void* ptr, SizeT size )
+{
+ return VG_(arena_realloc) ( VG_AR_TOOL, ptr, size );
+}
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
Added: trunk/coregrind/m_replacemalloc/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_replacemalloc/Makefile.am 2005-05-09 22:01:37 UTC (=
rev 3647)
+++ trunk/coregrind/m_replacemalloc/Makefile.am 2005-05-10 02:47:21 UTC (=
rev 3648)
@@ -0,0 +1,27 @@
+include $(top_srcdir)/Makefile.all.am
+include $(top_srcdir)/Makefile.core-AM_CPPFLAGS.am
+
+AM_CFLAGS =3D $(WERROR) -Wmissing-prototypes -Winline -Wall -Wshadow -O =
-g
+
+EXTRA_DIST =3D \
+ README_REPLACEMALLOC.txt
+
+noinst_LIBRARIES =3D \
+ libreplacemalloc_core.a \
+ libreplacemalloc_toolpreload.a
+
+libreplacemalloc_core_a_SOURCES =3D \
+ replacemalloc_core.c
+
+if USE_PIE
+libreplacemalloc_core_a_CFLAGS =3D $(AM_CFLAGS) -fpie
+else
+libreplacemalloc_core_a_CFLAGS =3D $(AM_CFLAGS)
+endif
+
+libreplacemalloc_toolpreload_a_SOURCES =3D \
+ vg_replace_malloc.c
+libreplacemalloc_toolpreload_a_CFLAGS =3D \
+ $(AM_CFLAGS) -fpic -fno-omit-frame-pointer
+
+
Added: trunk/coregrind/m_replacemalloc/README_REPLACEMALLOC.txt
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_replacemalloc/README_REPLACEMALLOC.txt 2005-05-09 2=
2:01:37 UTC (rev 3647)
+++ trunk/coregrind/m_replacemalloc/README_REPLACEMALLOC.txt 2005-05-10 0=
2:47:21 UTC (rev 3648)
@@ -0,0 +1,29 @@
+The structure of this module is worth noting.
+
+The main part is in vg_replace_malloc.c. It gets compiled into the tool=
's
+'preload' shared object, which goes into the client's area of memory, an=
d
+runs on the simulated CPU just like client code. As a result, it cannot
+use any functions in the core directly; it can only communicated with t=
he
+core using client requests, just like any other client code.
+
+And yet it must call the tool's malloc wrappers. How does it know where
+they are? The init function uses a client request which asks for the li=
st
+of all the core functions (and variables) that it needs to access. It t=
hen
+uses a client request each time it needs to call one of these.
+
+This means that the following sequence occurs each time a tool that uses
+this module starts up:
+
+ - Tool does initialisation, including calling VG_(malloc_funcs)() to te=
ll
+ the core the names of its malloc wrappers. These are stored in
+ VG_(tdict).
+
+ - On the first allocation, vg_replace_malloc.c:init() calls the
+ GET_MALLOCFUNCS client request to get the names of the malloc wrapper=
s
+ out of VG_(tdict), storing them in 'info'.
+
+ - All calls to these functions are done using 'info'.
+
+This is a bit complex, but it's hard to see how it can be done more simp=
ly.=20
+
+
Added: trunk/coregrind/m_replacemalloc/replacemalloc_core.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_replacemalloc/replacemalloc_core.c 2005-05-09 22:01=
:37 UTC (rev 3647)
+++ trunk/coregrind/m_replacemalloc/replacemalloc_core.c 2005-05-10 02:47=
:21 UTC (rev 3648)
@@ -0,0 +1,114 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Malloc replacement. replacemalloc_core.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2000-2005 Julian Seward=20
+ js...@ac...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#include "core.h"
+#include "pub_core_replacemalloc.h"
+
+/*------------------------------------------------------------*/
+/*--- Command line options ---*/
+/*------------------------------------------------------------*/
+
+/* Nb: the allocator always rounds blocks up to a multiple of
+ VG_MIN_MALLOC_SZB.
+*/
+
+/* DEBUG: print malloc details? default: NO */
+Bool VG_(clo_trace_malloc) =3D False;
+
+/* Minimum alignment in functions that don't specify alignment explicitl=
y.
+ default: 0, i.e. use VG_MIN_MALLOC_SZB. */
+UInt VG_(clo_alignment) =3D VG_MIN_MALLOC_SZB;
+
+
+Bool VG_(replacement_malloc_process_cmd_line_option)(Char* arg)
+{
+ if (VG_CLO_STREQN(12, arg, "--alignment=3D")) {
+ VG_(clo_alignment) =3D (UInt)VG_(atoll)(&arg[12]);
+
+ if (VG_(clo_alignment) < VG_MIN_MALLOC_SZB
+ || VG_(clo_alignment) > 4096
+ || VG_(log2)( VG_(clo_alignment) ) =3D=3D -1 /* not a power of=
2 *...
[truncated message content] |
|
From: Tom H. <to...@co...> - 2005-05-10 02:36:04
|
Nightly build on dunsmere ( athlon, Fedora Core 3 ) started at 2005-05-10 03:30:03 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 175 tests, 167 stderr failures, 1 stdout failure ================= memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/errs1 (stderr) memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stderr) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/overlap (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/writev (stderr) memcheck/tests/x86/fpeflags (stderr) memcheck/tests/x86/pushfpopf (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_exit_group (stderr) memcheck/tests/x86/scalar_fork (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/scalar_vfork (stderr) memcheck/tests/x86/tronical (stderr) memcheck/tests/zeropage (stderr) cachegrind/tests/chdir (stderr) cachegrind/tests/dlclose (stderr) cachegrind/tests/x86/fpu-28-108 (stderr) corecheck/tests/as_mmap (stderr) corecheck/tests/as_shm (stderr) corecheck/tests/erringfds (stderr) corecheck/tests/fdleak_cmsg (stderr) corecheck/tests/fdleak_creat (stderr) corecheck/tests/fdleak_dup (stderr) corecheck/tests/fdleak_dup2 (stderr) corecheck/tests/fdleak_fcntl (stderr) corecheck/tests/fdleak_ipv4 (stderr) corecheck/tests/fdleak_open (stderr) corecheck/tests/fdleak_pipe (stderr) corecheck/tests/fdleak_socketpair (stderr) corecheck/tests/pth_atfork1 (stderr) corecheck/tests/pth_cancel1 (stderr) corecheck/tests/pth_cancel2 (stderr) corecheck/tests/pth_cvsimple (stderr) corecheck/tests/pth_empty (stderr) corecheck/tests/pth_exit (stderr) corecheck/tests/pth_exit2 (stderr) corecheck/tests/pth_mutexspeed (stderr) corecheck/tests/pth_once (stderr) corecheck/tests/pth_rwlock (stderr) corecheck/tests/res_search (stderr) corecheck/tests/sigkill (stderr) corecheck/tests/threadederrno (stderr) corecheck/tests/vgprintf (stderr) massif/tests/toobig-allocs (stderr) massif/tests/true_html (stderr) massif/tests/true_text (stderr) lackey/tests/true (stderr) none/tests/args (stderr) none/tests/async-sigs (stderr) none/tests/bitfield1 (stderr) none/tests/blockfault (stderr) none/tests/closeall (stderr) none/tests/coolo_sigaction (stderr) none/tests/coolo_strlen (stderr) none/tests/discard (stderr) none/tests/exec-sigmask (stderr) none/tests/execve (stderr) none/tests/faultstatus (stderr) none/tests/fcntl_setown (stderr) none/tests/floored (stderr) none/tests/fork (stderr) none/tests/fucomip (stderr) none/tests/gxx304 (stderr) none/tests/manythreads (stderr) none/tests/map_unaligned (stderr) none/tests/map_unmap (stderr) none/tests/mq (stderr) none/tests/mremap (stderr) none/tests/munmap_exe (stderr) none/tests/pending (stderr) none/tests/pth_blockedsig (stderr) none/tests/pth_stackalign (stderr) none/tests/rcrl (stderr) none/tests/readline1 (stderr) none/tests/resolv (stderr) none/tests/rlimit_nofile (stderr) none/tests/selfrun (stdout) none/tests/selfrun (stderr) none/tests/sem (stderr) none/tests/semlimit (stderr) none/tests/sha1_test (stderr) none/tests/shortpush (stderr) none/tests/shorts (stderr) none/tests/sigstackgrowth (stderr) none/tests/smc1 (stderr) none/tests/stackgrowth (stderr) none/tests/syscall-restart1 (stderr) none/tests/syscall-restart2 (stderr) none/tests/system (stderr) none/tests/thread-exits (stderr) none/tests/threaded-fork (stderr) none/tests/tls (stderr) none/tests/x86/badseg (stderr) none/tests/x86/bt_everything (stderr) none/tests/x86/bt_literal (stderr) none/tests/x86/cpuid (stderr) none/tests/x86/fpu_lazy_eflags (stderr) none/tests/x86/getseg (stderr) none/tests/x86/insn_basic (stderr) none/tests/x86/insn_cmov (stderr) none/tests/x86/insn_fpu (stderr) none/tests/x86/insn_mmx (stderr) none/tests/x86/insn_mmxext (stderr) none/tests/x86/insn_sse (stderr) none/tests/x86/int (stderr) none/tests/x86/pushpopseg (stderr) none/tests/x86/seg_override (stderr) none/tests/x86/sigcontext (stderr) none/tests/yield (stderr) |
|
From: Tom H. <th...@cy...> - 2005-05-10 02:31:17
|
Nightly build on audi ( i686, Red Hat 9 ) started at 2005-05-10 03:25:02 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 174 tests, 3 stderr failures, 1 stdout failure ================= corecheck/tests/fdleak_cmsg (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) none/tests/yield (stdout) |
|
From: Tom H. <to...@co...> - 2005-05-10 02:26:35
|
Nightly build on dunsmere ( Fedora Core 3 ) started at 2005-05-10 03:20:06 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow insn_mmx: valgrind ./insn_mmx insn_mmxext: valgrind ./insn_mmxext insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int sh: line 1: 28378 Segmentation fault VALGRINDLIB=/tmp/valgrind.2606/valgrind/.in_place /tmp/valgrind.2606/valgrind/./coregrind/valgrind --command-line-only=yes --memcheck:leak-check=no --addrcheck:leak-check=no --tool=none ./int >int.stdout.out 2>int.stderr.out pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 207 tests, 4 stderr failures, 0 stdout failures ================= memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_supp (stderr) make: *** [regtest] Error 1 |
|
From: Tom H. <th...@cy...> - 2005-05-10 02:25:32
|
Nightly build on ginetta ( i686, Red Hat 8.0 ) started at 2005-05-10 03:20:02 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 173 tests, 3 stderr failures, 0 stdout failures ================= corecheck/tests/fdleak_cmsg (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-05-10 02:22:33
|
Nightly build on audi ( Red Hat 9 ) started at 2005-05-10 03:15:02 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow fpu_lazy_eflags: valgrind ./fpu_lazy_eflags insn_basic: valgrind ./insn_basic insn_cmov: valgrind ./insn_cmov insn_fpu: valgrind ./insn_fpu insn_mmx: valgrind ./insn_mmx insn_mmxext: valgrind ./insn_mmxext insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 206 tests, 1 stderr failure, 0 stdout failures ================= memcheck/tests/scalar (stderr) make: *** [regtest] Error 1 |
|
From: Tom H. <th...@cy...> - 2005-05-10 02:20:59
|
Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2005-05-10 03:15:01 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 173 tests, 12 stderr failures, 1 stdout failure ================= memcheck/tests/addressable (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/vgtest_ume (stderr) corecheck/tests/fdleak_cmsg (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) none/tests/yield (stdout) |