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From: <sv...@va...> - 2005-04-21 22:16:34
|
Author: sewardj
Date: 2005-04-21 23:16:29 +0100 (Thu, 21 Apr 2005)
New Revision: 3540
Modified:
trunk/memcheck/mc_main.c
Log:
Finish off fast cases for {LOAD,STORE}V{4,2,1} and do an inspection of
it. Do fast cases for make_aligned_word32_{noaccess,writable}.
Modified: trunk/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_main.c 2005-04-21 22:11:46 UTC (rev 3539)
+++ trunk/memcheck/mc_main.c 2005-04-21 22:16:29 UTC (rev 3540)
@@ -860,48 +860,88 @@
set_address_range_perms ( a, len, VGM_BIT_VALID, VGM_BIT_VALID );
}
=20
+
static __inline__
-void make_aligned_word32_writable(Addr a)
+void make_aligned_word32_writable ( Addr aA )
{
- PROF_EVENT(43, "make_aligned_word32_writable");
- mc_make_writable(a, 4);
-//zz SecMap* sm;
-//zz UInt sm_off;
-//zz UChar mask;
-//zz=20
-//zz VGP_PUSHCC(VgpESPAdj);
-//zz ENSURE_MAPPABLE(a, "make_aligned_word_writable");
-//zz sm =3D primary_map[PM_IDX(a)];
-//zz sm_off =3D SM_OFF(a);
-//zz ((UInt*)(sm->vbyte))[sm_off >> 2] =3D VGM_WORD_INVALID;
-//zz mask =3D 0x0F;
-//zz mask <<=3D (a & 4 /* 100b */); /* a & 4 is either 0 or 4 */
-//zz /* mask now contains 1s where we wish to make address bits inval=
id (0s). */
-//zz sm->abits[sm_off >> 3] &=3D ~mask;
-//zz VGP_POPCC(VgpESPAdj);
+ PROF_EVENT(300, "make_aligned_word32_writable");
+
+# if VG_DEBUG_MEMORY >=3D 2
+ mc_make_writable(aA, 4);
+# else
+
+ if (EXPECTED_NOT_TAKEN(aA > MAX_PRIMARY_ADDRESS)) {
+ PROF_EVENT(300, "make_aligned_word32_writable-slow1");
+ mc_make_writable(aA, 4);
+ return;
+ }
+
+ UWord a =3D (UWord)aA;
+ UWord sec_no =3D (UWord)(a >> 16);
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAPS);
+# endif
+
+ if (EXPECTED_NOT_TAKEN(is_distinguished_sm(primary_map[sec_no])))
+ primary_map[sec_no] =3D copy_for_writing(primary_map[sec_no]);
+
+ SecMap* sm =3D primary_map[sec_no];
+ UWord v_off =3D a & 0xFFFF;
+ UWord a_off =3D v_off >> 3;
+
+ /* Paint the new area as uninitialised. */
+ ((UInt*)(sm->vbyte))[v_off >> 2] =3D VGM_WORD32_INVALID;
+
+ UWord mask =3D 0x0F;
+ mask <<=3D (a & 4 /* 100b */); /* a & 4 is either 0 or 4 */
+ /* mask now contains 1s where we wish to make address bits valid
+ (0s). */
+ sm->abits[a_off] &=3D ~mask;
+# endif
}
=20
+
static __inline__
-void make_aligned_word32_noaccess(Addr a)
+void make_aligned_word32_noaccess ( Addr aA )
{
- PROF_EVENT(44, "make_aligned_word32_noaccess");
- mc_make_noaccess(a, 4);
-//zz SecMap* sm;
-//zz UInt sm_off;
-//zz UChar mask;
-//zz=20
-//zz VGP_PUSHCC(VgpESPAdj);
-//zz ENSURE_MAPPABLE(a, "make_aligned_word_noaccess");
-//zz sm =3D primary_map[PM_IDX(a)];
-//zz sm_off =3D SM_OFF(a);
-//zz ((UInt*)(sm->vbyte))[sm_off >> 2] =3D VGM_WORD_INVALID;
-//zz mask =3D 0x0F;
-//zz mask <<=3D (a & 4 /* 100b */); /* a & 4 is either 0 or 4 */
-//zz /* mask now contains 1s where we wish to make address bits inval=
id (1s). */
-//zz sm->abits[sm_off >> 3] |=3D mask;
-//zz VGP_POPCC(VgpESPAdj);
+ PROF_EVENT(310, "make_aligned_word32_noaccess");
+
+# if VG_DEBUG_MEMORY >=3D 2
+ mc_make_noaccess(aA, 4);
+# else
+
+ if (EXPECTED_NOT_TAKEN(aA > MAX_PRIMARY_ADDRESS)) {
+ PROF_EVENT(311, "make_aligned_word32_noaccess-slow1");
+ mc_make_noaccess(aA, 4);
+ return;
+ }
+
+ UWord a =3D (UWord)aA;
+ UWord sec_no =3D (UWord)(a >> 16);
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAPS);
+# endif
+
+ if (EXPECTED_NOT_TAKEN(is_distinguished_sm(primary_map[sec_no])))
+ primary_map[sec_no] =3D copy_for_writing(primary_map[sec_no]);
+
+ SecMap* sm =3D primary_map[sec_no];
+ UWord v_off =3D a & 0xFFFF;
+ UWord a_off =3D v_off >> 3;
+
+ /* Paint the abandoned data as uninitialised. Probably not
+ necessary, but still .. */
+ ((UInt*)(sm->vbyte))[v_off >> 2] =3D VGM_WORD32_INVALID;
+
+ UWord mask =3D 0x0F;
+ mask <<=3D (a & 4 /* 100b */); /* a & 4 is either 0 or 4 */
+ /* mask now contains 1s where we wish to make address bits invalid
+ (1s). */
+ sm->abits[a_off] |=3D mask;
+# endif
}
=20
+
/* Nb: by "aligned" here we mean 8-byte aligned */
static __inline__
void make_aligned_word64_writable(Addr a)
@@ -1402,10 +1442,13 @@
if (EXPECTED_TAKEN(abits =3D=3D VGM_NIBBLE_VALID)) {
/* Handle common case quickly: a is suitably aligned, is mapped,
and is addressible. */
- return (UWord)(
- 0xFFFFFFFFULL
- & ((UInt*)(sm->vbyte))[ v_off >> 2 ]
- );
+ /* On a 32-bit platform, simply hoick the required 32 bits out of
+ the vbyte array. On a 64-bit platform, also set the upper 32
+ bits to 1 ("undefined"), just in case. This almost certainly
+ isn't necessary, but be paranoid. */
+ UWord ret =3D (UWord)0xFFFFFFFF00000000ULL;
+ ret |=3D (UWord)( ((UInt*)(sm->vbyte))[ v_off >> 2 ] );
+ return ret;
} else {
/* Slow but general case. */
PROF_EVENT(222, "helperc_LOADV4-slow2");
@@ -1415,7 +1458,6 @@
# endif
}
=20
-
VGA_REGPARM(2)
void MC_(helperc_STOREV4) ( Addr aA, UWord vbytes )
{
@@ -1462,6 +1504,7 @@
# endif
}
=20
+
/* ------------------------ Size =3D 2 ------------------------ */
=20
VGA_REGPARM(1)
@@ -1494,10 +1537,12 @@
UWord v_off =3D a & 0xFFFF;
UWord a_off =3D v_off >> 3;
UWord abits =3D (UWord)(sm->abits[a_off]);
-
if (EXPECTED_TAKEN(abits =3D=3D VGM_BYTE_VALID)) {
/* Handle common case quickly: a is mapped, and the entire
word32 it lives in is addressible. */
+ /* Set the upper 16/48 bits of the result to 1 ("undefined"),
+ just in case. This almost certainly isn't necessary, but be
+ paranoid. */
return (~(UWord)0xFFFF)
|
(UWord)( ((UShort*)(sm->vbyte))[ v_off >> 1 ] );
@@ -1510,29 +1555,51 @@
# endif
}
=20
+
VGA_REGPARM(2)
-void MC_(helperc_STOREV2) ( Addr a, UWord vbytes )
+void MC_(helperc_STOREV2) ( Addr aA, UWord vbytes )
{
PROF_EVENT(250, "helperc_STOREV2");
+
+# if VG_DEBUG_MEMORY >=3D 2
mc_STOREVn_slow( a, 2, (ULong)vbytes, False/*littleendian*/ );
-//zz # ifdef VG_DEBUG_MEMORY
-//zz mc_wr_V2_SLOWLY(a, vbytes);
-//zz # else
-//zz UInt sec_no =3D rotateRight16(a) & 0x1FFFF;
-//zz SecMap* sm =3D primary_map[sec_no];
-//zz UInt a_off =3D (SM_OFF(a)) >> 3;
-//zz PROF_EVENT(63);
-//zz if (!IS_DISTINGUISHED_SM(sm) && sm->abits[a_off] =3D=3D VGM_BYTE=
_VALID) {
-//zz /* Handle common case quickly. */
-//zz UInt v_off =3D SM_OFF(a);
-//zz ((UShort*)(sm->vbyte))[ v_off >> 1 ] =3D vbytes & 0x0000FFFF;
-//zz } else {
-//zz /* Slow but general case. */
-//zz mc_wr_V2_SLOWLY(a, vbytes);
-//zz }
-//zz # endif
+# else
+
+ const UWord mask =3D ~((0x10000-2) | ((N_PRIMARY_MAPS-1) << 16));
+ UWord a =3D (UWord)aA;
+
+ /* If any part of 'a' indicated by the mask is 1, either 'a' is not
+ naturally aligned, or 'a' exceeds the range covered by the
+ primary map. Either way we defer to the slow-path case. */
+ if (EXPECTED_NOT_TAKEN(a & mask)) {
+ PROF_EVENT(251, "helperc_STOREV2-slow1");
+ mc_STOREVn_slow( aA, 2, (ULong)vbytes, False/*littleendian*/ );
+ return;
+ }
+
+ UWord sec_no =3D (UWord)(a >> 16);
+
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAPS);
+# endif
+
+ SecMap* sm =3D primary_map[sec_no];
+ UWord v_off =3D a & 0xFFFF;
+ UWord a_off =3D v_off >> 3;
+ UWord abits =3D (UWord)(sm->abits[a_off]);
+ if (EXPECTED_TAKEN(!is_distinguished_sm(sm)=20
+ && abits =3D=3D VGM_BYTE_VALID)) {
+ /* Handle common case quickly. */
+ ((UShort*)(sm->vbyte))[ v_off >> 1 ] =3D (UShort)vbytes;
+ } else {
+ /* Slow but general case. */
+ PROF_EVENT(252, "helperc_STOREV2-slow2");
+ mc_STOREVn_slow( aA, 2, (ULong)vbytes, False/*littleendian*/ );
+ }
+# endif
}
=20
+
/* ------------------------ Size =3D 1 ------------------------ */
=20
VGA_REGPARM(1)
@@ -1564,10 +1631,13 @@
SecMap* sm =3D primary_map[sec_no];
UWord v_off =3D a & 0xFFFF;
UWord a_off =3D v_off >> 3;
- UWord abits =3D 0xFF & (UWord)(sm->abits[a_off]);
+ UWord abits =3D (UWord)(sm->abits[a_off]);
if (EXPECTED_TAKEN(abits =3D=3D VGM_BYTE_VALID)) {
/* Handle common case quickly: a is mapped, and the entire
word32 it lives in is addressible. */
+ /* Set the upper 24/56 bits of the result to 1 ("undefined"),
+ just in case. This almost certainly isn't necessary, but be
+ paranoid. */
return (~(UWord)0xFF)
|
(UWord)( ((UChar*)(sm->vbyte))[ v_off ] );
@@ -1609,7 +1679,7 @@
SecMap* sm =3D primary_map[sec_no];
UWord v_off =3D a & 0xFFFF;
UWord a_off =3D v_off >> 3;
- UWord abits =3D 0xFF & (UWord)(sm->abits[a_off]);
+ UWord abits =3D (UWord)(sm->abits[a_off]);
if (EXPECTED_TAKEN(!is_distinguished_sm(sm)=20
&& abits =3D=3D VGM_BYTE_VALID)) {
/* Handle common case quickly: a is mapped, the entire word32 it
|
|
From: Nicholas N. <nj...@cs...> - 2005-04-21 22:14:36
|
On Thu, 21 Apr 2005, Rex Walburn wrote: > Yes, I m given projects to understand legacy source code, and parallel > process the slow portions if possible. Urk. Good luck. > What does Redux actually do ? Look at http://www.valgrind.org/docs/redux2003.ps.bz2 and/or chapter 5 of http://www.valgrind.org/docs/phd2004.pdf for a description. > I tried using it but it seg-faulted and I did not try debugging it. I've heard that some of the seg faults can be worked around by statically linking programs. That might not be an option for you, though. Redux is not at all robust or reliable. N |
|
From: <sv...@va...> - 2005-04-21 22:11:51
|
Author: njn Date: 2005-04-21 23:11:46 +0100 (Thu, 21 Apr 2005) New Revision: 3539 Modified: trunk/NOTES.txt Log: Add note. Modified: trunk/NOTES.txt =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/NOTES.txt 2005-04-21 17:34:00 UTC (rev 3538) +++ trunk/NOTES.txt 2005-04-21 22:11:46 UTC (rev 3539) @@ -6,6 +6,12 @@ sense to have tool-helpers written in assembly. Looks like we need to retain coregrind/core_asm.h, though. =20 + [core_asm.h includes tool_asm.h. The contents of tool_asm.h could be = put + into core_asm.h, but that would deviate from the structure described a= t + the top of core.h... that structure will slowly change as core.h/tool.= h + are split up into separate headers for each module, but it might be + worthwhile keeping the asm-only headers? Not sure. --njn] + Urk. Perhaps nuke all that X86_FEAT gunk in coregrind/core_asm.h though. Vex isn't clever enough to distinguish dozens of CPU subvariants. |
|
From: Stephen M.
|
JF> Rex Walburn wrote: RW> Hi RW> I tried using VG_(describe_addr) and it returns a value (null) for RW> every address. >>>>> "JF" == Jeremy Fitzhardinge <je...@go...> writes: JF> Only the stabs reader extracts enough type information for JF> describe_addr to work; nobody has put the effort into the DWARF JF> reader yet. If you compile with -gstabs, you might get more JF> useful results (though I suspect this code has been untested for a JF> while, so you may get some explosions instead). You might also want to try looking at the "Kvasir" tool that our research group has implemented. We had a similar problem of wanting to have detailed variable information along with per-instruction operation tracking: in our case, we wanted to print the values of all the accessible variables at the entrance and exit of functions, but to use Memcheck's information to know which memory locations had valid data. Rather than building on Valgrind's existing debugging information reading code, we made our own by modifying the "readelf" tool from the GNU Binutils (unfortunately, we didn't find out about libdwarf until too late); this just supports DWARF, but we read all sorts of information about global variables, parameters, arrays, and structs. We use this information to find the address(es) for each variable we're interested in, and then print their contents. You can get the source for Kvasir as part of the Daikon distribution, from http://pag.csail.mit.edu/daikon/download/. At the moment, it comes as a tool along with a minimally modified version of Valgrind 2.2.0, and includes hacked versions of Memcheck and readelf inside (it's all GPLed). In the current version, the code for reading the debugging information, traversing the sets of variables, and printing out their contents in our specific trace format aren't as well separated as we'd like, but if you don't mind reusing by cut and paste, you might find a lot of code you could take advantage of. -- Stephen |
|
From: Jeremy F. <je...@go...> - 2005-04-21 17:56:09
|
Rex Walburn wrote:
>Hi
>I tried using VG_(describe_addr) and it returns a value (null) for
>every address.
>
>
Only the stabs reader extracts enough type information for describe_addr
to work; nobody has put the effort into the DWARF reader yet. If you
compile with -gstabs, you might get more useful results (though I
suspect this code has been untested for a while, so you may get some
explosions instead).
J
|
|
From: Rex W. <wa...@gm...> - 2005-04-21 17:52:23
|
Hi I tried using VG_(describe_addr) and it returns a value (null) for every address. I have included VG_(needs_data_syms) in SK_(pre_clo_init). So instead I used VG_(get_fnname_if_entry) and it returns function names wherever it can. With this I can grep for my symbol names which matter to me (these names I can get by doing "nm a.out") . THe limitation with this is that I can only get symbol names that are static or global, and for arrays only that of the beginning address. I have no idea why VG_(describe_addr) gives me "(null)" for every addr. Anyway I am happy with atleast some data which I needed, and I am working on how to get names of symbols which are local ... any ideas? I was thinking, checking for Scope and trying something of that sort ... I was interested in callgrind but I could not find it in valgrind-2.4.0 so I tried downloading the latest source code snapshot using cvs but I was not able to login anonymously. It asks for a password and I have tried blank, "anoncvs" , "anonymous" but i am not able to login. I have followed whatever instruction is given on the valgrind website. Thanks.=20 Vikas >=20 > Message: 6 > From: Josef Weidendorfer <Jos...@gm...> > To: val...@li... > Subject: Re: [Valgrind-developers] Dullard with 2.4.0 > Date: Thu, 21 Apr 2005 17:49:41 +0200 >=20 > On Thursday 21 April 2005 15:24, Nicholas Nethercote wrote: > > On Thu, 21 Apr 2005, Rex Walburn wrote: > > > My aim is that I want to know which variables have been accessed and > > > written to or modified and how many times in a particular area of the > > > ... > > "variable"? What about compound structures like arrays and struct -- a= re > > they a single variable or do you consider the individual elements as > > variables? What about stack vs. static vs. heap-allocated variables? > > Etc. >=20 > One other problem is the amount of statistics data produced if there are = many > instances of data of same type. It probably makes sense to relate to data > types. >=20 > > I see. AIUI the symbol table handles code addresses, eg. function name= s, > > but not variable names. Variable names are in the debugging informatio= n. >=20 > Static data objects are also in the symbol table. See manual page of "nm"= for > symbol types. These are usually skipped in Valgrinds symbol reader, unles= s > VG_(needs_data_syms)() is called. The type information of symbols will be > found in the debug info. >=20 > IMHO there should be a hook for tools to be able to collect data symbol > information [This was the crappy patch I send some time ago ;-) ]. > Calling VG_(describe_addr)() at every memory access is probably way to sl= ow. >=20 > Josef >=20 > > Local variables on the stack are going to be tricky to deal with, since > > you'll have to identify when you're entering/exiting functions, which i= s > > harder than it first seems. > > > > > What did you mean by source-level instrumentation ? > > > > A bit like the source code parsing/data flow analysis that you mentione= d > > -- add instrumentation to the original source code, which would require > > parsing the source code, and some static analysis. Then you would run = the > > program and get the stats. > > > > N > > > > |
|
From: <sv...@va...> - 2005-04-21 17:34:08
|
Author: sewardj
Date: 2005-04-21 18:34:00 +0100 (Thu, 21 Apr 2005)
New Revision: 3538
Modified:
trunk/memcheck/mac_needs.c
trunk/memcheck/mac_shared.h
trunk/memcheck/mc_main.c
Log:
* Crank up the memcheck event-counting system, and enhance it to
name the events, rather than just number them, which makes it a
lot easier to use
* Based on that, fill in some fast-path cases=20
{LOAD,STORE}V{4,2,1}. The assembly code looks about the same
length as it did before, on x86. Fast-path cases for the
stack have yet to be done.
Modified: trunk/memcheck/mac_needs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mac_needs.c 2005-04-21 02:37:54 UTC (rev 3537)
+++ trunk/memcheck/mac_needs.c 2005-04-21 17:34:00 UTC (rev 3538)
@@ -797,25 +797,35 @@
=20
#ifdef MAC_PROFILE_MEMORY
=20
-UInt MAC_(event_ctr)[N_PROF_EVENTS];
+UInt MAC_(event_ctr)[N_PROF_EVENTS];
+HChar* MAC_(event_ctr_name)[N_PROF_EVENTS];
=20
static void init_prof_mem ( void )
{
Int i;
- for (i =3D 0; i < N_PROF_EVENTS; i++)
+ for (i =3D 0; i < N_PROF_EVENTS; i++) {
MAC_(event_ctr)[i] =3D 0;
+ MAC_(event_ctr_name)[i] =3D NULL;
+ }
}
=20
static void done_prof_mem ( void )
{
- Int i;
+ Int i;
+ Bool spaced =3D False;
for (i =3D 0; i < N_PROF_EVENTS; i++) {
- if ((i % 10) =3D=3D 0)=20
+ if (!spaced && (i % 10) =3D=3D 0) {
VG_(printf)("\n");
- if (MAC_(event_ctr)[i] > 0)
- VG_(printf)( "prof mem event %2d: %d\n", i, MAC_(event_ctr)[i] =
);
+ spaced =3D True;
+ }
+ if (MAC_(event_ctr)[i] > 0) {
+ spaced =3D False;
+ VG_(printf)( "prof mem event %3d: %9d %s\n",=20
+ i, MAC_(event_ctr)[i],
+ MAC_(event_ctr_name)[i]=20
+ ? MAC_(event_ctr_name)[i] : "unnamed");
+ }
}
- VG_(printf)("\n");
}
=20
#else
Modified: trunk/memcheck/mac_shared.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mac_shared.h 2005-04-21 02:37:54 UTC (rev 3537)
+++ trunk/memcheck/mac_shared.h 2005-04-21 17:34:00 UTC (rev 3538)
@@ -171,21 +171,27 @@
VgpToolCC;
=20
/* Define to collect detailed performance info. */
-/* #define MAC_PROFILE_MEMORY */
+#define MAC_PROFILE_MEMORY
=20
#ifdef MAC_PROFILE_MEMORY
-# define N_PROF_EVENTS 150
+# define N_PROF_EVENTS 500
=20
-extern UInt MAC_(event_ctr)[N_PROF_EVENTS];
+extern UInt MAC_(event_ctr)[N_PROF_EVENTS];
+extern HChar* MAC_(event_ctr_name)[N_PROF_EVENTS];
=20
-# define PROF_EVENT(ev) \
- do { tl_assert((ev) >=3D 0 && (ev) < N_PROF_EVENTS); \
- MAC_(event_ctr)[ev]++; \
+# define PROF_EVENT(ev, name) \
+ do { tl_assert((ev) >=3D 0 && (ev) < N_PROF_EVENTS); \
+ /* crude and inaccurate check to ensure the same */ \
+ /* event isn't being used with > 1 name */ \
+ if (MAC_(event_ctr_name)[ev]) \
+ tl_assert(name =3D=3D MAC_(event_ctr_name)[ev]); \
+ MAC_(event_ctr)[ev]++; \
+ MAC_(event_ctr_name)[ev] =3D (name); \
} while (False);
=20
#else
=20
-# define PROF_EVENT(ev) /* */
+# define PROF_EVENT(ev, name) /* */
=20
#endif /* MAC_PROFILE_MEMORY */
=20
@@ -437,7 +443,7 @@
\
void VGA_REGPARM(1) MAC_(new_mem_stack_4)(Addr new_SP) \
{ \
- PROF_EVENT(110); \
+ PROF_EVENT(110, "new_mem_stack_4"); \
if (VG_IS_4_ALIGNED(new_SP)) { \
ALIGNED4_NEW ( new_SP ); \
} else { \
@@ -447,7 +453,7 @@
\
void VGA_REGPARM(1) MAC_(die_mem_stack_4)(Addr new_SP) \
{ \
- PROF_EVENT(120); \
+ PROF_EVENT(120, "die_mem_stack_4"); \
if (VG_IS_4_ALIGNED(new_SP)) { \
ALIGNED4_DIE ( new_SP-4 ); \
} else { \
@@ -457,7 +463,7 @@
\
void VGA_REGPARM(1) MAC_(new_mem_stack_8)(Addr new_SP) \
{ \
- PROF_EVENT(111); \
+ PROF_EVENT(111, "new_mem_stack_8"); \
if (VG_IS_8_ALIGNED(new_SP)) { \
ALIGNED8_NEW ( new_SP ); \
} else if (VG_IS_4_ALIGNED(new_SP)) { \
@@ -470,7 +476,7 @@
\
void VGA_REGPARM(1) MAC_(die_mem_stack_8)(Addr new_SP) \
{ \
- PROF_EVENT(121); \
+ PROF_EVENT(121, "die_mem_stack_8"); \
if (VG_IS_8_ALIGNED(new_SP)) { \
ALIGNED8_DIE ( new_SP-8 ); \
} else if (VG_IS_4_ALIGNED(new_SP)) { \
@@ -483,7 +489,7 @@
\
void VGA_REGPARM(1) MAC_(new_mem_stack_12)(Addr new_SP) \
{ \
- PROF_EVENT(112); \
+ PROF_EVENT(112, "new_mem_stack_12"); \
if (VG_IS_8_ALIGNED(new_SP)) { \
ALIGNED8_NEW ( new_SP ); \
ALIGNED4_NEW ( new_SP+8 ); \
@@ -497,7 +503,7 @@
\
void VGA_REGPARM(1) MAC_(die_mem_stack_12)(Addr new_SP) \
{ \
- PROF_EVENT(122); \
+ PROF_EVENT(122, "die_mem_stack_12"); \
/* Note the -12 in the test */ \
if (VG_IS_8_ALIGNED(new_SP-12)) { \
ALIGNED8_DIE ( new_SP-12 ); \
@@ -512,7 +518,7 @@
\
void VGA_REGPARM(1) MAC_(new_mem_stack_16)(Addr new_SP) \
{ \
- PROF_EVENT(113); \
+ PROF_EVENT(113, "new_mem_stack_16"); \
if (VG_IS_8_ALIGNED(new_SP)) { \
ALIGNED8_NEW ( new_SP ); \
ALIGNED8_NEW ( new_SP+8 ); \
@@ -527,7 +533,7 @@
\
void VGA_REGPARM(1) MAC_(die_mem_stack_16)(Addr new_SP) \
{ \
- PROF_EVENT(123); \
+ PROF_EVENT(123, "die_mem_stack_16"); \
if (VG_IS_8_ALIGNED(new_SP)) { \
ALIGNED8_DIE ( new_SP-16 ); \
ALIGNED8_DIE ( new_SP-8 ); \
@@ -542,7 +548,7 @@
\
void VGA_REGPARM(1) MAC_(new_mem_stack_32)(Addr new_SP) \
{ \
- PROF_EVENT(114); \
+ PROF_EVENT(114, "new_mem_stack_32"); \
if (VG_IS_8_ALIGNED(new_SP)) { \
ALIGNED8_NEW ( new_SP ); \
ALIGNED8_NEW ( new_SP+8 ); \
@@ -561,7 +567,7 @@
\
void VGA_REGPARM(1) MAC_(die_mem_stack_32)(Addr new_SP) \
{ \
- PROF_EVENT(124); \
+ PROF_EVENT(124, "die_mem_stack_32"); \
if (VG_IS_8_ALIGNED(new_SP)) { \
ALIGNED8_DIE ( new_SP-32 ); \
ALIGNED8_DIE ( new_SP-24 ); \
@@ -580,13 +586,13 @@
\
void MAC_(new_mem_stack) ( Addr a, SizeT len ) \
{ \
- PROF_EVENT(115); \
+ PROF_EVENT(115, "new_mem_stack"); \
UNALIGNED_NEW ( a, len ); \
} \
\
void MAC_(die_mem_stack) ( Addr a, SizeT len ) \
{ \
- PROF_EVENT(125); \
+ PROF_EVENT(125, "die_mem_stack"); \
UNALIGNED_DIE ( a, len ); \
}
=20
Modified: trunk/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_main.c 2005-04-21 02:37:54 UTC (rev 3537)
+++ trunk/memcheck/mc_main.c 2005-04-21 17:34:00 UTC (rev 3538)
@@ -52,6 +52,17 @@
//#include "vg_profile.c"
=20
=20
+#define EXPECTED_TAKEN(cond) __builtin_expect((cond),1)
+#define EXPECTED_NOT_TAKEN(cond) __builtin_expect((cond),0)
+
+/* Define to debug the mem audit system. Set to:
+ 0 no debugging, fast cases are used
+ 1 some sanity checking, fast cases are used
+ 2 max sanity checking, only slow cases are used
+*/
+#define VG_DEBUG_MEMORY 1
+
+
typedef enum {
MC_Ok =3D 5, MC_AddrErr =3D 6, MC_ValueErr =3D 7
} MC_ReadResult;
@@ -69,12 +80,16 @@
we hardwire the assumption that each secondary map covers precisely
64k of address space. */
=20
+/* Only change this. N_PRIMARY_MAPS *must* be a power of 2. */
#define N_PRIMARY_BITS 16
-#define N_PRIMARY_MAPS ((1 << N_PRIMARY_BITS)-1)
=20
-#define MAX_PRIMARY_ADDRESS (Addr)(((Addr)65536) * N_PRIMARY_MAPS)
+/* Do not change this. */
+#define N_PRIMARY_MAPS (1 << N_PRIMARY_BITS)
=20
+/* Do not change this. */
+#define MAX_PRIMARY_ADDRESS (Addr)((((Addr)65536) * N_PRIMARY_MAPS)-1)
=20
+
/* --------------- Secondary maps --------------- */
=20
typedef=20
@@ -304,10 +319,11 @@
Bool aok;
UWord abit, vbyte;
=20
- PROF_EVENT(70);
+ PROF_EVENT(30, "mc_LOADVn_slow");
tl_assert(szB =3D=3D 8 || szB =3D=3D 4 || szB =3D=3D 2 || szB =3D=3D =
1);
=20
while (True) {
+ PROF_EVENT(31, "mc_LOADVn_slow(loop)");
ai =3D a+byte_offset_w(szB,bigendian,i);
get_abit_and_vbyte(&abit, &vbyte, ai);
aok =3D abit =3D=3D VGM_BIT_VALID;
@@ -337,13 +353,14 @@
Bool aok;
Addr ai;
=20
- PROF_EVENT(71);
+ PROF_EVENT(35, "mc_STOREVn_slow");
tl_assert(szB =3D=3D 8 || szB =3D=3D 4 || szB =3D=3D 2 || szB =3D=3D =
1);
=20
/* Dump vbytes in memory, iterating from least to most significant
byte. At the same time establish addressibility of the
location. */
for (i =3D 0; i < szB; i++) {
+ PROF_EVENT(36, "mc_STOREVn_slow(loop)");
ai =3D a+byte_offset_w(szB,bigendian,i);
abit =3D get_abit(ai);
aok =3D abit =3D=3D VGM_BIT_VALID;
@@ -376,8 +393,6 @@
=20
//zz #if 0 /* this is the old implementation */
//zz=20
-//zz /* Define to debug the mem audit system. */
-//zz /* #define VG_DEBUG_MEMORY */
//zz=20
//zz=20
//zz /*------------------------------------------------------------*/
@@ -523,8 +538,6 @@
=20
/* auxmap_size =3D auxmap_used =3D 0;=20
no ... these are statically initialised */
-
- tl_assert( TL_(expensive_sanity_check)() );
}
=20
=20
@@ -828,21 +841,21 @@
=20
static void mc_make_noaccess ( Addr a, SizeT len )
{
- PROF_EVENT(35);
+ PROF_EVENT(40, "mc_make_noaccess");
DEBUG("mc_make_noaccess(%p, %llu)\n", a, (ULong)len);
set_address_range_perms ( a, len, VGM_BIT_INVALID, VGM_BIT_INVALID );
}
=20
static void mc_make_writable ( Addr a, SizeT len )
{
- PROF_EVENT(36);
+ PROF_EVENT(41, "mc_make_writable");
DEBUG("mc_make_writable(%p, %llu)\n", a, (ULong)len);
set_address_range_perms ( a, len, VGM_BIT_VALID, VGM_BIT_INVALID );
}
=20
static void mc_make_readable ( Addr a, SizeT len )
{
- PROF_EVENT(37);
+ PROF_EVENT(42, "mc_make_readable");
DEBUG("mc_make_readable(%p, %llu)\n", a, (ULong)len);
set_address_range_perms ( a, len, VGM_BIT_VALID, VGM_BIT_VALID );
}
@@ -850,6 +863,7 @@
static __inline__
void make_aligned_word32_writable(Addr a)
{
+ PROF_EVENT(43, "make_aligned_word32_writable");
mc_make_writable(a, 4);
//zz SecMap* sm;
//zz UInt sm_off;
@@ -870,6 +884,7 @@
static __inline__
void make_aligned_word32_noaccess(Addr a)
{
+ PROF_EVENT(44, "make_aligned_word32_noaccess");
mc_make_noaccess(a, 4);
//zz SecMap* sm;
//zz UInt sm_off;
@@ -891,6 +906,7 @@
static __inline__
void make_aligned_word64_writable(Addr a)
{
+ PROF_EVENT(45, "make_aligned_word64_writable");
mc_make_writable(a, 8);
//zz SecMap* sm;
//zz UInt sm_off;
@@ -908,6 +924,7 @@
static __inline__
void make_aligned_word64_noaccess(Addr a)
{
+ PROF_EVENT(46, "make_aligned_word64_noaccess");
mc_make_noaccess(a, 8);
//zz SecMap* sm;
//zz UInt sm_off;
@@ -939,9 +956,9 @@
=20
DEBUG("mc_copy_address_range_state\n");
=20
- PROF_EVENT(40);
+ PROF_EVENT(50, "mc_copy_address_range_state");
for (i =3D 0; i < len; i++) {
- PROF_EVENT(41);
+ PROF_EVENT(51, "mc_copy_address_range_state(loop)");
get_abit_and_vbyte( &abit, &vbyte, src+i );
set_abit_and_vbyte( dst+i, abit, vbyte );
}
@@ -964,9 +981,9 @@
{
SizeT i;
UWord abit;
- PROF_EVENT(42);
+ PROF_EVENT(60, "mc_check_noaccess");
for (i =3D 0; i < len; i++) {
- PROF_EVENT(43);
+ PROF_EVENT(61, "mc_check_noaccess(loop)");
abit =3D get_abit(a);
if (abit =3D=3D VGM_BIT_VALID) {
if (bad_addr !=3D NULL)=20
@@ -982,9 +999,9 @@
{
SizeT i;
UWord abit;
- PROF_EVENT(42);
+ PROF_EVENT(62, "mc_check_writable");
for (i =3D 0; i < len; i++) {
- PROF_EVENT(43);
+ PROF_EVENT(63, "mc_check_writable(loop)");
abit =3D get_abit(a);
if (abit =3D=3D VGM_BIT_INVALID) {
if (bad_addr !=3D NULL) *bad_addr =3D a;
@@ -1001,10 +1018,10 @@
UWord abit;
UWord vbyte;
=20
- PROF_EVENT(44);
+ PROF_EVENT(64, "mc_check_readable");
DEBUG("mc_check_readable\n");
for (i =3D 0; i < len; i++) {
- PROF_EVENT(45);
+ PROF_EVENT(65, "mc_check_readable(loop)");
get_abit_and_vbyte(&abit, &vbyte, a);
// Report addressability errors in preference to definedness error=
s
// by checking the A bits first.
@@ -1032,10 +1049,10 @@
{
UWord abit;
UWord vbyte;
- PROF_EVENT(46);
+ PROF_EVENT(66, "mc_check_readable_asciiz");
DEBUG("mc_check_readable_asciiz\n");
while (True) {
- PROF_EVENT(47);
+ PROF_EVENT(67, "mc_check_readable_asciiz(loop)");
get_abit_and_vbyte(&abit, &vbyte, a);
// As in mc_check_readable(), check A bits first
if (abit !=3D VGM_BIT_VALID) {
@@ -1276,6 +1293,7 @@
VGA_REGPARM(1)
ULong MC_(helperc_LOADV8) ( Addr a )
{
+ PROF_EVENT(70, "helperc_LOADV8");
return mc_LOADVn_slow( a, 8, False/*littleendian*/ );
//zz # ifdef VG_DEBUG_MEMORY
//zz return mc_rd_V8_SLOWLY(a);
@@ -1311,6 +1329,7 @@
VGA_REGPARM(1)
void MC_(helperc_STOREV8) ( Addr a, ULong vbytes )
{
+ PROF_EVENT(71, "helperc_STOREV8");
mc_STOREVn_slow( a, 8, vbytes, False/*littleendian*/ );
//zz # ifdef VG_DEBUG_MEMORY
//zz mc_wr_V8_SLOWLY(a, vbytes);
@@ -1349,86 +1368,152 @@
/* ------------------------ Size =3D 4 ------------------------ */
=20
VGA_REGPARM(1)
-UWord MC_(helperc_LOADV4) ( Addr a )
+UWord MC_(helperc_LOADV4) ( Addr aA )
{
- return (UWord)mc_LOADVn_slow( a, 4, False/*littleendian*/ );
-//zz # ifdef VG_DEBUG_MEMORY
-//zz return mc_rd_V4_SLOWLY(a);
-//zz # else
-//zz UInt sec_no =3D rotateRight16(a) & 0x3FFFF;
-//zz SecMap* sm =3D primary_map[sec_no];
-//zz UInt a_off =3D (SM_OFF(a)) >> 3;
-//zz UChar abits =3D sm->abits[a_off];
-//zz abits >>=3D (a & 4);
-//zz abits &=3D 15;
-//zz PROF_EVENT(60);
-//zz if (abits =3D=3D VGM_NIBBLE_VALID) {
-//zz /* Handle common case quickly: a is suitably aligned, is mapp=
ed,
-//zz and is addressible. */
-//zz UInt v_off =3D SM_OFF(a);
-//zz return ((UInt*)(sm->vbyte))[ v_off >> 2 ];
-//zz } else {
-//zz /* Slow but general case. */
-//zz return mc_rd_V4_SLOWLY(a);
-//zz }
-//zz # endif
+ PROF_EVENT(220, "helperc_LOADV4");
+
+# if VG_DEBUG_MEMORY >=3D 2
+ return (UWord)mc_LOADVn_slow( aA, 4, False/*littleendian*/ );
+# else
+
+ const UWord mask =3D ~((0x10000-4) | ((N_PRIMARY_MAPS-1) << 16));
+ UWord a =3D (UWord)aA;
+
+ /* If any part of 'a' indicated by the mask is 1, either 'a' is not
+ naturally aligned, or 'a' exceeds the range covered by the
+ primary map. Either way we defer to the slow-path case. */
+ if (EXPECTED_NOT_TAKEN(a & mask)) {
+ PROF_EVENT(221, "helperc_LOADV4-slow1");
+ return (UWord)mc_LOADVn_slow( aA, 4, False/*littleendian*/ );
+ }
+
+ UWord sec_no =3D (UWord)(a >> 16);
+
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAPS);
+# endif
+
+ SecMap* sm =3D primary_map[sec_no];
+ UWord v_off =3D a & 0xFFFF;
+ UWord a_off =3D v_off >> 3;
+ UWord abits =3D (UWord)(sm->abits[a_off]);
+ abits >>=3D (a & 4);
+ abits &=3D 15;
+ if (EXPECTED_TAKEN(abits =3D=3D VGM_NIBBLE_VALID)) {
+ /* Handle common case quickly: a is suitably aligned, is mapped,
+ and is addressible. */
+ return (UWord)(
+ 0xFFFFFFFFULL
+ & ((UInt*)(sm->vbyte))[ v_off >> 2 ]
+ );
+ } else {
+ /* Slow but general case. */
+ PROF_EVENT(222, "helperc_LOADV4-slow2");
+ return (UWord)mc_LOADVn_slow( a, 4, False/*littleendian*/ );
+ }
+
+# endif
}
=20
+
VGA_REGPARM(2)
-void MC_(helperc_STOREV4) ( Addr a, UWord vbytes )
+void MC_(helperc_STOREV4) ( Addr aA, UWord vbytes )
{
+ PROF_EVENT(230, "helperc_STOREV4");
+
+# if VG_DEBUG_MEMORY >=3D 2
mc_STOREVn_slow( a, 4, (ULong)vbytes, False/*littleendian*/ );
-//zz # ifdef VG_DEBUG_MEMORY
-//zz mc_wr_V4_SLOWLY(a, vbytes);
-//zz # else
-//zz UInt sec_no =3D rotateRight16(a) & 0x3FFFF;
-//zz SecMap* sm =3D primary_map[sec_no];
-//zz UInt a_off =3D (SM_OFF(a)) >> 3;
-//zz UChar abits =3D sm->abits[a_off];
-//zz abits >>=3D (a & 4);
-//zz abits &=3D 15;
-//zz PROF_EVENT(61);
-//zz if (!IS_DISTINGUISHED_SM(sm) && abits =3D=3D VGM_NIBBLE_VALID) {
-//zz /* Handle common case quickly: a is suitably aligned, is mapp=
ed,
-//zz and is addressible. */
-//zz UInt v_off =3D SM_OFF(a);
-//zz ((UInt*)(sm->vbyte))[ v_off >> 2 ] =3D vbytes;
-//zz } else {
-//zz /* Slow but general case. */
-//zz mc_wr_V4_SLOWLY(a, vbytes);
-//zz }
-//zz # endif
+# else
+
+ const UWord mask =3D ~((0x10000-4) | ((N_PRIMARY_MAPS-1) << 16));
+ UWord a =3D (UWord)aA;
+
+ /* If any part of 'a' indicated by the mask is 1, either 'a' is not
+ naturally aligned, or 'a' exceeds the range covered by the
+ primary map. Either way we defer to the slow-path case. */
+ if (EXPECTED_NOT_TAKEN(a & mask)) {
+ PROF_EVENT(231, "helperc_STOREV4-slow1");
+ mc_STOREVn_slow( aA, 4, (ULong)vbytes, False/*littleendian*/ );
+ return;
+ }
+
+ UWord sec_no =3D (UWord)(a >> 16);
+
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAPS);
+# endif
+
+ SecMap* sm =3D primary_map[sec_no];
+ UWord v_off =3D a & 0xFFFF;
+ UWord a_off =3D v_off >> 3;
+ UWord abits =3D (UWord)(sm->abits[a_off]);
+ abits >>=3D (a & 4);
+ abits &=3D 15;
+ if (EXPECTED_TAKEN(!is_distinguished_sm(sm)=20
+ && abits =3D=3D VGM_NIBBLE_VALID)) {
+ /* Handle common case quickly: a is suitably aligned, is mapped,
+ and is addressible. */
+ ((UInt*)(sm->vbyte))[ v_off >> 2 ] =3D (UInt)vbytes;
+ } else {
+ /* Slow but general case. */
+ PROF_EVENT(232, "helperc_STOREV4-slow2");
+ mc_STOREVn_slow( aA, 4, (ULong)vbytes, False/*littleendian*/ );
+ }
+# endif
}
=20
/* ------------------------ Size =3D 2 ------------------------ */
=20
VGA_REGPARM(1)
-UWord MC_(helperc_LOADV2) ( Addr a )
+UWord MC_(helperc_LOADV2) ( Addr aA )
{
- return (UWord)mc_LOADVn_slow( a, 2, False/*littleendian*/ );
-//zz # ifdef VG_DEBUG_MEMORY
-//zz return mc_rd_V2_SLOWLY(a);
-//zz # else
-//zz UInt sec_no =3D rotateRight16(a) & 0x1FFFF;
-//zz SecMap* sm =3D primary_map[sec_no];
-//zz UInt a_off =3D (SM_OFF(a)) >> 3;
-//zz PROF_EVENT(62);
-//zz if (sm->abits[a_off] =3D=3D VGM_BYTE_VALID) {
-//zz /* Handle common case quickly. */
-//zz UInt v_off =3D SM_OFF(a);
-//zz return 0xFFFF0000=20
-//zz | =20
-//zz (UInt)( ((UShort*)(sm->vbyte))[ v_off >> 1 ] );
-//zz } else {
-//zz /* Slow but general case. */
-//zz return mc_rd_V2_SLOWLY(a);
-//zz }
-//zz # endif
+ PROF_EVENT(240, "helperc_LOADV2");
+
+# if VG_DEBUG_MEMORY >=3D 2
+ return (UWord)mc_LOADVn_slow( aA, 2, False/*littleendian*/ );
+# else
+
+ const UWord mask =3D ~((0x10000-2) | ((N_PRIMARY_MAPS-1) << 16));
+ UWord a =3D (UWord)aA;
+
+ /* If any part of 'a' indicated by the mask is 1, either 'a' is not
+ naturally aligned, or 'a' exceeds the range covered by the
+ primary map. Either way we defer to the slow-path case. */
+ if (EXPECTED_NOT_TAKEN(a & mask)) {
+ PROF_EVENT(241, "helperc_LOADV2-slow1");
+ return (UWord)mc_LOADVn_slow( aA, 2, False/*littleendian*/ );
+ }
+
+ UWord sec_no =3D (UWord)(a >> 16);
+
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAPS);
+# endif
+
+ SecMap* sm =3D primary_map[sec_no];
+ UWord v_off =3D a & 0xFFFF;
+ UWord a_off =3D v_off >> 3;
+ UWord abits =3D (UWord)(sm->abits[a_off]);
+
+ if (EXPECTED_TAKEN(abits =3D=3D VGM_BYTE_VALID)) {
+ /* Handle common case quickly: a is mapped, and the entire
+ word32 it lives in is addressible. */
+ return (~(UWord)0xFFFF)
+ |
+ (UWord)( ((UShort*)(sm->vbyte))[ v_off >> 1 ] );
+ } else {
+ /* Slow but general case. */
+ PROF_EVENT(242, "helperc_LOADV2-slow2");
+ return (UWord)mc_LOADVn_slow( aA, 2, False/*littleendian*/ );
+ }
+
+# endif
}
=20
VGA_REGPARM(2)
void MC_(helperc_STOREV2) ( Addr a, UWord vbytes )
{
+ PROF_EVENT(250, "helperc_STOREV2");
mc_STOREVn_slow( a, 2, (ULong)vbytes, False/*littleendian*/ );
//zz # ifdef VG_DEBUG_MEMORY
//zz mc_wr_V2_SLOWLY(a, vbytes);
@@ -1451,49 +1536,91 @@
/* ------------------------ Size =3D 1 ------------------------ */
=20
VGA_REGPARM(1)
-UWord MC_(helperc_LOADV1) ( Addr a )
+UWord MC_(helperc_LOADV1) ( Addr aA )
{
+ PROF_EVENT(260, "helperc_LOADV1");
+
+# if VG_DEBUG_MEMORY >=3D 2
return (UWord)mc_LOADVn_slow( a, 1, False/*littleendian*/ );
-//zz # ifdef VG_DEBUG_MEMORY
-//zz return mc_rd_V1_SLOWLY(a);
-//zz # else
-//zz UInt sec_no =3D shiftRight16(a);
-//zz SecMap* sm =3D primary_map[sec_no];
-//zz UInt a_off =3D (SM_OFF(a)) >> 3;
-//zz PROF_EVENT(64);
-//zz if (sm->abits[a_off] =3D=3D VGM_BYTE_VALID) {
-//zz /* Handle common case quickly. */
-//zz UInt v_off =3D SM_OFF(a);
-//zz return 0xFFFFFF00
-//zz |
-//zz (UInt)( ((UChar*)(sm->vbyte))[ v_off ] );
-//zz } else {
-//zz /* Slow but general case. */
-//zz return mc_rd_V1_SLOWLY(a);
-//zz }
-//zz # endif
+# else
+
+ const UWord mask =3D ~((0x10000-1) | ((N_PRIMARY_MAPS-1) << 16));
+ UWord a =3D (UWord)aA;
+
+ /* If any part of 'a' indicated by the mask is 1, it means 'a'
+ exceeds the range covered by the primary map. In which case we
+ defer to the slow-path case. */
+ if (EXPECTED_NOT_TAKEN(a & mask)) {
+ PROF_EVENT(261, "helperc_LOADV1-slow1");
+ return (UWord)mc_LOADVn_slow( aA, 1, False/*littleendian*/ );
+ }
+
+ UWord sec_no =3D (UWord)(a >> 16);
+
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAPS);
+# endif
+
+ SecMap* sm =3D primary_map[sec_no];
+ UWord v_off =3D a & 0xFFFF;
+ UWord a_off =3D v_off >> 3;
+ UWord abits =3D 0xFF & (UWord)(sm->abits[a_off]);
+ if (EXPECTED_TAKEN(abits =3D=3D VGM_BYTE_VALID)) {
+ /* Handle common case quickly: a is mapped, and the entire
+ word32 it lives in is addressible. */
+ return (~(UWord)0xFF)
+ |
+ (UWord)( ((UChar*)(sm->vbyte))[ v_off ] );
+ } else {
+ /* Slow but general case. */
+ PROF_EVENT(262, "helperc_LOADV1-slow2");
+ return (UWord)mc_LOADVn_slow( aA, 1, False/*littleendian*/ );
+ }
+# endif
}
=20
+
VGA_REGPARM(2)
-void MC_(helperc_STOREV1) ( Addr a, UWord vbytes )
+void MC_(helperc_STOREV1) ( Addr aA, UWord vbyte )
{
- mc_STOREVn_slow( a, 1, (ULong)vbytes, False/*littleendian*/ );
-//zz # ifdef VG_DEBUG_MEMORY
-//zz mc_wr_V1_SLOWLY(a, vbytes);
-//zz # else
-//zz UInt sec_no =3D shiftRight16(a);
-//zz SecMap* sm =3D primary_map[sec_no];
-//zz UInt a_off =3D (SM_OFF(a)) >> 3;
-//zz PROF_EVENT(65);
-//zz if (!IS_DISTINGUISHED_SM(sm) && sm->abits[a_off] =3D=3D VGM_BYTE=
_VALID) {
-//zz /* Handle common case quickly. */
-//zz UInt v_off =3D SM_OFF(a);
-//zz ((UChar*)(sm->vbyte))[ v_off ] =3D vbytes & 0x000000FF;
-//zz } else {
-//zz /* Slow but general case. */
-//zz mc_wr_V1_SLOWLY(a, vbytes);
-//zz }
-//zz # endif
+ PROF_EVENT(270, "helperc_STOREV1");
+
+# if VG_DEBUG_MEMORY >=3D 2
+ mc_STOREVn_slow( aA, 1, (ULong)vbyte, False/*littleendian*/ );
+# else
+
+ const UWord mask =3D ~((0x10000-1) | ((N_PRIMARY_MAPS-1) << 16));
+ UWord a =3D (UWord)aA;
+ /* If any part of 'a' indicated by the mask is 1, it means 'a'
+ exceeds the range covered by the primary map. In which case we
+ defer to the slow-path case. */
+ if (EXPECTED_NOT_TAKEN(a & mask)) {
+ PROF_EVENT(271, "helperc_STOREV1-slow1");
+ mc_STOREVn_slow( aA, 1, (ULong)vbyte, False/*littleendian*/ );
+ return;
+ }
+
+ UWord sec_no =3D (UWord)(a >> 16);
+
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAPS);
+# endif
+
+ SecMap* sm =3D primary_map[sec_no];
+ UWord v_off =3D a & 0xFFFF;
+ UWord a_off =3D v_off >> 3;
+ UWord abits =3D 0xFF & (UWord)(sm->abits[a_off]);
+ if (EXPECTED_TAKEN(!is_distinguished_sm(sm)=20
+ && abits =3D=3D VGM_BYTE_VALID)) {
+ /* Handle common case quickly: a is mapped, the entire word32 it
+ lives in is addressible. */
+ ((UChar*)(sm->vbyte))[ v_off ] =3D (UChar)vbyte;
+ } else {
+ PROF_EVENT(272, "helperc_STOREV1-slow2");
+ mc_STOREVn_slow( aA, 1, (ULong)vbyte, False/*littleendian*/ );
+ }
+
+# endif
}
=20
=20
@@ -1958,6 +2085,7 @@
Bool TL_(cheap_sanity_check) ( void )
{
/* nothing useful we can rapidly check */
+ PROF_EVENT(490, "cheap_sanity_check");
return True;
}
=20
@@ -1966,6 +2094,8 @@
Int i;
SecMap* sm;
=20
+ PROF_EVENT(491, "expensive_sanity_check");
+
/* Check the 3 distinguished SMs. */
=20
/* Check A invalid, V invalid. */
@@ -2395,6 +2525,8 @@
=20
init_shadow_memory();
MAC_(common_pre_clo_init)();
+
+ tl_assert( TL_(expensive_sanity_check)() );
}
=20
void TL_(post_clo_init) ( void )
|
|
From: Bryan O'S. <bo...@se...> - 2005-04-21 16:54:44
|
On Wed, 2005-04-20 at 22:41 -0500, Nicholas Nethercote wrote: > Valgrind's not really set up for mapping addresses to variables. The > meaning of "variable" is tricky when you're looking at binary code -- a > variable may be kept in memory, or the compiler could have put it into a > register, or a combination of the two. This kind of information is at least exposed, in principle, using DWARF location lists. Recent versions of gdb understand them, and recent versions of gcc emit them, so it's possible to reconstruct something like a "long long" properly, when part of it is in a register and part is in memory. I'm not suggesting that valgrind should care about this (though 'twould be nice), just noting that the information is there, at least when the stars are aligned appropriately. <b |
|
From: Josef W. <Jos...@gm...> - 2005-04-21 15:52:37
|
On Thursday 21 April 2005 15:24, Nicholas Nethercote wrote: > On Thu, 21 Apr 2005, Rex Walburn wrote: > > My aim is that I want to know which variables have been accessed and > > written to or modified and how many times in a particular area of the > > ... > "variable"? What about compound structures like arrays and struct -- are > they a single variable or do you consider the individual elements as > variables? What about stack vs. static vs. heap-allocated variables? > Etc. One other problem is the amount of statistics data produced if there are many instances of data of same type. It probably makes sense to relate to data types. > I see. AIUI the symbol table handles code addresses, eg. function names, > but not variable names. Variable names are in the debugging information. Static data objects are also in the symbol table. See manual page of "nm" for symbol types. These are usually skipped in Valgrinds symbol reader, unless VG_(needs_data_syms)() is called. The type information of symbols will be found in the debug info. IMHO there should be a hook for tools to be able to collect data symbol information [This was the crappy patch I send some time ago ;-) ]. Calling VG_(describe_addr)() at every memory access is probably way to slow. Josef > Local variables on the stack are going to be tricky to deal with, since > you'll have to identify when you're entering/exiting functions, which is > harder than it first seems. > > > What did you mean by source-level instrumentation ? > > A bit like the source code parsing/data flow analysis that you mentioned > -- add instrumentation to the original source code, which would require > parsing the source code, and some static analysis. Then you would run the > program and get the stats. > > N > > > ------------------------------------------------------- > This SF.Net email is sponsored by: New Crystal Reports XI. > Version 11 adds new functionality designed to reduce time involved in > creating, integrating, and deploying reporting solutions. Free runtime > info, new features, or free trial, at: > http://www.businessobjects.com/devxi/728 > _______________________________________________ > Valgrind-developers mailing list > Val...@li... > https://lists.sourceforge.net/lists/listinfo/valgrind-developers |
|
From: Craig C. <cc...@us...> - 2005-04-21 15:05:27
|
Hi, This patch applies to Paul Mackerras' latest Valgrind PPC port (http://ozlabs.org/~paulus/valgrind-2.4.0-ppc-050407.tar.bz2). The sleep() call was returning immediately with a non-zero return code when running under valgrind. I tracked this down to the sigprocmask system call erroneously returning a non-zero return code. The ppc version of the macro that the sigprocmask code was using to set its return value did not put the result into the result register. The attached patch updates this macro (SET_SYSCALL_RETVAL). Thanks, Craig -- Craig Chaney cc...@us... |
|
From: Rex W. <wa...@gm...> - 2005-04-21 13:51:57
|
On 4/21/05, Nicholas Nethercote <nj...@cs...> wrote: > I'm curious why you want to know these statistics -- Is this a profiling > exercise? Yes, I m given projects to understand legacy source code, and parallel process the slow portions if possible. This requires data to be serialized into bytes to be sent across a network. It takes a real long time to understand someone else's code if the code-base is huge. So I decided to automate it and one thing i needed was to understand data flow analysis, which data piece gets modified and used in a particular region of the code. The parsing source first and data flow analysis next is like building a compiler which is a daunting task. hence I thot that since Valgrind uses memory locations, I might be able to do something with that. >=20 > This is trickier than it may first sound... what is the definition of a > "variable"? What about compound structures like arrays and struct -- are > they a single variable or do you consider the individual elements as > variables? What about stack vs. static vs. heap-allocated variables? > Etc. Compound structures like Array and Struct I would consider as one variable itself, although they do span a larger address set. This question you have asked has got me thinking about my strategy. > I see. AIUI the symbol table handles code addresses, eg. function names, > but not variable names. Variable names are in the debugging information. > VG_(describe_addr)() in vg_symtypes.c provides some functionality for > converting code addresses to variable names. It's used by Helgrind. You > need to call VG_(needs_data_syms)() before using it. It might do > something like what you want, but I'm not certain. >=20 I will try this out.=20 > Local variables on the stack are going to be tricky to deal with, since > you'll have to identify when you're entering/exiting functions, which is > harder than it first seems. Yes they will be tricky, but that will be the next step. Let me try mapping an address to a symbol or variable first and see if it works. What does Redux actually do ? I tried using it but it seg-faulted and I did not try debugging it. Thanks. Rex. |
|
From: Nicholas N. <nj...@cs...> - 2005-04-21 13:25:02
|
On Thu, 21 Apr 2005, Rex Walburn wrote: > My aim is that I want to know which variables have been accessed and > written to or modified and how many times in a particular area of the > source code(or in the whole source code). The source code could be a > collection of 200 files. I'm curious why you want to know these statistics -- Is this a profiling exercise? This is trickier than it may first sound... what is the definition of a "variable"? What about compound structures like arrays and struct -- are they a single variable or do you consider the individual elements as variables? What about stack vs. static vs. heap-allocated variables? Etc. > One way to do that was to parse the source code and do a data flow > analysis, but that would mean I would have to write a parser for C, C++, > FORTRAN or any other language. The advantage of Valgrind is that it > works with symbols and hence it does not matter which programming > language the source code was written in. If I can map an address to > atleast an entry in the symbol table, and check with "dullard" how many > times the address was read from, written to and modified, then my > problem is almost solved. I see. AIUI the symbol table handles code addresses, eg. function names, but not variable names. Variable names are in the debugging information. VG_(describe_addr)() in vg_symtypes.c provides some functionality for converting code addresses to variable names. It's used by Helgrind. You need to call VG_(needs_data_syms)() before using it. It might do something like what you want, but I'm not certain. Local variables on the stack are going to be tricky to deal with, since you'll have to identify when you're entering/exiting functions, which is harder than it first seems. > What did you mean by source-level instrumentation ? A bit like the source code parsing/data flow analysis that you mentioned -- add instrumentation to the original source code, which would require parsing the source code, and some static analysis. Then you would run the program and get the stats. N |
|
From: Rex W. <wa...@gm...> - 2005-04-21 13:01:00
|
Hi My aim is that I want to know which variables have been accessed and written to or modified and how many times in a particular area of the source code(or in the whole source code). The source code could be a collection of 200 files. One way to do that was to parse the source code and do a data flow analysis, but that would mean I would have to write a parser for C, C++, FORTRAN or any other language. The advantage of Valgrind is that it works with symbols and hence it does not matter which programming language the source code was written in. If I can map an address to atleast an entry in the symbol table, and check with "dullard" how many times the address was read from, written to and modified, then my problem is almost solved. What did you mean by source-level instrumentation ? Thanks Rex. On 4/20/05, Nicholas Nethercote <nj...@cs...> wrote: > Valgrind's not really set up for mapping addresses to variables. The > meaning of "variable" is tricky when you're looking at binary code -- a > variable may be kept in memory, or the compiler could have put it into a > register, or a combination of the two. >=20 > Basically, variables are source-level entities. Valgrind's better at > dealing with binary/machine-level entities, such as registers and memory > locations. Would you be better off using source-level instrumentation? >=20 > If you describe what you're doing in more detail, we might be able to > give you more help. >=20 > N > |
|
From: Nicholas N. <nj...@cs...> - 2005-04-21 03:41:15
|
On Wed, 20 Apr 2005, Rex Walburn wrote: > So Dullard gives out addresses which have been read from, written to > or modified . I want to map a particular address to its corresponding > variable or symbol. Can I do that ? Could someone give me a hint as to > how I would do that. I have read vg_symtab2.c and know that a symbol > can be mapped to an address. But I think dullard works with UCode and > UCode is independent of symbols. Am I right in thinking this ? > I have been reading through the valgrind code for 2 days now and I > have read the user manual as well. My main aim is to count how many > times a particular variable is accessed (read from, written to, > modified etc.). So I started with dullard, which seems to tell me > partly what I want. > I am looking for some guidance. Valgrind's not really set up for mapping addresses to variables. The meaning of "variable" is tricky when you're looking at binary code -- a variable may be kept in memory, or the compiler could have put it into a register, or a combination of the two. Basically, variables are source-level entities. Valgrind's better at dealing with binary/machine-level entities, such as registers and memory locations. Would you be better off using source-level instrumentation? If you describe what you're doing in more detail, we might be able to give you more help. N |
|
From: <js...@ac...> - 2005-04-21 03:02:00
|
Nightly build on phoenix ( SuSE 9.1 ) started at 2005-04-21 03:50:00 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow insn_mmx: valgrind ./insn_mmx insn_mmxext: (skipping, prereq failed: ../../../tests/cputest x86-mmxext) insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 201 tests, 5 stderr failures, 0 stdout failures ================= memcheck/tests/pth_once (stderr) memcheck/tests/scalar (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/writev (stderr) corecheck/tests/fdleak_fcntl (stderr) make: *** [regtest] Error 1 |
|
From: <sv...@va...> - 2005-04-21 02:38:01
|
Author: njn Date: 2005-04-21 03:37:54 +0100 (Thu, 21 Apr 2005) New Revision: 3537 Modified: trunk/cachegrind/cg_main.c Log: Comment-only change Modified: trunk/cachegrind/cg_main.c =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/cachegrind/cg_main.c 2005-04-20 22:31:26 UTC (rev 3536) +++ trunk/cachegrind/cg_main.c 2005-04-21 02:37:54 UTC (rev 3537) @@ -1,6 +1,6 @@ =20 /*--------------------------------------------------------------------*/ -/*--- Cachegrind: every but the simulation itself. ---*/ +/*--- Cachegrind: everything but the simulation itself. ---*/ /*--- cg_main.c ---*/ /*--------------------------------------------------------------------*/ =20 |
|
From: Tom H. <to...@co...> - 2005-04-21 02:36:56
|
Nightly build on dunsmere ( athlon, Fedora Core 3 ) started at 2005-04-21 03:30:04 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 176 tests, 78 stderr failures, 4 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/errs1 (stderr) memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stderr) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/overlap (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_fork (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/scalar_vfork (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/writev (stderr) memcheck/tests/x86/fpeflags (stderr) memcheck/tests/x86/pushfpopf (stderr) memcheck/tests/x86/tronical (stderr) memcheck/tests/zeropage (stderr) none/tests/faultstatus (stderr) none/tests/selfrun (stdout) none/tests/selfrun (stderr) none/tests/x86/int (stderr) |
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From: Tom H. <th...@cy...> - 2005-04-21 02:35:59
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Nightly build on audi ( i686, Red Hat 9 ) started at 2005-04-21 03:25:02 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 175 tests, 17 stderr failures, 3 stdout failures ================= memcheck/tests/badaddrvalue (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/trivialleak (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) |
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From: Tom H. <th...@cy...> - 2005-04-21 02:26:57
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Nightly build on ginetta ( i686, Red Hat 8.0 ) started at 2005-04-21 03:20:02 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 174 tests, 18 stderr failures, 3 stdout failures ================= memcheck/tests/badaddrvalue (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/trivialleak (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) |
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From: Tom H. <to...@co...> - 2005-04-21 02:26:22
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Nightly build on dunsmere ( Fedora Core 3 ) started at 2005-04-21 03:20:04 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow insn_mmx: valgrind ./insn_mmx insn_mmxext: valgrind ./insn_mmxext insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int sh: line 1: 7791 Segmentation fault VALGRINDLIB=/tmp/valgrind.14511/valgrind/.in_place /tmp/valgrind.14511/valgrind/./coregrind/valgrind --command-line-only=yes --memcheck:leak-check=no --addrcheck:leak-check=no --tool=none ./int >int.stdout.out 2>int.stderr.out pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 207 tests, 4 stderr failures, 0 stdout failures ================= memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_supp (stderr) make: *** [regtest] Error 1 |
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From: Tom H. <th...@cy...> - 2005-04-21 02:22:45
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Nightly build on audi ( Red Hat 9 ) started at 2005-04-21 03:15:02 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow fpu_lazy_eflags: valgrind ./fpu_lazy_eflags insn_basic: valgrind ./insn_basic insn_cmov: valgrind ./insn_cmov insn_fpu: valgrind ./insn_fpu insn_mmx: valgrind ./insn_mmx insn_mmxext: valgrind ./insn_mmxext insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 206 tests, 1 stderr failure, 0 stdout failures ================= memcheck/tests/scalar (stderr) make: *** [regtest] Error 1 |
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From: Tom H. <th...@cy...> - 2005-04-21 02:22:04
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Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2005-04-21 03:15:02 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 174 tests, 22 stderr failures, 4 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/match-overrun (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) none/tests/yield (stdout) |
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From: Tom H. <th...@cy...> - 2005-04-21 02:18:40
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Nightly build on honda ( x86_64, Fedora Core 3 ) started at 2005-04-21 03:10:04 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 156 tests, 84 stderr failures, 20 stdout failures ================= memcheck/tests/addressable (stdout) memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stdout) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stdout) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/errs1 (stderr) memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stdout) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stdout) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stdout) memcheck/tests/malloc3 (stderr) memcheck/tests/manuel1 (stdout) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stdout) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stdout) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stdout) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/overlap (stdout) memcheck/tests/overlap (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stdout) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_fork (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/scalar_vfork (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/signal2 (stdout) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/threadederrno (stdout) memcheck/tests/threadederrno (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stdout) memcheck/tests/weirdioctl (stderr) memcheck/tests/writev (stderr) memcheck/tests/zeropage (stdout) memcheck/tests/zeropage (stderr) corecheck/tests/fdleak_cmsg (stderr) corecheck/tests/fdleak_creat (stderr) corecheck/tests/fdleak_dup (stderr) corecheck/tests/fdleak_dup2 (stderr) corecheck/tests/fdleak_fcntl (stderr) corecheck/tests/fdleak_ipv4 (stderr) corecheck/tests/fdleak_open (stderr) corecheck/tests/fdleak_pipe (stderr) corecheck/tests/fdleak_socketpair (stderr) massif/tests/toobig-allocs (stderr) none/tests/faultstatus (stderr) none/tests/selfrun (stdout) none/tests/selfrun (stderr) |
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From: Tom H. <th...@cy...> - 2005-04-21 02:16:44
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Nightly build on ginetta ( Red Hat 8.0 ) started at 2005-04-21 03:10:04 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow insn_cmov: valgrind ./insn_cmov insn_fpu: valgrind ./insn_fpu insn_mmx: valgrind ./insn_mmx insn_mmxext: valgrind ./insn_mmxext insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 205 tests, 3 stderr failures, 0 stdout failures ================= memcheck/tests/pth_once (stderr) memcheck/tests/scalar (stderr) memcheck/tests/threadederrno (stderr) make: *** [regtest] Error 1 |
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From: Tom H. <th...@cy...> - 2005-04-21 02:11:40
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Nightly build on alvis ( Red Hat 7.3 ) started at 2005-04-21 03:05:02 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow == 205 tests, 17 stderr failures, 0 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/distinguished-writes (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/pth_once (stderr) memcheck/tests/scalar (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/vgtest_ume (stderr) addrcheck/tests/leak-0 (stderr) addrcheck/tests/leak-cycle (stderr) addrcheck/tests/leak-regroot (stderr) addrcheck/tests/leak-tree (stderr) make: *** [regtest] Error 1 |