You can subscribe to this list here.
| 2002 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
(1) |
Oct
(122) |
Nov
(152) |
Dec
(69) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2003 |
Jan
(6) |
Feb
(25) |
Mar
(73) |
Apr
(82) |
May
(24) |
Jun
(25) |
Jul
(10) |
Aug
(11) |
Sep
(10) |
Oct
(54) |
Nov
(203) |
Dec
(182) |
| 2004 |
Jan
(307) |
Feb
(305) |
Mar
(430) |
Apr
(312) |
May
(187) |
Jun
(342) |
Jul
(487) |
Aug
(637) |
Sep
(336) |
Oct
(373) |
Nov
(441) |
Dec
(210) |
| 2005 |
Jan
(385) |
Feb
(480) |
Mar
(636) |
Apr
(544) |
May
(679) |
Jun
(625) |
Jul
(810) |
Aug
(838) |
Sep
(634) |
Oct
(521) |
Nov
(965) |
Dec
(543) |
| 2006 |
Jan
(494) |
Feb
(431) |
Mar
(546) |
Apr
(411) |
May
(406) |
Jun
(322) |
Jul
(256) |
Aug
(401) |
Sep
(345) |
Oct
(542) |
Nov
(308) |
Dec
(481) |
| 2007 |
Jan
(427) |
Feb
(326) |
Mar
(367) |
Apr
(255) |
May
(244) |
Jun
(204) |
Jul
(223) |
Aug
(231) |
Sep
(354) |
Oct
(374) |
Nov
(497) |
Dec
(362) |
| 2008 |
Jan
(322) |
Feb
(482) |
Mar
(658) |
Apr
(422) |
May
(476) |
Jun
(396) |
Jul
(455) |
Aug
(267) |
Sep
(280) |
Oct
(253) |
Nov
(232) |
Dec
(304) |
| 2009 |
Jan
(486) |
Feb
(470) |
Mar
(458) |
Apr
(423) |
May
(696) |
Jun
(461) |
Jul
(551) |
Aug
(575) |
Sep
(134) |
Oct
(110) |
Nov
(157) |
Dec
(102) |
| 2010 |
Jan
(226) |
Feb
(86) |
Mar
(147) |
Apr
(117) |
May
(107) |
Jun
(203) |
Jul
(193) |
Aug
(238) |
Sep
(300) |
Oct
(246) |
Nov
(23) |
Dec
(75) |
| 2011 |
Jan
(133) |
Feb
(195) |
Mar
(315) |
Apr
(200) |
May
(267) |
Jun
(293) |
Jul
(353) |
Aug
(237) |
Sep
(278) |
Oct
(611) |
Nov
(274) |
Dec
(260) |
| 2012 |
Jan
(303) |
Feb
(391) |
Mar
(417) |
Apr
(441) |
May
(488) |
Jun
(655) |
Jul
(590) |
Aug
(610) |
Sep
(526) |
Oct
(478) |
Nov
(359) |
Dec
(372) |
| 2013 |
Jan
(467) |
Feb
(226) |
Mar
(391) |
Apr
(281) |
May
(299) |
Jun
(252) |
Jul
(311) |
Aug
(352) |
Sep
(481) |
Oct
(571) |
Nov
(222) |
Dec
(231) |
| 2014 |
Jan
(185) |
Feb
(329) |
Mar
(245) |
Apr
(238) |
May
(281) |
Jun
(399) |
Jul
(382) |
Aug
(500) |
Sep
(579) |
Oct
(435) |
Nov
(487) |
Dec
(256) |
| 2015 |
Jan
(338) |
Feb
(357) |
Mar
(330) |
Apr
(294) |
May
(191) |
Jun
(108) |
Jul
(142) |
Aug
(261) |
Sep
(190) |
Oct
(54) |
Nov
(83) |
Dec
(22) |
| 2016 |
Jan
(49) |
Feb
(89) |
Mar
(33) |
Apr
(50) |
May
(27) |
Jun
(34) |
Jul
(53) |
Aug
(53) |
Sep
(98) |
Oct
(206) |
Nov
(93) |
Dec
(53) |
| 2017 |
Jan
(65) |
Feb
(82) |
Mar
(102) |
Apr
(86) |
May
(187) |
Jun
(67) |
Jul
(23) |
Aug
(93) |
Sep
(65) |
Oct
(45) |
Nov
(35) |
Dec
(17) |
| 2018 |
Jan
(26) |
Feb
(35) |
Mar
(38) |
Apr
(32) |
May
(8) |
Jun
(43) |
Jul
(27) |
Aug
(30) |
Sep
(43) |
Oct
(42) |
Nov
(38) |
Dec
(67) |
| 2019 |
Jan
(32) |
Feb
(37) |
Mar
(53) |
Apr
(64) |
May
(49) |
Jun
(18) |
Jul
(14) |
Aug
(53) |
Sep
(25) |
Oct
(30) |
Nov
(49) |
Dec
(31) |
| 2020 |
Jan
(87) |
Feb
(45) |
Mar
(37) |
Apr
(51) |
May
(99) |
Jun
(36) |
Jul
(11) |
Aug
(14) |
Sep
(20) |
Oct
(24) |
Nov
(40) |
Dec
(23) |
| 2021 |
Jan
(14) |
Feb
(53) |
Mar
(85) |
Apr
(15) |
May
(19) |
Jun
(3) |
Jul
(14) |
Aug
(1) |
Sep
(57) |
Oct
(73) |
Nov
(56) |
Dec
(22) |
| 2022 |
Jan
(3) |
Feb
(22) |
Mar
(6) |
Apr
(55) |
May
(46) |
Jun
(39) |
Jul
(15) |
Aug
(9) |
Sep
(11) |
Oct
(34) |
Nov
(20) |
Dec
(36) |
| 2023 |
Jan
(79) |
Feb
(41) |
Mar
(99) |
Apr
(169) |
May
(48) |
Jun
(16) |
Jul
(16) |
Aug
(57) |
Sep
(19) |
Oct
|
Nov
|
Dec
|
| S | M | T | W | T | F | S |
|---|---|---|---|---|---|---|
|
|
|
1
|
2
(2) |
3
|
4
|
5
|
|
6
|
7
(1) |
8
(2) |
9
(1) |
10
(2) |
11
(2) |
12
(1) |
|
13
|
14
(2) |
15
|
16
(2) |
17
(2) |
18
(3) |
19
(1) |
|
20
(1) |
21
|
22
|
23
|
24
|
25
|
26
|
|
27
|
28
|
|
|
|
|
|
|
From: will s. <wil...@vn...> - 2022-02-14 23:48:04
|
On Fri, 2022-02-11 at 17:02 -0800, Carl Love wrote:
> Julian:
>
> Here is the patch to remove the scv instruction testing that is
> generating the dmesg on systems that do not support scv.
>
> Per our discussion, the HWCAPS2 string is parsed to determine if the
> host supports the scv instruction. The result is recorded in the new
> VexArchInfo struct argument ppc_scv_supported.
>
> Also, the missing check for scv support has been added to the
> instruction parsing in disInstr_PPC_WRK() to ensure the host supports
> scv before generating the scv instruction Iop.
>
> The changes in the patch are all within Power specific code with the
> execption of adding ppc_scv_supported to VexArchInfo.
>
> I have done manual testing of the patch on an Power 10 system that
> supports scv and on a Power 8 system that does not support to verify
> the flag allow_scv in disInstr_PPC_WRK() is set correctly. I also
> verified that attempting to parse an scv instruction on a system that
> does not support scv prints the warning that Vagrind attempted to
> parse
> and scv instruction on a system that does not support scv and exits
> with the message "disInstr(ppc): unhandled instruction".
>
> The regression testsuite has also been run on both systems. No new
> regession failures occurred.
>
> Please let me know if the patch is OK to commit. Thanks for your
> help
> on the patch.
>
> Carl
>
> -----------------------------------------------------------
> Powerpc: Fix checking for scv support, add check to scv instruction
> parsing.
>
> The check for the scv instruction in coregrind/m_machine.c issues an
> scv
> instruction and uses sigill to determine if the instruction is
> supported.
> Issuing scv on systems that don't support scv, i.e. scv support is
> not in
> HWCAPS2, generates a message in dmesg "Facility 'SCV' unavailable
> (12),
> exception".
>
> This patch removes the sigill based scv instruction test from
> coregrind/m_machine.c. The scv support is now determined by reading
> the
> HWCAPS2 in setup_client_stack(). VG_(machine_ppc64_set_scv_support)
> is
> called to set the flag ppc_scv_supported in struct VexArchInfo.
>
> The allow_scv flag is added in disInstr_PPC_WRK. The allow_scv flag
> is
> used to ensure the host has support for scv before generating the
> iops for
> the scv instruction.
> ---
> VEX/priv/guest_ppc_toIR.c | 18 +++++++++----
> VEX/pub/libvex.h | 2 ++
> coregrind/m_initimg/initimg-linux.c | 17 ++++++------
> coregrind/m_machine.c | 42 ++++++++++++++++++---------
> --
> coregrind/pub_core_machine.h | 2 ++
> 5 files changed, 51 insertions(+), 30 deletions(-)
>
> diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c
> index afe66c0be..2759a770b 100644
> --- a/VEX/priv/guest_ppc_toIR.c
> +++ b/VEX/priv/guest_ppc_toIR.c
> @@ -10755,7 +10755,8 @@ static Bool dis_trap ( UInt prefix, UInt
> theInstr,
> */
>
> static Bool dis_syslink ( UInt prefix, UInt theInstr,
> - const VexAbiInfo* abiinfo, DisResult* dres
> )
> + const VexAbiInfo* abiinfo, DisResult*
> dres,
> + Bool allow_scv )
> {
> IRType ty = mode64 ? Ity_I64 : Ity_I32;
>
> @@ -10776,9 +10777,13 @@ static Bool dis_syslink ( UInt prefix, UInt
> theInstr,
> DIP("sc\n");
> put_syscall_flag( mkU32(SC_FLAG) );
> } else if (theInstr == 0x44000001) {
> - // scv
> - DIP("scv\n");
> - put_syscall_flag( mkU32(SCV_FLAG) );
> + if (allow_scv) { // scv
> + DIP("scv\n");
> + put_syscall_flag( mkU32(SCV_FLAG) );
> + } else {
> + vex_printf("The scv instruction is not supported in
> HWCAPS2.\n");
> + return False;
> + }
Taking a step back, I have a question here.
A call to
builtin_cpu_supports('scv') should be made before an application
actually uses the scv feature.
Should Valgrind be attempting to
intercept that bad call in case an app is coded in violation of those
rules?
Thanks
-Will
|
|
From: Carl L. <ca...@so...> - 2022-02-14 17:30:40
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=ac8f8e9039b8666379e1943e3b8cc25d029ff6d4 commit ac8f8e9039b8666379e1943e3b8cc25d029ff6d4 Author: Carl Love <ce...@us...> Date: Mon Feb 14 17:26:50 2022 +0000 Powerpc: Additional expected output for memcheck/tests/ppc64/power_ISA2_05 test. Latest compiler is generating slightly different effective address. Diff: --- .../ppc64/power_ISA2_05.stdout.exp_Without_FPPO_2 | 119 +++++++++++++++++++++ 1 file changed, 119 insertions(+) diff --git a/memcheck/tests/ppc64/power_ISA2_05.stdout.exp_Without_FPPO_2 b/memcheck/tests/ppc64/power_ISA2_05.stdout.exp_Without_FPPO_2 new file mode 100644 index 0000000000..cf496a6cf8 --- /dev/null +++ b/memcheck/tests/ppc64/power_ISA2_05.stdout.exp_Without_FPPO_2 @@ -0,0 +1,119 @@ +lwarx => 0xbad0beef +ldarx => 0xbad0beef44556677 +fcpsgn sign=10.101010, base=11.111111 => 11.111111 +fcpsgn sign=10.101010, base=-0.000000 => 0.000000 +fcpsgn sign=10.101010, base=0.000000 => 0.000000 +fcpsgn sign=10.101010, base=-11.111111 => 11.111111 +fcpsgn sign=-0.000000, base=11.111111 => -11.111111 +fcpsgn sign=-0.000000, base=-0.000000 => -0.000000 +fcpsgn sign=-0.000000, base=0.000000 => -0.000000 +fcpsgn sign=-0.000000, base=-11.111111 => -11.111111 +fcpsgn sign=0.000000, base=11.111111 => 11.111111 +fcpsgn sign=0.000000, base=-0.000000 => 0.000000 +fcpsgn sign=0.000000, base=0.000000 => 0.000000 +fcpsgn sign=0.000000, base=-11.111111 => 11.111111 +fcpsgn sign=-10.101010, base=11.111111 => -11.111111 +fcpsgn sign=-10.101010, base=-0.000000 => -0.000000 +fcpsgn sign=-10.101010, base=0.000000 => -0.000000 +fcpsgn sign=-10.101010, base=-11.111111 => -11.111111 +lfiwax (-1024.000000) => FRT=(ffffffff, c4800000) +prtyd (0) => parity=0 +prtyw (0) => parity=0 +prtyd (1) => parity=1 +prtyw (1) => parity=1 +prtyd (2) => parity=0 +prtyw (2) => parity=0 +prtyd (3) => parity=1 +prtyw (3) => parity=1 +prtyd (4) => parity=0 +prtyw (4) => parity=0 +prtyd (5) => parity=1 +prtyw (5) => parity=1 +prtyd (6) => parity=0 +prtyw (6) => parity=0 +prtyd (7) => parity=1 +prtyw (7) => parity=1 +prtyd (8) => parity=0 +prtyw (8) => parity=0 +prtyd (9) => parity=1 +prtyw (9) => parity=1 +prtyd (a) => parity=0 +prtyw (a) => parity=0 +prtyd (b) => parity=1 +prtyw (b) => parity=1 +prtyd (c) => parity=0 +prtyw (c) => parity=0 +prtyd (d) => parity=1 +prtyw (d) => parity=1 +prtyd (e) => parity=0 +prtyw (e) => parity=0 +prtyd (f) => parity=1 +prtyw (f) => parity=1 +prtyd (10) => parity=0 +prtyw (10) => parity=0 +prtyd (11) => parity=1 +prtyw (11) => parity=1 +prtyd (12) => parity=0 +prtyw (12) => parity=0 +prtyd (13) => parity=1 +prtyw (13) => parity=1 +prtyd (14) => parity=0 +prtyw (14) => parity=0 +prtyd (15) => parity=1 +prtyw (15) => parity=1 +prtyd (16) => parity=0 +prtyw (16) => parity=0 +prtyd (17) => parity=1 +prtyw (17) => parity=1 +prtyd (18) => parity=0 +prtyw (18) => parity=0 +prtyd (19) => parity=1 +prtyw (19) => parity=1 +prtyd (1a) => parity=0 +prtyw (1a) => parity=0 +prtyd (1b) => parity=1 +prtyw (1b) => parity=1 +prtyd (1c) => parity=0 +prtyw (1c) => parity=0 +prtyd (1d) => parity=1 +prtyw (1d) => parity=1 +prtyd (1e) => parity=0 +prtyw (1e) => parity=0 +prtyd (1f) => parity=1 +prtyw (1f) => parity=1 +prtyd (20) => parity=0 +prtyw (20) => parity=0 +prtyd (21) => parity=1 +prtyw (21) => parity=1 +prtyd (22) => parity=0 +prtyw (22) => parity=0 +prtyd (23) => parity=1 +prtyw (23) => parity=1 +prtyd (24) => parity=0 +prtyw (24) => parity=0 +prtyd (25) => parity=1 +prtyw (25) => parity=1 +prtyd (26) => parity=0 +prtyw (26) => parity=0 +prtyd (27) => parity=1 +prtyw (27) => parity=1 +prtyd (28) => parity=0 +prtyw (28) => parity=0 +prtyd (29) => parity=1 +prtyw (29) => parity=1 +prtyd (2a) => parity=0 +prtyw (2a) => parity=0 +prtyd (2b) => parity=1 +prtyw (2b) => parity=1 +prtyd (2c) => parity=0 +prtyw (2c) => parity=0 +prtyd (2d) => parity=1 +prtyw (2d) => parity=1 +prtyd (2e) => parity=0 +prtyw (2e) => parity=0 +prtyd (2f) => parity=1 +prtyw (2f) => parity=1 +prtyd (30) => parity=0 +prtyw (30) => parity=0 +prtyd (31) => parity=1 +prtyw (31) => parity=1 |