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From: Julian S. <se...@so...> - 2020-01-22 09:46:45
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=685247b67a6104b71131de6ae6b2e455786a83ad commit 685247b67a6104b71131de6ae6b2e455786a83ad Author: Julian Seward <js...@ac...> Date: Wed Jan 22 10:45:40 2020 +0100 Bug 416464 - Handle ioctl PR_CAPBSET_READ/DROP. Patch from Stefan Bruens (ste...@rw...). Diff: --- coregrind/m_syswrap/syswrap-linux.c | 6 +++++ include/vki/vki-linux.h | 45 +++++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+) diff --git a/coregrind/m_syswrap/syswrap-linux.c b/coregrind/m_syswrap/syswrap-linux.c index d04a081..bc09628 100644 --- a/coregrind/m_syswrap/syswrap-linux.c +++ b/coregrind/m_syswrap/syswrap-linux.c @@ -1524,6 +1524,12 @@ PRE(sys_prctl) PRE_REG_READ2(int, "prctl", int, option, int, mode); } break; + case VKI_PR_CAPBSET_READ: + PRE_REG_READ2(int, "prctl", int, option, int, capability); + break; + case VKI_PR_CAPBSET_DROP: + PRE_REG_READ2(int, "prctl", int, option, int, capability); + break; default: PRE_REG_READ5(long, "prctl", int, option, unsigned long, arg2, unsigned long, arg3, diff --git a/include/vki/vki-linux.h b/include/vki/vki-linux.h index 91600db..8b40b26 100644 --- a/include/vki/vki-linux.h +++ b/include/vki/vki-linux.h @@ -2607,8 +2607,53 @@ struct vki_vt_consize { #define VKI_PR_SET_SECCOMP 22 +#define VKI_PR_CAPBSET_READ 23 +#define VKI_PR_CAPBSET_DROP 24 + +#define VKI_PR_GET_TSC 25 +#define VKI_PR_SET_TSC 26 + +#define VKI_PR_GET_SECUREBITS 27 +#define VKI_PR_SET_SECUREBITS 28 + +#define VKI_PR_SET_TIMERSLACK 29 +#define VKI_PR_GET_TIMERSLACK 30 + +#define VKI_PR_TASK_PERF_EVENTS_DISABLE 31 +#define VKI_PR_TASK_PERF_EVENTS_ENABLE 32 + +#define VKI_PR_MCE_KILL 33 +#define VKI_PR_MCE_KILL_GET 34 + #define VKI_PR_SET_PTRACER 0x59616d61 +#define VKI_PR_SET_CHILD_SUBREAPER 36 +#define VKI_PR_GET_CHILD_SUBREAPER 37 + +#define VKI_PR_SET_NO_NEW_PRIVS 38 +#define VKI_PR_GET_NO_NEW_PRIVS 39 + +#define VKI_PR_GET_TID_ADDRESS 40 + +#define VKI_PR_SET_THP_DISABLE 41 +#define VKI_PR_GET_THP_DISABLE 42 + +#define VKI_PR_MPX_ENABLE_MANAGEMENT 43 +#define VKI_PR_MPX_DISABLE_MANAGEMENT 44 + +#define VKI_PR_SET_FP_MODE 45 +#define VKI_PR_GET_FP_MODE 46 + +#define VKI_PR_CAP_AMBIENT 47 + +#define VKI_PR_SVE_SET_VL 50 +#define VKI_PR_SVE_GET_VL 51 +#define VKI_PR_GET_SPECULATION_CTRL 52 +#define VKI_PR_SET_SPECULATION_CTRL 53 +#define VKI_PR_PAC_RESET_KEYS 54 +#define VKI_PR_SET_TAGGED_ADDR_CTRL 55 +#define VKI_PR_GET_TAGGED_ADDR_CTRL 56 + //---------------------------------------------------------------------- // From linux-2.6.19/include/linux/usbdevice_fs.h //---------------------------------------------------------------------- |
|
From: Julian S. <se...@so...> - 2020-01-22 09:34:05
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=3542be5bdc706b1a7d5d080ea01e81d4791e20b4 commit 3542be5bdc706b1a7d5d080ea01e81d4791e20b4 Author: Julian Seward <js...@ac...> Date: Wed Jan 22 10:32:31 2020 +0100 Bug 385386 - Assertion failed "szB >= CACHE_ENTRY_SIZE" on m_debuginfo/image.c:517. Patch from Reimar Doeffinger (kd...@re...). Diff: --- coregrind/m_debuginfo/image.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/coregrind/m_debuginfo/image.c b/coregrind/m_debuginfo/image.c index c08b978..acb0952 100644 --- a/coregrind/m_debuginfo/image.c +++ b/coregrind/m_debuginfo/image.c @@ -509,10 +509,10 @@ static UInt alloc_CEnt ( DiImage* img, SizeT szB, Bool fromC ) return entNo; } -static void realloc_CEnt ( DiImage* img, UInt entNo, SizeT szB ) +static void realloc_CEnt ( DiImage* img, UInt entNo, SizeT szB, Bool fromC ) { vg_assert(img != NULL); - vg_assert(szB >= CACHE_ENTRY_SIZE); + vg_assert(fromC || szB >= CACHE_ENTRY_SIZE); vg_assert(is_sane_CEnt("realloc_CEnt-pre", img, entNo)); img->ces[entNo] = ML_(dinfo_realloc)("di.realloc_CEnt.1", img->ces[entNo], @@ -768,7 +768,7 @@ static UChar get_slowcase ( DiImage* img, DiOffT off ) } vg_assert(i >= 0 && i < CACHE_N_ENTRIES); - realloc_CEnt(img, i, size); + realloc_CEnt(img, i, size, /*fromC?*/cslc != NULL); img->ces[i]->size = size; img->ces[i]->used = 0; if (cslc == NULL) { |
|
From: Julian S. <se...@so...> - 2020-01-22 08:32:28
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=6e0573777c487e83d5fbd2fd764b041e59784766 commit 6e0573777c487e83d5fbd2fd764b041e59784766 Author: Julian Seward <js...@ac...> Date: Wed Jan 22 09:26:43 2020 +0100 Bug 415757 - vex x86->IR: unhandled instruction bytes: 0x66 0xF 0xCE (bswapw). Implement bswapw, even though the instruction does not officially exist. Patch from Alex Henrie (ale...@gm...). Diff: --- VEX/priv/guest_x86_toIR.c | 24 +++++++++++++++--------- none/tests/x86/Makefile.am | 2 ++ none/tests/x86/bswapw.c | 31 +++++++++++++++++++++++++++++++ none/tests/x86/bswapw.stderr.exp | 0 none/tests/x86/bswapw.stdout.exp | 6 ++++++ none/tests/x86/bswapw.vgtest | 2 ++ 6 files changed, 56 insertions(+), 9 deletions(-) diff --git a/VEX/priv/guest_x86_toIR.c b/VEX/priv/guest_x86_toIR.c index 01bcc8a..5d6e6dc 100644 --- a/VEX/priv/guest_x86_toIR.c +++ b/VEX/priv/guest_x86_toIR.c @@ -14676,15 +14676,21 @@ DisResult disInstr_X86_WRK ( case 0xCD: case 0xCE: case 0xCF: /* BSWAP %edi */ - /* AFAICS from the Intel docs, this only exists at size 4. */ - if (sz != 4) goto decode_failure; - - t1 = newTemp(Ity_I32); - assign( t1, getIReg(4, opc-0xC8) ); - t2 = math_BSWAP(t1, Ity_I32); - - putIReg(4, opc-0xC8, mkexpr(t2)); - DIP("bswapl %s\n", nameIReg(4, opc-0xC8)); + /* According to the Intel and AMD docs, 16-bit BSWAP is undefined. + * However, the result of a 16-bit BSWAP is always zero in every Intel + * and AMD CPU, and some software depends on this behavior. */ + if (sz == 2) { + putIReg(2, opc-0xC8, mkU16(0)); + DIP("bswapw %s\n", nameIReg(2, opc-0xC8)); + } else if (sz == 4) { + t1 = newTemp(Ity_I32); + assign( t1, getIReg(4, opc-0xC8) ); + t2 = math_BSWAP(t1, Ity_I32); + putIReg(4, opc-0xC8, mkexpr(t2)); + DIP("bswapl %s\n", nameIReg(4, opc-0xC8)); + } else { + goto decode_failure; + } break; /* =-=-=-=-=-=-=-=-=- BT/BTS/BTR/BTC =-=-=-=-=-=-= */ diff --git a/none/tests/x86/Makefile.am b/none/tests/x86/Makefile.am index bc9615e..4086cd8 100644 --- a/none/tests/x86/Makefile.am +++ b/none/tests/x86/Makefile.am @@ -35,6 +35,7 @@ EXTRA_DIST = \ aad_aam.stdout.exp aad_aam.stderr.exp aad_aam.vgtest \ badseg.stderr.exp badseg.stdout.exp badseg.stdout.exp-solaris \ badseg.vgtest \ + bswapw.stderr.exp bswapw.stdout.exp bswapw.vgtest \ bt_everything.stderr.exp bt_everything.stdout.exp bt_everything.vgtest \ bt_literal.stderr.exp bt_literal.stdout.exp bt_literal.vgtest \ bug125959-x86.stderr.exp bug125959-x86.stdout.exp bug125959-x86.vgtest \ @@ -85,6 +86,7 @@ check_PROGRAMS = \ aad_aam \ allexec \ badseg \ + bswapw \ bt_everything \ bt_literal \ bug125959-x86 \ diff --git a/none/tests/x86/bswapw.c b/none/tests/x86/bswapw.c new file mode 100644 index 0000000..adb0bf6 --- /dev/null +++ b/none/tests/x86/bswapw.c @@ -0,0 +1,31 @@ + +#include <stdio.h> + +typedef unsigned int UInt; + +int main ( void ) +{ + +#define GO16(REG,VALUE) \ + value = VALUE; \ + __asm__ __volatile__( \ + "pushl %%" REG " \n\t" \ + "movl 0(" "%0" "), %%" REG " \n\t" \ + ".byte 0x66 \n\t" "bswapl %%" REG "\n\t" \ + "movl %%" REG ", 0(" "%0" ") \n\t" \ + "popl %%" REG "\n" \ + : : "r" (&value) : REG, "memory", "cc" \ + ); \ + printf("0x%08x\n", value) + + UInt value; + GO16("eax", 0x12345678); + GO16("ebx", 0x23456789); + GO16("ecx", 0x3456789a); + GO16("edx", 0x456789ab); + GO16("esi", 0x56789abc); + GO16("edi", 0x6789abcd); + //GO16("ebp", 0x789abcde); // The compiler complains + + return 0; +} diff --git a/none/tests/x86/bswapw.stderr.exp b/none/tests/x86/bswapw.stderr.exp new file mode 100644 index 0000000..e69de29 diff --git a/none/tests/x86/bswapw.stdout.exp b/none/tests/x86/bswapw.stdout.exp new file mode 100644 index 0000000..a59b9a0 --- /dev/null +++ b/none/tests/x86/bswapw.stdout.exp @@ -0,0 +1,6 @@ +0x12340000 +0x23450000 +0x34560000 +0x45670000 +0x56780000 +0x67890000 diff --git a/none/tests/x86/bswapw.vgtest b/none/tests/x86/bswapw.vgtest new file mode 100644 index 0000000..0d2d920 --- /dev/null +++ b/none/tests/x86/bswapw.vgtest @@ -0,0 +1,2 @@ +prog: bswapw +vgopts: -q |
|
From: Paul F. <pj...@wa...> - 2020-01-22 08:15:40
|
> On 19 Jan 2020, at 16:04, John Reiser <jr...@bi...> wrote: > >> ==== SB 2822 (evchecks 301498) [tid 1] 0x1005f5ecb __pthread_init+898 /usr/lib/system/libsystem_pthread.dylib+0xecb >> 0x1005F5ECB: call 0x1005FD7A6 >> 0x1005FD7A6: leaq 2759(%rip), %rcx >> 0x1005FD7AD: xorl %eax,%eax >> 0x1005FD7AF: movq %rcx,11002(%rip) >> 0x1005FD7B6: movq %rax,11043(%rip) >> 0x1005FD7BD: ud2 >> ==79936== valgrind: Unrecognised instruction at address 0x1005fd7bd. >> ==80006== at 0x1005FD7BD: __pthread_init.cold.2 (in /usr/lib/system/libsystem_pthread.dylib) > > The pthread library has detected an impossible situation regarding system calls, > and this is the calling sequence to report the fatal error to MacOS. > The bad emulation happened some time ago. > > See https://bugs.kde.org/show_bug.cgi?id=383723#c23 of 2.5 years ago where a similar ud2 > was found to result from an incomplete emulation of kevent_qos syscall. Hmm. In this case I don’t think that the open source Darwin code is going to help much. Perhaps now macOS is doing some chroot shenanigans, like iOS? A+ Paul |
|
From: Julian S. <se...@so...> - 2020-01-22 08:09:28
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=95a44677c188733b8c6fce8595defff9fd2e03e5 commit 95a44677c188733b8c6fce8595defff9fd2e03e5 Author: Julian Seward <js...@ac...> Date: Wed Jan 22 09:08:54 2020 +0100 Update bug lists. Diff: --- NEWS | 1 + docs/internals/3_15_BUGSTATUS.txt | 32 +++++++++++++++++++++++++++----- 2 files changed, 28 insertions(+), 5 deletions(-) diff --git a/NEWS b/NEWS index dedbfb6..b9973bc 100644 --- a/NEWS +++ b/NEWS @@ -86,6 +86,7 @@ where XXXXXX is the bug number as listed below. 409141 Valgrind hangs when SIGKILLed 409206 Support for Linux PPS and PTP ioctls 409367 exit_group() after signal to thread waiting in futex() causes hangs +409429 amd64: recognize 'cmpeq' variants as a dependency breaking idiom 409780 References to non-existent configure.in 410556 Add support for BLKIO{MIN,OPT} and BLKALIGNOFF ioctls 410599 Non-deterministic behaviour of pth_self_kill_15_other test diff --git a/docs/internals/3_15_BUGSTATUS.txt b/docs/internals/3_15_BUGSTATUS.txt index 778053f..0716435 100644 --- a/docs/internals/3_15_BUGSTATUS.txt +++ b/docs/internals/3_15_BUGSTATUS.txt @@ -36,6 +36,12 @@ of 3.15.0. It doesn't carry over bugs from earlier versions. 415621 epoll_ctl reports for uninitialized padding * maybe an inaccurate wrapper; may be easy to fix? +416285 Use prlimit64 in VG_(getrlimit) and VG_(setrlimit) + * HOST-SIDE syscall; may become important + +416464 Fix false reports for uninitialized memory for PR_CAPBSET_READ/DROP + * Has patch; should land + === KernelInterface/OS X =============================================== 407933 VgTs_Runnable syscall mach:50 (lwpid 771) @@ -52,6 +58,8 @@ of 3.15.0. It doesn't carry over bugs from earlier versions. 413410 Mac Os 10.15 valgrind 3.15.0 (== 412745 ?) +416436 Unrecognised instruction in (__pthread_init.cold.2) macOS 10.15 + === MPI ================================================================ 413251 Compilation error using GCC 7.4.0 & OpenMPI 4.0.2 @@ -86,10 +94,6 @@ of 3.15.0. It doesn't carry over bugs from earlier versions. 407589 Add support for C11 aligned_alloc() and GNU reallocarray() * Missing allocation intercepts? -409429 False positives at unexpected location due to failure to recognize - cmpeq as a dependency breaking idiom (fixed in grail? check this) - * In grail: 96de5118f5332ae145912ebe91b8fa143df74b8d - (but not merged from it; needs doing separately) 415141 Possible leak with calling __libc_freeres before all thread's tid_addresses are cleared @@ -148,7 +152,14 @@ of 3.15.0. It doesn't carry over bugs from earlier versions. === VEX/other ========================================================== === VEX/ppc ============================================================ === VEX/s390x ========================================================== + +416301 s390x: "compare and signal" not supported + * Potentially important (??) + === VEX/x86 ============================================================ + +415757 vex x86->IR: 0x66 0xF 0xCE 0x4F (bswapw) + === zz_other =========================================================== 414278 VG_(memcpy) used for overlapping moves @@ -180,7 +191,10 @@ of 3.15.0. It doesn't carry over bugs from earlier versions. === zz_other/x86 ======================================================= --- Sat 28 Dec 10:39:06 CET 2019 +-- Wed 22 Jan 08:57:09 CET 2020 + + +================== Extras (not new) 319393 bad rounding in cvtsi2ss instruction @@ -190,3 +204,11 @@ apply included fixes for Xen 4.6/4.7/4.8/4.9/4.10/4.11/4.12 390553 ? Can we get rid of exp-sgcheck now? Very large executable support -- adjust tool load address? Status? + +statx hacks for Rust, Ryan Cummins, dev@, 21 Dec 2019 ? + +port the ZF-after-BTx fixes over to x86? + +Bug 385386 - Assertion failed "szB >= CACHE_ENTRY_SIZE" on +m_debuginfo/image.c:517 +There is a patch which seems plausible. Check and apply. |
|
From: John R. <jr...@bi...> - 2020-01-19 16:16:22
|
> ==== SB 2822 (evchecks 301498) [tid 1] 0x1005f5ecb __pthread_init+898 /usr/lib/system/libsystem_pthread.dylib+0xecb > 0x1005F5ECB: call 0x1005FD7A6 > 0x1005FD7A6: leaq 2759(%rip), %rcx > 0x1005FD7AD: xorl %eax,%eax > 0x1005FD7AF: movq %rcx,11002(%rip) > 0x1005FD7B6: movq %rax,11043(%rip) > 0x1005FD7BD: ud2 > > ==79936== valgrind: Unrecognised instruction at address 0x1005fd7bd. > ==80006== at 0x1005FD7BD: __pthread_init.cold.2 (in /usr/lib/system/libsystem_pthread.dylib) The pthread library has detected an impossible situation regarding system calls, and this is the calling sequence to report the fatal error to MacOS. The bad emulation happened some time ago. See https://bugs.kde.org/show_bug.cgi?id=383723#c23 of 2.5 years ago where a similar ud2 was found to result from an incomplete emulation of kevent_qos syscall. |
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From: Paul F. <pj...@wa...> - 2020-01-19 13:41:45
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> On 19 Jan 2020, at 00:31, Rhys Kidd <rhy...@gm...> wrote: > > Thanks Paul. > > Will need a big more debugging on a macOS 10.15 Catalina system to get to the bottom of this one. I've created a bug report from your debug log to track this (https://bugs.kde.org/show_bug.cgi?id=416436 <https://bugs.kde.org/show_bug.cgi?id=416436>) and marked it under our meta bug for all known macOS 10.15 issues. > > Sometimes these class of reports about illegal instructions actually have nothing to do with missing x86_64 ISA support, instead there's a system call which valgrind isn't hooking properly on new Mach kernel (the macOS kernel). I’ve debugged a bit more and it looks like a ud2 opcode is causing the error ==== SB 2822 (evchecks 301498) [tid 1] 0x1005f5ecb __pthread_init+898 /usr/lib/system/libsystem_pthread.dylib+0xecb 0x1005F5ECB: call 0x1005FD7A6 0x1005FD7A6: leaq 2759(%rip), %rcx 0x1005FD7AD: xorl %eax,%eax 0x1005FD7AF: movq %rcx,11002(%rip) 0x1005FD7B6: movq %rax,11043(%rip) 0x1005FD7BD: ud2 ==79936== valgrind: Unrecognised instruction at address 0x1005fd7bd. ==80006== at 0x1005FD7BD: __pthread_init.cold.2 (in /usr/lib/system/libsystem_pthread.dylib) Looking a bit at the disassembly of libsystem_pthread.dylib, pthread_init function 0000000000000db2 movq 0xa267(%rip), %rax ## literal pool symbol address: __os_xbs_chrooted 0000000000000db9 cmpb $0x0, (%rax) 0000000000000dbc je 0xecb This seems to be the path that gets taken (0xecb is the address of __pthread_init.cold.2) I can’t find much on _os_xbs_chrooted. A+ Paul |
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From: Rhys K. <rhy...@gm...> - 2020-01-18 23:31:47
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Thanks Paul. Will need a big more debugging on a macOS 10.15 Catalina system to get to the bottom of this one. I've created a bug report from your debug log to track this (https://bugs.kde.org/show_bug.cgi?id=416436) and marked it under our meta bug for all known macOS 10.15 issues. Sometimes these class of reports about illegal instructions actually have nothing to do with missing x86_64 ISA support, instead there's a system call which valgrind isn't hooking properly on new Mach kernel (the macOS kernel). Regards, Rhys On Wed, 15 Jan 2020 at 23:59, Paul Floyd <pj...@wa...> wrote: > > > On 15 Jan 2020, at 13:47, Rhys Kidd <rhy...@gm...> wrote: > > > Try running with ./valgrind -v <$program> and provide what is output. > > >> >> > > Hi Rhys > > I’ve attached the output. This is with the latest Xcode and macOS versions. > > > _______________________________________________ > Valgrind-developers mailing list > Val...@li... > https://lists.sourceforge.net/lists/listinfo/valgrind-developers > |
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From: Mark W. <ma...@so...> - 2020-01-18 01:14:21
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=f12114be2391d8d00de32ca14bb24b9b916dcaea commit f12114be2391d8d00de32ca14bb24b9b916dcaea Author: Mark Wielaard <ma...@kl...> Date: Sat Jan 18 02:09:49 2020 +0100 Add bugs 416239 and 416387 to NEWS. commit 58fc707804b9c1db66124737f5dcbb2715b230e1 416239 valgrind crashes when handling clock_adjtime commit 7d4071fe8530fa1c217bb775b0e19fd97d871502 416387 finit_module and bpf syscalls are unhandled on arm64 Diff: --- NEWS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/NEWS b/NEWS index a1c1b06..dedbfb6 100644 --- a/NEWS +++ b/NEWS @@ -97,7 +97,9 @@ where XXXXXX is the bug number as listed below. 413330 avx-1 test fails on AMD EPYC 7401P 24-Core Processor 413603 callgrind_annotate/cg_annotate truncate function names at '#' 414565 Specific use case bug found in SysRes VG_(do_sys_sigprocmask) +416239 valgrind crashes when handling clock_adjtime 416286 DRD reports "conflicting load" error on std::mutex::lock() +416387 finit_module and bpf syscalls are unhandled on arm64 n-i-bz Fix minor one time leaks in dhat. n-i-bz Add --run-cxx-freeres=no in outer args to avoid inner crashes. |
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From: Mark W. <ma...@so...> - 2020-01-18 01:04:49
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=7d4071fe8530fa1c217bb775b0e19fd97d871502 commit 7d4071fe8530fa1c217bb775b0e19fd97d871502 Author: Alexandra Hajkova <aha...@re...> Date: Fri Jan 17 06:59:11 2020 -0500 arm64: hook up finit_module and bpf syscalls This fixes "WARNING: unhandled arm64-linux syscall" in delete_module01 and bpf_prog01 tests in the LTP test suite. Diff: --- coregrind/m_syswrap/syswrap-arm64-linux.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/coregrind/m_syswrap/syswrap-arm64-linux.c b/coregrind/m_syswrap/syswrap-arm64-linux.c index 91329b6..017d3a7 100644 --- a/coregrind/m_syswrap/syswrap-arm64-linux.c +++ b/coregrind/m_syswrap/syswrap-arm64-linux.c @@ -805,14 +805,14 @@ static SyscallTableEntry syscall_main_table[] = { LINXY(__NR_process_vm_readv, sys_process_vm_readv), // 270 LINX_(__NR_process_vm_writev, sys_process_vm_writev), // 271 LINX_(__NR_kcmp, sys_kcmp), // 272 - // (__NR_finit_module, sys_ni_syscall), // 273 + LINX_(__NR_finit_module, sys_finit_module), // 273 // (__NR_sched_setattr, sys_ni_syscall), // 274 // (__NR_sched_getattr, sys_ni_syscall), // 275 LINX_(__NR_renameat2, sys_renameat2), // 276 // (__NR_seccomp, sys_ni_syscall), // 277 LINXY(__NR_getrandom, sys_getrandom), // 278 LINXY(__NR_memfd_create, sys_memfd_create), // 279 - // (__NR_bpf, sys_ni_syscall) // 280 + LINXY(__NR_bpf, sys_bpf), // 280 // (__NR_execveat, sys_ni_syscall), // 281 // (__NR_userfaultfd, sys_ni_syscall), // 282 LINX_(__NR_membarrier, sys_membarrier), // 283 |
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From: Petar J. <pe...@so...> - 2020-01-17 13:21:24
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=0483f86aacd892f416dd8374a028bbdf34b40ecd commit 0483f86aacd892f416dd8374a028bbdf34b40ecd Author: Stefan Maksimovic <ste...@rt...> Date: Fri Jan 17 13:19:44 2020 +0000 mips64: fix assert in host_mips_defs.c for Malu_MADD Mark the immediate as signed for Iex_Get and Ist_Put for Ity_V128 on BE. The Malu_MADD case in emit_MIPSInst in VEX/priv/host_mips_defs.c expects a signed immediate, hence the change. This fixes an assert in host_mips_defs.c. Diff: --- VEX/priv/host_mips_isel.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/VEX/priv/host_mips_isel.c b/VEX/priv/host_mips_isel.c index 51428cf..51ac757 100644 --- a/VEX/priv/host_mips_isel.c +++ b/VEX/priv/host_mips_isel.c @@ -2851,8 +2851,9 @@ static HReg iselV128Expr_wrk(ISelEnv* env, IRExpr* e) { HReg v_dst = newVRegV(env); #if defined(_MIPSEB) HReg r_addr = newVRegI(env); + vassert(!(e->Iex.Get.offset & ~0x7FFF)); addInstr(env, MIPSInstr_Alu(mode64 ? Malu_DADD : Malu_ADD, r_addr, GuestStatePointer(mode64), - MIPSRH_Imm(False, e->Iex.Get.offset))); + MIPSRH_Imm(True, e->Iex.Get.offset))); addInstr(env, MIPSInstr_MsaMi10(MSA_LD, 0, r_addr, v_dst, MSA_B)); #else vassert(!(e->Iex.Get.offset & 7)); @@ -6974,9 +6975,10 @@ static void iselStmt(ISelEnv * env, IRStmt * stmt) vassert(has_msa); HReg v_src = iselV128Expr(env, stmt->Ist.Put.data); #if defined(_MIPSEB) + vassert(!(stmt->Ist.Put.offset & ~0x7FFF)); HReg r_addr = newVRegI(env); addInstr(env, MIPSInstr_Alu(mode64 ? Malu_DADD : Malu_ADD, r_addr, GuestStatePointer(mode64), - MIPSRH_Imm(False, stmt->Ist.Put.offset))); + MIPSRH_Imm(True, stmt->Ist.Put.offset))); addInstr(env, MIPSInstr_MsaMi10(MSA_ST, 0, r_addr, v_src, MSA_B)); #else vassert(!(stmt->Ist.Put.offset & 7)); |
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From: Petar J. <pe...@so...> - 2020-01-17 12:59:29
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=3e0e34aecdd73511c97133bdcf3ef1dfca325179 commit 3e0e34aecdd73511c97133bdcf3ef1dfca325179 Author: Stefan Maksimovic <ste...@rt...> Date: Fri Jan 17 12:58:07 2020 +0000 mips64: rework math tests to take into account allowed approximation Change the math tests to check whether the results are approximate to the expected values instead of checking for exact matches since the calculations in question are allowed to be approximate. This fixes /none/tests/mips64/test_math and /none/tests/mips64/msa_fpu on mips64r6. Diff: --- none/tests/mips32/msa_fpu.c | 441 +++++++++++++++++++++++----- none/tests/mips32/msa_fpu.stdout.exp | 512 ++++++++++++++++----------------- none/tests/mips32/test_math.cpp | 8 +- none/tests/mips32/test_math.stdout.exp | 4 +- 4 files changed, 641 insertions(+), 324 deletions(-) diff --git a/none/tests/mips32/msa_fpu.c b/none/tests/mips32/msa_fpu.c index fea8784..9a96c2a 100644 --- a/none/tests/mips32/msa_fpu.c +++ b/none/tests/mips32/msa_fpu.c @@ -1,4 +1,6 @@ #include <stdio.h> +#include <math.h> +#include <stdlib.h> unsigned long long out[2]; @@ -56,6 +58,60 @@ unsigned long long data16[] = { 0x3c66f5a5c14efc00, }; +#define EPS 0.000001 + +union { + unsigned long long i[2]; + double d[2]; + float f[4]; +} frsqrt_out, frsqrt_exp; + +unsigned withinEpsOfF(float* p_out, float* p_exp, unsigned long long* data, unsigned offset) { + unsigned pair1_nan = isnan(p_out[2]) && isnan(p_exp[0]); + unsigned pair2_nan = isnan(p_out[3]) && isnan(p_exp[1]); + unsigned pair3_nan = isnan(p_out[0]) && isnan(p_exp[2]); + unsigned pair4_nan = isnan(p_out[1]) && isnan(p_exp[3]); + unsigned pair1_sub = fpclassify(*(((float*)data) + offset/4 )) == FP_SUBNORMAL; + unsigned pair2_sub = fpclassify(*(((float*)data) + offset/4 + 1)) == FP_SUBNORMAL; + unsigned pair3_sub = fpclassify(*(((float*)data) + offset/4 + 2)) == FP_SUBNORMAL; + unsigned pair4_sub = fpclassify(*(((float*)data) + offset/4 + 3)) == FP_SUBNORMAL; + if (pair1_sub || pair2_sub || pair3_sub || pair4_sub) { + unsigned p_out2_int = *(unsigned*)&p_out[2]; + unsigned p_exp0_int = *(unsigned*)&p_exp[0]; + unsigned p_out3_int = *(unsigned*)&p_out[3]; + unsigned p_exp1_int = *(unsigned*)&p_exp[1]; + unsigned p_out0_int = *(unsigned*)&p_out[0]; + unsigned p_exp2_int = *(unsigned*)&p_exp[2]; + unsigned p_out1_int = *(unsigned*)&p_out[1]; + unsigned p_exp3_int = *(unsigned*)&p_exp[3]; + pair1_sub = abs(p_out2_int - p_exp0_int) <= 1; + pair2_sub = abs(p_out3_int - p_exp1_int) <= 1; + pair3_sub = abs(p_out0_int - p_exp2_int) <= 1; + pair4_sub = abs(p_out1_int - p_exp3_int) <= 1; + } + return (pair1_nan || pair1_sub || ((p_out[2] <= p_exp[0] + EPS) && (p_out[2] >= p_exp[0] - EPS))) && + (pair2_nan || pair2_sub || ((p_out[3] <= p_exp[1] + EPS) && (p_out[3] >= p_exp[1] - EPS))) && + (pair3_nan || pair3_sub || ((p_out[0] <= p_exp[2] + EPS) && (p_out[0] >= p_exp[2] - EPS))) && + (pair4_nan || pair4_sub || ((p_out[1] <= p_exp[3] + EPS) && (p_out[1] >= p_exp[3] - EPS))); + +} +unsigned withinEpsOfD(double* p_out, double* p_exp, unsigned long long* data, unsigned offset) { + unsigned pair1_nan = isnan(p_out[0]) && isnan(p_exp[1]); + unsigned pair2_nan = isnan(p_out[1]) && isnan(p_exp[0]); + unsigned pair1_sub = fpclassify(*(((double*)data) + offset/8 )) == FP_SUBNORMAL; + unsigned pair2_sub = fpclassify(*(((double*)data) + offset/8 + 1)) == FP_SUBNORMAL; + if (pair1_sub || pair2_sub) { + unsigned long p_out0_int = *(unsigned long*)&p_out[0]; + unsigned long p_exp1_int = *(unsigned long*)&p_exp[1]; + unsigned long p_out1_int = *(unsigned long*)&p_out[1]; + unsigned long p_exp0_int = *(unsigned long*)&p_exp[0]; + pair1_sub = labs(p_out0_int - p_exp1_int) <= 1; + pair2_sub = labs(p_out1_int - p_exp0_int) <= 1; + } + return (pair1_nan || pair1_sub || ((p_out[0] <= p_exp[1] + EPS) && (p_out[0] >= p_exp[1] - EPS))) && + (pair2_nan || pair2_sub || ((p_out[1] <= p_exp[0] + EPS) && (p_out[1] >= p_exp[0] - EPS))); +} + #define TEST_3RF(instruction, data, offset1, offset2, WD, WS, WT) \ { \ __asm__ volatile ( \ @@ -136,6 +192,61 @@ unsigned long long data16[] = { data[offset / 8 + 1], data[offset / 8], msacsr); \ } +#define TEST_2RF_FRSQRT_W(instruction, data, offset, WD, WS, \ + exp_part1, exp_part2) \ +{ \ + frsqrt_exp.i[0] = exp_part1; \ + frsqrt_exp.i[1] = exp_part2; \ + __asm__ volatile ( \ + ".set push;\n\t" \ + ".set noreorder;\n\t" \ + "ctcmsa $1, %2\n\t" \ + "move $t0, %0\n\t" \ + "ld.d $"#WD", "#offset"($t0)\n\t" \ + "xori.b $"#WD", $"#WD", 0xff\n\t" \ + "ld.d $"#WS", "#offset"($t0)\n\t" \ + instruction" $"#WD", $"#WS"\n\t" \ + "move $t0, %1\n\t" \ + "st.d $"#WD", 0($t0)\n\t" \ + "cfcmsa %2, $1\n\t" \ + ".set pop;\n\t" \ + : \ + : "r" (data), "r" (frsqrt_out.f), "r"(msacsr) \ + : "t0", "memory" \ + ); \ + if(withinEpsOfF(frsqrt_out.f, frsqrt_exp.f, data, offset)) \ + printf(instruction" $"#WD", $"#WS", msacsr=%u: PASS\n", msacsr); \ + else \ + printf(instruction" $"#WD", $"#WS", msacsr=%u: FAIL\n", msacsr); \ +} + +#define TEST_2RF_FRSQRT_D(instruction, data, offset, WD, WS, \ + exp_part1, exp_part2) \ +{ \ + frsqrt_exp.i[0] = exp_part1; \ + frsqrt_exp.i[1] = exp_part2; \ + __asm__ volatile ( \ + ".set push;\n\t" \ + ".set noreorder;\n\t" \ + "ctcmsa $1, %2\n\t" \ + "move $t0, %0\n\t" \ + "ld.d $"#WD", "#offset"($t0)\n\t" \ + "xori.b $"#WD", $"#WD", 0xff\n\t" \ + "ld.d $"#WS", "#offset"($t0)\n\t" \ + instruction" $"#WD", $"#WS"\n\t" \ + "move $t0, %1\n\t" \ + "st.d $"#WD", 0($t0)\n\t" \ + "cfcmsa %2, $1\n\t" \ + ".set pop;\n\t" \ + : \ + : "r" (data), "r" (frsqrt_out.d), "r"(msacsr) \ + : "t0", "memory" \ + ); \ + if(withinEpsOfD(frsqrt_out.d, frsqrt_exp.d, data, offset)) \ + printf(instruction" $"#WD", $"#WS", msacsr=%u: PASS\n", msacsr); \ + else \ + printf(instruction" $"#WD", $"#WS", msacsr=%u: FAIL\n", msacsr); \ +} #define TEST_MSA_FPU_REG32(WS) \ { \ @@ -10850,70 +10961,6 @@ int main(int argc, char **argv) { TEST_2RF("frcp.d", datad, 144, w29, w11); TEST_2RF("frcp.d", datad, 0, w30, w30); TEST_2RF("frcp.d", datad, 16, w31, w22); - TEST_2RF("frsqrt.w", dataf, 0, w0, w10); - TEST_2RF("frsqrt.w", dataf, 8, w1, w20); - TEST_2RF("frsqrt.w", dataf, 16, w2, w26); - TEST_2RF("frsqrt.w", dataf, 24, w3, w12); - TEST_2RF("frsqrt.w", dataf, 32, w4, w0); - TEST_2RF("frsqrt.w", dataf, 40, w5, w22); - TEST_2RF("frsqrt.w", dataf, 48, w6, w26); - TEST_2RF("frsqrt.w", dataf, 56, w7, w14); - TEST_2RF("frsqrt.w", dataf, 64, w8, w8); - TEST_2RF("frsqrt.w", dataf, 72, w9, w17); - TEST_2RF("frsqrt.w", dataf, 0, w10, w28); - TEST_2RF("frsqrt.w", dataf, 8, w11, w8); - TEST_2RF("frsqrt.w", dataf, 16, w12, w16); - TEST_2RF("frsqrt.w", dataf, 24, w13, w9); - TEST_2RF("frsqrt.w", dataf, 32, w14, w3); - TEST_2RF("frsqrt.w", dataf, 40, w15, w21); - TEST_2RF("frsqrt.w", dataf, 48, w16, w9); - TEST_2RF("frsqrt.w", dataf, 56, w17, w14); - TEST_2RF("frsqrt.w", dataf, 64, w18, w10); - TEST_2RF("frsqrt.w", dataf, 72, w19, w17); - TEST_2RF("frsqrt.w", dataf, 0, w20, w25); - TEST_2RF("frsqrt.w", dataf, 8, w21, w7); - TEST_2RF("frsqrt.w", dataf, 16, w22, w26); - TEST_2RF("frsqrt.w", dataf, 24, w23, w28); - TEST_2RF("frsqrt.w", dataf, 32, w24, w4); - TEST_2RF("frsqrt.w", dataf, 40, w25, w8); - TEST_2RF("frsqrt.w", dataf, 48, w26, w1); - TEST_2RF("frsqrt.w", dataf, 56, w27, w13); - TEST_2RF("frsqrt.w", dataf, 64, w28, w14); - TEST_2RF("frsqrt.w", dataf, 72, w29, w12); - TEST_2RF("frsqrt.w", dataf, 0, w30, w30); - TEST_2RF("frsqrt.w", dataf, 8, w31, w17); - TEST_2RF("frsqrt.d", datad, 0, w0, w2); - TEST_2RF("frsqrt.d", datad, 16, w1, w14); - TEST_2RF("frsqrt.d", datad, 32, w2, w24); - TEST_2RF("frsqrt.d", datad, 48, w3, w20); - TEST_2RF("frsqrt.d", datad, 64, w4, w25); - TEST_2RF("frsqrt.d", datad, 80, w5, w0); - TEST_2RF("frsqrt.d", datad, 96, w6, w26); - TEST_2RF("frsqrt.d", datad, 112, w7, w26); - TEST_2RF("frsqrt.d", datad, 128, w8, w8); - TEST_2RF("frsqrt.d", datad, 144, w9, w19); - TEST_2RF("frsqrt.d", datad, 0, w10, w27); - TEST_2RF("frsqrt.d", datad, 16, w11, w8); - TEST_2RF("frsqrt.d", datad, 32, w12, w2); - TEST_2RF("frsqrt.d", datad, 48, w13, w31); - TEST_2RF("frsqrt.d", datad, 64, w14, w0); - TEST_2RF("frsqrt.d", datad, 80, w15, w30); - TEST_2RF("frsqrt.d", datad, 96, w16, w5); - TEST_2RF("frsqrt.d", datad, 112, w17, w3); - TEST_2RF("frsqrt.d", datad, 128, w18, w7); - TEST_2RF("frsqrt.d", datad, 144, w19, w3); - TEST_2RF("frsqrt.d", datad, 0, w20, w30); - TEST_2RF("frsqrt.d", datad, 16, w21, w27); - TEST_2RF("frsqrt.d", datad, 32, w22, w26); - TEST_2RF("frsqrt.d", datad, 48, w23, w20); - TEST_2RF("frsqrt.d", datad, 64, w24, w7); - TEST_2RF("frsqrt.d", datad, 80, w25, w10); - TEST_2RF("frsqrt.d", datad, 96, w26, w29); - TEST_2RF("frsqrt.d", datad, 112, w27, w20); - TEST_2RF("frsqrt.d", datad, 128, w28, w6); - TEST_2RF("frsqrt.d", datad, 144, w29, w24); - TEST_2RF("frsqrt.d", datad, 0, w30, w30); - TEST_2RF("frsqrt.d", datad, 16, w31, w6); TEST_2RF("fsqrt.w", dataf, 0, w0, w17); TEST_2RF("fsqrt.w", dataf, 8, w1, w14); TEST_2RF("fsqrt.w", dataf, 16, w2, w8); @@ -11492,6 +11539,272 @@ int main(int argc, char **argv) { TEST_2RF("ffqr.d", dataf, 8, w31, w28); } + // Duplicated for each of the rounding modes + msacsr = 0; + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w0, w10, 0x7fc000007fc00000, 0x7fc000003fb504f3); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w1, w20, 0x7fc000003d1abca5, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 16, w2, w26, 0xff8000007fc00000, 0x7fc000003d1abca5); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 24, w3, w12, 0x7f8000003d44c9f8, 0xff8000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 32, w4, w0, 0x5f21e89b7fc00000, 0x7f8000003d44c9f8); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 40, w5, w22, 0x3bd77f463f741620, 0x5f21e89b7fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 48, w6, w26, 0x000000007fc00000, 0x3bd77f463f741620); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 56, w7, w14, 0x7fc000007fc00000, 0x000000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 64, w8, w8, 0x3d2aaaab3c7349e0, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 72, w9, w17, 0x3d2aaaab3d2aaaab, 0x3d2aaaab3c7349e0); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w10, w28, 0x7fc000007fc00000, 0x7fc000003fb504f3); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w11, w8, 0x7fc000003d1abca5, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 16, w12, w16, 0xff8000007fc00000, 0x7fc000003d1abca5); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 24, w13, w9, 0x7f8000003d44c9f8, 0xff8000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 32, w14, w3, 0x5f21e89b7fc00000, 0x7f8000003d44c9f8); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 40, w15, w21, 0x3bd77f463f741620, 0x5f21e89b7fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 48, w16, w9, 0x000000007fc00000, 0x3bd77f463f741620); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 56, w17, w14, 0x7fc000007fc00000, 0x000000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 64, w18, w10, 0x3d2aaaab3c7349e0, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 72, w19, w17, 0x3d2aaaab3d2aaaab, 0x3d2aaaab3c7349e0); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w20, w25, 0x7fc000007fc00000, 0x7fc000003fb504f3); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w21, w7, 0x7fc000003d1abca5, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 16, w22, w26, 0xff8000007fc00000, 0x7fc000003d1abca5); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 24, w23, w28, 0x7f8000003d44c9f8, 0xff8000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 32, w24, w4, 0x5f21e89b7fc00000, 0x7f8000003d44c9f8); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 40, w25, w8, 0x3bd77f463f741620, 0x5f21e89b7fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 48, w26, w1, 0x000000007fc00000, 0x3bd77f463f741620); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 56, w27, w13, 0x7fc000007fc00000, 0x000000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 64, w28, w14, 0x3d2aaaab3c7349e0, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 72, w29, w12, 0x3d2aaaab3d2aaaab, 0x3d2aaaab3c7349e0); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w30, w30, 0x7fc000007fc00000, 0x7fc000003fb504f3); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w31, w17, 0x7fc000003d1abca5, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w0, w2, 0x3ff6a09e667f3bcd, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w1, w14, 0x7ff8000000000000, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 32, w2, w24, 0x3fa35794ad44f3ee, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 48, w3, w20, 0x7ff8000000000000, 0xfff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 64, w4, w25, 0x3fa8993eff4a591f, 0x7ff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 80, w5, w0, 0x7ff8000000000000, 0x604a20bd700c2c3e); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 96, w6, w26, 0x3fee82c3f9d89e1b, 0x3f458a24b20e5b9e); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 112, w7, w26, 0x7ff8000000000000, 0x0000000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 128, w8, w8, 0x3f733bbfdc427cac, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 144, w9, w19, 0x3fa5555555555555, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w10, w27, 0x3ff6a09e667f3bcd, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w11, w8, 0x7ff8000000000000, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 32, w12, w2, 0x3fa35794ad44f3ee, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 48, w13, w31, 0x7ff8000000000000, 0xfff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 64, w14, w0, 0x3fa8993eff4a591f, 0x7ff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 80, w15, w30, 0x7ff8000000000000, 0x604a20bd700c2c3e); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 96, w16, w5, 0x3fee82c3f9d89e1b, 0x3f458a24b20e5b9e); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 112, w17, w3, 0x7ff8000000000000, 0x0000000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 128, w18, w7, 0x3f733bbfdc427cac, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 144, w19, w3, 0x3fa5555555555555, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w20, w30, 0x3ff6a09e667f3bcd, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w21, w27, 0x7ff8000000000000, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 32, w22, w26, 0x3fa35794ad44f3ee, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 48, w23, w20, 0x7ff8000000000000, 0xfff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 64, w24, w7, 0x3fa8993eff4a591f, 0x7ff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 80, w25, w10, 0x7ff8000000000000, 0x604a20bd700c2c3e); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 96, w26, w29, 0x3fee82c3f9d89e1b, 0x3f458a24b20e5b9e); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 112, w27, w20, 0x7ff8000000000000, 0x0000000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 128, w28, w6, 0x3f733bbfdc427cac, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 144, w29, w24, 0x3fa5555555555555, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w30, w30, 0x3ff6a09e667f3bcd, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w31, w6, 0x7ff8000000000000, 0x7ff8000000000000); + + msacsr = 1; + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w0, w10, 0x7fc000007fc00000, 0x7fc000003fb504f3); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w1, w20, 0x7fc000003d1abca5, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 16, w2, w26, 0xff8000007fc00000, 0x7fc000003d1abca5); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 24, w3, w12, 0x7f8000003d44c9f7, 0xff8000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 32, w4, w0, 0x5f21e89b7fc00000, 0x7f8000003d44c9f7); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 40, w5, w22, 0x3bd77f463f74161f, 0x5f21e89b7fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 48, w6, w26, 0x000000007fc00000, 0x3bd77f463f74161f); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 56, w7, w14, 0x7fc000007fc00000, 0x000000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 64, w8, w8, 0x3d2aaaaa3c7349df, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 72, w9, w17, 0x3d2aaaaa3d2aaaaa, 0x3d2aaaaa3c7349df); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w10, w28, 0x7fc000007fc00000, 0x7fc000003fb504f3); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w11, w8, 0x7fc000003d1abca5, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 16, w12, w16, 0xff8000007fc00000, 0x7fc000003d1abca5); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 24, w13, w9, 0x7f8000003d44c9f7, 0xff8000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 32, w14, w3, 0x5f21e89b7fc00000, 0x7f8000003d44c9f7); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 40, w15, w21, 0x3bd77f463f74161f, 0x5f21e89b7fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 48, w16, w9, 0x000000007fc00000, 0x3bd77f463f74161f); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 56, w17, w14, 0x7fc000007fc00000, 0x000000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 64, w18, w10, 0x3d2aaaaa3c7349df, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 72, w19, w17, 0x3d2aaaaa3d2aaaaa, 0x3d2aaaaa3c7349df); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w20, w25, 0x7fc000007fc00000, 0x7fc000003fb504f3); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w21, w7, 0x7fc000003d1abca5, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 16, w22, w26, 0xff8000007fc00000, 0x7fc000003d1abca5); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 24, w23, w28, 0x7f8000003d44c9f7, 0xff8000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 32, w24, w4, 0x5f21e89b7fc00000, 0x7f8000003d44c9f7); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 40, w25, w8, 0x3bd77f463f74161f, 0x5f21e89b7fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 48, w26, w1, 0x000000007fc00000, 0x3bd77f463f74161f); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 56, w27, w13, 0x7fc000007fc00000, 0x000000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 64, w28, w14, 0x3d2aaaaa3c7349df, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 72, w29, w12, 0x3d2aaaaa3d2aaaaa, 0x3d2aaaaa3c7349df); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w30, w30, 0x7fc000007fc00000, 0x7fc000003fb504f3); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w31, w17, 0x7fc000003d1abca5, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w0, w2, 0x3ff6a09e667f3bcc, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w1, w14, 0x7ff8000000000000, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 32, w2, w24, 0x3fa35794ad44f3ee, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 48, w3, w20, 0x7ff8000000000000, 0xfff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 64, w4, w25, 0x3fa8993eff4a591e, 0x7ff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 80, w5, w0, 0x7ff8000000000000, 0x604a20bd700c2c3d); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 96, w6, w26, 0x3fee82c3f9d89e1b, 0x3f458a24b20e5b9d); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 112, w7, w26, 0x7ff8000000000000, 0x0000000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 128, w8, w8, 0x3f733bbfdc427cab, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 144, w9, w19, 0x3fa5555555555555, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w10, w27, 0x3ff6a09e667f3bcc, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w11, w8, 0x7ff8000000000000, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 32, w12, w2, 0x3fa35794ad44f3ee, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 48, w13, w31, 0x7ff8000000000000, 0xfff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 64, w14, w0, 0x3fa8993eff4a591e, 0x7ff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 80, w15, w30, 0x7ff8000000000000, 0x604a20bd700c2c3d); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 96, w16, w5, 0x3fee82c3f9d89e1b, 0x3f458a24b20e5b9d); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 112, w17, w3, 0x7ff8000000000000, 0x0000000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 128, w18, w7, 0x3f733bbfdc427cab, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 144, w19, w3, 0x3fa5555555555555, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w20, w30, 0x3ff6a09e667f3bcc, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w21, w27, 0x7ff8000000000000, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 32, w22, w26, 0x3fa35794ad44f3ee, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 48, w23, w20, 0x7ff8000000000000, 0xfff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 64, w24, w7, 0x3fa8993eff4a591e, 0x7ff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 80, w25, w10, 0x7ff8000000000000, 0x604a20bd700c2c3d); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 96, w26, w29, 0x3fee82c3f9d89e1b, 0x3f458a24b20e5b9d); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 112, w27, w20, 0x7ff8000000000000, 0x0000000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 128, w28, w6, 0x3f733bbfdc427cab, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 144, w29, w24, 0x3fa5555555555555, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w30, w30, 0x3ff6a09e667f3bcc, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w31, w6, 0x7ff8000000000000, 0x7ff8000000000000); + + msacsr = 2; + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w0, w10, 0x7fc000007fc00000, 0x7fc000003fb504f4); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w1, w20, 0x7fc000003d1abca6, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 16, w2, w26, 0xff8000007fc00000, 0x7fc000003d1abca6); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 24, w3, w12, 0x7f8000003d44c9f8, 0xff8000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 32, w4, w0, 0x5f21e89c7fc00000, 0x7f8000003d44c9f8); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 40, w5, w22, 0x3bd77f473f741620, 0x5f21e89c7fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 48, w6, w26, 0x000000007fc00000, 0x3bd77f473f741620); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 56, w7, w14, 0x7fc000007fc00000, 0x000000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 64, w8, w8, 0x3d2aaaab3c7349e0, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 72, w9, w17, 0x3d2aaaab3d2aaaab, 0x3d2aaaab3c7349e0); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w10, w28, 0x7fc000007fc00000, 0x7fc000003fb504f4); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w11, w8, 0x7fc000003d1abca6, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 16, w12, w16, 0xff8000007fc00000, 0x7fc000003d1abca6); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 24, w13, w9, 0x7f8000003d44c9f8, 0xff8000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 32, w14, w3, 0x5f21e89c7fc00000, 0x7f8000003d44c9f8); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 40, w15, w21, 0x3bd77f473f741620, 0x5f21e89c7fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 48, w16, w9, 0x000000007fc00000, 0x3bd77f473f741620); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 56, w17, w14, 0x7fc000007fc00000, 0x000000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 64, w18, w10, 0x3d2aaaab3c7349e0, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 72, w19, w17, 0x3d2aaaab3d2aaaab, 0x3d2aaaab3c7349e0); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w20, w25, 0x7fc000007fc00000, 0x7fc000003fb504f4); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w21, w7, 0x7fc000003d1abca6, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 16, w22, w26, 0xff8000007fc00000, 0x7fc000003d1abca6); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 24, w23, w28, 0x7f8000003d44c9f8, 0xff8000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 32, w24, w4, 0x5f21e89c7fc00000, 0x7f8000003d44c9f8); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 40, w25, w8, 0x3bd77f473f741620, 0x5f21e89c7fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 48, w26, w1, 0x000000007fc00000, 0x3bd77f473f741620); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 56, w27, w13, 0x7fc000007fc00000, 0x000000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 64, w28, w14, 0x3d2aaaab3c7349e0, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 72, w29, w12, 0x3d2aaaab3d2aaaab, 0x3d2aaaab3c7349e0); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w30, w30, 0x7fc000007fc00000, 0x7fc000003fb504f4); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w31, w17, 0x7fc000003d1abca6, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w0, w2, 0x3ff6a09e667f3bcd, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w1, w14, 0x7ff8000000000000, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 32, w2, w24, 0x3fa35794ad44f3ef, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 48, w3, w20, 0x7ff8000000000000, 0xfff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 64, w4, w25, 0x3fa8993eff4a591f, 0x7ff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 80, w5, w0, 0x7ff8000000000000, 0x604a20bd700c2c3e); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 96, w6, w26, 0x3fee82c3f9d89e1c, 0x3f458a24b20e5b9e); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 112, w7, w26, 0x7ff8000000000000, 0x0000000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 128, w8, w8, 0x3f733bbfdc427cac, 0x3fa5555555555556); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 144, w9, w19, 0x3fa5555555555556, 0x3fa5555555555556); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w10, w27, 0x3ff6a09e667f3bcd, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w11, w8, 0x7ff8000000000000, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 32, w12, w2, 0x3fa35794ad44f3ef, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 48, w13, w31, 0x7ff8000000000000, 0xfff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 64, w14, w0, 0x3fa8993eff4a591f, 0x7ff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 80, w15, w30, 0x7ff8000000000000, 0x604a20bd700c2c3e); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 96, w16, w5, 0x3fee82c3f9d89e1c, 0x3f458a24b20e5b9e); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 112, w17, w3, 0x7ff8000000000000, 0x0000000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 128, w18, w7, 0x3f733bbfdc427cac, 0x3fa5555555555556); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 144, w19, w3, 0x3fa5555555555556, 0x3fa5555555555556); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w20, w30, 0x3ff6a09e667f3bcd, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w21, w27, 0x7ff8000000000000, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 32, w22, w26, 0x3fa35794ad44f3ef, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 48, w23, w20, 0x7ff8000000000000, 0xfff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 64, w24, w7, 0x3fa8993eff4a591f, 0x7ff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 80, w25, w10, 0x7ff8000000000000, 0x604a20bd700c2c3e); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 96, w26, w29, 0x3fee82c3f9d89e1c, 0x3f458a24b20e5b9e); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 112, w27, w20, 0x7ff8000000000000, 0x0000000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 128, w28, w6, 0x3f733bbfdc427cac, 0x3fa5555555555556); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 144, w29, w24, 0x3fa5555555555556, 0x3fa5555555555556); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w30, w30, 0x3ff6a09e667f3bcd, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w31, w6, 0x7ff8000000000000, 0x7ff8000000000000); + + msacsr = 3; + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w0, w10, 0x7fc000007fc00000, 0x7fc000003fb504f3); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w1, w20, 0x7fc000003d1abca5, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 16, w2, w26, 0xff8000007fc00000, 0x7fc000003d1abca5); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 24, w3, w12, 0x7f8000003d44c9f7, 0xff8000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 32, w4, w0, 0x5f21e89b7fc00000, 0x7f8000003d44c9f7); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 40, w5, w22, 0x3bd77f463f74161f, 0x5f21e89b7fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 48, w6, w26, 0x000000007fc00000, 0x3bd77f463f74161f); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 56, w7, w14, 0x7fc000007fc00000, 0x000000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 64, w8, w8, 0x3d2aaaaa3c7349df, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 72, w9, w17, 0x3d2aaaaa3d2aaaaa, 0x3d2aaaaa3c7349df); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w10, w28, 0x7fc000007fc00000, 0x7fc000003fb504f3); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w11, w8, 0x7fc000003d1abca5, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 16, w12, w16, 0xff8000007fc00000, 0x7fc000003d1abca5); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 24, w13, w9, 0x7f8000003d44c9f7, 0xff8000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 32, w14, w3, 0x5f21e89b7fc00000, 0x7f8000003d44c9f7); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 40, w15, w21, 0x3bd77f463f74161f, 0x5f21e89b7fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 48, w16, w9, 0x000000007fc00000, 0x3bd77f463f74161f); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 56, w17, w14, 0x7fc000007fc00000, 0x000000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 64, w18, w10, 0x3d2aaaaa3c7349df, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 72, w19, w17, 0x3d2aaaaa3d2aaaaa, 0x3d2aaaaa3c7349df); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w20, w25, 0x7fc000007fc00000, 0x7fc000003fb504f3); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w21, w7, 0x7fc000003d1abca5, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 16, w22, w26, 0xff8000007fc00000, 0x7fc000003d1abca5); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 24, w23, w28, 0x7f8000003d44c9f7, 0xff8000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 32, w24, w4, 0x5f21e89b7fc00000, 0x7f8000003d44c9f7); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 40, w25, w8, 0x3bd77f463f74161f, 0x5f21e89b7fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 48, w26, w1, 0x000000007fc00000, 0x3bd77f463f74161f); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 56, w27, w13, 0x7fc000007fc00000, 0x000000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 64, w28, w14, 0x3d2aaaaa3c7349df, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 72, w29, w12, 0x3d2aaaaa3d2aaaaa, 0x3d2aaaaa3c7349df); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 0, w30, w30, 0x7fc000007fc00000, 0x7fc000003fb504f3); + TEST_2RF_FRSQRT_W("frsqrt.w", dataf, 8, w31, w17, 0x7fc000003d1abca5, 0x7fc000007fc00000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w0, w2, 0x3ff6a09e667f3bcc, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w1, w14, 0x7ff8000000000000, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 32, w2, w24, 0x3fa35794ad44f3ee, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 48, w3, w20, 0x7ff8000000000000, 0xfff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 64, w4, w25, 0x3fa8993eff4a591e, 0x7ff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 80, w5, w0, 0x7ff8000000000000, 0x604a20bd700c2c3d); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 96, w6, w26, 0x3fee82c3f9d89e1b, 0x3f458a24b20e5b9d); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 112, w7, w26, 0x7ff8000000000000, 0x0000000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 128, w8, w8, 0x3f733bbfdc427cab, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 144, w9, w19, 0x3fa5555555555555, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w10, w27, 0x3ff6a09e667f3bcc, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w11, w8, 0x7ff8000000000000, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 32, w12, w2, 0x3fa35794ad44f3ee, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 48, w13, w31, 0x7ff8000000000000, 0xfff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 64, w14, w0, 0x3fa8993eff4a591e, 0x7ff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 80, w15, w30, 0x7ff8000000000000, 0x604a20bd700c2c3d); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 96, w16, w5, 0x3fee82c3f9d89e1b, 0x3f458a24b20e5b9d); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 112, w17, w3, 0x7ff8000000000000, 0x0000000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 128, w18, w7, 0x3f733bbfdc427cab, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 144, w19, w3, 0x3fa5555555555555, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w20, w30, 0x3ff6a09e667f3bcc, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w21, w27, 0x7ff8000000000000, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 32, w22, w26, 0x3fa35794ad44f3ee, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 48, w23, w20, 0x7ff8000000000000, 0xfff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 64, w24, w7, 0x3fa8993eff4a591e, 0x7ff0000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 80, w25, w10, 0x7ff8000000000000, 0x604a20bd700c2c3d); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 96, w26, w29, 0x3fee82c3f9d89e1b, 0x3f458a24b20e5b9d); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 112, w27, w20, 0x7ff8000000000000, 0x0000000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 128, w28, w6, 0x3f733bbfdc427cab, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 144, w29, w24, 0x3fa5555555555555, 0x3fa5555555555555); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 0, w30, w30, 0x3ff6a09e667f3bcc, 0x7ff8000000000000); + TEST_2RF_FRSQRT_D("frsqrt.d", datad, 16, w31, w6, 0x7ff8000000000000, 0x7ff8000000000000); + + // Registers ovelapping tests. TEST_MSA_FPU_REG32(0); diff --git a/none/tests/mips32/msa_fpu.stdout.exp b/none/tests/mips32/msa_fpu.stdout.exp index 953f79b..e45ed74 100644 --- a/none/tests/mips32/msa_fpu.stdout.exp +++ b/none/tests/mips32/msa_fpu.stdout.exp @@ -10618,70 +10618,6 @@ frcp.d $w28, $w6, w28: 3ef71ec6cb12f8fb3f5c71c71c71c71c w6: 40e6252666666666408 frcp.d $w29, $w11, w29: 3f5c71c71c71c71c3f5c71c71c71c71c w11: 40820000000000004082000000000000 msacsr 00000000 frcp.d $w30, $w30, w30: 40000000000000008000000000000000 w30: 3fe0000000000000fff0000000000000 msacsr 00000000 frcp.d $w31, $w22, w31: bfd81fa673fc86b5bbffffffc0000080 w22: c005395810624dd3c3e0000020000000 msacsr 00000000 -frsqrt.w $w0, $w10, w0: 7fc000007fc000007fc000003fb504f3 w10: cf000001c029cac1ff8000003f000000 msacsr 00000000 -frsqrt.w $w1, $w20, w1: 7fc000003d1abca57fc000007fc00000 w20: 80500000442f2ccdcf000001c029cac1 msacsr 00000000 -frsqrt.w $w2, $w26, w2: ff8000007fc000007fc000003d1abca5 w26: 80000000c447c7ae80500000442f2ccd msacsr 00000000 -frsqrt.w $w3, $w12, w3: 7f8000003d44c9f8ff8000007fc00000 w12: 0000000043d89d7180000000c447c7ae msacsr 00000000 -frsqrt.w $w4, $w0, w4: 5f21e89b7fc000007f8000003d44c9f8 w0: 00500000bf3333330000000043d89d71 msacsr 00000000 -frsqrt.w $w5, $w22, w5: 3bd77f463f7416205f21e89b7fc00000 w22: 46b4a3143f8ccccd00500000bf333333 msacsr 00000000 -frsqrt.w $w6, $w26, w6: 000000007fc000003bd77f463f741620 w26: 7f800000c70dabb346b4a3143f8ccccd msacsr 00000000 -frsqrt.w $w7, $w14, w7: 7fc000007fc00000000000007fc00000 w14: c029cac1c791bfa97f800000c70dabb3 msacsr 00000000 -frsqrt.w $w8, $w8, w8: 3d2aaaab3c7349e07fc000007fc00000 w8: 44100000458db99ac029cac1c791bfa9 msacsr 00000000 -frsqrt.w $w9, $w17, w9: 3d2aaaab3d2aaaab3d2aaaab3c7349e0 w17: 441000004410000044100000458db99a msacsr 00000000 -frsqrt.w $w10, $w28, w10: 7fc000007fc000007fc000003fb504f3 w28: cf000001c029cac1ff8000003f000000 msacsr 00000000 -frsqrt.w $w11, $w8, w11: 7fc000003d1abca57fc000007fc00000 w8: 80500000442f2ccdcf000001c029cac1 msacsr 00000000 -frsqrt.w $w12, $w16, w12: ff8000007fc000007fc000003d1abca5 w16: 80000000c447c7ae80500000442f2ccd msacsr 00000000 -frsqrt.w $w13, $w9, w13: 7f8000003d44c9f8ff8000007fc00000 w9: 0000000043d89d7180000000c447c7ae msacsr 00000000 -frsqrt.w $w14, $w3, w14: 5f21e89b7fc000007f8000003d44c9f8 w3: 00500000bf3333330000000043d89d71 msacsr 00000000 -frsqrt.w $w15, $w21, w15: 3bd77f463f7416205f21e89b7fc00000 w21: 46b4a3143f8ccccd00500000bf333333 msacsr 00000000 -frsqrt.w $w16, $w9, w16: 000000007fc000003bd77f463f741620 w9: 7f800000c70dabb346b4a3143f8ccccd msacsr 00000000 -frsqrt.w $w17, $w14, w17: 7fc000007fc00000000000007fc00000 w14: c029cac1c791bfa97f800000c70dabb3 msacsr 00000000 -frsqrt.w $w18, $w10, w18: 3d2aaaab3c7349e07fc000007fc00000 w10: 44100000458db99ac029cac1c791bfa9 msacsr 00000000 -frsqrt.w $w19, $w17, w19: 3d2aaaab3d2aaaab3d2aaaab3c7349e0 w17: 441000004410000044100000458db99a msacsr 00000000 -frsqrt.w $w20, $w25, w20: 7fc000007fc000007fc000003fb504f3 w25: cf000001c029cac1ff8000003f000000 msacsr 00000000 -frsqrt.w $w21, $w7, w21: 7fc000003d1abca57fc000007fc00000 w7: 80500000442f2ccdcf000001c029cac1 msacsr 00000000 -frsqrt.w $w22, $w26, w22: ff8000007fc000007fc000003d1abca5 w26: 80000000c447c7ae80500000442f2ccd msacsr 00000000 -frsqrt.w $w23, $w28, w23: 7f8000003d44c9f8ff8000007fc00000 w28: 0000000043d89d7180000000c447c7ae msacsr 00000000 -frsqrt.w $w24, $w4, w24: 5f21e89b7fc000007f8000003d44c9f8 w4: 00500000bf3333330000000043d89d71 msacsr 00000000 -frsqrt.w $w25, $w8, w25: 3bd77f463f7416205f21e89b7fc00000 w8: 46b4a3143f8ccccd00500000bf333333 msacsr 00000000 -frsqrt.w $w26, $w1, w26: 000000007fc000003bd77f463f741620 w1: 7f800000c70dabb346b4a3143f8ccccd msacsr 00000000 -frsqrt.w $w27, $w13, w27: 7fc000007fc00000000000007fc00000 w13: c029cac1c791bfa97f800000c70dabb3 msacsr 00000000 -frsqrt.w $w28, $w14, w28: 3d2aaaab3c7349e07fc000007fc00000 w14: 44100000458db99ac029cac1c791bfa9 msacsr 00000000 -frsqrt.w $w29, $w12, w29: 3d2aaaab3d2aaaab3d2aaaab3c7349e0 w12: 441000004410000044100000458db99a msacsr 00000000 -frsqrt.w $w30, $w30, w30: 7fc000007fc000007fc000003fb504f3 w30: cf000001c029cac1ff8000003f000000 msacsr 00000000 -frsqrt.w $w31, $w17, w31: 7fc000003d1abca57fc000007fc00000 w17: 80500000442f2ccdcf000001c029cac1 msacsr 00000000 -frsqrt.d $w0, $w2, w0: 3ff6a09e667f3bcd7ff8000000000000 w2: 3fe0000000000000fff0000000000000 msacsr 00000000 -frsqrt.d $w1, $w14, w1: 7ff80000000000007ff8000000000000 w14: c005395810624dd3c3e0000020000000 msacsr 00000000 -frsqrt.d $w2, $w24, w2: 3fa35794ad44f3ee7ff8000000000000 w24: 4085e5999999999a8000006000000000 msacsr 00000000 -frsqrt.d $w3, $w20, w3: 7ff8000000000000fff0000000000000 w20: c088f8f5c28f5c298000000000000000 msacsr 00000000 -frsqrt.d $w4, $w25, w4: 3fa8993eff4a591f7ff0000000000000 w25: 407b13ae147ae1480000000000000000 msacsr 00000000 -frsqrt.d $w5, $w0, w5: 7ff8000000000000604a20bd700c2c3e w0: bfe66666666666660000006000000000 msacsr 00000000 -frsqrt.d $w6, $w26, w6: 3fee82c3f9d89e1b3f458a24b20e5b9e w26: 3ff199999999999a4141a828c51eb852 msacsr 00000000 -frsqrt.d $w7, $w26, w7: 7ff80000000000000000000000000000 w26: c1b59e0837b333337ff0000000000000 msacsr 00000000 -frsqrt.d $w8, $w8, w8: 3f733bbfdc427cac3fa5555555555555 w8: 40e62526666666664082000000000000 msacsr 00000000 -frsqrt.d $w9, $w19, w9: 3fa55555555555553fa5555555555555 w19: 40820000000000004082000000000000 msacsr 00000000 -frsqrt.d $w10, $w27, w10: 3ff6a09e667f3bcd7ff8000000000000 w27: 3fe0000000000000fff0000000000000 msacsr 00000000 -frsqrt.d $w11, $w8, w11: 7ff80000000000007ff8000000000000 w8: c005395810624dd3c3e0000020000000 msacsr 00000000 -frsqrt.d $w12, $w2, w12: 3fa35794ad44f3ee7ff8000000000000 w2: 4085e5999999999a8000006000000000 msacsr 00000000 -frsqrt.d $w13, $w31, w13: 7ff8000000000000fff0000000000000 w31: c088f8f5c28f5c298000000000000000 msacsr 00000000 -frsqrt.d $w14, $w0, w14: 3fa8993eff4a591f7ff0000000000000 w0: 407b13ae147ae1480000000000000000 msacsr 00000000 -frsqrt.d $w15, $w30, w15: 7ff8000000000000604a20bd700c2c3e w30: bfe66666666666660000006000000000 msacsr 00000000 -frsqrt.d $w16, $w5, w16: 3fee82c3f9d89e1b3f458a24b20e5b9e w5: 3ff199999999999a4141a828c51eb852 msacsr 00000000 -frsqrt.d $w17, $w3, w17: 7ff80000000000000000000000000000 w3: c1b59e0837b333337ff0000000000000 msacsr 00000000 -frsqrt.d $w18, $w7, w18: 3f733bbfdc427cac3fa5555555555555 w7: 40e62526666666664082000000000000 msacsr 00000000 -frsqrt.d $w19, $w3, w19: 3fa55555555555553fa5555555555555 w3: 40820000000000004082000000000000 msacsr 00000000 -frsqrt.d $w20, $w30, w20: 3ff6a09e667f3bcd7ff8000000000000 w30: 3fe0000000000000fff0000000000000 msacsr 00000000 -frsqrt.d $w21, $w27, w21: 7ff80000000000007ff8000000000000 w27: c005395810624dd3c3e0000020000000 msacsr 00000000 -frsqrt.d $w22, $w26, w22: 3fa35794ad44f3ee7ff8000000000000 w26: 4085e5999999999a8000006000000000 msacsr 00000000 -frsqrt.d $w23, $w20, w23: 7ff8000000000000fff0000000000000 w20: c088f8f5c28f5c298000000000000000 msacsr 00000000 -frsqrt.d $w24, $w7, w24: 3fa8993eff4a591f7ff0000000000000 w7: 407b13ae147ae1480000000000000000 msacsr 00000000 -frsqrt.d $w25, $w10, w25: 7ff8000000000000604a20bd700c2c3e w10: bfe66666666666660000006000000000 msacsr 00000000 -frsqrt.d $w26, $w29, w26: 3fee82c3f9d89e1b3f458a24b20e5b9e w29: 3ff199999999999a4141a828c51eb852 msacsr 00000000 -frsqrt.d $w27, $w20, w27: 7ff80000000000000000000000000000 w20: c1b59e0837b333337ff0000000000000 msacsr 00000000 -frsqrt.d $w28, $w6, w28: 3f733bbfdc427cac3fa5555555555555 w6: 40e62526666666664082000000000000 msacsr 00000000 -frsqrt.d $w29, $w24, w29: 3fa55555555555553fa5555555555555 w24: 40820000000000004082000000000000 msacsr 00000000 -frsqrt.d $w30, $w30, w30: 3ff6a09e667f3bcd7ff8000000000000 w30: 3fe0000000000000fff0000000000000 msacsr 00000000 -frsqrt.d $w31, $w6, w31: 7ff80000000000007ff8000000000000 w6: c005395810624dd3c3e0000020000000 msacsr 00000000 fsqrt.w $w0, $w17, w0: 7fc000007fc000007fc000003f3504f3 w17: cf000001c029cac1ff8000003f000000 msacsr 00000000 fsqrt.w $w1, $w14, w1: 7fc0000041d3c4137fc000007fc00000 w14: 80500000442f2ccdcf000001c029cac1 msacsr 00000000 fsqrt.w $w2, $w8, w2: 800000007fc000007fc0000041d3c413 w8: 80000000c447c7ae80500000442f2ccd msacsr 00000000 @@ -16614,70 +16550,6 @@ frcp.d $w28, $w6, w28: 3ef71ec6cb12f8fb3f5c71c71c71c71c w6: 40e6252666666666408 frcp.d $w29, $w11, w29: 3f5c71c71c71c71c3f5c71c71c71c71c w11: 40820000000000004082000000000000 msacsr 00000001 frcp.d $w30, $w30, w30: 40000000000000008000000000000000 w30: 3fe0000000000000fff0000000000000 msacsr 00000001 frcp.d $w31, $w22, w31: bfd81fa673fc86b4bbffffffc000007f w22: c005395810624dd3c3e0000020000000 msacsr 00000001 -frsqrt.w $w0, $w10, w0: 7fc000007fc000007fc000003fb504f3 w10: cf000001c029cac1ff8000003f000000 msacsr 00000001 -frsqrt.w $w1, $w20, w1: 7fc000003d1abca57fc000007fc00000 w20: 80500000442f2ccdcf000001c029cac1 msacsr 00000001 -frsqrt.w $w2, $w26, w2: ff8000007fc000007fc000003d1abca5 w26: 80000000c447c7ae80500000442f2ccd msacsr 00000001 -frsqrt.w $w3, $w12, w3: 7f8000003d44c9f7ff8000007fc00000 w12: 0000000043d89d7180000000c447c7ae msacsr 00000001 -frsqrt.w $w4, $w0, w4: 5f21e89b7fc000007f8000003d44c9f7 w0: 00500000bf3333330000000043d89d71 msacsr 00000001 -frsqrt.w $w5, $w22, w5: 3bd77f463f74161f5f21e89b7fc00000 w22: 46b4a3143f8ccccd00500000bf333333 msacsr 00000001 -frsqrt.w $w6, $w26, w6: 000000007fc000003bd77f463f74161f w26: 7f800000c70dabb346b4a3143f8ccccd msacsr 00000001 -frsqrt.w $w7, $w14, w7: 7fc000007fc00000000000007fc00000 w14: c029cac1c791bfa97f800000c70dabb3 msacsr 00000001 -frsqrt.w $w8, $w8, w8: 3d2aaaaa3c7349df7fc000007fc00000 w8: 44100000458db99ac029cac1c791bfa9 msacsr 00000001 -frsqrt.w $w9, $w17, w9: 3d2aaaaa3d2aaaaa3d2aaaaa3c7349df w17: 441000004410000044100000458db99a msacsr 00000001 -frsqrt.w $w10, $w28, w10: 7fc000007fc000007fc000003fb504f3 w28: cf000001c029cac1ff8000003f000000 msacsr 00000001 -frsqrt.w $w11, $w8, w11: 7fc000003d1abca57fc000007fc00000 w8: 80500000442f2ccdcf000001c029cac1 msacsr 00000001 -frsqrt.w $w12, $w16, w12: ff8000007fc000007fc000003d1abca5 w16: 80000000c447c7ae80500000442f2ccd msacsr 00000001 -frsqrt.w $w13, $w9, w13: 7f8000003d44c9f7ff8000007fc00000 w9: 0000000043d89d7180000000c447c7ae msacsr 00000001 -frsqrt.w $w14, $w3, w14: 5f21e89b7fc000007f8000003d44c9f7 w3: 00500000bf3333330000000043d89d71 msacsr 00000001 -frsqrt.w $w15, $w21, w15: 3bd77f463f74161f5f21e89b7fc00000 w21: 46b4a3143f8ccccd00500000bf333333 msacsr 00000001 -frsqrt.w $w16, $w9, w16: 000000007fc000003bd77f463f74161f w9: 7f800000c70dabb346b4a3143f8ccccd msacsr 00000001 -frsqrt.w $w17, $w14, w17: 7fc000007fc00000000000007fc00000 w14: c029cac1c791bfa97f800000c70dabb3 msacsr 00000001 -frsqrt.w $w18, $w10, w18: 3d2aaaaa3c7349df7fc000007fc00000 w10: 44100000458db99ac029cac1c791bfa9 msacsr 00000001 -frsqrt.w $w19, $w17, w19: 3d2aaaaa3d2aaaaa3d2aaaaa3c7349df w17: 441000004410000044100000458db99a msacsr 00000001 -frsqrt.w $w20, $w25, w20: 7fc000007fc000007fc000003fb504f3 w25: cf000001c029cac1ff8000003f000000 msacsr 00000001 -frsqrt.w $w21, $w7, w21: 7fc000003d1abca57fc000007fc00000 w7: 80500000442f2ccdcf000001c029cac1 msacsr 00000001 -frsqrt.w $w22, $w26, w22: ff8000007fc000007fc000003d1abca5 w26: 80000000c447c7ae80500000442f2ccd msacsr 00000001 -frsqrt.w $w23, $w28, w23: 7f8000003d44c9f7ff8000007fc00000 w28: 0000000043d89d7180000000c447c7ae msacsr 00000001 -frsqrt.w $w24, $w4, w24: 5f21e89b7fc000007f8000003d44c9f7 w4: 00500000bf3333330000000043d89d71 msacsr 00000001 -frsqrt.w $w25, $w8, w25: 3bd77f463f74161f5f21e89b7fc00000 w8: 46b4a3143f8ccccd00500000bf333333 msacsr 00000001 -frsqrt.w $w26, $w1, w26: 000000007fc000003bd77f463f74161f w1: 7f800000c70dabb346b4a3143f8ccccd msacsr 00000001 -frsqrt.w $w27, $w13, w27: 7fc000007fc00000000000007fc00000 w13: c029cac1c791bfa97f800000c70dabb3 msacsr 00000001 -frsqrt.w $w28, $w14, w28: 3d2aaaaa3c7349df7fc000007fc00000 w14: 44100000458db99ac029cac1c791bfa9 msacsr 00000001 -frsqrt.w $w29, $w12, w29: 3d2aaaaa3d2aaaaa3d2aaaaa3c7349df w12: 441000004410000044100000458db99a msacsr 00000001 -frsqrt.w $w30, $w30, w30: 7fc000007fc000007fc000003fb504f3 w30: cf000001c029cac1ff8000003f000000 msacsr 00000001 -frsqrt.w $w31, $w17, w31: 7fc000003d1abca57fc000007fc00000 w17: 80500000442f2ccdcf000001c029cac1 msacsr 00000001 -frsqrt.d $w0, $w2, w0: 3ff6a09e667f3bcc7ff8000000000000 w2: 3fe0000000000000fff0000000000000 msacsr 00000001 -frsqrt.d $w1, $w14, w1: 7ff80000000000007ff8000000000000 w14: c005395810624dd3c3e0000020000000 msacsr 00000001 -frsqrt.d $w2, $w24, w2: 3fa35794ad44f3ee7ff8000000000000 w24: 4085e5999999999a8000006000000000 msacsr 00000001 -frsqrt.d $w3, $w20, w3: 7ff8000000000000fff0000000000000 w20: c088f8f5c28f5c298000000000000000 msacsr 00000001 -frsqrt.d $w4, $w25, w4: 3fa8993eff4a591e7ff0000000000000 w25: 407b13ae147ae1480000000000000000 msacsr 00000001 -frsqrt.d $w5, $w0, w5: 7ff8000000000000604a20bd700c2c3d w0: bfe66666666666660000006000000000 msacsr 00000001 -frsqrt.d $w6, $w26, w6: 3fee82c3f9d89e1b3f458a24b20e5b9d w26: 3ff199999999999a4141a828c51eb852 msacsr 00000001 -frsqrt.d $w7, $w26, w7: 7ff80000000000000000000000000000 w26: c1b59e0837b333337ff0000000000000 msacsr 00000001 -frsqrt.d $w8, $w8, w8: 3f733bbfdc427cab3fa5555555555555 w8: 40e62526666666664082000000000000 msacsr 00000001 -frsqrt.d $w9, $w19, w9: 3fa55555555555553fa5555555555555 w19: 40820000000000004082000000000000 msacsr 00000001 -frsqrt.d $w10, $w27, w10: 3ff6a09e667f3bcc7ff8000000000000 w27: 3fe0000000000000fff0000000000000 msacsr 00000001 -frsqrt.d $w11, $w8, w11: 7ff80000000000007ff8000000000000 w8: c005395810624dd3c3e0000020000000 msacsr 00000001 -frsqrt.d $w12, $w2, w12: 3fa35794ad44f3ee7ff8000000000000 w2: 4085e5999999999a8000006000000000 msacsr 00000001 -frsqrt.d $w13, $w31, w13: 7ff8000000000000fff0000000000000 w31: c088f8f5c28f5c298000000000000000 msacsr 00000001 -frsqrt.d $w14, $w0, w14: 3fa8993eff4a591e7ff0000000000000 w0: 407b13ae147ae1480000000000000000 msacsr 00000001 -frsqrt.d $w15, $w30, w15: 7ff8000000000000604a20bd700c2c3d w30: bfe66666666666660000006000000000 msacsr 00000001 -frsqrt.d $w16, $w5, w16: 3fee82c3f9d89e1b3f458a24b20e5b9d w5: 3ff199999999999a4141a828c51eb852 msacsr 00000001 -frsqrt.d $w17, $w3, w17: 7ff80000000000000000000000000000 w3: c1b59e0837b333337ff0000000000000 msacsr 00000001 -frsqrt.d $w18, $w7, w18: 3f733bbfdc427cab3fa5555555555555 w7: 40e62526666666664082000000000000 msacsr 00000001 -frsqrt.d $w19, $w3, w19: 3fa55555555555553fa5555555555555 w3: 40820000000000004082000000000000 msacsr 00000001 -frsqrt.d $w20, $w30, w20: 3ff6a09e667f3bcc7ff8000000000000 w30: 3fe0000000000000fff0000000000000 msacsr 00000001 -frsqrt.d $w21, $w27, w21: 7ff80000000000007ff8000000000000 w27: c005395810624dd3c3e0000020000000 msacsr 00000001 -frsqrt.d $w22, $w26, w22: 3fa35794ad44f3ee7ff8000000000000 w26: 4085e5999999999a8000006000000000 msacsr 00000001 -frsqrt.d $w23, $w20, w23: 7ff8000000000000fff0000000000000 w20: c088f8f5c28f5c298000000000000000 msacsr 00000001 -frsqrt.d $w24, $w7, w24: 3fa8993eff4a591e7ff0000000000000 w7: 407b13ae147ae1480000000000000000 msacsr 00000001 -frsqrt.d $w25, $w10, w25: 7ff8000000000000604a20bd700c2c3d w10: bfe66666666666660000006000000000 msacsr 00000001 -frsqrt.d $w26, $w29, w26: 3fee82c3f9d89e1b3f458a24b20e5b9d w29: 3ff199999999999a4141a828c51eb852 msacsr 00000001 -frsqrt.d $w27, $w20, w27: 7ff80000000000000000000000000000 w20: c1b59e0837b333337ff0000000000000 msacsr 00000001 -frsqrt.d $w28, $w6, w28: 3f733bbfdc427cab3fa5555555555555 w6: 40e62526666666664082000000000000 msacsr 00000001 -frsqrt.d $w29, $w24, w29: 3fa55555555555553fa5555555555555 w24: 40820000000000004082000000000000 msacsr 00000001 -frsqrt.d $w30, $w30, w30: 3ff6a09e667f3bcc7ff8000000000000 w30: 3fe0000000000000fff0000000000000 msacsr 00000001 -frsqrt.d $w31, $w6, w31: 7ff80000000000007ff8000000000000 w6: c005395810624dd3c3e0000020000000 msacsr 00000001 fsqrt.w $w0, $w17, w0: 7fc000007fc000007fc000003f3504f3 w17: cf000001c029cac1ff8000003f000000 msacsr 00000001 fsqrt.w $w1, $w14, w1: 7fc0000041d3c4127fc000007fc00000 w14: 80500000442f2ccdcf000001c029cac1 msacsr 00000001 fsqrt.w $w2, $w8, w2: 800000007fc000007fc0000041d3c412 w8: 80000000c447c7ae80500000442f2ccd msacsr 00000001 @@ -22610,70 +22482,6 @@ frcp.d $w28, $w6, w28: 3ef71ec6cb12f8fc3f5c71c71c71c71d w6: 40e6252666666666408 frcp.d $w29, $w11, w29: 3f5c71c71c71c71d3f5c71c71c71c71d w11: 40820000000000004082000000000000 msacsr 00000002 frcp.d $w30, $w30, w30: 40000000000000008000000000000000 w30: 3fe0000000000000fff0000000000000 msacsr 00000002 frcp.d $w31, $w22, w31: bfd81fa673fc86b4bbffffffc000007f w22: c005395810624dd3c3e0000020000000 msacsr 00000002 -frsqrt.w $w0, $w10, w0: 7fc000007fc000007fc000003fb504f4 w10: cf000001c029cac1ff8000003f000000 msacsr 00000002 -frsqrt.w $w1, $w20, w1: 7fc000003d1abca67fc000007fc00000 w20: 80500000442f2ccdcf000001c029cac1 msacsr 00000002 -frsqrt.w $w2, $w26, w2: ff8000007fc000007fc000003d1abca6 w26: 80000000c447c7ae80500000442f2ccd msacsr 00000002 -frsqrt.w $w3, $w12, w3: 7f8000003d44c9f8ff8000007fc00000 w12: 0000000043d89d7180000000c447c7ae msacsr 00000002 -frsqrt.w $w4, $w0, w4: 5f21e89c7fc000007f8000003d44c9f8 w0: 00500000bf3333330000000043d89d71 msacsr 00000002 -frsqrt.w $w5, $w22, w5: 3bd77f473f7416205f21e89c7fc00000 w22: 46b4a3143f8ccccd00500000bf333333 msacsr 00000002 -frsqrt.w $w6, $w26, w6: 000000007fc000003bd77f473f741620 w26: 7f800000c70dabb346b4a3143f8ccccd msacsr 00000002 -frsqrt.w $w7, $w14, w7: 7fc000007fc00000000000007fc00000 w14: c029cac1c791bfa97f800000c70dabb3 msacsr 00000002 -frsqrt.w $w8, $w8, w8: 3d2aaaab3c7349e07fc000007fc00000 w8: 44100000458db99ac029cac1c791bfa9 msacsr 00000002 -frsqrt.w $w9, $w17, w9: 3d2aaaab3d2aaaab3d2aaaab3c7349e0 w17: 441000004410000044100000458db99a msacsr 00000002 -frsqrt.w $w10, $w28, w10: 7fc000007fc000007fc000003fb504f4 w28: cf000001c029cac1ff8000003f000000 msacsr 00000002 -frsqrt.w $w11, $w8, w11: 7fc000003d1abca67fc000007fc00000 w8: 80500000442f2ccdcf000001c029cac1 msacsr 00000002 -frsqrt.w $w12, $w16, w12: ff8000007fc000007fc000003d1abca6 w16: 80000000c447c7ae80500000442f2ccd msacsr 00000002 -frsqrt.w $w13, $w9, w13: 7f8000003d44c9f8ff8000007fc00000 w9: 0000000043d89d7180000000c447c7ae msacsr 00000002 -frsqrt.w $w14, $w3, w14: 5f21e89c7fc000007f8000003d44c9f8 w3: 00500000bf3333330000000043d89d71 msacsr 00000002 -frsqrt.w $w15, $w21, w15: 3bd77f473f7416205f21e89c7fc00000 w21: 46b4a3143f8ccccd00500000bf333333 msacsr 00000002 -frsqrt.w $w16, $w9, w16: 000000007fc000003bd77f473f741620 w9: 7f800000c70dabb346b4a3143f8ccccd msacsr 00000002 -frsqrt.w $w17, $w14, w17: 7fc000007fc00000000000007fc00000 w14: c029cac1c791bfa97f800000c70dabb3 msacsr 00000002 -frsqrt.w $w18, $w10, w18: 3d2aaaab3c7349e07fc000007fc00000 w10: 44100000458db99ac029cac1c791bfa9 msacsr 00000002 -frsqrt.w $w19, $w17, w19: 3d2aaaab3d2aaaab3d2aaaab3c7349e0 w17: 441000004410000044100000458db99a msacsr 00000002 -frsqrt.w $w20, $w25, w20: 7fc000007fc000007fc000003fb504f4 w25: cf000001c029cac1ff8000003f000000 msacsr 00000002 -frsqrt.w $w21, $w7, w21: 7fc000003d1abca67fc000007fc00000 w7: 80500000442f2ccdcf000001c029cac1 msacsr 00000002 -frsqrt.w $w22, $w26, w22: ff8000007fc000007fc000003d1abca6 w26: 80000000c447c7ae80500000442f2ccd msacsr 00000002 -frsqrt.w $w23, $w28, w23: 7f8000003d44c9f8ff8000007fc00000 w28: 0000000043d89d7180000000c447c7ae msacsr 00000002 -frsqrt.w $w24, $w4, w24: 5f21e89c7fc000007f8000003d44c9f8 w4: 00500000bf3333330000000043d89d71 msacsr 00000002 -frsqrt.w $w25, $w8, w25: 3bd77f473f7416205f21e89c7fc00000 w8: 46b4a3143f8ccccd00500000bf333333 msacsr 00000002 -frsqrt.w $w26, $w1, w26: 000000007fc000003bd77f473f741620 w1: 7f800000c70dabb346b4a3143f8ccccd msacsr 00000002 -frsqrt.w $w27, $w13, w27: 7fc000007fc00000000000007fc00000 w13: c029cac1c791bfa97f800000c70dabb3 msacsr 00000002 -frsqrt.w $w28, $w14, w28: 3d2aaaab3c7349e07fc000007fc00000 w14: 44100000458db99ac029cac1c791bfa9 msacsr 00000002 -frsqrt.w $w29, $w12, w29: 3d2aaaab3d2aaaab3d2aaaab3c7349e0 w12: 441000004410000044100000458db99a msacsr 00000002 -frsqrt.w $w30, $w30, w30: 7fc000007fc000007fc000003fb504f4 w30: cf000001c029cac1ff8000003f000000 msacsr 00000002 -frsqrt.w $w31, $w17, w31: 7fc000003d1abca67fc000007fc00000 w17: 80500000442f2ccdcf000001c029cac1 msacsr 00000002 -frsqrt.d $w0, $w2, w0: 3ff6a09e667f3bcd7ff8000000000000 w2: 3fe0000000000000fff0000000000000 msacsr 00000002 -frsqrt.d $w1, $w14, w1: 7ff80000000000007ff8000000000000 w14: c005395810624dd3c3e0000020000000 msacsr 00000002 -frsqrt.d $w2, $w24, w2: 3fa35794ad44f3ef7ff8000000000000 w24: 4085e5999999999a8000006000000000 msacsr 00000002 -frsqrt.d $w3, $w20, w3: 7ff8000000000000fff0000000000000 w20: c088f8f5c28f5c298000000000000000 msacsr 00000002 -frsqrt.d $w4, $w25, w4: 3fa8993eff4a591f7ff0000000000000 w25: 407b13ae147ae1480000000000000000 msacsr 00000002 -frsqrt.d $w5, $w0, w5: 7ff8000000000000604a20bd700c2c3e w0: bfe66666666666660000006000000000 msacsr 00000002 -frsqrt.d $w6, $w26, w6: 3fee82c3f9d89e1c3f458a24b20e5b9e w26: 3ff199999999999a4141a828c51eb852 msacsr 00000002 -frsqrt.d $w7, $w26, w7: 7ff80000000000000000000000000000 w26: c1b59e0837b333337ff0000000000000 msacsr 00000002 -frsqrt.d $w8, $w8, w8: 3f733bbfdc427cac3fa5555555555556 w8: 40e62526666666664082000000000000 msacsr 00000002 -frsqrt.d $w9, $w19, w9: 3fa55555555555563fa5555555555556 w19: 40820000000000004082000000000000 msacsr 00000002 -frsqrt.d $w10, $w27, w10: 3ff6a09e667f3bcd7ff8000000000000 w27: 3fe0000000000000fff0000000000000 msacsr 00000002 -frsqrt.d $w11, $w8, w11: 7ff80000000000007ff8000000000000 w8: c005395810624dd3c3e0000020000000 msacsr 00000002 -frsqrt.d $w12, $w2, w12: 3fa35794ad44f3ef7ff8000000000000 w2: 4085e5999999999a8000006000000000 msacsr 00000002 -frsqrt.d $w13, $w31, w13: 7ff8000000000000fff0000000000000 w31: c088f8f5c28f5c298000000000000000 msacsr 00000002 -frsqrt.d $w14, $w0, w14: 3fa8993eff4a591f7ff0000000000000 w0: 407b13ae147ae1480000000000000000 msacsr 00000002 -frsqrt.d $w15, $w30, w15: 7ff8000000000000604a20bd700c2c3e w30: bfe66666666666660000006000000000 msacsr 00000002 -frsqrt.d $w16, $w5, w16: 3fee82c3f9d89e1c3f458a24b20e5b9e w5: 3ff199999999999a4141a828c51eb852 msacsr 00000002 -frsqrt.d $w17, $w3, w17: 7ff80000000000000000000000000000 w3: c1b59e0837b333337ff0000000000000 msacsr 00000002 -frsqrt.d $w18, $w7, w18: 3f733bbfdc427cac3fa5555555555556 w7: 40e62526666666664082000000000000 msacsr 00000002 -frsqrt.d $w19, $w3, w19: 3fa55555555555563fa5555555555556 w3: 40820000000000004082000000000000 msacsr 00000002 -frsqrt.d $w20, $w30, w20: 3ff6a09e667f3bcd7ff8000000000000 w30: 3fe0000000000000fff0000000000000 msacsr 00000002 -frsqrt.d $w21, $w27, w21: 7ff80000000000007ff8000000000000 w27: c005395810624dd3c3e0000020000000 msacsr 00000002 -frsqrt.d $w22, $w26, w22: 3fa35794ad44f3ef7ff8000000000000 w26: 4085e5999999999a8000006000000000 msacsr 00000002 -frsqrt.d $w23, $w20, w23: 7ff8000000000000f... [truncated message content] |
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From: Bart V. A. <bva...@so...> - 2020-01-16 04:34:00
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=d6efbcb0b515eff5228ccd06c7fb137fd4e0a1be commit d6efbcb0b515eff5228ccd06c7fb137fd4e0a1be Author: Bart Van Assche <bva...@ac...> Date: Wed Jan 15 19:23:02 2020 -0800 drd/tests/std_mutex: Add a unit test for std::mutex Diff: --- .gitignore | 1 + drd/tests/Makefile.am | 6 ++++++ drd/tests/std_mutex.cpp | 39 +++++++++++++++++++++++++++++++++++++++ drd/tests/std_mutex.stderr.exp | 4 ++++ drd/tests/std_mutex.vgtest | 4 ++++ 5 files changed, 54 insertions(+) diff --git a/.gitignore b/.gitignore index 58dfee0..8e5f0a6 100644 --- a/.gitignore +++ b/.gitignore @@ -405,6 +405,7 @@ /drd/tests/sigalrm /drd/tests/std_atomic /drd/tests/std_list +/drd/tests/std_mutex /drd/tests/std_string /drd/tests/std_thread /drd/tests/std_thread2 diff --git a/drd/tests/Makefile.am b/drd/tests/Makefile.am index a0da60d..20c72c2 100644 --- a/drd/tests/Makefile.am +++ b/drd/tests/Makefile.am @@ -274,6 +274,8 @@ EXTRA_DIST = \ std_atomic.vgtest \ std_list.stderr.exp \ std_list.vgtest \ + std_mutex.stderr.exp \ + std_mutex.vgtest \ std_string.stderr.exp \ std_string.vgtest \ std_thread.stderr.exp \ @@ -434,6 +436,7 @@ if HAVE_SHARED_POINTER_ANNOTATION check_PROGRAMS += \ std_atomic \ std_list \ + std_mutex \ std_string \ std_thread \ std_thread2 @@ -559,6 +562,9 @@ std_atomic_CXXFLAGS = $(AM_CXXFLAGS) -std=c++0x -Wno-sign-compare std_list_SOURCES = std_list.cpp std_list_CXXFLAGS = $(AM_CXXFLAGS) -std=c++0x -Wno-sign-compare +std_mutex_SOURCES = std_mutex.cpp +std_mutex_CXXFLAGS = $(AM_CXXFLAGS) -std=c++0x -Wno-sign-compare + std_string_SOURCES = std_string.cpp std_string_CXXFLAGS = $(AM_CXXFLAGS) -std=c++0x -Wno-sign-compare diff --git a/drd/tests/std_mutex.cpp b/drd/tests/std_mutex.cpp new file mode 100644 index 0000000..7c3333e --- /dev/null +++ b/drd/tests/std_mutex.cpp @@ -0,0 +1,39 @@ +// See also https://bugs.kde.org/show_bug.cgi?id=416286 + +#include <mutex> +#include <iostream> +#include <thread> +#include <vector> + +class counter { +public: + counter(): mutex() {} + void get() { std::unique_lock<std::mutex> lock(mutex); } + +private: + std::mutex mutex; +}; + +static counter& get_counter() +{ + static counter manager; + return manager; +} + +static void do_work() +{ + get_counter().get(); +} + +int main() +{ + std::vector<std::thread> v; + + for (int i = 0; i < 16; i++) + v.emplace_back([]{ do_work(); }); + + for (auto& t : v) + t.join(); + + std::cerr << "Done.\n"; +} diff --git a/drd/tests/std_mutex.stderr.exp b/drd/tests/std_mutex.stderr.exp new file mode 100644 index 0000000..d16127f --- /dev/null +++ b/drd/tests/std_mutex.stderr.exp @@ -0,0 +1,4 @@ + +Done. + +ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0) diff --git a/drd/tests/std_mutex.vgtest b/drd/tests/std_mutex.vgtest new file mode 100644 index 0000000..c592eea --- /dev/null +++ b/drd/tests/std_mutex.vgtest @@ -0,0 +1,4 @@ +prereq: test -e std_mutex && ./supported_libpthread +vgopts: --check-stack-var=yes --show-confl-seg=no +prog: std_mutex +stderr_filter: filter_stderr |
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From: Bart V. A. <bva...@so...> - 2020-01-16 04:33:55
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=bb8c57ec64445648788efdb458bde3b7c5d8806e commit bb8c57ec64445648788efdb458bde3b7c5d8806e Author: Bart Van Assche <bva...@ac...> Date: Wed Jan 15 19:59:44 2020 -0800 drd: Fix 'conflicting load' error on std::mutex::lock() Diff: --- NEWS | 1 + drd/drd_pthread_intercepts.c | 15 +++++++++++---- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/NEWS b/NEWS index 895c96f..a1c1b06 100644 --- a/NEWS +++ b/NEWS @@ -97,6 +97,7 @@ where XXXXXX is the bug number as listed below. 413330 avx-1 test fails on AMD EPYC 7401P 24-Core Processor 413603 callgrind_annotate/cg_annotate truncate function names at '#' 414565 Specific use case bug found in SysRes VG_(do_sys_sigprocmask) +416286 DRD reports "conflicting load" error on std::mutex::lock() n-i-bz Fix minor one time leaks in dhat. n-i-bz Add --run-cxx-freeres=no in outer args to avoid inner crashes. diff --git a/drd/drd_pthread_intercepts.c b/drd/drd_pthread_intercepts.c index 8d095c0..bb5b9da 100644 --- a/drd/drd_pthread_intercepts.c +++ b/drd/drd_pthread_intercepts.c @@ -364,30 +364,37 @@ static MutexT DRD_(thread_to_drd_mutex_type)(int type) */ static __always_inline MutexT DRD_(mutex_type)(pthread_mutex_t* mutex) { + MutexT mutex_type = mutex_type_unknown; + + ANNOTATE_IGNORE_READS_BEGIN(); #if defined(HAVE_PTHREAD_MUTEX_T__M_KIND) /* glibc + LinuxThreads. */ if (IS_ALIGNED(&mutex->__m_kind)) { const int kind = mutex->__m_kind & 3; - return DRD_(pthread_to_drd_mutex_type)(kind); + mutex_type = DRD_(pthread_to_drd_mutex_type)(kind); } #elif defined(HAVE_PTHREAD_MUTEX_T__DATA__KIND) /* glibc + NPTL. */ if (IS_ALIGNED(&mutex->__data.__kind)) { const int kind = mutex->__data.__kind & 3; - return DRD_(pthread_to_drd_mutex_type)(kind); + mutex_type = DRD_(pthread_to_drd_mutex_type)(kind); } #elif defined(VGO_solaris) + { const int type = ((mutex_t *) mutex)->vki_mutex_type; - return DRD_(thread_to_drd_mutex_type)(type); + mutex_type = DRD_(thread_to_drd_mutex_type)(type); + } #else /* * Another POSIX threads implementation. The mutex type won't be printed * when enabling --trace-mutex=yes. */ #endif - return mutex_type_unknown; + ANNOTATE_IGNORE_READS_END(); + + return mutex_type; } /** |
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From: Bart V. A. <bva...@so...> - 2020-01-16 04:33:51
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=2d8192a2a784692c0d8317c20ed9af6e09595abc commit 2d8192a2a784692c0d8317c20ed9af6e09595abc Author: Bart Van Assche <bva...@ac...> Date: Wed Jan 15 19:55:47 2020 -0800 drd/tests/Makefile.am: Fix indentation Diff: --- drd/tests/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drd/tests/Makefile.am b/drd/tests/Makefile.am index fec3f46..a0da60d 100644 --- a/drd/tests/Makefile.am +++ b/drd/tests/Makefile.am @@ -271,7 +271,7 @@ EXTRA_DIST = \ sigaltstack.stderr.exp \ sigaltstack.vgtest \ std_atomic.stderr.exp \ - std_atomic.vgtest \ + std_atomic.vgtest \ std_list.stderr.exp \ std_list.vgtest \ std_string.stderr.exp \ |
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From: Mark W. <ma...@so...> - 2020-01-15 17:15:51
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=6f9a8d619d2276c416d982cbd2cfb3cb84c50a43 commit 6f9a8d619d2276c416d982cbd2cfb3cb84c50a43 Author: Mark Wielaard <ma...@kl...> Date: Wed Jan 15 17:43:15 2020 +0100 priv/guest_generic_bb_to_IR.c stmt_is_guardable(): Add Ist_Dirty. This might happen when the source contains something like if (something_involving_pcmpxstrx && foo) { .. } which might use amd64g_dirtyhelper_PCMPxSTRx. Diff: --- VEX/priv/guest_generic_bb_to_IR.c | 1 + 1 file changed, 1 insertion(+) diff --git a/VEX/priv/guest_generic_bb_to_IR.c b/VEX/priv/guest_generic_bb_to_IR.c index 507c75e..6361725 100644 --- a/VEX/priv/guest_generic_bb_to_IR.c +++ b/VEX/priv/guest_generic_bb_to_IR.c @@ -462,6 +462,7 @@ static Bool stmt_is_guardable ( const IRStmt* st ) case Ist_Store: case Ist_StoreG: case Ist_Exit: + case Ist_Dirty: return False; // This is probably guardable, but it depends on the RHS of the // assignment. |
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From: Mark W. <ma...@so...> - 2020-01-15 15:04:18
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=58fc707804b9c1db66124737f5dcbb2715b230e1 commit 58fc707804b9c1db66124737f5dcbb2715b230e1 Author: Alexandra Hájková <aha...@re...> Date: Mon Jan 13 12:29:55 2020 -0500 syswrap-linux.c: fix clock_adjtime handling Not checking whether valgrind can dereference timex pointer casues VALGRIND INTERNAL ERROR while handling clock_adjtime. Diff: --- coregrind/m_syswrap/syswrap-linux.c | 38 ++++++++++++++++++++----------------- 1 file changed, 21 insertions(+), 17 deletions(-) diff --git a/coregrind/m_syswrap/syswrap-linux.c b/coregrind/m_syswrap/syswrap-linux.c index 25d9a95..d04a081 100644 --- a/coregrind/m_syswrap/syswrap-linux.c +++ b/coregrind/m_syswrap/syswrap-linux.c @@ -1291,24 +1291,28 @@ PRE(sys_clock_adjtime) PRE_REG_READ2(long, "clock_adjtime", vki_clockid_t, id, struct timex *, buf); PRE_MEM_READ( "clock_adjtime(timex->modes)", ARG2, sizeof(tx->modes)); -#define ADJX(bits,field) \ - if (tx->modes & (bits)) \ - PRE_MEM_READ( "clock_adjtime(timex->"#field")", \ - (Addr)&tx->field, sizeof(tx->field)) - - if (tx->modes & VKI_ADJ_ADJTIME) { - if (!(tx->modes & VKI_ADJ_OFFSET_READONLY)) - PRE_MEM_READ( "clock_adjtime(timex->offset)", (Addr)&tx->offset, sizeof(tx->offset)); - } else { - ADJX(VKI_ADJ_OFFSET, offset); - ADJX(VKI_ADJ_FREQUENCY, freq); - ADJX(VKI_ADJ_MAXERROR, maxerror); - ADJX(VKI_ADJ_ESTERROR, esterror); - ADJX(VKI_ADJ_STATUS, status); - ADJX(VKI_ADJ_TIMECONST|VKI_ADJ_TAI, constant); - ADJX(VKI_ADJ_TICK, tick); - } + if (ML_(safe_to_deref) (tx, sizeof(struct vki_timex))) { + PRE_MEM_READ( "clock_adjtime(timex->modes)", ARG2, sizeof(tx->modes)); + +#define ADJX(bits,field) \ + if (tx->modes & (bits)) \ + PRE_MEM_READ( "clock_adjtime(timex->"#field")", \ + (Addr)&tx->field, sizeof(tx->field)) + + if (tx->modes & VKI_ADJ_ADJTIME) { + if (!(tx->modes & VKI_ADJ_OFFSET_READONLY)) + PRE_MEM_READ( "clock_adjtime(timex->offset)", (Addr)&tx->offset, sizeof(tx->offset)); + } else { + ADJX(VKI_ADJ_OFFSET, offset); + ADJX(VKI_ADJ_FREQUENCY, freq); + ADJX(VKI_ADJ_MAXERROR, maxerror); + ADJX(VKI_ADJ_ESTERROR, esterror); + ADJX(VKI_ADJ_STATUS, status); + ADJX(VKI_ADJ_TIMECONST|VKI_ADJ_TAI, constant); + ADJX(VKI_ADJ_TICK, tick); + } #undef ADJX + } PRE_MEM_WRITE( "adjtimex(timex)", ARG2, sizeof(struct vki_timex)); } |
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From: Paul F. <pj...@wa...> - 2020-01-15 12:58:29
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> On 15 Jan 2020, at 13:47, Rhys Kidd <rhy...@gm...> wrote: > > > Try running with ./valgrind -v <$program> and provide what is output. > > Hi Rhys I’ve attached the output. This is with the latest Xcode and macOS versions. |
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From: Rhys K. <rhy...@gm...> - 2020-01-15 12:47:58
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On Wed, 15 Jan 2020 at 06:17, Paul Floyd <pj...@wa...> wrote: > Hi > > I’m having quick look at building Valgrind on macOS Catalina > > I’m using this repo > > https://github.com/LouisBrunner/valgrind-macos.git > > Plus I’ve merged in the changes up to head from sourceware. > > After a few mods to configure.ac and a few of the Darwin files it builds > and I get > > ==39161== Lackey, an example Valgrind tool > ==39161== Copyright (C) 2002-2017, and GNU GPL'd, by Nicholas Nethercote. > ==39161== Using Valgrind-3.16.0.GIT and LibVEX; rerun with -h for > copyright info > ==39161== Command: pwd > ==39161== > ==39161== valgrind: Unrecognised instruction at address 0x1006037bd. > > In the past when I’ve seen this sort of thing there was also a vex printf > of the opcodes, but not in this case. > Try running with ./valgrind -v <$program> and provide what is output. > > Any suggestions what to try next? > > A+ > Paul > _______________________________________________ > Valgrind-developers mailing list > Val...@li... > https://lists.sourceforge.net/lists/listinfo/valgrind-developers > |
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From: Paul F. <pj...@wa...> - 2020-01-14 19:16:25
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Hi I’m having quick look at building Valgrind on macOS Catalina I’m using this repo https://github.com/LouisBrunner/valgrind-macos.git <https://github.com/LouisBrunner/valgrind-macos.git> Plus I’ve merged in the changes up to head from sourceware. After a few mods to configure.ac and a few of the Darwin files it builds and I get ==39161== Lackey, an example Valgrind tool ==39161== Copyright (C) 2002-2017, and GNU GPL'd, by Nicholas Nethercote. ==39161== Using Valgrind-3.16.0.GIT and LibVEX; rerun with -h for copyright info ==39161== Command: pwd ==39161== ==39161== valgrind: Unrecognised instruction at address 0x1006037bd. In the past when I’ve seen this sort of thing there was also a vex printf of the opcodes, but not in this case. Any suggestions what to try next? A+ Paul |
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From: Petar J. <pe...@so...> - 2020-01-14 17:47:49
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=8b809cdbba8dbb8ae3093bf68653e47dbff7e215 commit 8b809cdbba8dbb8ae3093bf68653e47dbff7e215 Author: Petar Jovanovic <mip...@gm...> Date: Tue Jan 14 17:45:00 2020 +0000 mips: Implement Iex_CCall for nanoMIPS Implement Iex_CCall for nanoMIPS. This fixes none/tests/nestedfns. Patch by Stefan Maksimovic. Diff: --- VEX/priv/host_nanomips_isel.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/VEX/priv/host_nanomips_isel.c b/VEX/priv/host_nanomips_isel.c index 59adf58..d348f21 100644 --- a/VEX/priv/host_nanomips_isel.c +++ b/VEX/priv/host_nanomips_isel.c @@ -877,8 +877,23 @@ static HReg iselWordExpr_R_wrk(ISelEnv * env, IRExpr * e) } case Iex_CCall: { - /* unimplemented yet */ - vassert(0); + HReg r_dst = newVRegI(env); + UInt addToSp = 0; + RetLoc rloc = mk_RetLoc_INVALID(); + + /* Be very restrictive for now. Only 32-bit ints allowed for + args, and 32 bits for return type. Don't forget to change + the RetLoc if more return types are allowed in future. */ + vassert(Ity_I32 == e->Iex.CCall.retty); + + /* Marshal args, do the call, clear stack. */ + doHelperCall(&rloc, env, NULL /*guard*/, e->Iex.CCall.cee, + e->Iex.CCall.retty, e->Iex.CCall.args); + vassert(is_sane_RetLoc(rloc)); + vassert(rloc.pri == RLPri_Int); + vassert(addToSp == 0); + addInstr(env, mk_iMOVds_RR(r_dst, hregNANOMIPS_GPR4())); + return r_dst; } default: |
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From: Petar J. <pe...@so...> - 2020-01-14 17:38:34
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=3501c118dfb9b4fbd3bd005f30e2cafc65f6fed8 commit 3501c118dfb9b4fbd3bd005f30e2cafc65f6fed8 Author: Petar Jovanovic <mip...@gm...> Date: Tue Jan 14 17:37:21 2020 +0000 mips: Fix BEQC[16] and BNEC[16] instructions for nanoMIPS Instruction decoding was not correct. In some cases, BEQC has been decoded as BNEC and vice versa. It caused problems with musl malloc() function. Patch by Stefan Maksimovic. Diff: --- VEX/priv/guest_nanomips_toIR.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/VEX/priv/guest_nanomips_toIR.c b/VEX/priv/guest_nanomips_toIR.c index f06370f..0cc80b0 100755 --- a/VEX/priv/guest_nanomips_toIR.c +++ b/VEX/priv/guest_nanomips_toIR.c @@ -2201,10 +2201,12 @@ static void nano_p16br(DisResult *dres, UShort cins) putPC(getIReg(rt)); dres->whatNext = Dis_StopHere; } else { - UChar rt = GPR3_list[(cins >> 7) & 0x07]; - UChar rs = GPR3_list[(cins >> 4) & 0x07]; + UChar rt3 = (cins >> 7) & 0x07; + UChar rs3 = (cins >> 4) & 0x07; + UChar rt = GPR3_list[rt3]; + UChar rs = GPR3_list[rs3]; - if (rs < rt) { /* beqc[16] */ + if (rs3 < rt3) { /* beqc[16] */ DIP("beqc r%u, r%u, %X", rt, rs, guest_PC_curr_instr + 2 + u); ir_for_branch(dres, binop(Iop_CmpEQ32, getIReg(rt), getIReg(rs)), 2, (Int)u); |
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From: Petar J. <pe...@so...> - 2020-01-14 17:38:30
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=d7b2a29718daa9dad66b609d2bc6166a62db38ef commit d7b2a29718daa9dad66b609d2bc6166a62db38ef Author: Aleksandar Rikalo <ale...@rt...> Date: Tue Jan 14 17:24:29 2020 +0000 mips: Fix return from syscall mechanism for nanoMIPS - Restore guest sigmask in VG_(sigframe_destroy) - Use "syscall[32]" asm idiom instead of "syscall" with immediate parameter in VG_(nanomips_linux_SUBST_FOR_rt_sigreturn) - Call ML_(fixup_guest_state_to_restart_syscall) from PRE(sys_rt_sigreturn) - Tiny code refactor of sigframe-nanomips-linux.c This fixes none/tests/thread-exits. Diff: --- coregrind/m_sigframe/sigframe-nanomips-linux.c | 6 ++++-- coregrind/m_syswrap/syswrap-nanomips-linux.c | 6 ++++++ coregrind/m_trampoline.S | 4 ++-- 3 files changed, 12 insertions(+), 4 deletions(-) diff --git a/coregrind/m_sigframe/sigframe-nanomips-linux.c b/coregrind/m_sigframe/sigframe-nanomips-linux.c index 222ca24..cdf329c 100644 --- a/coregrind/m_sigframe/sigframe-nanomips-linux.c +++ b/coregrind/m_sigframe/sigframe-nanomips-linux.c @@ -150,7 +150,7 @@ void VG_(sigframe_create)( ThreadId tid, * Arguments to signal handler: * * a0 = signal number - * a1 = 0 (should be cause) + * a1 = pointer to siginfo_t * a2 = pointer to ucontext * * $25 and c0_epc point to the signal handler, $29 points to @@ -196,9 +196,11 @@ void VG_(sigframe_destroy)( ThreadId tid, Bool isRT ) { tst = VG_(get_ThreadState)(tid); frame = (struct rt_sigframe *)(Addr)tst->arch.vex.guest_r29; priv1 = &frame->priv; + vg_assert(priv1->magicPI == 0x31415927); ucp = &frame->rs_uc; + tst->sig_mask = ucp->uc_sigmask; + tst->tmp_sig_mask = ucp->uc_sigmask; mc = &ucp->uc_mcontext; - vg_assert(priv1->magicPI == 0x31415927); tst->arch.vex.guest_r1 = mc->sc_regs[1]; tst->arch.vex.guest_r2 = mc->sc_regs[2]; tst->arch.vex.guest_r3 = mc->sc_regs[3]; diff --git a/coregrind/m_syswrap/syswrap-nanomips-linux.c b/coregrind/m_syswrap/syswrap-nanomips-linux.c index db13bd7..4ab9bcc 100644 --- a/coregrind/m_syswrap/syswrap-nanomips-linux.c +++ b/coregrind/m_syswrap/syswrap-nanomips-linux.c @@ -471,10 +471,16 @@ POST(sys_ptrace) PRE(sys_rt_sigreturn) { + ThreadState* tst; PRINT ("rt_sigreturn ( )"); vg_assert (VG_ (is_valid_tid) (tid)); vg_assert (tid >= 1 && tid < VG_N_THREADS); vg_assert (VG_ (is_running_thread) (tid)); + + tst = VG_(get_ThreadState)(tid); + + ML_(fixup_guest_state_to_restart_syscall)(&tst->arch); + /* Restore register state from frame and remove it */ VG_ (sigframe_destroy) (tid, True); /* Tell the driver not to update the guest state with the "result", diff --git a/coregrind/m_trampoline.S b/coregrind/m_trampoline.S index eb89f02..c2d6429 100644 --- a/coregrind/m_trampoline.S +++ b/coregrind/m_trampoline.S @@ -1326,8 +1326,8 @@ VG_(trampoline_stuff_start): .global VG_(nanomips_linux_SUBST_FOR_rt_sigreturn) VG_(nanomips_linux_SUBST_FOR_rt_sigreturn): - li $t4,__NR_rt_sigreturn - syscall 1 + li $t4, __NR_rt_sigreturn + syscall[32] .long 0 .global VG_(nanomips_linux_REDIR_FOR_index) |
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From: Petar J. <pe...@so...> - 2020-01-14 12:44:26
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=8557d219283e321a9976755895cf34cbe02f3ccd commit 8557d219283e321a9976755895cf34cbe02f3ccd Author: Petar Jovanovic <mip...@gm...> Date: Tue Jan 14 12:43:13 2020 +0000 mips: Add membarrier syscall for nanoMIPS This fixes none/tests/linux/membarrier. Diff: --- coregrind/m_syswrap/syswrap-nanomips-linux.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/coregrind/m_syswrap/syswrap-nanomips-linux.c b/coregrind/m_syswrap/syswrap-nanomips-linux.c index 0badf56..db13bd7 100644 --- a/coregrind/m_syswrap/syswrap-nanomips-linux.c +++ b/coregrind/m_syswrap/syswrap-nanomips-linux.c @@ -805,7 +805,7 @@ static SyscallTableEntry syscall_main_table[] = { // (__NR_bpf, sys_ni_syscall), // (__NR_execveat, sys_ni_syscall), // (__NR_userfaultfd, sys_ni_syscall), - // (__NR_membarrier, sys_ni_syscall), + LINX_ (__NR_membarrier, sys_membarrier), // (__NR_mlock2, sys_ni_syscall), // (__NR_copy_file_range, sys_ni_syscall), // (__NR_preadv2, sys_ni_syscall), |
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From: Petar J. <pe...@so...> - 2020-01-14 12:44:24
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=ab8807ee5398408fe09a9ea5a2ea8804e4cbade2 commit ab8807ee5398408fe09a9ea5a2ea8804e4cbade2 Author: Petar Jovanovic <mip...@gm...> Date: Tue Jan 14 12:40:09 2020 +0000 mips: Add Iop_ROTX for nanoMIPS Implement Iop_ROTX and use it for ROTX instruction. Fixes libvexmultiarch_test and libvex_test. Patch by: Aleksandra Karadzic and Nikola Milutinovic. Diff: --- VEX/priv/guest_nanomips_toIR.c | 145 +++++++---------------------------------- VEX/priv/host_nanomips_defs.c | 14 +++- VEX/priv/host_nanomips_defs.h | 1 + VEX/priv/host_nanomips_isel.c | 17 +++++ 4 files changed, 54 insertions(+), 123 deletions(-) diff --git a/VEX/priv/guest_nanomips_toIR.c b/VEX/priv/guest_nanomips_toIR.c index 7233a73..f06370f 100755 --- a/VEX/priv/guest_nanomips_toIR.c +++ b/VEX/priv/guest_nanomips_toIR.c @@ -216,11 +216,6 @@ static IRExpr *mkU32(UInt i) return IRExpr_Const(IRConst_U32(i)); } -static IRExpr *mkU64(ULong i) -{ - return IRExpr_Const(IRConst_U64(i)); -} - static void putPC(IRExpr * e) { stmt(IRStmt_Put(OFFB_PC, e)); @@ -285,6 +280,11 @@ static IRExpr *binop(IROp op, IRExpr * a1, IRExpr * a2) return IRExpr_Binop(op, a1, a2); } +static IRExpr *qop(IROp op, IRExpr * a1, IRExpr * a2, IRExpr * a3, IRExpr * a4) +{ + return IRExpr_Qop(op, a1, a2, a3, a4); +} + /* Generate a new temporary of the given type. */ static IRTemp newTemp(IRType ty) { @@ -466,11 +466,23 @@ static void nano_pl32a0(DisResult *dres, UInt cins) IRConst_U32(guest_PC_curr_instr + 4), OFFB_PC)); } else { /* teq */ - DIP("teq r%u, r%u", rs, rt); - stmt(IRStmt_Exit(binop(Iop_CmpEQ32, getIReg(rs), - getIReg(rt)), Ijk_SigTRAP, - IRConst_U32(guest_PC_curr_instr + 4), - OFFB_PC)); + UChar trap_code = (cins >> 11) & 0x1F; + DIP("teq r%u, r%u %u", rs, rt, trap_code); + if (trap_code == 7) + stmt(IRStmt_Exit(binop(Iop_CmpEQ32, getIReg(rs), + getIReg(rt)), Ijk_SigFPE_IntDiv, + IRConst_U32(guest_PC_curr_instr + 4), + OFFB_PC)); + else if (trap_code == 6) + stmt(IRStmt_Exit(binop(Iop_CmpEQ32, getIReg(rs), + getIReg(rt)), Ijk_SigFPE_IntOvf, + IRConst_U32(guest_PC_curr_instr + 4), + OFFB_PC)); + else + stmt(IRStmt_Exit(binop(Iop_CmpEQ32, getIReg(rs), + getIReg(rt)), Ijk_SigTRAP, + IRConst_U32(guest_PC_curr_instr + 4), + OFFB_PC)); } break; @@ -1232,118 +1244,9 @@ static void nano_protx(UInt cins) switch ((cins >> 5) & 0x41) { case 0x00: { /* rotx */ - int i; - IRTemp t0 = newTemp(Ity_I64); - IRTemp t1 = newTemp(Ity_I64); - IRTemp t2 = newTemp(Ity_I64); - IRTemp t3 = newTemp(Ity_I64); - IRTemp t4 = newTemp(Ity_I64); - IRTemp t5 = newTemp(Ity_I64); - IRTemp tmp = newTemp(Ity_I64); - IRTemp s = newTemp(Ity_I32); DIP("rotx r%u, r%u, %u, %u, %u", rt, rs, shift, shiftx, stripe); - assign(t0, binop(Iop_Or64, getIReg(rs), binop(Iop_Shl64, - getIReg(rs), mkU8(32)))); - assign(t1, mkexpr(t0)); - - for (i = 0; i < 46; i++) { - assign(s, IRExpr_ITE(binop(Iop_And32, mkU32(i), mkU32(0x08)), - mkU32(shift), mkU32(shiftx))); - assign(s, IRExpr_ITE(binop(Iop_And32, mkU32(stripe), - binop(Iop_CmpNE32, mkU32(0x0), - binop(Iop_And32, - mkU32(i), mkU32(0x04)))), - unop(Iop_Not32, mkU32(s)), mkexpr(s))); - assign(tmp, binop(Iop_Or64, binop(Iop_And64, - binop(Iop_Shr64, mkexpr(t0), - mkU8(0x10)), - binop(Iop_Shl64, mkU64(0x01), - mkU8(i))), - binop(Iop_And64, mkexpr(t1), - unop(Iop_Not64, - binop(Iop_Shl64, mkU64(0x01), - mkU8(i)))))); - assign(t1, IRExpr_ITE(binop(Iop_And32, mkexpr(s), mkU32(0x10)), - mkexpr(tmp), - mkexpr(t1))); - - } - - assign(t2, mkexpr(t1)); - - for (i = 0; i < 38; i++) { - assign(s, IRExpr_ITE(binop(Iop_And32, mkU32(i), mkU32(0x04)), - mkU32(shift), mkU32(shiftx))); - assign(tmp, binop(Iop_Or64, - binop(Iop_And64, - binop(Iop_Shr64, mkexpr(t1), mkU8(0x08)), - binop(Iop_Shl64, mkU64(0x01), mkU8(i))), - binop(Iop_And64, mkexpr(t2), - unop(Iop_Not64, binop(Iop_Shl64, - mkU64(0x01), - mkU8(i)))))); - assign(t2, IRExpr_ITE(binop(Iop_And32, mkexpr(s), mkU32(0x08)), - mkexpr(tmp), - mkexpr(t2))); - - } - - assign(t3, mkexpr(t2)); - - for (i = 0; i < 34; i++) { - assign(s, IRExpr_ITE(binop(Iop_And32, mkU32(i), mkU32(0x02)), - mkU32(shift), mkU32(shiftx))); - assign(tmp, binop(Iop_Or64, - binop(Iop_And64, - binop(Iop_Shr64, mkexpr(t2), mkU8(0x04)), - binop(Iop_Shl64, mkU64(0x01), mkU8(i))), - binop(Iop_And64, mkexpr(t3), - unop(Iop_Not64, binop(Iop_Shl64, - mkU64(0x01), - mkU8(i)))))); - assign(t3, IRExpr_ITE(binop(Iop_And32, mkexpr(s), mkU32(0x04)), - mkexpr(tmp), - mkexpr(t3))); - - } - - assign(t4, mkexpr(t3)); - - for (i = 0; i < 32; i++) { - assign(s, IRExpr_ITE(binop(Iop_And32, mkU32(i), mkU32(0x01)), - mkU32(shift), mkU32(shiftx))); - assign(tmp, binop(Iop_Or64, - binop(Iop_And64, - binop(Iop_Shr64, mkexpr(t3), mkU8(0x02)), - binop(Iop_Shl64, mkU64(0x01), mkU8(i))), - binop(Iop_And64, mkexpr(t4), - unop(Iop_Not64, binop(Iop_Shl64, - mkU64(0x01), - mkU8(i)))))); - assign(t4, IRExpr_ITE(binop(Iop_And32, mkexpr(s), mkU32(0x02)), - mkexpr(tmp), - mkexpr(t4))); - - } - - assign(t5, mkexpr(t4)); - - for (i = 0; i < 32; i++) { - assign(tmp, binop(Iop_Or64, - binop(Iop_And64, - binop(Iop_Shr64, mkexpr(t4), mkU8(0x01)), - binop(Iop_Shl64, mkU64(0x01), mkU8(i))), - binop(Iop_And64, mkexpr(t5), - unop(Iop_Not64, binop(Iop_Shl64, - mkU64(0x01), - mkU8(i)))))); - assign(t4, IRExpr_ITE(binop(Iop_And32, mkexpr(shift), mkU32(0x02)), - mkexpr(tmp), - mkexpr(t5))); - - } - - putIReg(rt, mkexpr(t5)); + putIReg(rt, qop(Iop_Rotx32, getIReg(rs), mkU8(shift), + mkU8(shiftx), mkU8(stripe))); break; } diff --git a/VEX/priv/host_nanomips_defs.c b/VEX/priv/host_nanomips_defs.c old mode 100644 new mode 100755 index 9f0b975..1b66947 --- a/VEX/priv/host_nanomips_defs.c +++ b/VEX/priv/host_nanomips_defs.c @@ -304,6 +304,9 @@ void ppNANOMIPSInstr(const NANOMIPSInstr* i) case NMimm_ANDI: vex_printf("andi "); break; + case NMimm_ROTX: + vex_printf("rotx "); + break; default: vassert(0); @@ -317,8 +320,11 @@ void ppNANOMIPSInstr(const NANOMIPSInstr* i) vex_printf(", "); } - vex_printf("0x%X (%d)", i->NMin.Imm.imm, (Int)i->NMin.Imm.imm); - + if (i->NMin.Imm.op == NMimm_ROTX) + vex_printf("%u, %u, %u", (i->NMin.Imm.imm >> 7) & 0xF, + (i->NMin.Imm.imm >> 6) & 1, i->NMin.Imm.imm & 0x1F); + else + vex_printf("0x%X (%d)", i->NMin.Imm.imm, (Int)i->NMin.Imm.imm); break; case NMin_Alu: @@ -1202,6 +1208,7 @@ static UChar *mkFormNanoPU12(UChar * p, UInt rt, UInt rs, UInt opc2, UInt imm) case PU12_ORI: /* ORI */ case PU12_SLTIU: /* SLTIU */ case PU12_XORI: /* XORI */ + case PU12_PROTX: /* ROTX */ theInstr = ((PU12 << 26) | (rt << 21) | (rs << 16) | (opc2 << 12) | (imm)); return emit32(p, theInstr); @@ -1380,6 +1387,9 @@ Int emit_NANOMIPSInstr ( /*MB_MOD*/Bool* is_profInc, p = mkFormNanoPU12(p, r_dst, r_src, i->NMin.Imm.op - 0x6, i->NMin.Imm.imm); break; + case NMimm_ROTX: + p = mkFormNanoPU12(p, r_dst, r_src, PU12_PROTX, i->NMin.Imm.imm); + break; default: goto bad; diff --git a/VEX/priv/host_nanomips_defs.h b/VEX/priv/host_nanomips_defs.h index d1b4939..6690ad0 100644 --- a/VEX/priv/host_nanomips_defs.h +++ b/VEX/priv/host_nanomips_defs.h @@ -179,6 +179,7 @@ typedef enum { NMimm_ORI = 0x06, /* Logical or */ NMimm_XORI = 0x07, /* Logical xor */ NMimm_ANDI = 0x08, /* Logical and */ + NMimm_ROTX = 0x09, /* Rotx */ } NANOMIPSImmOp; typedef enum { diff --git a/VEX/priv/host_nanomips_isel.c b/VEX/priv/host_nanomips_isel.c index fe60a49..59adf58 100644 --- a/VEX/priv/host_nanomips_isel.c +++ b/VEX/priv/host_nanomips_isel.c @@ -840,6 +840,23 @@ static HReg iselWordExpr_R_wrk(ISelEnv * env, IRExpr * e) vpanic("\n"); } + case Iex_Qop: { + HReg dst = newVRegI(env); + HReg src1 = iselWordExpr_R(env, e->Iex.Qop.details->arg1); + UChar src2 = e->Iex.Qop.details->arg2->Iex.Const.con->Ico.U8; + UChar src3 = e->Iex.Qop.details->arg3->Iex.Const.con->Ico.U8; + UChar src4 = e->Iex.Qop.details->arg4->Iex.Const.con->Ico.U8; + UInt imm = (src3 << 6) | (src4 << 6) | src2; + switch (e->Iex.Qop.details->op) { + case Iop_Rotx32: + addInstr(env, NANOMIPSInstr_Imm(NMimm_ROTX, dst, src1, imm)); + return dst; + default: + break; + } + break; + } + case Iex_ITE: { vassert(typeOfIRExpr(env->type_env, e->Iex.ITE.cond) == Ity_I1); HReg r0 = iselWordExpr_R(env, e->Iex.ITE.iffalse); |