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From: Petar J. <pe...@so...> - 2019-12-31 15:57:14
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=192c1673c75737c9ea6b5af7cfdc7b0681759933 commit 192c1673c75737c9ea6b5af7cfdc7b0681759933 Author: Petar Jovanovic <mip...@gm...> Date: Tue Dec 31 15:56:23 2019 +0000 mips: update tests to compile for nanoMIPS Update the tests so they can be compiled for nanoMIPS. Patch by Dimitrije Nikolic and Aleksandra Karadzic. Diff: --- helgrind/tests/tc07_hbl1.c | 14 ++++++++++++++ helgrind/tests/tc08_hbl2.c | 14 ++++++++++++++ helgrind/tests/tc11_XCHG.c | 17 +++++++++++++++++ memcheck/tests/atomic_incs.c | 9 +++++---- memcheck/tests/leak.h | 27 +++++++++++++++++++++++++++ memcheck/tests/unit_libcbase.c | 3 ++- none/tests/libvex_test.c | 9 +++++++-- perf/bigcode.c | 2 ++ 8 files changed, 88 insertions(+), 7 deletions(-) diff --git a/helgrind/tests/tc07_hbl1.c b/helgrind/tests/tc07_hbl1.c index 1744dc1..3972b51 100644 --- a/helgrind/tests/tc07_hbl1.c +++ b/helgrind/tests/tc07_hbl1.c @@ -39,6 +39,8 @@ # define PLAT_s390x_linux 1 #elif defined(__linux__) && defined(__mips__) # define PLAT_mips32_linux 1 +#elif defined(__linux__) && defined(__nanomips__) +# define PLAT_nanomips_linux 1 #elif defined(__sun__) && defined(__i386__) # define PLAT_x86_solaris 1 #elif defined(__sun__) && defined(__x86_64__) @@ -110,6 +112,18 @@ : /*out*/ : /*in*/ "r"(&(_lval)) \ : /*trash*/ "$8", "$9", "$10", "cc", "memory" \ ) +#elif defined(PLAT_nanomips_linux) +# define INC(_lval,_lqual) \ + __asm__ __volatile__ ( \ + "1:\n" \ + " move $t0, %0\n" \ + " ll $t1, 0($t0)\n" \ + " addiu $t1, $t1, 1\n" \ + " sc $t1, 0($t0)\n" \ + " beqc $t1, $zero, 1b\n" \ + : /*out*/ : /*in*/ "r"(&(_lval)) \ + : /*trash*/ "$t0", "$t1", "memory" \ + ) #else # error "Fix Me for this platform" #endif diff --git a/helgrind/tests/tc08_hbl2.c b/helgrind/tests/tc08_hbl2.c index f660d82..e84ecec 100644 --- a/helgrind/tests/tc08_hbl2.c +++ b/helgrind/tests/tc08_hbl2.c @@ -60,6 +60,8 @@ #else # define PLAT_mips32_linux 1 #endif +#elif defined(__linux__) && defined(__nanomips__) +# define PLAT_nanomips_linux 1 #elif defined(__sun__) && defined(__i386__) # define PLAT_x86_solaris 1 #elif defined(__sun__) && defined(__x86_64__) @@ -130,6 +132,18 @@ : /*out*/ : /*in*/ "r"(&(_lval)) \ : /*trash*/ "t0", "t1", "memory" \ ) +#elif defined(PLAT_nanomips_linux) +# define INC(_lval,_lqual) \ + __asm__ __volatile__ ( \ + "1:\n" \ + " move $t0, %0\n" \ + " ll $t1, 0($t0)\n" \ + " addiu $t1, $t1, 1\n" \ + " sc $t1, 0($t0)\n" \ + " beqc $t1, $zero, 1b\n" \ + : /*out*/ : /*in*/ "r"(&(_lval)) \ + : /*trash*/ "$t0", "$t1", "memory" \ + ) #else # error "Fix Me for this platform" #endif diff --git a/helgrind/tests/tc11_XCHG.c b/helgrind/tests/tc11_XCHG.c index 48fc1b1..15167e8 100644 --- a/helgrind/tests/tc11_XCHG.c +++ b/helgrind/tests/tc11_XCHG.c @@ -41,6 +41,8 @@ # define PLAT_s390x_linux 1 #elif defined(__linux__) && defined(__mips__) # define PLAT_mips32_linux 1 +#elif defined(__linux__) && defined(__nanomips__) +# define PLAT_nanomips_linux 1 #elif defined(__sun__) && defined(__i386__) # define PLAT_x86_solaris 1 #elif defined(__sun__) && defined(__x86_64__) @@ -98,6 +100,21 @@ # define XCHG_M_R_with_redundant_LOCK(_addr,_lval) \ XCHG_M_R(_addr,_lval) +#elif defined(PLAT_nanomips_linux) +# define XCHG_M_R(_addr,_lval) \ + __asm__ __volatile__( \ + "move $t0, %2\n" \ + "move $t1, %1\n" \ + "ll $t2, 0($t1)\n" \ + "sc $t0, 0($t1)\n" \ + "move %0, $t2\n" \ + : /*out*/ "=r"(_lval) \ + : /*in*/ "r"(&_addr), "r"(_lval) \ + : "$t0", "$t1", "$t1", "memory" \ + ) + +# define XCHG_M_R_with_redundant_LOCK(_addr,_lval) \ + XCHG_M_R(_addr,_lval) #elif defined(PLAT_ppc32_linux) || defined(PLAT_ppc64_linux) \ || defined(PLAT_arm_linux) || defined(PLAT_arm64_linux) diff --git a/memcheck/tests/atomic_incs.c b/memcheck/tests/atomic_incs.c index b6816d7..f931750 100644 --- a/memcheck/tests/atomic_incs.c +++ b/memcheck/tests/atomic_incs.c @@ -146,7 +146,7 @@ __attribute__((noinline)) void atomic_add_8bit ( char* p, int n ) : "+m" (*p), "+m" (dummy) : "d" (n) : "cc", "memory", "0", "1"); -#elif defined(VGA_mips32) +#elif defined(VGA_mips32) || defined (VGA_nanomips) /* We rely on the fact that p is 4-aligned. Otherwise 'll' may throw an exception that can cause this function to fail. */ #if defined (_MIPSEL) @@ -362,7 +362,7 @@ __attribute__((noinline)) void atomic_add_16bit ( short* p, int n ) : "+m" (*p), "+m" (dummy) : "d" (n) : "cc", "memory", "0", "1"); -#elif defined(VGA_mips32) +#elif defined(VGA_mips32) || defined (VGA_nanomips) /* We rely on the fact that p is 4-aligned. Otherwise 'll' may throw an exception that can cause this function to fail. */ #if defined (_MIPSEL) @@ -571,7 +571,7 @@ __attribute__((noinline)) void atomic_add_32bit ( int* p, int n ) : "+m" (*p) : "d" (n) : "cc", "memory", "0", "1"); -#elif defined(VGA_mips32) +#elif defined(VGA_mips32) || defined (VGA_nanomips) unsigned int block[3] = { (unsigned int)p, (unsigned int)n, 0x0 }; do { @@ -612,7 +612,8 @@ __attribute__((noinline)) void atomic_add_32bit ( int* p, int n ) __attribute__((noinline)) void atomic_add_64bit ( long long int* p, int n ) { -#if defined(VGA_x86) || defined(VGA_ppc32) || defined(VGA_mips32) +#if defined(VGA_x86) || defined(VGA_ppc32) || defined(VGA_mips32) \ + || defined (VGA_nanomips) /* do nothing; is not supported */ #elif defined(VGA_amd64) // this is a bit subtle. It relies on the fact that, on a 64-bit platform, diff --git a/memcheck/tests/leak.h b/memcheck/tests/leak.h index a1f93e8..9056cf0 100644 --- a/memcheck/tests/leak.h +++ b/memcheck/tests/leak.h @@ -60,6 +60,33 @@ __asm__ __volatile__( "li 11, 0" : : :/*trash*/"r11" ); \ __asm__ __volatile__( "li 12, 0" : : :/*trash*/"r12" ); \ } while (0) +#elif defined(__nanomips__) +#define CLEAR_CALLER_SAVED_REGS \ + do { \ + __asm__ __volatile__ (".set push \n\t" \ + ".set noat \n\t" \ + "move $at, $zero \n\t" \ + "move $t4, $zero \n\t" \ + "move $t5, $zero \n\t" \ + "move $a0, $zero \n\t" \ + "move $a1, $zero \n\t" \ + "move $a2, $zero \n\t" \ + "move $a3, $zero \n\t" \ + "move $a4, $zero \n\t" \ + "move $a5, $zero \n\t" \ + "move $a6, $zero \n\t" \ + "move $a7, $zero \n\t" \ + "move $t0, $zero \n\t" \ + "move $t1, $zero \n\t" \ + "move $t2, $zero \n\t" \ + "move $t3, $zero \n\t" \ + "move $t8, $zero \n\t" \ + "move $t9, $zero \n\t" \ + ".set pop \n\t" \ + : : : "$at", "$t4", "$t5", "$a0", "$a1", "$a2", \ + "$a3", "$a4", "$a5", "$a6", "$a7", "$t0", \ + "$t1", "$t2", "$t3", "$t8", "$t9"); \ + } while (0) #elif (__mips == 32) #define CLEAR_CALLER_SAVED_REGS \ do { \ diff --git a/memcheck/tests/unit_libcbase.c b/memcheck/tests/unit_libcbase.c index 2944cea..0ce65be 100644 --- a/memcheck/tests/unit_libcbase.c +++ b/memcheck/tests/unit_libcbase.c @@ -15,7 +15,8 @@ unsigned long VKI_PAGE_SIZE = 1UL << 12; #elif defined(VGP_arm64_linux) unsigned long VKI_PAGE_SIZE = 1UL << 16; -#elif defined(VGP_mips32_linux) || defined(VGP_mips64_linux) +#elif defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \ + || defined (VGP_nanomips_linux) #include <unistd.h> unsigned long VKI_PAGE_SIZE; #endif diff --git a/none/tests/libvex_test.c b/none/tests/libvex_test.c index bb1738a..5b57a4c 100644 --- a/none/tests/libvex_test.c +++ b/none/tests/libvex_test.c @@ -74,6 +74,8 @@ __attribute__((noinline)) static void get_guest_arch(VexArch *ga) *ga = VexArchMIPS32; #elif defined(VGA_mips64) *ga = VexArchMIPS64; +#elif defined(VGA_nanomips) + *ga = VexArchNANOMIPS; #else missing arch; #endif @@ -94,6 +96,7 @@ static VexEndness arch_endness (VexArch va) { case VexArchS390X: return VexEndnessBE; case VexArchMIPS32: case VexArchMIPS64: + case VexArchNANOMIPS: /* mips32/64 supports BE or LE, but at compile time. If mips64 is compiled on a non mips system, the VEX lib is missing bit and pieces of code related to endianness. @@ -105,7 +108,7 @@ static VexEndness arch_endness (VexArch va) { VexArch ga; get_guest_arch( &ga); - if (ga == VexArchMIPS64 || ga == VexArchMIPS32) + if (ga == VexArchMIPS64 || ga == VexArchMIPS32 || ga == VexArchNANOMIPS) return running_endness(); else return VexEndnessBE; @@ -135,6 +138,7 @@ static UInt arch_hwcaps (VexArch va) { case VexArchMIPS32: return VEX_PRID_COMP_MIPS; case VexArchMIPS64: return VEX_PRID_COMP_MIPS | VEX_MIPS_HOST_FR; #endif + case VexArchNANOMIPS: return 0; default: failure_exit(); } } @@ -151,6 +155,7 @@ static Bool mode64 (VexArch va) { case VexArchS390X: return True; case VexArchMIPS32: return False; case VexArchMIPS64: return True; + case VexArchNANOMIPS: return False; default: failure_exit(); } } @@ -270,7 +275,7 @@ int main(int argc, char **argv) // explicitly via command line arguments. if (multiarch) { VexArch va; - for (va = VexArchX86; va <= VexArchMIPS64; va++) { + for (va = VexArchX86; va <= VexArchNANOMIPS; va++) { vta.arch_host = va; vta.archinfo_host.endness = arch_endness (vta.arch_host); vta.archinfo_host.hwcaps = arch_hwcaps (vta.arch_host); diff --git a/perf/bigcode.c b/perf/bigcode.c index 02e069d..e2adf0e 100644 --- a/perf/bigcode.c +++ b/perf/bigcode.c @@ -85,6 +85,8 @@ int main(int argc, char* argv[]) #if defined(__mips__) syscall(__NR_cacheflush, a, FN_SIZE * n_fns, ICACHE); +#elif defined(__nanomips__) + __builtin___clear_cache(a, (char*)a + FN_SIZE * n_fns); #endif for (h = 0; h < n_reps; h += 1) { |
|
From: Petar J. <pe...@so...> - 2019-12-31 12:11:13
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=deae79f733a7c69f183f0e29a720e6c5bc3c1e7f commit deae79f733a7c69f183f0e29a720e6c5bc3c1e7f Author: Petar Jovanovic <mip...@gm...> Date: Tue Dec 31 12:05:33 2019 +0000 mips: Add nanoMIPS support to Valgrind 4/4 Necessary changes to support nanoMIPS on Linux. Part 4/4 - Other changes (mainly include/*) Patch by Aleksandar Rikalo, Dimitrije Nikolic, Tamara Vlahovic, Nikola Milutinovic and Aleksandra Karadzic. Related KDE issue: #400872. Diff: --- .gitignore | 1 + Makefile.all.am | 7 + NEWS | 6 +- README | 1 + README.mips | 8 + configure.ac | 30 +- include/Makefile.am | 3 + include/pub_tool_basics.h | 13 +- include/pub_tool_guest.h | 2 +- include/pub_tool_libcsetjmp.h | 2 +- include/pub_tool_machine.h | 6 + include/pub_tool_vkiscnums_asm.h | 3 + include/valgrind.h | 489 ++++++++++++++++++++ include/vki/vki-linux.h | 4 + include/vki/vki-nanomips-linux.h | 681 ++++++++++++++++++++++++++++ include/vki/vki-posixtypes-nanomips-linux.h | 68 +++ include/vki/vki-scnums-nanomips-linux.h | 322 +++++++++++++ tests/arch_test.c | 3 + 18 files changed, 1639 insertions(+), 10 deletions(-) diff --git a/.gitignore b/.gitignore index bacb265..ae2cdc9 100644 --- a/.gitignore +++ b/.gitignore @@ -49,6 +49,7 @@ /auxprogs/getoff-ppc64le-linux /auxprogs/getoff-mips32-linux /auxprogs/getoff-mips64-linux +/auxprogs/getoff-nanomips-linux /auxprogs/getoff-amd64-solaris /auxprogs/getoff-x86-solaris /auxprogs/libmpiwrap-PPC32_LINUX.so diff --git a/Makefile.all.am b/Makefile.all.am index 3786e34..6d88670 100644 --- a/Makefile.all.am +++ b/Makefile.all.am @@ -245,6 +245,12 @@ AM_CFLAGS_PSO_MIPS32_LINUX = @FLAG_M32@ $(AM_CFLAGS_BASE) \ $(AM_CFLAGS_PSO_BASE) AM_CCASFLAGS_MIPS32_LINUX = @FLAG_M32@ -g +AM_FLAG_M3264_NANOMIPS_LINUX = @FLAG_M32@ +AM_CFLAGS_NANOMIPS_LINUX = @FLAG_M32@ $(AM_CFLAGS_BASE) -mno-jump-table-opt +AM_CFLAGS_PSO_NANOMIPS_LINUX = @FLAG_M32@ $(AM_CFLAGS_BASE) \ + $(AM_CFLAGS_PSO_BASE) +AM_CCASFLAGS_NANOMIPS_LINUX = @FLAG_M32@ -g + AM_FLAG_M3264_MIPS64_LINUX = @FLAG_M64@ AM_CFLAGS_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) AM_CFLAGS_PSO_MIPS64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) \ @@ -307,6 +313,7 @@ PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386 PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64 PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ PRELOAD_LDFLAGS_MIPS32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ +PRELOAD_LDFLAGS_NANOMIPS_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@ PRELOAD_LDFLAGS_MIPS64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ PRELOAD_LDFLAGS_X86_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M32@ PRELOAD_LDFLAGS_AMD64_SOLARIS = $(PRELOAD_LDFLAGS_COMMON_SOLARIS) @FLAG_M64@ diff --git a/NEWS b/NEWS index 826c07b..28d8027 100644 --- a/NEWS +++ b/NEWS @@ -9,7 +9,7 @@ This release supports X86/Linux, AMD64/Linux, ARM32/Linux, ARM64/Linux, PPC32/Linux, PPC64BE/Linux, PPC64LE/Linux, S390X/Linux, MIPS32/Linux, MIPS64/Linux, ARM/Android, ARM64/Android, MIPS32/Android, X86/Android, X86/Solaris, AMD64/Solaris and AMD64/MacOSX 10.12. There is also preliminary -support for X86/macOS 10.13 and AMD64/macOS 10.13. +support for X86/macOS 10.13, AMD64/macOS 10.13 and nanoMIPS/Linux. * ==================== CORE CHANGES =================== @@ -25,6 +25,10 @@ support for X86/macOS 10.13 and AMD64/macOS 10.13. Your program can also change the dynamically changeable options using the client request VALGRIND_CLO_CHANGE(option). +* ================== PLATFORM CHANGES ================= + +* mips: preliminary support for nanoMIPS instruction set has been added. + * ==================== TOOL CHANGES ==================== * DHAT: diff --git a/README b/README index 0d3ac1d..511027a 100644 --- a/README +++ b/README @@ -43,6 +43,7 @@ platforms: - S390X/Linux - MIPS32/Linux - MIPS64/Linux +- nanoMIPS/Linux - X86/Solaris - AMD64/Solaris diff --git a/README.mips b/README.mips index 0df334a..82b00a5 100644 --- a/README.mips +++ b/README.mips @@ -29,6 +29,12 @@ CFLAGS="-mips64 -mabi=64" will do the trick and compile Valgrind correctly. * --host=mipsel-linux-gnu is necessary if you compile it with cross toolchain compiler for little endian platform. + * --host=nanomipseb-linux-gnu is necessary if you compile it with cross toolchain + compiler for nanoMIPS big endian platform. + + * --host=nanomips-linux-gnu is necessary if you compile it with cross toolchain + compiler for nanoMIPS little endian platform. + * --build=mips-linux is needed if you want to build it for MIPS32 on 64-bit MIPS system. @@ -51,3 +57,5 @@ Limitations no appropriate architecture flag is specified during configure time. Be sure to set either mips32 or mips32r2 as the target architecture in that case. +- Some tests can not be compiled for nanoMIPS due to limitations in + preliminary GCC for nanoMIPS. You can use '-i' switch for building tests. diff --git a/configure.ac b/configure.ac index 8e73d8d..0d0e220 100755 --- a/configure.ac +++ b/configure.ac @@ -286,6 +286,10 @@ case "${host_cpu}" in AC_MSG_RESULT([ok (${host_cpu})]) ARCH_MAX="mips64" ;; + nanomips) + AC_MSG_RESULT([ok (${host_cpu})]) + ARCH_MAX="nanomips" + ;; *) AC_MSG_RESULT([no (${host_cpu})]) @@ -784,6 +788,17 @@ case "$ARCH_MAX-$VGCONF_OS" in fi AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})]) ;; + nanomips-linux) + VGCONF_ARCH_PRI="nanomips" + VGCONF_ARCH_SEC="" + VGCONF_PLATFORM_PRI_CAPS="NANOMIPS_LINUX" + VGCONF_PLATFORM_SEC_CAPS="" + valt_load_address_pri_norml="0x58000000" + valt_load_address_pri_inner="0x38000000" + valt_load_address_sec_norml="0xUNSET" + valt_load_address_sec_inner="0xUNSET" + AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})]) + ;; x86-solaris) VGCONF_ARCH_PRI="x86" VGCONF_ARCH_SEC="" @@ -871,6 +886,8 @@ AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_MIPS32, -o x$VGCONF_PLATFORM_SEC_CAPS = xMIPS32_LINUX ) AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_MIPS64, test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX ) +AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_NANOMIPS, + test x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX ) # Set up VGCONF_PLATFORMS_INCLUDE_<platform>. Either one or two of these # become defined. @@ -899,6 +916,8 @@ AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_MIPS32_LINUX, -o x$VGCONF_PLATFORM_SEC_CAPS = xMIPS32_LINUX) AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_MIPS64_LINUX, test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX) +AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_NANOMIPS_LINUX, + test x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX) AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_X86_DARWIN, test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \ -o x$VGCONF_PLATFORM_SEC_CAPS = xX86_DARWIN) @@ -924,7 +943,8 @@ AM_CONDITIONAL(VGCONF_OS_IS_LINUX, -o x$VGCONF_PLATFORM_PRI_CAPS = xARM64_LINUX \ -o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX \ -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX) + -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX \ + -o x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX) AM_CONDITIONAL(VGCONF_OS_IS_DARWIN, test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \ -o x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_DARWIN) @@ -1814,6 +1834,8 @@ case "${host_cpu}" in AC_SUBST(FLAG_M64) fi ;; + nanomips*) + ;; *) # does this compiler support -m32 ? AC_MSG_CHECKING([if gcc accepts -m32]) @@ -4286,9 +4308,10 @@ AM_CONDITIONAL([HAVE_PREADV2_PWRITEV2], [test x$ac_cv_func_preadv2 = xyes && test x$ac_cv_func_pwritev2 = xyes]) if test x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX ; then + -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS64_LINUX \ + -o x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX; then AC_DEFINE([DISABLE_PTHREAD_SPINLOCK_INTERCEPT], 1, - [Disable intercept pthread_spin_lock() on MIPS32 and MIPS64.]) + [Disable intercept pthread_spin_lock() on MIPS32, MIPS64 and nanoMIPS.]) fi #---------------------------------------------------------------------------- @@ -4307,6 +4330,7 @@ if test x$VGCONF_PLATFORM_PRI_CAPS = xX86_LINUX \ -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_LINUX \ -o x$VGCONF_PLATFORM_PRI_CAPS = xARM_LINUX \ -o x$VGCONF_PLATFORM_PRI_CAPS = xMIPS32_LINUX \ + -o x$VGCONF_PLATFORM_PRI_CAPS = xNANOMIPS_LINUX \ -o x$VGCONF_PLATFORM_PRI_CAPS = xX86_SOLARIS ; then mflag_primary=$FLAG_M32 elif test x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_LINUX \ diff --git a/include/Makefile.am b/include/Makefile.am index 11c7ca8..9bf02c2 100644 --- a/include/Makefile.am +++ b/include/Makefile.am @@ -59,6 +59,7 @@ nobase_pkginclude_HEADERS = \ vki/vki-posixtypes-s390x-linux.h \ vki/vki-posixtypes-mips32-linux.h \ vki/vki-posixtypes-mips64-linux.h \ + vki/vki-posixtypes-nanomips-linux.h \ vki/vki-amd64-linux.h \ vki/vki-arm64-linux.h \ vki/vki-ppc32-linux.h \ @@ -68,6 +69,7 @@ nobase_pkginclude_HEADERS = \ vki/vki-s390x-linux.h \ vki/vki-mips32-linux.h \ vki/vki-mips64-linux.h \ + vki/vki-nanomips-linux.h \ vki/vki-scnums-amd64-linux.h \ vki/vki-scnums-arm64-linux.h \ vki/vki-scnums-ppc32-linux.h \ @@ -77,6 +79,7 @@ nobase_pkginclude_HEADERS = \ vki/vki-scnums-s390x-linux.h \ vki/vki-scnums-mips32-linux.h \ vki/vki-scnums-mips64-linux.h \ + vki/vki-scnums-nanomips-linux.h \ vki/vki-scnums-darwin.h \ vki/vki-scnums-solaris.h \ vki/vki-xen.h \ diff --git a/include/pub_tool_basics.h b/include/pub_tool_basics.h index 4580e06..d1119e1 100644 --- a/include/pub_tool_basics.h +++ b/include/pub_tool_basics.h @@ -294,7 +294,11 @@ static inline UWord sr_Res ( SysRes sr ) { return sr._isError ? 0 : sr._val; } static inline UWord sr_Err ( SysRes sr ) { +#if defined(VGP_nanomips_linux) + return sr._isError ? -sr._val : 0; +#else return sr._isError ? sr._val : 0; +#endif } static inline Bool sr_EQ ( UInt sysno, SysRes sr1, SysRes sr2 ) { /* sysno is ignored for Linux/not-MIPS */ @@ -401,11 +405,12 @@ static inline Bool sr_EQ ( UInt sysno, SysRes sr1, SysRes sr2 ) { #undef VG_LITTLEENDIAN #if defined(VGA_x86) || defined(VGA_amd64) || defined (VGA_arm) \ - || ((defined(VGA_mips32) || defined(VGA_mips64)) && defined (_MIPSEL)) \ - || defined(VGA_arm64) || defined(VGA_ppc64le) + || ((defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_nanomips)) \ + && defined (_MIPSEL)) || defined(VGA_arm64) || defined(VGA_ppc64le) # define VG_LITTLEENDIAN 1 #elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_s390x) \ - || ((defined(VGA_mips32) || defined(VGA_mips64)) && defined (_MIPSEB)) + || ((defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_nanomips)) \ + && defined (_MIPSEB)) # define VG_BIGENDIAN 1 #else # error Unknown arch @@ -449,7 +454,7 @@ static inline Bool sr_EQ ( UInt sysno, SysRes sr1, SysRes sr2 ) { || defined(VGA_ppc64be) || defined(VGA_ppc64le) \ || defined(VGA_arm) || defined(VGA_s390x) \ || defined(VGA_mips32) || defined(VGA_mips64) \ - || defined(VGA_arm64) + || defined(VGA_arm64) || defined(VGA_nanomips) # define VG_REGPARM(n) /* */ #else # error Unknown arch diff --git a/include/pub_tool_guest.h b/include/pub_tool_guest.h index c0b36f8..08a72ef 100644 --- a/include/pub_tool_guest.h +++ b/include/pub_tool_guest.h @@ -56,7 +56,7 @@ #elif defined(VGA_s390x) # include "libvex_guest_s390x.h" typedef VexGuestS390XState VexGuestArchState; -#elif defined(VGA_mips32) +#elif defined(VGA_mips32) || defined(VGA_nanomips) # include "libvex_guest_mips32.h" typedef VexGuestMIPS32State VexGuestArchState; #elif defined(VGA_mips64) diff --git a/include/pub_tool_libcsetjmp.h b/include/pub_tool_libcsetjmp.h index 681450c..03da232 100644 --- a/include/pub_tool_libcsetjmp.h +++ b/include/pub_tool_libcsetjmp.h @@ -110,7 +110,7 @@ __attribute__((noreturn)) __attribute__((regparm(1))) // ditto void VG_MINIMAL_LONGJMP(VG_MINIMAL_JMP_BUF(_env)); -#elif defined(VGP_mips32_linux) +#elif defined(VGP_mips32_linux) || defined(VGP_nanomips_linux) #define VG_MINIMAL_JMP_BUF(_name) ULong _name [104 / sizeof(ULong)] __attribute__((returns_twice)) diff --git a/include/pub_tool_machine.h b/include/pub_tool_machine.h index 1cdf19c..4779eea 100644 --- a/include/pub_tool_machine.h +++ b/include/pub_tool_machine.h @@ -102,6 +102,12 @@ # define VG_CLREQ_SZB 20 # define VG_STACK_REDZONE_SZB 0 +#elif defined(VGP_nanomips_linux) +# define VG_MIN_INSTR_SZB 2 +# define VG_MAX_INSTR_SZB 6 +# define VG_CLREQ_SZB 20 +# define VG_STACK_REDZONE_SZB 0 + #else # error Unknown platform #endif diff --git a/include/pub_tool_vkiscnums_asm.h b/include/pub_tool_vkiscnums_asm.h index af1552f..6ede6f9 100644 --- a/include/pub_tool_vkiscnums_asm.h +++ b/include/pub_tool_vkiscnums_asm.h @@ -67,6 +67,9 @@ # include "vki/vki-scnums-32bit-linux.h" # include "vki/vki-scnums-mips32-linux.h" +#elif defined(VGP_nanomips_linux) +# include "vki/vki-scnums-nanomips-linux.h" + #elif defined(VGP_mips64_linux) # include "vki/vki-scnums-shared-linux.h" # include "vki/vki-scnums-mips64-linux.h" diff --git a/include/valgrind.h b/include/valgrind.h index 9323e2c..c8b24a3 100644 --- a/include/valgrind.h +++ b/include/valgrind.h @@ -122,6 +122,7 @@ #undef PLAT_s390x_linux #undef PLAT_mips32_linux #undef PLAT_mips64_linux +#undef PLAT_nanomips_linux #undef PLAT_x86_solaris #undef PLAT_amd64_solaris @@ -159,6 +160,8 @@ # define PLAT_mips64_linux 1 #elif defined(__linux__) && defined(__mips__) && (__mips==32) # define PLAT_mips32_linux 1 +#elif defined(__linux__) && defined(__nanomips__) +# define PLAT_nanomips_linux 1 #elif defined(__sun) && defined(__i386__) # define PLAT_x86_solaris 1 #elif defined(__sun) && defined(__x86_64__) @@ -1045,6 +1048,75 @@ typedef #endif /* PLAT_mips64_linux */ +#if defined(PLAT_nanomips_linux) + +typedef + struct { + unsigned int nraddr; /* where's the code? */ + } + OrigFn; +/* + 8000 c04d srl zero, zero, 13 + 8000 c05d srl zero, zero, 29 + 8000 c043 srl zero, zero, 3 + 8000 c053 srl zero, zero, 19 +*/ + +#define __SPECIAL_INSTRUCTION_PREAMBLE "srl[32] $zero, $zero, 13 \n\t" \ + "srl[32] $zero, $zero, 29 \n\t" \ + "srl[32] $zero, $zero, 3 \n\t" \ + "srl[32] $zero, $zero, 19 \n\t" + +#define VALGRIND_DO_CLIENT_REQUEST_EXPR( \ + _zzq_default, _zzq_request, \ + _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \ + __extension__ \ + ({ volatile unsigned int _zzq_args[6]; \ + volatile unsigned int _zzq_result; \ + _zzq_args[0] = (unsigned int)(_zzq_request); \ + _zzq_args[1] = (unsigned int)(_zzq_arg1); \ + _zzq_args[2] = (unsigned int)(_zzq_arg2); \ + _zzq_args[3] = (unsigned int)(_zzq_arg3); \ + _zzq_args[4] = (unsigned int)(_zzq_arg4); \ + _zzq_args[5] = (unsigned int)(_zzq_arg5); \ + __asm__ volatile("move $a7, %1\n\t" /* default */ \ + "move $t0, %2\n\t" /* ptr */ \ + __SPECIAL_INSTRUCTION_PREAMBLE \ + /* $a7 = client_request( $t0 ) */ \ + "or[32] $t0, $t0, $t0\n\t" \ + "move %0, $a7\n\t" /* result */ \ + : "=r" (_zzq_result) \ + : "r" (_zzq_default), "r" (&_zzq_args[0]) \ + : "$a7", "$t0", "memory"); \ + _zzq_result; \ + }) + +#define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \ + { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \ + volatile unsigned long int __addr; \ + __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ + /* $a7 = guest_NRADDR */ \ + "or[32] $t1, $t1, $t1\n\t" \ + "move %0, $a7" /*result*/ \ + : "=r" (__addr) \ + : \ + : "$a7"); \ + _zzq_orig->nraddr = __addr; \ + } + +#define VALGRIND_CALL_NOREDIR_T9 \ + __SPECIAL_INSTRUCTION_PREAMBLE \ + /* call-noredir $25 */ \ + "or[32] $t2, $t2, $t2\n\t" + +#define VALGRIND_VEX_INJECT_IR() \ + do { \ + __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ + "or[32] $t3, $t3, $t3\n\t" \ + ); \ + } while (0) + +#endif /* Insert assembly code for other platforms here... */ #endif /* NVALGRIND */ @@ -5686,6 +5758,422 @@ typedef #endif /* PLAT_mips32_linux */ +/* ------------------------- nanomips-linux -------------------- */ + +#if defined(PLAT_nanomips_linux) + +/* These regs are trashed by the hidden call. */ +#define __CALLER_SAVED_REGS "$t4", "$t5", "$a0", "$a1", "$a2", \ +"$a3", "$a4", "$a5", "$a6", "$a7", "$t0", "$t1", "$t2", "$t3", \ +"$t8","$t9", "$at" + +/* These CALL_FN_ macros assume that on mips-linux, sizeof(unsigned + long) == 4. */ + +#define CALL_FN_W_v(lval, orig) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[1]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + __asm__ volatile( \ + "lw $t9, 0(%1)\n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0\n" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) + +#define CALL_FN_W_W(lval, orig, arg1) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[2]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + _argvec[1] = (unsigned long)(arg1); \ + __asm__ volatile( \ + "lw $t9, 0(%1)\n\t" \ + "lw $a0, 4(%1)\n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0\n" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) + +#define CALL_FN_W_WW(lval, orig, arg1,arg2) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[3]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + _argvec[1] = (unsigned long)(arg1); \ + _argvec[2] = (unsigned long)(arg2); \ + __asm__ volatile( \ + "lw $t9, 0(%1)\n\t" \ + "lw $a0, 4(%1)\n\t" \ + "lw $a1, 8(%1)\n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0\n" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) + +#define CALL_FN_W_WWW(lval, orig, arg1,arg2,arg3) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[4]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + _argvec[1] = (unsigned long)(arg1); \ + _argvec[2] = (unsigned long)(arg2); \ + _argvec[3] = (unsigned long)(arg3); \ + __asm__ volatile( \ + "lw $t9, 0(%1)\n\t" \ + "lw $a0, 4(%1)\n\t" \ + "lw $a1, 8(%1)\n\t" \ + "lw $a2,12(%1)\n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0\n" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) + +#define CALL_FN_W_WWWW(lval, orig, arg1,arg2,arg3,arg4) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[5]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + _argvec[1] = (unsigned long)(arg1); \ + _argvec[2] = (unsigned long)(arg2); \ + _argvec[3] = (unsigned long)(arg3); \ + _argvec[4] = (unsigned long)(arg4); \ + __asm__ volatile( \ + "lw $t9, 0(%1)\n\t" \ + "lw $a0, 4(%1)\n\t" \ + "lw $a1, 8(%1)\n\t" \ + "lw $a2,12(%1)\n\t" \ + "lw $a3,16(%1)\n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0\n" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) + +#define CALL_FN_W_5W(lval, orig, arg1,arg2,arg3,arg4,arg5) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[6]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + _argvec[1] = (unsigned long)(arg1); \ + _argvec[2] = (unsigned long)(arg2); \ + _argvec[3] = (unsigned long)(arg3); \ + _argvec[4] = (unsigned long)(arg4); \ + _argvec[5] = (unsigned long)(arg5); \ + __asm__ volatile( \ + "lw $t9, 0(%1)\n\t" \ + "lw $a0, 4(%1)\n\t" \ + "lw $a1, 8(%1)\n\t" \ + "lw $a2,12(%1)\n\t" \ + "lw $a3,16(%1)\n\t" \ + "lw $a4,20(%1)\n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0\n" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) +#define CALL_FN_W_6W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[7]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + _argvec[1] = (unsigned long)(arg1); \ + _argvec[2] = (unsigned long)(arg2); \ + _argvec[3] = (unsigned long)(arg3); \ + _argvec[4] = (unsigned long)(arg4); \ + _argvec[5] = (unsigned long)(arg5); \ + _argvec[6] = (unsigned long)(arg6); \ + __asm__ volatile( \ + "lw $t9, 0(%1)\n\t" \ + "lw $a0, 4(%1)\n\t" \ + "lw $a1, 8(%1)\n\t" \ + "lw $a2,12(%1)\n\t" \ + "lw $a3,16(%1)\n\t" \ + "lw $a4,20(%1)\n\t" \ + "lw $a5,24(%1)\n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0\n" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) + +#define CALL_FN_W_7W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \ + arg7) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[8]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + _argvec[1] = (unsigned long)(arg1); \ + _argvec[2] = (unsigned long)(arg2); \ + _argvec[3] = (unsigned long)(arg3); \ + _argvec[4] = (unsigned long)(arg4); \ + _argvec[5] = (unsigned long)(arg5); \ + _argvec[6] = (unsigned long)(arg6); \ + _argvec[7] = (unsigned long)(arg7); \ + __asm__ volatile( \ + "lw $t9, 0(%1)\n\t" \ + "lw $a0, 4(%1)\n\t" \ + "lw $a1, 8(%1)\n\t" \ + "lw $a2,12(%1)\n\t" \ + "lw $a3,16(%1)\n\t" \ + "lw $a4,20(%1)\n\t" \ + "lw $a5,24(%1)\n\t" \ + "lw $a6,28(%1)\n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0\n" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) + +#define CALL_FN_W_8W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \ + arg7,arg8) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[9]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + _argvec[1] = (unsigned long)(arg1); \ + _argvec[2] = (unsigned long)(arg2); \ + _argvec[3] = (unsigned long)(arg3); \ + _argvec[4] = (unsigned long)(arg4); \ + _argvec[5] = (unsigned long)(arg5); \ + _argvec[6] = (unsigned long)(arg6); \ + _argvec[7] = (unsigned long)(arg7); \ + _argvec[8] = (unsigned long)(arg8); \ + __asm__ volatile( \ + "lw $t9, 0(%1)\n\t" \ + "lw $a0, 4(%1)\n\t" \ + "lw $a1, 8(%1)\n\t" \ + "lw $a2,12(%1)\n\t" \ + "lw $a3,16(%1)\n\t" \ + "lw $a4,20(%1)\n\t" \ + "lw $a5,24(%1)\n\t" \ + "lw $a6,28(%1)\n\t" \ + "lw $a7,32(%1)\n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0\n" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) + +#define CALL_FN_W_9W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \ + arg7,arg8,arg9) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[10]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + _argvec[1] = (unsigned long)(arg1); \ + _argvec[2] = (unsigned long)(arg2); \ + _argvec[3] = (unsigned long)(arg3); \ + _argvec[4] = (unsigned long)(arg4); \ + _argvec[5] = (unsigned long)(arg5); \ + _argvec[6] = (unsigned long)(arg6); \ + _argvec[7] = (unsigned long)(arg7); \ + _argvec[8] = (unsigned long)(arg8); \ + _argvec[9] = (unsigned long)(arg9); \ + __asm__ volatile( \ + "addiu $sp, $sp, -16 \n\t" \ + "lw $t9,36(%1) \n\t" \ + "sw $t9, 0($sp) \n\t" \ + "lw $t9, 0(%1) \n\t" \ + "lw $a0, 4(%1) \n\t" \ + "lw $a1, 8(%1) \n\t" \ + "lw $a2,12(%1) \n\t" \ + "lw $a3,16(%1) \n\t" \ + "lw $a4,20(%1) \n\t" \ + "lw $a5,24(%1) \n\t" \ + "lw $a6,28(%1) \n\t" \ + "lw $a7,32(%1) \n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0 \n\t" \ + "addiu $sp, $sp, 16 \n\t" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) + +#define CALL_FN_W_10W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \ + arg7,arg8,arg9,arg10) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[11]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + _argvec[1] = (unsigned long)(arg1); \ + _argvec[2] = (unsigned long)(arg2); \ + _argvec[3] = (unsigned long)(arg3); \ + _argvec[4] = (unsigned long)(arg4); \ + _argvec[5] = (unsigned long)(arg5); \ + _argvec[6] = (unsigned long)(arg6); \ + _argvec[7] = (unsigned long)(arg7); \ + _argvec[8] = (unsigned long)(arg8); \ + _argvec[9] = (unsigned long)(arg9); \ + _argvec[10] = (unsigned long)(arg10); \ + __asm__ volatile( \ + "addiu $sp, $sp, -16 \n\t" \ + "lw $t9,36(%1) \n\t" \ + "sw $t9, 0($sp) \n\t" \ + "lw $t9,40(%1) \n\t" \ + "sw $t9, 4($sp) \n\t" \ + "lw $t9, 0(%1) \n\t" \ + "lw $a0, 4(%1) \n\t" \ + "lw $a1, 8(%1) \n\t" \ + "lw $a2,12(%1) \n\t" \ + "lw $a3,16(%1) \n\t" \ + "lw $a4,20(%1) \n\t" \ + "lw $a5,24(%1) \n\t" \ + "lw $a6,28(%1) \n\t" \ + "lw $a7,32(%1) \n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0 \n\t" \ + "addiu $sp, $sp, 16 \n\t" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) + +#define CALL_FN_W_11W(lval, orig, arg1,arg2,arg3,arg4,arg5, \ + arg6,arg7,arg8,arg9,arg10, \ + arg11) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[12]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + _argvec[1] = (unsigned long)(arg1); \ + _argvec[2] = (unsigned long)(arg2); \ + _argvec[3] = (unsigned long)(arg3); \ + _argvec[4] = (unsigned long)(arg4); \ + _argvec[5] = (unsigned long)(arg5); \ + _argvec[6] = (unsigned long)(arg6); \ + _argvec[7] = (unsigned long)(arg7); \ + _argvec[8] = (unsigned long)(arg8); \ + _argvec[9] = (unsigned long)(arg9); \ + _argvec[10] = (unsigned long)(arg10); \ + _argvec[11] = (unsigned long)(arg11); \ + __asm__ volatile( \ + "addiu $sp, $sp, -16 \n\t" \ + "lw $t9,36(%1) \n\t" \ + "sw $t9, 0($sp) \n\t" \ + "lw $t9,40(%1) \n\t" \ + "sw $t9, 4($sp) \n\t" \ + "lw $t9,44(%1) \n\t" \ + "sw $t9, 8($sp) \n\t" \ + "lw $t9, 0(%1) \n\t" \ + "lw $a0, 4(%1) \n\t" \ + "lw $a1, 8(%1) \n\t" \ + "lw $a2,12(%1) \n\t" \ + "lw $a3,16(%1) \n\t" \ + "lw $a4,20(%1) \n\t" \ + "lw $a5,24(%1) \n\t" \ + "lw $a6,28(%1) \n\t" \ + "lw $a7,32(%1) \n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0 \n\t" \ + "addiu $sp, $sp, 16 \n\t" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) + +#define CALL_FN_W_12W(lval, orig, arg1,arg2,arg3,arg4,arg5, \ + arg6,arg7,arg8,arg9,arg10, \ + arg11,arg12) \ + do { \ + volatile OrigFn _orig = (orig); \ + volatile unsigned long _argvec[13]; \ + volatile unsigned long _res; \ + _argvec[0] = (unsigned long)_orig.nraddr; \ + _argvec[1] = (unsigned long)(arg1); \ + _argvec[2] = (unsigned long)(arg2); \ + _argvec[3] = (unsigned long)(arg3); \ + _argvec[4] = (unsigned long)(arg4); \ + _argvec[5] = (unsigned long)(arg5); \ + _argvec[6] = (unsigned long)(arg6); \ + _argvec[7] = (unsigned long)(arg7); \ + _argvec[8] = (unsigned long)(arg8); \ + _argvec[9] = (unsigned long)(arg9); \ + _argvec[10] = (unsigned long)(arg10); \ + _argvec[11] = (unsigned long)(arg11); \ + _argvec[12] = (unsigned long)(arg12); \ + __asm__ volatile( \ + "addiu $sp, $sp, -16 \n\t" \ + "lw $t9,36(%1) \n\t" \ + "sw $t9, 0($sp) \n\t" \ + "lw $t9,40(%1) \n\t" \ + "sw $t9, 4($sp) \n\t" \ + "lw $t9,44(%1) \n\t" \ + "sw $t9, 8($sp) \n\t" \ + "lw $t9,48(%1) \n\t" \ + "sw $t9,12($sp) \n\t" \ + "lw $t9, 0(%1) \n\t" \ + "lw $a0, 4(%1) \n\t" \ + "lw $a1, 8(%1) \n\t" \ + "lw $a2,12(%1) \n\t" \ + "lw $a3,16(%1) \n\t" \ + "lw $a4,20(%1) \n\t" \ + "lw $a5,24(%1) \n\t" \ + "lw $a6,28(%1) \n\t" \ + "lw $a7,32(%1) \n\t" \ + VALGRIND_CALL_NOREDIR_T9 \ + "move %0, $a0 \n\t" \ + "addiu $sp, $sp, 16 \n\t" \ + : /*out*/ "=r" (_res) \ + : /*in*/ "r" (&_argvec[0]) \ + : /*trash*/ "memory", __CALLER_SAVED_REGS \ + ); \ + lval = (__typeof__(lval)) _res; \ + } while (0) + +#endif /* PLAT_nanomips_linux */ + /* ------------------------- mips64-linux ------------------------- */ #if defined(PLAT_mips64_linux) @@ -6661,6 +7149,7 @@ VALGRIND_PRINTF_BACKTRACE(const char *format, ...) #undef PLAT_s390x_linux #undef PLAT_mips32_linux #undef PLAT_mips64_linux +#undef PLAT_nanomips_linux #undef PLAT_x86_solaris #undef PLAT_amd64_solaris diff --git a/include/vki/vki-linux.h b/include/vki/vki-linux.h index dd9b20f..91600db 100644 --- a/include/vki/vki-linux.h +++ b/include/vki/vki-linux.h @@ -95,6 +95,8 @@ # include "vki-posixtypes-mips32-linux.h" #elif defined(VGA_mips64) # include "vki-posixtypes-mips64-linux.h" +#elif defined(VGA_nanomips) +# include "vki-posixtypes-nanomips-linux.h" #else # error Unknown platform #endif @@ -221,6 +223,8 @@ typedef unsigned int vki_uint; # include "vki-mips32-linux.h" #elif defined(VGA_mips64) # include "vki-mips64-linux.h" +#elif defined(VGA_nanomips) +# include "vki-nanomips-linux.h" #else # error Unknown platform #endif diff --git a/include/vki/vki-nanomips-linux.h b/include/vki/vki-nanomips-linux.h new file mode 100644 index 0000000..7f42c25 --- /dev/null +++ b/include/vki/vki-nanomips-linux.h @@ -0,0 +1,681 @@ + +/*--------------------------------------------------------------------*/ +/*-- nanoMIPS/Linux-specific kernel interface vki-nanomips-linux.h --*/ +/*--------------------------------------------------------------------*/ + +/* + This file is part of Valgrind, a dynamic binary instrumentation + framework. + + Copyright (C) 2018 RT-RK + mip...@rt... + + This program is free software; you can redistribute it and/or + modify it under the terms of the GNU General Public License as + published by the Free Software Foundation; either version 2 of the + License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307, USA. + + The GNU General Public License is contained in the file COPYING. +*/ + +#ifndef __VKI_NANOMIPS_LINUX_H +#define __VKI_NANOMIPS_LINUX_H + +#include <config.h> + +#if defined (_MIPSEL) +#define VKI_LITTLE_ENDIAN 1 +#elif defined (_MIPSEB) +#define VKI_BIG_ENDIAN 1 +#endif + +#define VKI_PAGE_MASK (~(VKI_PAGE_SIZE - 1)) +#define VKI_MAX_PAGE_SHIFT 16 +#define VKI_MAX_PAGE_SIZE (1UL << VKI_MAX_PAGE_SHIFT) + +#define VKI_SIGHUP 1 +#define VKI_SIGINT 2 +#define VKI_SIGQUIT 3 +#define VKI_SIGILL 4 +#define VKI_SIGTRAP 5 +#define VKI_SIGABRT 6 +#define VKI_SIGIOT 6 +#define VKI_SIGBUS 7 +#define VKI_SIGFPE 8 +#define VKI_SIGKILL 9 +#define VKI_SIGUSR1 10 +#define VKI_SIGSEGV 11 +#define VKI_SIGUSR2 12 +#define VKI_SIGPIPE 13 +#define VKI_SIGALRM 14 +#define VKI_SIGTERM 15 +#define VKI_SIGSTKFLT 16 +#define VKI_SIGCHLD 17 +#define VKI_SIGCONT 18 +#define VKI_SIGSTOP 19 +#define VKI_SIGTSTP 20 +#define VKI_SIGTTIN 21 +#define VKI_SIGTTOU 22 +#define VKI_SIGURG 23 +#define VKI_SIGXCPU 24 +#define VKI_SIGXFSZ 25 +#define VKI_SIGVTALRM 26 +#define VKI_SIGPROF 27 +#define VKI_SIGWINCH 28 +#define VKI_SIGIO 29 +#define VKI_SIGPWR 30 +#define VKI_SIGSYS 31 +#define VKI_SIGRTMIN 32 + +#define VKI_SIG_BLOCK 0 /* for blocking signals */ +#define VKI_SIG_UNBLOCK 1 /* for unblocking signals */ +#define VKI_SIG_SETMASK 2 /* for setting the signal mask */ + +/* default signal handling */ +#define VKI_SIG_DFL ((__vki_sighandler_t)0) +/* ignore signal */ +#define VKI_SIG_IGN ((__vki_sighandler_t)1) + +#define VKI_SIGRTMAX _VKI_NSIG +#define VKI_MINSIGSTKSZ 2048 +#define _VKI_NSIG 64 +#define _VKI_NSIG_BPW 32 +#define _VKI_NSIG_WORDS (_VKI_NSIG / _VKI_NSIG_BPW) + +#define VKI_SA_NOCLDSTOP 0x00000001 +#define VKI_SA_NOCLDWAIT 0x00000002 +#define VKI_SA_SIGINFO 0x00000004 +#define VKI_SA_ONSTACK 0x08000000 +#define VKI_SA_RESTART 0x10000000 +#define VKI_SA_NODEFER 0x40000000 +#define VKI_SA_RESETHAND 0x80000000 +#define VKI_SA_RESTORER 0x04000000 +#define VKI_SA_NOMASK VKI_SA_NODEFER +#define VKI_SA_ONESHOT VKI_SA_RESETHAND + +#define VKI_SS_ONSTACK 1 +#define VKI_SS_DISABLE 2 + +#define VKI_PROT_NONE 0x0 /* No page permissions */ +#define VKI_PROT_READ 0x1 /* page can be read */ +#define VKI_PROT_WRITE 0x2 /* page can be written */ +#define VKI_PROT_EXEC 0x4 /* page can be executed */ +#define VKI_PROT_GROWSDOWN 0x1000000 /* mprotect flag: extend change to start + of growsdown vma */ +#define VKI_PROT_GROWSUP 0x2000000 /* mprotect flag: extend change to end + of growsup vma */ +#define VKI_MAP_SHARED 0x01 /* Share changes */ +#define VKI_MAP_PRIVATE 0x02 /* Changes are private */ +#define VKI_MAP_TYPE 0x0f /* Mask for type of mapping */ +#define VKI_MAP_FIXED 0x10 /* Interpret addr exactly */ +#define VKI_MAP_ANONYMOUS 0x0800 /* don't use a file */ +#define VKI_MAP_GROWSDOWN 0x1000 /* stack-like segment */ +#define VKI_MAP_DENYWRITE 0x2000 /* ETXTBSY */ +#define VKI_MAP_EXECUTABLE 0x4000 /* mark it as an executable */ +#define VKI_MAP_LOCKED 0x8000 /* pages are locked */ +#define VKI_MAP_NORESERVE 0x0400 /* don't check for reservations */ +#define VKI_MAP_POPULATE 0x10000 /* populate (prefault) pagetables */ +#define VKI_MAP_NONBLOCK 0x20000 /* do not block on IO */ + +#define VKI_O_ACCMODE 03 +#define VKI_O_RDONLY 00 +#define VKI_O_WRONLY 01 +#define VKI_O_RDWR 02 +#define VKI_O_APPEND 0x000400 +#define VKI_O_DSYNC 0x001000 +#define VKI_O_NONBLOCK 0x000800 +#define VKI_O_CREAT 0x000040 +#define VKI_O_TRUNC 0x000200 +#define VKI_O_EXCL 0x000080 +#define VKI_O_NOCTTY 0x000100 +#define VKI_FASYNC 0x002000 +#define VKI_O_LARGEFILE 0x008000 +#define __VKI_O_SYNC 0x101000 +#define VKI_O_DIRECT 0x004000 +#define VKI_O_CLOEXEC 0x080000 + +#define VKI_AT_FDCWD -100 +#define VKI_AT_EMPTY_PATH 0x1000 + +#define VKI_F_DUPFD 0 /* dup */ +#define VKI_F_GETFD 1 /* get close_on_exec */ +#define VKI_F_SETFD 2 /* set/clear close_on_exec */ +#define VKI_F_GETFL 3 /* get file->f_flags */ +#define VKI_F_SETFL 4 /* set file->f_flags */ +#define VKI_F_GETLK 5 +#define VKI_F_SETLK 6 +#define VKI_F_SETLKW 7 +#define VKI_F_SETOWN 8 /* for sockets. */ +#define VKI_F_GETOWN 9 /* for sockets. */ +#define VKI_F_SETSIG 10 /* for sockets. */ +#define VKI_F_GETSIG 11 /* for sockets. */ +#define VKI_F_GETLK64 12 +#define VKI_F_SETLK64 13 +#define VKI_F_SETLKW64 14 +#define VKI_F_SETOWN_EX 15 +#define VKI_F_GETOWN_EX 16 +#define VKI_F_OFD_GETLK 36 +#define VKI_F_OFD_SETLK 37 +#define VKI_F_OFD_SETLKW 38 +#define VKI_F_LINUX_SPECIFIC_BASE 1024 + +#define VKI_FD_CLOEXEC 1 + +#define VKI_RLIMIT_DATA 2 /* max data size */ +#define VKI_RLIMIT_STACK 3 /* max stack size */ +#define VKI_RLIMIT_CORE 4 /* max core file size */ +#define VKI_RLIMIT_NOFILE 7 /* max number of open files */ + +#define VKI_SOL_SOCKET 0xffff + +#define VKI_SO_TYPE 0x1008 + +#define _VKI_IOC_NRBITS 8 +#define _VKI_IOC_TYPEBITS 8 +#define _VKI_IOC_SIZEBITS 13 +#define _VKI_IOC_DIRBITS 3 + +#define _VKI_IOC_NRMASK ((1 << _VKI_IOC_NRBITS)-1) +#define _VKI_IOC_TYPEMASK ((1 << _VKI_IOC_TYPEBITS)-1) +#define _VKI_IOC_SIZEMASK ((1 << _VKI_IOC_SIZEBITS)-1) +#define _VKI_IOC_DIRMASK ((1 << _VKI_IOC_DIRBITS)-1) + +#define _VKI_IOC_NRSHIFT 0 +#define _VKI_IOC_TYPESHIFT (_VKI_IOC_NRSHIFT+_VKI_IOC_NRBITS) +#define _VKI_IOC_SIZESHIFT (_VKI_IOC_TYPESHIFT+_VKI_IOC_TYPEBITS) +#define _VKI_IOC_DIRSHIFT (_VKI_IOC_SIZESHIFT+_VKI_IOC_SIZEBITS) + +#define _VKI_IOC_NONE 1U +#define _VKI_IOC_READ 2U +#define _VKI_IOC_WRITE 4U + +#define _VKI_IOC(a,b,c,d) (((a)<<29) | ((b)<<8) | (c) | ((d)<<16)) + +#define _VKI_IO(type,nr) _VKI_IOC(_VKI_IOC_NONE,(type),(nr),0) +#define _VKI_IOR(type,nr,size) _VKI_IOC(_VKI_IOC_READ,(type),(nr), \ + (_VKI_IOC_TYPECHECK(size))) +#define _VKI_IOW(type,nr,size) _VKI_IOC(_VKI_IOC_WRITE,(type),(nr), \ + (_VKI_IOC_TYPECHECK(size))) +#define _VKI_IOWR(type,nr,size) _VKI_IOC(_VKI_IOC_READ|_VKI_IOC_WRITE,(type), \ + (nr),(_VKI_IOC_TYPECHECK(size))) + +#define _VKI_IOC_DIR(nr) (((nr) >> _VKI_IOC_DIRSHIFT) & _VKI_IOC_DIRMASK) +#define _VKI_IOC_TYPE(nr) (((nr) >> _VKI_IOC_TYPESHIFT) & _VKI_IOC_TYPEMASK) +#define _VKI_IOC_NR(nr) (((nr) >> _VKI_IOC_NRSHIFT) & _VKI_IOC_NRMASK) +#define _VKI_IOC_SIZE(nr) (((nr) >> _VKI_IOC_SIZESHIFT) & _VKI_IOC_SIZEMASK) + +#define VKI_TCGETA 0x5401 +#define VKI_TCSETA 0x5402 +#define VKI_TCSETAW 0x5403 +#define VKI_TCSETAF 0x5404 +#define VKI_TCSBRK 0x5405 +#define VKI_TCXONC 0x5406 +#define VKI_TCFLSH 0x5407 +#define VKI_TCGETS 0x540D +#define VKI_TCSETS 0x540E +#define VKI_TCSETSW 0x540F +#define VKI_TCSETSF 0x5410 + +#define VKI_FIONREAD 0x467F +#define VKI_FIOCLEX 0x6601 +#define VKI_FIONCLEX 0x6602 +#define VKI_FIOASYNC 0x667D +#define VKI_FIONBIO 0x667E +#define VKI_FIOQSIZE 0x667F + +#define VKI_TIOCSBRK 0x5427 /* BSD compatibility */ +#define VKI_TIOCCBRK 0x5428 /* BSD compatibility */ +#define VKI_TIOCPKT 0x5470 /* pty: set/clear packet mode */ +#define VKI_TIOCNOTTY 0x5471 +#define VKI_TIOCSTI 0x5472 /* simulate terminal input */ +#define VKI_TIOCSCTTY 0x5480 /* become controlling tty */ +#define VKI_TIOCGSOFTCAR 0x5481 +#define VKI_TIOCSSOFTCAR 0x5482 +#define VKI_TIOCLINUX 0x5483 +#define VKI_TIOCGSERIAL 0x5484 +#define VKI_TIOCSSERIAL 0x5485 +#define VKI_TCSBRKP 0x5486 /* Needed for POSIX tcsendbreak() */ +#define VKI_TIOCSERCONFIG 0x5488 +#define VKI_TIOCSERGWILD 0x5489 +#define VKI_TIOCSERSWILD 0x548a +#define VKI_TIOCGLCKTRMIOS 0x548b +#define VKI_TIOCSLCKTRMIOS 0x548c +#define VKI_TIOCSERGSTRUCT 0x548d /* For debugging only */ +#define VKI_TIOCSERGETLSR 0x548e /* Get line status register */ +#define VKI_TIOCSERGETMULTI 0x548f /* Get multiport config */ +#define VKI_TIOCSERSETMULTI 0x5490 /* Set multiport config */ +#define VKI_TIOCMIWAIT 0x5491 /* wait for a change on serial input line(s) */ +#define VKI_TIOCGICOUNT 0x5492 /* read serial port inline interrupt counts */ +#define VKI_TIOCGHAYESESP 0x5493 /* Get Hayes ESP configuration */ +#define VKI_TIOCSHAYESESP 0x5494 /* Set Hayes ESP configuration */ +#define VKI_TIOCGETD 0x7400 +#define VKI_TIOCSETD 0x7401 +#define VKI_TIOCGETP 0x7408 +#define VKI_TIOCSETP 0x7409 +#define VKI_TIOCSETN 0x740A /* TIOCSETP wo flush */ +#define VKI_TIOCEXCL 0x740D /* set exclusive use of tty */ +#define VKI_TIOCNXCL 0x740E /* reset exclusive use of tty */ +#define VKI_TIOCGSID 0x7416 /* Return the session ID of FD */ +#define VKI_TIOCMSET 0x741A /* set all modem bits */ +#define VKI_TIOCMBIS 0x741B /* bis modem bits */ +#define VKI_TIOCMBIC 0x741C /* bic modem bits */ +#define VKI_TIOCMGET 0x741D /* get all modem bits */ +#define VKI_TIOCOUTQ 0x7472 /* output queue size */ +#define VKI_TIOCGLTC 0x7474 +#define VKI_TIOCSLTC 0x7475 +#define VKI_TIOCINQ VKI_FIONREAD + +#define VKI_TIOCSWINSZ _VKI_IOW('t', 103, struct vki_winsize) +#define VKI_TIOCGWINSZ _VKI_IOR('t', 104, struct vki_winsize) +#define VKI_TIOCSPGRP _VKI_IOW('t', 118, int) +#define VKI_TIOCGPGRP _VKI_IOR('t', 119, int) +#define VKI_TIOCCONS _VKI_IOW('t', 120, int) +#define VKI_TIOCGPTN _VKI_IOR('T',0x30, unsigned int) +#define VKI_TIOCSPTLCK _VKI_IOW('T',0x31, int) + +#define VKI_TIOCPKT_DATA 0x00 /* data packet */ +#define VKI_TIOCPKT_FLUSHREAD 0x01 /* flush packet */ +#define VKI_TIOCPKT_FLUSHWRITE 0x02 /* flush packet */ +#define VKI_TIOCPKT_STOP 0x04 /* stop output */ +#define VKI_TIOCPKT_START 0x08 /* start output */ +#define VKI_TIOCPKT_NOSTOP 0x10 /* no more ^S, ^Q */ +#define VKI_TIOCPKT_DOSTOP 0x20 /* now do ^S ^Q */ + +#define NCC 8 +#define NCCS 23 + +#define VKI_SO_ATTACH_FILTER 26 + +#define VKI_SIOCATMARK _VKI_IOR('s', 7, int) +#define VKI_SIOCSPGRP _VKI_IOW('s', 8, vki_pid_t) +#define VKI_SIOCGPGRP _VKI_IOR('s', 9, vki_pid_t) +#define VKI_SIOCGSTAMP 0x8906 +#define VKI_SIOCGSTAMPNS 0x8907 + +#define VKI_POLLIN 0x0001 + +#define VKI_SEMOP 1 +#define VKI_SEMGET 2 +#define VKI_SEMCTL 3 +#define VKI_SEMTIMEDOP 4 +#define VKI_MSGSND 11 +#define VKI_MSGRCV 12 +#define VKI_MSGGET 13 +#define VKI_MSGCTL 14 +#define VKI_SHMAT 21 +#define VKI_SHMDT 22 +#define VKI_SHMGET 23 +#define VKI_SHMCTL 24 +#define VKI_SHMLBA 0x40000 + +#define VKI_EF_NANOMIPS_ABI 0x0000F000 +#define VKI_EF_NANOMIPS_ABI_P32 0x00001000 + +#define VKI_PTRACE_GETREGS 12 +#define VKI_PTRACE_SETREGS 13 +#define VKI_PTRACE_GETFPREGS 14 +#define VKI_PTRACE_SETFPREGS 15 + +#define VKI_MIPS32_EF_R0 6 +#define VKI_MIPS32_EF_R1 7 +#define VKI_MIPS32_EF_R2 8 +#define VKI_MIPS32_EF_R3 9 +#define VKI_MIPS32_EF_R4 10 +#define VKI_MIPS32_EF_R5 11 +#define VKI_MIPS32_EF_R6 12 +#define VKI_MIPS32_EF_R7 13 +#define VKI_MIPS32_EF_R8 14 +#define VKI_MIPS32_EF_R9 15 +#define VKI_MIPS32_EF_R10 16 +#define VKI_MIPS32_EF_R11 17 +#define VKI_MIPS32_EF_R12 18 +#define VKI_MIPS32_EF_R13 19 +#define VKI_MIPS32_EF_R14 20 +#define VKI_MIPS32_EF_R15 21 +#define VKI_MIPS32_EF_R16 22 +#define VKI_MIPS32_EF_R17 23 +#define VKI_MIPS32_EF_R18 24 +#define VKI_MIPS32_EF_R19 25 +#define VKI_MIPS32_EF_R20 26 +#define VKI_MIPS32_EF_R21 27 +#define VKI_MIPS32_EF_R22 28 +#define VKI_MIPS32_EF_R23 29 +#define VKI_MIPS32_EF_R24 30 +#define VKI_MIPS32_EF_R25 31 +#define VKI_MIPS32_EF_R26 32 +#define VKI_MIPS32_EF_R27 33 +#define VKI_MIPS32_EF_R28 34 +#def... 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From: Petar J. <pe...@so...> - 2019-12-31 12:11:08
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=741a51fba6f738a4a932e40b1e88ef64ccfed72e commit 741a51fba6f738a4a932e40b1e88ef64ccfed72e Author: Petar Jovanovic <mip...@gm...> Date: Tue Dec 31 12:09:34 2019 +0000 update .gitignore with /none/tests/sigprocmask Add /none/tests/sigprocmask to .gitignore. Diff: --- .gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index ae2cdc9..0d6f3af 100644 --- a/.gitignore +++ b/.gitignore @@ -1440,6 +1440,7 @@ /none/tests/sha1_test /none/tests/shortpush /none/tests/shorts +/none/tests/sigprocmask /none/tests/sigstackgrowth /none/tests/sigsusp /none/tests/smc1 |
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From: Petar J. <pe...@so...> - 2019-12-31 12:10:48
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=24c1f4ada32ce119dd4b1149c44c5c3d4b7f9b38 commit 24c1f4ada32ce119dd4b1149c44c5c3d4b7f9b38 Author: Petar Jovanovic <mip...@gm...> Date: Tue Dec 31 09:44:42 2019 +0000 mips: Add nanoMIPS support to Valgrind 3/4 Necessary changes to support nanoMIPS on Linux. Part 3/4 - Coregrind and tools changes Patch by Aleksandar Rikalo, Dimitrije Nikolic, Tamara Vlahovic, Nikola Milutinovic and Aleksandra Karadzic. Related KDE issue: #400872. Diff: --- Makefile.tool.am | 4 +++ cachegrind/cg_arch.c | 2 +- cachegrind/cg_branchpred.c | 3 +- coregrind/m_aspacemgr/aspacemgr-linux.c | 2 +- coregrind/m_libcproc.c | 4 +++ coregrind/m_signals.c | 32 ++++++++++++++++--- coregrind/m_syscall.c | 55 ++++++++++++++++++++++++++++++--- coregrind/m_syswrap/syswrap-generic.c | 11 ++++++- coregrind/m_syswrap/syswrap-linux.c | 2 +- coregrind/m_syswrap/syswrap-main.c | 30 +++++++++++++----- coregrind/pub_core_syscall.h | 2 +- drd/drd_bitmap.h | 3 +- drd/drd_load_store.c | 2 +- memcheck/mc_machine.c | 8 ++++- 14 files changed, 135 insertions(+), 25 deletions(-) diff --git a/Makefile.tool.am b/Makefile.tool.am index 677571f..cc2fa0e 100644 --- a/Makefile.tool.am +++ b/Makefile.tool.am @@ -75,6 +75,10 @@ TOOL_LDFLAGS_MIPS32_LINUX = \ -static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \ @FLAG_M32@ +TOOL_LDFLAGS_NANOMIPS_LINUX = \ + -static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \ + @FLAG_M32@ -Wl,-no-relax + TOOL_LDFLAGS_MIPS64_LINUX = \ -static -nodefaultlibs -nostartfiles -u __start @FLAG_NO_BUILD_ID@ \ @FLAG_M64@ diff --git a/cachegrind/cg_arch.c b/cachegrind/cg_arch.c index 7d03f21..57570dd 100644 --- a/cachegrind/cg_arch.c +++ b/cachegrind/cg_arch.c @@ -455,7 +455,7 @@ configure_caches(cache_t *I1c, cache_t *D1c, cache_t *LLc, *D1c = (cache_t) { 131072, 8, 256 }; *LLc = (cache_t) { 50331648, 24, 256 }; -#elif defined(VGA_mips32) +#elif defined(VGA_mips32) || defined(VGA_nanomips) // Set caches to default (for MIPS32-r2(mips 74kc)) *I1c = (cache_t) { 32768, 4, 32 }; diff --git a/cachegrind/cg_branchpred.c b/cachegrind/cg_branchpred.c index eb7bf99..ba433ec 100644 --- a/cachegrind/cg_branchpred.c +++ b/cachegrind/cg_branchpred.c @@ -43,7 +43,8 @@ /* How many bits at the bottom of an instruction address are guaranteed to be zero? */ #if defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le) \ - || defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_arm64) + || defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_nanomips) \ + || defined(VGA_arm64) # define N_IADDR_LO_ZERO_BITS 2 #elif defined(VGA_x86) || defined(VGA_amd64) # define N_IADDR_LO_ZERO_BITS 0 diff --git a/coregrind/m_aspacemgr/aspacemgr-linux.c b/coregrind/m_aspacemgr/aspacemgr-linux.c index 7c4c4eb..0eb3143 100644 --- a/coregrind/m_aspacemgr/aspacemgr-linux.c +++ b/coregrind/m_aspacemgr/aspacemgr-linux.c @@ -2680,7 +2680,7 @@ static SysRes VG_(am_mmap_file_float_valgrind_flags) ( SizeT length, UInt prot, req.rkind = MAny; req.start = 0; #if defined(VGA_arm) || defined(VGA_arm64) \ - || defined(VGA_mips32) || defined(VGA_mips64) + || defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_nanomips) aspacem_assert(VKI_SHMLBA >= VKI_PAGE_SIZE); #else aspacem_assert(VKI_SHMLBA == VKI_PAGE_SIZE); diff --git a/coregrind/m_libcproc.c b/coregrind/m_libcproc.c index fc5da96..e7aef7f 100644 --- a/coregrind/m_libcproc.c +++ b/coregrind/m_libcproc.c @@ -1252,6 +1252,10 @@ void VG_(invalidate_icache) ( void *ptr, SizeT nbytes ) (UWord) nbytes, (UWord) 3); vg_assert( !sr_isError(sres) ); +# elif defined(VGA_nanomips) + + __builtin___clear_cache(ptr, (char*)ptr + nbytes); + # endif } diff --git a/coregrind/m_signals.c b/coregrind/m_signals.c index 4c3e3db..720fb5f 100644 --- a/coregrind/m_signals.c +++ b/coregrind/m_signals.c @@ -572,6 +572,22 @@ typedef struct SigQueue { (srP)->misc.MIPS64.r28 = (uc)->uc_mcontext.sc_regs[28]; \ } +#elif defined(VGP_nanomips_linux) +# define VG_UCONTEXT_INSTR_PTR(uc) ((UWord)(((uc)->uc_mcontext.sc_pc))) +# define VG_UCONTEXT_STACK_PTR(uc) ((UWord)((uc)->uc_mcontext.sc_regs[29])) +# define VG_UCONTEXT_FRAME_PTR(uc) ((uc)->uc_mcontext.sc_regs[30]) +# define VG_UCONTEXT_SYSCALL_NUM(uc) ((uc)->uc_mcontext.sc_regs[2]) +# define VG_UCONTEXT_SYSCALL_SYSRES(uc) \ + VG_(mk_SysRes_nanomips_linux)((uc)->uc_mcontext.sc_regs[4]) + +# define VG_UCONTEXT_TO_UnwindStartRegs(srP, uc) \ + { (srP)->r_pc = (uc)->uc_mcontext.sc_pc; \ + (srP)->r_sp = (uc)->uc_mcontext.sc_regs[29]; \ + (srP)->misc.MIPS32.r30 = (uc)->uc_mcontext.sc_regs[30]; \ + (srP)->misc.MIPS32.r31 = (uc)->uc_mcontext.sc_regs[31]; \ + (srP)->misc.MIPS32.r28 = (uc)->uc_mcontext.sc_regs[28]; \ + } + #elif defined(VGP_x86_solaris) # define VG_UCONTEXT_INSTR_PTR(uc) ((Addr)(uc)->uc_mcontext.gregs[VKI_EIP]) # define VG_UCONTEXT_STACK_PTR(uc) ((Addr)(uc)->uc_mcontext.gregs[VKI_UESP]) @@ -985,6 +1001,13 @@ extern void my_sigreturn(void); " syscall\n" \ ".previous\n" +#elif defined(VGP_nanomips_linux) +# define _MY_SIGRETURN(name) \ + ".text\n" \ + "my_sigreturn:\n" \ + " li $t4, " #name "\n" \ + " syscall[32]\n" \ + ".previous\n" #elif defined(VGP_x86_solaris) || defined(VGP_amd64_solaris) /* Not used on Solaris. */ # define _MY_SIGRETURN(name) \ @@ -1084,7 +1107,7 @@ static void handle_SCSS_change ( Bool force_update ) # if !defined(VGP_ppc32_linux) && \ !defined(VGP_x86_darwin) && !defined(VGP_amd64_darwin) && \ !defined(VGP_mips32_linux) && !defined(VGP_mips64_linux) && \ - !defined(VGO_solaris) + !defined(VGP_nanomips_linux) && !defined(VGO_solaris) vg_assert(ksa_old.sa_restorer == my_sigreturn); # endif VG_(sigaddset)( &ksa_old.sa_mask, VKI_SIGKILL ); @@ -2174,8 +2197,8 @@ void VG_(synth_sigtrap)(ThreadId tid) // Synthesise a SIGFPE. void VG_(synth_sigfpe)(ThreadId tid, UInt code) { -// Only tested on mips32, mips64, and s390x -#if !defined(VGA_mips32) && !defined(VGA_mips64) && !defined(VGA_s390x) +// Only tested on mips32, mips64, s390x and nanomips. +#if !defined(VGA_mips32) && !defined(VGA_mips64) && !defined(VGA_s390x) && !defined(VGA_nanomips) vg_assert(0); #else vki_siginfo_t info; @@ -3046,7 +3069,8 @@ void VG_(sigstartup_actions) ( void ) /* Get the old host action */ ret = VG_(sigaction)(i, NULL, &sa); -# if defined(VGP_x86_darwin) || defined(VGP_amd64_darwin) +# if defined(VGP_x86_darwin) || defined(VGP_amd64_darwin) \ + || defined(VGP_nanomips_linux) /* apparently we may not even ask about the disposition of these signals, let alone change them */ if (ret != 0 && (i == VKI_SIGKILL || i == VKI_SIGSTOP)) diff --git a/coregrind/m_syscall.c b/coregrind/m_syscall.c index e4fb70c..4053d40 100644 --- a/coregrind/m_syscall.c +++ b/coregrind/m_syscall.c @@ -106,6 +106,13 @@ SysRes VG_(mk_SysRes_SuccessEx) ( UWord res, UWord resEx ) { safely test with -4095. */ +SysRes VG_(mk_SysRes_nanomips_linux) ( UWord a0 ) { + SysRes res; + res._isError = (a0 > 0xFFFFF000ul); + res._val = a0; + return res; +} + SysRes VG_(mk_SysRes_x86_linux) ( Int val ) { SysRes res; res._isError = val >= -4095 && val <= -1; @@ -180,20 +187,30 @@ SysRes VG_(mk_SysRes_arm64_linux) ( Long val ) { } /* Generic constructors. */ +SysRes VG_(mk_SysRes_Success) ( UWord res ) { + SysRes r; + r._isError = False; + r._val = res; + return r; +} + +#if defined(VGP_nanomips_linux) SysRes VG_(mk_SysRes_Error) ( UWord err ) { SysRes r; r._isError = True; - r._val = err; + r._val = (UWord)(-(Word)err); return r; } - -SysRes VG_(mk_SysRes_Success) ( UWord res ) { +#else +SysRes VG_(mk_SysRes_Error) ( UWord err ) { SysRes r; - r._isError = False; - r._val = res; + r._isError = True; + r._val = err; return r; } +#endif + #elif defined(VGO_darwin) @@ -824,6 +841,29 @@ asm ( ".previous \n\t" ); +#elif defined(VGP_nanomips_linux) +extern void do_syscall_WRK ( + RegWord a1, RegWord a2, RegWord a3, + RegWord a4, RegWord a5, RegWord a6, + RegWord syscall_no, RegWord *res_a0); +asm ( + ".text \n\t" + ".globl do_syscall_WRK \n\t" + ".type do_syscall_WRK, @function \n\t" + ".set push \n\t" + ".set noreorder \n\t" + "do_syscall_WRK: \n\t" + " save 32, $a7 \n\t" + " move $t4, $a6 \n\t" + " syscall[32] \n\t" + " restore 32, $a7 \n\t" + " sw $a0, 0($a7) \n\t" + " jrc $ra \n\t" + ".size do_syscall_WRK, .-do_syscall_WRK \n\t" + ".set pop \n\t" + ".previous \n\t" +); + #elif defined(VGP_x86_solaris) extern ULong @@ -1039,6 +1079,11 @@ SysRes VG_(do_syscall) ( UWord sysno, RegWord a1, RegWord a2, RegWord a3, RegWord A3 = (RegWord)v1_a3[1]; return VG_(mk_SysRes_mips64_linux)( V0, V1, A3 ); +#elif defined(VGP_nanomips_linux) + RegWord reg_a0 = 0; + do_syscall_WRK(a1, a2, a3, a4, a5, a6, sysno, ®_a0); + return VG_(mk_SysRes_nanomips_linux)(reg_a0); + # elif defined(VGP_x86_solaris) UInt val, val2, err = False; Bool restart; diff --git a/coregrind/m_syswrap/syswrap-generic.c b/coregrind/m_syswrap/syswrap-generic.c index ab96648..280c48f 100644 --- a/coregrind/m_syswrap/syswrap-generic.c +++ b/coregrind/m_syswrap/syswrap-generic.c @@ -2733,6 +2733,7 @@ PRE(sys_sync) PRE_REG_READ0(long, "sync"); } +#if !defined(VGP_nanomips_linux) PRE(sys_fstatfs) { FUSE_COMPATIBLE_MAY_BLOCK(); @@ -2760,6 +2761,7 @@ POST(sys_fstatfs64) { POST_MEM_WRITE( ARG3, ARG2 ); } +#endif PRE(sys_getsid) { @@ -3299,6 +3301,7 @@ PRE(sys_fchmod) PRE_REG_READ2(long, "fchmod", unsigned int, fildes, vki_mode_t, mode); } +#if !defined(VGP_nanomips_linux) PRE(sys_newfstat) { FUSE_COMPATIBLE_MAY_BLOCK(); @@ -3311,8 +3314,10 @@ POST(sys_newfstat) { POST_MEM_WRITE( ARG2, sizeof(struct vki_stat) ); } +#endif -#if !defined(VGO_solaris) && !defined(VGP_arm64_linux) +#if !defined(VGO_solaris) && !defined(VGP_arm64_linux) && \ + !defined(VGP_nanomips_linux) static vki_sigset_t fork_saved_mask; // In Linux, the sys_fork() function varies across architectures, but we @@ -3817,6 +3822,7 @@ PRE(sys_link) PRE_MEM_RASCIIZ( "link(newpath)", ARG2); } +#if !defined(VGP_nanomips_linux) PRE(sys_newlstat) { PRINT("sys_newlstat ( %#" FMT_REGWORD "x(%s), %#" FMT_REGWORD "x )", ARG1, @@ -3831,6 +3837,7 @@ POST(sys_newlstat) vg_assert(SUCCESS); POST_MEM_WRITE( ARG2, sizeof(struct vki_stat) ); } +#endif PRE(sys_mkdir) { @@ -4434,6 +4441,7 @@ PRE(sys_setuid) PRE_REG_READ1(long, "setuid", vki_uid_t, uid); } +#if !defined(VGP_nanomips_linux) PRE(sys_newstat) { FUSE_COMPATIBLE_MAY_BLOCK(); @@ -4476,6 +4484,7 @@ POST(sys_statfs64) { POST_MEM_WRITE( ARG3, ARG2 ); } +#endif PRE(sys_symlink) { diff --git a/coregrind/m_syswrap/syswrap-linux.c b/coregrind/m_syswrap/syswrap-linux.c index 6852366..87c513a 100644 --- a/coregrind/m_syswrap/syswrap-linux.c +++ b/coregrind/m_syswrap/syswrap-linux.c @@ -532,7 +532,7 @@ static SysRes clone_new_thread ( Word (*fn)(void *), ret = do_syscall_clone_nanomips_linux (ML_(start_thread_NORETURN), stack, flags, ctst, child_tidptr, parent_tidptr, NULL); - res = VG_ (mk_SysRes_nanomips_linux) (ret, 0); + res = VG_ (mk_SysRes_nanomips_linux) (ret); #else # error Unknown platform #endif diff --git a/coregrind/m_syswrap/syswrap-main.c b/coregrind/m_syswrap/syswrap-main.c index 868645e..cdb2663 100644 --- a/coregrind/m_syswrap/syswrap-main.c +++ b/coregrind/m_syswrap/syswrap-main.c @@ -1039,8 +1039,7 @@ void getSyscallStatusFromGuestState ( /*OUT*/SyscallStatus* canonical, # elif defined(VGP_nanomips_linux) VexGuestMIPS32State* gst = (VexGuestMIPS32State*)gst_vanilla; RegWord a0 = gst->guest_r4; // a0 - RegWord a1 = gst->guest_r5; // a1 - canonical->sres = VG_(mk_SysRes_nanomips_linux)(a0, a1); + canonical->sres = VG_(mk_SysRes_nanomips_linux)(a0); canonical->what = SsComplete; # elif defined(VGP_x86_darwin) @@ -1347,11 +1346,8 @@ void putSyscallStatusIntoGuestState ( /*IN*/ ThreadId tid, VexGuestMIPS32State* gst = (VexGuestMIPS32State*)gst_vanilla; vg_assert(canonical->what == SsComplete); gst->guest_r4 = canonical->sres._val; - gst->guest_r5 = canonical->sres._valEx; VG_TRACK( post_reg_write, Vg_CoreSysCall, tid, OFFSET_mips32_r4, sizeof(UWord) ); - VG_TRACK( post_reg_write, Vg_CoreSysCall, tid, - OFFSET_mips32_r5, sizeof(UWord) ); # elif defined(VGP_x86_solaris) VexGuestX86State* gst = (VexGuestX86State*)gst_vanilla; @@ -2480,8 +2476,7 @@ void ML_(fixup_guest_state_to_restart_syscall) ( ThreadArchState* arch ) vg_assert(p[0] == 0x0A); } -#elif defined(VGP_mips32_linux) || defined(VGP_mips64_linux) \ - || defined(VGP_nanomips_linux) +#elif defined(VGP_mips32_linux) || defined(VGP_mips64_linux) arch->vex.guest_PC -= 4; // sizeof(mips instr) @@ -2513,6 +2508,27 @@ void ML_(fixup_guest_state_to_restart_syscall) ( ThreadArchState* arch ) # endif } +#elif defined(VGP_nanomips_linux) + { + /* Make sure our caller is actually sane, and we're really backing + back over a syscall. + */ + arch->vex.guest_PC -= 2; + /* PC has to be 16-bit aligned. */ + vg_assert((arch->vex.guest_PC & 1) == 0); + + UShort *p = ASSUME_ALIGNED(UShort *, (Addr)(arch->vex.guest_PC)); + + if (((*p) & 0xFFFD) != 0x1008) { + if (((*(p - 1)) & 0xFFFD) != 0x0008) { + VG_(message)(Vg_DebugMsg, + "?! restarting over syscall at %#x %08lx\n", + arch->vex.guest_PC, (UWord)(*p)); + vg_assert(0); + } + arch->vex.guest_PC -= 2; + } + } #elif defined(VGP_x86_solaris) arch->vex.guest_EIP -= 2; // sizeof(int $0x91) or sizeof(syscall) diff --git a/coregrind/pub_core_syscall.h b/coregrind/pub_core_syscall.h index 854fca9..49b8586 100644 --- a/coregrind/pub_core_syscall.h +++ b/coregrind/pub_core_syscall.h @@ -84,7 +84,7 @@ extern SysRes VG_(mk_SysRes_mips32_linux)( UWord v0, UWord v1, UWord a3 ); extern SysRes VG_(mk_SysRes_mips64_linux)( ULong v0, ULong v1, ULong a3 ); -extern SysRes VG_(mk_SysRes_nanomips_linux)( UWord a0, UWord a1 ); +extern SysRes VG_(mk_SysRes_nanomips_linux)( UWord a0); extern SysRes VG_(mk_SysRes_x86_solaris) ( Bool isErr, UInt val, UInt val2 ); extern SysRes VG_(mk_SysRes_amd64_solaris) ( Bool isErr, ULong val, ULong val2 ); extern SysRes VG_(mk_SysRes_Error) ( UWord val ); diff --git a/drd/drd_bitmap.h b/drd/drd_bitmap.h index 95253dd..b288bee 100644 --- a/drd/drd_bitmap.h +++ b/drd/drd_bitmap.h @@ -135,7 +135,8 @@ Addr make_address(const UWord a1, const UWord a0) /** Log2 of BITS_PER_UWORD. */ #if defined(VGA_x86) || defined(VGA_ppc32) || defined(VGA_arm) \ - || defined(VGA_mips32) || (defined(VGA_mips64) && defined(VGABI_N32)) + || defined(VGA_mips32) || defined(VGA_nanomips) \ + || (defined(VGA_mips64) && defined(VGABI_N32)) #define BITS_PER_BITS_PER_UWORD 5 #elif defined(VGA_amd64) || defined(VGA_ppc64be) || defined(VGA_ppc64le) \ || defined(VGA_s390x) || (defined(VGA_mips64) && !defined(VGABI_N32)) \ diff --git a/drd/drd_load_store.c b/drd/drd_load_store.c index d7b4fdb..c5b1306 100644 --- a/drd/drd_load_store.c +++ b/drd/drd_load_store.c @@ -49,7 +49,7 @@ #define STACK_POINTER_OFFSET OFFSET_arm64_XSP #elif defined(VGA_s390x) #define STACK_POINTER_OFFSET OFFSET_s390x_r15 -#elif defined(VGA_mips32) +#elif defined(VGA_mips32) || defined(VGA_nanomips) #define STACK_POINTER_OFFSET OFFSET_mips32_r29 #elif defined(VGA_mips64) #define STACK_POINTER_OFFSET OFFSET_mips64_r29 diff --git a/memcheck/mc_machine.c b/memcheck/mc_machine.c index c1031f7..7a87143 100644 --- a/memcheck/mc_machine.c +++ b/memcheck/mc_machine.c @@ -1058,7 +1058,7 @@ static Int get_otrack_shadow_offset_wrk ( Int offset, Int szB ) /* --------------------- mips32 --------------------- */ -# elif defined(VGA_mips32) +# elif defined(VGA_mips32) || defined(VGA_nanomips) # define GOF(_fieldname) \ (offsetof(VexGuestMIPS32State,guest_##_fieldname)) @@ -1433,6 +1433,12 @@ IRType MC_(get_otrack_reg_array_equiv_int_type) ( IRRegArray* arr ) ppIRRegArray(arr); VG_(printf)("\n"); tl_assert(0); +/* --------------------- nanomips ------------------- */ +# elif defined(VGA_nanomips) + VG_(printf)("get_reg_array_equiv_int_type(nanomips): unhandled: "); + ppIRRegArray(arr); + VG_(printf)("\n"); + tl_assert(0); /* --------------------- mips64 --------------------- */ # elif defined(VGA_mips64) |