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From: Julian S. <se...@so...> - 2019-04-08 05:20:06
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=b7c807f584733ba98a1a9feec40601ef16389f18 commit b7c807f584733ba98a1a9feec40601ef16389f18 Author: Julian Seward <js...@ac...> Date: Mon Apr 8 07:18:55 2019 +0200 Finalise wording w.r.t. the MPL. Diff: --- dhat/dh_view.js | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/dhat/dh_view.js b/dhat/dh_view.js index d0c56b7..6ccfdf6 100644 --- a/dhat/dh_view.js +++ b/dhat/dh_view.js @@ -29,8 +29,10 @@ /* Parts of this file are derived from Firefox, copyright Mozilla Foundation, - and are subject to the terms of the Mozilla Public License, v. 2.0. A copy - copy of the MPL can be obtained at http://mozilla.org/MPL/2.0/. + and may be redistributed under the terms of the Mozilla Public License + Version 2.0, as well as under the license of this project. A copy of the + Mozilla Public License Version 2.0 is available at at + https://www.mozilla.org/en-US/MPL/2.0/. */ // Test this file by loading dh_view.html?test=1. That runs the tests in |
|
From: Julian S. <js...@ac...> - 2019-04-08 05:17:40
|
Hi, 3.15.0 will be released later this week, all going well. In order to facilitate finalising the release, please don't commit anything without checking first. I hope to make a release-candidate tarball available today/tomorrow. Thanks, J |
|
From: Nicholas N. <nj...@so...> - 2019-04-08 00:21:43
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=b71265fbc9e65936a46158ffb85a5242efbb741e commit b71265fbc9e65936a46158ffb85a5242efbb741e Author: Nicholas Nethercote <nne...@mo...> Date: Mon Apr 8 10:18:38 2019 +1000 Mention --num-callers more in DHAT docs. Diff: --- dhat/docs/dh-manual.xml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/dhat/docs/dh-manual.xml b/dhat/docs/dh-manual.xml index 56f5b6a..da71720 100644 --- a/dhat/docs/dh-manual.xml +++ b/dhat/docs/dh-manual.xml @@ -67,7 +67,9 @@ Valgrind use, you probably do want to turn optimisation on, since you should profile your program as it will be normally run.</para> <para>Second, you need to run your program under DHAT to gather the profiling -information.</para> +information. You might need to reduce the <option>--num-callers</option> value +to get reasonably-sized output files, especially if you are profiling a large +program; some trial and error might be needed to find a good value.</para> <para>Finally, you need to use DHAT's viewer (in a web browser) to get a detailed presentation of that information.</para> @@ -146,6 +148,10 @@ built with full debugging information.</para> <computeroutput>dh_view.html</computeroutput>. Use the "Load" button to choose a DHAT output file to view.</para> +<para>If loading takes a long time, it might be worth re-running DHAT with a +smaller <option>--num-callers</option> value to reduce the stack depths, +because this can significantly reduce the size of DHAT's output files.</para> + <sect2><title>The Output Header</title> |
|
From: Nicholas N. <nj...@so...> - 2019-04-08 00:21:42
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=19738d1a42ed8fd36b5da0accec29f664437e287 commit 19738d1a42ed8fd36b5da0accec29f664437e287 Author: Nicholas Nethercote <nne...@mo...> Date: Mon Apr 8 10:14:18 2019 +1000 Mention massif-visualizer in the Massif docs. Diff: --- massif/docs/ms-manual.xml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/massif/docs/ms-manual.xml b/massif/docs/ms-manual.xml index e176dc5..ab377a3 100644 --- a/massif/docs/ms-manual.xml +++ b/massif/docs/ms-manual.xml @@ -647,6 +647,19 @@ in a particular column, which makes following the allocation chains easier. </sect1> +<sect1 id="ms-manual.using" xreflabel="Using massif-visualizer"> +<title>Using massif-visualizer</title> + +<para> +<ulink url="https://github.com/KDE/massif-visualizer">massif-visualizer</ulink> +is a graphical viewer for Massif data that is often easier to use than +ms_print. massif-visualizer is not shipped within Valgrind, but is available in +various places online. +</para> + +</sect1> + + <sect1 id="ms-manual.options" xreflabel="Massif Command-line Options"> <title>Massif Command-line Options</title> |
|
From: Mark W. <ma...@so...> - 2019-04-07 22:11:09
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=8a97bdbb1bdeebbc68e30934ed4f5f002b434039 commit 8a97bdbb1bdeebbc68e30934ed4f5f002b434039 Author: Mark Wielaard <ma...@kl...> Date: Sun Apr 7 23:59:54 2019 +0200 Install dhat viewer files in libexec. libexec seems a better location than libdir. libexec is for internal binaries or scripts that are not intended to be executed directly. If we want to change the location again it is now simple. Just change the dhat/Makefile.am dhatdir variable. Diff: --- dhat/Makefile.am | 10 +++++----- dhat/dh_main.c | 2 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/dhat/Makefile.am b/dhat/Makefile.am index e8ddb05..2aa4ac9 100644 --- a/dhat/Makefile.am +++ b/dhat/Makefile.am @@ -8,11 +8,9 @@ EXTRA_DIST = docs/dh-manual.xml dh_view.html dh_view.css dh_view.js # Headers, etc #---------------------------------------------------------------------------- -# Ensure the viewer components get copied into the install tree. Note that -# vglibdir and vglib_DATA are also defined in coregrind/Makefile.am. I don't -# know if that's a problem. Doesn't appear to be. -vglibdir = $(pkglibdir) -vglib_DATA = dh_view.html dh_view.css dh_view.js +# Ensure the viewer components get copied into the install tree. +dhatdir = $(pkglibexecdir) +dhat_DATA = dh_view.html dh_view.css dh_view.js #---------------------------------------------------------------------------- # dhat-<platform> @@ -30,6 +28,7 @@ dhat_@VGCONF_ARCH_PRI@_@VGCONF_OS@_SOURCES = \ dhat_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CPPFLAGS = \ $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@) dhat_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CFLAGS = $(LTO_CFLAGS) \ + -DDHAT_VIEW_DIR=\"$(dhatdir)\" \ $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@) dhat_@VGCONF_ARCH_PRI@_@VGCONF_OS@_DEPENDENCIES = \ $(TOOL_DEPENDENCIES_@VGCONF_PLATFORM_PRI_CAPS@) @@ -50,6 +49,7 @@ dhat_@VGCONF_ARCH_SEC@_@VGCONF_OS@_SOURCES = \ dhat_@VGCONF_ARCH_SEC@_@VGCONF_OS@_CPPFLAGS = \ $(AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@) dhat_@VGCONF_ARCH_SEC@_@VGCONF_OS@_CFLAGS = $(LTO_CFLAGS) \ + -DDHAT_VIEW_DIR=\"$(dhatdir)\" \ $(AM_CFLAGS_@VGCONF_PLATFORM_SEC_CAPS@) dhat_@VGCONF_ARCH_SEC@_@VGCONF_OS@_DEPENDENCIES = \ $(TOOL_DEPENDENCIES_@VGCONF_PLATFORM_SEC_CAPS@) diff --git a/dhat/dh_main.c b/dhat/dh_main.c index ece2eed..47a9327 100644 --- a/dhat/dh_main.c +++ b/dhat/dh_main.c @@ -1445,7 +1445,7 @@ static void dh_fini(Int exit_status) // Print a how-to-view-the-profile hint. VG_(umsg)("\n"); VG_(umsg)("To view the resulting profile, open\n"); - VG_(umsg)(" file://%s/%s\n", VG_(libdir), "dh_view.html"); + VG_(umsg)(" file://%s/%s\n", DHAT_VIEW_DIR, "dh_view.html"); VG_(umsg)("in a web browser, click on \"Load...\" " "and then select the file\n"); VG_(umsg)(" %s\n", dhat_out_file); |
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From: Mark W. <ma...@so...> - 2019-04-07 20:30:00
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=06d1d39fdc34a1b5b3975c10ee9aac0ca81a3a2e commit 06d1d39fdc34a1b5b3975c10ee9aac0ca81a3a2e Author: Mark Wielaard <ma...@kl...> Date: Sun Apr 7 22:27:52 2019 +0200 Add arm64 do_syscall_WRK implementation to memcheck/tests/leak-segv-jmp. On arm64-linux memcheck/tests/leak-segv-jmp would fail because there was no do_syscall_WRK implementation for that architecture. Implement and adjust line numbers in .exp file to make it PASS. Diff: --- memcheck/tests/leak-segv-jmp.c | 22 ++++++++++++++++++++++ memcheck/tests/leak-segv-jmp.stderr.exp | 20 ++++++++++---------- 2 files changed, 32 insertions(+), 10 deletions(-) diff --git a/memcheck/tests/leak-segv-jmp.c b/memcheck/tests/leak-segv-jmp.c index 2a175c6..58c5559 100644 --- a/memcheck/tests/leak-segv-jmp.c +++ b/memcheck/tests/leak-segv-jmp.c @@ -108,6 +108,24 @@ asm( ".previous\n" ); +#elif defined(VGP_arm64_linux) +extern UWord do_syscall_WRK ( + UWord a1, UWord a2, UWord a3, + UWord a4, UWord a5, UWord a6, + UWord syscall_no + ); +asm( +".text\n" +".globl do_syscall_WRK\n" +"do_syscall_WRK:\n" +" mov x8, x6\n" +" mov x6, 0\n" +" mov x7, 0\n" +" svc 0\n" +" ret\n" +".previous\n" +); + #elif defined(VGP_s390x_linux) UWord do_syscall_WRK ( UWord syscall_no, @@ -238,6 +256,10 @@ static void non_simd_mprotect (long tid, void* addr, long len) &err); if (err) mprotect_result = -1; +#elif defined(VGP_arm64_linux) + mprotect_result = do_syscall_WRK((UWord) addr, len, PROT_NONE, + 0, 0, 0, + __NR_mprotect); #else mprotect_result = do_syscall_WRK(__NR_mprotect, (UWord) addr, len, PROT_NONE, diff --git a/memcheck/tests/leak-segv-jmp.stderr.exp b/memcheck/tests/leak-segv-jmp.stderr.exp index 18e60db..bc3d11d 100644 --- a/memcheck/tests/leak-segv-jmp.stderr.exp +++ b/memcheck/tests/leak-segv-jmp.stderr.exp @@ -14,8 +14,8 @@ To see them, rerun with: --leak-check=full --show-leak-kinds=all expecting a leak 1,000 bytes in 1 blocks are definitely lost in loss record ... of ... at 0x........: malloc (vg_replace_malloc.c:...) - by 0x........: f (leak-segv-jmp.c:271) - by 0x........: main (leak-segv-jmp.c:346) + by 0x........: f (leak-segv-jmp.c:293) + by 0x........: main (leak-segv-jmp.c:368) LEAK SUMMARY: definitely lost: 1,000 bytes in 1 blocks @@ -30,8 +30,8 @@ mprotect result 0 expecting a leak again 1,000 bytes in 1 blocks are definitely lost in loss record ... of ... at 0x........: malloc (vg_replace_malloc.c:...) - by 0x........: f (leak-segv-jmp.c:271) - by 0x........: main (leak-segv-jmp.c:346) + by 0x........: f (leak-segv-jmp.c:293) + by 0x........: main (leak-segv-jmp.c:368) LEAK SUMMARY: definitely lost: 1,000 bytes in 1 blocks @@ -46,8 +46,8 @@ full mprotect result 0 expecting a leak again after full mprotect 1,000 bytes in 1 blocks are definitely lost in loss record ... of ... at 0x........: malloc (vg_replace_malloc.c:...) - by 0x........: f (leak-segv-jmp.c:271) - by 0x........: main (leak-segv-jmp.c:346) + by 0x........: f (leak-segv-jmp.c:293) + by 0x........: main (leak-segv-jmp.c:368) LEAK SUMMARY: definitely lost: 1,000 bytes in 1 blocks @@ -62,13 +62,13 @@ mprotect result 0 expecting heuristic not to crash after full mprotect 1,000 bytes in 1 blocks are definitely lost in loss record ... of ... at 0x........: malloc (vg_replace_malloc.c:...) - by 0x........: f (leak-segv-jmp.c:271) - by 0x........: main (leak-segv-jmp.c:346) + by 0x........: f (leak-segv-jmp.c:293) + by 0x........: main (leak-segv-jmp.c:368) 200,000 bytes in 1 blocks are possibly lost in loss record ... of ... at 0x........: calloc (vg_replace_malloc.c:...) - by 0x........: f (leak-segv-jmp.c:318) - by 0x........: main (leak-segv-jmp.c:346) + by 0x........: f (leak-segv-jmp.c:340) + by 0x........: main (leak-segv-jmp.c:368) LEAK SUMMARY: definitely lost: 1,000 bytes in 1 blocks |
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From: Mark W. <ma...@so...> - 2019-04-07 16:30:46
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=19906dc4d9a188d711d319ca07b0a6767205eb8f commit 19906dc4d9a188d711d319ca07b0a6767205eb8f Author: Mark Wielaard <ma...@kl...> Date: Sun Apr 7 18:28:40 2019 +0200 Add (minimal) manual page for valgrind-di-server. This adds a minimal man page for the experimental valgrind-di-server so that we have manual pages for all (auxiliary) programs we install. Diff: --- auxprogs/Makefile.am | 1 + auxprogs/docs/valgrind-di-server-manpage.xml | 99 ++++++++++++++++++++++++++++ docs/xml/manpages-index.xml | 4 ++ 3 files changed, 104 insertions(+) diff --git a/auxprogs/Makefile.am b/auxprogs/Makefile.am index aa92bec..56cc5ef 100644 --- a/auxprogs/Makefile.am +++ b/auxprogs/Makefile.am @@ -13,6 +13,7 @@ dist_noinst_SCRIPTS = \ EXTRA_DIST = \ docs/valgrind-listener-manpage.xml \ + docs/valgrind-di-server-manpage.xml \ gsl16-badfree.patch \ gsl16-wavelet.patch \ posixtestsuite-1.5.1-diff.txt \ diff --git a/auxprogs/docs/valgrind-di-server-manpage.xml b/auxprogs/docs/valgrind-di-server-manpage.xml new file mode 100644 index 0000000..deca81d --- /dev/null +++ b/auxprogs/docs/valgrind-di-server-manpage.xml @@ -0,0 +1,99 @@ +<?xml version="1.0"?> <!-- -*- sgml -*- --> +<!DOCTYPE refentry PUBLIC "-//OASIS//DTD DocBook XML V4.2//EN" + "http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd" +[ <!ENTITY % vg-entities SYSTEM "../../docs/xml/vg-entities.xml"> %vg-entities; ]> + + +<refentry id="di-server"> + +<refmeta> + <refentrytitle>valgrind-di-server</refentrytitle> + <manvolnum>1</manvolnum> + <refmiscinfo>Release &rel-version;</refmiscinfo> +</refmeta> + +<refnamediv> + <refname>valgrind-di-server</refname> + <refpurpose>Experimental debuginfo server for valgrind</refpurpose> +</refnamediv> + +<refsynopsisdiv> +<cmdsynopsis> + <command>valgrind-di-server</command> + <arg><replaceable>options</replaceable></arg> +</cmdsynopsis> +</refsynopsisdiv> + + +<refsect1 id="description"> +<title>Description</title> + +<para><command>valgrind-di-server</command> accepts (multiple) connections +from <command>valgrind</command> processes that use the +<option> --debuginfo-server</option> option on the specified port and serves +(compressed) debuginfo files (in chunks) from the current working directory. +</para> + +</refsect1> + + + +<refsect1 id="options"> +<title>Options</title> + <variablelist> + <varlistentry> + <term><option>-e --exit-at-zero</option></term> + <listitem> + <para>When the number of connected processes falls back to zero, + exit. Without this, it will run forever, that is, until you + send it Control-C.</para> + </listitem> + </varlistentry> + <varlistentry> + <term><option>--max-connect=INTEGER</option></term> + <listitem> + <para>By default, the server can connect to up to 50 processes. + Occasionally, that number is too small. Use this option to + provide a different limit. E.g. + <computeroutput>--max-connect=100</computeroutput>. + </para> + </listitem> + </varlistentry> + <varlistentry> + <term><option>portnumber</option></term> + <listitem> + <para>Changes the port it listens on from the default (1500). + The specified port must be in the range 1024 to 65535. + The same restriction applies to port numbers specified by the + <option>--debuginfo-server</option> option to Valgrind itself.</para> + </listitem> + </varlistentry> + </variablelist> +</refsect1> + + + + +<refsect1 id="see_also"> +<title>See Also</title> + +<para> +valgrind(1), +<filename>&vg-docs-path;</filename> or +<filename>&vg-docs-url;</filename>. +</para> + +</refsect1> + + +<refsect1 id="author"> +<title>Author</title> + +<para>Julian Seward.</para> + +</refsect1> + + +</refentry> + + diff --git a/docs/xml/manpages-index.xml b/docs/xml/manpages-index.xml index 7d774e5..a038ee4 100644 --- a/docs/xml/manpages-index.xml +++ b/docs/xml/manpages-index.xml @@ -39,6 +39,10 @@ <xi:include href="../../auxprogs/docs/valgrind-listener-manpage.xml" parse="xml" xmlns:xi="http://www.w3.org/2001/XInclude" /> +<!-- valgrind-di-server --> +<xi:include href="../../auxprogs/docs/valgrind-di-server-manpage.xml" + parse="xml" xmlns:xi="http://www.w3.org/2001/XInclude" /> + <!-- vgdb --> <xi:include href="../../coregrind/docs/vgdb-manpage.xml" parse="xml" xmlns:xi="http://www.w3.org/2001/XInclude" /> |
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From: Carl L. <ca...@so...> - 2019-04-05 20:05:28
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=7804ba3debb0ee990aaa49949d2629445c103d2b commit 7804ba3debb0ee990aaa49949d2629445c103d2b Author: Carl Love <ca...@us...> Date: Fri Apr 5 15:04:23 2019 -0500 PPC64, fix test_isa_3_0_other.c test Valgrind ppc64 test_isa_3_0_other test will attempt to display all of the bits of the XER as part of the test case results. The tests have no existing logic to clear those bits, so this can pick up straggling values that cascade into a testcase failure. This adds some code to correct this in two directions; - Print only the bits that are expected by the tests. This is currently just the OV and OV32 bits. - print all of the bits when run under higher verbosity levels. Bugzilla 406198 - none/tests/ppc64/test_isa_3_0_other test sporadically including CA bit in output Patch submitted by Will Schmidt <wil...@vn...> Patch reviewed, committed by: Carl Love <ce...@us...> Diff: --- NEWS | 2 ++ none/tests/ppc64/ppc64_helpers.h | 18 +++++++++++++++++- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/NEWS b/NEWS index 8e5ea70..9a1e9dd 100644 --- a/NEWS +++ b/NEWS @@ -137,6 +137,8 @@ where XXXXXX is the bug number as listed below. 405734 PPC64, vrlwnm, vrlwmi, vrldrm, vrldmi do not work properly when me < mb 405782 "VEX temporary storage exhausted" when attempting to debug slic3r-pe 405722 Support arm64 core dump +406198 none/tests/ppc64/test_isa_3_0_other test sporadically including CA + bit in output. n-i-bz add syswrap for PTRACE_GET|SET_THREAD_AREA on amd64. n-i-bz Fix callgrind_annotate non deterministic order for equal total diff --git a/none/tests/ppc64/ppc64_helpers.h b/none/tests/ppc64/ppc64_helpers.h index 5b8f314..36c4737 100644 --- a/none/tests/ppc64/ppc64_helpers.h +++ b/none/tests/ppc64/ppc64_helpers.h @@ -405,12 +405,28 @@ static void dissect_xer_raw(unsigned long local_xer) { printf(" %s", xer_strings[i]); } } +/* Display only the XER contents that are relevant for our tests. + * this is currently the OV and OV32 bits. */ +static void dissect_xer_valgrind(unsigned long local_xer) { + int i; + long mybit; + i = 33; // OV + mybit = 1ULL << (63 - i); + if (mybit & local_xer) printf(" %s", xer_strings[i]); + i = 44; // OV32 + mybit = 1ULL << (63 - i); + if (mybit & local_xer) printf(" %s", xer_strings[i]); +} + /* */ static void dissect_xer(unsigned long local_xer) { if (verbose > 1) printf(" [[ xer:%lx ]]", local_xer); - dissect_xer_raw(local_xer); + if (verbose > 2 ) + dissect_xer_raw(local_xer); + else + dissect_xer_valgrind(local_xer); } |
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From: Julian S. <se...@so...> - 2019-04-05 18:12:55
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=d36ea889d8d8a1646be85c30ab5771af6912b7a1 commit d36ea889d8d8a1646be85c30ab5771af6912b7a1 Author: Julian Seward <js...@ac...> Date: Fri Apr 5 20:10:46 2019 +0200 Bug 404843 - s390x: backtrace sometimes ends prematurely. On s390x-linux, adds CFI based unwinding for %f0..%f7, since these are sometimes used by gcc >= 8.0 to spill integer register values in leaf functions. Hence the lack of unwinding them was causing unwind failures on this platform. Diff: --- coregrind/m_debuginfo/debuginfo.c | 78 ++++++++++++++++++++++++--- coregrind/m_debuginfo/priv_storage.h | 32 +++++++++++ coregrind/m_debuginfo/readdwarf.c | 100 +++++++++++++++++++++++++++++++++-- coregrind/m_debuginfo/storage.c | 48 ++++++++++++++++- coregrind/m_libcassert.c | 39 ++++++++++---- coregrind/m_machine.c | 17 ++++++ coregrind/m_signals.c | 8 +++ coregrind/m_stacktrace.c | 8 +++ coregrind/pub_core_basics.h | 8 +++ coregrind/pub_core_debuginfo.h | 4 +- 10 files changed, 320 insertions(+), 22 deletions(-) diff --git a/coregrind/m_debuginfo/debuginfo.c b/coregrind/m_debuginfo/debuginfo.c index 1aa4314..70d489a 100644 --- a/coregrind/m_debuginfo/debuginfo.c +++ b/coregrind/m_debuginfo/debuginfo.c @@ -3199,6 +3199,15 @@ Addr ML_(get_CFA) ( Addr ip, Addr sp, Addr fp, uregs.ia = ip; uregs.sp = sp; uregs.fp = fp; + /* JRS FIXME 3 Apr 2019: surely we can do better for f0..f7 */ + uregs.f0 = 0; + uregs.f1 = 0; + uregs.f2 = 0; + uregs.f3 = 0; + uregs.f4 = 0; + uregs.f5 = 0; + uregs.f6 = 0; + uregs.f7 = 0; return compute_cfa(&uregs, min_accessible, max_accessible, ce->di, ce->cfsi_m); } @@ -3259,6 +3268,8 @@ void VG_(ppUnwindInfo) (Addr from, Addr to) For arm, the unwound registers are: R7 R11 R12 R13 R14 R15. For arm64, the unwound registers are: X29(FP) X30(LR) SP PC. + + For s390, the unwound registers are: R11(FP) R14(LR) R15(SP) F0..F7 PC. */ Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, Addr min_accessible, @@ -3309,11 +3320,33 @@ Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, /* Now we know the CFA, use it to roll back the registers we're interested in. */ -#if defined(VGA_mips64) && defined(VGABI_N32) -#define READ_REGISTER(addr) ML_(read_ULong)((addr)) -#else -#define READ_REGISTER(addr) ML_(read_Addr)((addr)) -#endif +# if defined(VGA_mips64) && defined(VGABI_N32) +# define READ_REGISTER(addr) ML_(read_ULong)((addr)) +# else +# define READ_REGISTER(addr) ML_(read_Addr)((addr)) +# endif + +# if defined(VGA_s390x) + const Bool is_s390x = True; + const Addr old_S390X_F0 = uregsHere->f0; + const Addr old_S390X_F1 = uregsHere->f1; + const Addr old_S390X_F2 = uregsHere->f2; + const Addr old_S390X_F3 = uregsHere->f3; + const Addr old_S390X_F4 = uregsHere->f4; + const Addr old_S390X_F5 = uregsHere->f5; + const Addr old_S390X_F6 = uregsHere->f6; + const Addr old_S390X_F7 = uregsHere->f7; +# else + const Bool is_s390x = False; + const Addr old_S390X_F0 = 0; + const Addr old_S390X_F1 = 0; + const Addr old_S390X_F2 = 0; + const Addr old_S390X_F3 = 0; + const Addr old_S390X_F4 = 0; + const Addr old_S390X_F5 = 0; + const Addr old_S390X_F6 = 0; + const Addr old_S390X_F7 = 0; +# endif # define COMPUTE(_prev, _here, _how, _off) \ do { \ @@ -3343,8 +3376,32 @@ Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, _prev = evalCfiExpr(di->cfsi_exprs, _off, &eec, &ok ); \ if (!ok) return False; \ break; \ + case CFIR_S390X_F0: \ + if (is_s390x) { _prev = old_S390X_F0; break; } \ + vg_assert(0+0-0); \ + case CFIR_S390X_F1: \ + if (is_s390x) { _prev = old_S390X_F1; break; } \ + vg_assert(0+1-1); \ + case CFIR_S390X_F2: \ + if (is_s390x) { _prev = old_S390X_F2; break; } \ + vg_assert(0+2-2); \ + case CFIR_S390X_F3: \ + if (is_s390x) { _prev = old_S390X_F3; break; } \ + vg_assert(0+3-3); \ + case CFIR_S390X_F4: \ + if (is_s390x) { _prev = old_S390X_F4; break; } \ + vg_assert(0+4-4); \ + case CFIR_S390X_F5: \ + if (is_s390x) { _prev = old_S390X_F5; break; } \ + vg_assert(0+5-5); \ + case CFIR_S390X_F6: \ + if (is_s390x) { _prev = old_S390X_F6; break; } \ + vg_assert(0+6-6); \ + case CFIR_S390X_F7: \ + if (is_s390x) { _prev = old_S390X_F7; break; } \ + vg_assert(0+7-7); \ default: \ - vg_assert(0); \ + vg_assert(0*0); \ } \ } while (0) @@ -3363,6 +3420,14 @@ Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, COMPUTE(uregsPrev.ia, uregsHere->ia, cfsi_m->ra_how, cfsi_m->ra_off); COMPUTE(uregsPrev.sp, uregsHere->sp, cfsi_m->sp_how, cfsi_m->sp_off); COMPUTE(uregsPrev.fp, uregsHere->fp, cfsi_m->fp_how, cfsi_m->fp_off); + COMPUTE(uregsPrev.f0, uregsHere->f0, cfsi_m->f0_how, cfsi_m->f0_off); + COMPUTE(uregsPrev.f1, uregsHere->f1, cfsi_m->f1_how, cfsi_m->f1_off); + COMPUTE(uregsPrev.f2, uregsHere->f2, cfsi_m->f2_how, cfsi_m->f2_off); + COMPUTE(uregsPrev.f3, uregsHere->f3, cfsi_m->f3_how, cfsi_m->f3_off); + COMPUTE(uregsPrev.f4, uregsHere->f4, cfsi_m->f4_how, cfsi_m->f4_off); + COMPUTE(uregsPrev.f5, uregsHere->f5, cfsi_m->f5_how, cfsi_m->f5_off); + COMPUTE(uregsPrev.f6, uregsHere->f6, cfsi_m->f6_how, cfsi_m->f6_off); + COMPUTE(uregsPrev.f7, uregsHere->f7, cfsi_m->f7_how, cfsi_m->f7_off); # elif defined(VGA_mips32) || defined(VGA_mips64) COMPUTE(uregsPrev.pc, uregsHere->pc, cfsi_m->ra_how, cfsi_m->ra_off); COMPUTE(uregsPrev.sp, uregsHere->sp, cfsi_m->sp_how, cfsi_m->sp_off); @@ -3377,6 +3442,7 @@ Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, # error "Unknown arch" # endif +# undef READ_REGISTER # undef COMPUTE *uregsHere = uregsPrev; diff --git a/coregrind/m_debuginfo/priv_storage.h b/coregrind/m_debuginfo/priv_storage.h index 98e7156..20a3cf8 100644 --- a/coregrind/m_debuginfo/priv_storage.h +++ b/coregrind/m_debuginfo/priv_storage.h @@ -229,6 +229,14 @@ typedef CFIR_CFAREL -> cfa + sp/fp/ra_off CFIR_MEMCFAREL -> *( cfa + sp/fp/ra_off ) CFIR_EXPR -> expr whose index is in sp/fp/ra_off + CFIR_S390X_F0 -> old value of %f0 + CFIR_S390X_F1 -> old value of %f1 + CFIR_S390X_F2 -> old value of %f2 + CFIR_S390X_F3 -> old value of %f3 + CFIR_S390X_F4 -> old value of %f4 + CFIR_S390X_F5 -> old value of %f5 + CFIR_S390X_F6 -> old value of %f6 + CFIR_S390X_F7 -> old value of %f7 */ #define CFIC_IA_SPREL ((UChar)1) @@ -246,6 +254,14 @@ typedef #define CFIR_CFAREL ((UChar)66) #define CFIR_MEMCFAREL ((UChar)67) #define CFIR_EXPR ((UChar)68) +#define CFIR_S390X_F0 ((UChar)69) +#define CFIR_S390X_F1 ((UChar)70) +#define CFIR_S390X_F2 ((UChar)71) +#define CFIR_S390X_F3 ((UChar)72) +#define CFIR_S390X_F4 ((UChar)73) +#define CFIR_S390X_F5 ((UChar)74) +#define CFIR_S390X_F6 ((UChar)75) +#define CFIR_S390X_F7 ((UChar)76) /* Definition of the DiCfSI_m DiCfSI machine dependent part. These are highly duplicated, and are stored in a pool. */ @@ -318,10 +334,26 @@ typedef UChar sp_how; /* a CFIR_ value */ UChar ra_how; /* a CFIR_ value */ UChar fp_how; /* a CFIR_ value */ + UChar f0_how; /* a CFIR_ value */ + UChar f1_how; /* a CFIR_ value */ + UChar f2_how; /* a CFIR_ value */ + UChar f3_how; /* a CFIR_ value */ + UChar f4_how; /* a CFIR_ value */ + UChar f5_how; /* a CFIR_ value */ + UChar f6_how; /* a CFIR_ value */ + UChar f7_how; /* a CFIR_ value */ Int cfa_off; Int sp_off; Int ra_off; Int fp_off; + Int f0_off; + Int f1_off; + Int f2_off; + Int f3_off; + Int f4_off; + Int f5_off; + Int f6_off; + Int f7_off; } DiCfSI_m; #elif defined(VGA_mips32) || defined(VGA_mips64) diff --git a/coregrind/m_debuginfo/readdwarf.c b/coregrind/m_debuginfo/readdwarf.c index 3b7449a..0b1f653 100644 --- a/coregrind/m_debuginfo/readdwarf.c +++ b/coregrind/m_debuginfo/readdwarf.c @@ -1748,6 +1748,8 @@ void ML_(read_debuginfo_dwarf1) ( # define N_CFI_REGS 320 #elif defined(VGP_arm64_linux) # define N_CFI_REGS 128 +#elif defined(VGP_s390x_linux) +# define N_CFI_REGS 66 #else # define N_CFI_REGS 20 #endif @@ -1842,7 +1844,6 @@ enum dwarf_cfa_secondary_ops | RR_Reg arg -- is in register 'arg' | RR_Expr arg -- is at * [[ arg ]] | RR_ValExpr arg -- is [[ arg ]] - | RR_Arch -- dunno Note that RR_Expr is redundant since the same can be represented using RR_ValExpr with an explicit dereference (CfiExpr_Deref) at @@ -1856,7 +1857,7 @@ enum dwarf_cfa_secondary_ops typedef struct { enum { RR_Undef, RR_Same, RR_CFAOff, RR_CFAValOff, - RR_Reg, /*RR_Expr,*/ RR_ValExpr, RR_Arch } tag; + RR_Reg, /*RR_Expr,*/ RR_ValExpr } tag; /* meaning: int offset for CFAoff/CFAValOff reg # for Reg expr index for Expr/ValExpr */ @@ -1872,12 +1873,11 @@ static void ppRegRule ( const XArray* exprs, const RegRule* rrule ) case RR_Same: VG_(printf)("s "); break; case RR_CFAOff: VG_(printf)("c%d ", rrule->arg); break; case RR_CFAValOff: VG_(printf)("v%d ", rrule->arg); break; - case RR_Reg: VG_(printf)("r%d ", rrule->arg); break; + case RR_Reg: VG_(printf)("dwReg%d ", rrule->arg); break; case RR_ValExpr: VG_(printf)("ve{"); ML_(ppCfiExpr)( exprs, rrule->arg ); VG_(printf)("} "); break; - case RR_Arch: VG_(printf)("a "); break; default: VG_(core_panic)("ppRegRule"); } } @@ -2022,6 +2022,10 @@ static Bool summarise_context(/*OUT*/Addr* base, *len = 0; VG_(bzero_inline)(si_m, sizeof(*si_m)); + /*const*/ Bool is_s390x_linux = False; +# if defined(VGP_s390x_linux) + is_s390x_linux = True; +# endif /* Guard against obviously stupid settings of the reg-rule stack pointer. */ @@ -2098,6 +2102,8 @@ static Bool summarise_context(/*OUT*/Addr* base, } # define SUMMARISE_HOW(_how, _off, _ctxreg) \ + _how = CFIR_UNKNOWN; /* install safe initial values */ \ + _off = 0; \ switch (_ctxreg.tag) { \ case RR_Undef: \ _how = CFIR_UNKNOWN; _off = 0; break; \ @@ -2129,6 +2135,51 @@ static Bool summarise_context(/*OUT*/Addr* base, ML_(ppCfiExpr)(dst, conv); \ break; \ } \ + case RR_Reg: \ + if (is_s390x_linux) { \ + if (_ctxreg.arg == 16/*dwarf reg 16 is %f0*/) { \ + _how = CFIR_S390X_F0; \ + _off = 0; \ + break; \ + } \ + else if (_ctxreg.arg == 17/*dwarf reg 17 is %f2*/) { \ + _how = CFIR_S390X_F2; \ + _off = 0; \ + break; \ + } \ + else if (_ctxreg.arg == 18/*dwarf reg 18 is %f4*/) { \ + _how = CFIR_S390X_F4; \ + _off = 0; \ + break; \ + } \ + else if (_ctxreg.arg == 19/*dwarf reg 19 is %f6*/) { \ + _how = CFIR_S390X_F6; \ + _off = 0; \ + break; \ + } \ + else if (_ctxreg.arg == 20/*dwarf reg 20 is %f1*/) { \ + _how = CFIR_S390X_F1; \ + _off = 0; \ + break; \ + } \ + else if (_ctxreg.arg == 21/*dwarf reg 21 is %f3*/) { \ + _how = CFIR_S390X_F3; \ + _off = 0; \ + break; \ + } \ + else if (_ctxreg.arg == 22/*dwarf reg 22 is %f5*/) { \ + _how = CFIR_S390X_F5; \ + _off = 0; \ + break; \ + } \ + else if (_ctxreg.arg == 23/*dwarf reg 23 is %f7*/) { \ + _how = CFIR_S390X_F7; \ + _off = 0; \ + break; \ + } \ + } \ + /* Currently we only support RR_Reg for s390. */ \ + why = 2; goto failed; \ default: \ why = 2; goto failed; /* otherwise give up */ \ } @@ -2276,6 +2327,22 @@ static Bool summarise_context(/*OUT*/Addr* base, ctxs->reg[FP_REG] ); SUMMARISE_HOW(si_m->sp_how, si_m->sp_off, ctxs->reg[SP_REG] ); + SUMMARISE_HOW(si_m->f0_how, si_m->f0_off, + ctxs->reg[16/*%f0*/]); + SUMMARISE_HOW(si_m->f2_how, si_m->f2_off, + ctxs->reg[17/*%f2*/]); + SUMMARISE_HOW(si_m->f4_how, si_m->f4_off, + ctxs->reg[18/*%f4*/]); + SUMMARISE_HOW(si_m->f6_how, si_m->f6_off, + ctxs->reg[19/*%f6*/]); + SUMMARISE_HOW(si_m->f1_how, si_m->f1_off, + ctxs->reg[20/*%f1*/]); + SUMMARISE_HOW(si_m->f3_how, si_m->f3_off, + ctxs->reg[21/*%f3*/]); + SUMMARISE_HOW(si_m->f5_how, si_m->f5_off, + ctxs->reg[22/*%f5*/]); + SUMMARISE_HOW(si_m->f7_how, si_m->f7_off, + ctxs->reg[23/*%f7*/]); /* change some defaults to consumable values */ if (si_m->sp_how == CFIR_UNKNOWN) @@ -2288,6 +2355,7 @@ static Bool summarise_context(/*OUT*/Addr* base, si_m->cfa_how = CFIC_IA_SPREL; si_m->cfa_off = 160; } + if (si_m->ra_how == CFIR_UNKNOWN) { if (!debuginfo->cfsi_exprs) debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc), @@ -2299,6 +2367,30 @@ static Bool summarise_context(/*OUT*/Addr* base, Creg_S390_LR); } + if (si_m->f0_how == CFIR_UNKNOWN) + si_m->f0_how = CFIR_SAME; + + if (si_m->f1_how == CFIR_UNKNOWN) + si_m->f1_how = CFIR_SAME; + + if (si_m->f2_how == CFIR_UNKNOWN) + si_m->f2_how = CFIR_SAME; + + if (si_m->f3_how == CFIR_UNKNOWN) + si_m->f3_how = CFIR_SAME; + + if (si_m->f4_how == CFIR_UNKNOWN) + si_m->f4_how = CFIR_SAME; + + if (si_m->f5_how == CFIR_UNKNOWN) + si_m->f5_how = CFIR_SAME; + + if (si_m->f6_how == CFIR_UNKNOWN) + si_m->f6_how = CFIR_SAME; + + if (si_m->f7_how == CFIR_UNKNOWN) + si_m->f7_how = CFIR_SAME; + /* knock out some obviously stupid cases */ if (si_m->ra_how == CFIR_SAME) { why = 3; goto failed; } diff --git a/coregrind/m_debuginfo/storage.c b/coregrind/m_debuginfo/storage.c index 9d6a3fd..a120de0 100644 --- a/coregrind/m_debuginfo/storage.c +++ b/coregrind/m_debuginfo/storage.c @@ -138,6 +138,30 @@ void ML_(ppDiCfSI) ( const XArray* /* of CfiExpr */ exprs, VG_(printf)("{"); \ ML_(ppCfiExpr)(exprs, _off); \ VG_(printf)("}"); \ + } else \ + if (_how == CFIR_S390X_F0) { \ + VG_(printf)("oldF0"); \ + } else \ + if (_how == CFIR_S390X_F1) { \ + VG_(printf)("oldF1"); \ + } else \ + if (_how == CFIR_S390X_F2) { \ + VG_(printf)("oldF2"); \ + } else \ + if (_how == CFIR_S390X_F3) { \ + VG_(printf)("oldF3"); \ + } else \ + if (_how == CFIR_S390X_F4) { \ + VG_(printf)("oldF4"); \ + } else \ + if (_how == CFIR_S390X_F5) { \ + VG_(printf)("oldF5"); \ + } else \ + if (_how == CFIR_S390X_F6) { \ + VG_(printf)("oldF6"); \ + } else \ + if (_how == CFIR_S390X_F7) { \ + VG_(printf)("oldF7"); \ } else { \ vg_assert(0+0); \ } \ @@ -204,7 +228,29 @@ void ML_(ppDiCfSI) ( const XArray* /* of CfiExpr */ exprs, VG_(printf)(" R7="); SHOW_HOW(si_m->r7_how, si_m->r7_off); # elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le) -# elif defined(VGA_s390x) || defined(VGA_mips32) || defined(VGA_mips64) + /* nothing */ +# elif defined(VGA_s390x) + VG_(printf)(" SP="); + SHOW_HOW(si_m->sp_how, si_m->sp_off); + VG_(printf)(" FP="); + SHOW_HOW(si_m->fp_how, si_m->fp_off); + VG_(printf)(" F0="); + SHOW_HOW(si_m->f0_how, si_m->f0_off); + VG_(printf)(" F1="); + SHOW_HOW(si_m->f1_how, si_m->f1_off); + VG_(printf)(" F2="); + SHOW_HOW(si_m->f2_how, si_m->f2_off); + VG_(printf)(" F3="); + SHOW_HOW(si_m->f3_how, si_m->f3_off); + VG_(printf)(" F4="); + SHOW_HOW(si_m->f4_how, si_m->f4_off); + VG_(printf)(" F5="); + SHOW_HOW(si_m->f5_how, si_m->f5_off); + VG_(printf)(" F6="); + SHOW_HOW(si_m->f6_how, si_m->f6_off); + VG_(printf)(" F7="); + SHOW_HOW(si_m->f7_how, si_m->f7_off); +# elif defined(VGA_mips32) || defined(VGA_mips64) VG_(printf)(" SP="); SHOW_HOW(si_m->sp_how, si_m->sp_off); VG_(printf)(" FP="); diff --git a/coregrind/m_libcassert.c b/coregrind/m_libcassert.c index 353dc6c..6d1cd4c 100644 --- a/coregrind/m_libcassert.c +++ b/coregrind/m_libcassert.c @@ -163,19 +163,38 @@ } #elif defined(VGP_s390x_linux) # define GET_STARTREGS(srP) \ - { ULong ia, sp, fp, lr; \ + { ULong ia; \ + ULong block[11]; \ __asm__ __volatile__( \ - "bras %0,0f;" \ - "0: lgr %1,15;" \ - "lgr %2,11;" \ - "lgr %3,14;" \ - : "=r" (ia), "=r" (sp),"=r" (fp),"=r" (lr) \ - /* no read & clobber */ \ + "bras %0, 0f;" \ + "0: " \ + "stg %%r15, 0(%1);" \ + "stg %%r11, 8(%1);" \ + "stg %%r14, 16(%1);" \ + "std %%f0, 24(%1);" \ + "std %%f1, 32(%1);" \ + "std %%f2, 40(%1);" \ + "std %%f3, 48(%1);" \ + "std %%f4, 56(%1);" \ + "std %%f5, 64(%1);" \ + "std %%f6, 72(%1);" \ + "std %%f7, 80(%1);" \ + : /* out */ "=r" (ia) \ + : /* in */ "r" (&block[0]) \ + : /* trash */ "memory" \ ); \ (srP)->r_pc = ia; \ - (srP)->r_sp = sp; \ - (srP)->misc.S390X.r_fp = fp; \ - (srP)->misc.S390X.r_lr = lr; \ + (srP)->r_sp = block[0]; \ + (srP)->misc.S390X.r_fp = block[1]; \ + (srP)->misc.S390X.r_lr = block[2]; \ + (srP)->misc.S390X.r_f0 = block[3]; \ + (srP)->misc.S390X.r_f1 = block[4]; \ + (srP)->misc.S390X.r_f2 = block[5]; \ + (srP)->misc.S390X.r_f3 = block[6]; \ + (srP)->misc.S390X.r_f4 = block[7]; \ + (srP)->misc.S390X.r_f5 = block[8]; \ + (srP)->misc.S390X.r_f6 = block[9]; \ + (srP)->misc.S390X.r_f7 = block[10]; \ } #elif defined(VGP_mips32_linux) # define GET_STARTREGS(srP) \ diff --git a/coregrind/m_machine.c b/coregrind/m_machine.c index c1fd4c2..df842aa 100644 --- a/coregrind/m_machine.c +++ b/coregrind/m_machine.c @@ -118,6 +118,23 @@ void VG_(get_UnwindStartRegs) ( /*OUT*/UnwindStartRegs* regs, = VG_(threads)[tid].arch.vex.guest_FP; regs->misc.S390X.r_lr = VG_(threads)[tid].arch.vex.guest_LR; + /* ANDREAS 3 Apr 2019 FIXME r_f0..r_f7: is this correct? */ + regs->misc.S390X.r_f0 + = VG_(threads)[tid].arch.vex.guest_v0.w64[0]; + regs->misc.S390X.r_f1 + = VG_(threads)[tid].arch.vex.guest_v1.w64[0]; + regs->misc.S390X.r_f2 + = VG_(threads)[tid].arch.vex.guest_v2.w64[0]; + regs->misc.S390X.r_f3 + = VG_(threads)[tid].arch.vex.guest_v3.w64[0]; + regs->misc.S390X.r_f4 + = VG_(threads)[tid].arch.vex.guest_v4.w64[0]; + regs->misc.S390X.r_f5 + = VG_(threads)[tid].arch.vex.guest_v5.w64[0]; + regs->misc.S390X.r_f6 + = VG_(threads)[tid].arch.vex.guest_v6.w64[0]; + regs->misc.S390X.r_f7 + = VG_(threads)[tid].arch.vex.guest_v7.w64[0]; # elif defined(VGA_mips32) regs->r_pc = VG_(threads)[tid].arch.vex.guest_PC; regs->r_sp = VG_(threads)[tid].arch.vex.guest_r29; diff --git a/coregrind/m_signals.c b/coregrind/m_signals.c index 2357757..7591eb3 100644 --- a/coregrind/m_signals.c +++ b/coregrind/m_signals.c @@ -526,6 +526,14 @@ typedef struct SigQueue { (srP)->r_sp = (ULong)((uc)->uc_mcontext.regs.gprs[15]); \ (srP)->misc.S390X.r_fp = (uc)->uc_mcontext.regs.gprs[11]; \ (srP)->misc.S390X.r_lr = (uc)->uc_mcontext.regs.gprs[14]; \ + (srP)->misc.S390X.r_f0 = (uc)->uc_mcontext.fpregs.fprs[0]; \ + (srP)->misc.S390X.r_f1 = (uc)->uc_mcontext.fpregs.fprs[1]; \ + (srP)->misc.S390X.r_f2 = (uc)->uc_mcontext.fpregs.fprs[2]; \ + (srP)->misc.S390X.r_f3 = (uc)->uc_mcontext.fpregs.fprs[3]; \ + (srP)->misc.S390X.r_f4 = (uc)->uc_mcontext.fpregs.fprs[4]; \ + (srP)->misc.S390X.r_f5 = (uc)->uc_mcontext.fpregs.fprs[5]; \ + (srP)->misc.S390X.r_f6 = (uc)->uc_mcontext.fpregs.fprs[6]; \ + (srP)->misc.S390X.r_f7 = (uc)->uc_mcontext.fpregs.fprs[7]; \ } #elif defined(VGP_mips32_linux) diff --git a/coregrind/m_stacktrace.c b/coregrind/m_stacktrace.c index bc376eb..b3ac89f 100644 --- a/coregrind/m_stacktrace.c +++ b/coregrind/m_stacktrace.c @@ -1256,6 +1256,14 @@ UInt VG_(get_StackTrace_wrk) ( ThreadId tid_if_known, Addr fp_min = uregs.sp - VG_STACK_REDZONE_SZB; uregs.fp = startRegs->misc.S390X.r_fp; uregs.lr = startRegs->misc.S390X.r_lr; + uregs.f0 = startRegs->misc.S390X.r_f0; + uregs.f1 = startRegs->misc.S390X.r_f1; + uregs.f2 = startRegs->misc.S390X.r_f2; + uregs.f3 = startRegs->misc.S390X.r_f3; + uregs.f4 = startRegs->misc.S390X.r_f4; + uregs.f5 = startRegs->misc.S390X.r_f5; + uregs.f6 = startRegs->misc.S390X.r_f6; + uregs.f7 = startRegs->misc.S390X.r_f7; fp_max = VG_PGROUNDUP(fp_max_orig); if (fp_max >= sizeof(Addr)) diff --git a/coregrind/pub_core_basics.h b/coregrind/pub_core_basics.h index 0d46ce5..d29f3f0 100644 --- a/coregrind/pub_core_basics.h +++ b/coregrind/pub_core_basics.h @@ -85,6 +85,14 @@ typedef struct { ULong r_fp; ULong r_lr; + ULong r_f0; + ULong r_f1; + ULong r_f2; + ULong r_f3; + ULong r_f4; + ULong r_f5; + ULong r_f6; + ULong r_f7; } S390X; struct { UInt r30; /* Stack frame pointer or subroutine variable */ diff --git a/coregrind/pub_core_debuginfo.h b/coregrind/pub_core_debuginfo.h index e3d8453..f9ac903 100644 --- a/coregrind/pub_core_debuginfo.h +++ b/coregrind/pub_core_debuginfo.h @@ -125,7 +125,9 @@ typedef D3UnwindRegs; #elif defined(VGA_s390x) typedef - struct { Addr ia; Addr sp; Addr fp; Addr lr;} + struct { Addr ia; Addr sp; Addr fp; Addr lr; + Addr f0; Addr f1; Addr f2; Addr f3; + Addr f4; Addr f5; Addr f6; Addr f7; } D3UnwindRegs; #elif defined(VGA_mips32) || defined(VGA_mips64) typedef |
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From: Carl L. <ca...@so...> - 2019-04-04 17:32:08
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=82e94fff802aece376d5ca8458ef49d24afd7bdf commit 82e94fff802aece376d5ca8458ef49d24afd7bdf Author: Carl Love <ca...@us...> Date: Thu Apr 4 12:31:05 2019 -0500 PPC64, patch to test case issues reported in bugzilla 401827 and 401828. This corrects a valgrind instruction emulation issue revealed by a GCC change. The xscvdpsp,xscvdpspn,xscvdpuxws instructions each convert double precision values to single precision values, and write the results into bits 0-32 of the 128 bit target register. To get the value into the normal position for a scalar register the result needed to be right-shifted 32 bits, so gcc always did that. It was determined that hardware also always did that, so the (redundant) gcc shift was removed. This exposed an issue because valgrind was only writing the result to bits 0-31 of the target register. This patch updates the emulation to write the result to both of the involved 32-bit fields. VEX/priv/guest_ppc_toIR.c: - rearrange ops in dis_vx_conv to update more portions of the target register with copies of the result. xscvdpsp,xscvdpspn,xscvdpuxws none/tests/ppc64/test_isa_2_06_part1.c - update res32 checking to explicitly include fcfids and fcfidus in the 32-bit result grouping. none/tests/ppc64/test_isa_2_07_part2.c - correct NULL initializer for logic_tests definition [*1] - GCC change referenced: 2017-09-26 Michael Meissner <mei...@li...> * config/rs6000/rs6000.md (movsi_from_sf): Adjust code to eliminate doing a 32-bit shift right or vector extract after doing XSCVDPSPN. patch submitted by: Will Schmidt <wil...@vn...> reviewed, committed by: Carl Love <ce...@us...> Diff: --- NEWS | 3 +++ VEX/priv/guest_ppc_toIR.c | 28 ++++++++++++++++++---------- none/tests/ppc32/test_isa_2_06_part1.c | 7 ++++++- none/tests/ppc64/test_isa_2_07_part2.c | 2 +- 4 files changed, 28 insertions(+), 12 deletions(-) diff --git a/NEWS b/NEWS index d215c36..8e5ea70 100644 --- a/NEWS +++ b/NEWS @@ -98,6 +98,9 @@ where XXXXXX is the bug number as listed below. 401578 drd: crashes sometimes on fork() 401627 memcheck errors with glibc avx2 optimized wcsncmp 401822 none/tests/ppc64/jm-vmx fails and produces assembler warnings +401827 none/tests/ppc64/test_isa_2_06_part3 failure on ppc64le (xvrsqrtesp) +401828 none/tests/ppc64/test_isa_2_06_part1 failure on ppc64le (fcfids and + fcfidus) 402006 mark helper regs defined in final_tidyup before freeres_wrapper call 402048 WARNING: unhandled ppc64[be|le]-linux syscall: 26 (ptrace) 402123 invalid assembler opcodes for mips32r2 diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c index ec7c63a..a8cadd2 100644 --- a/VEX/priv/guest_ppc_toIR.c +++ b/VEX/priv/guest_ppc_toIR.c @@ -16324,28 +16324,36 @@ dis_vx_conv ( UInt theInstr, UInt opc2 ) } case 0x212: // xscvdpsp (VSX Scalar round Double-Precision to single-precision and // Convert to Single-Precision format + // Apr 2019 update - write the result to both halves of the + // target VSR. (see bug 401827,401828). DIP("xscvdpsp v%u,v%u\n", XT, XB); + IRTemp ResultI32a = newTemp(Ity_I32); + assign(ResultI32a, unop( Iop_ReinterpF32asI32, + unop( Iop_TruncF64asF32, + binop( Iop_RoundF64toF32, + get_IR_roundingmode(), + mkexpr( xB ) ) ) ) ); putVSReg( XT, binop( Iop_64HLtoV128, binop( Iop_32HLto64, - unop( Iop_ReinterpF32asI32, - unop( Iop_TruncF64asF32, - binop( Iop_RoundF64toF32, - get_IR_roundingmode(), - mkexpr( xB ) ) ) ), - mkU32( 0 ) ), + mkexpr(ResultI32a ), + mkexpr(ResultI32a ) ), mkU64( 0ULL ) ) ); break; case 0x216: /* xscvdpspn (VSX Scalar convert scalar Single-Precision to vector Single-Precision non-signalling */ + // Apr 2019 update - write the result to both halves of the + // target VSR. (see bug 401827,401828). DIP("xscvdpspn v%u,v%u\n", XT, XB); + IRTemp ResultI32b = newTemp(Ity_I32); + assign(ResultI32b, unop( Iop_ReinterpF32asI32, + unop( Iop_TruncF64asF32, + mkexpr( xB ) ) ) ); putVSReg( XT, binop( Iop_64HLtoV128, binop( Iop_32HLto64, - unop( Iop_ReinterpF32asI32, - unop( Iop_TruncF64asF32, - mkexpr( xB ) ) ), - mkU32( 0 ) ), + mkexpr(ResultI32b ), + mkexpr(ResultI32b ) ), mkU64( 0ULL ) ) ); break; case 0x090: // xscvdpuxws (VSX Scalar truncate Double-Precision to integer diff --git a/none/tests/ppc32/test_isa_2_06_part1.c b/none/tests/ppc32/test_isa_2_06_part1.c index 7a14c6d..e84fafa 100644 --- a/none/tests/ppc32/test_isa_2_06_part1.c +++ b/none/tests/ppc32/test_isa_2_06_part1.c @@ -1873,7 +1873,12 @@ static void test_p7_fpops ( void ) double resd; unsigned long long u0; int i; - int res32 = strcmp(fp_tests[k].name, "fcfidu"); + // fcfids - 64-bit fp converted to inf precise fp integer, rounded to SP. (32) + // fcfidus - 64-bit fp converted to inf precise fp integer, rounded to SP. (32) + // fcfidu - 64-bit fp converted to inf precise fp integer, rounded to DP. (64) + int res32 = ( + (strcmp(fp_tests[k].name, "fcfids")==0) || + (strcmp(fp_tests[k].name, "fcfidus")==0) ); for (i = 0; i < nb_fargs; i++) { u0 = *(unsigned long long *) (&fargs[i]); diff --git a/none/tests/ppc64/test_isa_2_07_part2.c b/none/tests/ppc64/test_isa_2_07_part2.c index a2458a9..5ac1d57 100644 --- a/none/tests/ppc64/test_isa_2_07_part2.c +++ b/none/tests/ppc64/test_isa_2_07_part2.c @@ -781,7 +781,7 @@ logic_tests[] = { { &test_xxleqv, "xxleqv", VSX_EQV }, { &test_xxlorc, "xxlorc", VSX_ORC }, { &test_xxlnand, "xxlnand", VSX_NAND }, - { NULL, NULL} + { NULL, NULL, 0} }; Bool check_reciprocal_estimate(Bool is_rsqrte, int idx, int output_vec_idx) |
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From: Julian S. <se...@so...> - 2019-04-04 10:12:02
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=6b054f132c43a60be3181d6199574d53e7d4f32c commit 6b054f132c43a60be3181d6199574d53e7d4f32c Author: Julian Seward <js...@ac...> Date: Thu Apr 4 12:08:26 2019 +0200 DHAT: when the run ends, print a how-to-view-the-profile hint message. n-i-bz. The aim is to make it zero-effort for users to view the profile after a run. The printed message is as follows: To view the resulting profile, open file:///path/to/valgrind/installation/lib/valgrind/dh_view.html in a web browser, click on "Load..." and then select the file /path/to/dhat.out.12345 Scroll to the end the displayed page to see a short explanation of some of the abbreviations used in the page. This patch adds printing of the message, then filters it out in dhat/tests/filter_stderr, and updates the .stderr.exp files to remove blank lines. Diff: --- dhat/dh_main.c | 10 ++++++++++ dhat/tests/acc.stderr.exp | 2 -- dhat/tests/basic.stderr.exp | 2 -- dhat/tests/big.stderr.exp | 2 -- dhat/tests/empty.stderr.exp | 2 -- dhat/tests/filter_stderr | 23 +++++++++++++++++++++-- dhat/tests/sig.stderr.exp | 2 -- dhat/tests/single.stderr.exp | 2 -- 8 files changed, 31 insertions(+), 14 deletions(-) diff --git a/dhat/dh_main.c b/dhat/dh_main.c index ffcf874..ece2eed 100644 --- a/dhat/dh_main.c +++ b/dhat/dh_main.c @@ -1441,6 +1441,16 @@ static void dh_fini(Int exit_status) g_curr_bytes, g_curr_blocks); VG_(umsg)("Reads: %'llu bytes\n", g_reads_bytes); VG_(umsg)("Writes: %'llu bytes\n", g_writes_bytes); + + // Print a how-to-view-the-profile hint. + VG_(umsg)("\n"); + VG_(umsg)("To view the resulting profile, open\n"); + VG_(umsg)(" file://%s/%s\n", VG_(libdir), "dh_view.html"); + VG_(umsg)("in a web browser, click on \"Load...\" " + "and then select the file\n"); + VG_(umsg)(" %s\n", dhat_out_file); + VG_(umsg)("Scroll to the end the displayed page to see a short\n"); + VG_(umsg)("explanation of some of the abbreviations used in the page.\n"); } //------------------------------------------------------------// diff --git a/dhat/tests/acc.stderr.exp b/dhat/tests/acc.stderr.exp index 7732270..e48b16e 100644 --- a/dhat/tests/acc.stderr.exp +++ b/dhat/tests/acc.stderr.exp @@ -1,5 +1,3 @@ - - Total: 2,534 bytes in 9 blocks At t-gmax: 1,025 bytes in 1 blocks At t-end: 0 bytes in 0 blocks diff --git a/dhat/tests/basic.stderr.exp b/dhat/tests/basic.stderr.exp index bcdec65..cc71444 100644 --- a/dhat/tests/basic.stderr.exp +++ b/dhat/tests/basic.stderr.exp @@ -1,5 +1,3 @@ - - Total: 6,000 bytes in 3 blocks At t-gmax: 5,000 bytes in 2 blocks At t-end: 3,000 bytes in 1 blocks diff --git a/dhat/tests/big.stderr.exp b/dhat/tests/big.stderr.exp index 5733976..04092b6 100644 --- a/dhat/tests/big.stderr.exp +++ b/dhat/tests/big.stderr.exp @@ -1,5 +1,3 @@ - - Total: 1,000 bytes in 19 blocks At t-gmax: 706 bytes in 1 blocks At t-end: 294 bytes in 18 blocks diff --git a/dhat/tests/empty.stderr.exp b/dhat/tests/empty.stderr.exp index 6b189fd..e5adf91 100644 --- a/dhat/tests/empty.stderr.exp +++ b/dhat/tests/empty.stderr.exp @@ -1,5 +1,3 @@ - - Total: 0 bytes in 0 blocks At t-gmax: 0 bytes in 0 blocks At t-end: 0 bytes in 0 blocks diff --git a/dhat/tests/filter_stderr b/dhat/tests/filter_stderr index 6b4058b..e02ecc8 100755 --- a/dhat/tests/filter_stderr +++ b/dhat/tests/filter_stderr @@ -4,6 +4,25 @@ dir=`dirname $0` $dir/../../tests/filter_stderr_basic | -# Remove "Massif, ..." line and the following copyright line. -sed "/^DHAT, a dynamic heap analysis tool/ , /./ d" +# Remove the "DHAT, ..." line and the following copyright line. +sed "/^DHAT, a dynamic heap analysis tool/ , /./ d" | +# Remove the six hint-lines, which look like this: +# +# To view the resulting profile, open +# file:///path/to/valgrind/installation/lib/valgrind/dh_view.html +# in a web browser, click on "Load..." and then select the file +# /path/to/dhat.out.12345 +# Scroll to the end the displayed page to see a short +# explanation of some of the abbreviations used in the page. +# +sed "/^To view the resulting profile/ d" | +sed "/^ file:\/\/\// d" | +sed "/^in a web browser/ d" | +sed "/^ \// d" | # This is pretty feeble, but I don't see + # how to do better +sed "/^Scroll to the end/ d" | +sed "/^explanation of some/ d" | + +# and remove any blank lines in the output +sed "/^[[:space:]]*$/d" diff --git a/dhat/tests/sig.stderr.exp b/dhat/tests/sig.stderr.exp index d5a50cf..fc0af35 100644 --- a/dhat/tests/sig.stderr.exp +++ b/dhat/tests/sig.stderr.exp @@ -1,5 +1,3 @@ - - Total: 102 bytes in 16 blocks At t-gmax: 102 bytes in 16 blocks At t-end: 102 bytes in 16 blocks diff --git a/dhat/tests/single.stderr.exp b/dhat/tests/single.stderr.exp index 87e8185..ba8c416 100644 --- a/dhat/tests/single.stderr.exp +++ b/dhat/tests/single.stderr.exp @@ -1,5 +1,3 @@ - - Total: 16 bytes in 1 blocks At t-gmax: 16 bytes in 1 blocks At t-end: 16 bytes in 1 blocks |
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From: Petar J. <pe...@so...> - 2019-04-03 17:50:53
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=37f09ed248387ed3f4c7ba712fbc90e7468f6f4d commit 37f09ed248387ed3f4c7ba712fbc90e7468f6f4d Author: Petar Jovanovic <mip...@gm...> Date: Wed Apr 3 17:38:08 2019 +0000 mips32: pass correct syscall value to kernel in case of __NR_syscall The syscall number has to be put in register v0 before call into the kernel. This was omitted when system call is __NR_syscall (and when the syscall argument is the system call number of interest). Patch by Nikola Milutinovic. Diff: --- coregrind/m_syswrap/syscall-mips32-linux.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/coregrind/m_syswrap/syscall-mips32-linux.S b/coregrind/m_syswrap/syscall-mips32-linux.S index 0bbfb2b..51f6518 100644 --- a/coregrind/m_syswrap/syscall-mips32-linux.S +++ b/coregrind/m_syswrap/syscall-mips32-linux.S @@ -112,7 +112,7 @@ ML_(do_syscall_for_client_WRK): lw $8, 48($29) /* t0 == ThreadState */ - lw $2, 52($29) /* v0 == syscallno */ + lw $2, OFFSET_mips32_r2($8) /* v0 == guest_v0 */ lw $4, OFFSET_mips32_r4($8) lw $5, OFFSET_mips32_r5($8) lw $6, OFFSET_mips32_r6($8) |
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From: Mark W. <ma...@so...> - 2019-04-02 11:50:51
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=965876e22b863bca1cbe7db9578e648397a705a7 commit 965876e22b863bca1cbe7db9578e648397a705a7 Author: Alexandra Hajkova <aha...@re...> Date: Wed Mar 20 10:10:44 2019 +0100 Support arm64 core dump Fixes BZ #405722. Implements coredump-elf.c fill_prstatus() and fill_fpu () for VGP_arm64_linux. Diff: --- NEWS | 1 + coregrind/m_coredump/coredump-elf.c | 71 +++++++++++++++++++++++++++++++++++-- 2 files changed, 69 insertions(+), 3 deletions(-) diff --git a/NEWS b/NEWS index a5222e2..d215c36 100644 --- a/NEWS +++ b/NEWS @@ -133,6 +133,7 @@ where XXXXXX is the bug number as listed below. of the 64-bit destination field. 405734 PPC64, vrlwnm, vrlwmi, vrldrm, vrldmi do not work properly when me < mb 405782 "VEX temporary storage exhausted" when attempting to debug slic3r-pe +405722 Support arm64 core dump n-i-bz add syswrap for PTRACE_GET|SET_THREAD_AREA on amd64. n-i-bz Fix callgrind_annotate non deterministic order for equal total diff --git a/coregrind/m_coredump/coredump-elf.c b/coregrind/m_coredump/coredump-elf.c index 2d36b26..ec15595 100644 --- a/coregrind/m_coredump/coredump-elf.c +++ b/coregrind/m_coredump/coredump-elf.c @@ -380,8 +380,40 @@ static void fill_prstatus(const ThreadState *tst, regs->ARM_cpsr = LibVEX_GuestARM_get_cpsr( &arch->vex ); #elif defined(VGP_arm64_linux) - (void)arch; - I_die_here; + regs->regs[0] = arch->vex.guest_X0; + regs->regs[1] = arch->vex.guest_X1; + regs->regs[2] = arch->vex.guest_X2; + regs->regs[3] = arch->vex.guest_X3; + regs->regs[4] = arch->vex.guest_X4; + regs->regs[5] = arch->vex.guest_X5; + regs->regs[6] = arch->vex.guest_X6; + regs->regs[7] = arch->vex.guest_X7; + regs->regs[8] = arch->vex.guest_X8; + regs->regs[9] = arch->vex.guest_X9; + regs->regs[10] = arch->vex.guest_X10; + regs->regs[11] = arch->vex.guest_X11; + regs->regs[12] = arch->vex.guest_X12; + regs->regs[13] = arch->vex.guest_X13; + regs->regs[14] = arch->vex.guest_X14; + regs->regs[15] = arch->vex.guest_X15; + regs->regs[16] = arch->vex.guest_X16; + regs->regs[17] = arch->vex.guest_X17; + regs->regs[18] = arch->vex.guest_X18; + regs->regs[19] = arch->vex.guest_X19; + regs->regs[20] = arch->vex.guest_X20; + regs->regs[21] = arch->vex.guest_X21; + regs->regs[22] = arch->vex.guest_X22; + regs->regs[23] = arch->vex.guest_X23; + regs->regs[24] = arch->vex.guest_X24; + regs->regs[25] = arch->vex.guest_X25; + regs->regs[26] = arch->vex.guest_X26; + regs->regs[27] = arch->vex.guest_X27; + regs->regs[28] = arch->vex.guest_X28; + regs->regs[29] = arch->vex.guest_X29; + regs->regs[30] = arch->vex.guest_X30; + regs->sp = arch->vex.guest_XSP; + regs->pc = arch->vex.guest_PC; + regs->pstate = LibVEX_GuestARM64_get_nzcv( &arch->vex ); /* is this correct? */ #elif defined(VGP_s390x_linux) # define DO(n) regs->gprs[n] = arch->vex.guest_r##n @@ -492,7 +524,40 @@ static void fill_fpu(const ThreadState *tst, vki_elf_fpregset_t *fpu) // umm ... #elif defined(VGP_arm64_linux) - I_die_here; + fpu->vregs[0] = *(const __uint128_t*)arch->vex.guest_Q0; + fpu->vregs[1] = *(const __uint128_t*)arch->vex.guest_Q1; + fpu->vregs[2] = *(const __uint128_t*)arch->vex.guest_Q2; + fpu->vregs[3] = *(const __uint128_t*)arch->vex.guest_Q3; + fpu->vregs[4] = *(const __uint128_t*)arch->vex.guest_Q4; + fpu->vregs[5] = *(const __uint128_t*)arch->vex.guest_Q5; + fpu->vregs[6] = *(const __uint128_t*)arch->vex.guest_Q6; + fpu->vregs[7] = *(const __uint128_t*)arch->vex.guest_Q7; + fpu->vregs[8] = *(const __uint128_t*)arch->vex.guest_Q8; + fpu->vregs[9] = *(const __uint128_t*)arch->vex.guest_Q9; + fpu->vregs[10] = *(const __uint128_t*)arch->vex.guest_Q10; + fpu->vregs[11] = *(const __uint128_t*)arch->vex.guest_Q11; + fpu->vregs[12] = *(const __uint128_t*)arch->vex.guest_Q12; + fpu->vregs[13] = *(const __uint128_t*)arch->vex.guest_Q13; + fpu->vregs[14] = *(const __uint128_t*)arch->vex.guest_Q14; + fpu->vregs[15] = *(const __uint128_t*)arch->vex.guest_Q15; + fpu->vregs[16] = *(const __uint128_t*)arch->vex.guest_Q16; + fpu->vregs[17] = *(const __uint128_t*)arch->vex.guest_Q17; + fpu->vregs[18] = *(const __uint128_t*)arch->vex.guest_Q18; + fpu->vregs[19] = *(const __uint128_t*)arch->vex.guest_Q19; + fpu->vregs[20] = *(const __uint128_t*)arch->vex.guest_Q20; + fpu->vregs[21] = *(const __uint128_t*)arch->vex.guest_Q21; + fpu->vregs[22] = *(const __uint128_t*)arch->vex.guest_Q22; + fpu->vregs[23] = *(const __uint128_t*)arch->vex.guest_Q23; + fpu->vregs[24] = *(const __uint128_t*)arch->vex.guest_Q24; + fpu->vregs[25] = *(const __uint128_t*)arch->vex.guest_Q25; + fpu->vregs[26] = *(const __uint128_t*)arch->vex.guest_Q26; + fpu->vregs[27] = *(const __uint128_t*)arch->vex.guest_Q27; + fpu->vregs[28] = *(const __uint128_t*)arch->vex.guest_Q28; + fpu->vregs[29] = *(const __uint128_t*)arch->vex.guest_Q29; + fpu->vregs[30] = *(const __uint128_t*)arch->vex.guest_Q30; + fpu->vregs[31] = *(const __uint128_t*)arch->vex.guest_Q31; + fpu->fpsr = *(const __vki_u32*)arch->vex.guest_QCFLAG; + fpu->fpcr = arch->vex.guest_FPCR; #elif defined(VGP_s390x_linux) /* NOTE: The 16 FP registers map to the first 16 VSX registers. */ |
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From: Julian S. <se...@so...> - 2019-04-01 13:33:07
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=ec4fcffbac6b78163024d634093a15f76e26c38b commit ec4fcffbac6b78163024d634093a15f76e26c38b Author: Julian Seward <js...@ac...> Date: Mon Apr 1 15:31:13 2019 +0200 Update NEWS and docs/internals/3_14_BUGSTATUS.txt to reflect current bug-fix status. Diff: --- NEWS | 16 ++++++++++---- docs/internals/3_14_BUGSTATUS.txt | 45 ++++++++++++++++++++------------------- 2 files changed, 35 insertions(+), 26 deletions(-) diff --git a/NEWS b/NEWS index 99950b1..a5222e2 100644 --- a/NEWS +++ b/NEWS @@ -81,9 +81,13 @@ where XXXXXX is the bug number as listed below. 385411 s390x: z13 vector floating-point instructions not implemented 397187 z13 vector register support for vgdb gdbserver +398183 Vex errors with _mm256_shuffle_epi8/vpshufb +398870 Please add support for instruction vcvtps2ph +399287 amd64 front end: Illegal Instruction vcmptrueps 399301 Use inlined frames in Massif XTree output. 399322 Improve callgrind_annotate output 399444 VEX/priv/guest_s390_toIR.c:17407: (style) Mismatching assignment [..] +400164 helgrind test encounters mips x-compiler warnings and assembler error 400490 s390x: VRs allocated as if separate from FPRs 400491 s390x: Operand of LOCH treated as unsigned integer 400975 Compile error: error: '-mips64r2' conflicts with the other architecture @@ -96,6 +100,7 @@ where XXXXXX is the bug number as listed below. 401822 none/tests/ppc64/jm-vmx fails and produces assembler warnings 402006 mark helper regs defined in final_tidyup before freeres_wrapper call 402048 WARNING: unhandled ppc64[be|le]-linux syscall: 26 (ptrace) +402123 invalid assembler opcodes for mips32r2 402134 assertion fail in mc_translate.c (noteTmpUsesIn) Iex_VECRET on arm64 402327 Warning: DWARF2 CFI reader: unhandled DW_OP_ opcode 0x13 (DW_OP_drop) 402341 drd/tests/tsan_thread_wrappers_pthread.h:369: suspicious code ? @@ -107,21 +112,23 @@ where XXXXXX is the bug number as listed below. 402515 Implement new option --show-error-list=no|yes / -s 402519 POWER 3.0 addex instruction incorrectly implemented 402781 Redo the cache used to process indirect branch targets -403123 vex amd64->IR: unhandled instruction bytes: 0xF3 0x48 0xF 0xAE 0xD3 (wrfsbase) +403123 vex amd64->IR:0xF3 0x48 0xF 0xAE 0xD3 (wrfsbase) 403552 s390x: wrong facility bit checked for vector facility 404054 memcheck powerpc subfe x, x, x initializes x to 0 or -1 based on CA 404638 Add VG_(replaceIndexXA) +404888 autotools cleanup series 405079 unhandled ppc64le-linux syscall: 131 (quotactl) -405403 s390x disassembler cannot be used on x86 -405458 MIPS mkFormVEC arguments swapped? -405716 drd: Fix an integer overflow in the stack margin calculation +405182 Valgrind fails to build with Clang 405356 PPC64, xvcvsxdsp, xvcvuxdsp are supposed to write the 32-bit result to the upper and lower 32-bits of the 64-bit result 405362 PPC64, vmsummbm instruction doesn't handle overflow case correctly 405363 PPC64, xvcvdpsxws, xvcvdpuxws, do not handle NaN arguments correctly. 405365 PPC64, function _get_maxmin_fp_NaN() doesn't handle QNaN, SNaN case correctly. +405403 s390x disassembler cannot be used on x86 405430 Use gcc -Wimplicit-fallthrough=2 by default if available +405458 MIPS mkFormVEC arguments swapped? +405716 drd: Fix an integer overflow in the stack margin calculation 405733 PPC64, xvcvdpsp should write 32-bit result to upper and lower 32-bits of the 64-bit destination field. 405734 PPC64, vrlwnm, vrlwmi, vrldrm, vrldmi do not work properly when me < mb @@ -131,6 +138,7 @@ n-i-bz add syswrap for PTRACE_GET|SET_THREAD_AREA on amd64. n-i-bz Fix callgrind_annotate non deterministic order for equal total n-i-bz callgrind_annotate --threshold=100 does not print all functions. n-i-bz callgrind_annotate Use of uninitialized value in numeric gt (>) +n-i-bz amd64 (x86_64): RDRAND and F16C insn set extensions are supported diff --git a/docs/internals/3_14_BUGSTATUS.txt b/docs/internals/3_14_BUGSTATUS.txt index 6c5177f..c909de6 100644 --- a/docs/internals/3_14_BUGSTATUS.txt +++ b/docs/internals/3_14_BUGSTATUS.txt @@ -6,12 +6,17 @@ Created Sat 9 Mar 2019. This contains bugs reported only after the release of 3.14.0. Unlike in 3_13_BUGSTATUS.txt and perhaps earlier such files, it doesn't carry over bugs from earlier versions. +*s show prio for 3.15.0: + +** high prio +* medium prio + ======================================================================== ======================================================================== === Debuginfo reader =================================================== -404843 s390x: backtrace sometimes ends prematurely +404843*8 s390x: backtrace sometimes ends prematurely Should try to fix for 3.15.0 405295 valgrind 3.14.0 dies due to mysterious DWARF information? (output from @@ -41,7 +46,7 @@ doesn't carry over bugs from earlier versions. === Tools/Callgrind ==================================================== -399355 Add callgrind_diff +399355* Add callgrind_diff Has patch 400234 keep the parameters of the most costly path Wishlist @@ -50,7 +55,7 @@ doesn't carry over bugs from earlier versions. === Tools/DRD ========================================================== === Tools/Helgrind ===================================================== -400793 pthread_rwlock_timedwrlock false positive +400793* pthread_rwlock_timedwrlock false positive Probably would be easy to fix, but requires testing 405205 tests/filter_libc: remove the line holding the futex syscall error entirely @@ -62,7 +67,7 @@ doesn't carry over bugs from earlier versions. 398569 invalid reads reported in libarmmem memcmp when using strings 8 byte p-l-ok thing on arm32 -401284 False positive "Source and destination overlap in strncat" +401284* False positive "Source and destination overlap in strncat" possibly valid; possible off-by-one error in overlap checking? 402604 Report All Dangling pointers upon exit and monitor command Wishlist @@ -71,14 +76,14 @@ doesn't carry over bugs from earlier versions. 403802 leak_cpp_interior fails with some reachable blocks different than expected Leak-count numbers differ? -405201 Incorrect size of struct vki_siginfo on 64-bit Linux architectures +405201* Incorrect size of struct vki_siginfo on 64-bit Linux architectures === Tools/SGCheck ====================================================== === Uncategorised ====================================================== === Uncategorised/build ================================================ 398649 New s390x z13 support doesn't build with older gcc/binutils -400162 Patch: Guard against __GLIBC_PREREQ for musl libc +400162* Patch: Guard against __GLIBC_PREREQ for musl libc Looks like simple fix; should take 400164 helgrind test encounters mips x-compiler warnings and assembler error Obscure compiler? @@ -86,10 +91,6 @@ doesn't carry over bugs from earlier versions. Some LTO wierdness; doesn't seem terribly important 402123 invalid assembler opcodes for mips32r2 402351 mips64 libvexmultiarch_test fails on s390x -404888 [PATCH] autotools cleanup series - Should try to land for 3.15.0 -405182 Valgrind fails to build with Clang - Should try to land for 3.15.0 === Uncategorised/run ================================================== @@ -100,19 +101,18 @@ doesn't carry over bugs from earlier versions. === VEX ================================================================ === VEX/amd64 ========================================================== -398183 Vex errors with _mm256_shuffle_epi8/vpshufb - Potentially serious? 398523 unhandled instruction bytes: 0x8F 0xEA 0x78 0x10 0xD0 0x8 0x4 0x0 0x0 == 381819 398545 Support for SHA instruction on Ryzen -398870 Please add support for instruction vcvtps2ph -399287 Illegal Instruction vcmptrueps -400538 vex amd64->IR: 0x48 0xCF 0xF 0x1F 0x0 0xFF 0xD2 0xCC 0x90 0x55 + +398870* Please add support for instruction vcvtps2ph + +400538* vex amd64->IR: 0x48 0xCF 0xF 0x1F 0x0 0xFF 0xD2 0xCC 0x90 0x55 Should fix (Wine/Windows) + This is IRETQ. Are we expecting that to work at all in user space? + 400829 unhandled instruction bytes in macOS Seems like CMOVNS; and therefore I think this is fishy -404272 vex amd64->IR: 0x66 0xF 0x38 0x23 0xC0 0xF3 (PMOVSXWD) - Should fix === VEX/arm32 ========================================================== @@ -140,7 +140,7 @@ doesn't carry over bugs from earlier versions. === VEX/x86 ============================================================ -401719 sterrror_r on i686 causes a GPF +401719* sterrror_r on i686 causes a GPF 32-bit segreg problem; maybe we should fix? === zz_other =========================================================== @@ -171,7 +171,7 @@ doesn't carry over bugs from earlier versions. === zz_other/Win32 ===================================================== === zz_other/x86 ======================================================= -400099 Memcheck produces truncated backtrace when len(argv + env) = 4096 +400099** Memcheck produces truncated backtrace when len(argv + env) = 4096 Possible stack overrun problem; should investigate ======================================================================== @@ -180,9 +180,10 @@ doesn't carry over bugs from earlier versions. -- Mon 3 Sep 12:01:52 CEST 2018 -Support RDRAND/RDSEED ? We really should. -Support RDPMC ? -Improve PDB reading ? I thought I saw some patches for this, but where? +Support RDPMC* ? +Improve PDB* reading ? I thought I saw some patches for this .. is it 253657 ? + +Remove FSGSBASE from CPUID Sat 9 Mar 18:48:58 CET 2019 |