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From: Petar J. <pe...@so...> - 2019-03-14 16:05:56
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=cd20c8ca5815f0abf9d1bdb47888753bdb5c5738 commit cd20c8ca5815f0abf9d1bdb47888753bdb5c5738 Author: Petar Jovanovic <mip...@gm...> Date: Thu Mar 14 16:02:53 2019 +0000 Finetune arch_hwcaps() in none/tests/libvex_test.c The libvexmultiarch_test failed on s390, since VEX was configured for MIPS64 with 32bit FPUs. Modify arch_hwcaps() to a realist case with 64bit FPUs. This fixes KDE #402351. Diff: --- NEWS | 1 + none/tests/libvex_test.c | 8 +++++--- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/NEWS b/NEWS index 054c25d..981f69c 100644 --- a/NEWS +++ b/NEWS @@ -97,6 +97,7 @@ where XXXXXX is the bug number as listed below. 402134 assertion fail in mc_translate.c (noteTmpUsesIn) Iex_VECRET on arm64 402327 Warning: DWARF2 CFI reader: unhandled DW_OP_ opcode 0x13 (DW_OP_drop) 402341 drd/tests/tsan_thread_wrappers_pthread.h:369: suspicious code ? +402351 mips64 libvexmultiarch_test fails on s390x 402369 Overhaul DHAT 402395 coregrind/vgdb-invoker-solaris.c: 2 * poor error checking 402480 Do not use %rsp in clobber list diff --git a/none/tests/libvex_test.c b/none/tests/libvex_test.c index a39930f..bb1738a 100644 --- a/none/tests/libvex_test.c +++ b/none/tests/libvex_test.c @@ -127,11 +127,13 @@ static UInt arch_hwcaps (VexArch va) { case VexArchPPC64: return 0; case VexArchS390X: return VEX_HWCAPS_S390X_LDISP; #if (__mips_isa_rev>=6) - case VexArchMIPS32: return VEX_PRID_COMP_MIPS | VEX_MIPS_CPU_ISA_M32R6; - case VexArchMIPS64: return VEX_PRID_COMP_MIPS | VEX_MIPS_CPU_ISA_M64R6; + case VexArchMIPS32: return VEX_PRID_COMP_MIPS | VEX_MIPS_CPU_ISA_M32R6 | + VEX_MIPS_HOST_FR; + case VexArchMIPS64: return VEX_PRID_COMP_MIPS | VEX_MIPS_CPU_ISA_M64R6 | + VEX_MIPS_HOST_FR; #else case VexArchMIPS32: return VEX_PRID_COMP_MIPS; - case VexArchMIPS64: return VEX_PRID_COMP_MIPS; + case VexArchMIPS64: return VEX_PRID_COMP_MIPS | VEX_MIPS_HOST_FR; #endif default: failure_exit(); } |
|
From: Tom H. <tom...@so...> - 2019-03-14 15:23:38
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=2102b6c36965ffd559ebe5ac98800765517fcb3b commit 2102b6c36965ffd559ebe5ac98800765517fcb3b Author: Tom Hughes <to...@co...> Date: Thu Mar 14 15:22:44 2019 +0000 Document 403123 as fixed Diff: --- NEWS | 1 + 1 file changed, 1 insertion(+) diff --git a/NEWS b/NEWS index b1debc3..054c25d 100644 --- a/NEWS +++ b/NEWS @@ -104,6 +104,7 @@ where XXXXXX is the bug number as listed below. 402515 Implement new option --show-error-list=no|yes / -s 402519 POWER 3.0 addex instruction incorrectly implemented 402781 Redo the cache used to process indirect branch targets +403123 vex amd64->IR: unhandled instruction bytes: 0xF3 0x48 0xF 0xAE 0xD3 (wrfsbase) 403552 s390x: wrong facility bit checked for vector facility 404054 memcheck powerpc subfe x, x, x initializes x to 0 or -1 based on CA 405079 unhandled ppc64le-linux syscall: 131 (quotactl) |
|
From: Tom H. <tom...@so...> - 2019-03-14 15:19:44
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=09566120e705d8831aaa7076b439d3ad90b78773 commit 09566120e705d8831aaa7076b439d3ad90b78773 Author: Tom Hughes <to...@co...> Date: Thu Mar 14 15:15:41 2019 +0000 Suppress FSGSBASE flag from cpuid results We don't support {rd,wr}{fs,gs}base so we shouldn't say we do. Diff: --- VEX/priv/guest_amd64_helpers.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/VEX/priv/guest_amd64_helpers.c b/VEX/priv/guest_amd64_helpers.c index 30e82db..f12b71e 100644 --- a/VEX/priv/guest_amd64_helpers.c +++ b/VEX/priv/guest_amd64_helpers.c @@ -3361,7 +3361,8 @@ void amd64g_dirtyhelper_CPUID_avx2 ( VexGuestAMD64State* st ) break; case 0x00000007: switch (old_ecx) { - case 0x00000000: SET_ABCD(0x00000000, 0x000027ab, + /* Don't advertise FSGSBASE support, bit 0 in EBX. */ + case 0x00000000: SET_ABCD(0x00000000, 0x000027aa, 0x00000000, 0x00000000); break; default: SET_ABCD(0x00000000, 0x00000000, 0x00000000, 0x00000000); break; |
|
From: Julian S. <se...@so...> - 2019-03-13 13:29:17
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=ea09451baf13c13dfea3869b0df34b677e0557bb commit ea09451baf13c13dfea3869b0df34b677e0557bb Author: Julian Seward <js...@ac...> Date: Wed Mar 13 14:24:46 2019 +0100 Bug 399287 - amd64 front end: Illegal Instruction vcmptrueps. Add test cases. Diff: --- none/tests/amd64/avx-1.c | 607 ++- none/tests/amd64/avx-1.stdout.exp | 10611 ++++++++++++++++++++++++++++++++++++ 2 files changed, 11211 insertions(+), 7 deletions(-) diff --git a/none/tests/amd64/avx-1.c b/none/tests/amd64/avx-1.c index 1c6f0c0..134725c 100644 --- a/none/tests/amd64/avx-1.c +++ b/none/tests/amd64/avx-1.c @@ -219,9 +219,15 @@ GEN_test_RandM(VCMPSD_128_0x7, GEN_test_RandM(VCMPSD_128_0x8, "vcmpsd $8, %%xmm6, %%xmm8, %%xmm7", "vcmpsd $8, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPSD_128_0x9, + "vcmpsd $9, %%xmm6, %%xmm8, %%xmm7", + "vcmpsd $9, (%%rsi), %%xmm8, %%xmm7") GEN_test_RandM(VCMPSD_128_0xA, "vcmpsd $0xA, %%xmm6, %%xmm8, %%xmm7", "vcmpsd $0xA, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPSD_128_0xB, + "vcmpsd $0xB, %%xmm6, %%xmm8, %%xmm7", + "vcmpsd $0xB, (%%rsi), %%xmm8, %%xmm7") GEN_test_RandM(VCMPSD_128_0xC, "vcmpsd $0xC, %%xmm6, %%xmm8, %%xmm7", "vcmpsd $0xC, (%%rsi), %%xmm8, %%xmm7") @@ -231,6 +237,9 @@ GEN_test_RandM(VCMPSD_128_0xD, GEN_test_RandM(VCMPSD_128_0xE, "vcmpsd $0xE, %%xmm6, %%xmm8, %%xmm7", "vcmpsd $0xE, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPSD_128_0xF, + "vcmpsd $0xF, %%xmm6, %%xmm8, %%xmm7", + "vcmpsd $0xF, (%%rsi), %%xmm8, %%xmm7") GEN_test_RandM(VCMPSD_128_0x10, "vcmpsd $0x10, %%xmm6, %%xmm8, %%xmm7", "vcmpsd $0x10, (%%rsi), %%xmm8, %%xmm7") @@ -264,6 +273,9 @@ GEN_test_RandM(VCMPSD_128_0x19, GEN_test_RandM(VCMPSD_128_0x1A, "vcmpsd $0x1A, %%xmm6, %%xmm8, %%xmm7", "vcmpsd $0x1A, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPSD_128_0x1B, + "vcmpsd $0x1B, %%xmm6, %%xmm8, %%xmm7", + "vcmpsd $0x1B, (%%rsi), %%xmm8, %%xmm7") GEN_test_RandM(VCMPSD_128_0x1C, "vcmpsd $0x1C, %%xmm6, %%xmm8, %%xmm7", "vcmpsd $0x1C, (%%rsi), %%xmm8, %%xmm7") @@ -273,6 +285,9 @@ GEN_test_RandM(VCMPSD_128_0x1D, GEN_test_RandM(VCMPSD_128_0x1E, "vcmpsd $0x1E, %%xmm6, %%xmm8, %%xmm7", "vcmpsd $0x1E, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPSD_128_0x1F, + "vcmpsd $0x1F, %%xmm6, %%xmm8, %%xmm7", + "vcmpsd $0x1F, (%%rsi), %%xmm8, %%xmm7") GEN_test_RandM(VSQRTSD_128, "vsqrtsd %%xmm6, %%xmm8, %%xmm7", @@ -665,9 +680,15 @@ GEN_test_RandM(VCMPSS_128_0x7, GEN_test_RandM(VCMPSS_128_0x8, "vcmpss $8, %%xmm6, %%xmm8, %%xmm7", "vcmpss $8, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPSS_128_0x9, + "vcmpss $0x9, %%xmm6, %%xmm8, %%xmm7", + "vcmpss $0x9, (%%rsi), %%xmm8, %%xmm7") GEN_test_RandM(VCMPSS_128_0xA, "vcmpss $0xA, %%xmm6, %%xmm8, %%xmm7", "vcmpss $0xA, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPSS_128_0xB, + "vcmpss $0xB, %%xmm6, %%xmm8, %%xmm7", + "vcmpss $0xB, (%%rsi), %%xmm8, %%xmm7") GEN_test_RandM(VCMPSS_128_0xC, "vcmpss $0xC, %%xmm6, %%xmm8, %%xmm7", "vcmpss $0xC, (%%rsi), %%xmm8, %%xmm7") @@ -677,6 +698,9 @@ GEN_test_RandM(VCMPSS_128_0xD, GEN_test_RandM(VCMPSS_128_0xE, "vcmpss $0xE, %%xmm6, %%xmm8, %%xmm7", "vcmpss $0xE, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPSS_128_0xF, + "vcmpss $0xF, %%xmm6, %%xmm8, %%xmm7", + "vcmpss $0xF, (%%rsi), %%xmm8, %%xmm7") GEN_test_RandM(VCMPSS_128_0x10, "vcmpss $0x10, %%xmm6, %%xmm8, %%xmm7", "vcmpss $0x10, (%%rsi), %%xmm8, %%xmm7") @@ -710,6 +734,9 @@ GEN_test_RandM(VCMPSS_128_0x19, GEN_test_RandM(VCMPSS_128_0x1A, "vcmpss $0x1A, %%xmm6, %%xmm8, %%xmm7", "vcmpss $0x1A, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPSS_128_0x1B, + "vcmpss $0x1B, %%xmm6, %%xmm8, %%xmm7", + "vcmpss $0x1B, (%%rsi), %%xmm8, %%xmm7") GEN_test_RandM(VCMPSS_128_0x1C, "vcmpss $0x1C, %%xmm6, %%xmm8, %%xmm7", "vcmpss $0x1C, (%%rsi), %%xmm8, %%xmm7") @@ -719,6 +746,9 @@ GEN_test_RandM(VCMPSS_128_0x1D, GEN_test_RandM(VCMPSS_128_0x1E, "vcmpss $0x1E, %%xmm6, %%xmm8, %%xmm7", "vcmpss $0x1E, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPSS_128_0x1F, + "vcmpss $0x1F, %%xmm6, %%xmm8, %%xmm7", + "vcmpss $0x1F, (%%rsi), %%xmm8, %%xmm7") // The x suffix denotes a 128 -> 64 operation GEN_test_RandM(VCVTPD2PS_128, @@ -1081,22 +1111,422 @@ GEN_test_RandM(VXORPD_256, GEN_test_Monly(VBROADCASTSD_256, "vbroadcastsd (%%rsi), %%ymm8") +GEN_test_RandM(VCMPPD_128_0x0, + "vcmppd $0, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x0, + "vcmppd $0, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x0, + "vcmpps $0, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x0, + "vcmpps $0, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x1, + "vcmppd $1, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $1, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x1, + "vcmppd $1, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $1, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x1, + "vcmpps $1, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $1, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x1, + "vcmpps $1, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $1, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x2, + "vcmppd $2, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $2, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x2, + "vcmppd $2, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $2, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x2, + "vcmpps $2, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $2, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x2, + "vcmpps $2, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $2, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x3, + "vcmppd $3, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $3, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x3, + "vcmppd $3, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $3, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x3, + "vcmpps $3, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $3, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x3, + "vcmpps $3, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $3, (%%rsi), %%ymm8, %%ymm7") + GEN_test_RandM(VCMPPD_128_0x4, "vcmppd $4, %%xmm6, %%xmm8, %%xmm7", "vcmppd $4, (%%rsi), %%xmm8, %%xmm7") - GEN_test_RandM(VCMPPD_256_0x4, "vcmppd $4, %%ymm6, %%ymm8, %%ymm7", "vcmppd $4, (%%rsi), %%ymm8, %%ymm7") - GEN_test_RandM(VCMPPS_128_0x4, "vcmpps $4, %%xmm6, %%xmm8, %%xmm7", "vcmpps $4, (%%rsi), %%xmm8, %%xmm7") - GEN_test_RandM(VCMPPS_256_0x4, "vcmpps $4, %%ymm6, %%ymm8, %%ymm7", "vcmpps $4, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPD_128_0x5, + "vcmppd $5, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $5, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x5, + "vcmppd $5, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $5, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x5, + "vcmpps $5, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $5, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x5, + "vcmpps $5, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $5, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x6, + "vcmppd $6, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $6, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x6, + "vcmppd $6, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $6, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x6, + "vcmpps $6, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $6, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x6, + "vcmpps $6, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $6, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x7, + "vcmppd $7, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $7, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x7, + "vcmppd $7, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $7, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x7, + "vcmpps $7, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $7, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x7, + "vcmpps $7, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $7, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x8, + "vcmppd $8, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $8, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x8, + "vcmppd $8, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $8, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x8, + "vcmpps $8, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $8, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x8, + "vcmpps $8, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $8, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x9, + "vcmppd $9, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $9, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x9, + "vcmppd $9, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $9, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x9, + "vcmpps $9, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $9, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x9, + "vcmpps $9, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $9, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0xA, + "vcmppd $0xA, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0xA, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0xA, + "vcmppd $0xA, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0xA, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0xA, + "vcmpps $0xA, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0xA, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0xA, + "vcmpps $0xA, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0xA, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0xB, + "vcmppd $0xB, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0xB, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0xB, + "vcmppd $0xB, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0xB, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0xB, + "vcmpps $0xB, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0xB, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0xB, + "vcmpps $0xB, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0xB, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0xC, + "vcmppd $0xC, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0xC, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0xC, + "vcmppd $0xC, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0xC, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0xC, + "vcmpps $0xC, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0xC, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0xC, + "vcmpps $0xC, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0xC, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0xD, + "vcmppd $0xD, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0xD, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0xD, + "vcmppd $0xD, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0xD, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0xD, + "vcmpps $0xD, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0xD, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0xD, + "vcmpps $0xD, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0xD, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0xE, + "vcmppd $0xE, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0xE, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0xE, + "vcmppd $0xE, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0xE, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0xE, + "vcmpps $0xE, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0xE, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0xE, + "vcmpps $0xE, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0xE, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0xF, + "vcmppd $0xF, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0xF, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0xF, + "vcmppd $0xF, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0xF, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0xF, + "vcmpps $0xF, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0xF, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0xF, + "vcmpps $0xF, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0xF, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x10, + "vcmppd $0x10, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x10, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x10, + "vcmppd $0x10, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x10, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x10, + "vcmpps $0x10, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x10, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x10, + "vcmpps $0x10, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x10, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x11, + "vcmppd $0x11, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x11, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x11, + "vcmppd $0x11, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x11, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x11, + "vcmpps $0x11, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x11, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x11, + "vcmpps $0x11, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x11, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x12, + "vcmppd $0x12, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x12, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x12, + "vcmppd $0x12, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x12, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x12, + "vcmpps $0x12, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x12, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x12, + "vcmpps $0x12, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x12, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x13, + "vcmppd $0x13, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x13, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x13, + "vcmppd $0x13, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x13, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x13, + "vcmpps $0x13, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x13, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x13, + "vcmpps $0x13, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x13, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x14, + "vcmppd $0x14, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x14, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x14, + "vcmppd $0x14, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x14, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x14, + "vcmpps $0x14, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x14, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x14, + "vcmpps $0x14, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x14, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x15, + "vcmppd $0x15, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x15, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x15, + "vcmppd $0x15, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x15, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x15, + "vcmpps $0x15, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x15, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x15, + "vcmpps $0x15, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x15, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x16, + "vcmppd $0x16, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x16, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x16, + "vcmppd $0x16, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x16, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x16, + "vcmpps $0x16, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x16, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x16, + "vcmpps $0x16, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x16, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x17, + "vcmppd $0x17, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x17, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x17, + "vcmppd $0x17, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x17, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x17, + "vcmpps $0x17, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x17, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x17, + "vcmpps $0x17, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x17, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x18, + "vcmppd $0x18, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x18, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x18, + "vcmppd $0x18, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x18, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x18, + "vcmpps $0x18, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x18, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x18, + "vcmpps $0x18, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x18, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x19, + "vcmppd $0x19, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x19, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x19, + "vcmppd $0x19, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x19, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x19, + "vcmpps $0x19, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x19, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x19, + "vcmpps $0x19, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x19, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x1A, + "vcmppd $0x1A, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x1A, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x1A, + "vcmppd $0x1A, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x1A, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x1A, + "vcmpps $0x1A, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x1A, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x1A, + "vcmpps $0x1A, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x1A, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x1B, + "vcmppd $0x1B, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x1B, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x1B, + "vcmppd $0x1B, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x1B, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x1B, + "vcmpps $0x1B, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x1B, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x1B, + "vcmpps $0x1B, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x1B, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x1C, + "vcmppd $0x1C, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x1C, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x1C, + "vcmppd $0x1C, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x1C, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x1C, + "vcmpps $0x1C, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x1C, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x1C, + "vcmpps $0x1C, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x1C, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x1D, + "vcmppd $0x1D, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x1D, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x1D, + "vcmppd $0x1D, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x1D, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x1D, + "vcmpps $0x1D, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x1D, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x1D, + "vcmpps $0x1D, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x1D, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x1E, + "vcmppd $0x1E, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x1E, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x1E, + "vcmppd $0x1E, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x1E, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x1E, + "vcmpps $0x1E, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x1E, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x1E, + "vcmpps $0x1E, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x1E, (%%rsi), %%ymm8, %%ymm7") + +GEN_test_RandM(VCMPPD_128_0x1F, + "vcmppd $0x1F, %%xmm6, %%xmm8, %%xmm7", + "vcmppd $0x1F, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPD_256_0x1F, + "vcmppd $0x1F, %%ymm6, %%ymm8, %%ymm7", + "vcmppd $0x1F, (%%rsi), %%ymm8, %%ymm7") +GEN_test_RandM(VCMPPS_128_0x1F, + "vcmpps $0x1F, %%xmm6, %%xmm8, %%xmm7", + "vcmpps $0x1F, (%%rsi), %%xmm8, %%xmm7") +GEN_test_RandM(VCMPPS_256_0x1F, + "vcmpps $0x1F, %%ymm6, %%ymm8, %%ymm7", + "vcmpps $0x1F, (%%rsi), %%ymm8, %%ymm7") + GEN_test_RandM(VCVTDQ2PD_128, "vcvtdq2pd %%xmm6, %%xmm8", "vcvtdq2pd (%%rsi), %%xmm8") @@ -2209,10 +2639,6 @@ GEN_test_RandM(VPCLMULQDQ_0xFF, "vpclmulqdq $0xFF, %%xmm6, %%xmm8, %%xmm7", "vpclmulqdq $0xFF, (%%rsi), %%xmm8, %%xmm7") -GEN_test_RandM(VCMPSS_128_0x9, - "vcmpss $0x9, %%xmm6, %%xmm8, %%xmm7", - "vcmpss $0x9, (%%rsi), %%xmm8, %%xmm7") - GEN_test_Monly(VMASKMOVPS_128_LoadForm, "vmaskmovps (%%rsi), %%xmm8, %%xmm7;" "vxorps %%xmm6, %%xmm6, %%xmm6;" @@ -2828,6 +3254,173 @@ int main ( void ) DO_D( VMASKMOVPS_256_StoreForm ); DO_D( VMASKMOVPD_128_StoreForm ); DO_D( VMASKMOVPD_256_StoreForm ); + DO_D( VCMPSS_128_0xB ); + DO_D( VCMPSS_128_0xF ); + DO_D( VCMPSS_128_0x1B ); + DO_D( VCMPSS_128_0x1F ); + DO_D( VCMPSD_128_0x9 ); + DO_D( VCMPSD_128_0xB ); + DO_D( VCMPSD_128_0xF ); + DO_D( VCMPSD_128_0x1B ); + DO_D( VCMPSD_128_0x1F ); + + DO_D( VCMPPD_128_0x0 ); + DO_D( VCMPPD_256_0x0 ); + DO_D( VCMPPS_128_0x0 ); + DO_D( VCMPPS_256_0x0 ); + + DO_D( VCMPPD_128_0x1 ); + DO_D( VCMPPD_256_0x1 ); + DO_D( VCMPPS_128_0x1 ); + DO_D( VCMPPS_256_0x1 ); + + DO_D( VCMPPD_128_0x2 ); + DO_D( VCMPPD_256_0x2 ); + DO_D( VCMPPS_128_0x2 ); + DO_D( VCMPPS_256_0x2 ); + + DO_D( VCMPPD_128_0x3 ); + DO_D( VCMPPD_256_0x3 ); + DO_D( VCMPPS_128_0x3 ); + DO_D( VCMPPS_256_0x3 ); + + // The 0x4 group is tested above + + DO_D( VCMPPD_128_0x5 ); + DO_D( VCMPPD_256_0x5 ); + DO_D( VCMPPS_128_0x5 ); + DO_D( VCMPPS_256_0x5 ); + + DO_D( VCMPPD_128_0x6 ); + DO_D( VCMPPD_256_0x6 ); + DO_D( VCMPPS_128_0x6 ); + DO_D( VCMPPS_256_0x6 ); + + DO_D( VCMPPD_128_0x7 ); + DO_D( VCMPPD_256_0x7 ); + DO_D( VCMPPS_128_0x7 ); + DO_D( VCMPPS_256_0x7 ); + + DO_D( VCMPPD_128_0x8 ); + DO_D( VCMPPD_256_0x8 ); + DO_D( VCMPPS_128_0x8 ); + DO_D( VCMPPS_256_0x8 ); + + DO_D( VCMPPD_128_0x9 ); + DO_D( VCMPPD_256_0x9 ); + DO_D( VCMPPS_128_0x9 ); + DO_D( VCMPPS_256_0x9 ); + + DO_D( VCMPPD_128_0xA ); + DO_D( VCMPPD_256_0xA ); + DO_D( VCMPPS_128_0xA ); + DO_D( VCMPPS_256_0xA ); + + DO_D( VCMPPD_128_0xB ); + DO_D( VCMPPD_256_0xB ); + DO_D( VCMPPS_128_0xB ); + DO_D( VCMPPS_256_0xB ); + + DO_D( VCMPPD_128_0xC ); + DO_D( VCMPPD_256_0xC ); + DO_D( VCMPPS_128_0xC ); + if (0) DO_D( VCMPPS_256_0xC ); // FIXME probably denorms etc in input + + DO_D( VCMPPD_128_0xD ); + DO_D( VCMPPD_256_0xD ); + DO_D( VCMPPS_128_0xD ); + DO_D( VCMPPS_256_0xD ); + + DO_D( VCMPPD_128_0xE ); + DO_D( VCMPPD_256_0xE ); + DO_D( VCMPPS_128_0xE ); + DO_D( VCMPPS_256_0xE ); + + DO_D( VCMPPD_128_0xF ); + DO_D( VCMPPD_256_0xF ); + DO_D( VCMPPS_128_0xF ); + DO_D( VCMPPS_256_0xF ); + + DO_D( VCMPPD_128_0x10 ); + DO_D( VCMPPD_256_0x10 ); + DO_D( VCMPPS_128_0x10 ); + DO_D( VCMPPS_256_0x10 ); + + DO_D( VCMPPD_128_0x11 ); + DO_D( VCMPPD_256_0x11 ); + DO_D( VCMPPS_128_0x11 ); + DO_D( VCMPPS_256_0x11 ); + + DO_D( VCMPPD_128_0x12 ); + DO_D( VCMPPD_256_0x12 ); + DO_D( VCMPPS_128_0x12 ); + DO_D( VCMPPS_256_0x12 ); + + DO_D( VCMPPD_128_0x13 ); + DO_D( VCMPPD_256_0x13 ); + DO_D( VCMPPS_128_0x13 ); + DO_D( VCMPPS_256_0x13 ); + + DO_D( VCMPPD_128_0x14 ); + DO_D( VCMPPD_256_0x14 ); + DO_D( VCMPPS_128_0x14 ); + DO_D( VCMPPS_256_0x14 ); + + DO_D( VCMPPD_128_0x15 ); + DO_D( VCMPPD_256_0x15 ); + DO_D( VCMPPS_128_0x15 ); + DO_D( VCMPPS_256_0x15 ); + + DO_D( VCMPPD_128_0x16 ); + DO_D( VCMPPD_256_0x16 ); + DO_D( VCMPPS_128_0x16 ); + DO_D( VCMPPS_256_0x16 ); + + DO_D( VCMPPD_128_0x17 ); + DO_D( VCMPPD_256_0x17 ); + DO_D( VCMPPS_128_0x17 ); + DO_D( VCMPPS_256_0x17 ); + + DO_D( VCMPPD_128_0x18 ); + DO_D( VCMPPD_256_0x18 ); + DO_D( VCMPPS_128_0x18 ); + DO_D( VCMPPS_256_0x18 ); + + DO_D( VCMPPD_128_0x19 ); + DO_D( VCMPPD_256_0x19 ); + DO_D( VCMPPS_128_0x19 ); + DO_D( VCMPPS_256_0x19 ); + + DO_D( VCMPPD_128_0x1A ); + DO_D( VCMPPD_256_0x1A ); + DO_D( VCMPPS_128_0x1A ); + DO_D( VCMPPS_256_0x1A ); + + DO_D( VCMPPD_128_0x1B ); + DO_D( VCMPPD_256_0x1B ); + DO_D( VCMPPS_128_0x1B ); + DO_D( VCMPPS_256_0x1B ); + + DO_D( VCMPPD_128_0x1C ); + DO_D( VCMPPD_256_0x1C ); + DO_D( VCMPPS_128_0x1C ); + if (0) DO_D( VCMPPS_256_0x1C ); // FIXME probably denorms etc in input + + DO_D( VCMPPD_128_0x1D ); + DO_D( VCMPPD_256_0x1D ); + DO_D( VCMPPS_128_0x1D ); + DO_D( VCMPPS_256_0x1D ); + + DO_D( VCMPPD_128_0x1E ); + DO_D( VCMPPD_256_0x1E ); + DO_D( VCMPPS_128_0x1E ); + DO_D( VCMPPS_256_0x1E ); + + DO_D( VCMPPD_128_0x1F ); + DO_D( VCMPPD_256_0x1F ); + DO_D( VCMPPS_128_0x1F ); + DO_D( VCMPPS_256_0x1F ); + return 0; } diff --git a/none/tests/amd64/avx-1.stdout.exp b/none/tests/amd64/avx-1.stdout.exp index d530552..33280d5 100644 --- a/none/tests/amd64/avx-1.stdout.exp +++ b/none/tests/amd64/avx-1.stdout.exp @@ -45466,3 +45466,10614 @@ VMASKMOVPD_256_StoreForm(mem) f85a0b790e6bc6be.cbe30618398291b6.196ab53244ca5ca7.ece50132bf7e7fc7 f5ee878cb2046dcb +VCMPSS_128_0xB(reg) + before + 76f516f10ceac1d8.57ae4da5d5386e75.05e1d16b0c466a0a.3498a9f04e4089f1 + cc44aace6cbbb69b.e36704de683e1926.a5c263be56f187fc.ce85960557a71ce0 + 51283f8d6c0489c0.7853ad0ee58783ff.07d2b97eb20c243b.c2fef75c7c0dcf9f + 62ecd29ca85076f2.f13cc52368216829.875dcd18bc257c71.eecf48e1d87e5f5b + 2dc405818804873f + after + 0000000000000000.0000000000000000.a5c263be56f187fc.ce85960500000000 + cc44aace6cbbb69b.e36704de683e1926.a5c263be56f187fc.ce85960557a71ce0 + 51283f8d6c0489c0.7853ad0ee58783ff.07d2b97eb20c243b.c2fef75c7c0dcf9f + 62ecd29ca85076f2.f13cc52368216829.875dcd18bc257c71.eecf48e1d87e5f5b + 2dc405818804873f +VCMPSS_128_0xB(mem) + before + 5aa9ab26a7ad0479.5cde5e65bd2bb8de.2cf0c7080c1884d3.80af9df611c7cc4a + 5349b4bd52859232.9948df5646228c30.03392fa8ed769227.501324864d7f5073 + f3729e33a496ed99.767851dadfc02e93.54e47af1284a4e51.52d75e330bd74498 + 15eee572baefd1d7.4fb8b15d2692dab3.fabc22ced99d767e.e2454869e75ee364 + 5baadc947e9d6a84 + after + 5aa9ab26a7ad0479.5cde5e65bd2bb8de.2cf0c7080c1884d3.80af9df611c7cc4a + 5349b4bd52859232.9948df5646228c30.03392fa8ed769227.501324864d7f5073 + 0000000000000000.0000000000000000.03392fa8ed769227.5013248600000000 + 15eee572baefd1d7.4fb8b15d2692dab3.fabc22ced99d767e.e2454869e75ee364 + 5baadc947e9d6a84 + +VCMPSS_128_0xB(reg) + before + 1b5218206b2215a4.978a0368af99f91b.8155fa4bb422cb3d.d08fa52c1b7dc4da + 7c89f7794b781f6f.531276009fa2228f.669b281027fe3edd.b4287ef50af5f590 + dc9a760bba2cc592.2751b925a7150760.5bd537181bb26f3f.80522916c311c5cd + 96d38f4252c943b8.ed1548c5e3fe65b9.bc5123cf2bc89a0e.12da237b61deefbd + 448ce7110167318b + after + 0000000000000000.0000000000000000.669b281027fe3edd.b4287ef500000000 + 7c89f7794b781f6f.531276009fa2228f.669b281027fe3edd.b4287ef50af5f590 + dc9a760bba2cc592.2751b925a7150760.5bd537181bb26f3f.80522916c311c5cd + 96d38f4252c943b8.ed1548c5e3fe65b9.bc5123cf2bc89a0e.12da237b61deefbd + 448ce7110167318b +VCMPSS_128_0xB(mem) + before + f334f1c3beb94563.057e408bb2dbd58e.82289fcb6e6af8c7.e559e9a2f3cffaf6 + fc9ebd7cb5dee772.87e8845073efb6bf.c3583b2464647cb5.323a84fb1050cca4 + 3995c72a01e5d4e4.765d57ff339023f8.8a6f96bae2f9adb0.ff40f0481ed94bc4 + 87e78cb8bed7c8e5.2f29b6038e4a58e5.b43a2e7a043446e4.a8b729f3b8f5b502 + 89eb2c6a7a304409 + after + f334f1c3beb94563.057e408bb2dbd58e.82289fcb6e6af8c7.e559e9a2f3cffaf6 + fc9ebd7cb5dee772.87e8845073efb6bf.c3583b2464647cb5.323a84fb1050cca4 + 0000000000000000.0000000000000000.c3583b2464647cb5.323a84fb00000000 + 87e78cb8bed7c8e5.2f29b6038e4a58e5.b43a2e7a043446e4.a8b729f3b8f5b502 + 89eb2c6a7a304409 + +VCMPSS_128_0xB(reg) + before + fd28f41801173585.c35e87120ac27fa0.0f989bc71faa9031.1e857f51e521047c + 62b97c69e835c323.c7c73424feb1b541.70f504b9833b0889.a21b0329a1cca2a5 + 13ebc3c9cc172b8f.70ee0fdab8b125f6.af8dec445589fc99.1dca38f05542de8a + 6c0ac2a44848a974.9a9f942054cd8ce8.29ad4fd43121a80c.6b5c99901c8e7259 + 689ea2f713bd1a3b + after + 0000000000000000.0000000000000000.70f504b9833b0889.a21b032900000000 + 62b97c69e835c323.c7c73424feb1b541.70f504b9833b0889.a21b0329a1cca2a5 + 13ebc3c9cc172b8f.70ee0fdab8b125f6.af8dec445589fc99.1dca38f05542de8a + 6c0ac2a44848a974.9a9f942054cd8ce8.29ad4fd43121a80c.6b5c99901c8e7259 + 689ea2f713bd1a3b +VCMPSS_128_0xB(mem) + before + f05ccf1055da945e.c9627766f954797f.21a540e3ed11a546.389f2ad6b48e478e + e0629cc7fff19aee.853fdc7c7ac7d65c.e1ce8e0d9f892e3a.39af78b47a5c16cd + 127c86082c0fe917.feedf050682efeb6.b6e4fa8b8742e1f1.882b35db1e185172 + 637608bff83f3d04.8fb7ac505e142a3a.7cb4004ac0487b96.825e5db83c4d332c + 8193ecb57187faa5 + after + f05ccf1055da945e.c9627766f954797f.21a540e3ed11a546.389f2ad6b48e478e + e0629cc7fff19aee.853fdc7c7ac7d65c.e1ce8e0d9f892e3a.39af78b47a5c16cd + 0000000000000000.0000000000000000.e1ce8e0d9f892e3a.39af78b400000000 + 637608bff83f3d04.8fb7ac505e142a3a.7cb4004ac0487b96.825e5db83c4d332c + 8193ecb57187faa5 + +VCMPSS_128_0xF(reg) + before + e217df405853e08a.af1b9ed8808d51e1.93eb0de6f9069993.0f0a1d3567a5b755 + 013631c48e3c2186.d238c540e005e2db.68d31080d48f856e.4bb2cc389867525c + 3a3cdeadaecefb46.a799f7e133b4ac1e.68bcb0898b3b2b76.0c78893e6d9908d5 + e975e2665596a875.0c0ab2a995a66ad5.f1f2e96dbb97c759.2e27d035054895ec + 8d8c1d09797fb4cf + after + 0000000000000000.0000000000000000.68d31080d48f856e.4bb2cc38ffffffff + 013631c48e3c2186.d238c540e005e2db.68d31080d48f856e.4bb2cc389867525c + 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From: Julian S. <se...@so...> - 2019-03-13 13:29:10
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=ecc4e970936b8ab2057f0a899d220ac611e83c3e commit ecc4e970936b8ab2057f0a899d220ac611e83c3e Author: Julian Seward <js...@ac...> Date: Wed Mar 13 14:22:52 2019 +0100 Bug 399287 - amd64 front end: Illegal Instruction vcmptrueps. Fix, but no test cases. Diff: --- VEX/priv/guest_amd64_toIR.c | 185 ++++++++++++++++++++++++++++++-------------- VEX/priv/ir_opt.c | 16 ++++ 2 files changed, 143 insertions(+), 58 deletions(-) diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c index 86bf970..664cad6 100644 --- a/VEX/priv/guest_amd64_toIR.c +++ b/VEX/priv/guest_amd64_toIR.c @@ -9207,21 +9207,46 @@ static ULong dis_SSEint_E_to_G( /* Helper for doing SSE FP comparisons. False return ==> unhandled. This is all a bit of a kludge in that it ignores the subtleties of ordered-vs-unordered and signalling-vs-nonsignalling in the Intel - spec. */ -static Bool findSSECmpOp ( /*OUT*/Bool* preSwapP, + spec. The meaning of the outputs is as follows: + + preZeroP: the active lanes of both incoming arguments should be set to zero + before performing the operation. IOW the actual args are to be ignored + and instead zero bits are to be used. This is a bit strange but is needed + to make the constant-false/true variants (FALSE_OQ, TRUE_UQ, FALSE_OS, + TRUE_US) work. + + preSwapP: the args should be swapped before performing the operation. Note + that zeroing arg input sections (per preZeroP) and swapping them (per + preSwapP) are allowed to happen in either order; the result is the same. + + opP: this returns the actual comparison op to perform. + + postNotP: if true, the result(ing vector) of the comparison operation should + be bitwise-not-ed. Note that only the lanes of the output actually + computed by opP should be not-ed. +*/ +static Bool findSSECmpOp ( /*OUT*/Bool* preZeroP, + /*OUT*/Bool* preSwapP, /*OUT*/IROp* opP, /*OUT*/Bool* postNotP, UInt imm8, Bool all_lanes, Int sz ) { + vassert(*preZeroP == False); + vassert(*preSwapP == False); + vassert(*opP == Iop_INVALID); + vassert(*postNotP == False); + if (imm8 >= 32) return False; - /* First, compute a (preSwap, op, postNot) triple from + /* First, compute a (preZero, preSwap, op, postNot) quad from the supplied imm8. */ - Bool pre = False; - IROp op = Iop_INVALID; - Bool not = False; + Bool preZero = False; + Bool preSwap = False; + IROp op = Iop_INVALID; + Bool postNot = False; -# define XXX(_pre, _op, _not) { pre = _pre; op = _op; not = _not; } +# define XXX(_preZero, _preSwap, _op, _postNot) \ + { preZero = _preZero; preSwap = _preSwap; op = _op; postNot = _postNot; } // If you add a case here, add a corresponding test for both VCMPSD_128 // and VCMPSS_128 in avx-1.c. // Cases 0xA and above are @@ -9230,57 +9255,59 @@ static Bool findSSECmpOp ( /*OUT*/Bool* preSwapP, // "O" = ordered, "U" = unordered // "Q" = non-signalling (quiet), "S" = signalling // - // swap operands? + // replace active arg lanes in operands with zero // | - // | cmp op invert after? - // | | | - // v v v - case 0x0: XXX(False, Iop_CmpEQ32Fx4, False); break; // EQ_OQ - case 0x8: XXX(False, Iop_CmpEQ32Fx4, False); break; // EQ_UQ - case 0x10: XXX(False, Iop_CmpEQ32Fx4, False); break; // EQ_OS - case 0x18: XXX(False, Iop_CmpEQ32Fx4, False); break; // EQ_US + // | swap operands before applying the cmp op? + // | | + // | | cmp op invert active lanes after? + // | | | | + // v v v v + case 0x0: XXX(False, False, Iop_CmpEQ32Fx4, False); break; // EQ_OQ + case 0x8: XXX(False, False, Iop_CmpEQ32Fx4, False); break; // EQ_UQ + case 0x10: XXX(False, False, Iop_CmpEQ32Fx4, False); break; // EQ_OS + case 0x18: XXX(False, False, Iop_CmpEQ32Fx4, False); break; // EQ_US // - case 0x1: XXX(False, Iop_CmpLT32Fx4, False); break; // LT_OS - case 0x11: XXX(False, Iop_CmpLT32Fx4, False); break; // LT_OQ + case 0x1: XXX(False, False, Iop_CmpLT32Fx4, False); break; // LT_OS + case 0x11: XXX(False, False, Iop_CmpLT32Fx4, False); break; // LT_OQ // - case 0x2: XXX(False, Iop_CmpLE32Fx4, False); break; // LE_OS - case 0x12: XXX(False, Iop_CmpLE32Fx4, False); break; // LE_OQ + case 0x2: XXX(False, False, Iop_CmpLE32Fx4, False); break; // LE_OS + case 0x12: XXX(False, False, Iop_CmpLE32Fx4, False); break; // LE_OQ // - case 0x3: XXX(False, Iop_CmpUN32Fx4, False); break; // UNORD_Q - case 0x13: XXX(False, Iop_CmpUN32Fx4, False); break; // UNORD_S + case 0x3: XXX(False, False, Iop_CmpUN32Fx4, False); break; // UNORD_Q + case 0x13: XXX(False, False, Iop_CmpUN32Fx4, False); break; // UNORD_S // // 0xC: this isn't really right because it returns all-1s when // either operand is a NaN, and it should return all-0s. - case 0x4: XXX(False, Iop_CmpEQ32Fx4, True); break; // NEQ_UQ - case 0xC: XXX(False, Iop_CmpEQ32Fx4, True); break; // NEQ_OQ - case 0x14: XXX(False, Iop_CmpEQ32Fx4, True); break; // NEQ_US - case 0x1C: XXX(False, Iop_CmpEQ32Fx4, True); break; // NEQ_OS + case 0x4: XXX(False, False, Iop_CmpEQ32Fx4, True); break; // NEQ_UQ + case 0xC: XXX(False, False, Iop_CmpEQ32Fx4, True); break; // NEQ_OQ + case 0x14: XXX(False, False, Iop_CmpEQ32Fx4, True); break; // NEQ_US + case 0x1C: XXX(False, False, Iop_CmpEQ32Fx4, True); break; // NEQ_OS // - case 0x5: XXX(False, Iop_CmpLT32Fx4, True); break; // NLT_US - case 0x15: XXX(False, Iop_CmpLT32Fx4, True); break; // NLT_UQ + case 0x5: XXX(False, False, Iop_CmpLT32Fx4, True); break; // NLT_US + case 0x15: XXX(False, False, Iop_CmpLT32Fx4, True); break; // NLT_UQ // - case 0x6: XXX(False, Iop_CmpLE32Fx4, True); break; // NLE_US - case 0x16: XXX(False, Iop_CmpLE32Fx4, True); break; // NLE_UQ + case 0x6: XXX(False, False, Iop_CmpLE32Fx4, True); break; // NLE_US + case 0x16: XXX(False, False, Iop_CmpLE32Fx4, True); break; // NLE_UQ // - case 0x7: XXX(False, Iop_CmpUN32Fx4, True); break; // ORD_Q - case 0x17: XXX(False, Iop_CmpUN32Fx4, True); break; // ORD_S + case 0x7: XXX(False, False, Iop_CmpUN32Fx4, True); break; // ORD_Q + case 0x17: XXX(False, False, Iop_CmpUN32Fx4, True); break; // ORD_S // - case 0x9: XXX(True, Iop_CmpLE32Fx4, True); break; // NGE_US - case 0x19: XXX(True, Iop_CmpLE32Fx4, True); break; // NGE_UQ + case 0x9: XXX(False, True, Iop_CmpLE32Fx4, True); break; // NGE_US + case 0x19: XXX(False, True, Iop_CmpLE32Fx4, True); break; // NGE_UQ // - case 0xA: XXX(True, Iop_CmpLT32Fx4, True); break; // NGT_US - case 0x1A: XXX(True, Iop_CmpLT32Fx4, True); break; // NGT_UQ + case 0xA: XXX(False, True, Iop_CmpLT32Fx4, True); break; // NGT_US + case 0x1A: XXX(False, True, Iop_CmpLT32Fx4, True); break; // NGT_UQ // - case 0xD: XXX(True, Iop_CmpLE32Fx4, False); break; // GE_OS - case 0x1D: XXX(True, Iop_CmpLE32Fx4, False); break; // GE_OQ + case 0xD: XXX(False, True, Iop_CmpLE32Fx4, False); break; // GE_OS + case 0x1D: XXX(False, True, Iop_CmpLE32Fx4, False); break; // GE_OQ // - case 0xE: XXX(True, Iop_CmpLT32Fx4, False); break; // GT_OS - case 0x1E: XXX(True, Iop_CmpLT32Fx4, False); break; // GT_OQ - // Unhandled: - // 0xB FALSE_OQ - // 0xF TRUE_UQ - // 0x1B FALSE_OS - // 0x1F TRUE_US + case 0xE: XXX(False, True, Iop_CmpLT32Fx4, False); break; // GT_OS + case 0x1E: XXX(False, True, Iop_CmpLT32Fx4, False); break; // GT_OQ + // Constant-value-result ops + case 0xB: XXX(True, False, Iop_CmpEQ32Fx4, True); break; // FALSE_OQ + case 0xF: XXX(True, False, Iop_CmpEQ32Fx4, False); break; // TRUE_UQ + case 0x1B: XXX(True, False, Iop_CmpEQ32Fx4, True); break; // FALSE_OS + case 0x1F: XXX(True, False, Iop_CmpEQ32Fx4, False); break; // TRUE_US /* Don't forget to add test cases to VCMPSS_128_<imm8> in avx-1.c if new cases turn up. */ default: break; @@ -9331,7 +9358,11 @@ static Bool findSSECmpOp ( /*OUT*/Bool* preSwapP, vpanic("findSSECmpOp(amd64,guest)"); } - *preSwapP = pre; *opP = op; *postNotP = not; + if (preZero) { + // In this case, preSwap is irrelevant, but assert anyway. + vassert(preSwap == False); + } + *preZeroP = preZero; *preSwapP = preSwap; *opP = op; *postNotP = postNot; return True; } @@ -9348,6 +9379,7 @@ static Long dis_SSE_cmp_E_to_G ( const VexAbiInfo* vbi, Int alen; UInt imm8; IRTemp addr; + Bool preZero = False; Bool preSwap = False; IROp op = Iop_INVALID; Bool postNot = False; @@ -9358,8 +9390,10 @@ static Long dis_SSE_cmp_E_to_G ( const VexAbiInfo* vbi, if (epartIsReg(rm)) { imm8 = getUChar(delta+1); if (imm8 >= 8) return delta0; /* FAIL */ - Bool ok = findSSECmpOp(&preSwap, &op, &postNot, imm8, all_lanes, sz); + Bool ok = findSSECmpOp(&preZero, &preSwap, &op, &postNot, + imm8, all_lanes, sz); if (!ok) return delta0; /* FAIL */ + vassert(!preZero); /* never needed for imm8 < 8 */ vassert(!preSwap); /* never needed for imm8 < 8 */ assign( plain, binop(op, getXMMReg(gregOfRexRM(pfx,rm)), getXMMReg(eregOfRexRM(pfx,rm))) ); @@ -9372,8 +9406,10 @@ static Long dis_SSE_cmp_E_to_G ( const VexAbiInfo* vbi, addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 1 ); imm8 = getUChar(delta+alen); if (imm8 >= 8) return delta0; /* FAIL */ - Bool ok = findSSECmpOp(&preSwap, &op, &postNot, imm8, all_lanes, sz); + Bool ok = findSSECmpOp(&preZero, &preSwap, &op, &postNot, + imm8, all_lanes, sz); if (!ok) return delta0; /* FAIL */ + vassert(!preZero); /* never needed for imm8 < 8 */ vassert(!preSwap); /* never needed for imm8 < 8 */ assign( plain, binop( @@ -23304,6 +23340,7 @@ Long dis_AVX128_cmp_V_E_to_G ( /*OUT*/Bool* uses_vvvv, Int alen; UInt imm8; IRTemp addr; + Bool preZero = False; Bool preSwap = False; IROp op = Iop_INVALID; Bool postNot = False; @@ -23311,13 +23348,14 @@ Long dis_AVX128_cmp_V_E_to_G ( /*OUT*/Bool* uses_vvvv, UChar rm = getUChar(delta); UInt rG = gregOfRexRM(pfx, rm); UInt rV = getVexNvvvv(pfx); - IRTemp argL = newTemp(Ity_V128); - IRTemp argR = newTemp(Ity_V128); + IRTemp argL = newTemp(Ity_V128); + IRTemp argR = newTemp(Ity_V128); assign(argL, getXMMReg(rV)); if (epartIsReg(rm)) { imm8 = getUChar(delta+1); - Bool ok = findSSECmpOp(&preSwap, &op, &postNot, imm8, all_lanes, sz); + Bool ok = findSSECmpOp(&preZero, &preSwap, &op, &postNot, + imm8, all_lanes, sz); if (!ok) return deltaIN; /* FAIL */ UInt rE = eregOfRexRM(pfx,rm); assign(argR, getXMMReg(rE)); @@ -23328,7 +23366,8 @@ Long dis_AVX128_cmp_V_E_to_G ( /*OUT*/Bool* uses_vvvv, } else { addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 1 ); imm8 = getUChar(delta+alen); - Bool ok = findSSECmpOp(&preSwap, &op, &postNot, imm8, all_lanes, sz); + Bool ok = findSSECmpOp(&preZero, &preSwap, &op, &postNot, + imm8, all_lanes, sz); if (!ok) return deltaIN; /* FAIL */ assign(argR, all_lanes ? loadLE(Ity_V128, mkexpr(addr)) @@ -23339,8 +23378,22 @@ Long dis_AVX128_cmp_V_E_to_G ( /*OUT*/Bool* uses_vvvv, opname, imm8, dis_buf, nameXMMReg(rV), nameXMMReg(rG)); } - assign(plain, preSwap ? binop(op, mkexpr(argR), mkexpr(argL)) - : binop(op, mkexpr(argL), mkexpr(argR))); + IRTemp argMask = newTemp(Ity_V128); + if (preZero) { + // In this case, preSwap is irrelevant, but it's harmless to honour it + // anyway. + assign(argMask, mkV128(all_lanes ? 0x0000 : (sz==4 ? 0xFFF0 : 0xFF00))); + } else { + assign(argMask, mkV128(0xFFFF)); + } + + assign( + plain, + preSwap ? binop(op, binop(Iop_AndV128, mkexpr(argR), mkexpr(argMask)), + binop(Iop_AndV128, mkexpr(argL), mkexpr(argMask))) + : binop(op, binop(Iop_AndV128, mkexpr(argL), mkexpr(argMask)), + binop(Iop_AndV128, mkexpr(argR), mkexpr(argMask))) + ); if (all_lanes) { /* This is simple: just invert the result, if necessary, and @@ -23414,6 +23467,7 @@ Long dis_AVX256_cmp_V_E_to_G ( /*OUT*/Bool* uses_vvvv, Int alen; UInt imm8; IRTemp addr; + Bool preZero = False; Bool preSwap = False; IROp op = Iop_INVALID; Bool postNot = False; @@ -23431,7 +23485,7 @@ Long dis_AVX256_cmp_V_E_to_G ( /*OUT*/Bool* uses_vvvv, assign(argL, getYMMReg(rV)); if (epartIsReg(rm)) { imm8 = getUChar(delta+1); - Bool ok = findSSECmpOp(&preSwap, &op, &postNot, imm8, + Bool ok = findSSECmpOp(&preZero, &preSwap, &op, &postNot, imm8, True/*all_lanes*/, sz); if (!ok) return deltaIN; /* FAIL */ UInt rE = eregOfRexRM(pfx,rm); @@ -23443,7 +23497,7 @@ Long dis_AVX256_cmp_V_E_to_G ( /*OUT*/Bool* uses_vvvv, } else { addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 1 ); imm8 = getUChar(delta+alen); - Bool ok = findSSECmpOp(&preSwap, &op, &postNot, imm8, + Bool ok = findSSECmpOp(&preZero, &preSwap, &op, &postNot, imm8, True/*all_lanes*/, sz); if (!ok) return deltaIN; /* FAIL */ assign(argR, loadLE(Ity_V256, mkexpr(addr)) ); @@ -23454,9 +23508,24 @@ Long dis_AVX256_cmp_V_E_to_G ( /*OUT*/Bool* uses_vvvv, breakupV256toV128s( preSwap ? argR : argL, &argLhi, &argLlo ); breakupV256toV128s( preSwap ? argL : argR, &argRhi, &argRlo ); - assign(plain, binop( Iop_V128HLtoV256, - binop(op, mkexpr(argLhi), mkexpr(argRhi)), - binop(op, mkexpr(argLlo), mkexpr(argRlo)) ) ); + + IRTemp argMask = newTemp(Ity_V128); + if (preZero) { + // In this case, preSwap is irrelevant, but it's harmless to honour it + // anyway. + assign(argMask, mkV128(0x0000)); + } else { + assign(argMask, mkV128(0xFFFF)); + } + + assign( + plain, + binop( Iop_V128HLtoV256, + binop(op, binop(Iop_AndV128, mkexpr(argLhi), mkexpr(argMask)), + binop(Iop_AndV128, mkexpr(argRhi), mkexpr(argMask))), + binop(op, binop(Iop_AndV128, mkexpr(argLlo), mkexpr(argMask)), + binop(Iop_AndV128, mkexpr(argRlo), mkexpr(argMask)))) + ); /* This is simple: just invert the result, if necessary, and have done. */ diff --git a/VEX/priv/ir_opt.c b/VEX/priv/ir_opt.c index 23964be..cf00b0d 100644 --- a/VEX/priv/ir_opt.c +++ b/VEX/priv/ir_opt.c @@ -1205,6 +1205,14 @@ static Bool isZeroV128 ( IRExpr* e ) && e->Iex.Const.con->Ico.V128 == 0x0000); } +/* Is this literally IRExpr_Const(IRConst_V128(1...1)) ? */ +static Bool isOnesV128 ( IRExpr* e ) +{ + return toBool( e->tag == Iex_Const + && e->Iex.Const.con->tag == Ico_V128 + && e->Iex.Const.con->Ico.V128 == 0xFFFF); +} + /* Is this literally IRExpr_Const(IRConst_V256(0)) ? */ static Bool isZeroV256 ( IRExpr* e ) { @@ -2298,6 +2306,14 @@ static IRExpr* fold_Expr ( IRExpr** env, IRExpr* e ) e2 = mkZeroOfPrimopResultType(e->Iex.Binop.op); break; } + /* AndV128(t,1...1) ==> t. The amd64 front end generates these + for *CMP{P,S}{S,D} etc. */ + if (e->Iex.Binop.op == Iop_AndV128) { + if (isOnesV128(e->Iex.Binop.arg2)) { + e2 = e->Iex.Binop.arg1; + break; + } + } break; case Iop_OrV128: |
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From: Mark W. <ma...@so...> - 2019-03-13 12:37:30
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=d15f70a92507c30717a6461258971fedcf3c20c2 commit d15f70a92507c30717a6461258971fedcf3c20c2 Author: Mark Wielaard <ma...@kl...> Date: Mon Mar 4 19:47:59 2019 +0100 Rename gettid() to gettid_sys() in gdbserver_tests. glibc might defined gettid() itself through unistd.h: https://sourceware.org/bugzilla/show_bug.cgi?id=6399 Rename to gettid_sys() so we don't clash with the glibc definition. Diff: --- gdbserver_tests/sleepers.c | 4 ++-- gdbserver_tests/t.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/gdbserver_tests/sleepers.c b/gdbserver_tests/sleepers.c index 5ffc6f8..dfda828 100644 --- a/gdbserver_tests/sleepers.c +++ b/gdbserver_tests/sleepers.c @@ -15,7 +15,7 @@ static int sleepms = 1000; // in each loop, will sleep "sleepms" milliseconds static int burn = 0; // after each sleep, will burn cpu in a tight 'burn' loop static void setup_sigusr_handler(void); // sigusr1 and 2 sigaction setup. -static pid_t gettid() +static pid_t gettid_sys() { #ifdef __NR_gettid return syscall(__NR_gettid); @@ -27,7 +27,7 @@ static pid_t gettid() static void whoami(char *msg) __attribute__((unused)); static void whoami(char *msg) { - fprintf(stderr, "pid %ld Thread %ld %s\n", (long) getpid(), (long) gettid(), + fprintf(stderr, "pid %ld Thread %ld %s\n", (long) getpid(), (long) gettid_sys(), msg); fflush(stderr); } diff --git a/gdbserver_tests/t.c b/gdbserver_tests/t.c index 228d4a4..b3e7a28 100644 --- a/gdbserver_tests/t.c +++ b/gdbserver_tests/t.c @@ -16,7 +16,7 @@ static int loopmain, loopt1, loopt2; static double pi = 3.14159265358979323846264338327950288; -static pid_t gettid() +static pid_t gettid_sys() { #ifdef __NT_gettid return syscall(__NR_gettid); @@ -26,7 +26,7 @@ static pid_t gettid() } static void whoami(char *msg) { - printf("pid %ld Thread %ld %s\n", (long) getpid(), (long) gettid(), msg); + printf("pid %ld Thread %ld %s\n", (long) getpid(), (long) gettid_sys(), msg); fflush(stdout); } |
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From: Julian S. <se...@so...> - 2019-03-12 17:39:39
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=4816357b5c7ee5284cdf72800a81d2dd1845388f commit 4816357b5c7ee5284cdf72800a81d2dd1845388f Author: Julian Seward <js...@ac...> Date: Tue Mar 12 18:37:15 2019 +0100 VEX/auxprogs/genoffsets.c: Add cast to my_offsetof. n-i-bz. Clang/LLVM trips over my_offsetof in VEX/auxprogs/genoffsets.c. See LLVM PR 40890 for details (https://bugs.llvm.org/show_bug.cgi?id=40890). Now, it's a Clang bug that Clang exits on an assertion failure rather than emits a diagnostic, but the previous my_offsetof expression is a pointer, not an integer. Add a cast as done in other definitions of offsetof in the tree. Patch from Ed Maste <em...@fr...>. Diff: --- VEX/auxprogs/genoffsets.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/VEX/auxprogs/genoffsets.c b/VEX/auxprogs/genoffsets.c index 1f680e4..aa326b3 100644 --- a/VEX/auxprogs/genoffsets.c +++ b/VEX/auxprogs/genoffsets.c @@ -59,7 +59,8 @@ #define VG_STRINGIFZ(__str) #__str #define VG_STRINGIFY(__str) VG_STRINGIFZ(__str) -#define my_offsetof(__type,__field) (&((__type*)0)->__field) +#define my_offsetof(__type,__field) \ + ((unsigned long int)(&((__type*)0)->__field)) /* This forces gcc to evaluate the my_offsetof call at compile time, and then emits it in the assembly, along with the nonsense string |
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From: Roger L. <ro...@at...> - 2019-03-12 17:15:44
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Hi all, I've been taking another look at the experimental tool I wrote last year, which allows a user to have heap allocation and syscall failures as their code is running, based on what call stacks have been seen before. I've split the patch up into four parts to make it easier to review. They are all on https://bugs.kde.org/show_bug.cgi?id=396290 The first patch is the basic tool which allows heap allocation failures only. It lets you control whether allocation failures happen based on the size of allocation, on random chance, and on the count of failures so far. Allocations that are made to fail have their callstack saved to a file, which can then be reloaded on a subsequent run. There are gdb monitor commands and client requests which allow control of whether failures are allowed amongst other things. The big downside to this patch is that there is no instrumentation and so it isn't possible to have an --alloc-toggle-fn option similar to the callgrind --toggle-collect option to give straightforward control of where testing is carried out. With this patch, you either have to test the entire program at once, or use client requests to toggle whether failures are enabled. This is still useful - in automated testing you could use client requests to keep repeating a test until no new failures are reported, for example. The second patch adds a function to coregrind that allows tools to set an error code on syscalls. The third patch adds syscall failures to the tool, with a variety of options for controlling how and what failures occur, such as specifying what errno a certain syscall will return. It assumes that appropriate instrumentation is present and so adds the --alloc-toggle-fn and --syscall-toggle-fn options. There is no instrumentation code though, so these options don't work. The fourth patch is a cut down version of the instrumentation code from callgrind. It allows use of the --alloc-toggle-fn and --syscall-toggle-fn options, but is a lot of code duplication essentially just to add support for those options. It is only for demonstration purposes. I'd like to hear your thoughts on this as a possible future supported valgrind tool. My own feeling is that without the instrumentation code or the toggle functions it is in a good state, but might not be that practical for larger programs unless users are willing to use client requests. With the toggle functions it becomes really useful, but needs a better solution than importing a load of callgrind code. Cheers, Roger |
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From: Austin E. <aus...@gm...> - 2019-03-11 15:27:37
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On Mon, Mar 11, 2019 at 4:03 PM Julian Seward <js...@ac...> wrote: > n-i-bz Improve PDB reading ? I thought I saw some patches for this .. > is it 253657 ? Who can help test this? > I saw the patch, but haven't had a good opportunity to test (currently traveling). If me testing it will help it get in, I can probably make time this week or next (I normally valgrind win32, not win64, so may need some time to test win64 first). -- -Austin GPG: 267B CC1F 053F 0749 (expires 2021/02/18) |
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From: Ivo R. <iv...@iv...> - 2019-03-11 15:26:38
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> One thing that I'd like to ask at this point is: what level of support for > Solaris should we say there is, in the release announcement? Now that we > unfortunately no longer have a Solaris maintainer, I am concerned that could > wind up shipping a non-working Solaris port. A similar question goes for the > Mac OSX port, although there at least we have a maintainer. Hi Julian, I am no longer in a position to do any serious Solaris maintenance. I don't have resources and access to Solaris source code which is necessary to get a deep understanding of the underlying problems. One manifestation is a message received yesterday: it seems that new Solaris 11.4 does things differently than 11.3 did, at least in debug info area. Another manifestation is a lack of bugs opened against Solaris support in Valgrind in the past year ;-) So it would be fair to say that Solaris port is supported on a voluntary effort basis in general and Valgrind on Solaris 11.4 has not been tested. Anyway, future of Solaris is quite murky [1] (search for "11.4"). I'd like to hear of any (prospective) maintainers from illumos community as well [2]. Kind regards, Ivosh [1] https://en.wikipedia.org/wiki/Solaris_(operating_system) [2] https://illumos.topicbox.com/groups/discuss/T5f2d86b0b56e6f31-Mcede5f51be0764230a7f7310/illumos-valgrind-maintainer-needed |
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From: Olaf H. <ol...@ae...> - 2019-03-11 15:17:24
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Am Mon, 11 Mar 2019 15:53:19 +0100 schrieb Julian Seward <js...@ac...>: > docs/internals/3_14_BUGSTATUS.txt Well, no mention of Xen in that file. How am I supposed to address bug#390553? Olaf |
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From: Julian S. <js...@ac...> - 2019-03-11 15:03:23
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> I'll shortly send a second message listing the bugs I think are a priority.
Please feel free to disagree and/or add other bugs. This is only my personal
prioritisation.
J
Higher prio (really should fix for 3.15.0)
404843 s390x: backtrace sometimes ends prematurely
405182 Valgrind fails to build with Clang
398183 (amd64) Vex errors with _mm256_shuffle_epi8/vpshufb
Potentially serious?
399287 (amd64) Illegal Instruction vcmptrueps
404272 vex amd64->IR: 0x66 0xF 0x38 0x23 0xC0 0xF3 (PMOVSXWD)
Should fix
400099 Memcheck produces truncated backtrace when len(argv + env) = 4096
Possible stack overrun problem; should investigate
n-i-bz (amd64) Support RDRAND/RDSEED ? We really should.
Medium prio (would be nice to fix for 3.15.0)
399355 Add callgrind_diff
400793 pthread_rwlock_timedwrlock false positive
Probably would be easy to fix, but requires testing
401284 False positive "Source and destination overlap in strncat"
possibly valid; possible off-by-one error in overlap checking?
405201 Incorrect size of struct vki_siginfo on 64-bit Linux architectures
400162 Patch: Guard against __GLIBC_PREREQ for musl libc
Looks like simple fix; should take
398870 (amd64) Please add support for instruction vcvtps2ph
400538 vex amd64->IR: 0x48 0xCF 0xF 0x1F 0x0 0xFF 0xD2 0xCC 0x90 0x55
Should fix (Wine/Windows)
401719 (x86) sterrror_r on i686 causes a GPF
32-bit segreg problem; maybe we should fix?
n-i-bz (amd64) Support RDPMC ?
n-i-bz Improve PDB reading ? I thought I saw some patches for this ..
is it 253657 ? Who can help test this?
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From: Julian S. <js...@ac...> - 2019-03-11 14:53:31
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Greetings all. I'd like to propose a 3.15.0 release in just under a month from now, on 5 April. The last release, 3.14.0, was on 9 Oct 2018. In the past few years we've released pretty much once a year. That has the undesirable effect of making fixes and new features available only after a long wait. By contrast, making a release in early April means only a six-month interval, and would get useful changes to users and distro packagers sooner rather than later. Primarily these: * Support for Gcc 9. * Overhaul of the DHAT heap-usage profiler, including addition of a GUI. * Reduced Memcheck false-positive rates on amd64 (x86_64) and ppc64 targets. * Much improved s390x z13 support. * Reduced overhead for handling indirect branches in very large applications. * The usual stack of bug fixes. I've made a first pass through all bugs reported since 3.14.0. The results are in docs/internals/3_14_BUGSTATUS.txt. If there are any bugs in there (or even, not in there) that you think are important to fix for the release, please do mention them. I'll shortly send a second message listing the bugs I think are a priority. One thing that I'd like to ask at this point is: what level of support for Solaris should we say there is, in the release announcement? Now that we unfortunately no longer have a Solaris maintainer, I am concerned that could wind up shipping a non-working Solaris port. A similar question goes for the Mac OSX port, although there at least we have a maintainer. J |
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From: Rhys K. <rhy...@so...> - 2019-03-11 12:01:09
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=901cec4bce90f2554d0c8f70976e7fba943b3722 commit 901cec4bce90f2554d0c8f70976e7fba943b3722 Author: Rhys Kidd <rhy...@gm...> Date: Thu Jan 31 22:21:22 2019 -0500 Add missing documentation file from EXTRA_DIST Ensure this documentation file is included in tarball. Fixes: 9f3d49a ("Create 3.10.0 section in NEWS, add (first draft of) README_DEVELOPERS_processes") Signed-off-by: Rhys Kidd <rhy...@gm...> Diff: --- Makefile.am | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile.am b/Makefile.am index 0458c93..242b38a 100644 --- a/Makefile.am +++ b/Makefile.am @@ -104,6 +104,7 @@ perf: check EXTRA_DIST = \ COPYING.DOCS \ README_DEVELOPERS \ + README_DEVELOPERS_processes \ README_PACKAGERS \ README_MISSING_SYSCALL_OR_IOCTL \ README.s390 \ |
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From: Rhys K. <rhy...@so...> - 2019-03-11 12:01:08
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=3cd099ab5f2571f06102f0f007df91a17106e06d commit 3cd099ab5f2571f06102f0f007df91a17106e06d Author: Rhys Kidd <rhy...@gm...> Date: Sat Feb 2 18:22:16 2019 -0500 macOS: Don't duplicate -fno-stack-protector Since f38d96d -fno-stack-protector has been added to $(AM_CFLAGS_BASE) on all platforms, if the compiler supports it. Accordingly, there's no need to still add this a second time specifically for macOS. Fixes: f38d96d ("Add -Wformat -Wformat-security to the list of compile flags.") Signed-off-by: Rhys Kidd <rhy...@gm...> Diff: --- Makefile.all.am | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile.all.am b/Makefile.all.am index 2ad5403..daa7e41 100644 --- a/Makefile.all.am +++ b/Makefile.all.am @@ -222,14 +222,14 @@ AM_CCASFLAGS_ARM64_LINUX = @FLAG_M64@ -g AM_FLAG_M3264_X86_DARWIN = -arch i386 AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \ -mmacosx-version-min=10.6 \ - -fno-stack-protector -fno-pic -fno-PIC + -fno-pic -fno-PIC AM_CFLAGS_PSO_X86_DARWIN = $(AM_CFLAGS_X86_DARWIN) $(AM_CFLAGS_PSO_BASE) AM_CCASFLAGS_X86_DARWIN = -arch i386 -g AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64 AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \ - -mmacosx-version-min=10.6 -fno-stack-protector + -mmacosx-version-min=10.6 AM_CFLAGS_PSO_AMD64_DARWIN = $(AM_CFLAGS_AMD64_DARWIN) $(AM_CFLAGS_PSO_BASE) AM_CCASFLAGS_AMD64_DARWIN = -arch x86_64 -g |
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From: Rhys K. <rhy...@so...> - 2019-03-11 12:01:00
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=71cf18c1200b5bbc6796f016165f790e8e85d88e commit 71cf18c1200b5bbc6796f016165f790e8e85d88e Author: Rhys Kidd <rhy...@gm...> Date: Sat Feb 2 17:53:33 2019 -0500 config: Conditionalize -finline-functions on compiler support Certain clang compiler versions do not support -finline-functions, so only apply this compiler option conditionally if supported. Warnings with Apple LLVM version 8.0.0 (clang-800.0.42.1), based on upstream clang 3.9.0: clang: warning: optimization flag '-finline-functions' is not supported clang: warning: argument unused during compilation: '-finline-functions' Fixes: 7dd9a7f ("Add -finline-functions to standard build flags, so gcc will consider all functions as candidates for inlining.") Signed-off-by: Rhys Kidd <rhy...@gm...> Diff: --- Makefile.all.am | 3 ++- configure.ac | 21 +++++++++++++++++++++ 2 files changed, 23 insertions(+), 1 deletion(-) diff --git a/Makefile.all.am b/Makefile.all.am index 8ea95a6..2ad5403 100644 --- a/Makefile.all.am +++ b/Makefile.all.am @@ -97,7 +97,7 @@ clean-noinst_DSYMS: # -fno-builtin is important for defeating LLVM's idiom recognition # that somehow causes VG_(memset) to get into infinite recursion. AM_CFLAGS_BASE = \ - -O2 -finline-functions -g \ + -O2 -g \ -Wall \ -Wmissing-prototypes \ -Wshadow \ @@ -116,6 +116,7 @@ AM_CFLAGS_BASE = \ @FLAG_W_LOGICAL_OP@ \ @FLAG_W_ENUM_CONVERSION@ \ @FLAG_W_OLD_STYLE_DECLARATION@ \ + @FLAG_FINLINE_FUNCTIONS@ \ @FLAG_FNO_STACK_PROTECTOR@ \ @FLAG_FSANITIZE@ \ -fno-strict-aliasing \ diff --git a/configure.ac b/configure.ac index d0b68b4..8779cf0 100644 --- a/configure.ac +++ b/configure.ac @@ -2200,6 +2200,27 @@ CFLAGS=$safe_CFLAGS AC_SUBST(FLAG_FNO_STACK_PROTECTOR) +# does this compiler support -finline-functions ? +AC_MSG_CHECKING([if gcc accepts -finline-functions]) + +safe_CFLAGS=$CFLAGS +CFLAGS="-finline-functions -Werror" + +AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[ + return 0; +]])], [ +inline_functions=yes +FLAG_FINLINE_FUNCTIONS="-finline-functions" +AC_MSG_RESULT([yes]) +], [ +inline_functions=no +FLAG_FINLINE_FUNCTIONS="" +AC_MSG_RESULT([no]) +]) +CFLAGS=$safe_CFLAGS + +AC_SUBST(FLAG_FINLINE_FUNCTIONS) + # Does GCC support disabling Identical Code Folding? # We want to disabled Identical Code Folding for the # tools preload shared objects to get better backraces. |
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From: Rhys K. <rhy...@so...> - 2019-03-11 12:00:56
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=fbc91518e551cea80a3f7bf9d441c6338f9934f8 commit fbc91518e551cea80a3f7bf9d441c6338f9934f8 Author: Rhys Kidd <rhy...@gm...> Date: Sat Feb 2 22:18:05 2019 -0500 Makefile.am: Consistent indent and align This approach is utilized consistently throughout the file, and would make alphabetical reordering easier. Adopt it here as well. Signed-off-by: Rhys Kidd <rhy...@gm...> Diff: --- Makefile.am | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Makefile.am b/Makefile.am index a63cd9b..0458c93 100644 --- a/Makefile.am +++ b/Makefile.am @@ -3,7 +3,8 @@ AUTOMAKE_OPTIONS = 1.10 include $(top_srcdir)/Makefile.all.am -TOOLS = memcheck \ +TOOLS = \ + memcheck \ cachegrind \ callgrind \ helgrind \ @@ -13,7 +14,8 @@ TOOLS = memcheck \ lackey \ none -EXP_TOOLS = exp-sgcheck \ +EXP_TOOLS = \ + exp-sgcheck \ exp-bbv # Put docs last because building the HTML is slow and we want to get |
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From: Rhys K. <rhy...@so...> - 2019-03-11 12:00:50
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=bdfab93fabc7b6e703db4a268d2fd8813c2df24d commit bdfab93fabc7b6e703db4a268d2fd8813c2df24d Author: Rhys Kidd <rhy...@gm...> Date: Wed Jan 30 23:12:53 2019 -0500 config: Set automake options consistenly in one location Avoid use of two manners of setting automake configuration options, and consolidate them into AM_INIT_AUTOMAKE macro. Signed-off-by: Rhys Kidd <rhy...@gm...> Diff: --- Makefile.am | 2 +- configure.ac | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile.am b/Makefile.am index 631c845..a63cd9b 100644 --- a/Makefile.am +++ b/Makefile.am @@ -1,5 +1,5 @@ -AUTOMAKE_OPTIONS = foreign 1.10 dist-bzip2 +AUTOMAKE_OPTIONS = 1.10 include $(top_srcdir)/Makefile.all.am diff --git a/configure.ac b/configure.ac index b69935e..d0b68b4 100644 --- a/configure.ac +++ b/configure.ac @@ -11,7 +11,7 @@ AC_INIT([Valgrind],[3.15.0.GIT],[val...@li...]) AC_CONFIG_SRCDIR(coregrind/m_main.c) AC_CONFIG_HEADERS([config.h]) -AM_INIT_AUTOMAKE([foreign subdir-objects]) +AM_INIT_AUTOMAKE([foreign dist-bzip2 subdir-objects]) AM_MAINTAINER_MODE |
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From: Rhys K. <rhy...@so...> - 2019-03-11 12:00:47
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=b06c2c7e23fce0eeeec0ffbd4f54976fcfb8195d commit b06c2c7e23fce0eeeec0ffbd4f54976fcfb8195d Author: Rhys Kidd <rhy...@gm...> Date: Wed Jan 30 22:52:07 2019 -0500 config: remove unrequired AC_HEADER_STDC Autoconf says: "This macro is obsolescent, as current systems have conforming header files. New programs need not use this macro". Was previously required to ensure the system has C header files conforming to ANSI C89 (ISO C90). Specifically, this macro checks for stdlib.h, stdarg.h, string.h, and float.h. This autoconf option was used to provide conditional fallback support via defined STDC_HEADERS. valgrind does not utilize conditional fallback support so, so this macro is both obsolete and unused, so let's drop it. Signed-off-by: Rhys Kidd <rhy...@gm...> Diff: --- configure.ac | 1 - 1 file changed, 1 deletion(-) diff --git a/configure.ac b/configure.ac index b885bd9..b69935e 100644 --- a/configure.ac +++ b/configure.ac @@ -4011,7 +4011,6 @@ fi # test "$VGCONF_OS" = "solaris" # Checks for C header files. #---------------------------------------------------------------------------- -AC_HEADER_STDC AC_CHECK_HEADERS([ \ asm/unistd.h \ endian.h \ |
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From: Julian S. <se...@so...> - 2019-03-10 10:12:50
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=dffe3a2d1bd474265b0cca5360218b9ca6d53cf8 commit dffe3a2d1bd474265b0cca5360218b9ca6d53cf8 Author: Julian Seward <js...@ac...> Date: Sun Mar 10 11:11:16 2019 +0100 Add a 3_14_BUGSTATUS.txt file and add to it all bugs reported since 3.14 was release. At least, the bugs are post-triaged ones, so some have been removed. Diff: --- NEWS | 3 + docs/Makefile.am | 1 + docs/internals/3_14_BUGSTATUS.txt | 234 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 238 insertions(+) diff --git a/NEWS b/NEWS index 0c5d538..b1debc3 100644 --- a/NEWS +++ b/NEWS @@ -83,6 +83,7 @@ where XXXXXX is the bug number as listed below. 397187 z13 vector register support for vgdb gdbserver 399301 Use inlined frames in Massif XTree output. 399322 Improve callgrind_annotate output +399444 VEX/priv/guest_s390_toIR.c:17407: (style) Mismatching assignment [..] 400490 s390x: VRs allocated as if separate from FPRs 400491 s390x: Operand of LOCH treated as unsigned integer 401112 LLVM 5.0 generates comparison against partially initialized data @@ -95,6 +96,8 @@ where XXXXXX is the bug number as listed below. 402048 WARNING: unhandled ppc64[be|le]-linux syscall: 26 (ptrace) 402134 assertion fail in mc_translate.c (noteTmpUsesIn) Iex_VECRET on arm64 402327 Warning: DWARF2 CFI reader: unhandled DW_OP_ opcode 0x13 (DW_OP_drop) +402341 drd/tests/tsan_thread_wrappers_pthread.h:369: suspicious code ? +402369 Overhaul DHAT 402395 coregrind/vgdb-invoker-solaris.c: 2 * poor error checking 402480 Do not use %rsp in clobber list 402481 vbit-test fails on x86 for Iop_CmpEQ64 iselInt64Expr Sar64 diff --git a/docs/Makefile.am b/docs/Makefile.am index 7a681a5..5b76c82 100644 --- a/docs/Makefile.am +++ b/docs/Makefile.am @@ -34,6 +34,7 @@ EXTRA_DIST = \ internals/3_11_BUGSTATUS.txt \ internals/3_12_BUGSTATUS.txt \ internals/3_13_BUGSTATUS.txt \ + internals/3_14_BUGSTATUS.txt \ internals/MERGE_3_10_1.txt \ internals/arm_thumb_notes_gdbserver.txt \ internals/avx-notes.txt \ diff --git a/docs/internals/3_14_BUGSTATUS.txt b/docs/internals/3_14_BUGSTATUS.txt new file mode 100644 index 0000000..6c5177f --- /dev/null +++ b/docs/internals/3_14_BUGSTATUS.txt @@ -0,0 +1,234 @@ + +======================================================================== +======================================================================== + +Created Sat 9 Mar 2019. This contains bugs reported only after the release of +3.14.0. Unlike in 3_13_BUGSTATUS.txt and perhaps earlier such files, it +doesn't carry over bugs from earlier versions. + +======================================================================== +======================================================================== + +=== Debuginfo reader =================================================== + +404843 s390x: backtrace sometimes ends prematurely + Should try to fix for 3.15.0 + +405295 valgrind 3.14.0 dies due to mysterious DWARF information? (output from + rust used by Mozilla TB.) + But possibly only when --read-var-info=yes + +=== Documentation ====================================================== +=== GDB server ========================================================= +=== KernelInterface ==================================================== +=== KernelInterface/Linux ============================================== + +399087 /proc/self/exe is not virtualised; opening it produces unexpected [..] + +=== KernelInterface/OS X =============================================== + +399504 valgrind 3.14rc2 is unable to launch TextEdit.app on macOS 10.12.6 + == 379893 +399584 Support macOS Mojave (10.14) + +=== MPI ================================================================ +=== Output ============================================================= +=== Tools ============================================================== +=== Tools/Cachegrind =================================================== + +398178 cachegrind --LL=5242880,2,64 command parameter for Opteron 6174 rejected +398249 RFE: perhaps add cachegrind API call for marking DMA memory cold/evicted + +=== Tools/Callgrind ==================================================== + +399355 Add callgrind_diff + Has patch +400234 keep the parameters of the most costly path + Wishlist + +=== Tools/DHAT ========================================================= +=== Tools/DRD ========================================================== +=== Tools/Helgrind ===================================================== + +400793 pthread_rwlock_timedwrlock false positive + Probably would be easy to fix, but requires testing +405205 tests/filter_libc: remove the line holding the futex syscall error + entirely + Is maybe related to Helgrind tests? Is unclear + +=== Tools/Lackey ======================================================= +=== Tools/Massif ======================================================= +=== Tools/Memcheck ===================================================== + +398569 invalid reads reported in libarmmem memcmp when using strings + 8 byte p-l-ok thing on arm32 +401284 False positive "Source and destination overlap in strncat" + possibly valid; possible off-by-one error in overlap checking? +402604 Report All Dangling pointers upon exit and monitor command + Wishlist +402833 memcheck/tests/overlap testcase fails, memcpy seen as memmove + Probably not easy to fix +403802 leak_cpp_interior fails with some reachable blocks different than + expected + Leak-count numbers differ? +405201 Incorrect size of struct vki_siginfo on 64-bit Linux architectures + +=== Tools/SGCheck ====================================================== +=== Uncategorised ====================================================== +=== Uncategorised/build ================================================ + +398649 New s390x z13 support doesn't build with older gcc/binutils +400162 Patch: Guard against __GLIBC_PREREQ for musl libc + Looks like simple fix; should take +400164 helgrind test encounters mips x-compiler warnings and assembler error + Obscure compiler? +401742 unreproducible .a files should not be built with LTO + Some LTO wierdness; doesn't seem terribly important +402123 invalid assembler opcodes for mips32r2 +402351 mips64 libvexmultiarch_test fails on s390x +404888 [PATCH] autotools cleanup series + Should try to land for 3.15.0 +405182 Valgrind fails to build with Clang + Should try to land for 3.15.0 + +=== Uncategorised/run ================================================== + +400119 Library search path in Valgrind/ldd +400807 --error-exitcode still sends the wrong value + Probable not-a-bug + +=== VEX ================================================================ +=== VEX/amd64 ========================================================== + +398183 Vex errors with _mm256_shuffle_epi8/vpshufb + Potentially serious? +398523 unhandled instruction bytes: 0x8F 0xEA 0x78 0x10 0xD0 0x8 0x4 0x0 0x0 + == 381819 +398545 Support for SHA instruction on Ryzen +398870 Please add support for instruction vcvtps2ph +399287 Illegal Instruction vcmptrueps +400538 vex amd64->IR: 0x48 0xCF 0xF 0x1F 0x0 0xFF 0xD2 0xCC 0x90 0x55 + Should fix (Wine/Windows) +400829 unhandled instruction bytes in macOS + Seems like CMOVNS; and therefore I think this is fishy +404272 vex amd64->IR: 0x66 0xF 0x38 0x23 0xC0 0xF3 (PMOVSXWD) + Should fix + +=== VEX/arm32 ========================================================== + +401072 More than 1000 errors on TegraK1 L4T 3.14 glibc 2.23 (Custom yocto + system) + I suspect some kind of stm-as-push problem; the usual thing + +=== VEX/arm64 ========================================================== +=== VEX/mips =========================================================== +=== VEX/other ========================================================== +=== VEX/ppc ============================================================ + +401827 none/tests/ppc64/test_isa_2_06_part3 failure on ppc64le (xvrsqrtesp) + Possible testcase bug +401828 none/tests/ppc64/test_isa_2_06_part1 failure on ppc64le (fcfids and + fcfidus) + Possible testcase bug + +=== VEX/s390x ========================================================== + +404076 s390x: z14 vector instructions not implemented +404404 s390x: z14 vector decimal instructions not implemented +404406 s390x: z14 miscellaneous instructions not implemented + WIP; these are not for 3.15.0 + +=== VEX/x86 ============================================================ + +401719 sterrror_r on i686 causes a GPF + 32-bit segreg problem; maybe we should fix? + +=== zz_other =========================================================== +=== zz_other/Android =================================================== +=== zz_other/amd64 ===================================================== +=== zz_other/arm32 ===================================================== +=== zz_other/arm64 ===================================================== +=== zz_other/*BSD ====================================================== +=== zz_other/mips ====================================================== + +400593 In Coregrind, use statx for some internal syscalls if [f]stat[64] fail + Part of "support for nanoMIPS" ? + +400872 Add nanoMIPS support to Valgrind + Looks big and complex. No communication re reviewing? + +=== zz_other/MPI ======================================================= + +401416 Compile failure with openmpi 4.0 + I'm unclear what this signifies + +=== zz_other/ppc ======================================================= + +398883 valgrind incorrectly assumes ABI on PowerPC based on endianness + Configuration/ifdef swamp + +=== zz_other/s390 ====================================================== +=== zz_other/Win32 ===================================================== +=== zz_other/x86 ======================================================= + +400099 Memcheck produces truncated backtrace when len(argv + env) = 4096 + Possible stack overrun problem; should investigate + +======================================================================== +======================================================================== + +-- +Mon 3 Sep 12:01:52 CEST 2018 + +Support RDRAND/RDSEED ? We really should. +Support RDPMC ? +Improve PDB reading ? I thought I saw some patches for this, but where? + +Sat 9 Mar 18:48:58 CET 2019 + +======================================================================== +======================================================================== +======================================================================== +== spare bits of text + +=== Debuginfo reader =================================================== +=== Documentation ====================================================== +=== GDB server ========================================================= +=== KernelInterface ==================================================== +=== KernelInterface/Linux ============================================== +=== KernelInterface/OS X =============================================== +=== MPI ================================================================ +=== Output ============================================================= +=== Tools ============================================================== +=== Tools/Cachegrind =================================================== +=== Tools/Callgrind ==================================================== +=== Tools/DHAT ========================================================= +=== Tools/DRD ========================================================== +=== Tools/Helgrind ===================================================== +=== Tools/Lackey ======================================================= +=== Tools/Massif ======================================================= +=== Tools/Memcheck ===================================================== +=== Tools/SGCheck ====================================================== +=== Uncategorised ====================================================== +=== Uncategorised/build ================================================ +=== Uncategorised/run ================================================== +=== VEX ================================================================ +=== VEX/amd64 ========================================================== +=== VEX/arm32 ========================================================== +=== VEX/arm64 ========================================================== +=== VEX/mips =========================================================== +=== VEX/other ========================================================== +=== VEX/ppc ============================================================ +=== VEX/s390x ========================================================== +=== VEX/x86 ============================================================ +=== zz_other =========================================================== +=== zz_other/Android =================================================== +=== zz_other/amd64 ===================================================== +=== zz_other/arm32 ===================================================== +=== zz_other/arm64 ===================================================== +=== zz_other/*BSD ====================================================== +=== zz_other/mips ====================================================== +=== zz_other/ppc ======================================================= +=== zz_other/s390 ====================================================== +=== zz_other/Win32 ===================================================== +=== zz_other/x86 ======================================================= |
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From: Julian S. <se...@so...> - 2019-03-09 17:00:05
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=4ee1dd2778f8cdd83907b7071eea560a5fb2e1f5 commit 4ee1dd2778f8cdd83907b7071eea560a5fb2e1f5 Author: Julian Seward <js...@ac...> Date: Sat Mar 9 17:58:11 2019 +0100 bb_to_IR(): increase assertion limits on the maximum size of self-checking translations. n-i-bz. Diff: --- VEX/priv/guest_generic_bb_to_IR.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/VEX/priv/guest_generic_bb_to_IR.c b/VEX/priv/guest_generic_bb_to_IR.c index 6df594d..b94ff5d 100644 --- a/VEX/priv/guest_generic_bb_to_IR.c +++ b/VEX/priv/guest_generic_bb_to_IR.c @@ -581,7 +581,7 @@ IRSB* bb_to_IR ( len2check = vge->len[i]; /* stay sane */ - vassert(len2check >= 0 && len2check < 1000/*arbitrary*/); + vassert(len2check >= 0 && len2check < 2000/*arbitrary*/); /* Skip the check if the translation involved zero bytes */ if (len2check == 0) @@ -596,7 +596,7 @@ IRSB* bb_to_IR ( vassert(0 == (hW_diff & (host_word_szB-1))); HWord hWs_to_check = (hW_diff + host_word_szB) / host_word_szB; vassert(hWs_to_check > 0 - && hWs_to_check < 1004/*arbitrary*/ / host_word_szB); + && hWs_to_check < 2004/*arbitrary*/ / host_word_szB); /* vex_printf("%lx %lx %ld\n", first_hW, last_hW, hWs_to_check); */ |
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From: Philippe W. <phi...@sk...> - 2019-03-08 04:28:59
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On Fri, 2019-03-08 at 04:07 +0100, Eugene Syromyatnikov wrote: > Resolves: https://bugs.kde.org/show_bug.cgi?id=405201 Thanks for the analysis and patch. Can you attach the patch to the bug ? That helps not to lose it. Also, in the valgrind regression test suite, it looks like here and there, there are some usages of siginfo_t, but none of these tests seems to trigger a problem. Would be nice to have a small test case reproducing the problem you have seen (and fixed). Thanks Philippe |
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From: Eugene S. <ev...@gm...> - 2019-03-08 03:22:28
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As it turned out, the size of vki_siginfo_t is incorrect on these 64-bit
architectures:
(gdb) p sizeof(vki_siginfo_t)
$1 = 136
(gdb) ptype struct vki_siginfo
type = struct vki_siginfo {
int si_signo;
int si_errno;
int si_code;
union {
int _pad[29];
struct {...} _kill;
struct {...} _timer;
struct {...} _rt;
struct {...} _sigchld;
struct {...} _sigfault;
struct {...} _sigpoll;
} _sifields;
}
It looks like that for this architecture, __VKI_ARCH_SI_PREAMBLE_SIZE
hasn't been defined properly, which resulted in incorrect
VKI_SI_PAD_SIZE calculation (29 instead of 28).
<6a9e4> DW_AT_name : (indirect string, offset: 0xcf59): _sifields
<6a9ef> DW_AT_data_member_location: 16
This issue has been discovered with strace's "make check-valgind-memcheck",
which produced false out-of-bounds writes on ptrace(PTRACE_GETSIGINFO) calls:
SYSCALL[24264,1](101) sys_ptrace ( 16898, 24283, 0x0, 0x606bd40 )
==24264== Syscall param ptrace(getsiginfo) points to unaddressable byte(s)
==24264== at 0x575C06E: ptrace (ptrace.c:45)
==24264== by 0x443244: next_event (strace.c:2431)
==24264== by 0x443D30: main (strace.c:2845)
==24264== Address 0x606bdc0 is 0 bytes after a block of size 144 alloc'd
(Note that the address passed is 0x606bd40 and the address reported is
0x606bdc0).
After the patch, no such errors observed.
* include/vki/vki-amd64-linux.h [__x86_64__ && __ILP32__]
(__vki_kernel_si_clock_t): New typedef.
[__x86_64__ && __ILP32__] (__VKI_ARCH_SI_CLOCK_T,
__VKI_ARCH_SI_ATTRIBUTES): New macros.
[__x86_64__ && !__ILP32__] (__VKI_ARCH_SI_PREAMBLE_SIZE): New macro,
define to 4 ints.
* include/vki/vki-arm64-linux.h (__VKI_ARCH_SI_PREAMBLE_SIZE): Likewise.
* include/vki/vki-ppc64-linux.h [__powerpc64__] (__VKI_ARCH_SI_PREAMBLE_SIZE):
Likewise.
* include/vki/vki-linux.h [!__VKI_ARCH_SI_CLOCK_T]
(__VKI_ARCH_SI_CLOCK_T): New macro, define to vki_clock_t.
[!__VKI_ARCH_SI_ATTRIBUTES] (__VKI_ARCH_SI_ATTRIBUTES): New macro,
define to nil.
(struct vki_siginfo): Use __VKI_ARCH_SI_CLOCK_T type for _utime and
_stime fields. Add __VKI_ARCH_SI_ATTRIBUTES.
Resolves: https://bugs.kde.org/show_bug.cgi?id=405201
Reported-by: Dmitry V. Levin <ld...@al...>
Signed-off-by: Eugene Syromyatnikov <ev...@gm...>
---
NEWS | 1 +
include/vki/vki-amd64-linux.h | 15 +++++++++++++++
include/vki/vki-arm64-linux.h | 6 ++++++
include/vki/vki-linux.h | 14 +++++++++++---
include/vki/vki-ppc64-linux.h | 8 ++++++++
5 files changed, 41 insertions(+), 3 deletions(-)
diff --git a/NEWS b/NEWS
index 0c5d538..bd0e901 100644
--- a/NEWS
+++ b/NEWS
@@ -104,6 +104,7 @@ where XXXXXX is the bug number as listed below.
403552 s390x: wrong facility bit checked for vector facility
404054 memcheck powerpc subfe x, x, x initializes x to 0 or -1 based on CA
405079 unhandled ppc64le-linux syscall: 131 (quotactl)
+405201 Incorrect size of struct vki_siginfo on 64-bit Linux architectures
n-i-bz add syswrap for PTRACE_GET|SET_THREAD_AREA on amd64.
n-i-bz Fix callgrind_annotate non deterministic order for equal total
diff --git a/include/vki/vki-amd64-linux.h b/include/vki/vki-amd64-linux.h
index f99dcf8..c2a10e0 100644
--- a/include/vki/vki-amd64-linux.h
+++ b/include/vki/vki-amd64-linux.h
@@ -300,6 +300,21 @@ struct vki_f_owner_ex {
#define VKI_RLIMIT_NOFILE 7 /* max number of open files */
//----------------------------------------------------------------------
+// From linux-5.0.0/arch/x86/include/uapi/asm/siginfo.h
+//----------------------------------------------------------------------
+
+/* We need that to ensure that sizeof(siginfo) == 128. */
+#ifdef __x86_64__
+# ifdef __ILP32__
+typedef long long __vki_kernel_si_clock_t __attribute__((aligned(4)));
+# define __VKI_ARCH_SI_CLOCK_T __vki_kernel_si_clock_t
+# define __VKI_ARCH_SI_ATTRIBUTES __attribute__((aligned(8)))
+# else
+# define __VKI_ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
+# endif
+#endif
+
+//----------------------------------------------------------------------
// From linux-2.6.9/include/asm-x86_64/socket.h
//----------------------------------------------------------------------
diff --git a/include/vki/vki-arm64-linux.h b/include/vki/vki-arm64-linux.h
index 54b0428..fb26731 100644
--- a/include/vki/vki-arm64-linux.h
+++ b/include/vki/vki-arm64-linux.h
@@ -196,6 +196,12 @@ struct vki_sigcontext {
};
//----------------------------------------------------------------------
+// From linux-5.0.0/arch/arm64/include/uapi/asm/siginfo.h
+//----------------------------------------------------------------------
+
+#define __VKI_ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
+
+//----------------------------------------------------------------------
// From linux-3.10.5/uapi/include/asm-generic/mman-common.h
//----------------------------------------------------------------------
diff --git a/include/vki/vki-linux.h b/include/vki/vki-linux.h
index b4c6085..9f44a2b 100644
--- a/include/vki/vki-linux.h
+++ b/include/vki/vki-linux.h
@@ -428,6 +428,14 @@ typedef union vki_sigval {
#define __VKI_ARCH_SI_BAND_T long
#endif
+#ifndef __VKI_ARCH_SI_CLOCK_T
+#define __VKI_ARCH_SI_CLOCK_T vki_clock_t
+#endif
+
+#ifndef __VKI_ARCH_SI_ATTRIBUTES
+#define __VKI_ARCH_SI_ATTRIBUTES
+#endif
+
// [[Nb: this type changed between 2.4 and 2.6, but not in a way that
// affects Valgrind.]]
typedef struct vki_siginfo {
@@ -465,8 +473,8 @@ typedef struct vki_siginfo {
vki_pid_t _pid; /* which child */
__VKI_ARCH_SI_UID_T _uid; /* sender's uid */
int _status; /* exit code */
- vki_clock_t _utime;
- vki_clock_t _stime;
+ __VKI_ARCH_SI_CLOCK_T _utime;
+ __VKI_ARCH_SI_CLOCK_T _stime;
} _sigchld;
/* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
@@ -483,7 +491,7 @@ typedef struct vki_siginfo {
int _fd;
} _sigpoll;
} _sifields;
-} vki_siginfo_t;
+} __VKI_ARCH_SI_ATTRIBUTES vki_siginfo_t;
#endif
#define __VKI_SI_FAULT 0
diff --git a/include/vki/vki-ppc64-linux.h b/include/vki/vki-ppc64-linux.h
index b82dc37..85fcd7b 100644
--- a/include/vki/vki-ppc64-linux.h
+++ b/include/vki/vki-ppc64-linux.h
@@ -338,6 +338,14 @@ struct vki_sigcontext {
};
//----------------------------------------------------------------------
+// From linux-5.0.0/arch/powerpc/include/uapi/asm/siginfo.h
+//----------------------------------------------------------------------
+
+#ifdef __powerpc64__
+# define __VKI_ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
+#endif
+
+//----------------------------------------------------------------------
// From linux-2.6.13/include/asm-ppc64/mman.h
//----------------------------------------------------------------------
--
2.1.4
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From: Ed M. <em...@fr...> - 2019-03-07 18:10:21
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On Thu, 3 Jan 2019 at 10:55, Ed Maste <em...@fr...> wrote: > > Current WIP is in the "freebsd.20190103" branch - I'll try to keep the > patch set rebased on upstream and will start a new branch when > rebasing. FreeBSD patches are now rebased on upstream 3217459c, in the freebsd.20190307 branch: https://github.com/FreeBSDFoundation/valgrind/tree/freebsd.20190307 Some of these are still changes to earlier patches in the set; the next step will be to curate the patch set into more reviewable pieces. > Work can be followed in PR 208531 > https://bugs.kde.org/show_bug.cgi?id=208531 Updated. |
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From: Daniel L. <dle...@gm...> - 2019-03-07 04:10:16
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On Mon, Jan 28, 2019 at 10:15 PM Daniel Lehman <dle...@gm...> wrote: > > Part of: > https://bugs.kde.org/show_bug.cgi?id=253657 > > Signed-off-by: Daniel Lehman <dle...@gm...> for my first submission, i sent the first of a series attached to the bug referenced. but if preferred, i can send the whole wad i'm willing to make any changes to get them installed thanks daniel |