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From: Petar J. <pe...@so...> - 2018-06-14 18:34:25
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=93a1edae3fb5a1713f7d110490bcf2bf4354ade6 commit 93a1edae3fb5a1713f7d110490bcf2bf4354ade6 Author: Petar Jovanovic <mip...@gm...> Date: Thu Jun 14 18:25:47 2018 +0000 mips64: add N32 ABI support in NEWS Announce support for MIPS N32 ABI. Diff: --- NEWS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/NEWS b/NEWS index eaa05d9..2eea334 100644 --- a/NEWS +++ b/NEWS @@ -24,6 +24,7 @@ support for X86/macOS 10.13, AMD64/macOS 10.13. * Preliminary support for macOS 10.13 has been added. * mips: support for MIPS32/MIPS64 Revision 6 has been added. * mips: support for MIPS SIMD architecture (MSA) has been added. +* mips: support for MIPS N32 ABI support has been added. * ==================== TOOL CHANGES ==================== @@ -58,6 +59,7 @@ where XXXXXX is the bug number as listed below. 208052 strlcpy error when n = 0 255603 exp-sgcheck Assertion '!already_present' failed 338252 building valgrind with -flto (link time optimisation) fails +345763 MIPS N32 ABI support 372347 Replacement problem of the additional c++14/c++17 new and delete operators 376257 helgrind history full speed up using a cached stack 379373 Fix syscall param msg->desc.port.name points to uninitialised byte(s) |
|
From: Petar J. <pe...@so...> - 2018-06-14 17:44:33
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=58c1c98db4eb8a66ddea228ab00c8ac1bd7e027c commit 58c1c98db4eb8a66ddea228ab00c8ac1bd7e027c Author: Petar Jovanovic <mip...@gm...> Date: Thu Jun 14 15:34:38 2018 +0000 mips64: update tests for N32 ABI Fix n32/n64 types mismatch in none, memcheck and helgrind tests. BZ issue - #345763. Contributed by: Dimitrije Nikolic, Aleksandar Rikalo, Tamara Vlahovic. Diff: --- helgrind/tests/annotate_hbefore.c | 4 ++-- memcheck/tests/atomic_incs.c | 25 ++++++++++++----------- memcheck/tests/test-plo.c | 8 +++----- memcheck/tests/unit_oset.c | 11 +++++----- none/tests/mips64/change_fp_mode.c | 13 ++++++------ none/tests/mips64/const.h | 2 +- none/tests/mips64/cvm_bbit.c | 8 ++++---- none/tests/mips64/cvm_ins.c | 19 +++++++++--------- none/tests/mips64/fpu_load_store.c | 1 + none/tests/mips64/load_store.c | 1 + none/tests/mips64/macro_load_store.h | 38 +++++++++++++++++++---------------- none/tests/mips64/move_instructions.c | 4 ++-- none/tests/mips64/round.c | 4 ++-- none/tests/mips64/test_fcsr.c | 7 ++++--- 14 files changed, 77 insertions(+), 68 deletions(-) diff --git a/helgrind/tests/annotate_hbefore.c b/helgrind/tests/annotate_hbefore.c index 74cf9d8..e311714 100644 --- a/helgrind/tests/annotate_hbefore.c +++ b/helgrind/tests/annotate_hbefore.c @@ -219,7 +219,7 @@ UWord do_acasW(UWord* addr, UWord expected, UWord nyu ) return cc == 0; } -#elif defined(VGA_mips32) +#elif defined(VGA_mips32) || (defined(VGA_mips64) && defined(VGABI_N32)) // mips32 /* return 1 if success, 0 if failure */ @@ -252,7 +252,7 @@ UWord do_acasW ( UWord* addr, UWord expected, UWord nyu ) return success; } -#elif defined(VGA_mips64) +#elif defined(VGA_mips64) && !defined(VGABI_N32) // mips64 /* return 1 if success, 0 if failure */ diff --git a/memcheck/tests/atomic_incs.c b/memcheck/tests/atomic_incs.c index 1fede8c..b6816d7 100644 --- a/memcheck/tests/atomic_incs.c +++ b/memcheck/tests/atomic_incs.c @@ -17,6 +17,7 @@ #include <unistd.h> #include <sys/wait.h> #include "tests/sys_mman.h" +#include "pub_core_basics.h" #define NNN 3456987 @@ -193,8 +194,8 @@ __attribute__((noinline)) void atomic_add_8bit ( char* p, int n ) /* We rely on the fact that p is 4-aligned. Otherwise 'll' may throw an exception that can cause this function to fail. */ #if defined (_MIPSEL) - unsigned long block[3] - = { (unsigned long)p, (unsigned long)n, 0x0ULL }; + RegWord block[3] + = { (RegWord)(Addr)p, (RegWord)n, 0x0ULL }; do { __asm__ __volatile__( "move $t0, %0" "\n\t" @@ -216,8 +217,8 @@ __attribute__((noinline)) void atomic_add_8bit ( char* p, int n ) ); } while (block[2] != 1); #elif defined (_MIPSEB) - unsigned long block[3] - = { (unsigned long)p, (unsigned long)n << 56, 0x0 }; + RegWord block[3] + = { (RegWord)(Addr)p, (RegWord)n << 56, 0x0 }; do { __asm__ __volatile__( "move $t0, %0" "\n\t" @@ -409,8 +410,8 @@ __attribute__((noinline)) void atomic_add_16bit ( short* p, int n ) /* We rely on the fact that p is 4-aligned. Otherwise 'll' may throw an exception that can cause this function to fail. */ #if defined (_MIPSEL) - unsigned long block[3] - = { (unsigned long)p, (unsigned long)n, 0x0ULL }; + RegWord block[3] + = { (RegWord)(Addr)p, (RegWord)n, 0x0ULL }; do { __asm__ __volatile__( "move $t0, %0" "\n\t" @@ -432,8 +433,8 @@ __attribute__((noinline)) void atomic_add_16bit ( short* p, int n ) ); } while (block[2] != 1); #elif defined (_MIPSEB) - unsigned long block[3] - = { (unsigned long)p, (unsigned long)n << 48, 0x0 }; + RegWord block[3] + = { (RegWord)(Addr)p, (RegWord)n << 48, 0x0 }; do { __asm__ __volatile__( "move $t0, %0" "\n\t" @@ -588,8 +589,8 @@ __attribute__((noinline)) void atomic_add_32bit ( int* p, int n ) ); } while (block[2] != 1); #elif defined(VGA_mips64) - unsigned long block[3] - = { (unsigned long)p, (unsigned long)n, 0x0ULL }; + RegWord block[3] + = { (RegWord)(Addr)p, (RegWord)n, 0x0ULL }; do { __asm__ __volatile__( "move $t0, %0" "\n\t" @@ -689,8 +690,8 @@ __attribute__((noinline)) void atomic_add_64bit ( long long int* p, int n ) : "d" (n) : "cc", "memory", "0", "1"); #elif defined(VGA_mips64) - unsigned long block[3] - = { (unsigned long)p, (unsigned long)n, 0x0ULL }; + RegWord block[3] + = { (RegWord)(Addr)p, (RegWord)n, 0x0ULL }; do { __asm__ __volatile__( "move $t0, %0" "\n\t" diff --git a/memcheck/tests/test-plo.c b/memcheck/tests/test-plo.c index 5d4da6b..f1f9372 100644 --- a/memcheck/tests/test-plo.c +++ b/memcheck/tests/test-plo.c @@ -1,10 +1,8 @@ #include "tests/malloc.h" +#include "pub_core_basics.h" #include <stdio.h> #include <assert.h> -typedef unsigned long long int ULong; -typedef unsigned long int UWord; - __attribute__((noinline)) static int my_ffsll ( ULong x ) { @@ -70,11 +68,11 @@ main(int argc, char *argv[]) word-sized load gives an addressing error regardless of the start of --partial-loads-ok=. *And* that the resulting value is completely defined. */ - UWord* words = malloc(3 * sizeof(UWord)); + RegWord* words = malloc(3 * sizeof(RegWord)); free(words); /* Should ALWAYS give an addr error. */ - UWord w = words[1]; + RegWord w = words[1]; /* Should NEVER give an error (you might expect a value one, but no.) */ if (w == 0x31415927) { diff --git a/memcheck/tests/unit_oset.c b/memcheck/tests/unit_oset.c index ff93398..1d2d255 100644 --- a/memcheck/tests/unit_oset.c +++ b/memcheck/tests/unit_oset.c @@ -434,8 +434,8 @@ void example1b(void) typedef struct { Int b1; - Addr first; - Addr last; + RegWord first; + RegWord last; Int b2; } Block; @@ -445,13 +445,14 @@ static HChar *blockToStr(void *p) { static HChar buf[32]; Block* b = (Block*)p; - sprintf(buf, "<(%d) %lu..%lu (%d)>", b->b1, b->first, b->last, b->b2); + sprintf(buf, "<(%d) %" FMT_REGWORD "u..%" FMT_REGWORD "u (%d)>", + b->b1, b->first, b->last, b->b2); return buf; } static Word blockCmp(const void* vkey, const void* velem) { - Addr key = *(const Addr*)vkey; + RegWord key = *(const RegWord*)vkey; const Block* elem = (const Block*)velem; assert(elem->first <= elem->last); @@ -463,7 +464,7 @@ static Word blockCmp(const void* vkey, const void* velem) void example2(void) { Int i, n; - Addr a; + RegWord a; Block* vs[NN]; Block v, prev; Block *pv; diff --git a/none/tests/mips64/change_fp_mode.c b/none/tests/mips64/change_fp_mode.c index 67cb72d..4dca120 100644 --- a/none/tests/mips64/change_fp_mode.c +++ b/none/tests/mips64/change_fp_mode.c @@ -4,6 +4,7 @@ #include <stdio.h> #include <stdlib.h> #include <sys/prctl.h> +#include "pub_core_basics.h" #if !defined(PR_SET_FP_MODE) # define PR_SET_FP_MODE 45 @@ -51,9 +52,9 @@ #define TEST_ST64(instruction) \ { \ - unsigned long result; \ + RegWord result; \ _TEST_ST(instruction); \ - printf(instruction" :: mem: %lx\n", result); \ + printf(instruction" :: mem: %" FMT_REGWORD "x\n", result); \ } #define TEST_ST32(instruction) \ @@ -86,7 +87,7 @@ #define TEST_MF(instruction) \ { \ - unsigned long result; \ + RegWord result; \ __asm__ volatile( \ ".set push\n\t" \ ".set noreorder\n\t" \ @@ -100,7 +101,7 @@ : "=m" (result) \ : "m" (source64) \ : "t0", "$f0", "$f1"); \ - printf(instruction" :: t0: %lx\n", result); \ + printf(instruction" :: t0: %" FMT_REGWORD "x\n", result); \ } #define TEST_MOVE(instruction) \ @@ -127,13 +128,13 @@ result2, result1); \ } -unsigned long source64 = 0x1234567890abcdefull; +ULong source64 = 0x1234567890abcdefull; unsigned int source32 = 0x12345678u; /* Determine FP mode based on sdc1 behavior returns 1 if FR = 1 mode is detected (assumes FRE = 0) */ static int get_fp_mode(void) { - unsigned long result = 0; + unsigned long long result = 0; __asm__ volatile( ".set push\n\t" ".set noreorder\n\t" diff --git a/none/tests/mips64/const.h b/none/tests/mips64/const.h index 5ccab70..fa4e88b 100644 --- a/none/tests/mips64/const.h +++ b/none/tests/mips64/const.h @@ -157,7 +157,7 @@ const int fs_w[] = { -347856, 0x80000000, 0xfffffff, 23, }; -const long fs_l[] = { +const long long fs_l[] = { 18, 25, 3, -1, 0xffffffff, 356, 1000000, -5786, -1, 24575, 10, -125458, diff --git a/none/tests/mips64/cvm_bbit.c b/none/tests/mips64/cvm_bbit.c index b1966b9..1f94bea 100644 --- a/none/tests/mips64/cvm_bbit.c +++ b/none/tests/mips64/cvm_bbit.c @@ -33,10 +33,10 @@ int main() printf("TEST bbit0: %s\n", t1 == 0x08 ? "PASS" : "FAIL"); printf("TEST bbit1: %s\n", t2 == 0xF7 ? "PASS" : "FAIL"); - long int lt1 = 0; - long int lt2 = 0; - long int lt3 = 0xff00000000; - long int lt4 = 0x100000000; + long long int lt1 = 0; + long long int lt2 = 0; + long long int lt3 = 0xff00000000; + long long int lt4 = 0x100000000; /* Take 0x100000000 and loop until 35th bit is set by incrementing 0x100000000 at a time. */ __asm__ volatile( diff --git a/none/tests/mips64/cvm_ins.c b/none/tests/mips64/cvm_ins.c index fee6f90..3d7a7c2 100644 --- a/none/tests/mips64/cvm_ins.c +++ b/none/tests/mips64/cvm_ins.c @@ -1,4 +1,5 @@ #include <stdio.h> +#include "pub_core_basics.h" const int reg_val[256] = { 0x00000000L, 0x04c11db7L, 0x09823b6eL, 0x0d4326d9L, @@ -69,7 +70,7 @@ const int reg_val[256] = { #define TESTINST1(instruction, RSVal, RT, RS, p, lenm1) \ { \ - unsigned long out; \ + RegWord out; \ __asm__ volatile( \ "li $" #RT ", 0" "\n\t" \ "move $" #RS ", %1" "\n\t" \ @@ -79,12 +80,12 @@ const int reg_val[256] = { : "r" (RSVal) \ : #RS, #RT, "cc", "memory" \ ); \ - printf("%s :: rt 0x%lx rs 0x%x, p 0x%08x, lenm1 0x%08x\n", \ - instruction, out, RSVal, p, lenm1); \ + printf("%s :: rt 0x%" FMT_REGWORD "x rs 0x%x, p 0x%08x, " \ + "lenm1 0x%08x\n", instruction, out, RSVal, p, lenm1); \ } #define TESTINST2(instruction, RSVal, RTval, RD, RS, RT) \ { \ - unsigned long out; \ + RegWord out; \ __asm__ volatile( \ "li $" #RD ", 0" "\n\t" \ "move $" #RS ", %1" "\n\t" \ @@ -95,12 +96,12 @@ const int reg_val[256] = { : "r" (RSVal), "r" (RTval) \ : #RD, #RS, #RT, "cc", "memory" \ ); \ - printf("%s :: rd 0x%lx rs 0x%x, rt 0x%x\n", \ - instruction, out, RSVal, RTval); \ + printf("%s :: rd 0x%" FMT_REGWORD "x rs 0x%x, " \ + "rt 0x%x\n", instruction, out, RSVal, RTval); \ } #define TESTINST3(instruction, RSVal, RT, RS, imm) \ { \ - unsigned long out; \ + RegWord out; \ __asm__ volatile( \ "li $" #RT ", 0" "\n\t" \ "move $" #RS ", %1" "\n\t" \ @@ -110,8 +111,8 @@ const int reg_val[256] = { : "r" (RSVal) \ : #RS, #RT, "cc", "memory" \ ); \ - printf("%s :: rt 0x%lx rs 0x%x,imm 0x%08x\n", \ - instruction, out, RSVal, imm); \ + printf("%s :: rt 0x%" FMT_REGWORD "x rs 0x%x,imm " \ + "0x%08x\n", instruction, out, RSVal, imm); \ } typedef enum { diff --git a/none/tests/mips64/fpu_load_store.c b/none/tests/mips64/fpu_load_store.c index 0ad4929..f408ffa 100644 --- a/none/tests/mips64/fpu_load_store.c +++ b/none/tests/mips64/fpu_load_store.c @@ -1,4 +1,5 @@ #include <stdio.h> +#include "pub_core_basics.h" #include "macro_load_store.h" int main() diff --git a/none/tests/mips64/load_store.c b/none/tests/mips64/load_store.c index bca86d3..704b52c 100644 --- a/none/tests/mips64/load_store.c +++ b/none/tests/mips64/load_store.c @@ -1,4 +1,5 @@ #include <stdio.h> +#include "pub_core_basics.h" #include "macro_load_store.h" int main() diff --git a/none/tests/mips64/macro_load_store.h b/none/tests/mips64/macro_load_store.h index 7fb34c6..0575e63 100644 --- a/none/tests/mips64/macro_load_store.h +++ b/none/tests/mips64/macro_load_store.h @@ -2,7 +2,7 @@ #define TEST1(instruction, offset, mem) \ { \ - unsigned long out = 0; \ + RegWord out = 0; \ __asm__ __volatile__( \ "move $t0, %1" "\n\t" \ "move $t1, %2" "\n\t" \ @@ -14,14 +14,15 @@ : "r" (mem), "r" (offset) \ : "t0", "t1" \ ); \ - printf("%s :: offset: 0x%x, out: 0x%lx\n", \ - instruction, offset, out); \ + printf("%s :: offset: 0x%x, out: 0x%" \ + FMT_REGWORD "x\n", instruction, \ + offset, out); \ } #define TEST2(instruction, offset) \ { \ - unsigned long out = 0; \ - unsigned long outHI = 0; \ + RegWord out = 0; \ + RegWord outHI = 0; \ __asm__ __volatile__( \ "move $t0, %2" "\n\t" \ "move $t1, %4" "\n\t" \ @@ -40,13 +41,14 @@ : "r" (reg_val2) , "r" (reg_val_zero), "r" (offset) \ : "t0", "t1", "t2", "t3" \ ); \ - printf("%s :: offset: 0x%x, out: 0x%lx, outHI: 0x%lx\n", \ - instruction, offset, out, outHI); \ + printf("%s :: offset: 0x%x, out: 0x%" FMT_REGWORD "x, " \ + "outHI: 0x%" FMT_REGWORD "x\n", instruction, \ + offset, out, outHI); \ } #define TEST3(instruction, offset, mem) \ { \ - unsigned long long out = 0; \ + RegWord out = 0; \ __asm__ __volatile__( \ "move $t0, %1" "\n\t" \ "move $t1, %2" "\n\t" \ @@ -58,8 +60,9 @@ : "r" (mem) , "r" (offset) \ : "t0", "t1", "$f0" \ ); \ - printf("%s :: offset: 0x%x, out: 0x%llx\n", \ - instruction, offset, out); \ + printf("%s :: offset: 0x%x, out: 0x%" \ + FMT_REGWORD "x\n", instruction, \ + offset, out); \ } #define TEST3w(instruction, offset, mem) \ @@ -82,7 +85,7 @@ #define TEST4(instruction, offset) \ { \ - unsigned long long out = 0; \ + RegWord out = 0; \ __asm__ __volatile__( \ "move $t0, %1" "\n\t" \ "move $t1, %3" "\n\t" \ @@ -97,13 +100,13 @@ : "r" (reg_val1) , "r" (reg_val_zero), "r" (offset) \ : "t0", "t1", "t2", "$f0" \ ); \ - printf("%s :: offset: 0x%x, out: 0x%llx\n", \ + printf("%s :: offset: 0x%x, out: 0x%" FMT_REGWORD "x\n",\ instruction, offset, out); \ } #define TEST5(instruction, offset, mem) \ { \ - unsigned long long out = 0; \ + RegWord out = 0; \ __asm__ __volatile__( \ "move $t0, %1" "\n\t" \ "move $t1, %2" "\n\t" \ @@ -114,8 +117,9 @@ : "r" (mem) , "r" (offset) \ : "t0", "t1", "$f0" \ ); \ - printf("%s :: offset: 0x%x, out: 0x%llx\n", \ - instruction, offset, out); \ + printf("%s :: offset: 0x%x, out: 0x%" \ + FMT_REGWORD "x\n", instruction, \ + offset, out); \ } #define TEST5w(instruction, offset, mem) \ @@ -137,7 +141,7 @@ #define TEST6(instruction, offset) \ { \ - unsigned long long out = 0; \ + RegWord out = 0; \ __asm__ __volatile__( \ "move $t0, %1" "\n\t" \ "move $t1, %3" "\n\t" \ @@ -154,6 +158,6 @@ : "r" (reg_val2) , "r" (reg_val_zero), "r" (offset) \ : "t0", "t1", "t2", "t3" \ ); \ - printf("%s :: offset: 0x%x, out: 0x%llx\n", \ + printf("%s :: offset: 0x%x, out: 0x%" FMT_REGWORD "x\n",\ instruction, offset, out); \ } diff --git a/none/tests/mips64/move_instructions.c b/none/tests/mips64/move_instructions.c index 566940f..4ea8255 100644 --- a/none/tests/mips64/move_instructions.c +++ b/none/tests/mips64/move_instructions.c @@ -179,7 +179,7 @@ const double fs2_f[] = { /* movf, movt */ #define TEST5(instruction, RDval, RSval, RD, RS) \ { \ - unsigned long out; \ + unsigned long long out; \ __asm__ __volatile__( \ "c.eq.s %3, %4" "\n\t" \ "move $"#RD", %1" "\n\t" \ @@ -190,7 +190,7 @@ const double fs2_f[] = { : "r" (RDval), "r" (RSval), "f" (fs1_f[i]), "f" (fs2_f[i]) \ : #RD, #RS \ ); \ - printf("%s :: RDval: 0x%x, RSval: 0x%x, out: 0x%lx\n", \ + printf("%s :: RDval: 0x%x, RSval: 0x%x, out: 0x%llx\n", \ instruction, RDval, RSval, out); \ } #endif diff --git a/none/tests/mips64/round.c b/none/tests/mips64/round.c index 1894de1..44be246 100644 --- a/none/tests/mips64/round.c +++ b/none/tests/mips64/round.c @@ -157,7 +157,7 @@ int FCSRRoundingMode(flt_round_op_t op1) break; case CVTDL: UNOPld("cvt.d.l"); - printf("%s %lf %ld\n", flt_round_op_names[op1], fd_d, fs_l[i]); + printf("%s %lf %lld\n", flt_round_op_names[op1], fd_d, fs_l[i]); printf("fcsr: 0x%x\n", CLEAR_PRESETBITS_FCSR(fcsr)); break; case CVTLS: @@ -172,7 +172,7 @@ int FCSRRoundingMode(flt_round_op_t op1) break; case CVTSL: UNOPls("cvt.s.l"); - printf("%s %f %ld\n", flt_round_op_names[op1], fd_f, fs_l[i]); + printf("%s %f %lld\n", flt_round_op_names[op1], fd_f, fs_l[i]); printf("fcsr: 0x%x\n", CLEAR_PRESETBITS_FCSR(fcsr)); break; default: diff --git a/none/tests/mips64/test_fcsr.c b/none/tests/mips64/test_fcsr.c index 07e5e8c..a99f89e 100644 --- a/none/tests/mips64/test_fcsr.c +++ b/none/tests/mips64/test_fcsr.c @@ -1,4 +1,5 @@ #include <stdio.h> +#include "pub_core_basics.h" /* * Bits 18 (NAN2008) and 19 (ABS2008) are preset by hardware and may differ @@ -13,7 +14,7 @@ int main () { #if defined(__mips_hard_float) - long out [] = {0, 0}; + RegWord out [] = {0, 0}; __asm__ volatile("cfc1 $a1, $31" "\n\t" "dli $t0, 0x405ee0a3d70a3d71" "\n\t" "dmtc1 $t0, $f0" "\n\t" @@ -32,8 +33,8 @@ int main () : "r" (out) : "a1", "a2", "t0", "$f0" ); - printf("FCSR::1: 0x%lx, 2: 0x%lx\n", CLEAR_PRESETBITS_FCSR(out[0]), - CLEAR_PRESETBITS_FCSR(out[1])); + printf("FCSR::1: 0x%" FMT_REGWORD "x, 2: 0x%" FMT_REGWORD "x\n", + CLEAR_PRESETBITS_FCSR(out[0]), CLEAR_PRESETBITS_FCSR(out[1])); #endif return 0; } |
|
From: Petar J. <pe...@so...> - 2018-06-14 17:44:20
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=9a6cf7a41c7e7a32e0d0a369b4519b97e2569d3d commit 9a6cf7a41c7e7a32e0d0a369b4519b97e2569d3d Author: Petar Jovanovic <mip...@gm...> Date: Thu Jun 14 15:26:09 2018 +0000 mips64: add N32 ABI support Adding MIPS N32 ABI support. BZ issue - #345763. Contributed and maintained by mulitple people over the years: Crestez Dan Leonard, Maran Pakkirisamy, Dimitrije Nikolic, Aleksandar Rikalo, Tamara Vlahovic. Diff: --- Makefile.all.am | 7 + Makefile.tool-tests.am | 4 + VEX/pub/libvex_basictypes.h | 13 +- configure.ac | 31 +++ coregrind/launcher-linux.c | 28 ++- coregrind/m_debuginfo/debuginfo.c | 8 +- coregrind/m_dispatch/dispatch-mips64-linux.S | 11 +- coregrind/m_redir.c | 10 + coregrind/m_syswrap/syscall-mips64-linux.S | 8 + coregrind/m_syswrap/syswrap-mips64-linux.c | 5 +- coregrind/m_transtab.c | 1 + coregrind/m_vkiscnums.c | 3 + coregrind/pub_core_machine.h | 8 +- coregrind/pub_core_mallocfree.h | 3 +- drd/drd_bitmap.h | 5 +- include/pub_tool_basics.h | 4 + include/vki/vki-mips64-linux.h | 18 +- include/vki/vki-scnums-mips64-linux.h | 337 ++++++++++++++++++++++++++- memcheck/mc_main.c | 33 ++- 19 files changed, 522 insertions(+), 15 deletions(-) diff --git a/Makefile.all.am b/Makefile.all.am index 30e79dd..4a29695 100644 --- a/Makefile.all.am +++ b/Makefile.all.am @@ -170,6 +170,13 @@ AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@ = \ -DVGPV_@VGCONF_ARCH_SEC@_@VGCONF_OS@_@VGCONF_PLATVARIANT@=1 endif +if VGCONF_HAVE_ABI +AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@ += -DVGABI_@VGCONF_ABI@ +if VGCONF_HAVE_PLATFORM_SEC +AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@ += -DVGABI_@VGCONF_ABI@ +endif +endif + AM_FLAG_M3264_X86_LINUX = @FLAG_M32@ AM_CFLAGS_X86_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY_2@ \ $(AM_CFLAGS_BASE) -fomit-frame-pointer diff --git a/Makefile.tool-tests.am b/Makefile.tool-tests.am index b27724f..752b967 100644 --- a/Makefile.tool-tests.am +++ b/Makefile.tool-tests.am @@ -16,6 +16,10 @@ AM_CPPFLAGS += -DVGA_SEC_@VGCONF_ARCH_SEC@=1 \ -DVGP_SEC_@VGCONF_ARCH_PRI@_@VGCONF_OS@=1 endif +if VGCONF_HAVE_ABI +AM_CPPFLAGS += -DVGABI_@VGCONF_ABI@ +endif + # Nb: Tools need to augment these flags with an arch-selection option, such # as $(AM_FLAG_M3264_PRI). AM_CFLAGS = -Winline -Wall -Wshadow -Wno-long-long -g \ diff --git a/VEX/pub/libvex_basictypes.h b/VEX/pub/libvex_basictypes.h index d633cde..53aa2cd 100644 --- a/VEX/pub/libvex_basictypes.h +++ b/VEX/pub/libvex_basictypes.h @@ -143,8 +143,13 @@ typedef unsigned long Addr; typedef unsigned long HWord; /* Size of GPRs */ -typedef HWord RegWord; -#define FMT_REGWORD "l" +#if defined(__mips__) && (__mips == 64) && (_MIPS_SIM == _ABIN32) + typedef ULong RegWord; +# define FMT_REGWORD "ll" +#else + typedef HWord RegWord; +# define FMT_REGWORD "l" +#endif /* Set up VEX_HOST_WORDSIZE and VEX_REGPARM. */ #undef VEX_HOST_WORDSIZE @@ -180,7 +185,11 @@ typedef HWord RegWord; # define VEX_REGPARM(_n) /* */ #elif defined(__mips__) && (__mips == 64) +#if _MIPS_SIM == _ABIN32 +# define VEX_HOST_WORDSIZE 4 +#else # define VEX_HOST_WORDSIZE 8 +#endif # define VEX_REGPARM(_n) /* */ #elif defined(__mips__) && (__mips != 64) diff --git a/configure.ac b/configure.ac index 0370498..306fbc7 100644 --- a/configure.ac +++ b/configure.ac @@ -1874,6 +1874,37 @@ CFLAGS=$safe_CFLAGS AC_SUBST(FLAG_MSA) +# Are we compiling for the MIPS64 n32 ABI? +AC_MSG_CHECKING([if gcc is producing mips n32 binaries]) +AC_COMPILE_IFELSE([AC_LANG_SOURCE([[ +#if !defined(_MIPS_SIM) || (defined(_MIPS_SIM) && (_MIPS_SIM != _ABIN32)) +#error NO +#endif +]])], [ +VGCONF_ABI=N32 +FLAG_M64="-march=mips64r2 -mabi=n32" +AC_MSG_RESULT([yes]) +], [ +AC_MSG_RESULT([no]) +]) + +# Are we compiling for the MIPS64 n64 ABI? +AC_MSG_CHECKING([if gcc is producing mips n64 binaries]) +AC_COMPILE_IFELSE([AC_LANG_SOURCE([[ +#if !defined(_MIPS_SIM) || (defined(_MIPS_SIM) && (_MIPS_SIM != _ABI64)) +#error NO +#endif +]])], [ +VGCONF_ABI=64 +AC_MSG_RESULT([yes]) +], [ +AC_MSG_RESULT([no]) +]) + +AM_CONDITIONAL([VGCONF_HAVE_ABI], + [test x$VGCONF_ABI != x]) +AC_SUBST(VGCONF_ABI) + # does this compiler support -mmmx ? AC_MSG_CHECKING([if gcc accepts -mmmx]) diff --git a/coregrind/launcher-linux.c b/coregrind/launcher-linux.c index 8e7c734..105d023 100644 --- a/coregrind/launcher-linux.c +++ b/coregrind/launcher-linux.c @@ -65,6 +65,14 @@ #define EM_PPC64 21 // ditto #endif +#ifndef E_MIPS_ABI_O32 +#define E_MIPS_ABI_O32 0x00001000 +#endif + +#ifndef E_MIPS_ABI2 +#define E_MIPS_ABI2 0x00000020 +#endif + /* Report fatal errors */ __attribute__((noreturn)) static void barf ( const char *format, ... ) @@ -224,9 +232,17 @@ static const char *select_platform(const char *clientname) else if (header.ehdr32.e_machine == EM_MIPS && (header.ehdr32.e_ident[EI_OSABI] == ELFOSABI_SYSV || - header.ehdr32.e_ident[EI_OSABI] == ELFOSABI_LINUX)) { + header.ehdr32.e_ident[EI_OSABI] == ELFOSABI_LINUX) && + (header.ehdr32.e_flags & E_MIPS_ABI_O32)) { platform = "mips32-linux"; } + else + if (header.ehdr32.e_machine == EM_MIPS && + (header.ehdr32.e_ident[EI_OSABI] == ELFOSABI_SYSV || + header.ehdr32.e_ident[EI_OSABI] == ELFOSABI_LINUX) && + (header.ehdr32.e_flags & E_MIPS_ABI2)) { + platform = "mips64-linux"; + } } else if (header.c[EI_DATA] == ELFDATA2MSB) { if (header.ehdr32.e_machine == EM_PPC && @@ -237,9 +253,17 @@ static const char *select_platform(const char *clientname) else if (header.ehdr32.e_machine == EM_MIPS && (header.ehdr32.e_ident[EI_OSABI] == ELFOSABI_SYSV || - header.ehdr32.e_ident[EI_OSABI] == ELFOSABI_LINUX)) { + header.ehdr32.e_ident[EI_OSABI] == ELFOSABI_LINUX) && + (header.ehdr32.e_flags & E_MIPS_ABI_O32)) { platform = "mips32-linux"; } + else + if (header.ehdr32.e_machine == EM_MIPS && + (header.ehdr32.e_ident[EI_OSABI] == ELFOSABI_SYSV || + header.ehdr32.e_ident[EI_OSABI] == ELFOSABI_LINUX) && + (header.ehdr32.e_flags & E_MIPS_ABI2)) { + platform = "mips64-linux"; + } } } else if (n_bytes >= sizeof(Elf64_Ehdr) && header.c[EI_CLASS] == ELFCLASS64) { diff --git a/coregrind/m_debuginfo/debuginfo.c b/coregrind/m_debuginfo/debuginfo.c index b850293..13991b6 100644 --- a/coregrind/m_debuginfo/debuginfo.c +++ b/coregrind/m_debuginfo/debuginfo.c @@ -3219,6 +3219,12 @@ Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, /* Now we know the CFA, use it to roll back the registers we're interested in. */ +#if defined(VGA_mips64) && defined(VGABI_N32) +#define READ_REGISTER(addr) ML_(read_ULong)((addr)) +#else +#define READ_REGISTER(addr) ML_(read_Addr)((addr)) +#endif + # define COMPUTE(_prev, _here, _how, _off) \ do { \ switch (_how) { \ @@ -3231,7 +3237,7 @@ Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, if (a < min_accessible \ || a > max_accessible-sizeof(Addr)) \ return False; \ - _prev = ML_(read_Addr)((void *)a); \ + _prev = READ_REGISTER((void *)a); \ break; \ } \ case CFIR_CFAREL: \ diff --git a/coregrind/m_dispatch/dispatch-mips64-linux.S b/coregrind/m_dispatch/dispatch-mips64-linux.S index dc2beee..4a2b1b7 100644 --- a/coregrind/m_dispatch/dispatch-mips64-linux.S +++ b/coregrind/m_dispatch/dispatch-mips64-linux.S @@ -111,8 +111,15 @@ postamble: /* Restore $4 from stack; holds address of two_words */ ld $4, 160($29) - sd $2, 0($4) /* Store $2 to two_words[0] */ - sd $3, 8($4) /* Store $3 to two_words[1] */ + #if defined(VGABI_64) + sd $2, 0($4) /* Store $2 to two_words[0] */ + sd $3, 8($4) /* Store $3 to two_words[1] */ + #elif defined(VGABI_N32) + sw $2, 0($4) /* Store $2 to two_words[0] */ + sw $3, 4($4) /* Store $3 to two_words[1] */ + #else + #error unknown mips64 abi + #endif /* Restore callee-saved registers... */ diff --git a/coregrind/m_redir.c b/coregrind/m_redir.c index aa65eaf..57a97a4 100644 --- a/coregrind/m_redir.c +++ b/coregrind/m_redir.c @@ -1612,6 +1612,7 @@ void VG_(redir_initialise) ( void ) complain_about_stripped_glibc_ldso ); +#if defined(VGABI_64) add_hardwired_spec( "ld-linux-mipsn8.so.1", "strlen", (Addr)&VG_(mips64_linux_REDIR_FOR_strlen), @@ -1622,6 +1623,15 @@ void VG_(redir_initialise) ( void ) (Addr)&VG_(mips64_linux_REDIR_FOR_index), complain_about_stripped_glibc_ldso ); +#elif defined(VGABI_N32) + add_hardwired_spec( + "ld.so.1", "strchr", + (Addr)&VG_(mips64_linux_REDIR_FOR_index), + complain_about_stripped_glibc_ldso + ); +#else +#error unknown mips64 ABI +#endif } # elif defined(VGP_x86_solaris) diff --git a/coregrind/m_syswrap/syscall-mips64-linux.S b/coregrind/m_syswrap/syscall-mips64-linux.S index 8cc2ac0..df30d0e 100644 --- a/coregrind/m_syswrap/syscall-mips64-linux.S +++ b/coregrind/m_syswrap/syscall-mips64-linux.S @@ -140,11 +140,19 @@ ML_(do_syscall_for_client_WRK): .globl ML_(blksys_complete) .globl ML_(blksys_committed) .globl ML_(blksys_finished) +#if defined(VGABI_N32) +ML_(blksys_setup): .int 1b +ML_(blksys_restart): .int 2b +ML_(blksys_complete): .int 3b +ML_(blksys_committed): .int 4b +ML_(blksys_finished): .int 5b +#else ML_(blksys_setup): .quad 1b ML_(blksys_restart): .quad 2b ML_(blksys_complete): .quad 3b ML_(blksys_committed): .quad 4b ML_(blksys_finished): .quad 5b +#endif #endif // defined(VGP_mips64_linux) diff --git a/coregrind/m_syswrap/syswrap-mips64-linux.c b/coregrind/m_syswrap/syswrap-mips64-linux.c index c644ecd..062fb38 100644 --- a/coregrind/m_syswrap/syswrap-mips64-linux.c +++ b/coregrind/m_syswrap/syswrap-mips64-linux.c @@ -756,7 +756,10 @@ static SyscallTableEntry syscall_main_table[] = { LINX_ (__NR_epoll_ctl, sys_epoll_ctl), LINXY (__NR_epoll_wait, sys_epoll_wait), PLAX_(__NR_rt_sigreturn,sys_rt_sigreturn), - /* LINXY(__NR_fcntl64,sys_fcntl64), */ +#if defined(VGABI_N32) + LINXY(__NR_fcntl64, sys_fcntl64), + GENXY(__NR_statfs64, sys_statfs64), +#endif LINX_ (__NR_set_tid_address, sys_set_tid_address), LINX_ (__NR_semtimedop, sys_semtimedop), PLAX_ (__NR_fadvise64, sys_fadvise64), diff --git a/coregrind/m_transtab.c b/coregrind/m_transtab.c index 6ef9cea..ef2e3df 100644 --- a/coregrind/m_transtab.c +++ b/coregrind/m_transtab.c @@ -2452,6 +2452,7 @@ void VG_(init_tt_tc) ( void ) else if (sizeof(HWord) == 4) { vg_assert(sizeof(TTEntryH) <= 20); # if defined(VGP_ppc32_linux) || defined(VGP_mips32_linux) \ + || (defined(VGP_mips64_linux) && defined(VGABI_N32)) \ || defined(VGP_arm_linux) /* On PPC32, MIPS32, ARM32 platforms, alignof(ULong) == 8, so the structure is larger than on other 32 bit targets. */ diff --git a/coregrind/m_vkiscnums.c b/coregrind/m_vkiscnums.c index 03a64a4..996345e 100644 --- a/coregrind/m_vkiscnums.c +++ b/coregrind/m_vkiscnums.c @@ -60,6 +60,9 @@ const HChar* VG_(sysnum_string)(Word sysnum) #if defined(VGP_mips32_linux) STATIC_ASSERT(__NR_pipe == 4042); STATIC_ASSERT(__NR_pipe2 == 4328); +#elif defined(VGP_mips64_linux) && defined(VGABI_N32) +STATIC_ASSERT(__NR_pipe == 6021); +STATIC_ASSERT(__NR_pipe2 == 6291); #elif defined(VGP_mips64_linux) STATIC_ASSERT(__NR_pipe == 5021); STATIC_ASSERT(__NR_pipe2 == 5287); diff --git a/coregrind/pub_core_machine.h b/coregrind/pub_core_machine.h index a8b8bc8..d6af843 100644 --- a/coregrind/pub_core_machine.h +++ b/coregrind/pub_core_machine.h @@ -106,7 +106,13 @@ # error "Unknown endianness" # endif # define VG_ELF_MACHINE EM_MIPS -# define VG_ELF_CLASS ELFCLASS64 +# if defined(VGABI_N32) +# define VG_ELF_CLASS ELFCLASS32 +# elif defined(VGABI_64) +# define VG_ELF_CLASS ELFCLASS64 +# else +# error Unknown mips64 abi +# endif # undef VG_PLAT_USES_PPCTOC #else # error Unknown platform diff --git a/coregrind/pub_core_mallocfree.h b/coregrind/pub_core_mallocfree.h index b59717b..5ed01d3 100644 --- a/coregrind/pub_core_mallocfree.h +++ b/coregrind/pub_core_mallocfree.h @@ -66,6 +66,7 @@ typedef Int ArenaId; #if defined(VGP_x86_linux) || \ defined(VGP_arm_linux) || \ defined(VGP_mips32_linux) || \ + (defined(VGP_mips64_linux) && defined(VGABI_N32)) || \ defined(VGP_x86_solaris) # define VG_MIN_MALLOC_SZB 8 // Nb: We always use 16 bytes for Darwin, even on 32-bits, so it can be used @@ -77,7 +78,7 @@ typedef Int ArenaId; defined(VGP_ppc64be_linux) || \ defined(VGP_ppc64le_linux) || \ defined(VGP_s390x_linux) || \ - defined(VGP_mips64_linux) || \ + (defined(VGP_mips64_linux) && !defined(VGABI_N32)) || \ defined(VGP_x86_darwin) || \ defined(VGP_amd64_darwin) || \ defined(VGP_arm64_linux) || \ diff --git a/drd/drd_bitmap.h b/drd/drd_bitmap.h index 488d895..bf53164 100644 --- a/drd/drd_bitmap.h +++ b/drd/drd_bitmap.h @@ -137,10 +137,11 @@ Addr make_address(const UWord a1, const UWord a0) /** Log2 of BITS_PER_UWORD. */ #if defined(VGA_x86) || defined(VGA_ppc32) || defined(VGA_arm) \ - || defined(VGA_mips32) + || defined(VGA_mips32) || (defined(VGA_mips64) && defined(VGABI_N32)) #define BITS_PER_BITS_PER_UWORD 5 #elif defined(VGA_amd64) || defined(VGA_ppc64be) || defined(VGA_ppc64le) \ - || defined(VGA_s390x) || defined(VGA_mips64) || defined(VGA_arm64) + || defined(VGA_s390x) || (defined(VGA_mips64) && !defined(VGABI_N32)) \ + || defined(VGA_arm64) || defined(VGA_tilegx) #define BITS_PER_BITS_PER_UWORD 6 #else #error Unknown platform. diff --git a/include/pub_tool_basics.h b/include/pub_tool_basics.h index ef0aa74..9ad0f70 100644 --- a/include/pub_tool_basics.h +++ b/include/pub_tool_basics.h @@ -271,6 +271,10 @@ static inline Bool sr_EQ ( UInt sysno, SysRes sr1, SysRes sr2 ) { const UInt __nr_Linux = 4000; const UInt __nr_pipe = __nr_Linux + 42; const UInt __nr_pipe2 = __nr_Linux + 328; +# elif defined(VGP_mips64_linux) && defined(VGABI_N32) + const UInt __nr_Linux = 6000; + const UInt __nr_pipe = __nr_Linux + 21; + const UInt __nr_pipe2 = __nr_Linux + 291; # else const UInt __nr_Linux = 5000; const UInt __nr_pipe = __nr_Linux + 21; diff --git a/include/vki/vki-mips64-linux.h b/include/vki/vki-mips64-linux.h index 34ee6f4..cedee0b 100644 --- a/include/vki/vki-mips64-linux.h +++ b/include/vki/vki-mips64-linux.h @@ -399,11 +399,17 @@ struct vki_f_owner_ex { // From linux-2.6.35.9/include/asm-mips/stat.h //---------------------------------------------------------------------- +/* Size of kernel long is different from Valgrind MIPS n32 long size, so we have to +use long long instead long type. */ struct vki_stat { unsigned int st_dev; unsigned int st_pad0[3]; /* Reserved for st_dev expansion */ +#if defined(VGABI_N32) + unsigned long long st_ino; +#else unsigned long st_ino; +#endif int st_mode; unsigned int st_nlink; @@ -414,7 +420,11 @@ struct vki_stat { unsigned int st_rdev; unsigned int st_pad1[3]; /* Reserved for st_rdev expansion */ +#if defined(VGABI_N32) + long long st_size; +#else long st_size; +#endif /* * Actually this should be timestruc_t st_atime, st_mtime and st_ctime @@ -914,7 +924,13 @@ typedef union vki_sigval { } vki_sigval_t; #ifndef __VKI_ARCH_SI_PREAMBLE_SIZE -#define __VKI_ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) +#if defined(VGABI_64) + #define __VKI_ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) +#elif defined(VGABI_N32) +#define __VKI_ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int)) +#else +#error unknown mips64 abi +#endif #endif #define VKI_SI_MAX_SIZE 128 diff --git a/include/vki/vki-scnums-mips64-linux.h b/include/vki/vki-scnums-mips64-linux.h index 1a15bf8..7481768 100644 --- a/include/vki/vki-scnums-mips64-linux.h +++ b/include/vki/vki-scnums-mips64-linux.h @@ -1,4 +1,3 @@ - /*--------------------------------------------------------------------*/ /*--- System call numbers for mips-linux. ---*/ /*--- vki-scnums-mips64-linux.h ---*/ @@ -33,6 +32,8 @@ #define __VKI_SCNUMS_MIPS64_LINUX_H // From linux/arch/mips/include/uapi/asm/unistd.h + +#if defined(VGABI_64) /* * Linux 64-bit syscalls are in the range from 5000 to 5999. */ @@ -364,6 +365,340 @@ #define __NR_pkey_alloc (__NR_Linux + 324) #define __NR_pkey_free (__NR_Linux + 325) #define __NR_statx (__NR_Linux + 326) + +#elif defined(VGABI_N32) + +/* + * Linux N32 syscalls are in the range from 6000 to 6999. + * This is from linux 3.19 arch/mips/include/uapi/asm/unistd.h + */ +#define __NR_Linux 6000 +#define __NR_read (__NR_Linux + 0) +#define __NR_write (__NR_Linux + 1) +#define __NR_open (__NR_Linux + 2) +#define __NR_close (__NR_Linux + 3) +#define __NR_stat (__NR_Linux + 4) +#define __NR_fstat (__NR_Linux + 5) +#define __NR_lstat (__NR_Linux + 6) +#define __NR_poll (__NR_Linux + 7) +#define __NR_lseek (__NR_Linux + 8) +#define __NR_mmap (__NR_Linux + 9) +#define __NR_mprotect (__NR_Linux + 10) +#define __NR_munmap (__NR_Linux + 11) +#define __NR_brk (__NR_Linux + 12) +#define __NR_rt_sigaction (__NR_Linux + 13) +#define __NR_rt_sigprocmask (__NR_Linux + 14) +#define __NR_ioctl (__NR_Linux + 15) +#define __NR_pread64 (__NR_Linux + 16) +#define __NR_pwrite64 (__NR_Linux + 17) +#define __NR_readv (__NR_Linux + 18) +#define __NR_writev (__NR_Linux + 19) +#define __NR_access (__NR_Linux + 20) +#define __NR_pipe (__NR_Linux + 21) +#define __NR__newselect (__NR_Linux + 22) +#define __NR_sched_yield (__NR_Linux + 23) +#define __NR_mremap (__NR_Linux + 24) +#define __NR_msync (__NR_Linux + 25) +#define __NR_mincore (__NR_Linux + 26) +#define __NR_madvise (__NR_Linux + 27) +#define __NR_shmget (__NR_Linux + 28) +#define __NR_shmat (__NR_Linux + 29) +#define __NR_shmctl (__NR_Linux + 30) +#define __NR_dup (__NR_Linux + 31) +#define __NR_dup2 (__NR_Linux + 32) +#define __NR_pause (__NR_Linux + 33) +#define __NR_nanosleep (__NR_Linux + 34) +#define __NR_getitimer (__NR_Linux + 35) +#define __NR_setitimer (__NR_Linux + 36) +#define __NR_alarm (__NR_Linux + 37) +#define __NR_getpid (__NR_Linux + 38) +#define __NR_sendfile (__NR_Linux + 39) +#define __NR_socket (__NR_Linux + 40) +#define __NR_connect (__NR_Linux + 41) +#define __NR_accept (__NR_Linux + 42) +#define __NR_sendto (__NR_Linux + 43) +#define __NR_recvfrom (__NR_Linux + 44) +#define __NR_sendmsg (__NR_Linux + 45) +#define __NR_recvmsg (__NR_Linux + 46) +#define __NR_shutdown (__NR_Linux + 47) +#define __NR_bind (__NR_Linux + 48) +#define __NR_listen (__NR_Linux + 49) +#define __NR_getsockname (__NR_Linux + 50) +#define __NR_getpeername (__NR_Linux + 51) +#define __NR_socketpair (__NR_Linux + 52) +#define __NR_setsockopt (__NR_Linux + 53) +#define __NR_getsockopt (__NR_Linux + 54) +#define __NR_clone (__NR_Linux + 55) +#define __NR_fork (__NR_Linux + 56) +#define __NR_execve (__NR_Linux + 57) +#define __NR_exit (__NR_Linux + 58) +#define __NR_wait4 (__NR_Linux + 59) +#define __NR_kill (__NR_Linux + 60) +#define __NR_uname (__NR_Linux + 61) +#define __NR_semget (__NR_Linux + 62) +#define __NR_semop (__NR_Linux + 63) +#define __NR_semctl (__NR_Linux + 64) +#define __NR_shmdt (__NR_Linux + 65) +#define __NR_msgget (__NR_Linux + 66) +#define __NR_msgsnd (__NR_Linux + 67) +#define __NR_msgrcv (__NR_Linux + 68) +#define __NR_msgctl (__NR_Linux + 69) +#define __NR_fcntl (__NR_Linux + 70) +#define __NR_flock (__NR_Linux + 71) +#define __NR_fsync (__NR_Linux + 72) +#define __NR_fdatasync (__NR_Linux + 73) +#define __NR_truncate (__NR_Linux + 74) +#define __NR_ftruncate (__NR_Linux + 75) +#define __NR_getdents (__NR_Linux + 76) +#define __NR_getcwd (__NR_Linux + 77) +#define __NR_chdir (__NR_Linux + 78) +#define __NR_fchdir (__NR_Linux + 79) +#define __NR_rename (__NR_Linux + 80) +#define __NR_mkdir (__NR_Linux + 81) +#define __NR_rmdir (__NR_Linux + 82) +#define __NR_creat (__NR_Linux + 83) +#define __NR_link (__NR_Linux + 84) +#define __NR_unlink (__NR_Linux + 85) +#define __NR_symlink (__NR_Linux + 86) +#define __NR_readlink (__NR_Linux + 87) +#define __NR_chmod (__NR_Linux + 88) +#define __NR_fchmod (__NR_Linux + 89) +#define __NR_chown (__NR_Linux + 90) +#define __NR_fchown (__NR_Linux + 91) +#define __NR_lchown (__NR_Linux + 92) +#define __NR_umask (__NR_Linux + 93) +#define __NR_gettimeofday (__NR_Linux + 94) +#define __NR_getrlimit (__NR_Linux + 95) +#define __NR_getrusage (__NR_Linux + 96) +#define __NR_sysinfo (__NR_Linux + 97) +#define __NR_times (__NR_Linux + 98) +#define __NR_ptrace (__NR_Linux + 99) +#define __NR_getuid (__NR_Linux + 100) +#define __NR_syslog (__NR_Linux + 101) +#define __NR_getgid (__NR_Linux + 102) +#define __NR_setuid (__NR_Linux + 103) +#define __NR_setgid (__NR_Linux + 104) +#define __NR_geteuid (__NR_Linux + 105) +#define __NR_getegid (__NR_Linux + 106) +#define __NR_setpgid (__NR_Linux + 107) +#define __NR_getppid (__NR_Linux + 108) +#define __NR_getpgrp (__NR_Linux + 109) +#define __NR_setsid (__NR_Linux + 110) +#define __NR_setreuid (__NR_Linux + 111) +#define __NR_setregid (__NR_Linux + 112) +#define __NR_getgroups (__NR_Linux + 113) +#define __NR_setgroups (__NR_Linux + 114) +#define __NR_setresuid (__NR_Linux + 115) +#define __NR_getresuid (__NR_Linux + 116) +#define __NR_setresgid (__NR_Linux + 117) +#define __NR_getresgid (__NR_Linux + 118) +#define __NR_getpgid (__NR_Linux + 119) +#define __NR_setfsuid (__NR_Linux + 120) +#define __NR_setfsgid (__NR_Linux + 121) +#define __NR_getsid (__NR_Linux + 122) +#define __NR_capget (__NR_Linux + 123) +#define __NR_capset (__NR_Linux + 124) +#define __NR_rt_sigpending (__NR_Linux + 125) +#define __NR_rt_sigtimedwait (__NR_Linux + 126) +#define __NR_rt_sigqueueinfo (__NR_Linux + 127) +#define __NR_rt_sigsuspend (__NR_Linux + 128) +#define __NR_sigaltstack (__NR_Linux + 129) +#define __NR_utime (__NR_Linux + 130) +#define __NR_mknod (__NR_Linux + 131) +#define __NR_personality (__NR_Linux + 132) +#define __NR_ustat (__NR_Linux + 133) +#define __NR_statfs (__NR_Linux + 134) +#define __NR_fstatfs (__NR_Linux + 135) +#define __NR_sysfs (__NR_Linux + 136) +#define __NR_getpriority (__NR_Linux + 137) +#define __NR_setpriority (__NR_Linux + 138) +#define __NR_sched_setparam (__NR_Linux + 139) +#define __NR_sched_getparam (__NR_Linux + 140) +#define __NR_sched_setscheduler (__NR_Linux + 141) +#define __NR_sched_getscheduler (__NR_Linux + 142) +#define __NR_sched_get_priority_max (__NR_Linux + 143) +#define __NR_sched_get_priority_min (__NR_Linux + 144) +#define __NR_sched_rr_get_interval (__NR_Linux + 145) +#define __NR_mlock (__NR_Linux + 146) +#define __NR_munlock (__NR_Linux + 147) +#define __NR_mlockall (__NR_Linux + 148) +#define __NR_munlockall (__NR_Linux + 149) +#define __NR_vhangup (__NR_Linux + 150) +#define __NR_pivot_root (__NR_Linux + 151) +#define __NR__sysctl (__NR_Linux + 152) +#define __NR_prctl (__NR_Linux + 153) +#define __NR_adjtimex (__NR_Linux + 154) +#define __NR_setrlimit (__NR_Linux + 155) +#define __NR_chroot (__NR_Linux + 156) +#define __NR_sync (__NR_Linux + 157) +#define __NR_acct (__NR_Linux + 158) +#define __NR_settimeofday (__NR_Linux + 159) +#define __NR_mount (__NR_Linux + 160) +#define __NR_umount2 (__NR_Linux + 161) +#define __NR_swapon (__NR_Linux + 162) +#define __NR_swapoff (__NR_Linux + 163) +#define __NR_reboot (__NR_Linux + 164) +#define __NR_sethostname (__NR_Linux + 165) +#define __NR_setdomainname (__NR_Linux + 166) +#define __NR_create_module (__NR_Linux + 167) +#define __NR_init_module (__NR_Linux + 168) +#define __NR_delete_module (__NR_Linux + 169) +#define __NR_get_kernel_syms (__NR_Linux + 170) +#define __NR_query_module (__NR_Linux + 171) +#define __NR_quotactl (__NR_Linux + 172) +#define __NR_nfsservctl (__NR_Linux + 173) +#define __NR_getpmsg (__NR_Linux + 174) +#define __NR_putpmsg (__NR_Linux + 175) +#define __NR_afs_syscall (__NR_Linux + 176) +#define __NR_reserved177 (__NR_Linux + 177) +#define __NR_gettid (__NR_Linux + 178) +#define __NR_readahead (__NR_Linux + 179) +#define __NR_setxattr (__NR_Linux + 180) +#define __NR_lsetxattr (__NR_Linux + 181) +#define __NR_fsetxattr (__NR_Linux + 182) +#define __NR_getxattr (__NR_Linux + 183) +#define __NR_lgetxattr (__NR_Linux + 184) +#define __NR_fgetxattr (__NR_Linux + 185) +#define __NR_listxattr (__NR_Linux + 186) +#define __NR_llistxattr (__NR_Linux + 187) +#define __NR_flistxattr (__NR_Linux + 188) +#define __NR_removexattr (__NR_Linux + 189) +#define __NR_lremovexattr (__NR_Linux + 190) +#define __NR_fremovexattr (__NR_Linux + 191) +#define __NR_tkill (__NR_Linux + 192) +#define __NR_reserved193 (__NR_Linux + 193) +#define __NR_futex (__NR_Linux + 194) +#define __NR_sched_setaffinity (__NR_Linux + 195) +#define __NR_sched_getaffinity (__NR_Linux + 196) +#define __NR_cacheflush (__NR_Linux + 197) +#define __NR_cachectl (__NR_Linux + 198) +#define __NR_sysmips (__NR_Linux + 199) +#define __NR_io_setup (__NR_Linux + 200) +#define __NR_io_destroy (__NR_Linux + 201) +#define __NR_io_getevents (__NR_Linux + 202) +#define __NR_io_submit (__NR_Linux + 203) +#define __NR_io_cancel (__NR_Linux + 204) +#define __NR_exit_group (__NR_Linux + 205) +#define __NR_lookup_dcookie (__NR_Linux + 206) +#define __NR_epoll_create (__NR_Linux + 207) +#define __NR_epoll_ctl (__NR_Linux + 208) +#define __NR_epoll_wait (__NR_Linux + 209) +#define __NR_remap_file_pages (__NR_Linux + 210) +#define __NR_rt_sigreturn (__NR_Linux + 211) +#define __NR_fcntl64 (__NR_Linux + 212) +#define __NR_set_tid_address (__NR_Linux + 213) +#define __NR_restart_syscall (__NR_Linux + 214) +#define __NR_semtimedop (__NR_Linux + 215) +#define __NR_fadvise64 (__NR_Linux + 216) +#define __NR_statfs64 (__NR_Linux + 217) +#define __NR_fstatfs64 (__NR_Linux + 218) +#define __NR_sendfile64 (__NR_Linux + 219) +#define __NR_timer_create (__NR_Linux + 220) +#define __NR_timer_settime (__NR_Linux + 221) +#define __NR_timer_gettime (__NR_Linux + 222) +#define __NR_timer_getoverrun (__NR_Linux + 223) +#define __NR_timer_delete (__NR_Linux + 224) +#define __NR_clock_settime (__NR_Linux + 225) +#define __NR_clock_gettime (__NR_Linux + 226) +#define __NR_clock_getres (__NR_Linux + 227) +#define __NR_clock_nanosleep (__NR_Linux + 228) +#define __NR_tgkill (__NR_Linux + 229) +#define __NR_utimes (__NR_Linux + 230) +#define __NR_mbind (__NR_Linux + 231) +#define __NR_get_mempolicy (__NR_Linux + 232) +#define __NR_set_mempolicy (__NR_Linux + 233) +#define __NR_mq_open (__NR_Linux + 234) +#define __NR_mq_unlink (__NR_Linux + 235) +#define __NR_mq_timedsend (__NR_Linux + 236) +#define __NR_mq_timedreceive (__NR_Linux + 237) +#define __NR_mq_notify (__NR_Linux + 238) +#define __NR_mq_getsetattr (__NR_Linux + 239) +#define __NR_vserver (__NR_Linux + 240) +#define __NR_waitid (__NR_Linux + 241) +/* #define __NR_sys_setaltroot (__NR_Linux + 242) */ +#define __NR_add_key (__NR_Linux + 243) +#define __NR_request_key (__NR_Linux + 244) +#define __NR_keyctl (__NR_Linux + 245) +#define __NR_set_thread_area (__NR_Linux + 246) +#define __NR_inotify_init (__NR_Linux + 247) +#define __NR_inotify_add_watch (__NR_Linux + 248) +#define __NR_inotify_rm_watch (__NR_Linux + 249) +#define __NR_migrate_pages (__NR_Linux + 250) +#define __NR_openat (__NR_Linux + 251) +#define __NR_mkdirat (__NR_Linux + 252) +#define __NR_mknodat (__NR_Linux + 253) +#define __NR_fchownat (__NR_Linux + 254) +#define __NR_futimesat (__NR_Linux + 255) +#define __NR_newfstatat (__NR_Linux + 256) +#define __NR_unlinkat (__NR_Linux + 257) +#define __NR_renameat (__NR_Linux + 258) +#define __NR_linkat (__NR_Linux + 259) +#define __NR_symlinkat (__NR_Linux + 260) +#define __NR_readlinkat (__NR_Linux + 261) +#define __NR_fchmodat (__NR_Linux + 262) +#define __NR_faccessat (__NR_Linux + 263) +#define __NR_pselect6 (__NR_Linux + 264) +#define __NR_ppoll (__NR_Linux + 265) +#define __NR_unshare (__NR_Linux + 266) +#define __NR_splice (__NR_Linux + 267) +#define __NR_sync_file_range (__NR_Linux + 268) +#define __NR_tee (__NR_Linux + 269) +#define __NR_vmsplice (__NR_Linux + 270) +#define __NR_move_pages (__NR_Linux + 271) +#define __NR_set_robust_list (__NR_Linux + 272) +#define __NR_get_robust_list (__NR_Linux + 273) +#define __NR_kexec_load (__NR_Linux + 274) +#define __NR_getcpu (__NR_Linux + 275) +#define __NR_epoll_pwait (__NR_Linux + 276) +#define __NR_ioprio_set (__NR_Linux + 277) +#define __NR_ioprio_get (__NR_Linux + 278) +#define __NR_utimensat (__NR_Linux + 279) +#define __NR_signalfd (__NR_Linux + 280) +#define __NR_timerfd (__NR_Linux + 281) +#define __NR_eventfd (__NR_Linux + 282) +#define __NR_fallocate (__NR_Linux + 283) +#define __NR_timerfd_create (__NR_Linux + 284) +#define __NR_timerfd_gettime (__NR_Linux + 285) +#define __NR_timerfd_settime (__NR_Linux + 286) +#define __NR_signalfd4 (__NR_Linux + 287) +#define __NR_eventfd2 (__NR_Linux + 288) +#define __NR_epoll_create1 (__NR_Linux + 289) +#define __NR_dup3 (__NR_Linux + 290) +#define __NR_pipe2 (__NR_Linux + 291) +#define __NR_inotify_init1 (__NR_Linux + 292) +#define __NR_preadv (__NR_Linux + 293) +#define __NR_pwritev (__NR_Linux + 294) +#define __NR_rt_tgsigqueueinfo (__NR_Linux + 295) +#define __NR_perf_event_open (__NR_Linux + 296) +#define __NR_accept4 (__NR_Linux + 297) +#define __NR_recvmmsg (__NR_Linux + 298) +#define __NR_getdents64 (__NR_Linux + 299) +#define __NR_fanotify_init (__NR_Linux + 300) +#define __NR_fanotify_mark (__NR_Linux + 301) +#define __NR_prlimit64 (__NR_Linux + 302) +#define __NR_name_to_handle_at (__NR_Linux + 303) +#define __NR_open_by_handle_at (__NR_Linux + 304) +#define __NR_clock_adjtime (__NR_Linux + 305) +#define __NR_syncfs (__NR_Linux + 306) +#define __NR_sendmmsg (__NR_Linux + 307) +#define __NR_setns (__NR_Linux + 308) +#define __NR_process_vm_readv (__NR_Linux + 309) +#define __NR_process_vm_writev (__NR_Linux + 310) +#define __NR_kcmp (__NR_Linux + 311) +#define __NR_finit_module (__NR_Linux + 312) +#define __NR_sched_setattr (__NR_Linux + 313) +#define __NR_sched_getattr (__NR_Linux + 314) +#define __NR_renameat2 (__NR_Linux + 315) +#define __NR_seccomp (__NR_Linux + 316) +#define __NR_getrandom (__NR_Linux + 317) +#define __NR_memfd_create (__NR_Linux + 318) +#define __NR_bpf (__NR_Linux + 319) +#define __NR_execveat (__NR_Linux + 320) + +#else +#error unknown mips64 abi +#endif + #endif /* __VKI_SCNUMS_MIPS64_LINUX_H */ /*--------------------------------------------------------------------*/ diff --git a/memcheck/mc_main.c b/memcheck/mc_main.c index 6908942..f1dc900 100644 --- a/memcheck/mc_main.c +++ b/memcheck/mc_main.c @@ -1392,8 +1392,14 @@ ULong mc_LOADVn_slow ( Addr a, SizeT nBits, Bool bigendian ) folded out by compilers on 32-bit platforms. These are derived from LOADV64 and LOADV32. */ + +#if defined (VGABI_N32) + if (LIKELY(sizeof(void*) == 4 + && nBits == 64 && VG_IS_8_ALIGNED(a))) { +#else if (LIKELY(sizeof(void*) == 8 && nBits == 64 && VG_IS_8_ALIGNED(a))) { +#endif SecMap* sm = get_secmap_for_reading(a); UWord sm_off16 = SM_OFF_16(a); UWord vabits16 = sm->vabits16[sm_off16]; @@ -1403,8 +1409,13 @@ ULong mc_LOADVn_slow ( Addr a, SizeT nBits, Bool bigendian ) return V_BITS64_UNDEFINED; /* else fall into the slow case */ } +#if defined (VGABI_N32) + if (LIKELY(sizeof(void*) == 4 + && nBits == 32 && VG_IS_4_ALIGNED(a))) { +#else if (LIKELY(sizeof(void*) == 8 && nBits == 32 && VG_IS_4_ALIGNED(a))) { +#endif SecMap* sm = get_secmap_for_reading(a); UWord sm_off = SM_OFF(a); UWord vabits8 = sm->vabits8[sm_off]; @@ -1485,8 +1496,13 @@ ULong mc_LOADVn_slow ( Addr a, SizeT nBits, Bool bigendian ) /* "at least one of the addresses is invalid" */ tl_assert(pessim64 != V_BITS64_DEFINED); +#if defined (VGABI_N32) + if (szB == VG_WORDSIZE * 2 && VG_IS_WORD_ALIGNED(a) + && n_addrs_bad < VG_WORDSIZE * 2) { +#else if (szB == VG_WORDSIZE && VG_IS_WORD_ALIGNED(a) && n_addrs_bad < VG_WORDSIZE) { +#endif /* Exemption applies. Use the previously computed pessimising value for vbits64 and return the combined result, but don't flag an addressing error. The pessimising value is Defined @@ -1504,8 +1520,13 @@ ULong mc_LOADVn_slow ( Addr a, SizeT nBits, Bool bigendian ) for this case. Note that the first clause of the conditional (VG_WORDSIZE == 8) is known at compile time, so the whole clause will get folded out in 32 bit builds. */ +#if defined (VGABI_N32) + if (VG_WORDSIZE == 4 + && VG_IS_4_ALIGNED(a) && nBits == 32 && n_addrs_bad < 4) { +#else if (VG_WORDSIZE == 8 && VG_IS_4_ALIGNED(a) && nBits == 32 && n_addrs_bad < 4) { +#endif tl_assert(V_BIT_UNDEFINED == 1 && V_BIT_DEFINED == 0); /* (really need "UifU" here...) vbits64 UifU= pessim64 (is pessimised by it, iow) */ @@ -1545,8 +1566,13 @@ void mc_STOREVn_slow ( Addr a, SizeT nBits, ULong vbytes, Bool bigendian ) is somewhat similar to some cases extensively commented in MC_(helperc_STOREV8). */ - if (LIKELY(sizeof(void*) == 8 +#if defined (VGABI_N32) + if (LIKELY(sizeof(void*) == 4 + && nBits == 64 && VG_IS_8_ALIGNED(a))) { +#else + if (LIKELY(sizeof(void*) == 8 && nBits == 64 && VG_IS_8_ALIGNED(a))) { +#endif SecMap* sm = get_secmap_for_reading(a); UWord sm_off16 = SM_OFF_16(a); UWord vabits16 = sm->vabits16[sm_off16]; @@ -1567,8 +1593,13 @@ void mc_STOREVn_slow ( Addr a, SizeT nBits, ULong vbytes, Bool bigendian ) } /* else fall into the slow case */ } +#if defined (VGABI_N32) + if (LIKELY(sizeof(void*) == 4 + && nBits == 32 && VG_IS_4_ALIGNED(a))) { +#else if (LIKELY(sizeof(void*) == 8 && nBits == 32 && VG_IS_4_ALIGNED(a))) { +#endif SecMap* sm = get_secmap_for_reading(a); UWord sm_off = SM_OFF(a); UWord vabits8 = sm->vabits8[sm_off]; |
|
From: Petar J. <pe...@so...> - 2018-06-14 17:44:12
|
https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=ac58a6b8578697bdbfdfdcc8d2c70f8f93eef8c0 commit ac58a6b8578697bdbfdfdcc8d2c70f8f93eef8c0 Author: Petar Jovanovic <mip...@gm...> Date: Thu Jun 14 14:00:39 2018 +0000 mips64: use RegWord where appplicable Use RegWord type in mips64. Part of the changes required for MIPS N32 ABI support. BZ issue - #345763. Contributed by: Dimitrije Nikolic, Aleksandar Rikalo and Tamara Vlahovic. Diff: --- coregrind/m_syscall.c | 13 +-- include/pub_tool_basics.h | 4 +- include/valgrind.h | 267 +++++++++++++++++++++++----------------------- 3 files changed, 144 insertions(+), 140 deletions(-) diff --git a/coregrind/m_syscall.c b/coregrind/m_syscall.c index b341054..5948cec 100644 --- a/coregrind/m_syscall.c +++ b/coregrind/m_syscall.c @@ -801,8 +801,9 @@ asm ( ); #elif defined(VGP_mips64_linux) -extern UWord do_syscall_WRK ( UWord a1, UWord a2, UWord a3, UWord a4, UWord a5, - UWord a6, UWord syscall_no, ULong* V1_A3_val ); +extern RegWord do_syscall_WRK ( RegWord a1, RegWord a2, RegWord a3, RegWord a4, + RegWord a5, RegWord a6, RegWord syscall_no, + RegWord* V1_A3_val ); asm ( ".text \n\t" ".globl do_syscall_WRK \n\t" @@ -1031,12 +1032,12 @@ SysRes VG_(do_syscall) ( UWord sysno, RegWord a1, RegWord a2, RegWord a3, return VG_(mk_SysRes_mips32_linux)( valLo, valHi, (ULong)err ); #elif defined(VGP_mips64_linux) - ULong v1_a3[2]; + RegWord v1_a3[2]; v1_a3[0] = 0xFF00; v1_a3[1] = 0xFF00; - ULong V0 = do_syscall_WRK(a1,a2,a3,a4,a5,a6,sysno,v1_a3); - ULong V1 = (ULong)v1_a3[0]; - ULong A3 = (ULong)v1_a3[1]; + RegWord V0 = do_syscall_WRK(a1,a2,a3,a4,a5,a6,sysno,v1_a3); + RegWord V1 = (RegWord)v1_a3[0]; + RegWord A3 = (RegWord)v1_a3[1]; return VG_(mk_SysRes_mips64_linux)( V0, V1, A3 ); # elif defined(VGP_x86_solaris) diff --git a/include/pub_tool_basics.h b/include/pub_tool_basics.h index 7574226..ef0aa74 100644 --- a/include/pub_tool_basics.h +++ b/include/pub_tool_basics.h @@ -197,7 +197,7 @@ typedef void (*Free_Fn_t) ( void* p ); typedef struct { Bool _isError; - UWord _val; + RegWord _val; UWord _valEx; } SysRes; @@ -249,7 +249,7 @@ typedef static inline Bool sr_isError ( SysRes sr ) { return sr._isError; } -static inline UWord sr_Res ( SysRes sr ) { +static inline RegWord sr_Res ( SysRes sr ) { return sr._isError ? 0 : sr._val; } static inline UWord sr_ResEx ( SysRes sr ) { diff --git a/include/valgrind.h b/include/valgrind.h index 5aed0df..07c4f43 100644 --- a/include/valgrind.h +++ b/include/valgrind.h @@ -5687,15 +5687,17 @@ typedef "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ "$25", "$31" -/* These CALL_FN_ macros assume that on mips-linux, sizeof(unsigned - long) == 4. */ +/* These CALL_FN_ macros assume that on mips64-linux, + sizeof(long long) == 8. */ + +#define MIPS64_LONG2REG_CAST(x) ((long long)(long)x) #define CALL_FN_W_v(lval, orig) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[1]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ + volatile unsigned long long _argvec[1]; \ + volatile unsigned long long _res; \ + _argvec[0] = MIPS64_LONG2REG_CAST(_orig.nraddr); \ __asm__ volatile( \ "ld $25, 0(%1)\n\t" /* target->t9 */ \ VALGRIND_CALL_NOREDIR_T9 \ @@ -5704,16 +5706,16 @@ typedef : /*in*/ "0" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) #define CALL_FN_W_W(lval, orig, arg1) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[2]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ - _argvec[1] = (unsigned long)(arg1); \ + volatile unsigned long long _argvec[2]; \ + volatile unsigned long long _res; \ + _argvec[0] = MIPS64_LONG2REG_CAST(_orig.nraddr); \ + _argvec[1] = MIPS64_LONG2REG_CAST(arg1); \ __asm__ volatile( \ "ld $4, 8(%1)\n\t" /* arg1*/ \ "ld $25, 0(%1)\n\t" /* target->t9 */ \ @@ -5723,17 +5725,17 @@ typedef : /*in*/ "r" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) #define CALL_FN_W_WW(lval, orig, arg1,arg2) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[3]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ - _argvec[1] = (unsigned long)(arg1); \ - _argvec[2] = (unsigned long)(arg2); \ + volatile unsigned long long _argvec[3]; \ + volatile unsigned long long _res; \ + _argvec[0] = _orig.nraddr; \ + _argvec[1] = MIPS64_LONG2REG_CAST(arg1); \ + _argvec[2] = MIPS64_LONG2REG_CAST(arg2); \ __asm__ volatile( \ "ld $4, 8(%1)\n\t" \ "ld $5, 16(%1)\n\t" \ @@ -5744,18 +5746,19 @@ typedef : /*in*/ "r" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) + #define CALL_FN_W_WWW(lval, orig, arg1,arg2,arg3) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[4]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ - _argvec[1] = (unsigned long)(arg1); \ - _argvec[2] = (unsigned long)(arg2); \ - _argvec[3] = (unsigned long)(arg3); \ + volatile unsigned long long _argvec[4]; \ + volatile unsigned long long _res; \ + _argvec[0] = _orig.nraddr; \ + _argvec[1] = MIPS64_LONG2REG_CAST(arg1); \ + _argvec[2] = MIPS64_LONG2REG_CAST(arg2); \ + _argvec[3] = MIPS64_LONG2REG_CAST(arg3); \ __asm__ volatile( \ "ld $4, 8(%1)\n\t" \ "ld $5, 16(%1)\n\t" \ @@ -5767,19 +5770,19 @@ typedef : /*in*/ "r" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) #define CALL_FN_W_WWWW(lval, orig, arg1,arg2,arg3,arg4) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[5]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ - _argvec[1] = (unsigned long)(arg1); \ - _argvec[2] = (unsigned long)(arg2); \ - _argvec[3] = (unsigned long)(arg3); \ - _argvec[4] = (unsigned long)(arg4); \ + volatile unsigned long long _argvec[5]; \ + volatile unsigned long long _res; \ + _argvec[0] = MIPS64_LONG2REG_CAST(_orig.nraddr); \ + _argvec[1] = MIPS64_LONG2REG_CAST(arg1); \ + _argvec[2] = MIPS64_LONG2REG_CAST(arg2); \ + _argvec[3] = MIPS64_LONG2REG_CAST(arg3); \ + _argvec[4] = MIPS64_LONG2REG_CAST(arg4); \ __asm__ volatile( \ "ld $4, 8(%1)\n\t" \ "ld $5, 16(%1)\n\t" \ @@ -5792,20 +5795,20 @@ typedef : /*in*/ "r" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) #define CALL_FN_W_5W(lval, orig, arg1,arg2,arg3,arg4,arg5) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[6]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ - _argvec[1] = (unsigned long)(arg1); \ - _argvec[2] = (unsigned long)(arg2); \ - _argvec[3] = (unsigned long)(arg3); \ - _argvec[4] = (unsigned long)(arg4); \ - _argvec[5] = (unsigned long)(arg5); \ + volatile unsigned long long _argvec[6]; \ + volatile unsigned long long _res; \ + _argvec[0] = MIPS64_LONG2REG_CAST(_orig.nraddr); \ + _argvec[1] = MIPS64_LONG2REG_CAST(arg1); \ + _argvec[2] = MIPS64_LONG2REG_CAST(arg2); \ + _argvec[3] = MIPS64_LONG2REG_CAST(arg3); \ + _argvec[4] = MIPS64_LONG2REG_CAST(arg4); \ + _argvec[5] = MIPS64_LONG2REG_CAST(arg5); \ __asm__ volatile( \ "ld $4, 8(%1)\n\t" \ "ld $5, 16(%1)\n\t" \ @@ -5819,21 +5822,21 @@ typedef : /*in*/ "r" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) #define CALL_FN_W_6W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[7]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ - _argvec[1] = (unsigned long)(arg1); \ - _argvec[2] = (unsigned long)(arg2); \ - _argvec[3] = (unsigned long)(arg3); \ - _argvec[4] = (unsigned long)(arg4); \ - _argvec[5] = (unsigned long)(arg5); \ - _argvec[6] = (unsigned long)(arg6); \ + volatile unsigned long long _argvec[7]; \ + volatile unsigned long long _res; \ + _argvec[0] = MIPS64_LONG2REG_CAST(_orig.nraddr); \ + _argvec[1] = MIPS64_LONG2REG_CAST(arg1); \ + _argvec[2] = MIPS64_LONG2REG_CAST(arg2); \ + _argvec[3] = MIPS64_LONG2REG_CAST(arg3); \ + _argvec[4] = MIPS64_LONG2REG_CAST(arg4); \ + _argvec[5] = MIPS64_LONG2REG_CAST(arg5); \ + _argvec[6] = MIPS64_LONG2REG_CAST(arg6); \ __asm__ volatile( \ "ld $4, 8(%1)\n\t" \ "ld $5, 16(%1)\n\t" \ @@ -5848,23 +5851,23 @@ typedef : /*in*/ "r" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) #define CALL_FN_W_7W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \ arg7) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[8]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ - _argvec[1] = (unsigned long)(arg1); \ - _argvec[2] = (unsigned long)(arg2); \ - _argvec[3] = (unsigned long)(arg3); \ - _argvec[4] = (unsigned long)(arg4); \ - _argvec[5] = (unsigned long)(arg5); \ - _argvec[6] = (unsigned long)(arg6); \ - _argvec[7] = (unsigned long)(arg7); \ + volatile unsigned long long _argvec[8]; \ + volatile unsigned long long _res; \ + _argvec[0] = MIPS64_LONG2REG_CAST(_orig.nraddr); \ + _argvec[1] = MIPS64_LONG2REG_CAST(arg1); \ + _argvec[2] = MIPS64_LONG2REG_CAST(arg2); \ + _argvec[3] = MIPS64_LONG2REG_CAST(arg3); \ + _argvec[4] = MIPS64_LONG2REG_CAST(arg4); \ + _argvec[5] = MIPS64_LONG2REG_CAST(arg5); \ + _argvec[6] = MIPS64_LONG2REG_CAST(arg6); \ + _argvec[7] = MIPS64_LONG2REG_CAST(arg7); \ __asm__ volatile( \ "ld $4, 8(%1)\n\t" \ "ld $5, 16(%1)\n\t" \ @@ -5880,24 +5883,24 @@ typedef : /*in*/ "r" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) #define CALL_FN_W_8W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \ arg7,arg8) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[9]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ - _argvec[1] = (unsigned long)(arg1); \ - _argvec[2] = (unsigned long)(arg2); \ - _argvec[3] = (unsigned long)(arg3); \ - _argvec[4] = (unsigned long)(arg4); \ - _argvec[5] = (unsigned long)(arg5); \ - _argvec[6] = (unsigned long)(arg6); \ - _argvec[7] = (unsigned long)(arg7); \ - _argvec[8] = (unsigned long)(arg8); \ + volatile unsigned long long _argvec[9]; \ + volatile unsigned long long _res; \ + _argvec[0] = MIPS64_LONG2REG_CAST(_orig.nraddr); \ + _argvec[1] = MIPS64_LONG2REG_CAST(arg1); \ + _argvec[2] = MIPS64_LONG2REG_CAST(arg2); \ + _argvec[3] = MIPS64_LONG2REG_CAST(arg3); \ + _argvec[4] = MIPS64_LONG2REG_CAST(arg4); \ + _argvec[5] = MIPS64_LONG2REG_CAST(arg5); \ + _argvec[6] = MIPS64_LONG2REG_CAST(arg6); \ + _argvec[7] = MIPS64_LONG2REG_CAST(arg7); \ + _argvec[8] = MIPS64_LONG2REG_CAST(arg8); \ __asm__ volatile( \ "ld $4, 8(%1)\n\t" \ "ld $5, 16(%1)\n\t" \ @@ -5914,25 +5917,25 @@ typedef : /*in*/ "r" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) #define CALL_FN_W_9W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \ arg7,arg8,arg9) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[10]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ - _argvec[1] = (unsigned long)(arg1); \ - _argvec[2] = (unsigned long)(arg2); \ - _argvec[3] = (unsigned long)(arg3); \ - _argvec[4] = (unsigned long)(arg4); \ - _argvec[5] = (unsigned long)(arg5); \ - _argvec[6] = (unsigned long)(arg6); \ - _argvec[7] = (unsigned long)(arg7); \ - _argvec[8] = (unsigned long)(arg8); \ - _argvec[9] = (unsigned long)(arg9); \ + volatile unsigned long long _argvec[10]; \ + volatile unsigned long long _res; \ + _argvec[0] = MIPS64_LONG2REG_CAST(_orig.nraddr); \ + _argvec[1] = MIPS64_LONG2REG_CAST(arg1); \ + _argvec[2] = MIPS64_LONG2REG_CAST(arg2); \ + _argvec[3] = MIPS64_LONG2REG_CAST(arg3); \ + _argvec[4] = MIPS64_LONG2REG_CAST(arg4); \ + _argvec[5] = MIPS64_LONG2REG_CAST(arg5); \ + _argvec[6] = MIPS64_LONG2REG_CAST(arg6); \ + _argvec[7] = MIPS64_LONG2REG_CAST(arg7); \ + _argvec[8] = MIPS64_LONG2REG_CAST(arg8); \ + _argvec[9] = MIPS64_LONG2REG_CAST(arg9); \ __asm__ volatile( \ "dsubu $29, $29, 8\n\t" \ "ld $4, 72(%1)\n\t" \ @@ -5953,26 +5956,26 @@ typedef : /*in*/ "r" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) #define CALL_FN_W_10W(lval, orig, arg1,arg2,arg3,arg4,arg5,arg6, \ arg7,arg8,arg9,arg10) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[11]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ - _argvec[1] = (unsigned long)(arg1); \ - _argvec[2] = (unsigned long)(arg2); \ - _argvec[3] = (unsigned long)(arg3); \ - _argvec[4] = (unsigned long)(arg4); \ - _argvec[5] = (unsigned long)(arg5); \ - _argvec[6] = (unsigned long)(arg6); \ - _argvec[7] = (unsigned long)(arg7); \ - _argvec[8] = (unsigned long)(arg8); \ - _argvec[9] = (unsigned long)(arg9); \ - _argvec[10] = (unsigned long)(arg10); \ + volatile unsigned long long _argvec[11]; \ + volatile unsigned long long _res; \ + _argvec[0] = MIPS64_LONG2REG_CAST(_orig.nraddr); \ + _argvec[1] = MIPS64_LONG2REG_CAST(arg1); \ + _argvec[2] = MIPS64_LONG2REG_CAST(arg2); \ + _argvec[3] = MIPS64_LONG2REG_CAST(arg3); \ + _argvec[4] = MIPS64_LONG2REG_CAST(arg4); \ + _argvec[5] = MIPS64_LONG2REG_CAST(arg5); \ + _argvec[6] = MIPS64_LONG2REG_CAST(arg6); \ + _argvec[7] = MIPS64_LONG2REG_CAST(arg7); \ + _argvec[8] = MIPS64_LONG2REG_CAST(arg8); \ + _argvec[9] = MIPS64_LONG2REG_CAST(arg9); \ + _argvec[10] = MIPS64_LONG2REG_CAST(arg10); \ __asm__ volatile( \ "dsubu $29, $29, 16\n\t" \ "ld $4, 72(%1)\n\t" \ @@ -5995,7 +5998,7 @@ typedef : /*in*/ "r" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) #define CALL_FN_W_11W(lval, orig, arg1,arg2,arg3,arg4,arg5, \ @@ -6003,20 +6006,20 @@ typedef arg11) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[12]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ - _argvec[1] = (unsigned long)(arg1); \ - _argvec[2] = (unsigned long)(arg2); \ - _argvec[3] = (unsigned long)(arg3); \ - _argvec[4] = (unsigned long)(arg4); \ - _argvec[5] = (unsigned long)(arg5); \ - _argvec[6] = (unsigned long)(arg6); \ - _argvec[7] = (unsigned long)(arg7); \ - _argvec[8] = (unsigned long)(arg8); \ - _argvec[9] = (unsigned long)(arg9); \ - _argvec[10] = (unsigned long)(arg10); \ - _argvec[11] = (unsigned long)(arg11); \ + volatile unsigned long long _argvec[12]; \ + volatile unsigned long long _res; \ + _argvec[0] = MIPS64_LONG2REG_CAST(_orig.nraddr); \ + _argvec[1] = MIPS64_LONG2REG_CAST(arg1); \ + _argvec[2] = MIPS64_LONG2REG_CAST(arg2); \ + _argvec[3] = MIPS64_LONG2REG_CAST(arg3); \ + _argvec[4] = MIPS64_LONG2REG_CAST(arg4); \ + _argvec[5] = MIPS64_LONG2REG_CAST(arg5); \ + _argvec[6] = MIPS64_LONG2REG_CAST(arg6); \ + _argvec[7] = MIPS64_LONG2REG_CAST(arg7); \ + _argvec[8] = MIPS64_LONG2REG_CAST(arg8); \ + _argvec[9] = MIPS64_LONG2REG_CAST(arg9); \ + _argvec[10] = MIPS64_LONG2REG_CAST(arg10); \ + _argvec[11] = MIPS64_LONG2REG_CAST(arg11); \ __asm__ volatile( \ "dsubu $29, $29, 24\n\t" \ "ld $4, 72(%1)\n\t" \ @@ -6041,7 +6044,7 @@ typedef : /*in*/ "r" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) #define CALL_FN_W_12W(lval, orig, arg1,arg2,arg3,arg4,arg5, \ @@ -6049,21 +6052,21 @@ typedef arg11,arg12) \ do { \ volatile OrigFn _orig = (orig); \ - volatile unsigned long _argvec[13]; \ - volatile unsigned long _res; \ - _argvec[0] = (unsigned long)_orig.nraddr; \ - _argvec[1] = (unsigned long)(arg1); \ - _argvec[2] = (unsigned long)(arg2); \ - _argvec[3] = (unsigned long)(arg3); \ - _argvec[4] = (unsigned long)(arg4); \ - _argvec[5] = (unsigned long)(arg5); \ - _argvec[6] = (unsigned long)(arg6); \ - _argvec[7] = (unsigned long)(arg7); \ - _argvec[8] = (unsigned long)(arg8); \ - _argvec[9] = (unsigned long)(arg9); \ - _argvec[10] = (unsigned long)(arg10); \ - _argvec[11] = (unsigned long)(arg11); \ - _argvec[12] = (unsigned long)(arg12); \ + volatile unsigned long long _argvec[13]; \ + volatile unsigned long long _res; \ + _argvec[0] = MIPS64_LONG2REG_CAST(_orig.nraddr); \ + _argvec[1] = MIPS64_LONG2REG_CAST(arg1); \ + _argvec[2] = MIPS64_LONG2REG_CAST(arg2); \ + _argvec[3] = MIPS64_LONG2REG_CAST(arg3); \ + _argvec[4] = MIPS64_LONG2REG_CAST(arg4); \ + _argvec[5] = MIPS64_LONG2REG_CAST(arg5); \ + _argvec[6] = MIPS64_LONG2REG_CAST(arg6); \ + _argvec[7] = MIPS64_LONG2REG_CAST(arg7); \ + _argvec[8] = MIPS64_LONG2REG_CAST(arg8); \ + _argvec[9] = MIPS64_LONG2REG_CAST(arg9); \ + _argvec[10] = MIPS64_LONG2REG_CAST(arg10); \ + _argvec[11] = MIPS64_LONG2REG_CAST(arg11); \ + _argvec[12] = MIPS64_LONG2REG_CAST(arg12); \ __asm__ volatile( \ "dsubu $29, $29, 32\n\t" \ "ld $4, 72(%1)\n\t" \ @@ -6090,7 +6093,7 @@ typedef : /*in*/ "r" (&_argvec[0]) \ : /*trash*/ "memory", __CALLER_SAVED_REGS \ ); \ - lval = (__typeof__(lval)) _res; \ + lval = (__typeof__(lval)) (long)_res; \ } while (0) #endif /* PLAT_mips64_linux */ |
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From: Petar J. <pe...@so...> - 2018-06-14 17:44:06
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=8b2fe98aca7568a821c921ba3183f7d62b35a12c commit 8b2fe98aca7568a821c921ba3183f7d62b35a12c Author: Petar Jovanovic <mip...@gm...> Date: Wed Jun 13 16:26:14 2018 +0000 additional use of RegWord Follow up to "Introduce RegWord type" change. Part of the changes required for BZ issue - #345763. Contributed by: Tamara Vlahovic and Dimitrije Nikolic. Diff: --- coregrind/m_aspacemgr/aspacemgr-linux.c | 2 +- coregrind/m_debuginfo/debuginfo.c | 2 +- coregrind/m_libcprint.c | 4 ++-- coregrind/m_syswrap/syswrap-linux.c | 4 ++-- coregrind/m_syswrap/syswrap-main.c | 5 +++-- 5 files changed, 9 insertions(+), 8 deletions(-) diff --git a/coregrind/m_aspacemgr/aspacemgr-linux.c b/coregrind/m_aspacemgr/aspacemgr-linux.c index 32173c6..afc041d 100644 --- a/coregrind/m_aspacemgr/aspacemgr-linux.c +++ b/coregrind/m_aspacemgr/aspacemgr-linux.c @@ -2654,7 +2654,7 @@ SysRes VG_(am_mmap_anon_float_valgrind)( SizeT length ) void* VG_(am_shadow_alloc)(SizeT size) { SysRes sres = VG_(am_mmap_anon_float_valgrind)( size ); - return sr_isError(sres) ? NULL : (void*)sr_Res(sres); + return sr_isError(sres) ? NULL : (void*)(Addr)sr_Res(sres); } /* Map a file at an unconstrained address for V, and update the diff --git a/coregrind/m_debuginfo/debuginfo.c b/coregrind/m_debuginfo/debuginfo.c index c8a6124..b850293 100644 --- a/coregrind/m_debuginfo/debuginfo.c +++ b/coregrind/m_debuginfo/debuginfo.c @@ -1553,7 +1553,7 @@ void VG_(di_notify_pdb_debuginfo)( Int fd_obj, Addr avma_obj, goto out; } - void* pdbimage = (void*)sr_Res(sres); + void* pdbimage = (void*)(Addr)sr_Res(sres); r = VG_(read)( fd_pdbimage, pdbimage, (Int)n_pdbimage ); if (r < 0 || r != (Int)n_pdbimage) { VG_(am_munmap_valgrind)( (Addr)pdbimage, n_pdbimage ); diff --git a/coregrind/m_libcprint.c b/coregrind/m_libcprint.c index 1069d12..92be707 100644 --- a/coregrind/m_libcprint.c +++ b/coregrind/m_libcprint.c @@ -1182,9 +1182,9 @@ const HChar *VG_(sr_as_string) ( SysRes sr ) static HChar buf[7+1+2+16+1+1]; // large enough if (sr_isError(sr)) - VG_(sprintf)(buf, "Failure(0x%lx)", sr_Err(sr)); + VG_(sprintf)(buf, "Failure(0x%" FMT_REGWORD "x)", (RegWord)sr_Err(sr)); else - VG_(sprintf)(buf, "Success(0x%lx)", sr_Res(sr)); + VG_(sprintf)(buf, "Success(0x%" FMT_REGWORD "x)", (RegWord)sr_Res(sr)); return buf; } diff --git a/coregrind/m_syswrap/syswrap-linux.c b/coregrind/m_syswrap/syswrap-linux.c index 5ed732c..1d95489 100644 --- a/coregrind/m_syswrap/syswrap-linux.c +++ b/coregrind/m_syswrap/syswrap-linux.c @@ -770,8 +770,8 @@ static SysRes ML_(do_fork_clone) ( ThreadId tid, UInt flags, VG_(do_atfork_parent)(tid); if (VG_(clo_trace_syscalls)) - VG_(printf)(" clone(fork): process %d created child %lu\n", - VG_(getpid)(), sr_Res(res)); + VG_(printf)(" clone(fork): process %d created child %" FMT_REGWORD "u\n", + VG_(getpid)(), (RegWord)sr_Res(res)); /* restore signal mask */ VG_(sigprocmask)(VKI_SIG_SETMASK, &fork_saved_mask, NULL); diff --git a/coregrind/m_syswrap/syswrap-main.c b/coregrind/m_syswrap/syswrap-main.c index 250ea27..acee5b5 100644 --- a/coregrind/m_syswrap/syswrap-main.c +++ b/coregrind/m_syswrap/syswrap-main.c @@ -2570,12 +2570,13 @@ VG_(fixup_guest_state_after_syscall_interrupted)( ThreadId tid, if (VG_(clo_trace_signals)) VG_(message)( Vg_DebugMsg, "interrupted_syscall: tid=%u, ip=%#lx, " - "restart=%s, sres.isErr=%s, sres.val=%lu\n", + "restart=%s, sres.isErr=%s, sres.val=%" FMT_REGWORD "u\n", tid, ip, restart ? "True" : "False", sr_isError(sres) ? "True" : "False", - sr_isError(sres) ? sr_Err(sres) : sr_Res(sres)); + sr_isError(sres) ? (RegWord)sr_Err(sres) : + (RegWord)sr_Res(sres)); vg_assert(VG_(is_valid_tid)(tid)); vg_assert(tid >= 1 && tid < VG_N_THREADS); |
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From: Petar J. <pe...@so...> - 2018-06-14 17:44:00
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=06546d831d9764300d949f41d9242f667b13536b commit 06546d831d9764300d949f41d9242f667b13536b Author: Petar Jovanovic <mip...@gm...> Date: Wed Jun 13 16:16:52 2018 +0000 mips64: define _VKI_NSIG_BPW based on the size of long Define _VKI_NSIG_BPW in a similar way to how _NSIG_BPW is defined in kernel. This will be important for N32 ABI changes. (BZ #345763) Diff: --- include/vki/vki-mips64-linux.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/vki/vki-mips64-linux.h b/include/vki/vki-mips64-linux.h index 814e523..34ee6f4 100644 --- a/include/vki/vki-mips64-linux.h +++ b/include/vki/vki-mips64-linux.h @@ -115,7 +115,7 @@ typedef __vki_restorefn_t __user *__vki_sigrestore_t; #define VKI_SIG_ERR ((__vki_sighandler_t)-1) /* error return from signal */ #define _VKI_NSIG 128 -#define _VKI_NSIG_BPW 64 +#define _VKI_NSIG_BPW (__SIZEOF_LONG__ * 8) #define _VKI_NSIG_WORDS (_VKI_NSIG / _VKI_NSIG_BPW) typedef unsigned long vki_old_sigset_t; /* at least 32 bits */ |