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From: <sv...@va...> - 2017-03-29 21:59:03
|
Author: iraisr
Date: Wed Mar 29 22:58:56 2017
New Revision: 16289
Log:
Necessary changes in coregrind and Memcheck after introducing ppIRTypeEnvDefd().
Modified:
branches/VALGRIND_JIT_HACKS/coregrind/m_gdbserver/m_gdbserver.c
branches/VALGRIND_JIT_HACKS/coregrind/m_translate.c
branches/VALGRIND_JIT_HACKS/memcheck/mc_translate.c
Modified: branches/VALGRIND_JIT_HACKS/coregrind/m_gdbserver/m_gdbserver.c
==============================================================================
--- branches/VALGRIND_JIT_HACKS/coregrind/m_gdbserver/m_gdbserver.c (original)
+++ branches/VALGRIND_JIT_HACKS/coregrind/m_gdbserver/m_gdbserver.c Wed Mar 29 22:58:56 2017
@@ -1283,7 +1283,7 @@
IRStmtVec* stmts_out = emptyIRStmtVec();
stmts_out->parent = parent;
stmts_out->id = stmts_in->id;
- stmts_out->def_set = deepCopyIRTempDefSet(stmts_in->def_set);
+ stmts_out->defset = deepCopyIRTempDefSet(stmts_in->defset);
for (UInt i = 0; i < stmts_in->stmts_used; i++) {
IRStmt* st = stmts_in->stmts[i];
Modified: branches/VALGRIND_JIT_HACKS/coregrind/m_translate.c
==============================================================================
--- branches/VALGRIND_JIT_HACKS/coregrind/m_translate.c (original)
+++ branches/VALGRIND_JIT_HACKS/coregrind/m_translate.c Wed Mar 29 22:58:56 2017
@@ -293,7 +293,7 @@
IRStmtVec* out = emptyIRStmtVec();
out->parent = parent;
out->id = stmts_in->id;
- out->def_set = deepCopyIRTempDefSet(stmts_in->def_set);
+ out->defset = deepCopyIRTempDefSet(stmts_in->defset);
delta = 0;
Modified: branches/VALGRIND_JIT_HACKS/memcheck/mc_translate.c
==============================================================================
--- branches/VALGRIND_JIT_HACKS/memcheck/mc_translate.c (original)
+++ branches/VALGRIND_JIT_HACKS/memcheck/mc_translate.c Wed Mar 29 22:58:56 2017
@@ -326,7 +326,7 @@
IRStmtVec* stmts_out = emptyIRStmtVec();
stmts_out->parent = (parent_mce != NULL) ? parent_mce->stmts : NULL;
stmts_out->id = stmts_in->id;
- stmts_out->def_set = deepCopyIRTempDefSet(stmts_in->def_set);
+ stmts_out->defset = deepCopyIRTempDefSet(stmts_in->defset);
mce->stmts = stmts_out;
mce->tyenv = tyenv;
@@ -464,7 +464,7 @@
static inline void stmt ( HChar cat, MCEnv* mce, IRStmt* st ) {
if (mce->settings->trace) {
VG_(printf)(" %c: ", cat);
- ppIRStmt(st);
+ ppIRStmt(st, mce->tyenv, 0);
VG_(printf)("\n");
}
addStmtToIRStmtVec(mce->stmts, st);
@@ -6445,7 +6445,7 @@
|| isBogusIRStmtVec(st->Ist.IfThenElse.else_leg);
default:
unhandled:
- ppIRStmt(st);
+ ppIRStmt(st, NULL, 0);
VG_(tool_panic)("isBogusIRStmt");
}
}
@@ -6458,7 +6458,7 @@
Bool bogus = isBogusIRStmt(st);
if (0 && bogus) {
VG_(printf)("bogus: ");
- ppIRStmt(st);
+ ppIRStmt(st, NULL, 0);
VG_(printf)("\n");
}
if (bogus) {
@@ -6480,7 +6480,7 @@
if (mce->settings->trace) {
VG_(printf)("\n");
- ppIRStmt_wrk(st, mce->depth);
+ ppIRStmt(st, mce->tyenv, mce->depth);
VG_(printf)("\n");
}
@@ -6579,7 +6579,7 @@
default:
VG_(printf)("\n");
- ppIRStmt(st);
+ ppIRStmt(st, mce->tyenv, 0);
VG_(printf)("\n");
VG_(tool_panic)("memcheck: unhandled IRStmt");
@@ -6587,7 +6587,7 @@
if (0 && mce->settings->trace) {
for (UInt j = first_stmt; j < mce->stmts->stmts_used; j++) {
- ppIRStmt_wrk(mce->stmts->stmts[j], mce->depth + 1);
+ ppIRStmt(mce->stmts->stmts[j], mce->tyenv, mce->depth + 1);
VG_(printf)("\n");
}
VG_(printf)("\n");
@@ -6745,7 +6745,7 @@
if (0 && verboze) {
for (UInt j = first_stmt; j < sb_out->stmts->stmts_used; j++) {
- ppIRStmt_wrk(sb_out->stmts->stmts[j], 1);
+ ppIRStmt(sb_out->stmts->stmts[j], sb_out->tyenv, 1);
VG_(printf)("\n");
}
VG_(printf)("\n");
@@ -7772,7 +7772,7 @@
default:
VG_(printf)("mc_translate.c: schemeS: unhandled: ");
- ppIRStmt(st);
+ ppIRStmt(st, mce->tyenv, 0);
VG_(tool_panic)("memcheck:schemeS");
}
}
|
|
From: Ivo R. <iv...@iv...> - 2017-03-29 21:29:41
|
2017-03-29 18:21 GMT+02:00 Julian Seward <js...@ac...>: > On 29/03/17 17:54, Mineeva, Tatyana A wrote: >> Our team cannot access the Valgrind Subversion repository: >> $ svn co svn://svn.valgrind.org/valgrind/trunk valgrind >> svn: Can't connect to host 'svn.valgrind.org': Connection timed out >> Is the this repository functional, or should we switch to the git repository? > > The SVN repo works fine. I've been using it this afternoon and committed > to it just a few minutes ago. So as Eliot says, this is probably a > corporate firewall problem. Such things have happened before. Indeed, corporate proxy problem. Unfortunately svn.valgrind.org does not offer access via http:// (which would allow to specify http proxy at hand). So in our corporate settings, I ended up with a horrible hack using 'socat' tunneling. I can share details if you are interested. >> We do not currently have success cloning the Valgrind git repository: >> $ git clone git://sourceware.org/git/valgrind.git >> Cloning into 'valgrind'... >> fatal: unable to connect to sourceware.org: >> sourceware.org[0: 209.132.180.131]: errno=Connection timed out > > I don't know. Ivo might know more. Ivo? Two commets here: 1) valgrind.git at sourceware.org is still unofficial, testing repo. And it will remain so until migration from SVN to GIT happens, which is bound after 3.13 release is done. 2) Again, your corporate firewall is blocking access here. I. |
Author: iraisr
Date: Wed Mar 29 22:10:43 2017
New Revision: 3338
Log:
Introduce new function ppIRTypeEnvDefd() which pretty prints IRTemp's
defined within an IRStmtVec using type information from IRTypeEnv.
Basically combines ppIRTypeEnv() and ppIRTempDefSet().
Modified:
branches/VEX_JIT_HACKS/priv/guest_generic_bb_to_IR.c
branches/VEX_JIT_HACKS/priv/guest_x86_toIR.c
branches/VEX_JIT_HACKS/priv/host_x86_isel.c
branches/VEX_JIT_HACKS/priv/ir_defs.c
branches/VEX_JIT_HACKS/priv/ir_inject.c
branches/VEX_JIT_HACKS/priv/ir_opt.c
branches/VEX_JIT_HACKS/pub/libvex_ir.h
branches/VEX_JIT_HACKS/useful/test_main.c
Modified: branches/VEX_JIT_HACKS/priv/guest_generic_bb_to_IR.c
==============================================================================
--- branches/VEX_JIT_HACKS/priv/guest_generic_bb_to_IR.c (original)
+++ branches/VEX_JIT_HACKS/priv/guest_generic_bb_to_IR.c Wed Mar 29 22:10:43 2017
@@ -394,7 +394,7 @@
/* Print the resulting IR, if needed. */
if (debug_print) {
for (i = first_stmt_idx; i < irsb->stmts->stmts_used; i++) {
- ppIRStmt_wrk(irsb->stmts->stmts[i], 3);
+ ppIRStmt(irsb->stmts->stmts[i], irsb->tyenv, 3);
vex_printf("\n");
}
}
Modified: branches/VEX_JIT_HACKS/priv/guest_x86_toIR.c
==============================================================================
--- branches/VEX_JIT_HACKS/priv/guest_x86_toIR.c (original)
+++ branches/VEX_JIT_HACKS/priv/guest_x86_toIR.c Wed Mar 29 22:10:43 2017
@@ -15475,7 +15475,7 @@
callback_opaque,
delta, archinfo, abiinfo, sigill_diag_IN );
for (i = x1; i < x2; i++) {
- ppIRStmt_wrk(irsb_IN->stmts->stmts[i], 4);
+ ppIRStmt(irsb_IN->stmts->stmts[i], irsb_IN->tyenv, 4);
vex_printf("\n");
}
/* Failure of this assertion is serious and denotes a bug in
Modified: branches/VEX_JIT_HACKS/priv/host_x86_isel.c
==============================================================================
--- branches/VEX_JIT_HACKS/priv/host_x86_isel.c (original)
+++ branches/VEX_JIT_HACKS/priv/host_x86_isel.c Wed Mar 29 22:10:43 2017
@@ -3864,7 +3864,7 @@
{
if (vex_traceflags & VEX_TRACE_VCODE) {
vex_printf("\n-- ");
- ppIRStmt(stmt);
+ ppIRStmt(stmt, env->type_env, 0);
vex_printf("\n");
}
@@ -4310,7 +4310,7 @@
default: break;
}
stmt_fail:
- ppIRStmt(stmt);
+ ppIRStmt(stmt, env->type_env, 0);
vpanic("iselStmt");
}
Modified: branches/VEX_JIT_HACKS/priv/ir_defs.c
==============================================================================
--- branches/VEX_JIT_HACKS/priv/ir_defs.c (original)
+++ branches/VEX_JIT_HACKS/priv/ir_defs.c Wed Mar 29 22:10:43 2017
@@ -1585,7 +1585,7 @@
}
}
-static void ppIRPhiVec_wrk(const IRPhiVec* phis, UInt depth)
+void ppIRPhiVec(const IRPhiVec* phis, UInt depth)
{
for (UInt i = 0; i < phis->phis_used; i++) {
print_depth(depth);
@@ -1594,45 +1594,12 @@
}
}
-void ppIRPhiVec(const IRPhiVec* phis)
+void ppIRTempDefSet(const IRTempDefSet* defset, UInt depth)
{
- ppIRPhiVec_wrk(phis, 0);
+ ppIRTypeEnvDefd(NULL, defset, depth);
}
-static void ppIRTempDefSet_wrk(const IRTempDefSet* defd, UInt depth)
-{
- UInt tmps_printed = 0;
-
- for (UInt slot = 0; slot < defd->slots_used; slot++) {
- UChar slot_value = defd->set[slot];
- for (UInt bit = 0; bit < sizeof(UChar); bit++) {
- if (slot_value & (1 << bit)) {
- if (tmps_printed % 8 == 0)
- print_depth(depth);
-
- IRTemp tmp = slot * sizeof(UChar) + bit;
- ppIRTemp(tmp);
-
- if (tmps_printed % 8 == 7)
- vex_printf("\n");
- else
- vex_printf(" ");
-
- tmps_printed += 1;
- }
- }
- }
-
- if (tmps_printed > 0 && tmps_printed % 8 != 7)
- vex_printf("\n");
-}
-
-void ppIRTempDefSet(const IRTempDefSet* defd)
-{
- ppIRTempDefSet_wrk(defd, 0);
-}
-
-void ppIRStmt_wrk(const IRStmt* s, UInt depth)
+void ppIRStmt(const IRStmt* s, const IRTypeEnv* tyenv, UInt depth)
{
print_depth(depth);
@@ -1720,24 +1687,19 @@
vex_printf("if (");
ppIRExpr(s->Ist.IfThenElse.cond);
vex_printf(") then {\n");
- ppIRStmtVec_wrk(s->Ist.IfThenElse.then_leg, depth + 1);
+ ppIRStmtVec(s->Ist.IfThenElse.then_leg, tyenv, depth + 1);
print_depth(depth);
vex_printf("} else {\n");
- ppIRStmtVec_wrk(s->Ist.IfThenElse.else_leg, depth + 1);
+ ppIRStmtVec(s->Ist.IfThenElse.else_leg, tyenv, depth + 1);
print_depth(depth);
vex_printf("}\n");
- ppIRPhiVec_wrk(s->Ist.IfThenElse.phi_nodes, depth);
+ ppIRPhiVec(s->Ist.IfThenElse.phi_nodes, depth);
break;
default:
vpanic("ppIRStmt");
}
}
-void ppIRStmt(const IRStmt* s)
-{
- ppIRStmt_wrk(s, 0);
-}
-
void ppIRTypeEnv(const IRTypeEnv* env)
{
for (UInt i = 0; i < env->used; i++) {
@@ -1755,19 +1717,47 @@
vex_printf( "\n");
}
-void ppIRStmtVec_wrk(const IRStmtVec* stmts, UInt depth)
+void ppIRTypeEnvDefd(const IRTypeEnv* tyenv, const IRTempDefSet* defset,
+ UInt depth)
{
- ppIRTempDefSet_wrk(stmts->def_set, depth);
- vex_printf("\n");
- for (UInt i = 0; i < stmts->stmts_used; i++) {
- ppIRStmt_wrk(stmts->stmts[i], depth);
- vex_printf("\n");
+ UInt tmps_printed = 0;
+
+ for (UInt slot = 0; slot < defset->slots_used; slot++) {
+ UChar slot_value = defset->set[slot];
+ for (UInt bit = 0; bit < sizeof(UChar); bit++) {
+ if (slot_value & (1 << bit)) {
+ if (tmps_printed % 8 == 0)
+ print_depth(depth);
+
+ IRTemp tmp = slot * sizeof(UChar) + bit;
+ ppIRTemp(tmp);
+ if (tyenv != NULL) {
+ vex_printf("=");
+ ppIRType(tyenv->types[tmp]);
+ }
+
+ if (tmps_printed % 8 == 7)
+ vex_printf("\n");
+ else
+ vex_printf(" ");
+
+ tmps_printed += 1;
+ }
+ }
}
+
+ if (tmps_printed > 0 && tmps_printed % 8 != 7)
+ vex_printf("\n");
}
-void ppIRStmtVec(const IRStmtVec* stmts)
+void ppIRStmtVec(const IRStmtVec* stmts, const IRTypeEnv* tyenv, UInt depth)
{
- ppIRStmtVec_wrk(stmts, 0);
+ ppIRTypeEnvDefd(tyenv, stmts->defset, depth);
+ vex_printf("\n");
+ for (UInt i = 0; i < stmts->stmts_used; i++) {
+ ppIRStmt(stmts->stmts[i], tyenv, depth);
+ vex_printf("\n");
+ }
}
void ppIRSB ( const IRSB* bb )
@@ -1775,8 +1765,7 @@
UInt depth = 0;
vex_printf("IRSB {\n");
- ppIRTypeEnv(bb->tyenv);
- ppIRStmtVec_wrk(bb->stmts, depth + 1);
+ ppIRStmtVec(bb->stmts, bb->tyenv, depth + 1);
print_depth(depth + 1);
vex_printf("PUT(%d) = ", bb->offsIP);
ppIRExpr( bb->next );
@@ -2247,8 +2236,8 @@
IRTempDefSet* emptyIRTempDefSet(void)
{
IRTempDefSet* defset = LibVEX_Alloc_inline(sizeof(IRTempDefSet));
- defset->slots_used = 0;
- defset->slots_size = 8 / sizeof(UChar);
+ defset->slots_used = 0;
+ defset->slots_size = 8 / sizeof(UChar);
vassert(defset->slots_size >= 1);
defset->set = LibVEX_Alloc_inline(defset->slots_size * sizeof(UChar));
return defset;
@@ -2398,7 +2387,7 @@
stmts->stmts = LibVEX_Alloc_inline(stmts->stmts_size * sizeof(IRStmt*));
stmts->id = IRStmtVecID_INVALID;
stmts->parent = NULL;
- stmts->def_set = emptyIRTempDefSet();
+ stmts->defset = emptyIRTempDefSet();
return stmts;
}
@@ -2613,16 +2602,16 @@
return vec2;
}
-IRTempDefSet* deepCopyIRTempDefSet(const IRTempDefSet* def_set)
+IRTempDefSet* deepCopyIRTempDefSet(const IRTempDefSet* defset)
{
- IRTempDefSet* def_set2 = LibVEX_Alloc_inline(sizeof(IRTempDefSet));
- def_set2->slots_used = def_set2->slots_size = def_set->slots_used;
- UChar* set2 = LibVEX_Alloc_inline(def_set2->slots_used * sizeof(UChar));
- for (UInt i = 0; i < def_set2->slots_used; i++) {
- set2[i] = def_set->set[i];
+ IRTempDefSet* defset2 = LibVEX_Alloc_inline(sizeof(IRTempDefSet));
+ defset2->slots_used = defset2->slots_size = defset->slots_used;
+ UChar* set2 = LibVEX_Alloc_inline(defset2->slots_used * sizeof(UChar));
+ for (UInt i = 0; i < defset2->slots_used; i++) {
+ set2[i] = defset->set[i];
}
- def_set2->set = set2;
- return def_set2;
+ defset2->set = set2;
+ return defset2;
}
IRStmt* deepCopyIRStmt(const IRStmt* s, IRStmtVec* parent)
@@ -2697,7 +2686,7 @@
IRStmtVec* vec2 = LibVEX_Alloc_inline(sizeof(IRStmtVec));
vec2->id = src->id;
vec2->parent = parent;
- vec2->def_set = deepCopyIRTempDefSet(src->def_set);
+ vec2->defset = deepCopyIRTempDefSet(src->defset);
vec2->stmts_used = vec2->stmts_size = src->stmts_used;
IRStmt **stmts2 = LibVEX_Alloc_inline(vec2->stmts_used * sizeof(IRStmt*));
for (UInt i = 0; i < vec2->stmts_used; i++) {
@@ -3772,38 +3761,38 @@
/*--- Helper functions for the IR -- IR Temp Defined Set ---*/
/*---------------------------------------------------------------*/
-void setIRTempDefined(IRTempDefSet* def_set, IRTemp tmp)
+void setIRTempDefined(IRTempDefSet* defset, IRTemp tmp)
{
UInt slots_required = (tmp + sizeof(UChar)) / sizeof(UChar);
- if (slots_required >= def_set->slots_size) {
- UInt new_size = (slots_required > 2 * def_set->slots_size) ?
- slots_required : 2 * def_set->slots_size;
+ if (slots_required >= defset->slots_size) {
+ UInt new_size = (slots_required > 2 * defset->slots_size) ?
+ slots_required : 2 * defset->slots_size;
UChar* new_set = LibVEX_Alloc_inline(new_size * sizeof(UChar));
- for (UInt i = 0; i < def_set->slots_used; i++) {
- new_set[i] = def_set->set[i];
+ for (UInt i = 0; i < defset->slots_used; i++) {
+ new_set[i] = defset->set[i];
}
- def_set->set = new_set;
- def_set->slots_size = new_size;
+ defset->set = new_set;
+ defset->slots_size = new_size;
}
- if (slots_required > def_set->slots_used) {
- for (UInt i = def_set->slots_used; i < slots_required; i++) {
- def_set->set[i] = 0;
+ if (slots_required > defset->slots_used) {
+ for (UInt i = defset->slots_used; i < slots_required; i++) {
+ defset->set[i] = 0;
}
- def_set->slots_used = slots_required;
+ defset->slots_used = slots_required;
}
- vassert(!isIRTempDefined(def_set, tmp));
+ vassert(!isIRTempDefined(defset, tmp));
UInt mask = (1 << (tmp % sizeof(UChar)));
- def_set->set[tmp / sizeof(UChar)] |= mask;
+ defset->set[tmp / sizeof(UChar)] |= mask;
}
-void clearIRTempDefSet(IRTempDefSet* def_set)
+void clearIRTempDefSet(IRTempDefSet* defset)
{
- for (UInt i = 0; i < def_set->slots_used; i++) {
- def_set->set[i] = 0;
+ for (UInt i = 0; i < defset->slots_used; i++) {
+ defset->set[i] = 0;
}
}
@@ -3883,7 +3872,7 @@
env->used += 1;
env->types[tmp] = ty;
env->ids[tmp] = stmts->id;
- setIRTempDefined(stmts->def_set, tmp);
+ setIRTempDefined(stmts->defset, tmp);
return tmp;
}
@@ -4186,7 +4175,7 @@
ppIRSB(bb);
if (stmt) {
vex_printf("\nIN STATEMENT:\n\n");
- ppIRStmt_wrk(stmt, 1);
+ ppIRStmt(stmt, bb->tyenv, 1);
}
vex_printf("\n\nERROR = %s\n\n", what );
vpanic("sanityCheckFail: exiting due to bad IR");
@@ -4245,7 +4234,7 @@
IRStmtVecID id = tyenv->ids[tmp];
vassert(id != IRStmtVecID_INVALID);
- while (!(isIRTempDefined(stmts->def_set, tmp))) {
+ while (!(isIRTempDefined(stmts->defset, tmp))) {
stmts = stmts->parent;
if (stmts == NULL)
return False;
Modified: branches/VEX_JIT_HACKS/priv/ir_inject.c
==============================================================================
--- branches/VEX_JIT_HACKS/priv/ir_inject.c (original)
+++ branches/VEX_JIT_HACKS/priv/ir_inject.c Wed Mar 29 22:10:43 2017
@@ -310,11 +310,14 @@
if (0) {
vex_printf("BEGIN inject\n");
if (iricb.t_result == Ity_I1 || sizeofIRType(iricb.t_result) <= 8) {
- ppIRStmt(irsb->stmts->stmts[irsb->stmts->stmts_used - 1]);
+ ppIRStmt(irsb->stmts->stmts[irsb->stmts->stmts_used - 1],
+ irsb->tyenv, 0);
} else if (sizeofIRType(iricb.t_result) == 16) {
- ppIRStmt(irsb->stmts->stmts[irsb->stmts->stmts_used - 2]);
+ ppIRStmt(irsb->stmts->stmts[irsb->stmts->stmts_used - 2],
+ irsb->tyenv, 0);
vex_printf("\n");
- ppIRStmt(irsb->stmts->stmts[irsb->stmts->stmts_used - 1]);
+ ppIRStmt(irsb->stmts->stmts[irsb->stmts->stmts_used - 1],
+ irsb->tyenv, 0);
}
vex_printf("\nEND inject\n");
}
Modified: branches/VEX_JIT_HACKS/priv/ir_opt.c
==============================================================================
--- branches/VEX_JIT_HACKS/priv/ir_opt.c (original)
+++ branches/VEX_JIT_HACKS/priv/ir_opt.c Wed Mar 29 22:10:43 2017
@@ -520,7 +520,7 @@
break;
default:
vex_printf("\n");
- ppIRStmt(st);
+ ppIRStmt(st, tyenv, 0);
vex_printf("\n");
vpanic("flatten_Stmt");
}
@@ -532,7 +532,7 @@
IRStmtVec* out = emptyIRStmtVec();
out->parent = parent;
out->id = in->id;
- out->def_set = deepCopyIRTempDefSet(in->def_set);
+ out->defset = deepCopyIRTempDefSet(in->defset);
for (UInt i = 0; i < in->stmts_used; i++) {
flatten_Stmt(tyenv, out, in->stmts[i], out);
}
@@ -852,7 +852,7 @@
default:
vex_printf("\n");
- ppIRStmt(st);
+ ppIRStmt(st, NULL, 0);
vex_printf("\n");
vpanic("handle_gets_Stmt");
}
@@ -988,7 +988,7 @@
/* This Put is redundant because a later one will overwrite
it. So NULL (nop) it out. */
if (DEBUG_IROPT) {
- vex_printf("rPUT: "); ppIRStmt(st);
+ vex_printf("rPUT: "); ppIRStmt(st, tyenv, 0);
vex_printf("\n");
}
stmts->stmts[i] = IRStmt_NoOp();
@@ -1095,7 +1095,7 @@
IRStmtVec* stmts_out = emptyIRStmtVec();
stmts_out->id = stmts_in->id;
stmts_out->parent = (parent_env != NULL) ? parent_env->stmts : NULL;
- stmts_out->def_set = deepCopyIRTempDefSet(stmts_in->def_set);
+ stmts_out->defset = deepCopyIRTempDefSet(stmts_in->defset);
SubstEnv* env = LibVEX_Alloc_inline(sizeof(SubstEnv));
env->tyenv = tyenv;
@@ -2639,7 +2639,7 @@
{
# if 0
vex_printf("\nsubst and fold stmt\n");
- ppIRStmt(st);
+ ppIRStmt(st, env->tyenv, 0);
vex_printf("\n");
# endif
@@ -2862,7 +2862,7 @@
/* TODO-JIT: Pull the only remaining leg into the current IRStmtVec.
Here is what needs to be done:
1. Rewrite ID of all IRTemp's (in tyenv->ids) defined in the
- pulled leg. These are tracked in leg's def_set.
+ pulled leg. These are tracked in leg's defset.
2. Insert all statements from the leg in the env->stmts_out
at the current position. */
vpanic("IfThenElse leg lifting unimplemented");
@@ -2883,7 +2883,7 @@
}
default:
- vex_printf("\n"); ppIRStmt(st);
+ vex_printf("\n"); ppIRStmt(st, env->tyenv, 0);
vpanic("subst_and_fold_Stmt");
}
}
@@ -3208,7 +3208,7 @@
}
default:
vex_printf("\n");
- ppIRStmt(st);
+ ppIRStmt(st, NULL, 0);
vpanic("addUses_Stmt");
}
}
@@ -3262,7 +3262,7 @@
/* it's an IRTemp which never got used. Delete it. */
if (DEBUG_IROPT) {
vex_printf("DEAD: ");
- ppIRStmt(st);
+ ppIRStmt(st, NULL, 0);
vex_printf("\n");
}
stmts->stmts[i] = IRStmt_NoOp();
@@ -4298,7 +4298,7 @@
if (collapseChain(stmts, i - 1, var, &var2, &con2)) {
if (DEBUG_IROPT) {
vex_printf("replacing1 ");
- ppIRStmt(st);
+ ppIRStmt(st, NULL, 0);
vex_printf(" with ");
}
con2 += con;
@@ -4314,7 +4314,7 @@
IRExpr_Const(IRConst_U32(-con2)))
);
if (DEBUG_IROPT) {
- ppIRStmt(stmts->stmts[i]);
+ ppIRStmt(stmts->stmts[i], NULL, 0);
vex_printf("\n");
}
}
@@ -4331,7 +4331,7 @@
->Iex.RdTmp.tmp, &var2, &con2)) {
if (DEBUG_IROPT) {
vex_printf("replacing3 ");
- ppIRStmt(st);
+ ppIRStmt(st, NULL, 0);
vex_printf(" with ");
}
con2 += st->Ist.WrTmp.data->Iex.GetI.bias;
@@ -4342,7 +4342,7 @@
IRExpr_RdTmp(var2),
con2));
if (DEBUG_IROPT) {
- ppIRStmt(stmts->stmts[i]);
+ ppIRStmt(stmts->stmts[i], NULL, 0);
vex_printf("\n");
}
continue;
@@ -4356,7 +4356,7 @@
&var2, &con2)) {
if (DEBUG_IROPT) {
vex_printf("replacing2 ");
- ppIRStmt(st);
+ ppIRStmt(st, NULL, 0);
vex_printf(" with ");
}
con2 += puti->bias;
@@ -4366,7 +4366,7 @@
con2,
puti->data));
if (DEBUG_IROPT) {
- ppIRStmt(stmts->stmts[i]);
+ ppIRStmt(stmts->stmts[i], NULL, 0);
vex_printf("\n");
}
continue;
@@ -4600,7 +4600,7 @@
return False;
default:
- vex_printf("\n"); ppIRStmt(s2); vex_printf("\n");
+ vex_printf("\n"); ppIRStmt(s2, tyenv, 0); vex_printf("\n");
vpanic("guestAccessWhichMightOverlapPutI");
}
@@ -4714,7 +4714,7 @@
if (delete) {
if (DEBUG_IROPT) {
vex_printf("rPI: ");
- ppIRStmt(st);
+ ppIRStmt(st, tyenv, 0);
vex_printf("\n");
}
stmts->stmts[i] = IRStmt_NoOp();
@@ -4784,9 +4784,9 @@
{
*tmp += delta;
- /* Adjust IRTemp's ID and also def_set of the current IRStmtVec. */
+ /* Adjust IRTemp's ID and also defset of the current IRStmtVec. */
tyenv->ids[*tmp] = stmts->id;
- setIRTempDefined(stmts->def_set, *tmp);
+ setIRTempDefined(stmts->defset, *tmp);
}
static void deltaIRStmtVec(IRTypeEnv* tyenv, IRStmtVec* stmts,
@@ -4889,7 +4889,7 @@
break;
}
default:
- vex_printf("\n"); ppIRStmt(st); vex_printf("\n");
+ vex_printf("\n"); ppIRStmt(st, tyenv, 0); vex_printf("\n");
vpanic("deltaIRStmt");
}
}
@@ -4898,9 +4898,9 @@
static void deltaIRStmtVec(IRTypeEnv* tyenv, IRStmtVec* stmts,
UInt delta_tmp, UInt delta_id, IRStmtVec* parent)
{
- /* Clear the def_set now. It still points to original IRTemp's however
+ /* Clear the defset now. It still points to original IRTemp's however
we are now moving to another set of IRTemp's shifted by 'delta'. */
- clearIRTempDefSet(stmts->def_set);
+ clearIRTempDefSet(stmts->defset);
stmts->id += delta_id;
stmts->parent = parent;
@@ -5118,7 +5118,7 @@
nested IRStmtVec's. This can be achieved here. But we also need to keep
track in which IRStmtVec each IRTemp is defined and that can be set
only during traversal. So we do only types here and deal with IDs and
- def_set during statement traversal. */
+ defset during statement traversal. */
ensureSpaceInIRTypeEnv(bb1->tyenv, bb1->tyenv->used + n_vars);
for (i = 0; i < n_vars; i++) {
bb1->tyenv->types[n_vars + i] = bb2->tyenv->types[i];
@@ -5466,7 +5466,7 @@
return;
}
default:
- vex_printf("\n"); ppIRStmt(st); vex_printf("\n");
+ vex_printf("\n"); ppIRStmt(st, NULL, 0); vex_printf("\n");
vpanic("aoccCount_Stmt");
}
}
@@ -5852,7 +5852,7 @@
vpanic("TODO-JIT: what to do?");
break;
default:
- vex_printf("\n"); ppIRStmt(st); vex_printf("\n");
+ vex_printf("\n"); ppIRStmt(st, NULL, 0); vex_printf("\n");
vpanic("atbSubst_Stmt");
}
}
@@ -6640,7 +6640,7 @@
st->Ist.IfThenElse.else_leg);
break;
default:
- vex_printf("\n"); ppIRStmt(st);
+ vex_printf("\n"); ppIRStmt(st, tyenv, 0);
vpanic("do_XOR_TRANSFORMS_IRStmtVec");
}
}
@@ -6684,7 +6684,7 @@
/*--- iropt main ---*/
/*---------------------------------------------------------------*/
-static Bool iropt_verbose = False; /* True; */
+static Bool iropt_verbose = True; /* True; */
/* Do a simple cleanup pass on bb. This is: redundant Get removal,
@@ -6856,9 +6856,10 @@
tyenv, st->Ist.IfThenElse.then_leg);
considerExpensives_IRStmtVec(hasGetIorPutI, hasVorFtemps,
tyenv, st->Ist.IfThenElse.else_leg);
+ break;
default:
bad:
- ppIRStmt(st);
+ ppIRStmt(st, tyenv, 0);
vpanic("considerExpensives_IRStmtVec");
}
}
Modified: branches/VEX_JIT_HACKS/pub/libvex_ir.h
==============================================================================
--- branches/VEX_JIT_HACKS/pub/libvex_ir.h (original)
+++ branches/VEX_JIT_HACKS/pub/libvex_ir.h Wed Mar 29 22:10:43 2017
@@ -2728,7 +2728,7 @@
extern void ppIRPhi(const IRPhi*);
extern IRPhi* mkIRPhi(IRTemp dst, IRTemp srcThen, IRTemp srcElse);
extern IRPhi* deepCopyIRPhi(const IRPhi*);
-extern void ppIRPhiVec(const IRPhiVec*);
+extern void ppIRPhiVec(const IRPhiVec*, UInt depth);
extern IRPhiVec* emptyIRPhiVec(void);
extern IRPhiVec* deepCopyIRPhiVec(const IRPhiVec*);
@@ -2762,20 +2762,20 @@
}
IRTempDefSet;
-static inline Bool isIRTempDefined(const IRTempDefSet* def_set, IRTemp tmp)
+static inline Bool isIRTempDefined(const IRTempDefSet* defset, IRTemp tmp)
{
- if (tmp / sizeof(UChar) < def_set->slots_size) {
+ if (tmp / sizeof(UChar) < defset->slots_size) {
UInt mask = (1 << (tmp % sizeof(UChar)));
- return toBool(def_set->set[tmp / sizeof(UChar)] & mask);
+ return toBool(defset->set[tmp / sizeof(UChar)] & mask);
}
return False;
}
-extern void setIRTempDefined(IRTempDefSet* def_set, IRTemp tmp);
-extern void clearIRTempDefSet(IRTempDefSet* def_set);
-extern void ppIRTempDefSet(const IRTempDefSet* def_set);
+extern void setIRTempDefined(IRTempDefSet* defset, IRTemp tmp);
+extern void clearIRTempDefSet(IRTempDefSet* defset);
+extern void ppIRTempDefSet(const IRTempDefSet* defset, UInt depth);
extern IRTempDefSet* emptyIRTempDefSet(void);
-extern IRTempDefSet* deepCopyIRTempDefSet(const IRTempDefSet* def_set);
+extern IRTempDefSet* deepCopyIRTempDefSet(const IRTempDefSet* defset);
/* ------------------ Statements ------------------ */
@@ -2784,6 +2784,10 @@
struct _IRStmt
IRStmt;
+typedef
+ struct _IRTypeEnv
+ IRTypeEnv;
+
/* Uniquely identifies IRStmtVec in an IRSB, no matter how deeply nested. */
typedef UShort IRStmtVecID;
@@ -2804,12 +2808,14 @@
UInt stmts_used;
IRStmtVecID id;
struct _IRStmtVec* parent;
- IRTempDefSet* def_set;
+ IRTempDefSet* defset;
}
IRStmtVec;
-extern void ppIRStmtVec(const IRStmtVec*);
-extern void ppIRStmtVec_wrk(const IRStmtVec*, UInt depth);
+/* Pretty-prints a vector of statements. If 'tyenv' is not NULL, pretty-prints
+ IRStmtVec's defset using nicer ppIRTypeEnvDefd(). */
+extern void ppIRStmtVec(const IRStmtVec* stmts, const IRTypeEnv* tyenv,
+ UInt depth);
/* Allocates an empty IRStmtVec with an invalid IRStmtVecID.
Such an IRStmtVec needs to have a valid IRStmtVecID - get it from
@@ -3142,9 +3148,9 @@
Parent is required for "if-then-else" statements. */
extern IRStmt* deepCopyIRStmt(const IRStmt* src, IRStmtVec* parent);
-/* Pretty-print an IRStmt. */
-extern void ppIRStmt ( const IRStmt* );
-extern void ppIRStmt_wrk(const IRStmt*, UInt depth);
+/* Pretty-prints an IRStmt. 'tyenv' is eventually used for pretty-printing
+ nested IRStmtVec's and can be NULL. */
+extern void ppIRStmt(const IRStmt* stmt, const IRTypeEnv* tyenv, UInt depth);
/* ------------------ Basic Blocks ------------------ */
@@ -3156,26 +3162,30 @@
- 'types' which gives IRTemp's type
- 'ids' which gives ID of the defining IRStmtVec
*/
-
-typedef
- struct {
- IRType* types;
- IRStmtVecID* ids;
- UInt size;
- UInt used;
- }
- IRTypeEnv;
+struct _IRTypeEnv {
+ IRType* types;
+ IRStmtVecID* ids;
+ UInt size;
+ UInt used;
+};
/* Obtain a new IRTemp. New IRTemp is allocated from 'tyenv' and is marked
- as defined in 'stmts'->def_set. */
+ as defined in 'stmts'->defset. */
extern IRTemp newIRTemp(IRTypeEnv* tyenv, IRStmtVec* stmts, IRType);
/* Deep-copy a type environment */
extern IRTypeEnv* deepCopyIRTypeEnv ( const IRTypeEnv* );
-/* Pretty-print a type environment */
+/* Pretty-print a type environment. Use ppIRTypeEnvDefd() if possible which
+ combines also information from an IRTempDefSet to print only IRTemp's which
+ are defined in a given IRStmtVec. */
extern void ppIRTypeEnv ( const IRTypeEnv* );
+/* Much like ppIRTypeEnv() but prints only IRTemp's which are defined in a given
+ IRStmtVec. */
+extern void ppIRTypeEnvDefd(const IRTypeEnv* tyenv, const IRTempDefSet* defset,
+ UInt depth);
+
/* Ensures that this IRTypeEnv can hold at least new_size types and ids.
Useful for certain bulk transformations. */
extern void ensureSpaceInIRTypeEnv(IRTypeEnv*, UInt new_size);
Modified: branches/VEX_JIT_HACKS/useful/test_main.c
==============================================================================
--- branches/VEX_JIT_HACKS/useful/test_main.c (original)
+++ branches/VEX_JIT_HACKS/useful/test_main.c Wed Mar 29 22:10:43 2017
@@ -2605,7 +2605,7 @@
return isBogusAtom(st->Ist.Exit.guard);
default:
unhandled:
- ppIRStmt(st);
+ ppIRStmt(st, NULL, 0);
VG_(tool_panic)("hasBogusLiterals");
}
}
@@ -2659,7 +2659,7 @@
UInt first_stmt = bb->stmts->stmts_used;
if (verboze) {
- ppIRStmt(st);
+ ppIRStmt(st, bb->tyenv, 0);
VG_(printf)("\n\n");
}
@@ -2706,7 +2706,7 @@
default:
VG_(printf)("\n");
- ppIRStmt(st);
+ ppIRStmt(st, bb->tyenv, 0);
VG_(printf)("\n");
VG_(tool_panic)("memcheck: unhandled IRStmt");
@@ -2715,7 +2715,7 @@
if (verboze) {
for (UInt j = first_stmt; j < bb->stmts->stmts_used; j++) {
VG_(printf)(" ");
- ppIRStmt(bb->stmts->stmts[j]);
+ ppIRStmt(bb->stmts->stmts[j], bb->tyenv, 0);
VG_(printf)("\n");
}
VG_(printf)("\n");
@@ -2739,7 +2739,7 @@
if (verboze) {
for (UInt j = first_stmt; j < bb->stmts->stmts_used; j++) {
VG_(printf)(" ");
- ppIRStmt(bb->stmts->stmts[j]);
+ ppIRStmt(bb->stmts->stmts[j], bb->tyenv, 0);
VG_(printf)("\n");
}
VG_(printf)("\n");
|
|
From: Julian S. <js...@ac...> - 2017-03-29 16:21:52
|
On 29/03/17 17:54, Mineeva, Tatyana A wrote: > Our team cannot access the Valgrind Subversion repository: > $ svn co svn://svn.valgrind.org/valgrind/trunk valgrind > svn: Can't connect to host 'svn.valgrind.org': Connection timed out > Is the this repository functional, or should we switch to the git repository? The SVN repo works fine. I've been using it this afternoon and committed to it just a few minutes ago. So as Eliot says, this is probably a corporate firewall problem. Such things have happened before. > We do not currently have success cloning the Valgrind git repository: > $ git clone git://sourceware.org/git/valgrind.git > Cloning into 'valgrind'... > fatal: unable to connect to sourceware.org: > sourceware.org[0: 209.132.180.131]: errno=Connection timed out I don't know. Ivo might know more. Ivo? > I would also like to take this opportunity to update you on our current > progress on adding AVX-512 support to Valgrind. Thank you for the update. That sounds promising. I suspect there will be some fun and games merging this with the trunk, so in general it would be best if you can keep your work based on the most recent possible version of the trunk, rather than on 3.12.0. J |
|
From: <sv...@va...> - 2017-03-29 16:13:43
|
Author: sewardj
Date: Wed Mar 29 17:13:35 2017
New Revision: 3337
Log:
Add a mechanism for hinting to the core disassembler loop, that the
just-disassembled instruction is very verbose. This allows dynamic changes to
the maximum number of guest instructions allowed in the current IRSB.
Fixes #375839.
Modified:
trunk/priv/guest_amd64_toIR.c
trunk/priv/guest_arm64_toIR.c
trunk/priv/guest_arm_toIR.c
trunk/priv/guest_generic_bb_to_IR.c
trunk/priv/guest_generic_bb_to_IR.h
trunk/priv/guest_mips_toIR.c
trunk/priv/guest_ppc_toIR.c
trunk/priv/guest_s390_toIR.c
trunk/priv/guest_tilegx_toIR.c
trunk/priv/guest_x86_toIR.c
trunk/pub/libvex.h
Modified: trunk/priv/guest_amd64_toIR.c
==============================================================================
--- trunk/priv/guest_amd64_toIR.c (original)
+++ trunk/priv/guest_amd64_toIR.c Wed Mar 29 17:13:35 2017
@@ -29616,6 +29616,7 @@
if (have66noF2noF3(pfx)) {
delta = dis_FMA( vbi, pfx, delta, opc );
*uses_vvvv = True;
+ dres->hint = Dis_HintVerbose;
goto decode_success;
}
break;
@@ -31744,13 +31745,18 @@
/* else fall though; dis_PCMPxSTRx failed to decode it */
}
break;
+
case 0x5C ... 0x5F:
case 0x68 ... 0x6F:
case 0x78 ... 0x7F:
+ /* FIXME: list the instructions decoded here */
if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
Long delta0 = delta;
delta = dis_FMA4( pfx, delta, opc, uses_vvvv, vbi );
- if (delta > delta0) goto decode_success;
+ if (delta > delta0) {
+ dres->hint = Dis_HintVerbose;
+ goto decode_success;
+ }
/* else fall though; dis_FMA4 failed to decode it */
}
break;
@@ -31863,6 +31869,7 @@
dres.len = 0;
dres.continueAt = 0;
dres.jk_StopHere = Ijk_INVALID;
+ dres.hint = Dis_HintNone;
*expect_CAS = False;
vassert(guest_RIP_next_assumed == 0);
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Wed Mar 29 17:13:35 2017
@@ -14305,6 +14305,7 @@
dres->len = 4;
dres->continueAt = 0;
dres->jk_StopHere = Ijk_INVALID;
+ dres->hint = Dis_HintNone;
/* At least this is simple on ARM64: insns are all 4 bytes long, and
4-aligned. So just fish the whole thing out of memory right now
Modified: trunk/priv/guest_arm_toIR.c
==============================================================================
--- trunk/priv/guest_arm_toIR.c (original)
+++ trunk/priv/guest_arm_toIR.c Wed Mar 29 17:13:35 2017
@@ -16099,6 +16099,7 @@
dres.len = 4;
dres.continueAt = 0;
dres.jk_StopHere = Ijk_INVALID;
+ dres.hint = Dis_HintNone;
/* Set default actions for post-insn handling of writes to r15, if
required. */
@@ -18986,6 +18987,7 @@
dres.len = 2;
dres.continueAt = 0;
dres.jk_StopHere = Ijk_INVALID;
+ dres.hint = Dis_HintNone;
/* Set default actions for post-insn handling of writes to r15, if
required. */
Modified: trunk/priv/guest_generic_bb_to_IR.c
==============================================================================
--- trunk/priv/guest_generic_bb_to_IR.c (original)
+++ trunk/priv/guest_generic_bb_to_IR.c Wed Mar 29 17:13:35 2017
@@ -237,6 +237,13 @@
vassert((offB_GUEST_IP % 8) == 0);
}
+ /* Although we will try to disassemble up to vex_control.guest_max_insns
+ insns into the block, the individual insn assemblers may hint to us that a
+ disassembled instruction is verbose. In that case we will lower the limit
+ so as to ensure that the JIT doesn't run out of space. See bug 375839 for
+ the motivating example. */
+ Int guest_max_insns_really = vex_control.guest_max_insns;
+
/* Start a new, empty extent. */
vge->n_used = 1;
vge->base[0] = guest_IP_bbstart;
@@ -284,7 +291,7 @@
/* Process instructions. */
while (True) {
- vassert(n_instrs < vex_control.guest_max_insns);
+ vassert(n_instrs < guest_max_insns_really);
/* Regardless of what chase_into_ok says, is chasing permissible
at all right now? Set resteerOKfn accordingly. */
@@ -383,6 +390,23 @@
if (n_cond_resteers_allowed == 0)
vassert(dres.whatNext != Dis_ResteerC);
+ /* If the disassembly function passed us a hint, take note of it. */
+ if (LIKELY(dres.hint == Dis_HintNone)) {
+ /* Do nothing */
+ } else {
+ vassert(dres.hint == Dis_HintVerbose);
+ /* The current insn is known to be verbose. Lower the max insns limit
+ if necessary so as to avoid running the JIT out of space in the
+ event that we've encountered the start of a long sequence of them.
+ This is expected to be a very rare event. In any case the remaining
+ limit (30 insns) is still so high that most blocks will terminate
+ anyway before then. So this is very unlikely to give a perf hit in
+ practice. See bug 375839 for the motivating example. */
+ if (guest_max_insns_really > 30) {
+ guest_max_insns_really = 30;
+ }
+ }
+
/* Fill in the insn-mark length field. */
vassert(first_stmt_idx >= 0 && first_stmt_idx < irsb->stmts_used);
imark = irsb->stmts[first_stmt_idx];
@@ -435,7 +459,7 @@
case Dis_Continue:
vassert(dres.continueAt == 0);
vassert(dres.jk_StopHere == Ijk_INVALID);
- if (n_instrs < vex_control.guest_max_insns) {
+ if (n_instrs < guest_max_insns_really) {
/* keep going */
} else {
/* We have to stop. See comment above re irsb field
Modified: trunk/priv/guest_generic_bb_to_IR.h
==============================================================================
--- trunk/priv/guest_generic_bb_to_IR.h (original)
+++ trunk/priv/guest_generic_bb_to_IR.h Wed Mar 29 17:13:35 2017
@@ -76,10 +76,16 @@
Dis_ResteerC: (speculatively, of course) followed a
conditional branch; continue at 'continueAt'
*/
- enum { Dis_StopHere, Dis_Continue,
+ enum { Dis_StopHere=0x10, Dis_Continue,
Dis_ResteerU, Dis_ResteerC } whatNext;
- /* For Dis_StopHere, we need to end the block and create a
+ /* Any other hints that we should feed back to the disassembler?
+ Dis_HintNone: no hint
+ Dis_HintVerbose: this insn potentially generates a lot of code
+ */
+ enum { Dis_HintNone=0x20, Dis_HintVerbose } hint;
+
+ /* For whatNext==Dis_StopHere, we need to end the block and create a
transfer to whatever the NIA is. That will have presumably
been set by the IR generated for this insn. So we need to
know the jump kind to use. Should Ijk_INVALID in other Dis_
@@ -89,7 +95,6 @@
/* For Dis_Resteer, this is the guest address we should continue
at. Otherwise ignored (should be zero). */
Addr continueAt;
-
}
DisResult;
Modified: trunk/priv/guest_mips_toIR.c
==============================================================================
--- trunk/priv/guest_mips_toIR.c (original)
+++ trunk/priv/guest_mips_toIR.c Wed Mar 29 17:13:35 2017
@@ -12132,6 +12132,7 @@
dres.len = 0;
dres.continueAt = 0;
dres.jk_StopHere = Ijk_INVALID;
+ dres.hint = Dis_HintNone;
delay_slot_branch = likely_delay_slot = delay_slot_jump = False;
Modified: trunk/priv/guest_ppc_toIR.c
==============================================================================
--- trunk/priv/guest_ppc_toIR.c (original)
+++ trunk/priv/guest_ppc_toIR.c Wed Mar 29 17:13:35 2017
@@ -27406,6 +27406,7 @@
dres.len = 0;
dres.continueAt = 0;
dres.jk_StopHere = Ijk_INVALID;
+ dres.hint = Dis_HintNone;
/* At least this is simple on PPC32: insns are all 4 bytes long, and
4-aligned. So just fish the whole thing out of memory right now
@@ -29112,6 +29113,7 @@
dres.whatNext = Dis_StopHere;
dres.jk_StopHere = Ijk_NoDecode;
dres.continueAt = 0;
+ dres.hint = Dis_HintNone;
return dres;
}
Modified: trunk/priv/guest_s390_toIR.c
==============================================================================
--- trunk/priv/guest_s390_toIR.c (original)
+++ trunk/priv/guest_s390_toIR.c Wed Mar 29 17:13:35 2017
@@ -16832,6 +16832,7 @@
dres.len = insn_length;
dres.continueAt = 0;
dres.jk_StopHere = Ijk_INVALID;
+ dres.hint = Dis_HintNone;
/* fixs390: consider chasing of conditional jumps */
Modified: trunk/priv/guest_tilegx_toIR.c
==============================================================================
--- trunk/priv/guest_tilegx_toIR.c (original)
+++ trunk/priv/guest_tilegx_toIR.c Wed Mar 29 17:13:35 2017
@@ -323,6 +323,7 @@
dres.len = 0;
dres.continueAt = 0;
dres.jk_StopHere = Ijk_INVALID;
+ dres.hint = Dis_HintNone;
/* Verify the code addr is 8-byte aligned. */
vassert((((Addr)code) & 7) == 0);
Modified: trunk/priv/guest_x86_toIR.c
==============================================================================
--- trunk/priv/guest_x86_toIR.c (original)
+++ trunk/priv/guest_x86_toIR.c Wed Mar 29 17:13:35 2017
@@ -8114,6 +8114,7 @@
dres.whatNext = Dis_Continue;
dres.len = 0;
dres.continueAt = 0;
+ dres.hint = Dis_HintNone;
dres.jk_StopHere = Ijk_INVALID;
*expect_CAS = False;
Modified: trunk/pub/libvex.h
==============================================================================
--- trunk/pub/libvex.h (original)
+++ trunk/pub/libvex.h Wed Mar 29 17:13:35 2017
@@ -475,7 +475,7 @@
Default=120. A setting of zero disables unrolling. */
Int iropt_unroll_thresh;
/* What's the maximum basic block length the front end(s) allow?
- BBs longer than this are split up. Default=50 (guest
+ BBs longer than this are split up. Default=60 (guest
insns). */
Int guest_max_insns;
/* How aggressive should front ends be in following
|
|
From: Eliot M. <mo...@cs...> - 2017-03-29 16:02:59
|
On 3/29/2017 11:54 AM, Mineeva, Tatyana A wrote: > We do not currently have success cloning the Valgrind git repository: > > $ git clone git://sourceware.org/git/valgrind.git > > Cloning into 'valgrind'... > > fatal: unable to connect to sourceware.org: > > sourceware.org[0: 209.132.180.131]: errno=Connection timed out Dear Mineeva -- Of course it could be a corporate firewall or something, but I have sometimes found that using http:/https: vs git: can make a difference when checking out a public repository. I just tried the git: from Cygwin on my Windows 10 box and it cloned just fine. This makes me suspect a networking issue particular to you, or that there was a short- term connectivity issue. Regards - Eliot Moss |
|
From: Julian S. <js...@ac...> - 2017-03-29 15:59:51
|
On 29/03/17 02:41, Patrick J. LoPresti wrote: > Sorry, should have read the bug report more carefully. I see you > already suggested this. > > Of course this is the right fix. If some static analyzer complains, > that is a problem with the static analyzer and therefore irrelevant > (IMO). I agree. Matthias, if you are happy to test the simple "(void)format;" solution with MSVC, then I am happy to commit it. Can you do that? J |
|
From: Aleksandar R. <ale...@rt...> - 2017-03-29 15:42:05
|
Hello, Have you tried running the latest SVN version ? There are recently fixed issues regarding Cavium Octeon: https://bugs.kde.org/show_bug.cgi?id=376142 https://bugs.kde.org/show_bug.cgi?id=344524 Best Regards, Aleksandar On 29.03.2017. 13:43, 网络尖兵 wrote: > I am trying to use valgrind to do the memcheck on Cavium Octeon > CN73XX, but unfortunately I got the following message. > root# valgrind > --3846:0: aspacem <<< SHOW_SEGMENTS: out_of_memory (13 segments) > --3846:0: aspacem 1 segment names in 1 slots > ... > The valgrind was configured and build by yocto with "-meb -mabi=64 > -mhard-float -march=octeon3" . > The valgrind version is 3.11.0. > |
|
From: Carl E. L. <ce...@us...> - 2017-03-29 14:58:10
|
Julian:
A release in the May time frame of trunk to catch all of the updates to
the various platforms sounds good. Thanks.
Carl Love
On Wed, 2017-03-29 at 15:51 +0200, Julian Seward wrote:
> Carl, hi.
>
> There have been quite a few fixes on the trunk since 3.12 was released,
> and I'm somewhat reluctant to merge them all to the branch, not least
> because some of the fixes are quite big. On the other hand I'd like to
> get all of these fixes to users sooner rather than later.
>
> I have the following alternative proposal: do a 3.13 release in early
> May. This would mean we could ship all the fixes on the trunk, and would
> avoid the work of merging to the branch. With a freeze/branch date of
> Friday 21 April and a release date two weeks later, on Friday 5 May.
>
> How does that sound?
>
> The big 3 things that I'd like to fix before the freeze point are:
>
> (1) some AVX2 insn sequences run the JIT out of space:
> https://bugs.kde.org/show_bug.cgi?id=375839
>
> (2) on some processors, ARM64 hangs to due LL/SC looping:
> https://bugs.kde.org/show_bug.cgi?id=369459
>
> (3) See if we can do anything about the poor state of the
> Mac OS 10.12 port.
>
> Whatever other fixes we can get in before the freeze window, will
> also be good, of course.
>
> I don't regard the proposed 3.13 as shipping anything particularly new,
> but instead as stabilising and solidifying what we shipped with 3.12.
>
> J
>
|
|
From: John R. <jr...@bi...> - 2017-03-29 14:00:41
|
> Please run
> strace -e trace=memory valgrind ...
> to show the actual system calls to mmap, mprotect, munmap, brk, etc.
On chips designed for embedded systems, there is a temptation to save
area, power, and/or a few picoseconds by reducing the generality of
memory management hardware. Such as: the PAGESIZE may be 4KiB (0x1000),
but any mapping must start on a 16KiB boundary (0x4000); this happens
on quite a few 32-bit ARM chips.
If valgrind does not know (or has a bug) then it is easy to request
an impossible mapping, and the kernel's denial is easy to interpret as
"out of memory". Look in the valgrind source:
grep -sr SHMLBA coregrind
particularly mips_PRE_sys_mmap() to see some attempts to deal with this.
Also see PRE(sys_shmat) in coregrind/m_syswrap/syswrap-linux.c .
|
|
From: Julian S. <js...@ac...> - 2017-03-29 13:51:38
|
Carl, hi.
There have been quite a few fixes on the trunk since 3.12 was released,
and I'm somewhat reluctant to merge them all to the branch, not least
because some of the fixes are quite big. On the other hand I'd like to
get all of these fixes to users sooner rather than later.
I have the following alternative proposal: do a 3.13 release in early
May. This would mean we could ship all the fixes on the trunk, and would
avoid the work of merging to the branch. With a freeze/branch date of
Friday 21 April and a release date two weeks later, on Friday 5 May.
How does that sound?
The big 3 things that I'd like to fix before the freeze point are:
(1) some AVX2 insn sequences run the JIT out of space:
https://bugs.kde.org/show_bug.cgi?id=375839
(2) on some processors, ARM64 hangs to due LL/SC looping:
https://bugs.kde.org/show_bug.cgi?id=369459
(3) See if we can do anything about the poor state of the
Mac OS 10.12 port.
Whatever other fixes we can get in before the freeze window, will
also be good, of course.
I don't regard the proposed 3.13 as shipping anything particularly new,
but instead as stabilising and solidifying what we shipped with 3.12.
J
|
|
From: John R. <jr...@bi...> - 2017-03-29 12:44:42
|
> I am trying to use valgrind to do the memcheck on Cavium Octeon CN73XX, but unfortunately I got the following message.
> root# valgrind
Do not run as root (superuser). Create an ordinary userID, and run as that user.
On some systems a new userID can be created by using /usr/sbin/adduser.
Then login as that userID, or login as root and "su userID" before running valgrind.
> --3846:0: aspacem <<< SHOW_SEGMENTS: out_of_memory (13 segments)
Please run
strace -e trace=memory valgrind ...
to show the actual system calls to mmap, mprotect, munmap, brk, etc.
|
|
From: 网. <net...@fo...> - 2017-03-29 11:43:35
|
Hello, everyone! I have posted this question on the forum, but I got this message"This post has NOT been accepted by the mailing list yet." I am not sure if my post could be seen by somebody else. So I send this mail. I am trying to use valgrind to do the memcheck on Cavium Octeon CN73XX, but unfortunately I got the following message. root# valgrind --3846:0: aspacem <<< SHOW_SEGMENTS: out_of_memory (13 segments) --3846:0: aspacem 1 segment names in 1 slots --3846:0: aspacem freelist is empty --3846:0: aspacem (0,4,2) /usr/lib/valgrind/memcheck-mips64-linux --3846:0: aspacem 0: RSVN 0000000000-0003ffffff 64m ----- SmFixed --3846:0: aspacem 1: 0004000000-0037ffffff 832m --3846:0: aspacem 2: FILE 0038000000-003823ffff 2359296 r-x-- d=0xb301 i=12614 o=0 (0,4) --3846:0: aspacem 3: FILE 0038240000-003826ffff 196608 rw--- d=0xb301 i=12614 o=2293760 (0,4) --3846:0: aspacem 4: ANON 0038270000-003943ffff 17m rwx-- --3846:0: aspacem 5: 0039440000-0801ffffff 31883m --3846:0: aspacem 6: RSVN 0802000000-0802000fff 4096 ----- SmFixed --3846:0: aspacem 7: 0802001000-0fffffffff 32735m --3846:0: aspacem 8: RSVN 1000000000-ffdfcbffff 982524m ----- SmFixed --3846:0: aspacem 9: ANON ffdfcc0000-ffdfceffff 196608 rwx-- --3846:0: aspacem 10: RSVN ffdfcf0000-fffffeffff 515m ----- SmFixed --3846:0: aspacem 11: ANON ffffff0000-ffffffffff 65536 r-x-- --3846:0: aspacem 12: RSVN 10000000000-ffffffffffffffff 16383e ----- SmFixed --3846:0: aspacem >>> --3846-- core : 0/ 0 max/curr mmap'd, 0/0 unsplit/split sb unmmap'd, 0/ 0 max/curr, 0/ 0 totalloc-blocks/bytes, 0 searches 8 rzB --3846-- dinfo : 0/ 0 max/curr mmap'd, 0/0 unsplit/split sb unmmap'd, 0/ 0 max/curr, 0/ 0 totalloc-blocks/bytes, 0 searches 8 rzB --3846-- (null) : 0/ 0 max/curr mmap'd, 0/0 unsplit/split sb unmmap'd, 0/ 0 max/curr, 0/ 0 totalloc-blocks/bytes, 0 searches 0 rzB --3846-- demangle: 0/ 0 max/curr mmap'd, 0/0 unsplit/split sb unmmap'd, 0/ 0 max/curr, 0/ 0 totalloc-blocks/bytes, 0 searches 8 rzB --3846-- ttaux : 0/ 0 max/curr mmap'd, 0/0 unsplit/split sb unmmap'd, 0/ 0 max/curr, 0/ 0 totalloc-blocks/bytes, 0 searches 8 rzB --3846-- translate: no SP updates identified --3846-- translate: PX: SPonly 0, UnwRegs 0, AllRegs 0, AllRegsAllInsns 0 --3846-- tt/tc: 0 tt lookups requiring 0 probes --3846-- tt/tc: 0 fast-cache updates, 0 flushes --3846-- transtab: new 0 (0 -> 0; ratio 0.0) [0 scs] avg tce size 0 --3846-- transtab: dumped 0 (0 -> ??) (sectors recycled 0) --3846-- transtab: discarded 0 (0 -> ??) --3846-- scheduler: 0 event checks. --3846-- scheduler: 0 indir transfers, 0 misses (1 in 0) --3846-- scheduler: 0/0 major/minor sched events. --3846-- sanity: 0 cheap, 0 expensive checks. ==3846== ==3846== Valgrind's memory management: out of memory: ==3846== newSuperblock's request for 4194304 bytes failed. ==3846== 18,939,904 bytes have already been mmap-ed ANONYMOUS. ==3846== Valgrind cannot continue. Sorry. ==3846== ==3846== There are several possible reasons for this. ==3846== - You have some kind of memory limit in place. Look at the ==3846== output of 'ulimit -a'. Is there a limit on the size of ==3846== virtual memory or address space? ==3846== - You have run out of swap space. ==3846== - Valgrind has a bug. If you think this is the case or you are ==3846== not sure, please let us know and we'll try to fix it. ==3846== Please note that programs can take substantially more memory than ==3846== normal when running under Valgrind tools, eg. up to twice or ==3846== more, depending on the tool. On a 64-bit machine, Valgrind ==3846== should be able to make use of up 32GB memory. On a 32-bit ==3846== machine, Valgrind should be able to use all the memory available ==3846== to a single process, up to 4GB if that's how you have your ==3846== kernel configured. Most 32-bit Linux setups allow a maximum of ==3846== 3GB per process. ==3846== ==3846== Whatever the reason, Valgrind cannot continue. Sorry. I have searched and found somebody have meet this kind of problem, but I still have no idea on how to deal with it. http://valgrind.10908.n7.nabble.com/Valgrind-13854-Cross-compiling-for-Cavium-MIPS64-N32-ABI-td48980.html http://valgrind.10908.n7.nabble.com/valgrind-out-of-memory-error-td54401.html The valgrind was configured and build by yocto with "-meb -mabi=64 -mhard-float -march=octeon3" . The valgrind version is 3.11.0. I have tried to expand swap on my box, but it make no sense. |
|
From: Patrick J. L. <lop...@gm...> - 2017-03-29 00:41:54
|
Sorry, should have read the bug report more carefully. I see you already suggested this. Of course this is the right fix. If some static analyzer complains, that is a problem with the static analyzer and therefore irrelevant (IMO). - Pat On Tue, Mar 28, 2017 at 5:36 PM, Patrick J. LoPresti <lop...@gm...> wrote: > In C++, you can just comment out the variable name in the argument list. > > In C... Well, I did not know. So I searched and found: > > http://stackoverflow.com/q/3599160/ > > It looks like a simple: > > (void)format; > > ...should do the trick. And I suspect it will not emit any code. > > - Pat |
|
From: Patrick J. L. <lop...@gm...> - 2017-03-29 00:36:13
|
In C++, you can just comment out the variable name in the argument list. In C... Well, I did not know. So I searched and found: http://stackoverflow.com/q/3599160/ It looks like a simple: (void)format; ...should do the trick. And I suspect it will not emit any code. - Pat |