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From: <sv...@va...> - 2017-03-17 19:50:22
|
Author: iraisr
Date: Fri Mar 17 19:50:14 2017
New Revision: 3321
Log:
Make useful/test_main.c compilable
Modified:
branches/VEX_JIT_HACKS/useful/test_main.c
Modified: branches/VEX_JIT_HACKS/useful/test_main.c
==============================================================================
--- branches/VEX_JIT_HACKS/useful/test_main.c (original)
+++ branches/VEX_JIT_HACKS/useful/test_main.c Fri Mar 17 19:50:14 2017
@@ -609,13 +609,13 @@
so far exists, allocate one. */
static IRTemp findShadowTmp ( MCEnv* mce, IRTemp orig )
{
- tl_assert(orig < mce->n_originalTmps);
- if (mce->tmpMap[orig] == IRTemp_INVALID) {
- mce->tmpMap[orig]
- = newIRTemp(mce->bb->tyenv,
- shadowType(mce->bb->tyenv->types[orig]));
+ tl_assert(orig.index < mce->n_originalTmps);
+ if (isIRTempInvalid(mce->tmpMap[orig.index])) {
+ mce->tmpMap[orig.index]
+ = newIRTemp(mce->bb->stmts->tyenv,
+ shadowType(mce->bb->stmts->tyenv->types[orig.index]));
}
- return mce->tmpMap[orig];
+ return mce->tmpMap[orig.index];
}
/* Allocate a new shadow for the given original tmp. This means any
@@ -626,10 +626,10 @@
and use that instead. */
static void newShadowTmp ( MCEnv* mce, IRTemp orig )
{
- tl_assert(orig < mce->n_originalTmps);
- mce->tmpMap[orig]
- = newIRTemp(mce->bb->tyenv,
- shadowType(mce->bb->tyenv->types[orig]));
+ tl_assert(orig.index < mce->n_originalTmps);
+ mce->tmpMap[orig.index]
+ = newIRTemp(mce->bb->stmts->tyenv,
+ shadowType(mce->bb->stmts->tyenv->types[orig.index]));
}
@@ -652,7 +652,7 @@
{
if (a1->tag == Iex_Const)
return True;
- if (a1->tag == Iex_RdTmp && a1->Iex.RdTmp.tmp < mce->n_originalTmps)
+ if (a1->tag == Iex_RdTmp && a1->Iex.RdTmp.tmp.index < mce->n_originalTmps)
return True;
return False;
}
@@ -663,7 +663,7 @@
{
if (a1->tag == Iex_Const)
return True;
- if (a1->tag == Iex_RdTmp && a1->Iex.RdTmp.tmp >= mce->n_originalTmps)
+ if (a1->tag == Iex_RdTmp && a1->Iex.RdTmp.tmp.index >= mce->n_originalTmps)
return True;
return False;
}
@@ -725,12 +725,12 @@
/*------------------------------------------------------------*/
/* assign value to tmp */
-#define assign(_bb,_tmp,_expr) \
- addStmtToIRSB((_bb), IRStmt_WrTmp((_tmp),(_expr)))
+#define assign(_stmts,_tmp,_expr) \
+ addStmtToIRStmtVec((_stmts), IRStmt_WrTmp((_tmp),(_expr)))
/* add stmt to a bb */
-#define stmt(_bb,_stmt) \
- addStmtToIRSB((_bb), (_stmt))
+#define stmt(_stmts,_stmt) \
+ addStmtToIRStmtVec((_stmts), (_stmt))
/* build various kinds of expressions */
#define binop(_op, _arg1, _arg2) IRExpr_Binop((_op),(_arg1),(_arg2))
@@ -746,8 +746,8 @@
temporary. This effectively converts an arbitrary expression into
an atom. */
static IRAtom* assignNew ( MCEnv* mce, IRType ty, IRExpr* e ) {
- IRTemp t = newIRTemp(mce->bb->tyenv, ty);
- assign(mce->bb, t, e);
+ IRTemp t = newIRTemp(mce->bb->stmts->tyenv, ty);
+ assign(mce->bb->stmts, t, e);
return mkexpr(t);
}
@@ -982,7 +982,7 @@
/* Note, dst_ty is a shadow type, not an original type. */
/* First of all, collapse vbits down to a single bit. */
tl_assert(isShadowAtom(mce,vbits));
- ty = typeOfIRExpr(mce->bb->tyenv, vbits);
+ ty = typeOfIRExpr(mce->bb->stmts->tyenv, vbits);
tmp1 = NULL;
switch (ty) {
case Ity_I1:
@@ -1074,7 +1074,7 @@
tl_assert(isShadowAtom(mce, vatom));
tl_assert(sameKindedAtoms(atom, vatom));
- ty = typeOfIRExpr(mce->bb->tyenv, vatom);
+ ty = typeOfIRExpr(mce->bb->stmts->tyenv, vatom);
/* sz is only used for constructing the error message */
sz = ty==Ity_I1 ? 0 : sizeofIRType(ty);
@@ -1114,7 +1114,7 @@
}
di->guard = cond;
setHelperAnns( mce, di );
- stmt( mce->bb, IRStmt_Dirty(di));
+ stmt( mce->bb->stmts, IRStmt_Dirty(di));
/* Set the shadow tmp to be defined. First, update the
orig->shadow tmp mapping to reflect the fact that this shadow is
@@ -1124,8 +1124,8 @@
if (vatom->tag == Iex_RdTmp) {
tl_assert(atom->tag == Iex_RdTmp);
newShadowTmp(mce, atom->Iex.RdTmp.tmp);
- assign(mce->bb, findShadowTmp(mce, atom->Iex.RdTmp.tmp),
- definedOfType(ty));
+ assign(mce->bb->stmts, findShadowTmp(mce, atom->Iex.RdTmp.tmp),
+ definedOfType(ty));
}
}
@@ -1184,7 +1184,7 @@
tl_assert(isShadowAtom(mce, vatom));
}
- ty = typeOfIRExpr(mce->bb->tyenv, vatom);
+ ty = typeOfIRExpr(mce->bb->stmts->tyenv, vatom);
tl_assert(ty != Ity_I1);
if (isAlwaysDefd(mce, offset, sizeofIRType(ty))) {
/* later: no ... */
@@ -1192,7 +1192,7 @@
/* complainIfUndefined(mce, atom); */
} else {
/* Do a plain shadow Put. */
- stmt( mce->bb, IRStmt_Put( offset + mce->layout->total_sizeB, vatom ) );
+ stmt(mce->bb->stmts, IRStmt_Put(offset + mce->layout->total_sizeB, vatom));
}
}
@@ -1227,7 +1227,7 @@
IRRegArray* new_descr
= mkIRRegArray( descr->base + mce->layout->total_sizeB,
tyS, descr->nElems);
- stmt( mce->bb, IRStmt_PutI( mkIRPutI( new_descr, ix, bias, vatom ) ));
+ stmt(mce->bb->stmts, IRStmt_PutI(mkIRPutI(new_descr, ix, bias, vatom)));
}
}
@@ -2096,12 +2096,12 @@
/* We need to have a place to park the V bits we're just about to
read. */
- datavbits = newIRTemp(mce->bb->tyenv, ty);
+ datavbits = newIRTemp(mce->bb->stmts->tyenv, ty);
di = unsafeIRDirty_1_N( datavbits,
1/*regparms*/, hname, helper,
mkIRExprVec_1( addrAct ));
setHelperAnns( mce, di );
- stmt( mce->bb, IRStmt_Dirty(di) );
+ stmt(mce->bb->stmts, IRStmt_Dirty(di));
return mkexpr(datavbits);
}
@@ -2147,7 +2147,7 @@
vbitsC = expr2vbits(mce, cond);
vbits0 = expr2vbits(mce, iffalse);
vbits1 = expr2vbits(mce, iftrue);
- ty = typeOfIRExpr(mce->bb->tyenv, vbits0);
+ ty = typeOfIRExpr(mce->bb->stmts->tyenv, vbits0);
return
mkUifU(mce, ty, assignNew(mce, ty, IRExpr_ITE(cond, vbits1, vbits0)),
@@ -2172,7 +2172,7 @@
return IRExpr_RdTmp( findShadowTmp(mce, e->Iex.RdTmp.tmp) );
case Iex_Const:
- return definedOfType(shadowType(typeOfIRExpr(mce->bb->tyenv, e)));
+ return definedOfType(shadowType(typeOfIRExpr(mce->bb->stmts->tyenv, e)));
case Iex_Binop:
return expr2vbits_Binop(
@@ -2219,7 +2219,7 @@
/* vatom is vbits-value and as such can only have a shadow type. */
tl_assert(isShadowAtom(mce,vatom));
- ty = typeOfIRExpr(mce->bb->tyenv, vatom);
+ ty = typeOfIRExpr(mce->bb->stmts->tyenv, vatom);
tyH = mce->hWordTy;
if (tyH == Ity_I32) {
@@ -2277,7 +2277,7 @@
tl_assert(isOriginalAtom(mce,addr));
tl_assert(isShadowAtom(mce,vdata));
- ty = typeOfIRExpr(mce->bb->tyenv, vdata);
+ ty = typeOfIRExpr(mce->bb->stmts->tyenv, vdata);
/* First, emit a definedness test for the address. This also sets
the address (shadow) to 'defined' following the test. */
@@ -2322,8 +2322,8 @@
setHelperAnns( mce, diLo64 );
setHelperAnns( mce, diHi64 );
- stmt( mce->bb, IRStmt_Dirty(diLo64) );
- stmt( mce->bb, IRStmt_Dirty(diHi64) );
+ stmt(mce->bb->stmts, IRStmt_Dirty(diLo64));
+ stmt(mce->bb->stmts, IRStmt_Dirty(diHi64));
} else {
@@ -2350,7 +2350,7 @@
zwidenToHostWord( mce, vdata )));
}
setHelperAnns( mce, di );
- stmt( mce->bb, IRStmt_Dirty(di) );
+ stmt(mce->bb->stmts, IRStmt_Dirty(di));
}
}
@@ -2443,7 +2443,7 @@
tl_assert(d->mAddr);
complainIfUndefined(mce, d->mAddr);
- tyAddr = typeOfIRExpr(mce->bb->tyenv, d->mAddr);
+ tyAddr = typeOfIRExpr(mce->bb->stmts->tyenv, d->mAddr);
tl_assert(tyAddr == Ity_I32 || tyAddr == Ity_I64);
tl_assert(tyAddr == mce->hWordTy); /* not really right */
}
@@ -2480,10 +2480,10 @@
results to all destinations. */
/* Outputs: the destination temporary, if there is one. */
- if (d->tmp != IRTemp_INVALID) {
+ if (!isIRTempInvalid(d->tmp)) {
dst = findShadowTmp(mce, d->tmp);
- tyDst = typeOfIRTemp(mce->bb->tyenv, d->tmp);
- assign( mce->bb, dst, mkPCastTo( mce, tyDst, curr) );
+ tyDst = typeOfIRTemp(mce->bb->stmts->tyenv, d->tmp);
+ assign(mce->bb->stmts, dst, mkPCastTo(mce, tyDst, curr));
}
/* Outputs: guest state that we write or modify. */
@@ -2619,34 +2619,34 @@
/* Bool hasBogusLiterals = False; */
- Int i, j, first_stmt;
- IRStmt* st;
+ Int first_stmt;
MCEnv mce;
/* Set up BB */
- IRSB* bb = emptyIRSB();
- bb->tyenv = deepCopyIRTypeEnv(bb_in->tyenv);
- bb->next = deepCopyIRExpr(bb_in->next);
- bb->jumpkind = bb_in->jumpkind;
+ IRSB* bb = emptyIRSB();
+ bb->id_seq = bb_in->id_seq;
+ bb->stmts->tyenv = deepCopyIRTypeEnv(bb_in->stmts->tyenv);
+ bb->next = deepCopyIRExpr(bb_in->next);
+ bb->jumpkind = bb_in->jumpkind;
/* Set up the running environment. Only .bb is modified as we go
along. */
mce.bb = bb;
mce.layout = layout;
- mce.n_originalTmps = bb->tyenv->types_used;
+ mce.n_originalTmps = bb->stmts->tyenv->types_used;
mce.hWordTy = hWordTy;
mce.tmpMap = LibVEX_Alloc(mce.n_originalTmps * sizeof(IRTemp));
- for (i = 0; i < mce.n_originalTmps; i++)
- mce.tmpMap[i] = IRTemp_INVALID;
+ for (UInt i = 0; i < mce.n_originalTmps; i++)
+ mce.tmpMap[i] = IRTemp_INVALID();
+
+ tl_assert(isFlatIRSB(bb_in));
/* Iterate over the stmts. */
- for (i = 0; i < bb_in->stmts_used; i++) {
- st = bb_in->stmts[i];
+ for (UInt i = 0; i < bb_in->stmts->stmts_used; i++) {
+ IRStmt* st = bb_in->stmts->stmts[i];
if (!st) continue;
- tl_assert(isFlatIRStmt(st));
-
/*
if (!hasBogusLiterals) {
hasBogusLiterals = checkForBogusLiterals(st);
@@ -2657,7 +2657,7 @@
}
}
*/
- first_stmt = bb->stmts_used;
+ first_stmt = bb->stmts->stmts_used;
if (verboze) {
ppIRStmt(st);
@@ -2667,8 +2667,8 @@
switch (st->tag) {
case Ist_WrTmp:
- assign( bb, findShadowTmp(&mce, st->Ist.WrTmp.tmp),
- expr2vbits( &mce, st->Ist.WrTmp.data) );
+ assign(bb->stmts, findShadowTmp(&mce, st->Ist.WrTmp.tmp),
+ expr2vbits( &mce, st->Ist.WrTmp.data));
break;
case Ist_Put:
@@ -2714,20 +2714,20 @@
} /* switch (st->tag) */
if (verboze) {
- for (j = first_stmt; j < bb->stmts_used; j++) {
+ for (UInt j = first_stmt; j < bb->stmts->stmts_used; j++) {
VG_(printf)(" ");
- ppIRStmt(bb->stmts[j]);
+ ppIRStmt(bb->stmts->stmts[j]);
VG_(printf)("\n");
}
VG_(printf)("\n");
}
- addStmtToIRSB(bb, st);
+ addStmtToIRStmtVec(bb->stmts, st);
}
/* Now we need to complain if the jump target is undefined. */
- first_stmt = bb->stmts_used;
+ first_stmt = bb->stmts->stmts_used;
if (verboze) {
VG_(printf)("bb->next = ");
@@ -2738,9 +2738,9 @@
complainIfUndefined( &mce, bb->next );
if (verboze) {
- for (j = first_stmt; j < bb->stmts_used; j++) {
+ for (UInt j = first_stmt; j < bb->stmts->stmts_used; j++) {
VG_(printf)(" ");
- ppIRStmt(bb->stmts[j]);
+ ppIRStmt(bb->stmts->stmts[j]);
VG_(printf)("\n");
}
VG_(printf)("\n");
|
|
From: <sv...@va...> - 2017-03-17 18:45:30
|
Author: philippe
Date: Fri Mar 17 18:45:23 2017
New Revision: 16278
Log:
And some more follow up for 376956 syswrap of SNDDRV and DRM_IOCTL_VERSION
causing some addresses to be wrongly marked as addressable
Just in case, do the assert after ARG2 has been truncated to 32 bits,
to avoid comparing sign extended requests on 64 bits.
Modified:
trunk/coregrind/m_syswrap/syswrap-linux.c
Modified: trunk/coregrind/m_syswrap/syswrap-linux.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-linux.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-linux.c Fri Mar 17 18:45:23 2017
@@ -9013,10 +9013,10 @@
POST(sys_ioctl)
{
- vg_assert(SUCCESS || (FAILURE && VKI_DRM_IOCTL_VERSION == ARG2));
-
ARG2 = (UInt)ARG2;
+ vg_assert(SUCCESS || (FAILURE && VKI_DRM_IOCTL_VERSION == ARG2));
+
/* --- BEGIN special IOCTL handlers for specific Android hardware --- */
/* BEGIN undocumented ioctls for PowerVR SGX 540 (the GPU on Nexus S) */
|
|
From: <sv...@va...> - 2017-03-17 18:38:50
|
Author: philippe
Date: Fri Mar 17 18:38:42 2017
New Revision: 16277
Log:
Follow up to fix 376956 syswrap of SNDDRV and DRM_IOCTL_VERSION causing some
addresses to be wrongly marked as addressable
As noted by Ivo, if the syscall fails, then we have a leak.
So, enable the flag SfPostOnFail if we allocate memory.
In the POST ioctl, check that FAILURE only happens for this drm ioctl,
and free the memory for both SUCCESS and FAILURE.
Do the POST_MEM_WRITE only if SUCCESS
Modified:
trunk/coregrind/m_syswrap/syswrap-linux.c
Modified: trunk/coregrind/m_syswrap/syswrap-linux.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-linux.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-linux.c Fri Mar 17 18:38:42 2017
@@ -7706,6 +7706,8 @@
PRE_MEM_READ("ioctl(DRM_VERSION).desc", (Addr)&data->desc, sizeof(data->desc));
PRE_MEM_WRITE("ioctl(DRM_VERSION).desc", (Addr)data->desc, data->desc_len);
info = VG_(malloc)("syswrap.ioctl.1", sizeof(*info));
+ // To ensure we VG_(free) info even when syscall fails:
+ *flags |= SfPostOnFail;
info->data = *data;
info->orig = data;
ARG3 = (Addr)&info->data;
@@ -9011,7 +9013,7 @@
POST(sys_ioctl)
{
- vg_assert(SUCCESS);
+ vg_assert(SUCCESS || (FAILURE && VKI_DRM_IOCTL_VERSION == ARG2));
ARG2 = (UInt)ARG2;
@@ -10193,15 +10195,17 @@
ARG3 = (Addr)info->orig;
data = info->orig;
VG_(free)(info);
- POST_MEM_WRITE((Addr)&data->version_major, sizeof(data->version_major));
- POST_MEM_WRITE((Addr)&data->version_minor, sizeof(data->version_minor));
- POST_MEM_WRITE((Addr)&data->version_patchlevel, sizeof(data->version_patchlevel));
- POST_MEM_WRITE((Addr)&data->name_len, sizeof(data->name_len));
- POST_MEM_WRITE((Addr)data->name, VG_MIN(data->name_len, orig_name_len));
- POST_MEM_WRITE((Addr)&data->date_len, sizeof(data->date_len));
- POST_MEM_WRITE((Addr)data->date, VG_MIN(data->date_len, orig_date_len));
- POST_MEM_WRITE((Addr)&data->desc_len, sizeof(data->desc_len));
- POST_MEM_WRITE((Addr)data->desc, VG_MIN(data->desc_len, orig_desc_len));
+ if (SUCCESS) {
+ POST_MEM_WRITE((Addr)&data->version_major, sizeof(data->version_major));
+ POST_MEM_WRITE((Addr)&data->version_minor, sizeof(data->version_minor));
+ POST_MEM_WRITE((Addr)&data->version_patchlevel, sizeof(data->version_patchlevel));
+ POST_MEM_WRITE((Addr)&data->name_len, sizeof(data->name_len));
+ POST_MEM_WRITE((Addr)data->name, VG_MIN(data->name_len, orig_name_len));
+ POST_MEM_WRITE((Addr)&data->date_len, sizeof(data->date_len));
+ POST_MEM_WRITE((Addr)data->date, VG_MIN(data->date_len, orig_date_len));
+ POST_MEM_WRITE((Addr)&data->desc_len, sizeof(data->desc_len));
+ POST_MEM_WRITE((Addr)data->desc, VG_MIN(data->desc_len, orig_desc_len));
+ }
}
break;
case VKI_DRM_IOCTL_GET_UNIQUE:
|