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From: <sv...@va...> - 2016-10-04 18:03:05
|
Author: petarj
Date: Tue Oct 4 19:02:58 2016
New Revision: 16005
Log:
mips: update svn:ignore list
Add the following files to svn:ignore lists:
none/tests/mips32/change_fp_mode
none/tests/mips64/change_fp_mode
Modified:
trunk/none/tests/mips32/ (props changed)
trunk/none/tests/mips64/ (props changed)
|
Author: petarj
Date: Tue Oct 4 16:25:27 2016
New Revision: 16004
Log:
mips64: support for prctl(GET/SET_FP_MODE) syscalls
Adding a program (change_fp_mode) to test correct fpu emulation and
fp mode switch using prctl syscalls.
Patch by Aleksandar Rikalo.
Related bug - BZ #366079.
Added:
trunk/none/tests/mips64/change_fp_mode.c
trunk/none/tests/mips64/change_fp_mode.stderr.exp
trunk/none/tests/mips64/change_fp_mode.stdout.exp
trunk/none/tests/mips64/change_fp_mode.vgtest
Modified:
trunk/none/tests/mips64/Makefile.am
Modified: trunk/none/tests/mips64/Makefile.am
==============================================================================
--- trunk/none/tests/mips64/Makefile.am (original)
+++ trunk/none/tests/mips64/Makefile.am Tue Oct 4 16:25:27 2016
@@ -10,6 +10,7 @@
branch_and_jump_instructions.stdout.exp \
branch_and_jump_instructions.stderr.exp branch_and_jump_instructions.vgtest \
branches.stdout.exp branches.stderr.exp branches.vgtest \
+ change_fp_mode.stderr.exp change_fp_mode.stdout.exp change_fp_mode.vgtest \
cvm_bbit.stdout.exp cvm_bbit.stdout.exp-non-octeon \
cvm_bbit.stderr.exp cvm_bbit.vgtest \
cvm_ins.stdout.exp cvm_ins.stdout.exp-non-octeon \
@@ -65,6 +66,7 @@
arithmetic_instruction \
branch_and_jump_instructions \
branches \
+ change_fp_mode \
cvm_bbit \
cvm_ins \
cvm_lx_ins \
Added: trunk/none/tests/mips64/change_fp_mode.c
==============================================================================
--- trunk/none/tests/mips64/change_fp_mode.c (added)
+++ trunk/none/tests/mips64/change_fp_mode.c Tue Oct 4 16:25:27 2016
@@ -0,0 +1,259 @@
+#include <elf.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/prctl.h>
+
+#if !defined(PR_SET_FP_MODE)
+# define PR_SET_FP_MODE 45
+#endif
+
+#if !defined(PR_GET_FP_MODE)
+# define PR_GET_FP_MODE 46
+#endif
+
+#define TEST_LD(instruction, source) \
+{ \
+ unsigned int result1, result2; \
+ __asm__ volatile( \
+ ".set push\n\t" \
+ ".set noreorder\n\t" \
+ "li $t0, 0x5a5a\n\t" \
+ "mtc1 $t0, $f0\n\t" \
+ "mtc1 $t0, $f1\n\t" \
+ "move $t0, %2\n\t" \
+ instruction"\n\t" \
+ "swc1 $f0, %0\n\t" \
+ "swc1 $f1, %1\n\t" \
+ ".set pop\n\t" \
+ : "=m"(result1), "=m"(result2) \
+ : "r" (&source) \
+ : "t0", "$f0", "$f1"); \
+ printf(instruction" :: lo32(f1): %x, lo32(f0): %x\n", \
+ result2, result1); \
+}
+
+#define _TEST_ST(instruction) \
+ __asm__ volatile( \
+ ".set push\n\t" \
+ ".set noreorder\n\t" \
+ "li $t0, 0x5a5a\n\t" \
+ "dmtc1 $t0, $f1\n\t" \
+ "move $t0, %0\n\t" \
+ "ldc1 $f0, 0($t0)\n\t" \
+ "move $t0, %1\n\t" \
+ instruction"\n\t" \
+ ".set pop\n\t" \
+ : \
+ : "r" (&source64), "r" (&result) \
+ : "t0", "$f0", "$f1", "memory")
+
+#define TEST_ST64(instruction) \
+{ \
+ unsigned long result; \
+ _TEST_ST(instruction); \
+ printf(instruction" :: mem: %lx\n", result); \
+}
+
+#define TEST_ST32(instruction) \
+{ \
+ unsigned int result; \
+ _TEST_ST(instruction); \
+ printf(instruction" :: mem: %x\n", result); \
+}
+
+#define TEST_MT(instruction) \
+{ \
+ unsigned int result1, result2; \
+ __asm__ volatile( \
+ ".set push\n\t" \
+ ".set noreorder\n\t" \
+ "li $t0, 0x5a5a\n\t" \
+ "mtc1 $t0, $f0\n\t" \
+ "mtc1 $t0, $f1\n\t" \
+ "ld $t0, %2\n\t" \
+ instruction"\n\t" \
+ "swc1 $f0, %0\n\t" \
+ "swc1 $f1, %1\n\t" \
+ ".set pop\n\t" \
+ : "=m"(result1), "=m"(result2) \
+ : "m" (source64) \
+ : "t0", "$f0", "$f1"); \
+ printf(instruction" :: lo32(f1): %x, lo32(f0): %x\n", \
+ result2, result1); \
+}
+
+#define TEST_MF(instruction) \
+{ \
+ unsigned long result; \
+ __asm__ volatile( \
+ ".set push\n\t" \
+ ".set noreorder\n\t" \
+ "li $t0, 0x5a5a\n\t" \
+ "dmtc1 $t0, $f1\n\t" \
+ "ldc1 $f0, %1\n\t" \
+ "move $t0, $0\n\t" \
+ instruction"\n\t" \
+ "sd $t0, %0\n\t" \
+ ".set pop\n\t" \
+ : "=m" (result) \
+ : "m" (source64) \
+ : "t0", "$f0", "$f1"); \
+ printf(instruction" :: t0: %lx\n", result); \
+}
+
+#define TEST_MOVE(instruction) \
+{ \
+ unsigned int result1, result2; \
+ __asm__ volatile( \
+ ".set push\n\t" \
+ ".set noreorder\n\t" \
+ "li $t0, 0x5a5a\n\t" \
+ "mtc1 $t0, $f0\n\t" \
+ "li $t0, 0x6b6b\n\t" \
+ "mtc1 $t0, $f1\n\t" \
+ "li $t0, 0x7c7c\n\t" \
+ "dmtc1 $t0, $f2\n\t" \
+ "ldc1 $f2, %2\n\t" \
+ instruction"\n\t" \
+ "swc1 $f0, %0\n\t" \
+ "swc1 $f1, %1\n\t" \
+ ".set pop\n\t" \
+ : "=m"(result1), "=m"(result2) \
+ : "m" (source64) \
+ : "t0", "$f0", "$f1", "$f2"); \
+ printf(instruction" :: lo32(f1): %x, lo32(f0): %x\n", \
+ result2, result1); \
+}
+
+unsigned long source64 = 0x1234567890abcdefull;
+unsigned int source32 = 0x12345678u;
+
+/* Determine FP mode based on sdc1 behavior
+ returns 1 if FR = 1 mode is detected (assumes FRE = 0) */
+static int get_fp_mode(void) {
+ unsigned long result = 0;
+ __asm__ volatile(
+ ".set push\n\t"
+ ".set noreorder\n\t"
+ "lui $t0, 0x3ff0\n\t"
+ "ldc1 $f0, %0\n\t"
+ "mtc1 $t0, $f1\n\t"
+ "sdc1 $f0, %0\n\t"
+ ".set pop\n\t"
+ : "+m"(result)
+ :
+ : "t0", "$f0", "$f1", "memory");
+
+ return (result != 0x3ff0000000000000ull);
+}
+
+static void fatal_error(const char* msg) {
+ fprintf(stderr, "Error: %s\n", msg);
+ exit(1);
+}
+
+static void test(int* fr_prctl, int* fr_detected) {
+
+ *fr_prctl = prctl(PR_GET_FP_MODE);
+ *fr_detected = get_fp_mode();
+
+ if (*fr_prctl < 0) {
+ fatal_error("prctl(PR_GET_FP_MODE) fails.");
+ }
+
+ printf("fr_prctl: %d, fr_detected: %d\n", *fr_prctl, *fr_detected);
+
+ if (*fr_prctl != *fr_detected) {
+ fatal_error("fr_prctl != fr_detected");
+ }
+
+ TEST_LD("lwc1 $f0, 0($t0)", source32);
+ TEST_LD("lwc1 $f1, 0($t0)", source32);
+
+ TEST_LD("lwxc1 $f0, $0($t0)", source32);
+ TEST_LD("lwxc1 $f1, $0($t0)", source32);
+
+ TEST_LD("ldc1 $f0, 0($t0)", source64);
+ TEST_LD("ldc1 $f1, 0($t0)", source64);
+
+ TEST_LD("ldxc1 $f0, $0($t0)", source64);
+ TEST_LD("ldxc1 $f1, $0($t0)", source64);
+
+ TEST_ST32("swc1 $f0, 0($t0)");
+ TEST_ST32("swc1 $f1, 0($t0)");
+
+ TEST_ST32("swxc1 $f0, $0($t0)");
+ TEST_ST32("swxc1 $f1, $0($t0)");
+
+ TEST_ST64("sdc1 $f0, 0($t0)");
+ TEST_ST64("sdc1 $f1, 0($t0)");
+
+ TEST_ST64("sdxc1 $f0, $0($t0)");
+ TEST_ST64("sdxc1 $f1, $0($t0)");
+
+ TEST_MT("mtc1 $t0, $f0");
+ TEST_MT("mtc1 $t0, $f1");
+
+ TEST_MT("dmtc1 $t0, $f0");
+ TEST_MT("dmtc1 $t0, $f1");
+
+ TEST_MF("mfc1 $t0, $f0");
+ TEST_MF("mfc1 $t0, $f1");
+
+ TEST_MF("dmfc1 $t0, $f0");
+ TEST_MF("dmfc1 $t0, $f1");
+
+ TEST_MOVE("movn.s $f0, $f2, $t0");
+ TEST_MOVE("movn.s $f0, $f1, $t0");
+ TEST_MOVE("movn.s $f1, $f2, $t0");
+ TEST_MOVE("movn.s $f0, $f2, $0");
+ TEST_MOVE("movn.s $f0, $f1, $0");
+ TEST_MOVE("movn.s $f1, $f2, $0");
+
+ TEST_MOVE("movn.d $f0, $f2, $t0");
+ TEST_MOVE("movn.d $f0, $f1, $t0");
+ TEST_MOVE("movn.d $f1, $f2, $t0");
+ TEST_MOVE("movn.d $f0, $f2, $0");
+ TEST_MOVE("movn.d $f0, $f1, $0");
+ TEST_MOVE("movn.d $f1, $f2, $0");
+
+ TEST_MOVE("movz.s $f0, $f2, $t0");
+ TEST_MOVE("movz.s $f0, $f1, $t0");
+ TEST_MOVE("movz.s $f1, $f2, $t0");
+ TEST_MOVE("movz.s $f0, $f2, $0");
+ TEST_MOVE("movz.s $f0, $f1, $0");
+ TEST_MOVE("movz.s $f1, $f2, $0");
+
+ TEST_MOVE("movz.d $f0, $f2, $t0");
+ TEST_MOVE("movz.d $f0, $f1, $t0");
+ TEST_MOVE("movz.d $f1, $f2, $t0");
+ TEST_MOVE("movz.d $f0, $f2, $0");
+ TEST_MOVE("movz.d $f0, $f1, $0");
+ TEST_MOVE("movz.d $f1, $f2, $0");
+}
+
+int main() {
+ int fr_prctl, fr_detected;
+
+ test(&fr_prctl, &fr_detected);
+
+ /* FP64 */
+ if (fr_prctl == 1) {
+
+ /* Change mode to FP32 */
+ if (prctl(PR_SET_FP_MODE, 0) != 0) {
+ fatal_error("prctl(PR_SET_FP_MODE, 0) fails.");
+ }
+
+ test(&fr_prctl, &fr_detected);
+
+ /* Change back FP mode */
+ if (prctl(PR_SET_FP_MODE, 1) != 0) {
+ fatal_error("prctl(PR_SET_FP_MODE, 1) fails.");
+ }
+
+ test(&fr_prctl, &fr_detected);
+ }
+
+ return 0;
+}
Added: trunk/none/tests/mips64/change_fp_mode.stderr.exp
==============================================================================
(empty)
Added: trunk/none/tests/mips64/change_fp_mode.stdout.exp
==============================================================================
--- trunk/none/tests/mips64/change_fp_mode.stdout.exp (added)
+++ trunk/none/tests/mips64/change_fp_mode.stdout.exp Tue Oct 4 16:25:27 2016
@@ -0,0 +1,147 @@
+fr_prctl: 1, fr_detected: 1
+lwc1 $f0, 0($t0) :: lo32(f1): 5a5a, lo32(f0): 12345678
+lwc1 $f1, 0($t0) :: lo32(f1): 12345678, lo32(f0): 5a5a
+lwxc1 $f0, $0($t0) :: lo32(f1): 5a5a, lo32(f0): 12345678
+lwxc1 $f1, $0($t0) :: lo32(f1): 12345678, lo32(f0): 5a5a
+ldc1 $f0, 0($t0) :: lo32(f1): 5a5a, lo32(f0): 90abcdef
+ldc1 $f1, 0($t0) :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+ldxc1 $f0, $0($t0) :: lo32(f1): 5a5a, lo32(f0): 90abcdef
+ldxc1 $f1, $0($t0) :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+swc1 $f0, 0($t0) :: mem: 90abcdef
+swc1 $f1, 0($t0) :: mem: 5a5a
+swxc1 $f0, $0($t0) :: mem: 90abcdef
+swxc1 $f1, $0($t0) :: mem: 5a5a
+sdc1 $f0, 0($t0) :: mem: 1234567890abcdef
+sdc1 $f1, 0($t0) :: mem: 5a5a
+sdxc1 $f0, $0($t0) :: mem: 1234567890abcdef
+sdxc1 $f1, $0($t0) :: mem: 5a5a
+mtc1 $t0, $f0 :: lo32(f1): 5a5a, lo32(f0): 90abcdef
+mtc1 $t0, $f1 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+dmtc1 $t0, $f0 :: lo32(f1): 5a5a, lo32(f0): 90abcdef
+dmtc1 $t0, $f1 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+mfc1 $t0, $f0 :: t0: ffffffff90abcdef
+mfc1 $t0, $f1 :: t0: 5a5a
+dmfc1 $t0, $f0 :: t0: 1234567890abcdef
+dmfc1 $t0, $f1 :: t0: 5a5a
+movn.s $f0, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 90abcdef
+movn.s $f0, $f1, $t0 :: lo32(f1): 6b6b, lo32(f0): 6b6b
+movn.s $f1, $f2, $t0 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+movn.s $f0, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.s $f0, $f1, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.s $f1, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.d $f0, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 90abcdef
+movn.d $f0, $f1, $t0 :: lo32(f1): 6b6b, lo32(f0): 6b6b
+movn.d $f1, $f2, $t0 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+movn.d $f0, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.d $f0, $f1, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.d $f1, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.s $f0, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.s $f0, $f1, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.s $f1, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.s $f0, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 90abcdef
+movz.s $f0, $f1, $0 :: lo32(f1): 6b6b, lo32(f0): 6b6b
+movz.s $f1, $f2, $0 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+movz.d $f0, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.d $f0, $f1, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.d $f1, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.d $f0, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 90abcdef
+movz.d $f0, $f1, $0 :: lo32(f1): 6b6b, lo32(f0): 6b6b
+movz.d $f1, $f2, $0 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+fr_prctl: 0, fr_detected: 0
+lwc1 $f0, 0($t0) :: lo32(f1): 5a5a, lo32(f0): 12345678
+lwc1 $f1, 0($t0) :: lo32(f1): 12345678, lo32(f0): 5a5a
+lwxc1 $f0, $0($t0) :: lo32(f1): 5a5a, lo32(f0): 12345678
+lwxc1 $f1, $0($t0) :: lo32(f1): 12345678, lo32(f0): 5a5a
+ldc1 $f0, 0($t0) :: lo32(f1): 12345678, lo32(f0): 90abcdef
+ldc1 $f1, 0($t0) :: lo32(f1): 12345678, lo32(f0): 90abcdef
+ldxc1 $f0, $0($t0) :: lo32(f1): 12345678, lo32(f0): 90abcdef
+ldxc1 $f1, $0($t0) :: lo32(f1): 12345678, lo32(f0): 90abcdef
+swc1 $f0, 0($t0) :: mem: 90abcdef
+swc1 $f1, 0($t0) :: mem: 12345678
+swxc1 $f0, $0($t0) :: mem: 90abcdef
+swxc1 $f1, $0($t0) :: mem: 12345678
+sdc1 $f0, 0($t0) :: mem: 1234567890abcdef
+sdc1 $f1, 0($t0) :: mem: 1234567890abcdef
+sdxc1 $f0, $0($t0) :: mem: 1234567890abcdef
+sdxc1 $f1, $0($t0) :: mem: 1234567890abcdef
+mtc1 $t0, $f0 :: lo32(f1): 5a5a, lo32(f0): 90abcdef
+mtc1 $t0, $f1 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+dmtc1 $t0, $f0 :: lo32(f1): 12345678, lo32(f0): 90abcdef
+dmtc1 $t0, $f1 :: lo32(f1): 12345678, lo32(f0): 90abcdef
+mfc1 $t0, $f0 :: t0: ffffffff90abcdef
+mfc1 $t0, $f1 :: t0: 12345678
+dmfc1 $t0, $f0 :: t0: 1234567890abcdef
+dmfc1 $t0, $f1 :: t0: 1234567890abcdef
+movn.s $f0, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 90abcdef
+movn.s $f0, $f1, $t0 :: lo32(f1): 6b6b, lo32(f0): 6b6b
+movn.s $f1, $f2, $t0 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+movn.s $f0, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.s $f0, $f1, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.s $f1, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.d $f0, $f2, $t0 :: lo32(f1): 12345678, lo32(f0): 90abcdef
+movn.d $f0, $f1, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.d $f1, $f2, $t0 :: lo32(f1): 12345678, lo32(f0): 90abcdef
+movn.d $f0, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.d $f0, $f1, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.d $f1, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.s $f0, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.s $f0, $f1, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.s $f1, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.s $f0, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 90abcdef
+movz.s $f0, $f1, $0 :: lo32(f1): 6b6b, lo32(f0): 6b6b
+movz.s $f1, $f2, $0 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+movz.d $f0, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.d $f0, $f1, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.d $f1, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.d $f0, $f2, $0 :: lo32(f1): 12345678, lo32(f0): 90abcdef
+movz.d $f0, $f1, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.d $f1, $f2, $0 :: lo32(f1): 12345678, lo32(f0): 90abcdef
+fr_prctl: 1, fr_detected: 1
+lwc1 $f0, 0($t0) :: lo32(f1): 5a5a, lo32(f0): 12345678
+lwc1 $f1, 0($t0) :: lo32(f1): 12345678, lo32(f0): 5a5a
+lwxc1 $f0, $0($t0) :: lo32(f1): 5a5a, lo32(f0): 12345678
+lwxc1 $f1, $0($t0) :: lo32(f1): 12345678, lo32(f0): 5a5a
+ldc1 $f0, 0($t0) :: lo32(f1): 5a5a, lo32(f0): 90abcdef
+ldc1 $f1, 0($t0) :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+ldxc1 $f0, $0($t0) :: lo32(f1): 5a5a, lo32(f0): 90abcdef
+ldxc1 $f1, $0($t0) :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+swc1 $f0, 0($t0) :: mem: 90abcdef
+swc1 $f1, 0($t0) :: mem: 5a5a
+swxc1 $f0, $0($t0) :: mem: 90abcdef
+swxc1 $f1, $0($t0) :: mem: 5a5a
+sdc1 $f0, 0($t0) :: mem: 1234567890abcdef
+sdc1 $f1, 0($t0) :: mem: 5a5a
+sdxc1 $f0, $0($t0) :: mem: 1234567890abcdef
+sdxc1 $f1, $0($t0) :: mem: 5a5a
+mtc1 $t0, $f0 :: lo32(f1): 5a5a, lo32(f0): 90abcdef
+mtc1 $t0, $f1 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+dmtc1 $t0, $f0 :: lo32(f1): 5a5a, lo32(f0): 90abcdef
+dmtc1 $t0, $f1 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+mfc1 $t0, $f0 :: t0: ffffffff90abcdef
+mfc1 $t0, $f1 :: t0: 5a5a
+dmfc1 $t0, $f0 :: t0: 1234567890abcdef
+dmfc1 $t0, $f1 :: t0: 5a5a
+movn.s $f0, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 90abcdef
+movn.s $f0, $f1, $t0 :: lo32(f1): 6b6b, lo32(f0): 6b6b
+movn.s $f1, $f2, $t0 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+movn.s $f0, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.s $f0, $f1, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.s $f1, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.d $f0, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 90abcdef
+movn.d $f0, $f1, $t0 :: lo32(f1): 6b6b, lo32(f0): 6b6b
+movn.d $f1, $f2, $t0 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+movn.d $f0, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.d $f0, $f1, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movn.d $f1, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.s $f0, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.s $f0, $f1, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.s $f1, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.s $f0, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 90abcdef
+movz.s $f0, $f1, $0 :: lo32(f1): 6b6b, lo32(f0): 6b6b
+movz.s $f1, $f2, $0 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
+movz.d $f0, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.d $f0, $f1, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.d $f1, $f2, $t0 :: lo32(f1): 6b6b, lo32(f0): 5a5a
+movz.d $f0, $f2, $0 :: lo32(f1): 6b6b, lo32(f0): 90abcdef
+movz.d $f0, $f1, $0 :: lo32(f1): 6b6b, lo32(f0): 6b6b
+movz.d $f1, $f2, $0 :: lo32(f1): 90abcdef, lo32(f0): 5a5a
Added: trunk/none/tests/mips64/change_fp_mode.vgtest
==============================================================================
--- trunk/none/tests/mips64/change_fp_mode.vgtest (added)
+++ trunk/none/tests/mips64/change_fp_mode.vgtest Tue Oct 4 16:25:27 2016
@@ -0,0 +1,2 @@
+prog: change_fp_mode
+vgopts: -q
|
|
From: <sv...@va...> - 2016-10-04 15:19:17
|
Author: petarj
Date: Tue Oct 4 16:19:10 2016
New Revision: 16003
Log:
mips64: support for prctl(GET/SET_FP_MODE) syscalls
Add MIPS specific wrapper for prctl(GET/SET_FP_MODE) syscalls to
support FP32/FP64 mode switch.
Patch by Aleksandar Rikalo.
Related VEX change r3253.
Related bug - BZ #366079.
Modified:
trunk/coregrind/m_syswrap/syswrap-mips64-linux.c
trunk/include/vki/vki-mips64-linux.h
Modified: trunk/coregrind/m_syswrap/syswrap-mips64-linux.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-mips64-linux.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-mips64-linux.c Tue Oct 4 16:19:10 2016
@@ -312,7 +312,7 @@
DECL_TEMPLATE (mips_linux, sys_cacheflush);
DECL_TEMPLATE (mips_linux, sys_sched_rr_get_interval);
DECL_TEMPLATE (mips_linux, sys_unshare);
-DECL_TEMPLATE (mips_linux, sys_arch_prctl);
+DECL_TEMPLATE (mips_linux, sys_prctl);
DECL_TEMPLATE (mips_linux, sys_ptrace);
DECL_TEMPLATE (mips_linux, sys_mmap);
DECL_TEMPLATE (mips_linux, sys_rt_sigreturn);
@@ -616,6 +616,52 @@
}
}
+PRE (sys_prctl)
+{
+ switch (ARG1) {
+ case VKI_PR_SET_FP_MODE:
+ {
+ VexArchInfo vai;
+ VG_(machine_get_VexArchInfo)(NULL, &vai);
+ /* Reject unsupported modes */
+ if ((ARG2 & ~VKI_PR_FP_MODE_FR) ||
+ ((ARG2 & VKI_PR_FP_MODE_FR) &&
+ !VEX_MIPS_HOST_FP_MODE(vai.hwcaps))) {
+ SET_STATUS_Failure(VKI_EOPNOTSUPP);
+ } else {
+ if (!(VG_(threads)[tid].arch.vex.guest_CP0_status &
+ MIPS_CP0_STATUS_FR) != !(ARG2 & VKI_PR_FP_MODE_FR)) {
+ ThreadId t;
+ for (t = 1; t < VG_N_THREADS; t++) {
+ if (VG_(threads)[t].status != VgTs_Empty) {
+ if (ARG2 & VKI_PR_FP_MODE_FR) {
+ VG_(threads)[t].arch.vex.guest_CP0_status |=
+ MIPS_CP0_STATUS_FR;
+ } else {
+ VG_(threads)[t].arch.vex.guest_CP0_status &=
+ ~MIPS_CP0_STATUS_FR;
+ }
+ }
+ }
+ /* Discard all translations */
+ VG_(discard_translations)(0, (ULong)(-1ll), "prctl(PR_SET_FP_MODE)");
+ }
+ SET_STATUS_Success(0);
+ }
+ break;
+ }
+ case VKI_PR_GET_FP_MODE:
+ if (VG_(threads)[tid].arch.vex.guest_CP0_status & MIPS_CP0_STATUS_FR)
+ SET_STATUS_Success(VKI_PR_FP_MODE_FR);
+ else
+ SET_STATUS_Success(0);
+ break;
+ default:
+ WRAPPER_PRE_NAME(linux, sys_prctl)(tid, layout, arrghs, status, flags);
+ break;
+ }
+}
+
#undef PRE
#undef POST
@@ -787,7 +833,7 @@
LINX_ (__NR_vhangup, sys_vhangup),
LINX_ (__NR_pivot_root,sys_pivot_root),
LINXY (__NR__sysctl, sys_sysctl),
- LINXY (__NR_prctl, sys_prctl),
+ PLAX_ (__NR_prctl, sys_prctl),
LINXY (__NR_adjtimex, sys_adjtimex),
GENX_ (__NR_setrlimit, sys_setrlimit),
GENX_ (__NR_chroot, sys_chroot),
Modified: trunk/include/vki/vki-mips64-linux.h
==============================================================================
--- trunk/include/vki/vki-mips64-linux.h (original)
+++ trunk/include/vki/vki-mips64-linux.h Tue Oct 4 16:19:10 2016
@@ -1011,6 +1011,13 @@
#define VKI_ENOSYS 89 /* Function not implemented */
#define VKI_EOVERFLOW 79 /* Value too large for defined data type */
+//----------------------------------------------------------------------
+// From linux-3.7.0/arch/mips/include/uapi/asm/errno.h
+//----------------------------------------------------------------------
+
+#define VKI_EOPNOTSUPP 122 /* Operation not supported on transport
+ endpoint */
+
#endif // __VKI_MIPS64_LINUX_H
/*--------------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2016-10-04 14:27:26
|
Author: petarj
Date: Tue Oct 4 15:27:18 2016
New Revision: 3253
Log:
mips64: support for fp32 mode
Support for FP32 emulation on MIPS64 platforms
(including prctl(GET/SET_FP_MODE) syscalls).
Patch by Aleksandar Rikalo.
Implements the remaining parts for BZ #366079.
Modified:
trunk/priv/guest_mips_toIR.c
Modified: trunk/priv/guest_mips_toIR.c
==============================================================================
--- trunk/priv/guest_mips_toIR.c (original)
+++ trunk/priv/guest_mips_toIR.c Tue Oct 4 15:27:18 2016
@@ -1429,8 +1429,8 @@
IRTemp t4 = newTemp(Ity_I32);
IRTemp t5 = newTemp(Ity_I64);
- assign(t0, getFReg(dregNo));
- assign(t1, getFReg(dregNo + 1));
+ assign(t0, getFReg(dregNo & (~1)));
+ assign(t1, getFReg(dregNo | 1));
assign(t3, unop(Iop_ReinterpF32asI32, mkexpr(t0)));
assign(t4, unop(Iop_ReinterpF32asI32, mkexpr(t1)));
@@ -1467,8 +1467,8 @@
assign(t6, unop(Iop_ReinterpF64asI64, mkexpr(t1)));
assign(t4, unop(Iop_64HIto32, mkexpr(t6))); /* hi */
assign(t5, unop(Iop_64to32, mkexpr(t6))); /* lo */
- putFReg(dregNo, unop(Iop_ReinterpI32asF32, mkexpr(t5)));
- putFReg(dregNo + 1, unop(Iop_ReinterpI32asF32, mkexpr(t4)));
+ putFReg(dregNo & (~1), unop(Iop_ReinterpI32asF32, mkexpr(t5)));
+ putFReg(dregNo | 1, unop(Iop_ReinterpI32asF32, mkexpr(t4)));
}
}
@@ -12236,7 +12236,7 @@
assign(t1, unop(Iop_64HIto32, mkexpr(t0)));
putIReg(rt, mkWidenFrom32(ty, mkexpr(t1), True));
break;
- } else if ((fs & 1) == 0) {
+ } else {
putIReg(rt, mkWidenFrom32(ty, unop(Iop_ReinterpF32asI32,
getFReg(fs | 1)), True));
break;
@@ -12254,7 +12254,7 @@
getLoFromF64(Ity_F64, getDReg(fs)))));
putDReg(fs, unop(Iop_ReinterpI64asF64, mkexpr(t0)));
break;
- } else if ((fs & 1) == 0) {
+ } else {
putFReg(fs | 1, unop(Iop_ReinterpI32asF32,
mkNarrowTo32(ty, getIReg(rt))));
break;
@@ -12536,55 +12536,25 @@
switch (fmt) {
case 0x10: /* S */
DIP("movn.s f%u, f%u, r%u", fd, fs, rt);
- t1 = newTemp(Ity_F64);
- t2 = newTemp(Ity_F64);
- t3 = newTemp(Ity_I1);
- t4 = newTemp(Ity_F64);
- if (mode64) {
- assign(t1, getFReg(fs));
- assign(t2, getFReg(fd));
- assign(t3, binop(Iop_CmpNE64, mkU64(0), getIReg(rt)));
- } else {
- if (fp_mode64) {
- assign(t1, getFReg(fs));
- assign(t2, getFReg(fd));
- assign(t3, binop(Iop_CmpNE32, mkU32(0), getIReg(rt)));
- } else {
- assign(t1, unop(Iop_F32toF64, getFReg(fs)));
- assign(t2, unop(Iop_F32toF64, getFReg(fd)));
- assign(t3, binop(Iop_CmpNE32, mkU32(0), getIReg(rt)));
- }
- }
+ t1 = newTemp(Ity_I1);
- assign(t4, IRExpr_ITE(mkexpr(t3), mkexpr(t1), mkexpr(t2)));
- if (fp_mode64) {
- IRTemp f = newTemp(Ity_F64);
- IRTemp fd_hi = newTemp(Ity_I32);
- t5 = newTemp(Ity_I64);
- assign(f, getFReg(fd));
- assign(fd_hi, unop(Iop_64HIto32, unop(Iop_ReinterpF64asI64,
- mkexpr(f))));
-
- assign(t5, mkWidenFrom32(Ity_I64, unop(Iop_64to32,
- unop(Iop_ReinterpF64asI64, mkexpr(t4))), True));
+ if (mode64)
+ assign(t1, binop(Iop_CmpNE64, mkU64(0), getIReg(rt)));
+ else
+ assign(t1, binop(Iop_CmpNE32, mkU32(0), getIReg(rt)));
- putFReg(fd, unop (Iop_ReinterpI64asF64, mkexpr(t5)));
- } else
- putFReg(fd, binop(Iop_F64toF32, get_IR_roundingmode(),
- mkexpr(t4)));
+ putFReg(fd, IRExpr_ITE(mkexpr(t1), getFReg(fs), getFReg(fd)));
break;
case 0x11: /* D */
DIP("movn.d f%u, f%u, r%u", fd, fs, rt);
-
- t3 = newTemp(Ity_I1);
- t4 = newTemp(Ity_F64);
+ t1 = newTemp(Ity_I1);
if (mode64)
- assign(t3, binop(Iop_CmpNE64, mkU64(0), getIReg(rt)));
+ assign(t1, binop(Iop_CmpNE64, mkU64(0), getIReg(rt)));
else
- assign(t3, binop(Iop_CmpNE32, mkU32(0), getIReg(rt)));
+ assign(t1, binop(Iop_CmpNE32, mkU32(0), getIReg(rt)));
- putDReg(fd, IRExpr_ITE(mkexpr(t3), getDReg(fs), getDReg(fd)));
+ putDReg(fd, IRExpr_ITE(mkexpr(t1), getDReg(fs), getDReg(fd)));
break;
default:
goto decode_failure;
@@ -12595,51 +12565,25 @@
switch (fmt) {
case 0x10: /* S */
DIP("movz.s f%u, f%u, r%u", fd, fs, rt);
+ t1 = newTemp(Ity_I1);
- t1 = newTemp(Ity_F64);
- t2 = newTemp(Ity_F64);
- t3 = newTemp(Ity_I1);
- t4 = newTemp(Ity_F64);
- if (fp_mode64) {
- assign(t1, getFReg(fs));
- assign(t2, getFReg(fd));
- if (mode64)
- assign(t3, binop(Iop_CmpEQ64, mkU64(0), getIReg(rt)));
- else
- assign(t3, binop(Iop_CmpEQ32, mkU32(0), getIReg(rt)));
- } else {
- assign(t1, unop(Iop_F32toF64, getFReg(fs)));
- assign(t2, unop(Iop_F32toF64, getFReg(fd)));
- assign(t3, binop(Iop_CmpEQ32, mkU32(0), getIReg(rt)));
- }
- assign(t4, IRExpr_ITE(mkexpr(t3), mkexpr(t1), mkexpr(t2)));
-
- if (fp_mode64) {
- IRTemp f = newTemp(Ity_F64);
- IRTemp fd_hi = newTemp(Ity_I32);
- t7 = newTemp(Ity_I64);
- assign(f, getFReg(fd));
- assign(fd_hi, unop(Iop_64HIto32,
- unop(Iop_ReinterpF64asI64, mkexpr(f))));
- assign(t7, mkWidenFrom32(Ity_I64, unop(Iop_64to32,
- unop(Iop_ReinterpF64asI64, mkexpr(t4))), True));
-
- putFReg(fd, unop(Iop_ReinterpI64asF64, mkexpr(t7)));
- } else
- putFReg(fd, binop(Iop_F64toF32, get_IR_roundingmode(),
- mkexpr(t4)));
+ if (mode64)
+ assign(t1, binop(Iop_CmpEQ64, mkU64(0), getIReg(rt)));
+ else
+ assign(t1, binop(Iop_CmpEQ32, mkU32(0), getIReg(rt)));
+ putFReg(fd, IRExpr_ITE(mkexpr(t1), getFReg(fs), getFReg(fd)));
break;
case 0x11: /* D */
DIP("movz.d f%u, f%u, r%u", fd, fs, rt);
- t3 = newTemp(Ity_I1);
- t4 = newTemp(Ity_F64);
+ t1 = newTemp(Ity_I1);
+
if (mode64)
- assign(t3, binop(Iop_CmpEQ64, mkU64(0), getIReg(rt)));
+ assign(t1, binop(Iop_CmpEQ64, mkU64(0), getIReg(rt)));
else
- assign(t3, binop(Iop_CmpEQ32, mkU32(0), getIReg(rt)));
+ assign(t1, binop(Iop_CmpEQ32, mkU32(0), getIReg(rt)));
- putDReg(fd, IRExpr_ITE(mkexpr(t3), getDReg(fs), getDReg(fd)));
+ putDReg(fd, IRExpr_ITE(mkexpr(t1), getDReg(fs), getDReg(fd)));
break;
default:
goto decode_failure;
@@ -12840,13 +12784,14 @@
putFReg(fs, mkWidenFromF32(tyF, mkexpr(t1)));
} else
- putFReg(fs, unop(Iop_ReinterpI32asF32, getIReg(rt)));
+ putFReg(fs, unop(Iop_ReinterpI32asF32,
+ mkNarrowTo32(ty, getIReg(rt))));
break;
case 0x5: /* Doubleword Move to Floating Point DMTC1; MIPS64 */
DIP("dmtc1 r%u, f%u", rt, fs);
vassert(mode64);
- putFReg(fs, unop(Iop_ReinterpI64asF64, getIReg(rt)));
+ putDReg(fs, unop(Iop_ReinterpI64asF64, getIReg(rt)));
break;
case 0x0: /* MFC1 */
@@ -12858,13 +12803,15 @@
assign(t1, unop(Iop_64to32, mkexpr(t0)));
putIReg(rt, mkWidenFrom32(ty, mkexpr(t1), True));
} else
- putIReg(rt, unop(Iop_ReinterpF32asI32, getFReg(fs)));
+ putIReg(rt, mkWidenFrom32(ty,
+ unop(Iop_ReinterpF32asI32, getFReg(fs)),
+ True));
break;
case 0x1: /* Doubleword Move from Floating Point DMFC1;
MIPS64 */
DIP("dmfc1 r%u, f%u", rt, fs);
- putIReg(rt, unop(Iop_ReinterpF64asI64, getFReg(fs)));
+ putIReg(rt, unop(Iop_ReinterpF64asI64, getDReg(fs)));
break;
case 0x6: /* CTC1 */
@@ -13476,29 +13423,16 @@
case 0x31: /* LWC1 */
/* Load Word to Floating Point - LWC1 (MIPS32) */
DIP("lwc1 f%u, %u(r%u)", ft, imm, rs);
+ LOAD_STORE_PATTERN;
if (fp_mode64) {
- t1 = newTemp(Ity_F32);
+ t0 = newTemp(Ity_F32);
t2 = newTemp(Ity_I64);
- if (mode64) {
- t0 = newTemp(Ity_I64);
- /* new LO */
- assign(t0, binop(Iop_Add64, getIReg(rs),
- mkU64(extend_s_16to64(imm))));
- } else {
- t0 = newTemp(Ity_I32);
- /* new LO */
- assign(t0, binop(Iop_Add32, getIReg(rs),
- mkU32(extend_s_16to32(imm))));
- }
- assign(t1, load(Ity_F32, mkexpr(t0)));
+ assign(t0, load(Ity_F32, mkexpr(t1)));
assign(t2, mkWidenFrom32(Ity_I64, unop(Iop_ReinterpF32asI32,
- mkexpr(t1)), True));
+ mkexpr(t0)), True));
putDReg(ft, unop(Iop_ReinterpI64asF64, mkexpr(t2)));
} else {
- t0 = newTemp(Ity_I32);
- assign(t0, binop(Iop_Add32, getIReg(rs),
- mkU32(extend_s_16to32(imm))));
- putFReg(ft, load(Ity_F32, mkexpr(t0)));
+ putFReg(ft, load(Ity_F32, mkexpr(t1)));
}
break;
@@ -13591,16 +13525,14 @@
case 0x0: { /* LWXC1 */
/* Load Word Indexed to Floating Point - LWXC1 (MIPS32r2) */
DIP("lwxc1 f%u, r%u(r%u)", fd, rt, rs);
+ t2 = newTemp(ty);
+ assign(t2, binop(mode64 ? Iop_Add64 : Iop_Add32, getIReg(rs),
+ getIReg(rt)));
if (fp_mode64) {
t0 = newTemp(Ity_I64);
t1 = newTemp(Ity_I32);
t3 = newTemp(Ity_F32);
t4 = newTemp(Ity_I64);
-
- t2 = newTemp(ty);
- /* new LO */
- assign(t2, binop(mode64 ? Iop_Add64 : Iop_Add32, getIReg(rs),
- getIReg(rt)));
assign(t3, load(Ity_F32, mkexpr(t2)));
assign(t4, mkWidenFrom32(Ity_I64, unop(Iop_ReinterpF32asI32,
@@ -13608,9 +13540,7 @@
putFReg(fd, unop(Iop_ReinterpI64asF64, mkexpr(t4)));
} else {
- t0 = newTemp(Ity_I32);
- assign(t0, binop(Iop_Add32, getIReg(rs), getIReg(rt)));
- putFReg(fd, load(Ity_F32, mkexpr(t0)));
+ putFReg(fd, load(Ity_F32, mkexpr(t2)));
}
break;
}
@@ -13618,29 +13548,12 @@
case 0x1: { /* LDXC1 */
/* Load Doubleword Indexed to Floating Point
LDXC1 (MIPS32r2 and MIPS64) */
- if (fp_mode64) {
- DIP("ldxc1 f%u, r%u(r%u)", fd, rt, rs);
- t0 = newTemp(ty);
- assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32, getIReg(rs),
- getIReg(rt)));
- putFReg(fd, load(Ity_F64, mkexpr(t0)));
- break;
- } else {
- t0 = newTemp(Ity_I32);
- assign(t0, binop(Iop_Add32, getIReg(rs), getIReg(rt)));
-
- t1 = newTemp(Ity_I32);
- assign(t1, binop(Iop_Add32, mkexpr(t0), mkU32(4)));
-
-#if defined (_MIPSEL)
- putFReg(fd, load(Ity_F32, mkexpr(t0)));
- putFReg(fd + 1, load(Ity_F32, mkexpr(t1)));
-#elif defined (_MIPSEB)
- putFReg(fd + 1, load(Ity_F32, mkexpr(t0)));
- putFReg(fd, load(Ity_F32, mkexpr(t1)));
-#endif
- break;
- }
+ DIP("ldxc1 f%u, r%u(r%u)", fd, rt, rs);
+ t0 = newTemp(ty);
+ assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32, getIReg(rs),
+ getIReg(rt)));
+ putDReg(fd, load(Ity_F64, mkexpr(t0)));
+ break;
}
case 0x5: /* Load Doubleword Indexed Unaligned to Floating Point - LUXC1;
@@ -13656,42 +13569,22 @@
case 0x8: { /* Store Word Indexed from Floating Point - SWXC1 */
DIP("swxc1 f%u, r%u(r%u)", ft, rt, rs);
+ t0 = newTemp(ty);
+ assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32, getIReg(rs),
+ getIReg(rt)));
if (fp_mode64) {
- t0 = newTemp(ty);
- assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32, getIReg(rs),
- getIReg(rt)));
store(mkexpr(t0), getLoFromF64(tyF, getFReg(fs)));
-
} else {
- t0 = newTemp(Ity_I32);
- assign(t0, binop(Iop_Add32, getIReg(rs), getIReg(rt)));
-
store(mkexpr(t0), getFReg(fs));
}
break;
}
case 0x9: { /* Store Doubleword Indexed from Floating Point - SDXC1 */
- DIP("sdc1 f%u, %u(%u)", ft, imm, rs);
- if (fp_mode64) {
- t0 = newTemp(ty);
- assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32, getIReg(rs),
- getIReg(rt)));
- store(mkexpr(t0), getFReg(fs));
- } else {
- t0 = newTemp(Ity_I32);
- assign(t0, binop(Iop_Add32, getIReg(rs), getIReg(rt)));
-
- t1 = newTemp(Ity_I32);
- assign(t1, binop(Iop_Add32, mkexpr(t0), mkU32(4)));
-
-#if defined (_MIPSEL)
- store(mkexpr(t0), getFReg(fs));
- store(mkexpr(t1), getFReg(fs + 1));
-#elif defined (_MIPSEB)
- store(mkexpr(t0), getFReg(fs + 1));
- store(mkexpr(t1), getFReg(fs));
-#endif
- }
+ DIP("sdxc1 f%u, r%u(r%u)", fs, rt, rs);
+ t0 = newTemp(ty);
+ assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32, getIReg(rs),
+ getIReg(rt)));
+ store(mkexpr(t0), getDReg(fs));
break;
}
case 0xD: /* Store Doubleword Indexed Unaligned from Floating Point -
|
|
From: <sv...@va...> - 2016-10-04 13:21:55
|
Author: petarj
Date: Tue Oct 4 14:21:48 2016
New Revision: 16002
Log:
Update svn:ignore list
Add the following files to svn:ignore lists:
/none/tests/amd64/fma4
/none/tests/nocwd
/none/tests/pth_term_signal
Modified:
trunk/none/tests/ (props changed)
trunk/none/tests/amd64/ (props changed)
|
Author: petarj
Date: Tue Oct 4 14:07:36 2016
New Revision: 16001
Log:
mips32: test for syscalls prctl(GET/SET_FP_MODE)
MIPS32 test for syscalls prctl(GET/SET_FP_MODE).
Patch by Aleksandar Rikalo.
Related Bugzilla issue #366079.
Added:
trunk/none/tests/mips32/change_fp_mode.c
trunk/none/tests/mips32/change_fp_mode.stderr.exp
trunk/none/tests/mips32/change_fp_mode.stdout.exp
trunk/none/tests/mips32/change_fp_mode.stdout.exp-fpu32
trunk/none/tests/mips32/change_fp_mode.vgtest
Modified:
trunk/none/tests/mips32/Makefile.am
Modified: trunk/none/tests/mips32/Makefile.am
==============================================================================
--- trunk/none/tests/mips32/Makefile.am (original)
+++ trunk/none/tests/mips32/Makefile.am Tue Oct 4 14:07:36 2016
@@ -6,6 +6,8 @@
EXTRA_DIST = \
block_size.stdout.exp block_size.stderr.exp block_size.vgtest \
branches.stdout.exp branches.stderr.exp branches.vgtest \
+ change_fp_mode.stdout.exp change_fp_mode.stdout.exp-fpu32 \
+ change_fp_mode.stderr.exp change_fp_mode.vgtest \
FPUarithmetic.stdout.exp FPUarithmetic.stdout.exp-mips32 \
FPUarithmetic.stderr.exp FPUarithmetic.vgtest \
LoadStore.stdout.exp LoadStore.stdout.exp-BE LoadStore.stderr.exp \
@@ -42,6 +44,7 @@
allexec \
block_size \
branches \
+ change_fp_mode \
FPUarithmetic \
LoadStore \
LoadStore1 \
Added: trunk/none/tests/mips32/change_fp_mode.c
==============================================================================
--- trunk/none/tests/mips32/change_fp_mode.c (added)
+++ trunk/none/tests/mips32/change_fp_mode.c Tue Oct 4 14:07:36 2016
@@ -0,0 +1,78 @@
+#include <elf.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/prctl.h>
+
+#if !defined(PR_SET_FP_MODE)
+# define PR_SET_FP_MODE 45
+#endif
+
+#if !defined(PR_GET_FP_MODE)
+# define PR_GET_FP_MODE 46
+#endif
+
+/* Determine FP mode based on sdc1 behavior
+ returns 1 if FR = 1 mode is detected. */
+static int get_fp_mode(void) {
+ unsigned long long result = 0;
+ __asm__ volatile(
+ ".set push\n\t"
+ ".set noreorder\n\t"
+ ".set oddspreg\n\t"
+ "lui $t0, 0x3FF0\n\t"
+ "ldc1 $f0, %0\n\t"
+ "mtc1 $t0, $f1\n\t"
+ "sdc1 $f0, %0\n\t"
+ ".set pop\n\t"
+ : "+m"(result)
+ :
+ : "t0", "$f0", "$f1", "memory");
+
+ return (result != 0x3FF0000000000000ull);
+}
+
+static void fatal_error(const char* msg) {
+ fprintf(stderr, "Error: %s\n", msg);
+ exit(1);
+}
+
+static void test(int* fr_prctl, int* fr_detected) {
+ *fr_prctl = prctl(PR_GET_FP_MODE);
+ *fr_detected = get_fp_mode();
+
+ if (*fr_prctl < 0) {
+ fatal_error("prctl(PR_GET_FP_MODE) fails.");
+ }
+
+ printf("fr_prctl: %d, fr_detected: %d\n", *fr_prctl, *fr_detected);
+
+ if (*fr_prctl != *fr_detected) {
+ fatal_error("fr_prctl != fr_detected");
+ }
+}
+
+int main() {
+ int fr_prctl, fr_detected;
+
+ test(&fr_prctl, &fr_detected);
+
+ /* FP64 */
+ if (fr_prctl == 1) {
+
+ /* Change mode to FP32 */
+ if (prctl(PR_SET_FP_MODE, 0) != 0) {
+ fatal_error("prctl(PR_SET_FP_MODE, 0) fails.");
+ }
+
+ test(&fr_prctl, &fr_detected);
+
+ /* Change back FP mode */
+ if (prctl(PR_SET_FP_MODE, 1) != 0) {
+ fatal_error("prctl(PR_SET_FP_MODE, 1) fails.");
+ }
+
+ test(&fr_prctl, &fr_detected);
+ }
+
+ return 0;
+}
Added: trunk/none/tests/mips32/change_fp_mode.stderr.exp
==============================================================================
(empty)
Added: trunk/none/tests/mips32/change_fp_mode.stdout.exp
==============================================================================
--- trunk/none/tests/mips32/change_fp_mode.stdout.exp (added)
+++ trunk/none/tests/mips32/change_fp_mode.stdout.exp Tue Oct 4 14:07:36 2016
@@ -0,0 +1,3 @@
+fr_prctl: 1, fr_detected: 1
+fr_prctl: 0, fr_detected: 0
+fr_prctl: 1, fr_detected: 1
Added: trunk/none/tests/mips32/change_fp_mode.stdout.exp-fpu32
==============================================================================
--- trunk/none/tests/mips32/change_fp_mode.stdout.exp-fpu32 (added)
+++ trunk/none/tests/mips32/change_fp_mode.stdout.exp-fpu32 Tue Oct 4 14:07:36 2016
@@ -0,0 +1 @@
+fr_prctl: 0, fr_detected: 0
Added: trunk/none/tests/mips32/change_fp_mode.vgtest
==============================================================================
--- trunk/none/tests/mips32/change_fp_mode.vgtest (added)
+++ trunk/none/tests/mips32/change_fp_mode.vgtest Tue Oct 4 14:07:36 2016
@@ -0,0 +1,2 @@
+prog: change_fp_mode
+vgopts: -q
|
|
From: Philippe W. <phi...@sk...> - 2016-10-04 06:01:46
|
On Mon, 2016-10-03 at 14:25 +0200, Mark Wielaard wrote: > - r15999 Replace --wait-for-gdb=yes memory loop by a call to VG_(poll) > r16000 Well, 5 seconds is too short for me to type a attach pid command > - Lets ask Philippe. This is a very small risk, concerning a valgrind developer only functionality. So is ok to merge (but not a big deal if not merged). Thanks Philippe |