You can subscribe to this list here.
| 2002 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
(1) |
Oct
(122) |
Nov
(152) |
Dec
(69) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2003 |
Jan
(6) |
Feb
(25) |
Mar
(73) |
Apr
(82) |
May
(24) |
Jun
(25) |
Jul
(10) |
Aug
(11) |
Sep
(10) |
Oct
(54) |
Nov
(203) |
Dec
(182) |
| 2004 |
Jan
(307) |
Feb
(305) |
Mar
(430) |
Apr
(312) |
May
(187) |
Jun
(342) |
Jul
(487) |
Aug
(637) |
Sep
(336) |
Oct
(373) |
Nov
(441) |
Dec
(210) |
| 2005 |
Jan
(385) |
Feb
(480) |
Mar
(636) |
Apr
(544) |
May
(679) |
Jun
(625) |
Jul
(810) |
Aug
(838) |
Sep
(634) |
Oct
(521) |
Nov
(965) |
Dec
(543) |
| 2006 |
Jan
(494) |
Feb
(431) |
Mar
(546) |
Apr
(411) |
May
(406) |
Jun
(322) |
Jul
(256) |
Aug
(401) |
Sep
(345) |
Oct
(542) |
Nov
(308) |
Dec
(481) |
| 2007 |
Jan
(427) |
Feb
(326) |
Mar
(367) |
Apr
(255) |
May
(244) |
Jun
(204) |
Jul
(223) |
Aug
(231) |
Sep
(354) |
Oct
(374) |
Nov
(497) |
Dec
(362) |
| 2008 |
Jan
(322) |
Feb
(482) |
Mar
(658) |
Apr
(422) |
May
(476) |
Jun
(396) |
Jul
(455) |
Aug
(267) |
Sep
(280) |
Oct
(253) |
Nov
(232) |
Dec
(304) |
| 2009 |
Jan
(486) |
Feb
(470) |
Mar
(458) |
Apr
(423) |
May
(696) |
Jun
(461) |
Jul
(551) |
Aug
(575) |
Sep
(134) |
Oct
(110) |
Nov
(157) |
Dec
(102) |
| 2010 |
Jan
(226) |
Feb
(86) |
Mar
(147) |
Apr
(117) |
May
(107) |
Jun
(203) |
Jul
(193) |
Aug
(238) |
Sep
(300) |
Oct
(246) |
Nov
(23) |
Dec
(75) |
| 2011 |
Jan
(133) |
Feb
(195) |
Mar
(315) |
Apr
(200) |
May
(267) |
Jun
(293) |
Jul
(353) |
Aug
(237) |
Sep
(278) |
Oct
(611) |
Nov
(274) |
Dec
(260) |
| 2012 |
Jan
(303) |
Feb
(391) |
Mar
(417) |
Apr
(441) |
May
(488) |
Jun
(655) |
Jul
(590) |
Aug
(610) |
Sep
(526) |
Oct
(478) |
Nov
(359) |
Dec
(372) |
| 2013 |
Jan
(467) |
Feb
(226) |
Mar
(391) |
Apr
(281) |
May
(299) |
Jun
(252) |
Jul
(311) |
Aug
(352) |
Sep
(481) |
Oct
(571) |
Nov
(222) |
Dec
(231) |
| 2014 |
Jan
(185) |
Feb
(329) |
Mar
(245) |
Apr
(238) |
May
(281) |
Jun
(399) |
Jul
(382) |
Aug
(500) |
Sep
(579) |
Oct
(435) |
Nov
(487) |
Dec
(256) |
| 2015 |
Jan
(338) |
Feb
(357) |
Mar
(330) |
Apr
(294) |
May
(191) |
Jun
(108) |
Jul
(142) |
Aug
(261) |
Sep
(190) |
Oct
(54) |
Nov
(83) |
Dec
(22) |
| 2016 |
Jan
(49) |
Feb
(89) |
Mar
(33) |
Apr
(50) |
May
(27) |
Jun
(34) |
Jul
(53) |
Aug
(53) |
Sep
(98) |
Oct
(206) |
Nov
(93) |
Dec
(53) |
| 2017 |
Jan
(65) |
Feb
(82) |
Mar
(102) |
Apr
(86) |
May
(187) |
Jun
(67) |
Jul
(23) |
Aug
(93) |
Sep
(65) |
Oct
(45) |
Nov
(35) |
Dec
(17) |
| 2018 |
Jan
(26) |
Feb
(35) |
Mar
(38) |
Apr
(32) |
May
(8) |
Jun
(43) |
Jul
(27) |
Aug
(30) |
Sep
(43) |
Oct
(42) |
Nov
(38) |
Dec
(67) |
| 2019 |
Jan
(32) |
Feb
(37) |
Mar
(53) |
Apr
(64) |
May
(49) |
Jun
(18) |
Jul
(14) |
Aug
(53) |
Sep
(25) |
Oct
(30) |
Nov
(49) |
Dec
(31) |
| 2020 |
Jan
(87) |
Feb
(45) |
Mar
(37) |
Apr
(51) |
May
(99) |
Jun
(36) |
Jul
(11) |
Aug
(14) |
Sep
(20) |
Oct
(24) |
Nov
(40) |
Dec
(23) |
| 2021 |
Jan
(14) |
Feb
(53) |
Mar
(85) |
Apr
(15) |
May
(19) |
Jun
(3) |
Jul
(14) |
Aug
(1) |
Sep
(57) |
Oct
(73) |
Nov
(56) |
Dec
(22) |
| 2022 |
Jan
(3) |
Feb
(22) |
Mar
(6) |
Apr
(55) |
May
(46) |
Jun
(39) |
Jul
(15) |
Aug
(9) |
Sep
(11) |
Oct
(34) |
Nov
(20) |
Dec
(36) |
| 2023 |
Jan
(79) |
Feb
(41) |
Mar
(99) |
Apr
(169) |
May
(48) |
Jun
(16) |
Jul
(16) |
Aug
(57) |
Sep
(19) |
Oct
|
Nov
|
Dec
|
| S | M | T | W | T | F | S |
|---|---|---|---|---|---|---|
|
|
|
|
|
|
1
|
2
(1) |
|
3
|
4
(4) |
5
(4) |
6
|
7
|
8
|
9
|
|
10
(2) |
11
(2) |
12
(2) |
13
|
14
|
15
(2) |
16
(1) |
|
17
(2) |
18
(2) |
19
(3) |
20
(4) |
21
(1) |
22
|
23
|
|
24
(7) |
25
|
26
(4) |
27
(7) |
28
(2) |
29
(1) |
30
(2) |
|
31
|
|
|
|
|
|
|
|
From: <sv...@va...> - 2016-07-15 10:33:28
|
Author: sewardj
Date: Fri Jul 15 11:33:20 2016
New Revision: 15906
Log:
Enable test cases for: AESE AESD AESMC AESIMC.
Modified:
trunk/none/tests/arm64/fp_and_simd.c
trunk/none/tests/arm64/fp_and_simd.stdout.exp
Modified: trunk/none/tests/arm64/fp_and_simd.c
==============================================================================
--- trunk/none/tests/arm64/fp_and_simd.c (original)
+++ trunk/none/tests/arm64/fp_and_simd.c Fri Jul 15 11:33:20 2016
@@ -4523,10 +4523,6 @@
// ======================== CRYPTO ========================
-// These tests are believed to be correct but are disabled because
-// GNU assembler (GNU Binutils) 2.24.0.20140311 Linaro 2014.03
-// cannot be persuaded to accept those instructions (AFAICT).
-
GEN_TWOVEC_TEST(aesd_16b_16b, "aesd v6.16b, v27.16b", 6, 27)
GEN_TWOVEC_TEST(aese_16b_16b, "aese v6.16b, v27.16b", 6, 27)
GEN_TWOVEC_TEST(aesimc_16b_16b, "aesimc v6.16b, v27.16b", 6, 27)
@@ -7385,14 +7381,22 @@
// ======================== CRYPTO ========================
+ // By default each test only runs once. That seems a bit too minimal
+ // for the crypto ones. So here's an extra run multiplication factor.
+ const int CRYPTO_ITER_MULTIPLIER = 10;
+
// aesd 16b (aes single round decryption)
// aese 16b (aes single round encryption)
// aesimc 16b (aes inverse mix columns)
// aesmc 16b (aes mix columns)
- if (0) test_aesd_16b_16b(TyNONE);
- if (0) test_aese_16b_16b(TyNONE);
- if (0) test_aesimc_16b_16b(TyNONE);
- if (0) test_aesmc_16b_16b(TyNONE);
+ if (1) for (int i = 0; i < CRYPTO_ITER_MULTIPLIER; i++)
+ test_aesd_16b_16b(TyNONE);
+ if (1) for (int i = 0; i < CRYPTO_ITER_MULTIPLIER; i++)
+ test_aese_16b_16b(TyNONE);
+ if (1) for (int i = 0; i < CRYPTO_ITER_MULTIPLIER; i++)
+ test_aesimc_16b_16b(TyNONE);
+ if (1) for (int i = 0; i < CRYPTO_ITER_MULTIPLIER; i++)
+ test_aesmc_16b_16b(TyNONE);
// sha1c q_s_4s
// sha1h s_s
Modified: trunk/none/tests/arm64/fp_and_simd.stdout.exp
==============================================================================
--- trunk/none/tests/arm64/fp_and_simd.stdout.exp (original)
+++ trunk/none/tests/arm64/fp_and_simd.stdout.exp Fri Jul 15 11:33:20 2016
@@ -28793,3 +28793,44 @@
xtn2 v8.8h, v7.4s84dc03eb98680d7370a20b36262e4d85 03eb0d730b364d8567181415788bf1b7 fpsr=00000000
xtn v8.8b, v7.8h2ca8635ab8c96385922e6ada920bfd94 0000000000000000a85ac9852eda0b94 fpsr=00000000
xtn2 v8.16b, v7.8hcb1fb88391120d19091694424470869f 1f8312191642709f078822ac5f050d24 fpsr=00000000
+aesd v6.16b, v27.16b ad3c6e02b07fb70d9fd77489491a1302 739d536739e995431983556db1388e96 e1fd94bc9c947bb6f2f175aedc358be7 739d536739e995431983556db1388e96 fpsr=00000000
+aesd v6.16b, v27.16b 6a5ead74eeb3b9815ad00525782dec40 9d5c678e38c8da85c06cb0684f364ebb b27800142644d2304a6a1a6537031063 9d5c678e38c8da85c06cb0684f364ebb fpsr=00000000
+aesd v6.16b, v27.16b c1ec8190d147c9c125fb7f908222e72f fb81e698f37f844b0e7dcb69dd8f8948 84dc65bfa218c6cf94b345690b760a0a fb81e698f37f844b0e7dcb69dd8f8948 fpsr=00000000
+randV128: 9728 calls, 10055 iters
+aesd v6.16b, v27.16b ecea3363ccecf67463980750bd239e1d 1a0877230e10be492570ec1c59f5e287 aec8d472d64a3c8ba83b015d98558637 1a0877230e10be492570ec1c59f5e287 fpsr=00000000
+aesd v6.16b, v27.16b d079abd022ef8de2209bc2fd4fd2ed1a 5a1a823b3344761afa896f5da6563841 eb39633ccf4f18e1e300b5477a0e4c57 5a1a823b3344761afa896f5da6563841 fpsr=00000000
+aesd v6.16b, v27.16b 080cb0c0566aab73a4675f4ff17bd71e 862af10e4d680dc72f62aa7c1c297fbb 5336c5ece64877c644236f66ce6af829 862af10e4d680dc72f62aa7c1c297fbb fpsr=00000000
+aesd v6.16b, v27.16b f384a210c73caf094fdd3b280500bb0b fd16247abc5ae23123ddfe591b4f19d4 e9526558d792077603741a2cb8d3dcef fd16247abc5ae23123ddfe591b4f19d4 fpsr=00000000
+aesd v6.16b, v27.16b f1c1dfa3d544fa8282dbb866eb3ffabf 1fbf7c61e1fb553637d8cad404a8656e 61d51ba899851ec6288a6e3ed2f47151 1fbf7c61e1fb553637d8cad404a8656e fpsr=00000000
+aesd v6.16b, v27.16b 63a2c958e164ebbf9c4236ea0219f31b 4d0558a11b2bc6b7ca346ecc3614c467 280ffa69c3f35ebf1489b223b992ac01 4d0558a11b2bc6b7ca346ecc3614c467 fpsr=00000000
+aesd v6.16b, v27.16b a809c00f4a7ae2a0fdf11394aa6f0600 e6c8191bcaca96943cd14b23127395a0 9a54ca9bb6c45e283add2220ddfce547 e6c8191bcaca96943cd14b23127395a0 fpsr=00000000
+aese v6.16b, v27.16b 21d523a77167400406cab144441f944c 4ae71eaf4fb825acee8fc0b7f7a538f9 b26e91309bf427c26d234d0d7f9ea3d5 4ae71eaf4fb825acee8fc0b7f7a538f9 fpsr=00000000
+aese v6.16b, v27.16b 2de55201b50b64cd16ab70da2f0afce0 da44c73d09d5d2e13f4d2e6a458a0e52 658e89eba5cd2a7102324ee7681d5837 da44c73d09d5d2e13f4d2e6a458a0e52 fpsr=00000000
+aese v6.16b, v27.16b 2c1aaefe7646afda8e76af36cb0f9f9b f5be75a45901fd128fedf41a5d01768b 15141ebe7cabb9e89049007135a039ca f5be75a45901fd128fedf41a5d01768b fpsr=00000000
+aese v6.16b, v27.16b 7f54967c15f8800acd09ce377910db5f fb3487c69e1b061e3f4e72a89eecd084 3da02bf489b082fa94d044db5f1165b9 fb3487c69e1b061e3f4e72a89eecd084 fpsr=00000000
+aese v6.16b, v27.16b 85736a5cf101373e33452dbf98ec130b 4d875d8138044ee6ae4f08f468297d1c dd679fc15ea69a618cbfb6b3e86b3ff0 4d875d8138044ee6ae4f08f468297d1c fpsr=00000000
+aese v6.16b, v27.16b 9e578b7e6a403556210a2dac8882a47e 4b9758b7889d344a3dd118de1c99dc34 98b9bcdd9caf669c22ba7c4003c196d6 4b9758b7889d344a3dd118de1c99dc34 fpsr=00000000
+aese v6.16b, v27.16b 2be058c1e196d933f6382ee0aab3f099 5344d746edc4192a4bb4ff46191c4ead fe64ae177a7973d46d49ba24bc003e18 5344d746edc4192a4bb4ff46191c4ead fpsr=00000000
+aese v6.16b, v27.16b 8bee3107b5e483b213af8e395d5f573d c76e3b0fc85a5c6638d81f0bc0923265 fff54d30f1bd67485ecd9e2329ae816a c76e3b0fc85a5c6638d81f0bc0923265 fpsr=00000000
+aese v6.16b, v27.16b 1f60772e460894b6d74faf9802663748 07f5e3f2783f5dde651dd70f70dbe83d b2009e86377a2245402add88ad9abc9d 07f5e3f2783f5dde651dd70f70dbe83d fpsr=00000000
+aese v6.16b, v27.16b 45188918f5e36b1ea2f7f1dcf8a8f39b 71b82fcf5d527d723163873089d6d115 c222930edcf32450a3e047ce18c83819 71b82fcf5d527d723163873089d6d115 fpsr=00000000
+aesimc v6.16b, v27.16b 60f4c8a3225569c9d589b3e79f05e815 68998085d8751b01fd8a904f6c654ccd 31052aea28879e86b2c2944c11453ae6 68998085d8751b01fd8a904f6c654ccd fpsr=00000000
+aesimc v6.16b, v27.16b cdd593b02b3dec99cfe35598585d7898 497635f64887986d2871524c7866b944 9a6305009e763ae85a7eaecd93688f97 497635f64887986d2871524c7866b944 fpsr=00000000
+aesimc v6.16b, v27.16b ee9b4a1f727d576cf0e637ce828f0203 7630ae000d67539412f92b070eba795c 3e952d6ef5e0ea527944d52f180956d6 7630ae000d67539412f92b070eba795c fpsr=00000000
+aesimc v6.16b, v27.16b 23264ed057f407239972ba6b7e7de735 4ea84c8588f6ac571b037d608c41ebf3 8787dbf47c7949c943892fe0d219041a 4ea84c8588f6ac571b037d608c41ebf3 fpsr=00000000
+aesimc v6.16b, v27.16b cb56fea238815e9e29673e4daa05860f 32bb6f6318140396a46da83755db70ea 3e3e72f74e0f7ca47947d9b110ac1db5 32bb6f6318140396a46da83755db70ea fpsr=00000000
+aesimc v6.16b, v27.16b 460abb777805bcbd00a5215569083f71 814c757b1da1b9310d180b6bc6686721 12907b3a6c3ba0c32915c58c48f9227b 814c757b1da1b9310d180b6bc6686721 fpsr=00000000
+aesimc v6.16b, v27.16b f424e42e746080607f0bc5631866733c 9b3ac0adf87d2e08b4e406de41c83079 76ffaeebba6f31473a08833974a99e83 9b3ac0adf87d2e08b4e406de41c83079 fpsr=00000000
+aesimc v6.16b, v27.16b 3682d9a68e720a67067b8a5719ff814d e165afd90888c1fafbb0f96e25db2ccf 919320d0ea544e4ba41505683b9908b7 e165afd90888c1fafbb0f96e25db2ccf fpsr=00000000
+aesimc v6.16b, v27.16b 6c05fbc0251bbab1f3d3cf11ccb3c987 b2aca3deaea1d2e9425e45fcd380ba06 7815afa1440b502bc32295d10bdea79d b2aca3deaea1d2e9425e45fcd380ba06 fpsr=00000000
+aesimc v6.16b, v27.16b f48da95c9a3bf120a8f5f4708f61acc9 6ff0fb9e49aac1b3e8cc4968aa993afd 9b1de09cc56674466c0fc7a1676104f6 6ff0fb9e49aac1b3e8cc4968aa993afd fpsr=00000000
+aesmc v6.16b, v27.16b 30fa435a4cb20e9285bf5956c4eb89f2 771218f73981ef394ddc66920b040d93 e65286b857845de08d806c04b18b8e25 771218f73981ef394ddc66920b040d93 fpsr=00000000
+aesmc v6.16b, v27.16b 2af058cadf07bb5bd26cfb5a54a292aa 8da508d99c81ec6f2bc5ac931bae0d0e dc0cb099ff25a8ec91d3af3c8769e6be 8da508d99c81ec6f2bc5ac931bae0d0e fpsr=00000000
+aesmc v6.16b, v27.16b e96b1ef89a1d86f9d65d69a0e8532a20 ed42b59f0c84ce7fcea9779b8f0ee08f 8c82c54ed3b6633fefec5bd361f9c9bf ed42b59f0c84ce7fcea9779b8f0ee08f fpsr=00000000
+aesmc v6.16b, v27.16b 1363c75fcba1aff3b98f0e4324f734d6 51541fd8086f65a2e8c65239c5da7d08 9a9c4b8fe701d19714df24aa2e8e4288 51541fd8086f65a2e8c65239c5da7d08 fpsr=00000000
+aesmc v6.16b, v27.16b 18bba562f32113bad9fc9d4d1cf04559 edbb5450e210bfa0636ed3536fcefb29 de45c30a8b0217738ef93fc590e4e2e5 edbb5450e210bfa0636ed3536fcefb29 fpsr=00000000
+aesmc v6.16b, v27.16b 075ffc9cdbded89459b649b57785a713 504f4555819aa491ea5603b2501943f1 557e5e7a8f82f6d55738a4c6f2700c75 504f4555819aa491ea5603b2501943f1 fpsr=00000000
+aesmc v6.16b, v27.16b dd1059319baa20f37ecfc98578bf954d f37ed68061f18e9e5a3eabc01f1e79f2 cea446f7044af03e7af9951954963d75 f37ed68061f18e9e5a3eabc01f1e79f2 fpsr=00000000
+aesmc v6.16b, v27.16b 4a92530d7e9e5eb0f1cf93555fffa9da 4f2b9966be5424d760f6b995600539c3 86787d187582dd332b7b9d77a250deb3 4f2b9966be5424d760f6b995600539c3 fpsr=00000000
+aesmc v6.16b, v27.16b b56b1ddc388375a510e91c4f709a338b de707d888fd16358600e91cc74bad158 296c3c225f08794b10e187456b7a4016 de707d888fd16358600e91cc74bad158 fpsr=00000000
+aesmc v6.16b, v27.16b 92e993cdf07e325e166ca690b3d078e3 7752e50575dda055df864181d3827c4e 56dd551b68cb07f9faad4d839143f849 7752e50575dda055df864181d3827c4e fpsr=00000000
|
|
From: <sv...@va...> - 2016-07-15 10:31:47
|
Author: sewardj
Date: Fri Jul 15 11:31:34 2016
New Revision: 3224
Log:
Implement arm64 instructions: AESE AESD AESMC AESIMC. n-i-bz.
Modified:
trunk/priv/guest_arm64_defs.h
trunk/priv/guest_arm64_helpers.c
trunk/priv/guest_arm64_toIR.c
Modified: trunk/priv/guest_arm64_defs.h
==============================================================================
--- trunk/priv/guest_arm64_defs.h (original)
+++ trunk/priv/guest_arm64_defs.h Fri Jul 15 11:31:34 2016
@@ -115,6 +115,15 @@
extern ULong arm64g_dirtyhelper_MRS_CNTVCT_EL0 ( void );
+extern void arm64g_dirtyhelper_AESE ( /*OUT*/V128* res,
+ ULong argHi, ULong argLo );
+extern void arm64g_dirtyhelper_AESD ( /*OUT*/V128* res,
+ ULong argHi, ULong argLo );
+extern void arm64g_dirtyhelper_AESMC ( /*OUT*/V128* res,
+ ULong argHi, ULong argLo );
+extern void arm64g_dirtyhelper_AESIMC ( /*OUT*/V128* res,
+ ULong argHi, ULong argLo );
+
/*---------------------------------------------------------*/
/*--- Condition code stuff ---*/
Modified: trunk/priv/guest_arm64_helpers.c
==============================================================================
--- trunk/priv/guest_arm64_helpers.c (original)
+++ trunk/priv/guest_arm64_helpers.c Fri Jul 15 11:31:34 2016
@@ -692,6 +692,230 @@
}
+/* DIRTY HELPERS for doing AES support:
+ * AESE (SubBytes, then ShiftRows)
+ * AESD (InvShiftRows, then InvSubBytes)
+ * AESMC (MixColumns)
+ * AESIMC (InvMixColumns)
+ These don't actually have to be dirty helpers -- they could be
+ clean, but for the fact that they return a V128 and a clean helper
+ can't do that.
+
+ The ARMv8 manual seems to imply that AESE first performs ShiftRows,
+ then SubBytes. This seems to contradict FIPS 197, so the
+ implementation below is consistent with FIPS 197. One can observe
+ that the two transformations commute -- the order in which they
+ happen makes no difference to the result. So the ambiguity doesn't
+ actually matter, but it is confusing. The v8 manual looks correct
+ about AESD, though.
+
+ The three functions rj_xtime, aesMixColumn and aesInvMixColumn only,
+ are taken from "A byte-oriented AES-256 implementation" and are subject
+ to the following usage terms:
+
+ Byte-oriented AES-256 implementation.
+ All lookup tables replaced with 'on the fly' calculations.
+
+ Copyright (c) 2007-2011 Ilya O. Levin, http://www.literatecode.com
+ Other contributors: Hal Finney
+
+ Permission to use, copy, modify, and distribute this software for any
+ purpose with or without fee is hereby granted, provided that the above
+ copyright notice and this permission notice appear in all copies.
+
+ THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+*/
+
+const UChar aesMapSubBytes[256]
+ = { 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5,
+ 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
+ 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0,
+ 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
+ 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc,
+ 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
+ 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a,
+ 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
+ 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0,
+ 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
+ 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b,
+ 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
+ 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85,
+ 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
+ 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5,
+ 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
+ 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17,
+ 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
+ 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88,
+ 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
+ 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c,
+ 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
+ 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9,
+ 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
+ 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6,
+ 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
+ 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e,
+ 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
+ 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94,
+ 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
+ 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68,
+ 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
+ };
+
+const UChar aesMapInvSubBytes[256]
+ = { 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38,
+ 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb,
+ 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87,
+ 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb,
+ 0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d,
+ 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e,
+ 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2,
+ 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25,
+ 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16,
+ 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92,
+ 0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda,
+ 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84,
+ 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a,
+ 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06,
+ 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02,
+ 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b,
+ 0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea,
+ 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73,
+ 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85,
+ 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e,
+ 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89,
+ 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b,
+ 0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20,
+ 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4,
+ 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31,
+ 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f,
+ 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d,
+ 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef,
+ 0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0,
+ 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61,
+ 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26,
+ 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d
+ };
+
+static inline UChar rj_xtime ( UChar x )
+{
+ UChar y = (UChar)(x << 1);
+ return (x & 0x80) ? (y ^ 0x1b) : y;
+}
+
+static void aesMixColumn ( /*MOD*/UChar* r )
+{
+ UChar a = r[0];
+ UChar b = r[1];
+ UChar c = r[2];
+ UChar d = r[3];
+ UChar e = a ^ b ^ c ^ d;
+ r[0] ^= e ^ rj_xtime(a ^ b);
+ r[1] ^= e ^ rj_xtime(b ^ c);
+ r[2] ^= e ^ rj_xtime(c ^ d);
+ r[3] ^= e ^ rj_xtime(d ^ a);
+}
+
+static void aesInvMixColumn ( /*MOD*/UChar* r )
+{
+ UChar a = r[0];
+ UChar b = r[1];
+ UChar c = r[2];
+ UChar d = r[3];
+ UChar e = a ^ b ^ c ^ d;
+ UChar z = rj_xtime(e);
+ UChar x = e ^ rj_xtime(rj_xtime(z ^ a ^ c));
+ UChar y = e ^ rj_xtime(rj_xtime(z ^ b ^ d));
+ r[0] ^= x ^ rj_xtime(a ^ b);
+ r[1] ^= y ^ rj_xtime(b ^ c);
+ r[2] ^= x ^ rj_xtime(c ^ d);
+ r[3] ^= y ^ rj_xtime(d ^ a);
+}
+
+
+/* CALLED FROM GENERATED CODE */
+void arm64g_dirtyhelper_AESE ( /*OUT*/V128* res, ULong argHi, ULong argLo )
+{
+ res->w64[1] = argHi;
+ res->w64[0] = argLo;
+
+ /* First do SubBytes on the State. */
+ UInt i;
+ for (i = 0; i < 16; i++) {
+ res->w8[i] = aesMapSubBytes[res->w8[i] & 0xFF];
+ }
+
+ /* Then do ShiftRows on the State. */
+# define XX(_ix) res->w8[_ix]
+ { UChar old1 = XX(1);
+ XX(1) = XX(5); XX(5) = XX(9); XX(9) = XX(13); XX(13) = old1;
+ }
+ { UChar old2 = XX(2); UChar old6 = XX(6);
+ XX(2) = XX(10); XX(6) = XX(14); XX(10) = old2; XX(14) = old6;
+ }
+ { UChar old15 = XX(15);
+ XX(15) = XX(11); XX(11) = XX(7); XX(7) = XX(3); XX(3) = old15;
+ }
+# undef XX
+}
+
+
+/* CALLED FROM GENERATED CODE */
+void arm64g_dirtyhelper_AESD ( /*OUT*/V128* res, ULong argHi, ULong argLo )
+{
+ res->w64[1] = argHi;
+ res->w64[0] = argLo;
+
+ /* First do InvShiftRows on the State. */
+# define XX(_ix) res->w8[_ix]
+ { UChar old13 = XX(13);
+ XX(13) = XX(9); XX(9) = XX(5); XX(5) = XX(1); XX(1) = old13;
+ }
+ { UChar old14 = XX(14); UChar old10 = XX(10);
+ XX(14) = XX(6); XX(10) = XX(2); XX(6) = old14; XX(2) = old10;
+ }
+ { UChar old3 = XX(3);
+ XX(3) = XX(7); XX(7) = XX(11); XX(11) = XX(15); XX(15) = old3;
+ }
+# undef XX
+
+/* Then do InvSubBytes on the State. */
+ UInt i;
+ for (i = 0; i < 16; i++) {
+ res->w8[i] = aesMapInvSubBytes[res->w8[i] & 0xFF];
+ }
+}
+
+
+/* CALLED FROM GENERATED CODE */
+void arm64g_dirtyhelper_AESMC ( /*OUT*/V128* res, ULong argHi, ULong argLo )
+{
+ res->w64[1] = argHi;
+ res->w64[0] = argLo;
+ aesMixColumn(&res->w8[0]);
+ aesMixColumn(&res->w8[4]);
+ aesMixColumn(&res->w8[8]);
+ aesMixColumn(&res->w8[12]);
+}
+
+
+/* CALLED FROM GENERATED CODE */
+void arm64g_dirtyhelper_AESIMC ( /*OUT*/V128* res, ULong argHi, ULong argLo )
+{
+ res->w64[1] = argHi;
+ res->w64[0] = argLo;
+ aesInvMixColumn(&res->w8[0]);
+ aesInvMixColumn(&res->w8[4]);
+ aesInvMixColumn(&res->w8[8]);
+ aesInvMixColumn(&res->w8[12]);
+}
+
+
/*---------------------------------------------------------------*/
/*--- Flag-helpers translation-time function specialisers. ---*/
/*--- These help iropt specialise calls the above run-time ---*/
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Fri Jul 15 11:31:34 2016
@@ -12860,7 +12860,75 @@
static
Bool dis_AdvSIMD_crypto_aes(/*MB_OUT*/DisResult* dres, UInt insn)
{
+ /* 31 23 21 16 11 9 4
+ 0100 1110 size 10100 opcode 10 n d
+ Decode fields are: size,opcode
+ Size is always 00 in ARMv8, it appears.
+ */
# define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin))
+ if (INSN(31,24) != BITS8(0,1,0,0,1,1,1,0)
+ || INSN(21,17) != BITS5(1,0,1,0,0) || INSN(11,10) != BITS2(1,0)) {
+ return False;
+ }
+ UInt size = INSN(23,22);
+ UInt opcode = INSN(16,12);
+ UInt nn = INSN(9,5);
+ UInt dd = INSN(4,0);
+
+ if (size == BITS2(0,0)
+ && (opcode == BITS5(0,0,1,0,0) || opcode == BITS5(0,0,1,0,1))) {
+ /* -------- 00,00100: AESE Vd.16b, Vn.16b -------- */
+ /* -------- 00,00101: AESD Vd.16b, Vn.16b -------- */
+ Bool isD = opcode == BITS5(0,0,1,0,1);
+ IRTemp op1 = newTemp(Ity_V128);
+ IRTemp op2 = newTemp(Ity_V128);
+ IRTemp xord = newTemp(Ity_V128);
+ IRTemp res = newTemp(Ity_V128);
+ void* helper = isD ? &arm64g_dirtyhelper_AESD
+ : &arm64g_dirtyhelper_AESE;
+ const HChar* hname = isD ? "arm64g_dirtyhelper_AESD"
+ : "arm64g_dirtyhelper_AESE";
+ assign(op1, getQReg128(dd));
+ assign(op2, getQReg128(nn));
+ assign(xord, binop(Iop_XorV128, mkexpr(op1), mkexpr(op2)));
+ IRDirty* di
+ = unsafeIRDirty_1_N( res, 0/*regparms*/, hname, helper,
+ mkIRExprVec_3(
+ IRExpr_VECRET(),
+ unop(Iop_V128HIto64, mkexpr(xord)),
+ unop(Iop_V128to64, mkexpr(xord)) ) );
+ stmt(IRStmt_Dirty(di));
+ putQReg128(dd, mkexpr(res));
+ DIP("aes%c %s.16b, %s.16b\n", isD ? 'd' : 'e',
+ nameQReg128(dd), nameQReg128(nn));
+ return True;
+ }
+
+ if (size == BITS2(0,0)
+ && (opcode == BITS5(0,0,1,1,0) || opcode == BITS5(0,0,1,1,1))) {
+ /* -------- 00,00110: AESMC Vd.16b, Vn.16b -------- */
+ /* -------- 00,00111: AESIMC Vd.16b, Vn.16b -------- */
+ Bool isI = opcode == BITS5(0,0,1,1,1);
+ IRTemp src = newTemp(Ity_V128);
+ IRTemp res = newTemp(Ity_V128);
+ void* helper = isI ? &arm64g_dirtyhelper_AESIMC
+ : &arm64g_dirtyhelper_AESMC;
+ const HChar* hname = isI ? "arm64g_dirtyhelper_AESIMC"
+ : "arm64g_dirtyhelper_AESMC";
+ assign(src, getQReg128(nn));
+ IRDirty* di
+ = unsafeIRDirty_1_N( res, 0/*regparms*/, hname, helper,
+ mkIRExprVec_3(
+ IRExpr_VECRET(),
+ unop(Iop_V128HIto64, mkexpr(src)),
+ unop(Iop_V128to64, mkexpr(src)) ) );
+ stmt(IRStmt_Dirty(di));
+ putQReg128(dd, mkexpr(res));
+ DIP("aes%s %s.16b, %s.16b\n", isI ? "imc" : "mc",
+ nameQReg128(dd), nameQReg128(nn));
+ return True;
+ }
+
return False;
# undef INSN
}
|